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Add support for the STM32F09X family.

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This commit is contained in:
Juha Niskanen (Haltian)
2017-04-21 08:23:25 -06:00
committed by Gregory Nutt
parent 7457875447
commit c04c49dac0
6 changed files with 525 additions and 19 deletions
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arch/arm/include/stm32f0/chip.h
+79 -6
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@@ -52,6 +52,7 @@
#if defined(CONFIG_ARCH_CHIP_STM32F051R8)
# define STM32F051x 1 /* STM32F051x family */
# undef STM32F072x /* Not STM32F072x family */
# undef STM32F091x /* Not STM32F091x family */
# define STM32F0_FLASH_SIZE (64*1024) /* 64Kb */
# define STM32F0_SRAM_SIZE (8*1024) /* 8Kb */
@@ -71,6 +72,7 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F072C8) || defined(CONFIG_ARCH_CHIP_STM32F072CB)
# undef STM32F051x /* Not STM32F051x family */
# define STM32F072x 1 /* STM32F072x family */
# undef STM32F091x /* Not STM32F091x family */
# ifdef CONFIG_ARCH_CHIP_STM32F072C8
# define STM32F0_FLASH_SIZE (64*1024) /* 64Kb */
@@ -90,9 +92,9 @@
# define STM32F0_NCAN 1 /* One CAN controller */
# define STM32F0_NUSBDEV 1 /* One USB device controller */
# define STM32F0_NCEC 1 /* One HDMI-CEC controller */
# define STM32F0_NADC16 1 /* One 16-bit module */
# define STM32F0_NADC12 1 /* One 12-bit module */
# define STM32F0_NADCCHAN 10 /* Ten external channels */
# define STM32F0_NADCEXT 3 /* Three external channels */
# define STM32F0_NADCINT 3 /* Three internal channels */
# define STM32F0_NDAC 1 /* One DAC module */
# define STM32F0_NDACCHAN 2 /* Two DAC channels */
# define STM32F0_NCOMP 2 /* Two Analog Comparators */
@@ -102,6 +104,7 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F072R8) || defined(CONFIG_ARCH_CHIP_STM32F072RB)
# undef STM32F051x /* Not STM32F051x family */
# define STM32F072x 1 /* STM32F072x family */
# undef STM32F091x /* Not STM32F091x family */
# ifdef CONFIG_ARCH_CHIP_STM32F072R8
# define STM32F0_FLASH_SIZE (64*1024) /* 64Kb */
@@ -121,9 +124,9 @@
# define STM32F0_NCAN 1 /* One CAN controller */
# define STM32F0_NUSBDEV 1 /* One USB device controller */
# define STM32F0_NCEC 1 /* One HDMI-CEC controller */
# define STM32F0_NADC16 1 /* One 16-bit module */
# define STM32F0_NADC12 1 /* One 12-bit module */
# define STM32F0_NADCCHAN 16 /* 16 external channels */
# define STM32F0_NADCEXT 3 /* Three external channels */
# define STM32F0_NADCINT 3 /* Three internal channels */
# define STM32F0_NDAC 1 /* One DAC module */
# define STM32F0_NDACCHAN 2 /* Two DAC channels */
# define STM32F0_NCOMP 2 /* Two Analog Comparators */
@@ -133,6 +136,7 @@
#elif defined(CONFIG_ARCH_CHIP_STM32F072V8) || defined(CONFIG_ARCH_CHIP_STM32F072VB)
# undef STM32F051x /* Not STM32F051x family */
# define STM32F072x 1 /* STM32F072x family */
# undef STM32F091x /* Not STM32F091x family */
# ifdef CONFIG_ARCH_CHIP_STM32F072V8
# define STM32F0_FLASH_SIZE (64*1024) /* 64Kb */
@@ -152,15 +156,84 @@
# define STM32F0_NCAN 1 /* One CAN controller */
# define STM32F0_NUSBDEV 1 /* One USB device controller */
# define STM32F0_NCEC 1 /* One HDMI-CEC controller */
# define STM32F0_NADC16 1 /* One 16-bit module */
# define STM32F0_NADC12 1 /* One 12-bit module */
# define STM32F0_NADCCHAN 16 /* 16 external channels */
# define STM32F0_NADCEXT 3 /* Three external channels */
# define STM32F0_NADCINT 3 /* Three internal channels */
# define STM32F0_NDAC 1 /* One DAC module */
# define STM32F0_NDACCHAN 2 /* Two DAC channels */
# define STM32F0_NCOMP 2 /* Two Analog Comparators */
# define STM32F0_NCAP 24 /* Capacitive sensing channels */
# define STM32F0_NPORTS 6 /* Six GPIO ports, GPIOA-F */
#elif defined(CONFIG_ARCH_CHIP_STM32F091CB) || defined(CONFIG_ARCH_CHIP_STM32F091CC)
# undef STM32F051x /* Not STM32F051x family */
# undef STM32F072x /* Not STM32F072x family */
# define STM32F091x 1 /* STM32F091x family */
# ifdef CONFIG_ARCH_CHIP_STM32F091CB
# define STM32F0_FLASH_SIZE (128*1024) /* 128Kb */
# else
# define STM32F0_FLASH_SIZE (256*1024) /* 256Kb */
# endif
# define STM32F0_SRAM_SIZE (32*1024) /* 32Kb */
# define STM32F0_NATIM 1 /* One advanced timer TIM1 */
# define STM32F0_NGTIM16 5 /* 16-bit general up/down timers TIM3, TIM14-17 */
# define STM32F0_NGTIM32 1 /* 32-bit general up/down timers TIM2 */
# define STM32F0_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
# define STM32F0_NSPI 2 /* Two SPI modules (SPI or I2S) */
# define STM32F0_NI2S 2 /* Two I2S modules (SPI or I2S) */
# define STM32F0_NI2C 2 /* Two I2C modules */
# define STM32F0_NUSART 6 /* Six USARTs modules */
# define STM32F0_NCAN 1 /* One CAN controller */
# define STM32F0_NUSBDEV 0 /* No USB device controller */
# define STM32F0_NCEC 1 /* One HDMI-CEC controller */
# define STM32F0_NADC12 1 /* One 12-bit module */
# define STM32F0_NADCCHAN 10 /* 10 external channels */
# define STM32F0_NADCINT 3 /* Three internal channels */
# define STM32F0_NDAC 1 /* One DAC module */
# define STM32F0_NDACCHAN 2 /* Two DAC channels */
# define STM32F0_NCOMP 2 /* Two Analog Comparators */
# define STM32F0_NCAP 17 /* Capacitive sensing channels */
# define STM32F0_NPORTS 6 /* Six GPIO ports, GPIOA-F */
#elif defined(CONFIG_ARCH_CHIP_STM32F091RB) || defined(CONFIG_ARCH_CHIP_STM32F091RC) \
|| defined(CONFIG_ARCH_CHIP_STM32F091VB) || defined(CONFIG_ARCH_CHIP_STM32F091VC)
# undef STM32F051x /* Not STM32F051x family */
# undef STM32F072x /* Not STM32F072x family */
# define STM32F091x 1 /* STM32F091x family */
# if defined(CONFIG_ARCH_CHIP_STM32F091RB) || defined(CONFIG_ARCH_CHIP_STM32F091VB)
# define STM32F0_FLASH_SIZE (128*1024) /* 128Kb */
# else
# define STM32F0_FLASH_SIZE (256*1024) /* 256Kb */
# endif
# define STM32F0_SRAM_SIZE (32*1024) /* 32Kb */
# define STM32F0_NATIM 1 /* One advanced timer TIM1 */
# define STM32F0_NGTIM16 5 /* 16-bit general up/down timers TIM3, TIM14-17 */
# define STM32F0_NGTIM32 1 /* 32-bit general up/down timers TIM2 */
# define STM32F0_NBTIM 2 /* 2 basic timers: TIM6, TIM7 */
# define STM32F0_NSPI 2 /* Two SPI modules (SPI or I2S) */
# define STM32F0_NI2S 2 /* Two I2S modules (SPI or I2S) */
# define STM32F0_NI2C 2 /* Two I2C modules */
# define STM32F0_NUSART 8 /* Eight USARTs modules */
# define STM32F0_NCAN 1 /* One CAN controller */
# define STM32F0_NUSBDEV 0 /* No USB device controller */
# define STM32F0_NCEC 1 /* One HDMI-CEC controller */
# define STM32F0_NADC12 1 /* One 12-bit module */
# define STM32F0_NADCCHAN 16 /* 16 external channels */
# define STM32F0_NADCINT 3 /* Three internal channels */
# define STM32F0_NDAC 1 /* One DAC module */
# define STM32F0_NDACCHAN 2 /* Two DAC channels */
# define STM32F0_NCOMP 2 /* Two Analog Comparators */
# if defined(CONFIG_ARCH_CHIP_STM32F091VB) || defined(CONFIG_ARCH_CHIP_STM32F091VC)
# define STM32F0_NCAP 24 /* Capacitive sensing channels */
# else
# define STM32F0_NCAP 18 /* Capacitive sensing channels */
# endif
# define STM32F0_NPORTS 6 /* Six GPIO ports, GPIOA-F */
#else
# error "Unsupported STM32F0xx chip"
#endif