mirror of
https://github.com/apache/nuttx.git
synced 2026-06-02 01:21:26 +08:00
photon: porting wlan device
This commit is contained in:
Simon Piriou
@@ -42,6 +42,7 @@ ifeq ($(CONFIG_DRIVERS_IEEE80211),y)
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ifeq ($(CONFIG_IEEE80211_BROADCOM_FULLMAC_SDIO),y)
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CSRCS += bcmf_sdio.c
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CSRCS += mmc_sdio.c
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endif
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# Include IEEE 802.11 build support
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@@ -50,6 +50,7 @@
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#include <nuttx/sdio.h>
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#include <nuttx/arch.h>
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#include <nuttx/wireless/ieee80211/mmc_sdio.h>
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#include <nuttx/wireless/ieee80211/bcmf_sdio.h>
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#include <nuttx/wireless/ieee80211/bcmf_board.h>
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@@ -59,7 +60,19 @@
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#define BCMF_DEVICE_RESET_DELAY_MS 10
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#define BCMF_DEVICE_START_DELAY_MS 10
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#define BCMF_DEVICE_IDLE_DELAY_MS 50
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#define BCMF_CLOCK_SETUP_DELAY_MS 500
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#define SDIO_FN1_CHIPCLKCSR 0x1000E /* Clock Control Source Register */
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#define SDIO_FN1_PULLUP 0x1000F /* Pull-up Control Register for cmd, D0-2 lines */
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#define SDIO_FN1_CHIPCLKCSR_FORCE_ALP 0x01
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#define SDIO_FN1_CHIPCLKCSR_FORCE_HT 0x02
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#define SDIO_FN1_CHIPCLKCSR_FORCE_ILP 0x04
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#define SDIO_FN1_CHIPCLKCSR_ALP_AVAIL_REQ 0x08
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#define SDIO_FN1_CHIPCLKCSR_HT_AVAIL_REQ 0x10
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#define SDIO_FN1_CHIPCLKCSR_FORCE_HW_CLKREQ_OFF 0x20
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#define SDIO_FN1_CHIPCLKCSR_ALP_AVAIL 0x40
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#define SDIO_FN1_CHIPCLKCSR_HT_AVAIL 0x80
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/****************************************************************************
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* Private Types
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@@ -77,8 +90,17 @@ struct bcmf_dev_s
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* Private Function Prototypes
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****************************************************************************/
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static int bcmf_sendcmdpoll(FAR struct bcmf_dev_s *priv,
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uint32_t cmd, uint32_t arg);
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static int bcmf_transfer_bytes(FAR struct bcmf_dev_s *priv, bool write,
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uint8_t function, uint32_t address,
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uint8_t *buf, unsigned int len);
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static int bcmf_read_reg(FAR struct bcmf_dev_s *priv, uint8_t function,
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uint32_t address, uint8_t *reg,
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unsigned int len);
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static int bcmf_write_reg(FAR struct bcmf_dev_s *priv, uint8_t function,
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uint32_t address, uint32_t reg,
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unsigned int len);
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static int bcmf_probe(FAR struct bcmf_dev_s *priv);
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static int bcmf_hwinitialize(FAR struct bcmf_dev_s *priv);
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@@ -93,29 +115,50 @@ static void bcmf_hwuninitialize(FAR struct bcmf_dev_s *priv);
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****************************************************************************/
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/****************************************************************************
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* Name: bcmf_sendcmdpoll
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* Name: bcmf_transfer_bytes
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****************************************************************************/
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int bcmf_sendcmdpoll(FAR struct bcmf_dev_s *priv, uint32_t cmd, uint32_t arg)
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int bcmf_transfer_bytes(FAR struct bcmf_dev_s *priv, bool write,
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uint8_t function, uint32_t address,
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uint8_t *buf, unsigned int len)
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{
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int ret;
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/* Use rw_io_direct method if len is 1 */
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/* Send the command */
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ret = SDIO_SENDCMD(priv->sdio_dev, cmd, arg);
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if (ret == OK)
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if (len == 1)
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{
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/* Then poll-wait until the response is available */
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ret = SDIO_WAITRESPONSE(priv->sdio_dev, cmd);
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if (ret != OK)
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{
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_err("ERROR: Wait for response to cmd: %08x failed: %d\n",
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cmd, ret);
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}
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return sdio_io_rw_direct(priv->sdio_dev, write,
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function, address, *buf, buf);
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}
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return ret;
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// return sdio_io_rw_extended(priv->sdio_dev, write,
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// function, address, *buf, buf);
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return -EINVAL;
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}
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/****************************************************************************
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* Name: bcmf_read_reg
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****************************************************************************/
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int bcmf_read_reg(FAR struct bcmf_dev_s *priv, uint8_t function,
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uint32_t address, uint8_t *reg, unsigned int len)
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{
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return bcmf_transfer_bytes(priv, false, function, address, reg, len);
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}
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/****************************************************************************
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* Name: bcmf_write_reg
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****************************************************************************/
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int bcmf_write_reg(FAR struct bcmf_dev_s *priv, uint8_t function,
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uint32_t address, uint32_t reg, unsigned int len)
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{
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if (len > 4)
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{
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return -EINVAL;
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}
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return bcmf_transfer_bytes(priv, true, function, address,
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(uint8_t*)®, len);
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}
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/****************************************************************************
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@@ -125,39 +168,88 @@ int bcmf_sendcmdpoll(FAR struct bcmf_dev_s *priv, uint32_t cmd, uint32_t arg)
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int bcmf_probe(FAR struct bcmf_dev_s *priv)
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{
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int ret;
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uint32_t data = 0;
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uint8_t value;
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int loops;
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/* Set device state from reset to idle */
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bcmf_sendcmdpoll(priv, MMCSD_CMD0, 0);
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up_mdelay(BCMF_DEVICE_START_DELAY_MS);
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/* Send IO_SEND_OP_COND command */
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ret = bcmf_sendcmdpoll(priv, SDIO_CMD5, 0);
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/* Probe sdio card compatible device */
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ret = sdio_probe(priv->sdio_dev);
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if (ret != OK)
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{
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goto exit_error;
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}
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/* Receive R4 response */
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ret = SDIO_RECVR4(priv->sdio_dev, SDIO_CMD5, &data);
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/* Enable bus FN1 */
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ret = sdio_enable_function(priv->sdio_dev, 1);
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if (ret != OK)
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{
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goto exit_error;
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}
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/* Broadcom chips have 2 additional functions and wide voltage range */
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/* Set FN0 / FN1 / FN2 default block size */
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if ((((data >> 28) & 7) != 2) ||
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(((data >> 8) & 0xff80) != 0xff80))
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ret = sdio_set_blocksize(priv->sdio_dev, 0, 64);
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if (ret != OK)
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{
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goto exit_error;
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}
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ret = sdio_set_blocksize(priv->sdio_dev, 1, 64);
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if (ret != OK)
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{
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goto exit_error;
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}
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ret = sdio_set_blocksize(priv->sdio_dev, 2, 64);
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if (ret != OK)
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{
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goto exit_error;
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}
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/* Enable device interrupts for FN0, FN1 and FN2 */
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ret = sdio_io_rw_direct(priv->sdio_dev, true, 0, SDIO_CCCR_INTEN,
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(1 << 0) | (1 << 1) | (1 << 2), NULL);
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if (ret != OK)
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{
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goto exit_error;
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}
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/* Default device clock speed is up to 25 Mhz
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* We could set EHS bit to operate at a clock rate up to 50 Mhz */
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SDIO_CLOCK(priv->sdio_dev, CLOCK_SD_TRANSFER_4BIT);
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up_mdelay(BCMF_CLOCK_SETUP_DELAY_MS);
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/* Wait for function 1 to be ready */
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loops = 10;
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while (--loops > 0)
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{
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up_mdelay(1);
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ret = sdio_io_rw_direct(priv->sdio_dev, false, 0, SDIO_CCCR_IORDY, 0, &value);
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if (ret != OK)
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{
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return ret;
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}
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if (value & (1 << 1))
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{
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/* Function 1 is ready */
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break;
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}
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}
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if (loops <= 0)
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{
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return -ETIMEDOUT;
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}
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_info("sdio fn1 ready\n");
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return OK;
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exit_error:
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@@ -166,6 +258,89 @@ exit_error:
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return ret;
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}
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/****************************************************************************
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* Name: bcmf_businitialize
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****************************************************************************/
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int bcmf_businitialize(FAR struct bcmf_dev_s *priv)
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{
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int ret;
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int loops;
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/* Send Active Low-Power clock request */
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ret = bcmf_write_reg(priv, 1, SDIO_FN1_CHIPCLKCSR,
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SDIO_FN1_CHIPCLKCSR_FORCE_HW_CLKREQ_OFF |
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SDIO_FN1_CHIPCLKCSR_ALP_AVAIL_REQ |
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SDIO_FN1_CHIPCLKCSR_FORCE_ALP, 1);
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if (ret != OK)
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{
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return ret;;
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}
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loops = 10;
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while (--loops > 0)
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{
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uint8_t value;
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up_mdelay(10);
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ret = bcmf_read_reg(priv, 1, SDIO_FN1_CHIPCLKCSR, &value, 1);
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if (ret != OK)
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{
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return ret;
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}
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if (value & SDIO_FN1_CHIPCLKCSR_ALP_AVAIL)
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{
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/* Active Low-Power clock is ready */
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break;
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}
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}
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if (loops <= 0)
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{
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_err("failed to enable ALP\n");
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return -ETIMEDOUT;
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}
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/* Clear Active Low-Power clock request */
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ret = bcmf_write_reg(priv, 1, SDIO_FN1_CHIPCLKCSR, 0, 1);
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if (ret != OK)
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{
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return ret;
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}
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/* Disable pull-ups on SDIO cmd, d0-2 lines */
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ret = bcmf_write_reg(priv, 1, SDIO_FN1_PULLUP, 0, 1);
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if (ret != OK)
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{
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return ret;
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}
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/* Enable oob gpio interrupt */
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// bcmf_board_setup_oob_irq(priv->minor, bcmf_oob_irq, (void*)priv);
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/* Enable F2 interrupt only */
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/* Upload firmware */
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/* Enable function 2 */
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// ret = sdio_enable_function(priv->sdio_dev, 2);
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// if (ret != OK)
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// {
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// goto exit_error;
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// }
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return OK;
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}
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/****************************************************************************
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* Name: bcmf_hwinitialize
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****************************************************************************/
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@@ -253,6 +428,15 @@ int bcmf_sdio_initialize(int minor, FAR struct sdio_dev_s *dev)
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ret = bcmf_probe(priv);
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if (ret != OK)
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{
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goto exit_uninit_hw;
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}
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/* Initialize device */
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ret = bcmf_businitialize(priv);
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if (ret != OK)
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{
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goto exit_uninit_hw;
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@@ -0,0 +1,355 @@
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#include <nuttx/wireless/ieee80211/mmc_sdio.h>
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#include <debug.h>
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#include <errno.h>
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#include <nuttx/arch.h>
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#define SDIO_CMD53_TIMEOUT_MS 100
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#define SDIO_IDLE_DELAY_MS 50
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struct __attribute__((packed)) sdio_cmd52 {
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uint32_t write_data : 8;
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uint32_t reserved_8 : 1;
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uint32_t register_address : 17;
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uint32_t reserved_26 : 1;
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uint32_t raw_flag : 1;
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uint32_t function_number : 3;
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uint32_t rw_flag : 1;
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};
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struct __attribute__((packed)) sdio_cmd53 {
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uint32_t byte_block_count : 9;
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uint32_t register_address : 17;
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uint32_t op_code : 1;
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uint32_t block_mode : 1;
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uint32_t function_number : 3;
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uint32_t rw_flag : 1;
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};
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struct __attribute__((packed)) sdio_resp_R5 {
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uint32_t data : 8;
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struct {
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uint32_t out_of_range : 1;
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uint32_t function_number : 1;
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uint32_t rfu : 1;
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uint32_t error : 1;
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uint32_t io_current_state : 2;
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uint32_t illegal_command : 1;
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uint32_t com_crc_error : 1;
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} flags;
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uint32_t reserved_16 : 16;
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};
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union sdio_cmd5x {
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uint32_t value;
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struct sdio_cmd52 cmd52;
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struct sdio_cmd53 cmd53;
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};
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int sdio_sendcmdpoll(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg)
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{
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int ret;
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/* Send the command */
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ret = SDIO_SENDCMD(dev, cmd, arg);
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if (ret == OK)
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{
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/* Then poll-wait until the response is available */
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ret = SDIO_WAITRESPONSE(dev, cmd);
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if (ret != OK)
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{
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_err("ERROR: Wait for response to cmd: %08x failed: %d\n",
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cmd, ret);
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}
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}
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return ret;
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}
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int sdio_io_rw_direct(FAR struct sdio_dev_s *dev, bool write,
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uint8_t function, uint32_t address,
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uint8_t inb, uint8_t* outb)
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{
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union sdio_cmd5x arg;
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struct sdio_resp_R5 resp;
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int ret;
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/* Setup CMD52 argument */
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arg.cmd52.write_data = inb;
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arg.cmd52.register_address = address & 0x1ffff;
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arg.cmd52.raw_flag = (write && outb);
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arg.cmd52.function_number = function & 7;
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arg.cmd52.rw_flag = write;
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/* Send CMD52 command */
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sdio_sendcmdpoll(dev, SDIO_ACMD52, arg.value);
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ret = SDIO_RECVR5(dev, SDIO_ACMD52, (uint32_t*)&resp);
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if (ret != OK)
|
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{
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_err("ERROR: SDIO_RECVR5 failed %d\n", ret);
|
||||
return ret;
|
||||
}
|
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|
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/* Check for errors */
|
||||
|
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if (resp.flags.error)
|
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{
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return -EIO;
|
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}
|
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if (resp.flags.function_number || resp.flags.out_of_range)
|
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{
|
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return -EINVAL;
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}
|
||||
|
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/* Write output byte */
|
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|
||||
if (outb)
|
||||
{
|
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*outb = resp.data & 0xff;
|
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}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
// int sdio_io_rw_extended(FAR struct sdio_dev_s *dev, bool write,
|
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// uint8_t function, uint32_t address,
|
||||
// bool inc_addr, uint8_t *buf,
|
||||
// unsigned int blocklen, unsigned int nblocks)
|
||||
// {
|
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// struct sdio_cmd53 arg;
|
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// struct sdio_resp_R5 resp;
|
||||
// int ret;
|
||||
// sdio_eventset_t wkupevent;
|
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//
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// /* Setup CMD53 argument */
|
||||
//
|
||||
// arg.byte_block_count = blocklen;
|
||||
// arg.register_address = address & 0x1ff;
|
||||
// arg.op_code = inc_addr;
|
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// arg.function_number = function & 7;
|
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// arg.rw_flag = write;
|
||||
//
|
||||
// if (nblocks <= 1 && blocklen < 512)
|
||||
// {
|
||||
// /* Use byte mode */
|
||||
//
|
||||
// arg.block_mode = 0;
|
||||
// nblocks = 1;
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// /* Use block mode */
|
||||
//
|
||||
// arg.block_mode = 1;
|
||||
// }
|
||||
//
|
||||
// /* Send CMD53 command */
|
||||
//
|
||||
// SDIO_BLOCKSETUP(dev, blocklen, nblocks);
|
||||
// SDIO_WAITENABLE(dev,
|
||||
// SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
|
||||
//
|
||||
// sdio_sendcmdpoll(dev, SDIO_ACMD53, (uint32_t)arg);
|
||||
// ret = SDIO_RECVR5(dev, SDIO_ACMD53, (uint32_t*)&resp);
|
||||
//
|
||||
// if (write)
|
||||
// {
|
||||
// sdio_sendcmdpoll(dev, SDIO_ACMD53, (uint32_t)arg);
|
||||
// ret = SDIO_RECVR5(dev, SDIO_ACMD53, (uint32_t*)&resp);
|
||||
//
|
||||
// SDIO_SENDSETUP(dev, buf, blocklen * nblocks);
|
||||
// wkupevent = SDIO_EVENTWAIT(dev, SDIO_CMD53_TIMEOUT_MS);
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// SDIO_RECVSETUP(dev, buf, blocklen * nblocks);
|
||||
// SDIO_SENDCMD(dev, SDIO_ACMD53, (uint32_t)arg);
|
||||
//
|
||||
// wkupevent = SDIO_EVENTWAIT(dev, SDIO_CMD53_TIMEOUT_MS);
|
||||
// ret = SDIO_RECVR5(dev, SDIO_ACMD53, (uint32_t*)&resp);
|
||||
// }
|
||||
//
|
||||
// if (ret != OK)
|
||||
// {
|
||||
// _err("ERROR: SDIO_RECVR5 failed %d\n", ret);
|
||||
// return ret;
|
||||
// }
|
||||
//
|
||||
// /* Check for errors */
|
||||
//
|
||||
// if (wkupevent & SDIOWAIT_TIMEOUT)
|
||||
// {
|
||||
// return -ETIMEDOUT;
|
||||
// }
|
||||
// if (resp.error || (wkupevent & SDIOWAIT_ERROR))
|
||||
// {
|
||||
// return -EIO;
|
||||
// }
|
||||
// if (resp.function_number || resp.out_of_range)
|
||||
// {
|
||||
// return -EINVAL;
|
||||
// }
|
||||
//
|
||||
// return OK;
|
||||
// }
|
||||
|
||||
int sdio_set_wide_bus(struct sdio_dev_s *dev)
|
||||
{
|
||||
int ret;
|
||||
uint8_t value;
|
||||
|
||||
/* Read Bus Interface Control register */
|
||||
|
||||
ret = sdio_io_rw_direct(dev, false, 0, SDIO_CCCR_BUS_IF, 0, &value);
|
||||
if (ret != OK)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Set 4 bits bus width setting */
|
||||
|
||||
value &= ~SDIO_CCCR_BUS_IF_WIDTH_MASK;
|
||||
value |= SDIO_CCCR_BUS_IF_4_BITS;
|
||||
|
||||
ret = sdio_io_rw_direct(dev, true, 0, SDIO_CCCR_BUS_IF, value, NULL);
|
||||
if (ret != OK)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
SDIO_WIDEBUS(dev, true);
|
||||
return OK;
|
||||
}
|
||||
|
||||
int sdio_probe(FAR struct sdio_dev_s *dev)
|
||||
{
|
||||
int ret;
|
||||
uint32_t data = 0;
|
||||
|
||||
/* Set device state from reset to idle */
|
||||
|
||||
sdio_sendcmdpoll(dev, MMCSD_CMD0, 0);
|
||||
up_mdelay(SDIO_IDLE_DELAY_MS);
|
||||
|
||||
/* Device is SDIO card compatible so we can send CMD5 instead of ACMD41 */
|
||||
|
||||
sdio_sendcmdpoll(dev, SDIO_CMD5, 0);
|
||||
|
||||
/* Receive R4 response */
|
||||
|
||||
ret = SDIO_RECVR4(dev, SDIO_CMD5, &data);
|
||||
if (ret != OK)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Device is in Card Identification Mode, request device RCA */
|
||||
|
||||
sdio_sendcmdpoll(dev, SD_CMD3, 0);
|
||||
|
||||
ret = SDIO_RECVR6(dev, SD_CMD3, &data);
|
||||
if (ret != OK)
|
||||
{
|
||||
_err("ERROR: RCA request failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
_info("rca is %x\n", data >> 16);
|
||||
|
||||
/* Send CMD7 with the argument == RCA in order to select the card
|
||||
* and put it in Transfer State */
|
||||
|
||||
sdio_sendcmdpoll(dev, MMCSD_CMD7S, data & 0xffff0000);
|
||||
|
||||
ret = SDIO_RECVR1(dev, MMCSD_CMD7S, &data);
|
||||
if (ret != OK)
|
||||
{
|
||||
_err("ERROR: card selection failed: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Configure 4 bits bus width */
|
||||
|
||||
ret = sdio_set_wide_bus(dev);
|
||||
if (ret != OK)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
int sdio_set_blocksize(FAR struct sdio_dev_s *dev, uint8_t function,
|
||||
uint16_t blocksize)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = sdio_io_rw_direct(dev, true, 0,
|
||||
(function << SDIO_FBR_SHIFT) + SDIO_CCCR_FN0_BLKSIZE_0,
|
||||
blocksize & 0xff, NULL);
|
||||
if (ret != OK)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = sdio_io_rw_direct(dev, true, 0,
|
||||
(function << SDIO_FBR_SHIFT) + SDIO_CCCR_FN0_BLKSIZE_1,
|
||||
(blocksize >> 8), NULL);
|
||||
|
||||
if (ret != OK)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
int sdio_enable_function(FAR struct sdio_dev_s *dev, uint8_t function)
|
||||
{
|
||||
int ret;
|
||||
uint8_t value;
|
||||
|
||||
/* Read current I/O Enable register */
|
||||
|
||||
ret = sdio_io_rw_direct(dev, false, 0, SDIO_CCCR_IOEN, 0, &value);
|
||||
if (ret != OK)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = sdio_io_rw_direct(dev, true, 0, SDIO_CCCR_IOEN, value | (1 << function), NULL);
|
||||
|
||||
if (ret != OK)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Wait 10ms for function to be enabled */
|
||||
|
||||
int loops = 10;
|
||||
|
||||
while (loops-- > 0)
|
||||
{
|
||||
up_mdelay(1);
|
||||
|
||||
ret = sdio_io_rw_direct(dev, false, 0, SDIO_CCCR_IOEN, 0, &value);
|
||||
if (ret != OK)
|
||||
{
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (value & (1 << function))
|
||||
{
|
||||
/* Function enabled */
|
||||
|
||||
_info("Function %d enabled\n", function);
|
||||
return OK;
|
||||
}
|
||||
}
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
Reference in New Issue
Block a user