diff --git a/arch/xtensa/include/irq.h b/arch/xtensa/include/irq.h index 1c11515deea..7432441f94b 100644 --- a/arch/xtensa/include/irq.h +++ b/arch/xtensa/include/irq.h @@ -115,18 +115,18 @@ # define REG_TMP0 (_REG_CALL0_START + 0) # define REG_TMP1 (_REG_CALL0_START + 1) # define REG_TMP2 (_REG_CALL0_START + 2) -# define _REG_OVLY_START (_REG_CALL0_START + 3) +# define _REG_OVLY_START (_REG_CALL0_START + 3) #else -# define _REG_OVLY_START _REG_CALL0_START +# define _REG_OVLY_START _REG_CALL0_START #endif #ifdef CONFIG_XTENSA_USE_OVLY /* Storage for overlay state */ # error Overlays not supported -# define XCPTCONTEXT_REGS _REG_OVLY_START +# define XCPTCONTEXT_REGS _REG_OVLY_START #else -# define XCPTCONTEXT_REGS _REG_OVLY_START +# define XCPTCONTEXT_REGS _REG_OVLY_START #endif #define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) diff --git a/arch/xtensa/src/common/xtensa_timer.h b/arch/xtensa/src/common/xtensa_timer.h index f9eadbe9834..db8c527b94e 100644 --- a/arch/xtensa/src/common/xtensa_timer.h +++ b/arch/xtensa/src/common/xtensa_timer.h @@ -39,7 +39,7 @@ #include #include -#include +//#include /* Select timer to use for periodic tick, and determine its interrupt number * and priority. User may specify a timer by defining XT_TIMER_INDEX with -D, diff --git a/arch/xtensa/src/esp32/esp32_irq.c b/arch/xtensa/src/esp32/esp32_irq.c index 2620210f4b7..2fa02c8e931 100644 --- a/arch/xtensa/src/esp32/esp32_irq.c +++ b/arch/xtensa/src/esp32/esp32_irq.c @@ -117,8 +117,6 @@ static int esp32_nmi(int irq, FAR void *context) void xtensa_irq_initialize(void) { - int i; - /* Disable all interrupts */ #warning Missing logic diff --git a/arch/xtensa/src/esp32/esp32_region.c b/arch/xtensa/src/esp32/esp32_region.c index bd3758342d9..1e64aa7e32f 100644 --- a/arch/xtensa/src/esp32/esp32_region.c +++ b/arch/xtensa/src/esp32/esp32_region.c @@ -61,7 +61,7 @@ static inline void xtensa_write_dtlb(uint32_t vpn, unsigned int attr) ( "wdtlb %1, %0\n" "dsync\n" - : : "r" (vpn), "r" (attr)); + : : "r" (vpn), "r" (attr) ); } @@ -71,7 +71,7 @@ static inline void xtensa_write_itlb(unsigned vpn, unsigned int attr) ( "witlb %1, %0\n" "isync\n" - : : "r" (vpn), "r" (attr)); + : : "r" (vpn), "r" (attr) ); } @@ -95,7 +95,9 @@ static inline void xtensa_write_itlb(unsigned vpn, unsigned int attr) void esp32_region_protection(void) { - for (int i = 0; i < NPROTECTED_PAGES; ++i) + int i; + + for (i = 0; i < NPROTECTED_PAGES; ++i) { xtensa_write_dtlb(g_protected_pages[i], 0xf); xtensa_write_itlb(g_protected_pages[i], 0xf); diff --git a/arch/xtensa/src/esp32/esp32_timerisr.c b/arch/xtensa/src/esp32/esp32_timerisr.c index acf3862a977..6ff272d0f4f 100644 --- a/arch/xtensa/src/esp32/esp32_timerisr.c +++ b/arch/xtensa/src/esp32/esp32_timerisr.c @@ -48,6 +48,7 @@ #include #include "clock/clock.h" +#include "xtensa_timer.h" #include "xtensa.h" /**************************************************************************** @@ -106,7 +107,7 @@ static inline uint32_t xtensa_getcompare(void) /* Set the value of the compare register */ -static inline void xtensa_setps(uint32_t compare) +static inline void xtensa_setcompare(uint32_t compare) { __asm__ __volatile__ ( @@ -122,10 +123,10 @@ static inline void xtensa_enable_timer(void) { __asm__ __volatile__ ( - "rsr a2, INTENABLE" - "ori a2, XT_TIMER_INTEN" - "wsr a2, INTENABLE" - : : "a2" + "rsr a2, INTENABLE\n" + "ori a2, XT_TIMER_INTEN\n" + "wsr a2, INTENABLE\n" + : : : "a2" ); } @@ -150,15 +151,17 @@ static inline void xtensa_enable_timer(void) static int esp32_timerisr(int irq, uint32_t *regs) { + uint32_t divisor; uint32_t compare; uint32_t diff; + divisor = g_tick_divisor; do { /* Increment the compare register for the next tick */ compare = xtensa_getcompare(); - xtensa_setcompare(count + g_tick_divisor); + xtensa_setcompare(compare + divisor); /* Process one timer tick */ @@ -168,7 +171,7 @@ static int esp32_timerisr(int irq, uint32_t *regs) * interrupts. */ - diff = xtensa_readcount() - compare; + diff = xtensa_getcount() - compare; } while (diff < divisor);