diff --git a/arch/arm/src/rp2040/hardware/rp2040_adc.h b/arch/arm/src/rp2040/hardware/rp2040_adc.h index f45db264841..694140c41aa 100644 --- a/arch/arm/src/rp2040/hardware/rp2040_adc.h +++ b/arch/arm/src/rp2040/hardware/rp2040_adc.h @@ -73,9 +73,9 @@ /* Register bit definitions *************************************************/ #define RP2040_ADC_CS_RROBIN_SHIFT (16) -#define RP2040_ADC_CS_RROBIN_MASK (0x001fl << RPC2040_ADC_CS_RROBIN_SHIFT) +#define RP2040_ADC_CS_RROBIN_MASK (0x001fl << RP2040_ADC_CS_RROBIN_SHIFT) #define RP2040_ADC_CS_AINSEL_SHIFT (12) -#define RP2040_ADC_CS_AINSEL_MASK (0x0007l << RPC2040_ADC_CS_AINSEL_SHIFT) +#define RP2040_ADC_CS_AINSEL_MASK (0x0007l << RP2040_ADC_CS_AINSEL_SHIFT) #define RP2040_ADC_CS_ERR_STICKY (1 << 10) #define RP2040_ADC_CS_ERR (1 << 9) #define RP2040_ADC_CS_READY (1 << 8) diff --git a/arch/arm/src/rp2040/hardware/rp2040_io_bank0.h b/arch/arm/src/rp2040/hardware/rp2040_io_bank0.h index d5aef0f8b27..42377a21ac7 100644 --- a/arch/arm/src/rp2040/hardware/rp2040_io_bank0.h +++ b/arch/arm/src/rp2040/hardware/rp2040_io_bank0.h @@ -82,29 +82,29 @@ #define RP2040_IO_BANK0_GPIO_STATUS_OUTFROMPERI (1 << 8) /* output signal from selected peripheral, before register override is applied */ #define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT (28) -#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT) -#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT) /* don't invert the interrupt */ -#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT) /* invert the interrupt */ -#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT) /* drive interrupt low */ -#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO0_CTRL_IRQOVER_SHIFT) /* drive interrupt high */ +#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT) +#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT) /* don't invert the interrupt */ +#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT) /* invert the interrupt */ +#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT) /* drive interrupt low */ +#define RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO_CTRL_IRQOVER_SHIFT) /* drive interrupt high */ #define RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT (16) -#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT) -#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT) /* don't invert the peri input */ -#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT) /* invert the peri input */ -#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT) /* drive peri input low */ -#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO0_CTRL_INOVER_SHIFT) /* drive peri input high */ +#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT) +#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT) /* don't invert the peri input */ +#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT) /* invert the peri input */ +#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT) /* drive peri input low */ +#define RP2040_IO_BANK0_GPIO_CTRL_INOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO_CTRL_INOVER_SHIFT) /* drive peri input high */ #define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT (12) -#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT) -#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT) /* drive output enable from peripheral signal selected by funcsel */ -#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT) /* drive output enable from inverse of peripheral signal selected by funcsel */ -#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_DISABLE (0x2 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT) /* disable output */ -#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_ENABLE (0x3 << RP2040_IO_BANK0_GPIO0_CTRL_OEOVER_SHIFT) /* enable output */ +#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT) +#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT) /* drive output enable from peripheral signal selected by funcsel */ +#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT) /* drive output enable from inverse of peripheral signal selected by funcsel */ +#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_DISABLE (0x2 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT) /* disable output */ +#define RP2040_IO_BANK0_GPIO_CTRL_OEOVER_ENABLE (0x3 << RP2040_IO_BANK0_GPIO_CTRL_OEOVER_SHIFT) /* enable output */ #define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT (8) -#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT) -#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT) /* drive output from peripheral signal selected by funcsel */ -#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT) /* drive output from inverse of peripheral signal selected by funcsel */ -#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT) /* drive output low */ -#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO0_CTRL_OUTOVER_SHIFT) /* drive output high */ +#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_MASK (0x03 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT) +#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_NORMAL (0x0 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT) /* drive output from peripheral signal selected by funcsel */ +#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_INVERT (0x1 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT) /* drive output from inverse of peripheral signal selected by funcsel */ +#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_LOW (0x2 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT) /* drive output low */ +#define RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_HIGH (0x3 << RP2040_IO_BANK0_GPIO_CTRL_OUTOVER_SHIFT) /* drive output high */ #define RP2040_IO_BANK0_GPIO_CTRL_FUNCSEL_MASK (0x1f) #define RP2040_IO_BANK0_GPIO_CTRL_FUNCSEL_JTAG (0x0) #define RP2040_IO_BANK0_GPIO_CTRL_FUNCSEL_SPI (0x1)