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Fixes for Tiva TM4C1294NCPDT. From Frank Sautter.

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This commit is contained in:
Gregory Nutt
2015-05-20 18:34:15 -06:00
parent ac2fe431aa
commit bd2bbfe53a
3 changed files with 1279 additions and 1404 deletions
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arch/arm/src/tiva/chip/tm4c_memorymap.h
+1 -9
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@@ -461,9 +461,7 @@
# define TIVA_EPHY_BASE (TIVA_PERIPH2_BASE + 0x54000) /* -0x54fff: EPHY */
/* -0xfffff: Reserved */
#elif defined(CONFIG_ARCH_CHIP_TM4C1294NC)
// FIXME sauttefk
/* Peripheral region 1 */
# define TIVA_WDOG0_BASE (TIVA_PERIPH1_BASE + 0x00000) /* -0x00fff: Watchdog Timer 0 */
# define TIVA_WDOG1_BASE (TIVA_PERIPH1_BASE + 0x01000) /* -0x00fff: Watchdog Timer 1 */
/* -0x03fff: Reserved */
@@ -557,14 +555,8 @@
/* Peripheral region 2 */
/* -0x2ffff: Reserved */
# define TIVA_CCM_BASE (TIVA_PERIPH2_BASE + 0x30000) /* -0x30fff: CRC/Cryptographic Control */
/* -0x33fff: Reserved */
# define TIVA_SHAMD5_BASE (TIVA_PERIPH2_BASE + 0x34000) /* -0x35fff: SHA/MD5 */
# define TIVA_AES_BASE (TIVA_PERIPH2_BASE + 0x36000) /* -0x37fff: AES */
# define TIVA_DES_BASE (TIVA_PERIPH2_BASE + 0x38000) /* -0x39fff: DES */
/* -0x4ffff: Reserved */
# define TIVA_LCD_BASE (TIVA_PERIPH2_BASE + 0x50000) /* -0x50fff: LCD */
/* -0x53fff: Reserved */
# define TIVA_EPHY_BASE (TIVA_PERIPH2_BASE + 0x54000) /* -0x54fff: EPHY */
# define TIVA_EPHY_BASE (TIVA_PERIPH2_BASE + 0x54000) /* -0x54fff: EPHY 0 */
/* -0xfffff: Reserved */
#else
# error "Peripheral base addresses not specified for this Tiva chip"
arch/arm/src/tiva/chip/tm4c_pinmap.h
+1272 -1390
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File diff suppressed because it is too large Load Diff
arch/arm/src/tiva/chip/tm4c_vectors.h
+6 -5
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@@ -216,7 +216,7 @@ VECTOR(tiva_pwm1_gen2, TIVA_IRQ_PWM1_GEN2) /* Vector 152: PWM1 Generator 2 */
VECTOR(tiva_pwm1_gen3, TIVA_IRQ_PWM1_GEN3) /* Vector 153: PWM1 Generator 3 */
VECTOR(tiva_pwm1_fault, TIVA_IRQ_PWM1_FAULT) /* Vector 154: PWM1 Fault */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#elif defined(CONFIG_ARCH_CHIP_TM4C123GH6PMI)
@@ -386,7 +386,7 @@ VECTOR(tiva_pwm1_gen2, TIVA_IRQ_PWM1_GEN2) /* Vector 152: PWM1 Generator 2 */
VECTOR(tiva_pwm1_gen3, TIVA_IRQ_PWM1_GEN3) /* Vector 153: PWM1 Generator 3 */
VECTOR(tiva_pwm1_fault, TIVA_IRQ_PWM1_FAULT) /* Vector 154: PWM1 Fault */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#elif defined(CONFIG_ARCH_CHIP_TM4C129XNC)
@@ -446,7 +446,7 @@ VECTOR(tiva_timer3b, TIVA_IRQ_TIMER3B) /* Vector 52: 16/32-Bit Timer 3 B *
VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */
VECTOR(tiva_can0, TIVA_IRQ_CAN0) /* Vector 54: CAN 0 */
VECTOR(tiva_can1, TIVA_IRQ_CAN1) /* Vector 55: CAN 1 */
VECTOR(tiva_ethcon, TIVA_IRQ_ETHCON) /* Vector 56: Ethernet MAC */
VECTOR(tiva_ethcon, TIVA_IRQ_ETHCON) /* Vector 56: Ethernet MAC */
VECTOR(tiva_hibernate, TIVA_IRQ_HIBERNATE) /* Vector 57: Hibernation Module */
VECTOR(tiva_usb, TIVA_IRQ_USB) /* Vector 58: USB MAC */
VECTOR(tiva_pwm0_gen3, TIVA_IRQ_PWM0_GEN3) /* Vector 59: PWM0 Generator 3 */
@@ -528,7 +528,8 @@ VECTOR(tiva_gpiot, TIVA_IRQ_GPIOT) /* Vector 127: GPIO Port T */
UNUSED(TIVA_RESERVED_128) /* Vector 128: Reserved */
UNUSED(TIVA_RESERVED_129) /* Vector 129: Reserved */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
# endif /* CONFIG_ARMV7M_CMNVECTOR */
#elif defined(CONFIG_ARCH_CHIP_TM4C1294NC)
/* If the common ARMv7-M vector handling is used, then all it needs is the following
@@ -587,7 +588,7 @@ VECTOR(tiva_timer3b, TIVA_IRQ_TIMER3B) /* Vector 52: 16/32-Bit Timer 3 B *
VECTOR(tiva_i2c1, TIVA_IRQ_I2C1) /* Vector 53: I2C 1 */
VECTOR(tiva_can0, TIVA_IRQ_CAN0) /* Vector 54: CAN 0 */
VECTOR(tiva_can1, TIVA_IRQ_CAN1) /* Vector 55: CAN 1 */
VECTOR(tiva_ethcon, TIVA_IRQ_ETHCON) /* Vector 56: Ethernet MAC */
VECTOR(tiva_ethcon, TIVA_IRQ_ETHCON) /* Vector 56: Ethernet MAC */
VECTOR(tiva_hibernate, TIVA_IRQ_HIBERNATE) /* Vector 57: Hibernation Module */
VECTOR(tiva_usb, TIVA_IRQ_USB) /* Vector 58: USB MAC */
VECTOR(tiva_pwm0_gen3, TIVA_IRQ_PWM0_GEN3) /* Vector 59: PWM0 Generator 3 */