diff --git a/arch/risc-v/src/mpfs/Kconfig b/arch/risc-v/src/mpfs/Kconfig
index adee77b0467..934186d65ca 100755
--- a/arch/risc-v/src/mpfs/Kconfig
+++ b/arch/risc-v/src/mpfs/Kconfig
@@ -26,6 +26,12 @@ config MPFS_BOOT_HART
 	---help---
 		The HART number which does the HW initialiization and wakes up the other harts (Default 0, E51 core)
 
+config MPFS_DDR_INIT
+        bool "Initialize DDR"
+        default n
+        ---help---
+                Initializes and performs DDR training on the associated DDR memory.
+
 menu "MPFS Peripheral Support"
 
 # These "hidden" settings determine whether a peripheral option is available
diff --git a/arch/risc-v/src/mpfs/Make.defs b/arch/risc-v/src/mpfs/Make.defs
index 22f017ebb2f..e167745926a 100755
--- a/arch/risc-v/src/mpfs/Make.defs
+++ b/arch/risc-v/src/mpfs/Make.defs
@@ -81,3 +81,7 @@ endif
 ifeq (${CONFIG_MPFS_HAVE_COREPWM},y)
 CHIP_CSRCS += mpfs_corepwm.c
 endif
+
+ifeq (${CONFIG_MPFS_DDR_INIT},y)
+CHIP_CSRCS += mpfs_ddr.c
+endif
diff --git a/arch/risc-v/src/mpfs/mpfs_start.c b/arch/risc-v/src/mpfs/mpfs_start.c
index 487fc398ab4..ce646cb543a 100755
--- a/arch/risc-v/src/mpfs/mpfs_start.c
+++ b/arch/risc-v/src/mpfs/mpfs_start.c
@@ -31,6 +31,7 @@
 #include "chip.h"
 #include "mpfs.h"
 #include "mpfs_clockconfig.h"
+#include "mpfs_ddr.h"
 #include "mpfs_userspace.h"
 #include "riscv_arch.h"
 
@@ -110,6 +111,10 @@ void __mpfs_start(uint32_t mhartid)
   riscv_earlyserialinit();
 #endif
 
+#ifdef CONFIG_MPFS_DDR_INIT
+  mpfs_ddr_init();
+#endif
+
   showprogress('B');
 
   g_serial_ok = true;