diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html index c1db0c7eebb..ce18662b6da 100644 --- a/Documentation/NuttxPortingGuide.html +++ b/Documentation/NuttxPortingGuide.html @@ -12,7 +12,7 @@

NuttX RTOS Porting Guide

-

Last Updated: February 7, 2017

+

Last Updated: May 20, 2017

@@ -178,6 +178,13 @@ 4.11.2 LED Definitions
4.11.3 Common LED interfaces + 4.12 I/O Buffer Management + 5.0 NuttX File System
6.0 NuttX Device Drivers @@ -4172,6 +4179,429 @@ void board_autoled_off(int led); +

4.12 I/O Buffer Management

+ +NuttX supports generic I/O buffer management (IOB) logic. +This logic was originally added to support network I/O buffering, but has been generalized to meet buffering requirements by all device drivers. +At the time of this writing, IOBs are currently used not only be networking but also by logic in drivers/syslog and drivers/wireless. +NOTE that some of the wording in this section still reflects those legacy roots as a part of the networking subsystem. +This objectives of this feature are: + +
    +
  1. + Provide common I/O buffer management logic for all drivers, +
    2. +
  2. + Support I/O buffer allocation from both the tasking and interrupt level contexts. +
    3. +
  3. + Use a fixed amount of pre-allocated memory. +
    4. +
  4. + No costly, non-deterministic dynamic memory allocation. +
    5. +
  5. + When the fixed number of pre-allocated I/O buffers is exhausted, further attempts to allocate memory from tasking logic will cause the task to block and wait until a an I/O buffer to be freed. +
    6. +
  6. + Each I/O buffer should be small, but can be chained together to support buffering of larger thinks such as full size network packets. +
    7. +
  7. + Support throttling logic to prevent lower priority tasks from hogging all available I/O buffering. +
    8. +
+ +

4.12.1 Configuration Options

+ +
+
CONFIG_MM_IOB +
Enables generic I/O buffer support. This setting will build the common I/O buffer (IOB) support library. + +
CONFIG_IOB_NBUFFERS +
Number of pre-allocated I/O buffers. Each packet is represented by a series of small I/O buffers in a chain. This setting determines the number of preallocated I/O buffers available for packet data. + + The default value is setup for network support. The default is 8 buffers if neither TCP read-ahead or TCP write buffering is enabled (neither CONFIG_NET_TCP_WRITE_BUFFERS nor CONFIG_NET_TCP_READAHEAD), 24 if only write buffering is enabled, and 36 if both read-ahead and write buffering are enabled. + +
CONFIG_IOB_BUFSIZE +
Payload size of one I/O buffer. Each packet is represented by a series of small I/O buffers in a chain. This setting determines the data payload each preallocated I/O buffer. The default value is 196 bytes. + +
CONFIG_IOB_NCHAINS +
Number of pre-allocated I/O buffer chain heads. These tiny nodes are used as containers to support queueing of I/O buffer chains. This will limit the number of I/O transactions that can be in-flight at any give time. The default value of zero disables this features. + +
These generic I/O buffer chain containers are not currently used by any logic in NuttX. That is because their other other specialized I/O buffer chain containers that also carry a payload of usage specific information. + + The default value is zero if nether TCP nor UDP read-ahead buffering is enabled (i.e., neither CONFIG_NET_TCP_READAHEAD && !CONFIG_NET_UDP_READAHEAD or eight if either is enabled. + +
CONFIG_IOB_THROTTLE +
I/O buffer throttle value. TCP write buffering and read-ahead buffer use the same pool of free I/O buffers. In order to prevent uncontrolled incoming TCP packets from hogging all of the available, pre-allocated I/O buffers, a throttling value is required. This throttle value assures that I/O buffers will be denied to the read-ahead logic before TCP writes are halted. + + The default 0 if neither TCP write buffering nor TCP reada-ahead buffering is enabled. Otherwise, the default is 8. + +
CONFIG_IOB_DEBUG +
Force I/O buffer debug. This option will force debug output from I/O buffer logic. This is not normally something that would want to do but is convenient if you are debugging the I/O buffer logic and do not want to get overloaded with other un-related debug output. + + NOTE that this selection is not avaiable if DEBUG features are not enabled (CONFIG_DEBUG_FEATURES) with IOBs are being used to syslog buffering logic (CONFIG_SYSLOG_BUFFER). +
+ +

4.12.2 Throttling

+ + +An allocation throttle was added. I/O buffer allocation logic supports a throttle value originally for read-ahead buffering to prevent the read-ahead logic from consuming all available I/O buffers and blocking the write buffering logic. This throttle logic is only needed for networking only if both write buffering and read-ahead buffering are used. Of use of I/O buffering might have other motivations for throttling. + +

4.12.3 Public Types

+ +

+ This structure epresents one I/O buffer. A packet is contained by one or more I/O buffers in a chain. The io_pktlen is only valid for the I/O buffer at the head of the chain. +

+ +
+struct iob_s
+{
+  /* Singly-link list support */
+
+  FAR struct iob_s *io_flink;
+
+  /* Payload */
+
+#if CONFIG_IOB_BUFSIZE < 256
+  uint8_t  io_len;      /* Length of the data in the entry */
+  uint8_t  io_offset;   /* Data begins at this offset */
+#else
+  uint16_t io_len;      /* Length of the data in the entry */
+  uint16_t io_offset;   /* Data begins at this offset */
+#endif
+  uint16_t io_pktlen;   /* Total length of the packet */
+
+  uint8_t  io_data[CONFIG_IOB_BUFSIZE];
+};
+
+ +

+ This container structure supports queuing of I/O buffer chains. This structure is intended only for internal use by the IOB module. +

+ +
+#if CONFIG_IOB_NCHAINS > 0
+struct iob_qentry_s
+{
+  /* Singly-link list support */
+
+  FAR struct iob_qentry_s *qe_flink;
+
+  /* Payload -- Head of the I/O buffer chain */
+
+  FAR struct iob_s *qe_head;
+};
+#endif /* CONFIG_IOB_NCHAINS > 0 */
+
+ +

+ The I/O buffer queue head structure. +

+ +
+#if CONFIG_IOB_NCHAINS > 0
+struct iob_queue_s
+{
+  /* Head of the I/O buffer chain list */
+
+  FAR struct iob_qentry_s *qh_head;
+  FAR struct iob_qentry_s *qh_tail;
+};
+#endif /* CONFIG_IOB_NCHAINS > 0 */
+
+ +

4.12.4 Public Function Prototypes

+ + + +

4.12.4.1 iob_initialize()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+void iob_initialize(void);
+
+ +

Description. + Set up the I/O buffers for normal operations. +

+ +

4.12.4.2 iob_alloc()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+FAR struct iob_s *iob_alloc(bool throttled);
+
+ +

Description. + Allocate an I/O buffer by taking the buffer at the head of the free list. +

+ +

4.12.4.3 iob_tryalloc()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+FAR struct iob_s *iob_tryalloc(bool throttled);
+
+ +

Description. + Try to allocate an I/O buffer by taking the buffer at the head of the free list without waiting for a buffer to become free. +

+ +

4.12.4.4 iob_free()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+FAR struct iob_s *iob_free(FAR struct iob_s *iob);
+
+ +

Description. + Free the I/O buffer at the head of a buffer chain returning it to the free list. The link to the next I/O buffer in the chain is return. +

+ +

4.12.4.5 iob_free_chain()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+void iob_free_chain(FAR struct iob_s *iob);
+
+ +

Description. + Free an entire buffer chain, starting at the beginning of the I/O buffer chain +

+ +

4.12.4.6 iob_add_queue()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+#if CONFIG_IOB_NCHAINS > 0
+int iob_add_queue(FAR struct iob_s *iob, FAR struct iob_queue_s *iobq);
+#endif /* CONFIG_IOB_NCHAINS > 0 */
+
+ +

Description. + Add one I/O buffer chain to the end of a queue. May fail due to lack of resources. +

+ +

4.12.4.7 iob_tryadd_queue()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+#if CONFIG_IOB_NCHAINS > 0
+int iob_tryadd_queue(FAR struct iob_s *iob, FAR struct iob_queue_s *iobq);
+#endif /* CONFIG_IOB_NCHAINS > 0 */
+
+ +

Description. + Add one I/O buffer chain to the end of a queue without waiting for resources to become free. +

+ +

4.12.4.8 iob_remove_queue()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+#if CONFIG_IOB_NCHAINS > 0
+FAR struct iob_s *iob_remove_queue(FAR struct iob_queue_s *iobq);
+#endif /* CONFIG_IOB_NCHAINS > 0 */
+
+ +

Description. + Remove and return one I/O buffer chain from the head of a queue. +

+ +

Returned Value. + Returns a reference to the I/O buffer chain at the head of the queue. +

+ +

4.12.4.9 iob_peek_queue()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+#if CONFIG_IOB_NCHAINS > 0
+FAR struct iob_s *iob_peek_queue(FAR struct iob_queue_s *iobq);
+#endif
+
+ +

Description. + Return a reference to the I/O buffer chain at the head of a queue. This is similar to iob_remove_queue except that the I/O buffer chain is in place at the head of the queue. The I/O buffer chain may safely be modified by the caller but must be removed from the queue before it can be freed. +

+ +

Returned Value. + Returns a reference to the I/O buffer chain at the head of the queue. +

+ +

4.12.4.10 iob_free_queue()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+#if CONFIG_IOB_NCHAINS > 0
+void iob_free_queue(FAR struct iob_queue_s *qhead);
+#endif /* CONFIG_IOB_NCHAINS > 0 */
+
+ +

Description. + Free an entire queue of I/O buffer chains. +

+ +

4.12.4.11 iob_copyin()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+int iob_copyin(FAR struct iob_s *iob, FAR const uint8_t *src,
+               unsigned int len, unsigned int offset, bool throttled);
+
+ +

Description. + Copy data len bytes from a user buffer into the I/O buffer chain, starting at offset, extending the chain as necessary. +

+ +

4.12.4.12 iob_trycopyin()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+int iob_trycopyin(FAR struct iob_s *iob, FAR const uint8_t *src,
+                  unsigned int len, unsigned int offset, bool throttled);
+
+ +

Description. + Copy data len bytes from a user buffer into the I/O buffer chain, starting at offset, extending the chain as necessary BUT without waiting if buffers are not available. +

+ +

4.12.4.13 iob_copyout()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+int iob_copyout(FAR uint8_t *dest, FAR const struct iob_s *iob,
+                unsigned int len, unsigned int offset);
+
+ +

Description. + Copy data len bytes of data into the user buffer starting at offset in the I/O buffer, returning that actual number of bytes copied out. +

+ +

4.12.4.14 iob_clone()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+int iob_clone(FAR struct iob_s *iob1, FAR struct iob_s *iob2, bool throttled);
+
+ +

Description. + Duplicate (and pack) the data in iob1 in iob2. iob2 must be empty. +

+ +

4.12.4.15 iob_concat()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+void iob_concat(FAR struct iob_s *iob1, FAR struct iob_s *iob2);
+
+ +

Description. + Concatenate iob_s chain iob2 to iob1. +

+ +

4.12.4.16 iob_trimhead()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+FAR struct iob_s *iob_trimhead(FAR struct iob_s *iob, unsigned int trimlen);
+
+ +

Description. + Remove bytes from the beginning of an I/O chain. Emptied I/O buffers are freed and, hence, the beginning of the chain may change. +

+ +

4.12.4.17 iob_trimhead_queue()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+#if CONFIG_IOB_NCHAINS > 0
+FAR struct iob_s *iob_trimhead_queue(FAR struct iob_queue_s *qhead,
+                                     unsigned int trimlen);
+#endif
+
+ +

Description. + Remove bytes from the beginning of an I/O chain at the head of the queue. Emptied I/O buffers are freed and, hence, the head of the queue may change. +

+

+ This function is just a wrapper around iob_trimhead() that assures that the iob at the head of queue is modified with the trimming operations. +

+ +

Returned Value. + The new iob at the head of the queue is returned. +

+ +

4.12.4.18 iob_trimtail()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+FAR struct iob_s *iob_trimtail(FAR struct iob_s *iob, unsigned int trimlen);
+
+ +

Description. + Remove bytes from the end of an I/O chain. Emptied I/O buffers are freed NULL will be returned in the special case where the entry I/O buffer chain is freed. +

+ +

4.12.4.19 iob_pack()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+FAR struct iob_s *iob_pack(FAR struct iob_s *iob);
+
+ +

Description. + Pack all data in the I/O buffer chain so that the data offset is zero and all but the final buffer in the chain are filled. Any emptied buffers at the end of the chain are freed. +

+ +

4.12.4.20 iob_contig()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+int iob_contig(FAR struct iob_s *iob, unsigned int len);
+
+ +

Description. + Ensure that there is len bytes of contiguous space at the beginning of the I/O buffer chain starting at iob. +

+ +

4.12.4.21 iob_dump()

+

Function Prototype: +

+#include <nuttx/mm/iob.h>
+#ifdef CONFIG_DEBUG_FEATURES
+void iob_dump(FAR const char *msg, FAR struct iob_s *iob, unsigned int len,
+              unsigned int offset);
+#endif
+
+ +

Description. + Dump the contents of a I/O buffer chain +

+
diff --git a/TODO b/TODO index 25e5127b8d4..3d3755b679a 100644 --- a/TODO +++ b/TODO @@ -1,4 +1,4 @@ -NuttX TODO List (Last updated April 15, 2017) +NuttX TODO List (Last updated May 18, 2017) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This file summarizes known NuttX bugs, limitations, inconsistencies with @@ -25,7 +25,7 @@ nuttx/: (12) Libraries (libc/, libm/) (10) File system/Generic drivers (fs/, drivers/) (9) Graphics Subsystem (graphics/) - (2) Build system / Toolchains + (3) Build system / Toolchains (3) Linux/Cywgin simulation (arch/sim) (4) ARM (arch/arm/) @@ -1825,6 +1825,43 @@ o Build system Priority: Low, since I am not aware of anyone using the Windows Native build. But, of course, very high if you want to use it. + Title: CONTROL-C CAN BREAK DEPENDENCIES + Description: If you control C out of a make, then there are things that can go + wrong. For one, you can break the dependencies in this scenario: + + - The build in a given directory begins with all of the compilations. + On terminal, this the long phase with CC: on each line. As each + .o file is created, it is timestamped with the current time. + + - The dependencies on each .o are such that the C file will be re- + compile if the .o file is OLDER that the corresponding .a archive + file. + + - The compilation phase is followed by a single, relatively short + AR: phase that adds each of the file to the .a archive file. As + each file is added to archive, the timestamp of the of archive is + updated to the current time. After the first .o file has been + added, then archive file will have a newly timestamp than any of + the newly compiled .o file. + + - If the user aborts with control-C during this AR: phase, then we + are left with: (1) not all of the files have bee added to the + archive, and (2) the archive file has a newer timestamp than any + of the .o file. + + So when the make is restarted after a control, the dependencies will + see that the .a archive file has the newer time stamp and those .o + file will never be added to the archive until the directory is cleaned + or some other dependency changes. + Status Open + Priority: Medium-High. It is a rare event that control-C happens at just the + point in time. However, when it does occur the resulting code may + have binary incompatiblies in the code taken from the out-of-sync + archives and cost a lot of debug time before you realize the issue. + + A work-around is to do 'make clean' if you ever decide to control-C + out of a make. + o Other drivers (drivers/) ^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/arch/Kconfig b/arch/Kconfig index 5ed2d5dcea3..a621f6f1635 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -124,6 +124,10 @@ source arch/xtensa/Kconfig source arch/z16/Kconfig source arch/z80/Kconfig +config ARCH_TOOLCHAIN_IAR + bool + default n + config ARCH_TOOLCHAIN_GNU bool default n diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8eb1159947f..54f254ff683 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -456,15 +456,6 @@ config ARCH_CHIP default "tms570" if ARCH_CHIP_TMS570 default "xmc4" if ARCH_CHIP_XMC4 -config ARM_TOOLCHAIN_IAR - bool - default n - -config ARM_TOOLCHAIN_GNU - bool - default n - select ARCH_TOOLCHAIN_GNU - config ARMV7M_USEBASEPRI bool "Use BASEPRI Register" default n diff --git a/arch/arm/src/Makefile b/arch/arm/src/Makefile index e505b956da5..9cdf5898fe0 100644 --- a/arch/arm/src/Makefile +++ b/arch/arm/src/Makefile @@ -172,10 +172,10 @@ VPATH += chip VPATH += common VPATH += $(ARCH_SUBDIR) -ifeq ($(CONFIG_ARM_TOOLCHAIN_IAR),y) +ifeq ($(CONFIG_ARCH_TOOLCHAIN_IAR),y) VPATH += chip$(DELIM)iar VPATH += $(ARCH_SUBDIR)$(DELIM)iar -else # ifeq ($(CONFIG_ARM_TOOLCHAIN_GNU),y) +else # ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y) VPATH += chip$(DELIM)gnu VPATH += $(ARCH_SUBDIR)$(DELIM)gnu endif diff --git a/arch/arm/src/armv6-m/Kconfig b/arch/arm/src/armv6-m/Kconfig index cd1f9216dc3..4a22655a050 100644 --- a/arch/arm/src/armv6-m/Kconfig +++ b/arch/arm/src/armv6-m/Kconfig @@ -13,41 +13,41 @@ choice config ARMV6M_TOOLCHAIN_ATOLLIC bool "Atollic Lite/Pro for Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV6M_TOOLCHAIN_BUILDROOT bool "Buildroot (Cygwin or Linux)" depends on !WINDOWS_NATIVE - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV6M_TOOLCHAIN_CODEREDL bool "CodeRed for Linux" depends on HOST_LINUX - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV6M_TOOLCHAIN_CODEREDW bool "CodeRed for Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV6M_TOOLCHAIN_CODESOURCERYL bool "CodeSourcery GNU toolchain under Linux" depends on HOST_LINUX - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV6M_TOOLCHAIN_CODESOURCERYW bool "CodeSourcery GNU toolchain under Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV6M_TOOLCHAIN_DEVKITARM bool "devkitARM GNU toolchain" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV6M_TOOLCHAIN_GNU_EABIL bool "Generic GNU EABI toolchain under Linux (or other POSIX environment)" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU ---help--- This option should work for any modern GNU toolchain (GCC 4.5 or newer) configured for arm-none-eabi. @@ -55,7 +55,7 @@ config ARMV6M_TOOLCHAIN_GNU_EABIL config ARMV6M_TOOLCHAIN_GNU_EABIW bool "Generic GNU EABI toolchain under Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU ---help--- This option should work for any modern GNU toolchain (GCC 4.5 or newer) configured for arm-none-eabi. diff --git a/arch/arm/src/armv7-a/Kconfig b/arch/arm/src/armv7-a/Kconfig index e4746900a3f..a8dc919e353 100644 --- a/arch/arm/src/armv7-a/Kconfig +++ b/arch/arm/src/armv7-a/Kconfig @@ -133,12 +133,12 @@ choice config ARMV7A_TOOLCHAIN_BUILDROOT bool "Buildroot (Cygwin or Linux)" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on !WINDOWS_NATIVE config ARMV7A_TOOLCHAIN_CODESOURCERYL bool "CodeSourcery GNU toolchain under Linux" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on HOST_LINUX ---help--- For use with the GNU toolchain built with the NuttX buildroot package. @@ -147,24 +147,24 @@ config ARMV7A_TOOLCHAIN_CODESOURCERYL config ARMV7A_TOOLCHAIN_CODESOURCERYW bool "CodeSourcery GNU toolchain under Windows" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on TOOLCHAIN_WINDOWS config ARMV7A_TOOLCHAIN_DEVKITARM bool "devkitARM GNU toolchain" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on TOOLCHAIN_WINDOWS config ARMV7A_TOOLCHAIN_GNU_EABIL bool "Generic GNU EABI toolchain under Linux (or other POSIX environment)" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU ---help--- This option should work for any modern GNU toolchain (GCC 4.5 or newer) configured for arm-none-eabi-. config ARMV7A_TOOLCHAIN_GNU_EABIW bool "Generic GNU EABI toolchain under Windows" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on TOOLCHAIN_WINDOWS ---help--- This option should work for any modern GNU toolchain (GCC 4.5 or newer) @@ -172,7 +172,7 @@ config ARMV7A_TOOLCHAIN_GNU_EABIW config ARMV7A_TOOLCHAIN_GNU_OABI bool "Generic GNU OABI toolchain" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU ---help--- This option should work for any GNU toolchain configured for arm-elf-. diff --git a/arch/arm/src/armv7-m/Kconfig b/arch/arm/src/armv7-m/Kconfig index 4c66b55d54d..381725e0060 100644 --- a/arch/arm/src/armv7-m/Kconfig +++ b/arch/arm/src/armv7-m/Kconfig @@ -54,52 +54,52 @@ choice config ARMV7M_TOOLCHAIN_IARW bool "IAR for Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_IAR + select ARCH_TOOLCHAIN_IAR config ARMV7M_TOOLCHAIN_IARL bool "IAR for Linux" depends on HOST_LINUX - select ARM_TOOLCHAIN_IAR + select ARCH_TOOLCHAIN_IAR config ARMV7M_TOOLCHAIN_ATOLLIC bool "Atollic Lite/Pro for Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV7M_TOOLCHAIN_BUILDROOT bool "Buildroot (Cygwin or Linux)" depends on !WINDOWS_NATIVE - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV7M_TOOLCHAIN_CODEREDL bool "CodeRed for Linux" depends on HOST_LINUX - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV7M_TOOLCHAIN_CODEREDW bool "CodeRed for Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV7M_TOOLCHAIN_CODESOURCERYL bool "CodeSourcery GNU toolchain under Linux" depends on HOST_LINUX - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV7M_TOOLCHAIN_CODESOURCERYW bool "CodeSourcery GNU toolchain under Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV7M_TOOLCHAIN_DEVKITARM bool "devkitARM GNU toolchain" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU config ARMV7M_TOOLCHAIN_GNU_EABIL bool "Generic GNU EABI toolchain under Linux (or other POSIX environment)" depends on !WINDOWS_NATIVE - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU ---help--- This option should work for any modern GNU toolchain (GCC 4.5 or newer) configured for arm-none-eabi. @@ -107,7 +107,7 @@ config ARMV7M_TOOLCHAIN_GNU_EABIL config ARMV7M_TOOLCHAIN_GNU_EABIW bool "Generic GNU EABI toolchain under Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU ---help--- This option should work for any modern GNU toolchain (GCC 4.5 or newer) configured for arm-none-eabi. @@ -115,7 +115,7 @@ config ARMV7M_TOOLCHAIN_GNU_EABIW config ARMV7M_TOOLCHAIN_RAISONANCE bool "STMicro Raisonance for Windows" depends on TOOLCHAIN_WINDOWS - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU endchoice diff --git a/arch/arm/src/armv7-r/Kconfig b/arch/arm/src/armv7-r/Kconfig index b4ec974db03..f5ce353584a 100644 --- a/arch/arm/src/armv7-r/Kconfig +++ b/arch/arm/src/armv7-r/Kconfig @@ -149,12 +149,12 @@ choice config ARMV7R_TOOLCHAIN_BUILDROOT bool "Buildroot (Cygwin or Linux)" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on !WINDOWS_NATIVE config ARMV7R_TOOLCHAIN_CODESOURCERYL bool "CodeSourcery GNU toolchain under Linux" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on HOST_LINUX ---help--- For use with the GNU toolchain built with the NuttX buildroot package. @@ -163,24 +163,24 @@ config ARMV7R_TOOLCHAIN_CODESOURCERYL config ARMV7R_TOOLCHAIN_CODESOURCERYW bool "CodeSourcery GNU toolchain under Windows" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on TOOLCHAIN_WINDOWS config ARMV7R_TOOLCHAIN_DEVKITARM bool "devkitARM GNU toolchain" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on TOOLCHAIN_WINDOWS config ARMV7R_TOOLCHAIN_GNU_EABIL bool "Generic GNU EABI toolchain under Linux (or other POSIX environment)" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU ---help--- This option should work for any modern GNU toolchain (GCC 4.5 or newer) configured for arm-none-eabi-. config ARMV7R_TOOLCHAIN_GNU_EABIW bool "Generic GNU EABI toolchain under Windows" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU depends on TOOLCHAIN_WINDOWS ---help--- This option should work for any modern GNU toolchain (GCC 4.5 or newer) @@ -188,7 +188,7 @@ config ARMV7R_TOOLCHAIN_GNU_EABIW config ARMV7R_TOOLCHAIN_GNU_OABI bool "Generic GNU OABI toolchain" - select ARM_TOOLCHAIN_GNU + select ARCH_TOOLCHAIN_GNU ---help--- This option should work for any GNU toolchain configured for arm-elf-. diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 647bbee4c1e..ba6bdb4b790 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -1530,6 +1530,7 @@ config STM32_STM32F40XX select STM32_HAVE_TIM4 select STM32_HAVE_SPI2 select STM32_HAVE_SPI3 + select STM32_HAVE_I2S3 select STM32_HAVE_I2C2 select STM32_HAVE_I2C3 @@ -1542,6 +1543,9 @@ config STM32_STM32F401 select STM32_HAVE_TIM9 select STM32_HAVE_TIM10 select STM32_HAVE_TIM11 + select STM32_HAVE_SPI2 + select STM32_HAVE_SPI3 + select STM32_HAVE_I2S3 config STM32_STM32F410 bool @@ -1563,6 +1567,9 @@ config STM32_STM32F411 select STM32_HAVE_TIM9 select STM32_HAVE_TIM10 select STM32_HAVE_TIM11 + select STM32_HAVE_SPI2 + select STM32_HAVE_SPI3 + select STM32_HAVE_I2S3 select STM32_HAVE_SPI4 select STM32_HAVE_SPI5 @@ -1655,6 +1662,9 @@ config STM32_STM32F427 select STM32_HAVE_DAC2 select STM32_HAVE_RNG select STM32_HAVE_ETHMAC + select STM32_HAVE_SPI2 + select STM32_HAVE_SPI3 + select STM32_HAVE_I2S3 select STM32_HAVE_SPI4 select STM32_HAVE_SPI5 select STM32_HAVE_SPI6 @@ -1691,6 +1701,9 @@ config STM32_STM32F429 select STM32_HAVE_DAC2 select STM32_HAVE_RNG select STM32_HAVE_ETHMAC + select STM32_HAVE_SPI2 + select STM32_HAVE_SPI3 + select STM32_HAVE_I2S3 select STM32_HAVE_SPI4 select STM32_HAVE_SPI5 select STM32_HAVE_SPI6 @@ -2016,6 +2029,10 @@ config STM32_HAVE_SPI3 bool default n +config STM32_HAVE_I2S3 + bool + default n + config STM32_HAVE_SPI4 bool default n @@ -2353,6 +2370,13 @@ config STM32_SPI3 select SPI select STM32_SPI +config STM32_I2S3 + bool "I2S3" + default n + depends on STM32_HAVE_I2S3 + select I2S + select STM32_I2S + config STM32_SPI4 bool "SPI4" default n @@ -2610,6 +2634,11 @@ config STM32_SPI3_REMAP default n depends on STM32_STM32F10XX && STM32_SPI3 && !STM32_VALUELINE +config STM32_I2S3_REMAP + bool "I2S3 Alternate Pin Mapping" + default n + depends on STM32_STM32F10XX && STM32_I2S3 && !STM32_VALUELINE + choice prompt "TIM1 Alternate Pin Mappings" depends on STM32_STM32F10XX && STM32_TIM1 @@ -6270,6 +6299,66 @@ config STM32_SPI_DMA endmenu +menu "I2S Configuration" + depends on STM32_I2S3 + +config STM32_I2S_MCK + bool "I2S_MCK" + default n + ---help--- + TBD. + +config STM32_I2S_MAXINFLIGHT + int "I2S queue size" + default 16 + ---help--- + This is the total number of transfers, both RX and TX, that can be + enqueue before the caller is required to wait. This setting + determines the number certain queue data structures that will be + pre-allocated. + +comment "I2S3 Configuration" + +config STM32_I2S3_DATALEN + int "Data width (bits)" + default 16 + ---help--- + Data width in bits. This is a default value and may be change + via the I2S interface + +#if STM32_I2S +config STM32_I2S3_RX + bool "Enable I2C receiver" + default n + ---help--- + Enable I2S receipt logic + +config STM32_I2S3_TX + bool "Enable I2C transmitter" + default n + ---help--- + Enable I2S transmission logic + +config STM32_I2S_DMADEBUG + bool "I2S DMA transfer debug" + depends on DEBUG_DMA + default n + ---help--- + Enable special debug instrumentation analyze I2S DMA data transfers. + This logic is as non-invasive as possible: It samples DMA + registers at key points in the data transfer and then dumps all of + the registers at the end of the transfer. + +config STM32_I2S_REGDEBUG + bool "SSC Register level debug" + depends on DEBUG + default n + ---help--- + Output detailed register-level SSC device debug information. + Very invasive! Requires also DEBUG. + +endmenu # I2S Configuration + menu "I2C Configuration" depends on STM32_I2C diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs index 3429ba88a4f..07e31f73290 100644 --- a/arch/arm/src/stm32/Make.defs +++ b/arch/arm/src/stm32/Make.defs @@ -101,7 +101,7 @@ CHIP_ASRCS = CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c CHIP_CSRCS += stm32_irq.c stm32_dma.c stm32_lowputc.c -CHIP_CSRCS += stm32_serial.c stm32_spi.c stm32_sdio.c stm32_tim.c +CHIP_CSRCS += stm32_serial.c stm32_spi.c stm32_i2s.c stm32_sdio.c stm32_tim.c CHIP_CSRCS += stm32_waste.c stm32_ccm.c stm32_uid.c stm32_capture.c ifeq ($(CONFIG_TIMER),y) diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h index d44c664edbf..1f7b5944ead 100644 --- a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h +++ b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h @@ -615,7 +615,7 @@ #endif #define GPIO_SPI3_MISO_1 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4) -#define GPIO_SPI3_MISO_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN11) +#define GPIO_SPI3_MISO_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN7) #define GPIO_SPI3_MOSI_1 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5) #define GPIO_SPI3_MOSI_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN12) #define GPIO_SPI3_NSS_1 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15) diff --git a/arch/arm/src/stm32/stm32_can.c b/arch/arm/src/stm32/stm32_can.c index 4497dd97662..9e23a48f36a 100644 --- a/arch/arm/src/stm32/stm32_can.c +++ b/arch/arm/src/stm32/stm32_can.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_can.c * - * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016-2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved. @@ -74,10 +74,6 @@ #define INAK_TIMEOUT 65535 -/* Mailboxes ****************************************************************/ - -#define CAN_ALL_MAILBOXES (CAN_TSR_TME0 | CAN_TSR_TME1 | CAN_TSR_TME2) - /* Bit timing ***************************************************************/ #define CAN_BIT_QUANTA (CONFIG_CAN_TSEG1 + CONFIG_CAN_TSEG2 + 1) @@ -172,6 +168,12 @@ static int stm32can_bittiming(FAR struct stm32_can_s *priv); static int stm32can_cellinit(FAR struct stm32_can_s *priv); static int stm32can_filterinit(FAR struct stm32_can_s *priv); +/* TX mailbox status */ + +static bool stm32can_txmb0empty(uint32_t tsr_regval); +static bool stm32can_txmb1empty(uint32_t tsr_regval); +static bool stm32can_txmb2empty(uint32_t tsr_regval); + /**************************************************************************** * Private Data ****************************************************************************/ @@ -1170,15 +1172,15 @@ static int stm32can_send(FAR struct can_dev_s *dev, /* Select one empty transmit mailbox */ regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET); - if ((regval & CAN_TSR_TME0) != 0 && (regval & CAN_TSR_RQCP0) == 0) + if (stm32can_txmb0empty(regval)) { txmb = 0; } - else if ((regval & CAN_TSR_TME1) != 0 && (regval & CAN_TSR_RQCP1) == 0) + else if (stm32can_txmb1empty(regval)) { txmb = 1; } - else if ((regval & CAN_TSR_TME2) != 0 && (regval & CAN_TSR_RQCP2) == 0) + else if (stm32can_txmb2empty(regval)) { txmb = 2; } @@ -1321,7 +1323,8 @@ static bool stm32can_txready(FAR struct can_dev_s *dev) regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET); caninfo("CAN%d TSR: %08x\n", priv->port, regval); - return (regval & CAN_ALL_MAILBOXES) != 0; + return stm32can_txmb0empty(regval) || stm32can_txmb1empty(regval) || + stm32can_txmb2empty(regval); } /**************************************************************************** @@ -1352,7 +1355,8 @@ static bool stm32can_txempty(FAR struct can_dev_s *dev) regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET); caninfo("CAN%d TSR: %08x\n", priv->port, regval); - return (regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES; + return stm32can_txmb0empty(regval) && stm32can_txmb1empty(regval) && + stm32can_txmb2empty(regval); } /**************************************************************************** @@ -1553,14 +1557,9 @@ static int stm32can_txinterrupt(int irq, FAR void *context, FAR void *arg) stm32can_putreg(priv, STM32_CAN_TSR_OFFSET, CAN_TSR_RQCP0); - /* Check for errors */ + /* Tell the upper half that the transfer is finished. */ - if ((regval & CAN_TSR_TXOK0) != 0) - { - /* Tell the upper half that the tansfer is finished. */ - - (void)can_txdone(dev); - } + (void)can_txdone(dev); } /* Check for RQCP1: Request completed mailbox 1 */ @@ -1573,14 +1572,9 @@ static int stm32can_txinterrupt(int irq, FAR void *context, FAR void *arg) stm32can_putreg(priv, STM32_CAN_TSR_OFFSET, CAN_TSR_RQCP1); - /* Check for errors */ + /* Tell the upper half that the transfer is finished. */ - if ((regval & CAN_TSR_TXOK1) != 0) - { - /* Tell the upper half that the tansfer is finished. */ - - (void)can_txdone(dev); - } + (void)can_txdone(dev); } /* Check for RQCP2: Request completed mailbox 2 */ @@ -1593,14 +1587,9 @@ static int stm32can_txinterrupt(int irq, FAR void *context, FAR void *arg) stm32can_putreg(priv, STM32_CAN_TSR_OFFSET, CAN_TSR_RQCP2); - /* Check for errors */ + /* Tell the upper half that the transfer is finished. */ - if ((regval & CAN_TSR_TXOK2) != 0) - { - /* Tell the upper half that the tansfer is finished. */ - - (void)can_txdone(dev); - } + (void)can_txdone(dev); } return OK; @@ -2111,6 +2100,57 @@ static int stm32can_delstdfilter(FAR struct stm32_can_s *priv, int arg) return -ENOTTY; } +/**************************************************************************** + * Name: stm32can_txmb0empty + * + * Input Parameter: + * tsr_regval - value of CAN transmit status register + * + * Returned Value: + * Returns true if mailbox 0 is empty and can be used for sending. + * + ****************************************************************************/ + +static bool stm32can_txmb0empty(uint32_t tsr_regval) +{ + return (tsr_regval & CAN_TSR_TME0) != 0 && + (tsr_regval & CAN_TSR_RQCP0) == 0; +} + +/**************************************************************************** + * Name: stm32can_txmb1empty + * + * Input Parameter: + * tsr_regval - value of CAN transmit status register + * + * Returned Value: + * Returns true if mailbox 1 is empty and can be used for sending. + * + ****************************************************************************/ + +static bool stm32can_txmb1empty(uint32_t tsr_regval) +{ + return (tsr_regval & CAN_TSR_TME1) != 0 && + (tsr_regval & CAN_TSR_RQCP1) == 0; +} + +/**************************************************************************** + * Name: stm32can_txmb2empty + * + * Input Parameter: + * tsr_regval - value of CAN transmit status register + * + * Returned Value: + * Returns true if mailbox 2 is empty and can be used for sending. + * + ****************************************************************************/ + +static bool stm32can_txmb2empty(uint32_t tsr_regval) +{ + return (tsr_regval & CAN_TSR_TME2) != 0 && + (tsr_regval & CAN_TSR_RQCP2) == 0; +} + /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c index 2b02b5e3455..77493cd880c 100644 --- a/arch/arm/src/stm32/stm32_eth.c +++ b/arch/arm/src/stm32/stm32_eth.c @@ -54,6 +54,7 @@ #include #include #include +#include #include #include #include @@ -189,6 +190,42 @@ # endif #endif +/* These definitions are used to enable the PHY interrupts */ + +#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) +# if defined( CONFIG_ETH0_PHY_AM79C874) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_KS8721) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_KSZ8041) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_KSZ8051) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_KSZ8061) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_KSZ8081) +# define MII_INT_REG MII_KSZ8081_INT +# define MII_INT_SETEN MII_KSZ80x1_INT_LDEN | MII_KSZ80x1_INT_LUEN +# define MII_INT_CLREN 0 +# elif defined( CONFIG_ETH0_PHY_KSZ90x1) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_DP83848C) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_LAN8720) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_LAN8740) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_LAN8740A) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_LAN8742A) +# error missing logic +# elif defined( CONFIG_ETH0_PHY_DM9161) +# error missing logic +# else +# error unknown PHY +# endif +#endif + #ifdef CONFIG_STM32_ETH_PTP # warning "CONFIG_STM32_ETH_PTP is not yet supported" #endif @@ -2889,8 +2926,19 @@ static int stm32_ioctl(struct net_driver_s *dev, int cmd, unsigned long arg) #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) static int stm32_phyintenable(struct stm32_ethmac_s *priv) { -#warning Missing logic - return -ENOSYS; + uint16_t phyval; + int ret; + + ret = stm32_phyread(CONFIG_STM32_PHYADDR, MII_INT_REG, &phyval); + if (ret == OK) + { + /* Enable link up/down interrupts */ + + ret = stm32_phywrite(CONFIG_STM32_PHYADDR, MII_INT_REG, + (phyval & ~MII_INT_CLREN) | MII_INT_SETEN); + } + + return ret; } #endif diff --git a/arch/arm/src/stm32/stm32_i2s.c b/arch/arm/src/stm32/stm32_i2s.c new file mode 100644 index 00000000000..0f246f57634 --- /dev/null +++ b/arch/arm/src/stm32/stm32_i2s.c @@ -0,0 +1,2658 @@ +/**************************************************************************** + * arm/arm/src/stm32/stm32_i2s.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Taras Drozdovskiy + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * up_spiinitialize()) are provided by common STM32 logic. To use this + * common SPI logic on your board: + * + * 1. Provide logic in stm32_boardinitialize() to configure I2S chip select + * pins. + * 2. Provide stm32_i2s2/3select() and stm32_i2s2/3status() functions in your + * board-specific logic. These functions will perform chip selection and + * status operations using GPIOs in the way your board is configured. + * 3. Add a calls to up_spiinitialize() in your low level application + * initialization logic + * 4. The handle returned by stm32_i2sdev_initialize() may then be used to + * bind the I2S driver to higher level logic + * + ****************************************************c***********************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +#include +#include +#include +#include +#include +#include + +#include "up_internal.h" +#include "up_arch.h" + +#if defined(CONFIG_STM32_I2S2) || defined(CONFIG_STM32_I2S3) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_SCHED_WORKQUEUE +# error Work queue support is required (CONFIG_SCHED_WORKQUEUE) +#endif + +#ifndef CONFIG_AUDIO +# error CONFIG_AUDIO required by this driver +#endif + +#ifndef CONFIG_STM32_I2S_MAXINFLIGHT +# define CONFIG_STM32_I2S_MAXINFLIGHT 16 +#endif + +/* Assume no RX/TX support until we learn better */ + +#undef I2S_HAVE_RX +#undef I2S_HAVE_TX + +/* Check for I2S RX support */ + +# if defined(CONFIG_STM32_I2S3_RX) +# define I2S_HAVE_RX 1 + +# ifdef CONFIG_STM32_I2S_MCK +# define I2S_HAVE_MCK 1 +# endif + +# endif + +/* Check for I2S3 TX support */ + +# if defined(CONFIG_STM32_I2S3_TX) +# define I2S_HAVE_TX 1 + +# ifdef CONFIG_STM32_I2S_MCK +# define I2S_HAVE_MCK 1 +# endif + +# endif + +/* Configuration ********************************************************************/ +/* I2S interrupts */ + +#ifdef CONFIG_STM32_SPI_INTERRUPTS +# error "Interrupt driven I2S not yet supported" +#endif + +/* Can't have both interrupt driven SPI and SPI DMA */ + +#if defined(CONFIG_STM32_SPI_INTERRUPTS) && defined(CONFIG_STM32_SPI_DMA) +# error "Cannot enable both interrupt mode and DMA mode for SPI" +#endif + +/* SPI DMA priority */ + +#ifdef CONFIG_STM32_SPI_DMA + +# if defined(CONFIG_SPI_DMAPRIO) +# define SPI_DMA_PRIO CONFIG_SPI_DMAPRIO +# elif defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32L15XX) +# define SPI_DMA_PRIO DMA_CCR_PRIMED +# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +# define SPI_DMA_PRIO DMA_SCR_PRIMED +# else +# error "Unknown STM32 DMA" +# endif + +# if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32L15XX) +# if (SPI_DMA_PRIO & ~DMA_CCR_PL_MASK) != 0 +# error "Illegal value for CONFIG_SPI_DMAPRIO" +# endif +# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +# if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0 +# error "Illegal value for CONFIG_SPI_DMAPRIO" +# endif +# else +# error "Unknown STM32 DMA" +# endif + +#endif + +/* DMA channel configuration */ + +#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \ + defined(CONFIG_STM32_STM32L15XX) +# define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC ) +# define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC ) +# define SPI_RXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS ) +# define SPI_RXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS ) +# define SPI_TXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC|DMA_CCR_DIR) +# define SPI_TXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC|DMA_CCR_DIR) +# define SPI_TXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS |DMA_CCR_DIR) +# define SPI_TXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_DIR) +#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +# define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_16BITS|DMA_SCR_PSIZE_16BITS|DMA_SCR_MINC|DMA_SCR_DIR_P2M) +# define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_MINC|DMA_SCR_DIR_P2M) +# define SPI_RXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_16BITS |DMA_SCR_DIR_P2M) +# define SPI_RXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_DIR_P2M) +# define SPI_TXDMA16_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_16BITS|DMA_SCR_PSIZE_16BITS|DMA_SCR_MINC|DMA_SCR_DIR_M2P) +# define SPI_TXDMA8_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_MINC|DMA_SCR_DIR_M2P) +# define SPI_TXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_16BITS |DMA_SCR_DIR_M2P) +# define SPI_TXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_DIR_M2P) +#else +# error "Unknown STM32 DMA" +#endif + +/* Debug *******************************************************************/ +/* Check if SSC debug is enabled (non-standard.. no support in + * include/debug.h + */ + +#ifndef CONFIG_DEBUG_I2S_INFO +# undef CONFIG_STM32_I2S_DMADEBUG +# undef CONFIG_STM32_I2S_REGDEBUG +# undef CONFIG_STM32_I2S_QDEBUG +# undef CONFIG_STM32_I2S_DUMPBUFFERS +#endif + +/* The I2S can handle most any bit width from 8 to 32. However, the DMA + * logic here is constrained to byte, half-word, and word sizes. + */ + +#ifndef CONFIG_STM32_I2S3_DATALEN +# define CONFIG_STM32_I2S3_DATALEN 16 +#endif + +#if CONFIG_STM32_I2S3_DATALEN == 8 +# define STM32_I2S3_DATAMASK 0 +#elif CONFIG_STM32_I2S3_DATALEN == 16 +# define STM32_I2S3_DATAMASK 1 +#elif CONFIG_STM32_I2S3_DATALEN < 8 || CONFIG_STM32_I2S3_DATALEN > 16 +# error Invalid value for CONFIG_STM32_I2S3_DATALEN +#else +# error Valid but supported value for CONFIG_STM32_I2S3_DATALEN +#endif + +/* Check if we need to build RX and/or TX support */ + +#if defined(I2S_HAVE_RX) || defined(I2S_HAVE_TX) + +#ifndef CONFIG_DEBUG_DMA +# undef CONFIG_STM32_I2S_DMADEBUG +#endif + +#define DMA_INITIAL 0 +#define DMA_AFTER_SETUP 1 +#define DMA_AFTER_START 2 +#define DMA_CALLBACK 3 +#define DMA_TIMEOUT 3 +#define DMA_END_TRANSFER 4 +#define DMA_NSAMPLES 5 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* I2S buffer container */ + +struct stm32_buffer_s +{ + struct stm32_buffer_s *flink; /* Supports a singly linked list */ + i2s_callback_t callback; /* Function to call when the transfer completes */ + uint32_t timeout; /* The timeout value to use with DMA transfers */ + void *arg; /* The argument to be returned with the callback */ + struct ap_buffer_s *apb; /* The audio buffer */ + int result; /* The result of the transfer */ +}; + +/* This structure describes the state of one receiver or transmitter transport */ + +struct stm32_transport_s +{ + DMA_HANDLE dma; /* I2S DMA handle */ + WDOG_ID dog; /* Watchdog that handles DMA timeouts */ + sq_queue_t pend; /* A queue of pending transfers */ + sq_queue_t act; /* A queue of active transfers */ + sq_queue_t done; /* A queue of completed transfers */ + struct work_s work; /* Supports worker thread operations */ + +#ifdef CONFIG_STM32_I2S_DMADEBUG + struct stm32_dmaregs_s dmaregs[DMA_NSAMPLES]; +#endif +}; + +/* The state of the one I2S peripheral */ + +struct stm32_i2s_s +{ + struct i2s_dev_s dev; /* Externally visible I2S interface */ + uintptr_t base; /* I2S controller register base address */ + sem_t exclsem; /* Assures mutually exclusive acess to I2S */ + uint8_t datalen; /* Data width (8 or 16) */ +#ifdef CONFIG_DEBUG_FEATURES + uint8_t align; /* Log2 of data width (0 or 1) */ +#endif + uint8_t rxenab:1; /* True: RX transfers enabled */ + uint8_t txenab:1; /* True: TX transfers enabled */ + uint8_t i2sno:6; /* I2S controller number (0 or 1) */ +#ifdef I2S_HAVE_MCK + uint32_t samplerate; /* Data sample rate (determines only MCK divider) */ +#endif + uint32_t rxccr; /* DMA control register for RX transfers */ + uint32_t txccr; /* DMA control register for TX transfers */ +#ifdef I2S_HAVE_RX + struct stm32_transport_s rx; /* RX transport state */ +#endif +#ifdef I2S_HAVE_TX + struct stm32_transport_s tx; /* TX transport state */ +#endif + + /* Pre-allocated pool of buffer containers */ + + sem_t bufsem; /* Buffer wait semaphore */ + struct stm32_buffer_s *freelist; /* A list a free buffer containers */ + struct stm32_buffer_s containers[CONFIG_STM32_I2S_MAXINFLIGHT]; + + /* Debug stuff */ + +#ifdef CONFIG_STM32_I2S_REGDEBUG + bool wr; /* Last was a write */ + uint32_t regaddr; /* Last address */ + uint16_t regval; /* Last value */ + int count; /* Number of times */ +#endif /* CONFIG_STM32_I2S_REGDEBUG */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Register helpers */ + +#ifdef CONFIG_STM32_I2S_REGDEBUG +static bool i2s_checkreg(struct stm32_i2s_s *priv, bool wr, uint16_t regval, + uint32_t regaddr); +#else +# define i2s_checkreg(priv,wr,regval,regaddr) (false) +#endif + +static inline uint16_t i2s_getreg(struct stm32_i2s_s *priv, uint8_t offset); +static inline void i2s_putreg(struct stm32_i2s_s *priv, uint8_t offset, + uint16_t regval); + +#if defined(CONFIG_DEBUG_I2S_INFO) +static void i2s_dump_regs(struct stm32_i2s_s *priv, const char *msg); +#else +# define i2s_dump_regs(s,m) +#endif + +#ifdef CONFIG_STM32_I2S_DUMPBUFFERS +# define i2s_init_buffer(b,s) memset(b, 0x55, s); +# define i2s_dump_buffer(m,b,s) lib_dumpbuffer(m,b,s) +#else +# define i2s_init_buffer(b,s) +# define i2s_dump_buffer(m,b,s) +#endif + +/* Semaphore helpers */ + +static void i2s_exclsem_take(struct stm32_i2s_s *priv); +#define i2s_exclsem_give(priv) sem_post(&priv->exclsem) + +static void i2s_bufsem_take(struct stm32_i2s_s *priv); +#define i2s_bufsem_give(priv) sem_post(&priv->bufsem) + +/* Buffer container helpers */ + +static struct stm32_buffer_s * + i2s_buf_allocate(struct stm32_i2s_s *priv); +static void i2s_buf_free(struct stm32_i2s_s *priv, + struct stm32_buffer_s *bfcontainer); +static void i2s_buf_initialize(struct stm32_i2s_s *priv); + +/* DMA support */ + +#ifdef CONFIG_STM32_I2S_DMADEBUG +static void i2s_dma_sampleinit(struct stm32_i2s_s *priv, + struct stm32_transport_s *xpt); +#endif + +#if defined(CONFIG_STM32_I2S_DMADEBUG) && defined(I2S_HAVE_RX) +# define i2s_rxdma_sample(s,i) stm32_dmasample((s)->rx.dma, &(s)->rx.dmaregs[i]) +# define i2s_rxdma_sampleinit(s) i2s_dma_sampleinit(s, &(s)->rx) +static void i2s_rxdma_sampledone(struct stm32_i2s_s *priv, int result); + +#else +# define i2s_rxdma_sample(s,i) +# define i2s_rxdma_sampleinit(s) +# define i2s_rxdma_sampledone(s,r) + +#endif + +#if defined(CONFIG_STM32_I2S_DMADEBUG) && defined(I2S_HAVE_TX) +# define i2s_txdma_sample(s,i) stm32_dmasample((s)->tx.dma, &(s)->tx.dmaregs[i]) +# define i2s_txdma_sampleinit(s) i2s_dma_sampleinit(s, &(s)->tx) +static void i2s_txdma_sampledone(struct stm32_i2s_s *priv, int result); + +#else +# define i2s_txdma_sample(s,i) +# define i2s_txdma_sampleinit(s) +# define i2s_txdma_sampledone(s,r) + +#endif + +#ifdef I2S_HAVE_RX +static void i2s_rxdma_timeout(int argc, uint32_t arg); +static int i2s_rxdma_setup(struct stm32_i2s_s *priv); +static void i2s_rx_worker(void *arg); +static void i2s_rx_schedule(struct stm32_i2s_s *priv, int result); +static void i2s_rxdma_callback(DMA_HANDLE handle, uint8_t result, void *arg); +#endif +#ifdef I2S_HAVE_TX +static void i2s_txdma_timeout(int argc, uint32_t arg); +static int i2s_txdma_setup(struct stm32_i2s_s *priv); +static void i2s_tx_worker(void *arg); +static void i2s_tx_schedule(struct stm32_i2s_s *priv, int result); +static void i2s_txdma_callback(DMA_HANDLE handle, uint8_t result, void *arg); +#endif + +/* I2S methods (and close friends) */ + +static int i2s_checkwidth(struct stm32_i2s_s *priv, int bits); + +static uint32_t stm32_i2s_rxsamplerate(struct i2s_dev_s *dev, uint32_t rate); +static uint32_t stm32_i2s_rxdatawidth(struct i2s_dev_s *dev, int bits); +static int stm32_i2s_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, + i2s_callback_t callback, void *arg, uint32_t timeout); +static uint32_t stm32_i2s_txsamplerate(struct i2s_dev_s *dev, uint32_t rate); +static uint32_t stm32_i2s_txdatawidth(struct i2s_dev_s *dev, int bits); +static int stm32_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, + i2s_callback_t callback, void *arg, + uint32_t timeout); + +/* Initialization */ + +static uint32_t i2s_mckdivider(struct stm32_i2s_s *priv); +static int i2s_dma_flags(struct stm32_i2s_s *priv); +static int i2s_dma_allocate(struct stm32_i2s_s *priv); +static void i2s_dma_free(struct stm32_i2s_s *priv); +#ifdef CONFIG_STM32_I2S2 +static void i2s2_configure(struct stm32_i2s_s *priv); +#endif +#ifdef CONFIG_STM32_I2S3 +static void i2s3_configure(struct stm32_i2s_s *priv); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* I2S device operations */ + +static const struct i2s_ops_s g_i2sops = +{ + /* Receiver methods */ + + .i2s_rxsamplerate = stm32_i2s_rxsamplerate, + .i2s_rxdatawidth = stm32_i2s_rxdatawidth, + .i2s_receive = stm32_i2s_receive, + + /* Transmitter methods */ + + .i2s_txsamplerate = stm32_i2s_txsamplerate, + .i2s_txdatawidth = stm32_i2s_txdatawidth, + .i2s_send = stm32_i2s_send, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: i2s_checkreg + * + * Description: + * Check if the current register access is a duplicate of the preceding. + * + * Input Parameters: + * regval - The value to be written + * regaddr - The address of the register to write to + * + * Returned Value: + * true: This is the first register access of this type. + * flase: This is the same as the preceding register access. + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_I2S_REGDEBUG +static bool i2s_checkreg(struct stm32_i2s_s *priv, bool wr, uint16_t regval, + uint32_t regaddr) +{ + if (wr == priv->wr && /* Same kind of access? */ + regval == priv->regval && /* Same value? */ + regaddr == priv->regaddr) /* Same address? */ + { + /* Yes, then just keep a count of the number of times we did this. */ + + priv->count++; + return false; + } + else + { + /* Did we do the previous operation more than once? */ + + if (priv->count > 0) + { + /* Yes... show how many times we did it */ + + i2sinfo("...[Repeats %d times]...\n", priv->count); + } + + /* Save information about the new access */ + + priv->wr = wr; + priv->regval = regval; + priv->regaddr = regaddr; + priv->count = 0; + } + + /* Return true if this is the first time that we have done this operation */ + + return true; +} +#endif + +/**************************************************************************** + * Name: i2s_getreg + * + * Description: + * Get the contents of the I2S register at offset + * + * Input Parameters: + * priv - private I2S device structure + * offset - offset to the register of interest + * + * Returned Value: + * The contents of the 16-bit register + * + ****************************************************************************/ + +static inline uint16_t i2s_getreg(FAR struct stm32_i2s_s *priv, + uint8_t offset) +{ + uint32_t regaddr = priv->base + offset; + uint16_t regval = getreg16(regaddr); + +#ifdef CONFIG_STM32_I2S_REGDEBUG + if (i2s_checkreg(priv, false, regval, regaddr)) + { + i2sinfo("%08x->%04x\n", regaddr, regval); + } +#endif + + return regval; +} + +/**************************************************************************** + * Name: spi_putreg + * + * Description: + * Write a 16-bit value to the SPI register at offset + * + * Input Parameters: + * priv - private SPI device structure + * offset - offset to the register of interest + * value - the 16-bit value to be written + * + * Returned Value: + * The contents of the 16-bit register + * + ****************************************************************************/ + +static inline void i2s_putreg(FAR struct stm32_i2s_s *priv, uint8_t offset, + uint16_t regval) +{ + uint32_t regaddr = priv->base + offset; + +#ifdef CONFIG_STM32_I2S_REGDEBUG + if (i2s_checkreg(priv, true, regval, regaddr)) + { + i2sinfo("%08x<-%04x\n", regaddr, regval); + } +#endif + + putreg16(regval, regaddr); +} + +/**************************************************************************** + * Name: i2s_dump_regs + * + * Description: + * Dump the contents of all I2S registers + * + * Input Parameters: + * priv - The I2S controller to dump + * msg - Message to print before the register data + * + * Returned Value: + * None + * + ****************************************************************************/ + +#if defined(CONFIG_DEBUG_I2S) +static void i2s_dump_regs(struct stm32_i2s_s *priv, const char *msg) +{ + i2sinfo("I2S%d: %s\n", priv->i2sno, msg); + i2sinfo(" CR1:%04x CR2:%04x SR:%04x DR:%04x\n", + i2s_getreg(priv, STM32_SPI_CR1_OFFSET), + i2s_getreg(priv, STM32_SPI_CR2_OFFSET), + i2s_getreg(priv, STM32_SPI_SR_OFFSET), + i2s_getreg(priv, STM32_SPI_DR_OFFSET)); + i2sinfo(" I2SCFGR:%04x I2SPR:%04x\n", + i2s_getreg(priv, STM32_SPI_I2SCFGR_OFFSET), + i2s_getreg(priv, STM32_SPI_I2SPR_OFFSET)); +} +#endif + +/**************************************************************************** + * Name: i2s_exclsem_take + * + * Description: + * Take the exclusive access semaphore handling any exceptional conditions + * + * Input Parameters: + * priv - A reference to the i2s peripheral state + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void i2s_exclsem_take(struct stm32_i2s_s *priv) +{ + int ret; + + /* Wait until we successfully get the semaphore. EINTR is the only + * expected 'failure' (meaning that the wait for the semaphore was + * interrupted by a signal. + */ + + do + { + ret = sem_wait(&priv->exclsem); + DEBUGASSERT(ret == 0 || errno == EINTR); + } + while (ret < 0); +} + +/**************************************************************************** + * Name: i2s_bufsem_take + * + * Description: + * Take the buffer semaphore handling any exceptional conditions + * + * Input Parameters: + * priv - A reference to the i2s peripheral state + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void i2s_bufsem_take(struct stm32_i2s_s *priv) +{ + int ret; + + /* Wait until we successfully get the semaphore. EINTR is the only + * expected 'failure' (meaning that the wait for the semaphore was + * interrupted by a signal. + */ + + do + { + ret = sem_wait(&priv->bufsem); + DEBUGASSERT(ret == 0 || errno == EINTR); + } + while (ret < 0); +} + +/**************************************************************************** + * Name: i2s_buf_allocate + * + * Description: + * Allocate a buffer container by removing the one at the head of the + * free list + * + * Input Parameters: + * priv - I2S state instance + * + * Returned Value: + * A non-NULL pointer to the allocate buffer container on success; NULL if + * there are no available buffer containers. + * + * Assumptions: + * The caller does NOT have exclusive access to the I2S state structure. + * That would result in a deadlock! + * + ****************************************************************************/ + +static struct stm32_buffer_s *i2s_buf_allocate(struct stm32_i2s_s *priv) +{ + struct stm32_buffer_s *bfcontainer; + irqstate_t flags; + + /* Set aside a buffer container. By doing this, we guarantee that we will + * have at least one free buffer container. + */ + + i2s_bufsem_take(priv); + + /* Get the buffer from the head of the free list */ + + flags = enter_critical_section(); + bfcontainer = priv->freelist; + ASSERT(bfcontainer); + + /* Unlink the buffer from the freelist */ + + priv->freelist = bfcontainer->flink; + leave_critical_section(flags); + return bfcontainer; +} + +/**************************************************************************** + * Name: i2s_buf_free + * + * Description: + * Free buffer container by adding it to the head of the free list + * + * Input Parameters: + * priv - I2S state instance + * bfcontainer - The buffer container to be freed + * + * Returned Value: + * None + * + * Assumptions: + * The caller has exclusive access to the I2S state structure + * + ****************************************************************************/ + +static void i2s_buf_free(struct stm32_i2s_s *priv, struct stm32_buffer_s *bfcontainer) +{ + irqstate_t flags; + + /* Put the buffer container back on the free list */ + + flags = enter_critical_section(); + bfcontainer->flink = priv->freelist; + priv->freelist = bfcontainer; + leave_critical_section(flags); + + /* Wake up any threads waiting for a buffer container */ + + i2s_bufsem_give(priv); +} + +/**************************************************************************** + * Name: i2s_buf_initialize + * + * Description: + * Initialize the buffer container allocator by adding all of the + * pre-allocated buffer containers to the free list + * + * Input Parameters: + * priv - I2S state instance + * + * Returned Value: + * None + * + * Assumptions: + * Called early in I2S initialization so that there are no issues with + * concurrency. + * + ****************************************************************************/ + +static void i2s_buf_initialize(struct stm32_i2s_s *priv) +{ + int i; + + priv->freelist = NULL; + sem_init(&priv->bufsem, 0, CONFIG_STM32_I2S_MAXINFLIGHT); + + for (i = 0; i < CONFIG_STM32_I2S_MAXINFLIGHT; i++) + { + i2s_buf_free(priv, &priv->containers[i]); + } +} + +/**************************************************************************** + * Name: i2s_dma_sampleinit + * + * Description: + * Initialize sampling of DMA registers (if CONFIG_STM32_I2S_DMADEBUG) + * + * Input Parameters: + * priv - I2S state instance + * + * Returned Value: + * None + * + ****************************************************************************/ + +#if defined(CONFIG_STM32_I2S_DMADEBUG) +static void i2s_dma_sampleinit(struct stm32_i2s_s *priv, + struct stm32_transport_s *xpt) +{ + /* Put contents of register samples into a known state */ + + memset(xpt->dmaregs, 0xff, DMA_NSAMPLES * sizeof(struct stm32_dmaregs_s)); + + /* Then get the initial samples */ + + stm32_dmasample(xpt->dma, &xpt->dmaregs[DMA_INITIAL]); +} +#endif + +/**************************************************************************** + * Name: i2s_rxdma_sampledone + * + * Description: + * Dump sampled RX DMA registers + * + * Input Parameters: + * priv - I2S state instance + * + * Returned Value: + * None + * + ****************************************************************************/ + +#if defined(CONFIG_STM32_I2S_DMADEBUG) && defined(I2S_HAVE_RX) +static void i2s_rxdma_sampledone(struct stm32_i2s_s *priv, int result) +{ + i2sinfo("result: %d\n", result); + + /* Sample the final registers */ + + stm32_dmasample(priv->rx.dma, &priv->rx.dmaregs[DMA_END_TRANSFER]); + + /* Then dump the sampled DMA registers */ + /* Initial register values */ + + stm32_dmadump(priv->rx.dma, &priv->rx.dmaregs[DMA_INITIAL], + "RX: Initial Registers"); + + /* Register values after DMA setup */ + + stm32_dmadump(priv->rx.dma, &priv->rx.dmaregs[DMA_AFTER_SETUP], + "RX: After DMA Setup"); + + /* Register values after DMA start */ + + stm32_dmadump(priv->rx.dma, &priv->rx.dmaregs[DMA_AFTER_START], + "RX: After DMA Start"); + + /* Register values at the time of the TX and RX DMA callbacks + * -OR- DMA timeout. + * + * If the DMA timedout, then there will not be any RX DMA + * callback samples. There is probably no TX DMA callback + * samples either, but we don't know for sure. + */ + + if (result == -ETIMEDOUT || result == -EINTR) + { + stm32_dmadump(priv->rx.dma, &priv->rx.dmaregs[DMA_TIMEOUT], + "RX: At DMA timeout"); + } + else + { + stm32_dmadump(priv->rx.dma, &priv->rx.dmaregs[DMA_CALLBACK], + "RX: At DMA callback"); + } + + stm32_dmadump(priv->rx.dma, &priv->rx.dmaregs[DMA_END_TRANSFER], + "RX: At End-of-Transfer"); + + i2s_dump_regs(priv, "RX: At End-of-Transfer"); +} +#endif + +/**************************************************************************** + * Name: i2s_txdma_sampledone + * + * Description: + * Dump sampled DMA registers + * + * Input Parameters: + * priv - I2S state instance + * + * Returned Value: + * None + * + ****************************************************************************/ + +#if defined(CONFIG_STM32_I2S_DMADEBUG) && defined(I2S_HAVE_TX) +static void i2s_txdma_sampledone(struct stm32_i2s_s *priv, int result) +{ + i2sinfo("result: %d\n", result); + + /* Sample the final registers */ + + stm32_dmasample(priv->tx.dma, &priv->tx.dmaregs[DMA_END_TRANSFER]); + + /* Then dump the sampled DMA registers */ + /* Initial register values */ + + stm32_dmadump(priv->tx.dma, &priv->tx.dmaregs[DMA_INITIAL], + "TX: Initial Registers"); + + /* Register values after DMA setup */ + + stm32_dmadump(priv->tx.dma, &priv->tx.dmaregs[DMA_AFTER_SETUP], + "TX: After DMA Setup"); + + /* Register values after DMA start */ + + stm32_dmadump(priv->tx.dma, &priv->tx.dmaregs[DMA_AFTER_START], + "TX: After DMA Start"); + + /* Register values at the time of the TX and RX DMA callbacks + * -OR- DMA timeout. + */ + + if (result == -ETIMEDOUT || result == -EINTR) + { + stm32_dmadump(priv->tx.dma, &priv->tx.dmaregs[DMA_TIMEOUT], + "TX: At DMA timeout"); + } + else + { + stm32_dmadump(priv->tx.dma, &priv->tx.dmaregs[DMA_CALLBACK], + "TX: At DMA callback"); + } + + stm32_dmadump(priv->tx.dma, &priv->tx.dmaregs[DMA_END_TRANSFER], + "TX: At End-of-Transfer"); + + i2s_dump_regs(priv, "TX: At End-of-Transfer"); +} +#endif + +/**************************************************************************** + * Name: i2s_rxdma_timeout + * + * Description: + * The RX watchdog timeout without completion of the RX DMA. + * + * Input Parameters: + * argc - The number of arguments (should be 1) + * arg - The argument (state structure reference cast to uint32_t) + * + * Returned Value: + * None + * + * Assumptions: + * Always called from the interrupt level with interrupts disabled. + * + ****************************************************************************/ + +#ifdef I2S_HAVE_RX +static void i2s_rxdma_timeout(int argc, uint32_t arg) +{ + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)arg; + DEBUGASSERT(priv != NULL); + + /* Sample DMA registers at the time of the timeout */ + + i2s_rxdma_sample(priv, DMA_TIMEOUT); + + /* Cancel the DMA */ + + stm32_dmastop(priv->rx.dma); + + /* Then schedule completion of the transfer to occur on the worker thread. + * NOTE: stm32_dmastop() will call the DMA complete callback with an error + * of -EINTR. So the following is just insurance and should have no + * effect if the worker is already schedule. + */ + + i2s_rx_schedule(priv, -ETIMEDOUT); +} +#endif + +/**************************************************************************** + * Name: i2s_rxdma_setup + * + * Description: + * Setup and initiate the next RX DMA transfer + * + * Input Parameters: + * priv - I2S state instance + * + * Returned Value: + * OK on success; a negated errno value on failure + * + * Assumptions: + * Interrupts are disabled + * + ****************************************************************************/ + +#ifdef I2S_HAVE_RX +static int i2s_rxdma_setup(struct stm32_i2s_s *priv) +{ + struct stm32_buffer_s *bfcontainer; + struct ap_buffer_s *apb; + uintptr_t samp; + uint32_t timeout; + bool notimeout; + int ret; + + /* If there is already an active transmission in progress, then bail + * returning success. + */ + + if (!sq_empty(&priv->rx.act)) + { + return OK; + } + + /* If there are no pending transfer, then bail returning success */ + + if (sq_empty(&priv->rx.pend)) + { + return OK; + } + + /* Initialize DMA register sampling */ + + i2s_rxdma_sampleinit(priv); + + /* Loop, adding each pending DMA */ + + timeout = 0; + notimeout = false; + + do + { + /* Remove the pending RX transfer at the head of the RX pending queue. */ + + bfcontainer = (struct stm32_buffer_s *)sq_remfirst(&priv->rx.pend); + DEBUGASSERT(bfcontainer && bfcontainer->apb); + + apb = bfcontainer->apb; + DEBUGASSERT(((uintptr_t)apb->samp % priv->align) == 0); + + /* No data received yet */ + + apb->nbytes = 0; + apb->curbyte = 0; + samp = (uintptr_t)&apb->samp[apb->curbyte]; + + /* Configure the RX DMA */ + + stm32_dmasetup(priv->rx.dma, priv->base + STM32_SPI_DR_OFFSET, + (uint32_t)samp, apb->nmaxbytes, priv->rxccr); + + /* Increment the DMA timeout */ + + if (bfcontainer->timeout > 0) + { + timeout += bfcontainer->timeout; + } + else + { + notimeout = true; + } + + /* Add the container to the list of active DMAs */ + + sq_addlast((sq_entry_t *)bfcontainer, &priv->rx.act); + } +#if 1 /* REVISIT: Chained RX transfers */ + while (0); +#else + while (!sq_empty(&priv->rx.pend)); +#endif + + /* Sample DMA registers */ + + i2s_rxdma_sample(priv, DMA_AFTER_SETUP); + + /* Start the DMA, saving the container as the current active transfer */ + + stm32_dmastart(priv->rx.dma, i2s_rxdma_callback, priv, false); + + i2s_rxdma_sample(priv, DMA_AFTER_START); + + /* Enable the receiver */ + + i2s_putreg(priv, STM32_SPI_CR2_OFFSET, + i2s_getreg(priv, STM32_SPI_CR2_OFFSET) | SPI_CR2_RXDMAEN); + + /* Start a watchdog to catch DMA timeouts */ + + if (!notimeout) + { + ret = wd_start(priv->rx.dog, timeout, (wdentry_t)i2s_rxdma_timeout, + 1, (uint32_t)priv); + + /* Check if we have successfully started the watchdog timer. Note + * that we do nothing in the case of failure to start the timer. We + * are already committed to the DMA anyway. Let's just hope that the + * DMA does not hang. + */ + + if (ret < 0) + { + i2serr("ERROR: wd_start failed: %d\n", errno); + } + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: i2s_rx_worker + * + * Description: + * RX transfer done worker + * + * Input Parameters: + * arg - the I2S device instance cast to void* + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef I2S_HAVE_RX +static void i2s_rx_worker(void *arg) +{ + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)arg; + struct stm32_buffer_s *bfcontainer; + struct ap_buffer_s *apb; + irqstate_t flags; + + DEBUGASSERT(priv); + + /* When the transfer was started, the active buffer containers were removed + * from the rx.pend queue and saved in the rx.act queue. We get here when the + * DMA is finished... either successfully, with a DMA error, or with a DMA + * timeout. + * + * In any case, the buffer containers in rx.act will be moved to the end + * of the rx.done queue and rx.act queue will be emptied before this worker + * is started. + * + * REVISIT: Normal DMA callback processing should restart the DMA + * immediately to avoid audio artifacts at the boundaries between DMA + * transfers. Unfortunately, the DMA callback occurs at the interrupt + * level and we cannot call dma_rxsetup() from the interrupt level. + * So we have to start the next DMA here. + */ + + i2sinfo("rx.act.head=%p rx.done.head=%p\n", + priv->rx.act.head, priv->rx.done.head); + + /* Check if the DMA is IDLE */ + + if (sq_empty(&priv->rx.act)) + { +#ifdef CONFIG_STM32_I2S_DMADEBUG + bfcontainer = (struct stm32_buffer_s *)sq_peek(&priv->rx.done); + if (bfcontainer) + { + /* Dump the DMA registers */ + + i2s_rxdma_sampledone(priv, bfcontainer->result); + } +#endif + + /* Then start the next DMA. This must be done with interrupts + * disabled. + */ + + flags = enter_critical_section(); + (void)i2s_rxdma_setup(priv); + leave_critical_section(flags); + } + + /* Process each buffer in the rx.done queue */ + + while (sq_peek(&priv->rx.done) != NULL) + { + /* Remove the buffer container from the rx.done queue. NOTE that + * interrupts must be enabled to do this because the rx.done queue is + * also modified from the interrupt level. + */ + + flags = enter_critical_section(); + bfcontainer = (struct stm32_buffer_s *)sq_remfirst(&priv->rx.done); + leave_critical_section(flags); + + DEBUGASSERT(bfcontainer && bfcontainer->apb && bfcontainer->callback); + apb = bfcontainer->apb; + + /* If the DMA was successful, then update the number of valid bytes in + * the audio buffer. + */ + + if (bfcontainer->result == OK) + { + apb->nbytes = apb->nmaxbytes; + } + + i2s_dump_buffer("Received", apb->samp, apb->nbytes); + + /* Perform the RX transfer done callback */ + + bfcontainer->callback(&priv->dev, apb, bfcontainer->arg, + bfcontainer->result); + + /* Release our reference on the audio buffer. This may very likely + * cause the audio buffer to be freed. + */ + + apb_free(apb); + + /* And release the buffer container */ + + i2s_buf_free(priv, bfcontainer); + } +} +#endif + +/**************************************************************************** + * Name: i2s_rx_schedule + * + * Description: + * An RX DMA completion or timeout has occurred. Schedule processing on + * the working thread. + * + * Input Parameters: + * handle - The DMA handler + * arg - A pointer to the chip select struction + * result - The result of the DMA transfer + * + * Returned Value: + * None + * + * Assumptions: + * Interrupts are disabled + * + ****************************************************************************/ + +#ifdef I2S_HAVE_RX +static void i2s_rx_schedule(struct stm32_i2s_s *priv, int result) +{ + struct stm32_buffer_s *bfcontainer; + int ret; + + /* Upon entry, the transfer(s) that just completed are the ones in the + * priv->rx.act queue. NOTE: In certain conditions, this function may + * be called an additional time, hence, we can't assert this to be true. + * For example, in the case of a timeout, this function will be called by + * both indirectly via the stm32_dmastop() logic and directly via the + * i2s_rxdma_timeout() logic. + */ + + /* Move all entries from the rx.act queue to the rx.done queue */ + + while (!sq_empty(&priv->rx.act)) + { + /* Remove the next buffer container from the rx.act list */ + + bfcontainer = (struct stm32_buffer_s *)sq_remfirst(&priv->rx.act); + + /* Report the result of the transfer */ + + bfcontainer->result = result; + + /* Add the completed buffer container to the tail of the rx.done queue */ + + sq_addlast((sq_entry_t *)bfcontainer, &priv->rx.done); + } + + /* If the worker has completed running, then reschedule the working thread. + * REVISIT: There may be a race condition here. So we do nothing is the + * worker is not available. + */ + + if (work_available(&priv->rx.work)) + { + /* Schedule the TX DMA done processing to occur on the worker thread. */ + + ret = work_queue(HPWORK, &priv->rx.work, i2s_rx_worker, priv, 0); + if (ret != 0) + { + i2serr("ERROR: Failed to queue RX work: %d\n", ret); + } + } +} +#endif + +/**************************************************************************** + * Name: i2s_rxdma_callback + * + * Description: + * This callback function is invoked at the completion of the I2S RX DMA. + * + * Input Parameters: + * handle - The DMA handler + * arg - A pointer to the chip select struction + * result - The result of the DMA transfer + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef I2S_HAVE_RX +static void i2s_rxdma_callback(DMA_HANDLE handle, uint8_t result, void *arg) +{ + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)arg; + DEBUGASSERT(priv != NULL); + + /* Cancel the watchdog timeout */ + + (void)wd_cancel(priv->rx.dog); + + /* Sample DMA registers at the time of the DMA completion */ + + i2s_rxdma_sample(priv, DMA_CALLBACK); + + /* REVISIT: We would like to the next DMA started here so that we do not + * get audio glitches at the boundaries between DMA transfers. + * Unfortunately, we cannot call stm32_dmasetup() from an interrupt handler! + */ + + /* Then schedule completion of the transfer to occur on the worker thread */ + + i2s_rx_schedule(priv, result); +} +#endif + +/**************************************************************************** + * Name: i2s_txdma_timeout + * + * Description: + * The RX watchdog timeout without completion of the RX DMA. + * + * Input Parameters: + * argc - The number of arguments (should be 1) + * arg - The argument (state structure reference cast to uint32_t) + * + * Returned Value: + * None + * + * Assumptions: + * Always called from the interrupt level with interrupts disabled. + * + ****************************************************************************/ + +#ifdef I2S_HAVE_TX +static void i2s_txdma_timeout(int argc, uint32_t arg) +{ + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)arg; + DEBUGASSERT(priv != NULL); + + /* Sample DMA registers at the time of the timeout */ + + i2s_txdma_sample(priv, DMA_TIMEOUT); + + /* Cancel the DMA */ + + stm32_dmastop(priv->tx.dma); + + /* Then schedule completion of the transfer to occur on the worker thread. + * NOTE: stm32_dmastop() will call the DMA complete callback with an error + * of -EINTR. So the following is just insurance and should have no + * effect if the worker is already schedule. + */ + + i2s_tx_schedule(priv, -ETIMEDOUT); +} +#endif + +/**************************************************************************** + * Name: i2s_txdma_setup + * + * Description: + * Setup and initiate the next TX DMA transfer + * + * Input Parameters: + * priv - I2S state instance + * + * Returned Value: + * OK on success; a negated errno value on failure + * + * Assumptions: + * Interrupts are disabled + * + ****************************************************************************/ + +#ifdef I2S_HAVE_TX +static int i2s_txdma_setup(struct stm32_i2s_s *priv) +{ + struct stm32_buffer_s *bfcontainer; + struct ap_buffer_s *apb; + uintptr_t samp; + uint32_t timeout; + apb_samp_t nbytes; + bool notimeout; + int ret; + + /* If there is already an active transmission in progress, then bail + * returning success. + */ + + if (!sq_empty(&priv->tx.act)) + { + return OK; + } + + /* If there are no pending transfer, then bail returning success */ + + if (sq_empty(&priv->tx.pend)) + { + return OK; + } + + /* Initialize DMA register sampling */ + + i2s_txdma_sampleinit(priv); + + /* Loop, adding each pending DMA */ + + timeout = 0; + notimeout = false; + + do + { + /* Remove the pending TX transfer at the head of the TX pending queue. */ + + bfcontainer = (struct stm32_buffer_s *)sq_remfirst(&priv->tx.pend); + DEBUGASSERT(bfcontainer && bfcontainer->apb); + + apb = bfcontainer->apb; + + /* Get the transfer information, accounting for any data offset */ + + samp = (uintptr_t)&apb->samp[apb->curbyte]; + nbytes = apb->nbytes - apb->curbyte; + DEBUGASSERT((samp & priv->align) == 0 && (nbytes & priv->align) == 0); + + /* Configure DMA stream */ + + stm32_dmasetup(priv->tx.dma, priv->base + STM32_SPI_DR_OFFSET, + (uint32_t)samp, nbytes/2, priv->txccr); + + /* Increment the DMA timeout */ + if (bfcontainer->timeout > 0) + { + timeout += bfcontainer->timeout; + } + else + { + notimeout = true; + } + + /* Add the container to the list of active DMAs */ + + sq_addlast((sq_entry_t *)bfcontainer, &priv->tx.act); + } +#if 1 /* REVISIT: Chained TX transfers */ + while (0); +#else + while (!sq_empty(&priv->tx.pend)); +#endif + + /* Sample DMA registers */ + + i2s_txdma_sample(priv, DMA_AFTER_SETUP); + + /* Start the DMA, saving the container as the current active transfer */ + + stm32_dmastart(priv->tx.dma, i2s_txdma_callback, priv, true); + + i2s_txdma_sample(priv, DMA_AFTER_START); + + /* Enable the transmitter */ + + i2s_putreg(priv, STM32_SPI_CR2_OFFSET, i2s_getreg(priv, STM32_SPI_CR2_OFFSET) | SPI_CR2_TXDMAEN); + + /* Start a watchdog to catch DMA timeouts */ + + if (!notimeout) + { + ret = wd_start(priv->tx.dog, timeout, (wdentry_t)i2s_txdma_timeout, + 1, (uint32_t)priv); + + /* Check if we have successfully started the watchdog timer. Note + * that we do nothing in the case of failure to start the timer. We + * are already committed to the DMA anyway. Let's just hope that the + * DMA does not hang. + */ + + if (ret < 0) + { + i2serr("ERROR: wd_start failed: %d\n", errno); + } + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: i2s_tx_worker + * + * Description: + * TX transfer done worker + * + * Input Parameters: + * arg - the I2S device instance cast to void* + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef I2S_HAVE_TX +static void i2s_tx_worker(void *arg) +{ + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)arg; + struct stm32_buffer_s *bfcontainer; + irqstate_t flags; + + DEBUGASSERT(priv); + + /* When the transfer was started, the active buffer containers were removed + * from the tx.pend queue and saved in the tx.act queue. We get here when the + * DMA is finished... either successfully, with a DMA error, or with a DMA + * timeout. + * + * In any case, the buffer containers in tx.act will be moved to the end + * of the tx.done queue and tx.act will be emptied before this worker is + * started. + * + * REVISIT: Normal DMA callback processing should restart the DMA + * immediately to avoid audio artifacts at the boundaries between DMA + * transfers. Unfortunately, the DMA callback occurs at the interrupt + * level and we cannot call dma_txsetup() from the interrupt level. + * So we have to start the next DMA here. + */ + + i2sinfo("tx.act.head=%p tx.done.head=%p\n", + priv->tx.act.head, priv->tx.done.head); + + /* Check if the DMA is IDLE */ + + if (sq_empty(&priv->tx.act)) + { +#ifdef CONFIG_STM32_I2S_DMADEBUG + bfcontainer = (struct stm32_buffer_s *)sq_peek(&priv->tx.done); + if (bfcontainer) + { + /* Dump the DMA registers */ + + i2s_txdma_sampledone(priv, bfcontainer->result); + } +#endif + + /* Then start the next DMA. This must be done with interrupts + * disabled. + */ + + flags = enter_critical_section(); + (void)i2s_txdma_setup(priv); + leave_critical_section(flags); + } + + /* Process each buffer in the tx.done queue */ + + while (sq_peek(&priv->tx.done) != NULL) + { + /* Remove the buffer container from the tx.done queue. NOTE that + * interupts must be enabled to do this because the tx.done queue is + * also modified from the interrupt level. + */ + + flags = enter_critical_section(); + bfcontainer = (struct stm32_buffer_s *)sq_remfirst(&priv->tx.done); + leave_critical_section(flags); + + /* Perform the TX transfer done callback */ + + DEBUGASSERT(bfcontainer && bfcontainer->callback); + bfcontainer->callback(&priv->dev, bfcontainer->apb, + bfcontainer->arg, bfcontainer->result); + + /* Release our reference on the audio buffer. This may very likely + * cause the audio buffer to be freed. + */ + + apb_free(bfcontainer->apb); + + /* And release the buffer container */ + + i2s_buf_free(priv, bfcontainer); + } +} +#endif + +/**************************************************************************** + * Name: i2s_tx_schedule + * + * Description: + * An TX DMA completion or timeout has occurred. Schedule processing on + * the working thread. + * + * Input Parameters: + * handle - The DMA handler + * arg - A pointer to the chip select struction + * result - The result of the DMA transfer + * + * Returned Value: + * None + * + * Assumptions: + * - Interrupts are disabled + * - The TX timeout has been canceled. + * + ****************************************************************************/ + +#ifdef I2S_HAVE_TX +static void i2s_tx_schedule(struct stm32_i2s_s *priv, int result) +{ + struct stm32_buffer_s *bfcontainer; + int ret; + + /* Upon entry, the transfer(s) that just completed are the ones in the + * priv->tx.act queue. NOTE: In certain conditions, this function may + * be called an additional time, hence, we can't assert this to be true. + * For example, in the case of a timeout, this function will be called by + * both indirectly via the stm32_dmastop() logic and directly via the + * i2s_txdma_timeout() logic. + */ + + /* Move all entries from the tx.act queue to the tx.done queue */ + + while (!sq_empty(&priv->tx.act)) + { + /* Remove the next buffer container from the tx.act list */ + + bfcontainer = (struct stm32_buffer_s *)sq_remfirst(&priv->tx.act); + + /* Report the result of the transfer */ + + bfcontainer->result = result; + + /* Add the completed buffer container to the tail of the tx.done queue */ + + sq_addlast((sq_entry_t *)bfcontainer, &priv->tx.done); + } + + /* If the worker has completed running, then reschedule the working thread. + * REVISIT: There may be a race condition here. So we do nothing is the + * worker is not available. + */ + + if (work_available(&priv->tx.work)) + { + /* Schedule the TX DMA done processing to occur on the worker thread. */ + + ret = work_queue(HPWORK, &priv->tx.work, i2s_tx_worker, priv, 0); + if (ret != 0) + { + i2serr("ERROR: Failed to queue TX work: %d\n", ret); + } + } +} +#endif + +/**************************************************************************** + * Name: i2s_txdma_callback + * + * Description: + * This callback function is invoked at the completion of the I2S TX DMA. + * + * Input Parameters: + * handle - The DMA handler + * arg - A pointer to the chip select struction + * result - The result of the DMA transfer + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef I2S_HAVE_TX +static void i2s_txdma_callback(DMA_HANDLE handle, uint8_t result, void *arg) +{ + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)arg; + DEBUGASSERT(priv != NULL); + + /* Cancel the watchdog timeout */ + + (void)wd_cancel(priv->tx.dog); + + /* Sample DMA registers at the time of the DMA completion */ + + i2s_txdma_sample(priv, DMA_CALLBACK); + + /* REVISIT: We would like to the next DMA started here so that we do not + * get audio glitches at the boundaries between DMA transfers. + * Unfortunately, we cannot call stm32_dmasetup() from an interrupt handler! + */ + + /* Then schedule completion of the transfer to occur on the worker thread */ + + i2s_tx_schedule(priv, result); +} +#endif + +/**************************************************************************** + * Name: i2s_checkwidth + * + * Description: + * Check for a valid bit width. The I2S is capable of handling most any + * bit width from 8 to 16, but the DMA logic in this driver is constrained + * to 8- and 16-bit data widths + * + * Input Parameters: + * dev - Device-specific state data + * rate - The I2S sample rate in samples (not bits) per second + * + * Returned Value: + * Returns the resulting bitrate + * + ****************************************************************************/ + +static int i2s_checkwidth(struct stm32_i2s_s *priv, int bits) +{ + /* The I2S can handle most any bit width from 8 to 32. However, the DMA + * logic here is constrained to byte, half-word, and word sizes. + */ + + switch (bits) + { + case 8: +#ifdef CONFIG_DEBUG + priv->align = 0; +#endif + break; + + case 16: +#ifdef CONFIG_DEBUG + priv->align = 1; +#endif + break; + + default: + i2serr("ERROR: Unsupported or invalid data width: %d\n", bits); + return (bits < 8 || bits > 16) ? -EINVAL : -ENOSYS; + } + + /* Save the new data width */ + + priv->datalen = bits; + return OK; +} + +/**************************************************************************** + * Name: stm32_i2s_rxsamplerate + * + * Description: + * Set the I2S RX sample rate. NOTE: This will have no effect if (1) the + * driver does not support an I2C receiver or if (2) the sample rate is + * driven by the I2C frame clock. This may also have unexpected side- + * effects of the RX sample is coupled with the TX sample rate. + * + * Input Parameters: + * dev - Device-specific state data + * rate - The I2S sample rate in samples (not bits) per second + * + * Returned Value: + * Returns the resulting bitrate + * + ****************************************************************************/ + +static uint32_t stm32_i2s_rxsamplerate(struct i2s_dev_s *dev, uint32_t rate) +{ +#if defined(I2S_HAVE_RX) && defined(I2S_HAVE_MCK) + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)dev; + DEBUGASSERT(priv && priv->samplerate > 0 && rate > 0); + + /* Check if the receiver is driven by the MCK */ + + if (priv->samplerate != rate) + { + /* Save the new sample rate and update the MCK divider */ + + priv->samplerate = rate; + return i2s_mckdivider(priv); + } +#endif + + return 0; +} + +/**************************************************************************** + * Name: stm32_i2s_rxdatawidth + * + * Description: + * Set the I2S RX data width. The RX bitrate is determined by + * sample_rate * data_width. + * + * Input Parameters: + * dev - Device-specific state data + * width - The I2S data with in bits. + * + * Returned Value: + * Returns the resulting bitrate + * + ****************************************************************************/ + +static uint32_t stm32_i2s_rxdatawidth(struct i2s_dev_s *dev, int bits) +{ +#ifdef I2S_HAVE_RX + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)dev; + int ret; + + DEBUGASSERT(priv && bits > 1); + + /* Check if this is a bit width that we are configured to handle */ + + ret = i2s_checkwidth(priv, bits); + if (ret < 0) + { + i2serr("ERROR: i2s_checkwidth failed: %d\n", ret); + return 0; + } + + /* Update the DMA flags */ + + ret = i2s_dma_flags(priv); + if (ret < 0) + { + i2serr("ERROR: i2s_dma_flags failed: %d\n", ret); + return 0; + } + +#endif + + return 0; +} + +/**************************************************************************** + * Name: stm32_i2s_receive + * + * Description: + * Receive a block of data from I2S. + * + * Input Parameters: + * dev - Device-specific state data + * apb - A pointer to the audio buffer in which to recieve data + * callback - A user provided callback function that will be called at + * the completion of the transfer. The callback will be + * performed in the context of the worker thread. + * arg - An opaque argument that will be provided to the callback + * when the transfer complete + * timeout - The timeout value to use. The transfer will be canceled + * and an ETIMEDOUT error will be reported if this timeout + * elapsed without completion of the DMA transfer. Units + * are system clock ticks. Zero means no timeout. + * + * Returned Value: + * OK on success; a negated errno value on failure. NOTE: This function + * only enqueues the transfer and returns immediately. Success here only + * means that the transfer was enqueued correctly. + * + * When the transfer is complete, a 'result' value will be provided as + * an argument to the callback function that will indicate if the transfer + * failed. + * + ****************************************************************************/ + +static int stm32_i2s_receive(struct i2s_dev_s *dev, struct ap_buffer_s *apb, + i2s_callback_t callback, void *arg, uint32_t timeout) +{ + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)dev; +#ifdef I2S_HAVE_RX + struct stm32_buffer_s *bfcontainer; + irqstate_t flags; + int ret; +#endif + + DEBUGASSERT(priv && apb && ((uintptr_t)apb->samp & priv->align) == 0); + i2sinfo("apb=%p nmaxbytes=%d arg=%p timeout=%d\n", + apb, apb->nmaxbytes, arg, timeout); + + i2s_init_buffer(apb->samp, apb->nmaxbytes); + +#ifdef I2S_HAVE_RX + /* Allocate a buffer container in advance */ + + bfcontainer = i2s_buf_allocate(priv); + DEBUGASSERT(bfcontainer); + + /* Get exclusive access to the I2S driver data */ + + i2s_exclsem_take(priv); + + /* Has the RX channel been enabled? */ + + if (!priv->rxenab) + { + i2serr("ERROR: I2S%d has no receiver\n", priv->i2sno); + ret = -EAGAIN; + goto errout_with_exclsem; + } + + /* Add a reference to the audio buffer */ + + apb_reference(apb); + + /* Initialize the buffer container structure */ + + bfcontainer->callback = (void *)callback; + bfcontainer->timeout = timeout; + bfcontainer->arg = arg; + bfcontainer->apb = apb; + bfcontainer->result = -EBUSY; + + /* Add the buffer container to the end of the RX pending queue */ + + flags = enter_critical_section(); + sq_addlast((sq_entry_t *)bfcontainer, &priv->rx.pend); + + /* Then start the next transfer. If there is already a transfer in progess, + * then this will do nothing. + */ + + ret = i2s_rxdma_setup(priv); + DEBUGASSERT(ret == OK); + leave_critical_section(flags); + i2s_exclsem_give(priv); + return OK; + +errout_with_exclsem: + i2s_exclsem_give(priv); + i2s_buf_free(priv, bfcontainer); + return ret; + +#else + i2serr("ERROR: I2S%d has no receiver\n", priv->i2sno); + UNUSED(priv); + return -ENOSYS; +#endif +} + +static int roundf(float num) +{ + if(((int)(num + 0.5f)) > num) + { + return num + 1; + } + + return num; +} + +/**************************************************************************** + * Name: stm32_i2s_txsamplerate + * + * Description: + * Set the I2S TX sample rate. NOTE: This will have no effect if (1) the + * driver does not support an I2C transmitter or if (2) the sample rate is + * driven by the I2C frame clock. This may also have unexpected side- + * effects of the TX sample is coupled with the RX sample rate. + * + * Input Parameters: + * dev - Device-specific state data + * rate - The I2S sample rate in samples (not bits) per second + * + * Returned Value: + * Returns the resulting bitrate + * + ****************************************************************************/ + +static uint32_t stm32_i2s_txsamplerate(struct i2s_dev_s *dev, uint32_t rate) +{ +#if defined(I2S_HAVE_TX) && defined(I2S_HAVE_MCK) + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)dev; + + DEBUGASSERT(priv && priv->samplerate > 0 && rate > 0); + + /* Check if the receiver is driven by the MCK/2 */ + + if (priv->samplerate != rate) + { + /* Save the new sample rate and update the MCK/2 divider */ + + priv->samplerate = rate; + return i2s_mckdivider(priv); + } +#endif + + return 0; +} + +/**************************************************************************** + * Name: stm32_i2s_txdatawidth + * + * Description: + * Set the I2S TX data width. The TX bitrate is determined by + * sample_rate * data_width. + * + * Input Parameters: + * dev - Device-specific state data + * width - The I2S data with in bits. + * + * Returned Value: + * Returns the resulting bitrate + * + ****************************************************************************/ + +static uint32_t stm32_i2s_txdatawidth(struct i2s_dev_s *dev, int bits) +{ +#ifdef I2S_HAVE_TX + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)dev; + int ret; + + i2sinfo("Data width bits of tx = %d\n",bits); + DEBUGASSERT(priv && bits > 1); + + /* Check if this is a bit width that we are configured to handle */ + + ret = i2s_checkwidth(priv, bits); + if (ret < 0) + { + i2serr("ERROR: i2s_checkwidth failed: %d\n", ret); + return 0; + } + + /* Upate the DMA flags */ + + ret = i2s_dma_flags(priv); + if (ret < 0) + { + i2serr("ERROR: i2s_dma_flags failed: %d\n", ret); + return 0; + } +#endif + + return 0; +} + +/**************************************************************************** + * Name: stm32_i2s_send + * + * Description: + * Send a block of data on I2S. + * + * Input Parameters: + * dev - Device-specific state data + * apb - A pointer to the audio buffer from which to send data + * callback - A user provided callback function that will be called at + * the completion of the transfer. The callback will be + * performed in the context of the worker thread. + * arg - An opaque argument that will be provided to the callback + * when the transfer complete + * timeout - The timeout value to use. The transfer will be canceled + * and an ETIMEDOUT error will be reported if this timeout + * elapsed without completion of the DMA transfer. Units + * are system clock ticks. Zero means no timeout. + * + * Returned Value: + * OK on success; a negated errno value on failure. NOTE: This function + * only enqueues the transfer and returns immediately. Success here only + * means that the transfer was enqueued correctly. + * + * When the transfer is complete, a 'result' value will be provided as + * an argument to the callback function that will indicate if the transfer + * failed. + * + ****************************************************************************/ + +static int stm32_i2s_send(struct i2s_dev_s *dev, struct ap_buffer_s *apb, + i2s_callback_t callback, void *arg, uint32_t timeout) +{ + struct stm32_i2s_s *priv = (struct stm32_i2s_s *)dev; +#ifdef I2S_HAVE_TX + struct stm32_buffer_s *bfcontainer; + irqstate_t flags; + int ret; +#endif + + /* Make sure that we have valid pointers that that the data has uint32_t + * alignment. + */ + + DEBUGASSERT(priv && apb); + i2sinfo("apb=%p nbytes=%d arg=%p timeout=%d\n", + apb, apb->nbytes - apb->curbyte, arg, timeout); + + i2s_dump_buffer("Sending", &apb->samp[apb->curbyte], + apb->nbytes - apb->curbyte); + DEBUGASSERT(((uintptr_t)&apb->samp[apb->curbyte] & priv->align) == 0); + +#ifdef I2S_HAVE_TX + /* Allocate a buffer container in advance */ + + bfcontainer = i2s_buf_allocate(priv); + DEBUGASSERT(bfcontainer); + + /* Get exclusive access to the I2S driver data */ + + i2s_exclsem_take(priv); + + /* Has the TX channel been enabled? */ + + if (!priv->txenab) + { + i2serr("ERROR: I2S%d has no transmitter\n", priv->i2sno); + ret = -EAGAIN; + goto errout_with_exclsem; + } + + /* Add a reference to the audio buffer */ + + apb_reference(apb); + + /* Initialize the buffer container structure */ + + bfcontainer->callback = (void *)callback; + bfcontainer->timeout = timeout; + bfcontainer->arg = arg; + bfcontainer->apb = apb; + bfcontainer->result = -EBUSY; + + /* Add the buffer container to the end of the TX pending queue */ + + flags = enter_critical_section(); + sq_addlast((sq_entry_t *)bfcontainer, &priv->tx.pend); + + /* Then start the next transfer. If there is already a transfer in progess, + * then this will do nothing. + */ + + ret = i2s_txdma_setup(priv); + DEBUGASSERT(ret == OK); + leave_critical_section(flags); + i2s_exclsem_give(priv); + return OK; + +errout_with_exclsem: + i2s_exclsem_give(priv); + i2s_buf_free(priv, bfcontainer); + return ret; + +#else + i2serr("ERROR: I2S%d has no transmitter\n", priv->i2sno); + UNUSED(priv); + return -ENOSYS; +#endif +} + +/**************************************************************************** + * Name: i2s_mckdivider + * + * Description: + * Setup the MCK divider based on the currently selected data width and + * the sample rate + * + * Input Parameter: + * priv - I2C device structure (only the sample rate and data length is + * needed at this point). + * + * Returned Value: + * The current bitrate + * + ****************************************************************************/ + +static uint32_t i2s_mckdivider(struct stm32_i2s_s *priv) +{ +#ifdef I2S_HAVE_MCK + uint32_t bitrate; + uint32_t regval; + + uint16_t pllr = 5, plln = 256, div = 12, odd = 1; + + DEBUGASSERT(priv && priv->samplerate > 0 && priv->datalen > 0); + + /* A zero sample rate means to disable the MCK/2 clock */ + + if (priv->samplerate == 0) + { + bitrate = 0; + regval = 0; + } + else + { + int R, n, Od; + int Napprox; + int diff; + int diff_min = 500000000; + + for (Od = 0; Od <= 1; ++Od) + { + for (R = 2; R <= 7; ++R) + { + for (n = 2; n <= 256; ++n) + { + Napprox = roundf(priv->samplerate / 1000000.0f * (8 * 32 * R * (2 * n + Od))); + if ((Napprox > 432) || (Napprox < 50)) + { + continue; + } + + diff = abs(priv->samplerate - 1000000 * Napprox / (8 * 32 * R * (2 * n + Od))); + if (diff_min > diff) + { + diff_min = diff; + plln = Napprox; + pllr = R; + div = n; + odd = Od; + } + } + } + } + + /* Calculate the new bitrate in Hz */ + + bitrate = priv->samplerate * priv->datalen; + } + + /* Configure MCK divider */ + + /* Disable I2S */ + + i2s_putreg(priv, STM32_SPI_I2SCFGR_OFFSET, 0); + + /* I2S clock configuration */ + + putreg32((getreg32(STM32_RCC_CR) & (~RCC_CR_PLLI2SON)), STM32_RCC_CR); + + /* PLLI2S clock used as I2S clock source */ + + putreg32(((getreg32(STM32_RCC_CFGR)) & (~RCC_CFGR_I2SSRC)), STM32_RCC_CFGR); + regval = (pllr << 28) | (plln << 6); + putreg32(regval, STM32_RCC_PLLI2SCFGR); + + /* Enable PLLI2S and wait until it is ready */ + + putreg32((getreg32(STM32_RCC_CR) | RCC_CR_PLLI2SON), STM32_RCC_CR); + while (!(getreg32(STM32_RCC_CR) & RCC_CR_PLLI2SRDY)); + + i2s_putreg(priv, STM32_SPI_I2SPR_OFFSET, + div | (odd << 8) | SPI_I2SPR_MCKOE); + i2s_putreg(priv, STM32_SPI_I2SCFGR_OFFSET, + SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SCFG_MTX | SPI_I2SCFGR_I2SE); + + putreg32(((getreg32(STM32_DMA1_HIFCR)) | 0x80000000 /* DMA_HIFCR_CTCIF7 */), + STM32_DMA1_HIFCR); + + return bitrate; +#else + return 0; +#endif +} + +/**************************************************************************** + * Name: i2s_dma_flags + * + * Description: + * Determine DMA FLAGS based on PID and data width + * + * Input Parameters: + * priv - Partially initialized I2C device structure. + * + * Returned Value: + * OK on success; a negated errno value on failure + * + ****************************************************************************/ + +static int i2s_dma_flags(struct stm32_i2s_s *priv) +{ + switch (priv->datalen) + { + case 8: + /* Reconfigure the RX DMA (and TX DMA if applicable) */ + priv->rxccr = SPI_RXDMA8_CONFIG; + priv->txccr = SPI_TXDMA8_CONFIG; + break; + + case 16: + priv->rxccr = SPI_RXDMA16_CONFIG; + priv->txccr = SPI_TXDMA16_CONFIG; + break; + + default: + i2serr("ERROR: Unsupported data width: %d\n", priv->datalen); + return -ENOSYS; + } + + return OK; +} + +/**************************************************************************** + * Name: i2s_dma_allocate + * + * Description: + * Allocate I2S DMA channels + * + * Input Parameters: + * priv - Partially initialized I2S device structure. This function + * will complete the DMA specific portions of the initialization + * + * Returned Value: + * OK on success; A negated errno value on failure. + * + ****************************************************************************/ + +static int i2s_dma_allocate(struct stm32_i2s_s *priv) +{ + int ret; + + /* Get the DMA flags for this channel */ + + ret = i2s_dma_flags(priv); + if (ret < 0) + { + i2serr("ERROR: i2s_dma_flags failed: %d\n", ret); + return ret; + } + + /* Allocate DMA channels. These allocations exploit that fact that + * I2S2 is managed by DMA1 and I2S3 is managed by DMA2. Hence, + * the I2S number (i2sno) is the same as the DMA number. + */ + +#ifdef I2S_HAVE_RX + if (priv->rxenab) + { + /* Allocate an RX DMA channel */ + + priv->rx.dma = stm32_dmachannel(DMAMAP_SPI3_RX_2); + if (!priv->rx.dma) + { + i2serr("ERROR: Failed to allocate the RX DMA channel\n"); + goto errout; + } + + /* Create a watchdog time to catch RX DMA timeouts */ + + priv->rx.dog = wd_create(); + if (!priv->rx.dog) + { + i2serr("ERROR: Failed to create the RX DMA watchdog\n"); + goto errout; + } + } +#endif + +#ifdef I2S_HAVE_TX + if (priv->txenab) + { + /* Allocate a TX DMA channel */ + + priv->tx.dma = stm32_dmachannel(DMAMAP_SPI3_TX_2); + if (!priv->tx.dma) + { + i2serr("ERROR: Failed to allocate the TX DMA channel\n"); + goto errout; + } + + /* Create a watchdog time to catch TX DMA timeouts */ + + priv->tx.dog = wd_create(); + if (!priv->tx.dog) + { + i2serr("ERROR: Failed to create the TX DMA watchdog\n"); + goto errout; + } + } +#endif + + /* Success exit */ + + return OK; + + /* Error exit */ + +errout: + i2s_dma_free(priv); + return -ENOMEM; +} + +/**************************************************************************** + * Name: i2s_dma_free + * + * Description: + * Release DMA-related resources allocated by i2s_dma_allocate() + * + * Input Parameters: + * priv - Partially initialized I2C device structure. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void i2s_dma_free(struct stm32_i2s_s *priv) +{ +#ifdef I2S_HAVE_TX + if (priv->tx.dog) + { + wd_delete(priv->tx.dog); + } + + if (priv->tx.dma) + { + stm32_dmafree(priv->tx.dma); + } +#endif + +#ifdef I2S_HAVE_RX + if (priv->rx.dog) + { + wd_delete(priv->rx.dog); + } + + if (priv->rx.dma) + { + stm32_dmafree(priv->rx.dma); + } +#endif +} + +/**************************************************************************** + * Name: i2s2_configure + * + * Description: + * Configure I2S2 + * + * Input Parameters: + * priv - Partially initialized I2C device structure. These functions + * will complete the I2S specific portions of the initialization + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_I2S2 +static void i2s2_configure(struct stm32_i2s_s *priv) +{ + /* Configure multiplexed pins as connected on the board. Chip + * select pins must be selected by board-specific logic. + */ + + priv->base = STM32_I2S2_BASE; + +#ifdef CONFIG_STM32_I2S2_RX + priv->rxenab = true; + + if ((i2s_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0) + { + /* Configure I2S2 pins: MCK, SD, CK, WS */ + + stm32_configgpio(GPIO_I2S2_MCK); + stm32_configgpio(GPIO_I2S2_SD); + stm32_configgpio(GPIO_I2S2_CK); + stm32_configgpio(GPIO_I2S2_WS); + } +#endif /* CONFIG_STM32_I2S2_RX */ + +#ifdef CONFIG_STM32_I2S2_TX + priv->txenab = true; + + /* Only configure if the port is not already configured */ + + if ((i2s_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0) + { + /* Configure I2S2 pins: MCK, SD, CK, WS */ + + stm32_configgpio(GPIO_I2S2_MCK); + stm32_configgpio(GPIO_I2S2_SD); + stm32_configgpio(GPIO_I2S2_CK); + stm32_configgpio(GPIO_I2S2_WS); + } +#endif /* CONFIG_STM32_I2S2_TX */ + + /* Configure driver state specific to this I2S peripheral */ + + priv->datalen = CONFIG_STM32_I2S2_DATALEN; +#ifdef CONFIG_DEBUG + priv->align = STM32_I2S2_DATAMASK; +#endif +} +#endif /* CONFIG_STM32_I2S2 */ + +/**************************************************************************** + * Name: i2s3_configure + * + * Description: + * Configure I2S3 + * + * Input Parameters: + * priv - Partially initialized I2C device structure. These functions + * will complete the I2S specific portions of the initialization + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_I2S3 +static void i2s3_configure(struct stm32_i2s_s *priv) +{ + /* Configure multiplexed pins as connected on the board. Chip + * select pins must be selected by board-specific logic. + */ + + priv->base = STM32_I2S3_BASE; + +#ifdef CONFIG_STM32_I2S3_RX + priv->rxenab = true; + + if ((i2s_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0) + { + /* Configure I2S3 pins: MCK, SD, CK, WS */ + + stm32_configgpio(GPIO_I2S3_MCK); + stm32_configgpio(GPIO_I2S3_SD); + stm32_configgpio(GPIO_I2S3_CK); + stm32_configgpio(GPIO_I2S3_WS); + } +#endif /* CONFIG_STM32_I2S3_RX */ + +#ifdef CONFIG_STM32_I2S3_TX + priv->txenab = true; + + /* Only configure if the port is not already configured */ + + if ((i2s_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_SPE) == 0) + { + /* Configure I2S3 pins: MCK, SD, CK, WS */ + + stm32_configgpio(GPIO_I2S3_MCK); + stm32_configgpio(GPIO_I2S3_SD); + stm32_configgpio(GPIO_I2S3_CK); + stm32_configgpio(GPIO_I2S3_WS); + } +#endif /* CONFIG_STM32_I2S3_TX */ + + /* Configure driver state specific to this I2S peripheral */ + + priv->datalen = CONFIG_STM32_I2S3_DATALEN; +#ifdef CONFIG_DEBUG + priv->align = STM32_I2S3_DATAMASK; +#endif +} +#endif /* CONFIG_STM32_I2S3 */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/************************************************************************************ + * Name: stm32_i2sdev_initialize + * + * Description: + * Initialize the selected i2S port + * + * Input Parameter: + * Port number (for hardware that has mutiple I2S interfaces) + * + * Returned Value: + * Valid I2S device structure reference on succcess; a NULL on failure + * + ************************************************************************************/ + +FAR struct i2s_dev_s *stm32_i2sdev_initialize(int port) +{ + FAR struct stm32_i2s_s *priv = NULL; + irqstate_t flags; + int ret; + + /* The support STM32 parts have only a single I2S port */ + + i2sinfo("port: %d\n", port); + + /* Allocate a new state structure for this chip select. NOTE that there + * is no protection if the same chip select is used in two different + * chip select structures. + */ + + priv = (struct stm32_i2s_s *)zalloc(sizeof(struct stm32_i2s_s)); + if (!priv) + { + i2serr("ERROR: Failed to allocate a chip select structure\n"); + return NULL; + } + + /* Set up the initial state for this chip select structure. Other fields + * were zeroed by zalloc(). + */ + + /* Initialize the common parts for the I2S device structure */ + + sem_init(&priv->exclsem, 0, 1); + priv->dev.ops = &g_i2sops; + priv->i2sno = port; + + /* Initialize buffering */ + + i2s_buf_initialize(priv); + + flags = enter_critical_section(); + +#ifdef CONFIG_STM32_I2S2 + if (port == 2) + { + /* Select I2S2 */ + + i2s2_configure(priv); + } + else +#endif +#ifdef CONFIG_STM32_I2S3 + if (port == 3) + { + /* Select I2S3 */ + + i2s3_configure(priv); + } + else +#endif + { + i2serr("ERROR: Unsupported I2S port: %d\n", port); + return NULL; + } + + /* Allocate DMA channels */ + + ret = i2s_dma_allocate(priv); + if (ret < 0) + { + goto errout_with_alloc; + } + + leave_critical_section(flags); + i2s_dump_regs(priv, "After initialization"); + + /* Success exit */ + + return &priv->dev; + + /* Failure exits */ + +errout_with_alloc: + sem_destroy(&priv->exclsem); + kmm_free(priv); + return NULL; +} +#endif /* I2S_HAVE_RX || I2S_HAVE_TX */ + +#endif /* CONFIG_STM32_I2S2 || CONFIG_STM32_I2S3 */ diff --git a/arch/arm/src/stm32/stm32_i2s.h b/arch/arm/src/stm32/stm32_i2s.h new file mode 100644 index 00000000000..5e6d51b817f --- /dev/null +++ b/arch/arm/src/stm32/stm32_i2s.h @@ -0,0 +1,90 @@ +/************************************************************************************ + * arch/arm/src/stm32/stm32_i2s.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32_I2S_H +#define __ARCH_ARM_SRC_STM32_I2S_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include "chip.h" +#include "chip/stm32_i2s.h" + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_i2sdev_initialize + * + * Description: + * Initialize the selected I2S port + * + * Input Parameter: + * Port number (for hardware that has mutiple I2S interfaces) + * + * Returned Value: + * Valid I2S device structure reference on succcess; a NULL on failure + * + ************************************************************************************/ + +FAR struct i2s_dev_s *stm32_i2sdev_initialize(int port); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_STM32_I2S_H */ diff --git a/arch/arm/src/stm32/stm32_iwdg.c b/arch/arm/src/stm32/stm32_iwdg.c index 64495b71ab9..7b114fefa59 100644 --- a/arch/arm/src/stm32/stm32_iwdg.c +++ b/arch/arm/src/stm32/stm32_iwdg.c @@ -271,10 +271,6 @@ static void stm32_putreg(uint16_t val, uint32_t addr) * Input Parameters: * priv - A pointer the internal representation of the "lower-half" * driver state structure. - * timeout - The new timeout value in milliseconds. - * - * Returned Values: - * Zero on success; a negated errno value on failure. * ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_otgfshost.c b/arch/arm/src/stm32/stm32_otgfshost.c index b28226f5f23..bf3bbc8b910 100644 --- a/arch/arm/src/stm32/stm32_otgfshost.c +++ b/arch/arm/src/stm32/stm32_otgfshost.c @@ -1952,14 +1952,25 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, delay = 1000; } - /* Wait for the next polling interval. + /* Wait for the next polling interval. For interrupt and + * isochronous endpoints, this is necessaryto assure the + * polling interval. It is used in other cases only to + * prevent the polling from consuming too much CPU bandwith. * - * REVISIT: This delay could require more resolution than - * is provided by the system timer. In that case, the - * delay could be significantly longer than required. + * Small delays could require more resolution than is provided + * by the system timer. For example, if the system timer + * resolution is 10MS, then usleep(1000) will actually request + * a delay 20MS (due to both quantization and rounding). + * + * REVISIT: So which is better? To ignore tiny delays and + * hog the system bandwidth? Or to wait for an excessive + * amount and destroy system throughput? */ - usleep(delay); + if (delay > CONFIG_USEC_PER_TICK) + { + usleep(delay - CONFIG_USEC_PER_TICK); + } } } else diff --git a/arch/arm/src/stm32/stm32_otghshost.c b/arch/arm/src/stm32/stm32_otghshost.c index 17023088b6f..18368087644 100644 --- a/arch/arm/src/stm32/stm32_otghshost.c +++ b/arch/arm/src/stm32/stm32_otghshost.c @@ -1957,14 +1957,25 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, delay = 1000; } - /* Wait for the next polling interval. + /* Wait for the next polling interval. For interrupt and + * isochronous endpoints, this is necessaryto assure the + * polling interval. It is used in other cases only to + * prevent the polling from consuming too much CPU bandwith. * - * REVISIT: This delay could require more resolution than - * is provided by the system timer. In that case, the - * delay could be significantly longer than required. + * Small delays could require more resolution than is provided + * by the system timer. For example, if the system timer + * resolution is 10MS, then usleep(1000) will actually request + * a delay 20MS (due to both quantization and rounding). + * + * REVISIT: So which is better? To ignore tiny delays and + * hog the system bandwidth? Or to wait for an excessive + * amount and destroy system throughput? */ - usleep(delay); + if (delay > CONFIG_USEC_PER_TICK) + { + usleep(delay - CONFIG_USEC_PER_TICK); + } } } else diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c index 77c07ea68e0..7aa362c38f5 100644 --- a/arch/arm/src/stm32/stm32_serial.c +++ b/arch/arm/src/stm32/stm32_serial.c @@ -1050,10 +1050,10 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t valu } /**************************************************************************** - * Name: up_restoreusartint + * Name: up_setusartint ****************************************************************************/ -static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie) +static inline void up_setusartint(struct up_dev_s *priv, uint16_t ie) { uint32_t cr; @@ -1074,12 +1074,31 @@ static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie) up_serialout(priv, STM32_USART_CR3_OFFSET, cr); } +/**************************************************************************** + * Name: up_restoreusartint + ****************************************************************************/ + +static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie) +{ + irqstate_t flags; + + flags = enter_critical_section(); + + up_setusartint(priv, ie); + + leave_critical_section(flags); +} + /**************************************************************************** * Name: up_disableusartint ****************************************************************************/ -static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie) +static void up_disableusartint(struct up_dev_s *priv, uint16_t *ie) { + irqstate_t flags; + + flags = enter_critical_section(); + if (ie) { uint32_t cr1; @@ -1116,7 +1135,9 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie) /* Disable all interrupts */ - up_restoreusartint(priv, 0); + up_setusartint(priv, 0); + + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/stm32/stm32f30xxx_i2c.c b/arch/arm/src/stm32/stm32f30xxx_i2c.c index 539305194d7..e779c040ede 100644 --- a/arch/arm/src/stm32/stm32f30xxx_i2c.c +++ b/arch/arm/src/stm32/stm32f30xxx_i2c.c @@ -318,7 +318,7 @@ static int stm32_i2c_reset(FAR struct i2c_master_s *dev); /* Device Structures, Instantiation */ -const struct i2c_ops_s stm32_i2c_ops = +static const struct i2c_ops_s stm32_i2c_ops = { .transfer = stm32_i2c_transfer #ifdef CONFIG_I2C_RESET @@ -340,7 +340,7 @@ static const struct stm32_i2c_config_s stm32_i2c1_config = #endif }; -struct stm32_i2c_priv_s stm32_i2c1_priv = +static struct stm32_i2c_priv_s stm32_i2c1_priv = { .ops = &stm32_i2c_ops, .config = &stm32_i2c1_config, @@ -369,7 +369,7 @@ static const struct stm32_i2c_config_s stm32_i2c2_config = #endif }; -struct stm32_i2c_priv_s stm32_i2c2_priv = +static struct stm32_i2c_priv_s stm32_i2c2_priv = { .ops = &stm32_i2c_ops, .config = &stm32_i2c2_config, @@ -398,7 +398,7 @@ static const struct stm32_i2c_config_s stm32_i2c3_config = #endif }; -struct stm32_i2c_priv_s stm32_i2c3_priv = +static struct stm32_i2c_priv_s stm32_i2c3_priv = { .ops = &stm32_i2c_ops, .config = &stm32_i2c3_config, diff --git a/arch/arm/src/stm32f0/stm32f0_i2c.c b/arch/arm/src/stm32f0/stm32f0_i2c.c index c782754fc34..69c5a1b53fe 100644 --- a/arch/arm/src/stm32f0/stm32f0_i2c.c +++ b/arch/arm/src/stm32f0/stm32f0_i2c.c @@ -307,7 +307,7 @@ static int stm32f0_i2c_reset(FAR struct i2c_master_s *dev); /* Device Structures, Instantiation */ -const struct i2c_ops_s stm32f0_i2c_ops = +static const struct i2c_ops_s stm32f0_i2c_ops = { .transfer = stm32f0_i2c_transfer #ifdef CONFIG_I2C_RESET @@ -328,7 +328,7 @@ static const struct stm32f0_i2c_config_s stm32f0_i2c1_config = #endif }; -struct stm32f0_i2c_priv_s stm32f0_i2c1_priv = +static struct stm32f0_i2c_priv_s stm32f0_i2c1_priv = { .ops = &stm32f0_i2c_ops, .config = &stm32f0_i2c1_config, @@ -356,7 +356,7 @@ static const struct stm32f0_i2c_config_s stm32f0_i2c2_config = #endif }; -struct stm32f0_i2c_priv_s stm32f0_i2c2_priv = +static struct stm32f0_i2c_priv_s stm32f0_i2c2_priv = { .ops = &stm32f0_i2c_ops, .config = &stm32f0_i2c2_config, @@ -384,7 +384,7 @@ static const struct stm32f0_i2c_config_s stm32f0_i2c3_config = #endif }; -struct stm32f0_i2c_priv_s stm32f0_i2c3_priv = +static struct stm32f0_i2c_priv_s stm32f0_i2c3_priv = { .ops = &stm32f0_i2c_ops, .config = &stm32f0_i2c3_config, diff --git a/arch/arm/src/stm32f0/stm32f0_serial.c b/arch/arm/src/stm32f0/stm32f0_serial.c index f0975fad2ca..788967c231d 100644 --- a/arch/arm/src/stm32f0/stm32f0_serial.c +++ b/arch/arm/src/stm32f0/stm32f0_serial.c @@ -769,10 +769,10 @@ static inline void stm32f0serial_putreg(FAR struct stm32f0_serial_s *priv, } /**************************************************************************** - * Name: stm32f0serial_restoreusartint + * Name: stm32f0serial_setusartint ****************************************************************************/ -static void stm32f0serial_restoreusartint(FAR struct stm32f0_serial_s *priv, +static void stm32f0serial_setusartint(FAR struct stm32f0_serial_s *priv, uint16_t ie) { uint32_t cr; @@ -794,13 +794,33 @@ static void stm32f0serial_restoreusartint(FAR struct stm32f0_serial_s *priv, stm32f0serial_putreg(priv, STM32F0_USART_CR3_OFFSET, cr); } +/**************************************************************************** + * Name: stm32f0serial_restoreusartint + ****************************************************************************/ + +static void stm32f0serial_restoreusartint(FAR struct stm32f0_serial_s *priv, + uint16_t ie) +{ + irqstate_t flags; + + flags = enter_critical_section(); + + stm32f0serial_setusartint(priv, ie); + + leave_critical_section(flags); +} + /**************************************************************************** * Name: stm32f0serial_disableusartint ****************************************************************************/ -static inline void stm32f0serial_disableusartint(FAR struct stm32f0_serial_s *priv, - FAR uint16_t *ie) +static void stm32f0serial_disableusartint(FAR struct stm32f0_serial_s *priv, + FAR uint16_t *ie) { + irqstate_t flags; + + flags = enter_critical_section(); + if (ie) { uint32_t cr1; @@ -837,7 +857,9 @@ static inline void stm32f0serial_disableusartint(FAR struct stm32f0_serial_s *pr /* Disable all interrupts */ - stm32f0serial_restoreusartint(priv, 0); + stm32f0serial_setusartint(priv, 0); + + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/stm32f7/stm32_i2c.c b/arch/arm/src/stm32f7/stm32_i2c.c index 38c1f08268a..c9ae5710946 100644 --- a/arch/arm/src/stm32f7/stm32_i2c.c +++ b/arch/arm/src/stm32f7/stm32_i2c.c @@ -290,7 +290,7 @@ #if !defined(CONFIG_STM32F7_I2CTIMEOSEC) && !defined(CONFIG_STM32F7_I2CTIMEOMS) # define CONFIG_STM32F7_I2CTIMEOSEC 0 # define CONFIG_STM32F7_I2CTIMEOMS 500 /* Default is 500 milliseconds */ -# warning "Using Defualt 500 Ms Timeout" +# warning "Using Default 500 Ms Timeout" #elif !defined(CONFIG_STM32F7_I2CTIMEOSEC) # define CONFIG_STM32F7_I2CTIMEOSEC 0 /* User provided milliseconds */ #elif !defined(CONFIG_STM32F7_I2CTIMEOMS) @@ -445,7 +445,7 @@ struct stm32_i2c_priv_s struct stm32_i2c_inst_s { - struct i2c_ops_s *ops; /* Standard I2C operations */ + const struct i2c_ops_s *ops; /* Standard I2C operations */ struct stm32_i2c_priv_s *priv; /* Common driver private data structure */ }; @@ -495,7 +495,7 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs, int count); #ifdef CONFIG_I2C_RESET -int stm32_i2c_reset(FAR struct i2c_master_s * dev); +static int stm32_i2c_reset(FAR struct i2c_master_s * dev); #endif /************************************************************************************ @@ -516,7 +516,7 @@ static const struct stm32_i2c_config_s stm32_i2c1_config = #endif }; -struct stm32_i2c_priv_s stm32_i2c1_priv = +static struct stm32_i2c_priv_s stm32_i2c1_priv = { .config = &stm32_i2c1_config, .refs = 0, @@ -545,7 +545,7 @@ static const struct stm32_i2c_config_s stm32_i2c2_config = #endif }; -struct stm32_i2c_priv_s stm32_i2c2_priv = +static struct stm32_i2c_priv_s stm32_i2c2_priv = { .config = &stm32_i2c2_config, .refs = 0, @@ -574,7 +574,7 @@ static const struct stm32_i2c_config_s stm32_i2c3_config = #endif }; -struct stm32_i2c_priv_s stm32_i2c3_priv = +static struct stm32_i2c_priv_s stm32_i2c3_priv = { .config = &stm32_i2c3_config, .refs = 0, @@ -603,7 +603,7 @@ static const struct stm32_i2c_config_s stm32_i2c4_config = #endif }; -struct stm32_i2c_priv_s stm32_i2c4_priv = +static struct stm32_i2c_priv_s stm32_i2c4_priv = { .config = &stm32_i2c4_config, .refs = 0, @@ -620,7 +620,7 @@ struct stm32_i2c_priv_s stm32_i2c4_priv = /* Device Structures, Instantiation */ -struct i2c_ops_s stm32_i2c_ops = +static const struct i2c_ops_s stm32_i2c_ops = { .transfer = stm32_i2c_transfer #ifdef CONFIG_I2C_RESET @@ -2485,6 +2485,124 @@ static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s return stm32_i2c_process(dev, msgs, count); } +/************************************************************************************ + * Name: stm32_i2c_reset + * + * Description: + * Reset an I2C bus + * + ************************************************************************************/ + +#ifdef CONFIG_I2C_RESET +static int stm32_i2c_reset(FAR struct i2c_master_s * dev) +{ + struct stm32_i2c_priv_s * priv; + unsigned int clock_count; + unsigned int stretch_count; + uint32_t scl_gpio; + uint32_t sda_gpio; + int ret = ERROR; + + ASSERT(dev); + + /* Get I2C private structure */ + + priv = ((struct stm32_i2c_inst_s *)dev)->priv; + + /* Our caller must own a ref */ + + ASSERT(priv->refs > 0); + + /* Lock out other clients */ + + stm32_i2c_sem_wait(dev); + + /* De-init the port */ + + stm32_i2c_deinit(priv); + + /* Use GPIO configuration to un-wedge the bus */ + + scl_gpio = MKI2C_OUTPUT(priv->config->scl_pin); + sda_gpio = MKI2C_OUTPUT(priv->config->sda_pin); + + /* Let SDA go high */ + + stm32_gpiowrite(sda_gpio, 1); + + /* Clock the bus until any slaves currently driving it let it go. */ + + clock_count = 0; + while (!stm32_gpioread(sda_gpio)) + { + /* Give up if we have tried too hard */ + + if (clock_count++ > 10) + { + goto out; + } + + /* Sniff to make sure that clock stretching has finished. + * + * If the bus never relaxes, the reset has failed. + */ + + stretch_count = 0; + while (!stm32_gpioread(scl_gpio)) + { + /* Give up if we have tried too hard */ + + if (stretch_count++ > 10) + { + goto out; + } + + up_udelay(10); + } + + /* Drive SCL low */ + + stm32_gpiowrite(scl_gpio, 0); + up_udelay(10); + + /* Drive SCL high again */ + + stm32_gpiowrite(scl_gpio, 1); + up_udelay(10); + } + + /* Generate a start followed by a stop to reset slave + * state machines. + */ + + stm32_gpiowrite(sda_gpio, 0); + up_udelay(10); + stm32_gpiowrite(scl_gpio, 0); + up_udelay(10); + stm32_gpiowrite(scl_gpio, 1); + up_udelay(10); + stm32_gpiowrite(sda_gpio, 1); + up_udelay(10); + + /* Revert the GPIO configuration. */ + + stm32_unconfiggpio(sda_gpio); + stm32_unconfiggpio(scl_gpio); + + /* Re-init the port */ + + stm32_i2c_init(priv); + ret = OK; + +out: + + /* Release the port for re-use by other clients */ + + stm32_i2c_sem_post(dev); + return ret; +} +#endif /* CONFIG_I2C_RESET */ + /************************************************************************************ * Public Functions ************************************************************************************/ @@ -2608,122 +2726,4 @@ int stm32_i2cbus_uninitialize(FAR struct i2c_master_s * dev) return OK; } -/************************************************************************************ - * Name: stm32_i2c_reset - * - * Description: - * Reset an I2C bus - * - ************************************************************************************/ - -#ifdef CONFIG_I2C_RESET -int stm32_i2c_reset(FAR struct i2c_master_s * dev) -{ - struct stm32_i2c_priv_s * priv; - unsigned int clock_count; - unsigned int stretch_count; - uint32_t scl_gpio; - uint32_t sda_gpio; - int ret = ERROR; - - ASSERT(dev); - - /* Get I2C private structure */ - - priv = ((struct stm32_i2c_inst_s *)dev)->priv; - - /* Our caller must own a ref */ - - ASSERT(priv->refs > 0); - - /* Lock out other clients */ - - stm32_i2c_sem_wait(dev); - - /* De-init the port */ - - stm32_i2c_deinit(priv); - - /* Use GPIO configuration to un-wedge the bus */ - - scl_gpio = MKI2C_OUTPUT(priv->config->scl_pin); - sda_gpio = MKI2C_OUTPUT(priv->config->sda_pin); - - /* Let SDA go high */ - - stm32_gpiowrite(sda_gpio, 1); - - /* Clock the bus until any slaves currently driving it let it go. */ - - clock_count = 0; - while (!stm32_gpioread(sda_gpio)) - { - /* Give up if we have tried too hard */ - - if (clock_count++ > 10) - { - goto out; - } - - /* Sniff to make sure that clock stretching has finished. - * - * If the bus never relaxes, the reset has failed. - */ - - stretch_count = 0; - while (!stm32_gpioread(scl_gpio)) - { - /* Give up if we have tried too hard */ - - if (stretch_count++ > 10) - { - goto out; - } - - up_udelay(10); - } - - /* Drive SCL low */ - - stm32_gpiowrite(scl_gpio, 0); - up_udelay(10); - - /* Drive SCL high again */ - - stm32_gpiowrite(scl_gpio, 1); - up_udelay(10); - } - - /* Generate a start followed by a stop to reset slave - * state machines. - */ - - stm32_gpiowrite(sda_gpio, 0); - up_udelay(10); - stm32_gpiowrite(scl_gpio, 0); - up_udelay(10); - stm32_gpiowrite(scl_gpio, 1); - up_udelay(10); - stm32_gpiowrite(sda_gpio, 1); - up_udelay(10); - - /* Revert the GPIO configuration. */ - - stm32_unconfiggpio(sda_gpio); - stm32_unconfiggpio(scl_gpio); - - /* Re-init the port */ - - stm32_i2c_init(priv); - ret = OK; - -out: - - /* Release the port for re-use by other clients */ - - stm32_i2c_sem_post(dev); - return ret; -} -#endif /* CONFIG_I2C_RESET */ - #endif /* CONFIG_STM32F7_I2C1 || CONFIG_STM32F7_I2C2 || CONFIG_STM32F7_I2C3 */ diff --git a/arch/arm/src/stm32f7/stm32_otghost.c b/arch/arm/src/stm32f7/stm32_otghost.c index f0307be640e..92fc2bc7d0c 100644 --- a/arch/arm/src/stm32f7/stm32_otghost.c +++ b/arch/arm/src/stm32f7/stm32_otghost.c @@ -1951,14 +1951,25 @@ static ssize_t stm32_in_transfer(FAR struct stm32_usbhost_s *priv, int chidx, delay = 1000; } - /* Wait for the next polling interval. + /* Wait for the next polling interval. For interrupt and + * isochronous endpoints, this is necessaryto assure the + * polling interval. It is used in other cases only to + * prevent the polling from consuming too much CPU bandwith. * - * REVISIT: This delay could require more resolution than - * is provided by the system timer. In that case, the - * delay could be significantly longer than required. + * Small delays could require more resolution than is provided + * by the system timer. For example, if the system timer + * resolution is 10MS, then usleep(1000) will actually request + * a delay 20MS (due to both quantization and rounding). + * + * REVISIT: So which is better? To ignore tiny delays and + * hog the system bandwidth? Or to wait for an excessive + * amount and destroy system throughput? */ - usleep(delay); + if (delay > CONFIG_USEC_PER_TICK) + { + usleep(delay - CONFIG_USEC_PER_TICK); + } } } else diff --git a/arch/arm/src/stm32f7/stm32_serial.c b/arch/arm/src/stm32f7/stm32_serial.c index ce6e7db9a72..f400a9b379c 100644 --- a/arch/arm/src/stm32f7/stm32_serial.c +++ b/arch/arm/src/stm32f7/stm32_serial.c @@ -1096,10 +1096,10 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t valu } /**************************************************************************** - * Name: up_restoreusartint + * Name: up_setusartint ****************************************************************************/ -static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie) +static inline void up_setusartint(struct up_dev_s *priv, uint16_t ie) { uint32_t cr; @@ -1120,12 +1120,31 @@ static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie) up_serialout(priv, STM32_USART_CR3_OFFSET, cr); } +/**************************************************************************** + * Name: up_restoreusartint + ****************************************************************************/ + +static void up_restoreusartint(struct up_dev_s *priv, uint16_t ie) +{ + irqstate_t flags; + + flags = enter_critical_section(); + + up_setusartint(priv, ie); + + leave_critical_section(flags); +} + /**************************************************************************** * Name: up_disableusartint ****************************************************************************/ -static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie) +static void up_disableusartint(struct up_dev_s *priv, uint16_t *ie) { + irqstate_t flags; + + flags = enter_critical_section(); + if (ie) { uint32_t cr1; @@ -1162,7 +1181,9 @@ static inline void up_disableusartint(struct up_dev_s *priv, uint16_t *ie) /* Disable all interrupts */ - up_restoreusartint(priv, 0); + up_setusartint(priv, 0); + + leave_critical_section(flags); } /**************************************************************************** @@ -2868,6 +2889,7 @@ int up_putc(int ch) up_lowputc(ch); up_restoreusartint(priv, ie); + #endif return ch; } diff --git a/arch/arm/src/stm32l4/Kconfig b/arch/arm/src/stm32l4/Kconfig index 76d2dae6136..2721ca3871e 100644 --- a/arch/arm/src/stm32l4/Kconfig +++ b/arch/arm/src/stm32l4/Kconfig @@ -1008,14 +1008,6 @@ config STM32L4_SPI3 select SPI select STM32L4_SPI -config STM32L4_USART1 - bool "USART1" - default n - depends on STM32L4_HAVE_USART1 - select ARCH_HAVE_SERIAL_TERMIOS - select USART1_SERIALDRIVER - select STM32L4_USART - config STM32L4_USART2 bool "USART2" default n @@ -1155,8 +1147,9 @@ config STM32L4_TIM8 config STM32L4_USART1 bool "USART1" default n - select USART1_SERIALDRIVER + depends on STM32L4_HAVE_USART1 select ARCH_HAVE_SERIAL_TERMIOS + select USART1_SERIALDRIVER select STM32L4_USART config STM32L4_TIM15 @@ -1306,9 +1299,6 @@ config STM32L4_SAI2PLL Set this true and provide configuration parameters in board.h to use this PLL. -config STM32L4_USART - bool - menu "Timer Configuration" if SCHED_TICKLESS diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs index 313e4195e75..5454ddc1270 100644 --- a/arch/arm/src/stm32l4/Make.defs +++ b/arch/arm/src/stm32l4/Make.defs @@ -102,8 +102,8 @@ CHIP_ASRCS = CHIP_CSRCS = stm32l4_allocateheap.c stm32l4_exti_gpio.c stm32l4_gpio.c CHIP_CSRCS += stm32l4_idle.c stm32l4_irq.c stm32l4_lowputc.c stm32l4_rcc.c CHIP_CSRCS += stm32l4_serial.c stm32l4_start.c stm32l4_waste.c stm32l4_uid.c -CHIP_CSRCS += stm32l4_spi.c stm32l4_i2c.c stm32l4_lse.c stm32l4_pwr.c -CHIP_CSRCS += stm32l4_tim.c stm32l4_flash.c +CHIP_CSRCS += stm32l4_spi.c stm32l4_i2c.c stm32l4_lse.c stm32l4_lsi.c +CHIP_CSRCS += stm32l4_pwr.c stm32l4_tim.c stm32l4_flash.c ifeq ($(CONFIG_TIMER),y) CHIP_CSRCS += stm32l4_tim_lowerhalf.c @@ -216,3 +216,6 @@ ifeq ($(CONFIG_STM32L4_FIREWALL),y) CHIP_CSRCS += stm32l4_firewall.c endif +ifeq ($(CONFIG_STM32L4_IWDG),y) +CHIP_CSRCS += stm32l4_iwdg.c +endif diff --git a/arch/arm/src/stm32l4/README.txt b/arch/arm/src/stm32l4/README.txt index 9124d966a78..6adf0eac12e 100644 --- a/arch/arm/src/stm32l4/README.txt +++ b/arch/arm/src/stm32l4/README.txt @@ -8,7 +8,7 @@ Most code is copied and adapted from the STM32 Port. TODO list --------- -Peripherals with equivalent implementation in STM32 port +Peripherals with implementation in STM32 port: IRQs : OK GPIO : OK @@ -42,10 +42,11 @@ AES : TODO RNG : works CRC : TODO (configurable polynomial) WWDG : TODO -IWDG : TODO +IWDG : works MMCSD : TODO ADC : TODO DAC : TODO +DMA2D : TODO (Chrom-Art Accelerator for image manipulation) New peripherals with implementation to be written from scratch These are Low Priority TODO items, unless someone requests or contributes @@ -61,7 +62,6 @@ COMP : There is some code (Analog comparators) DFSDM : TODO (Digital Filter and Sigma-Delta Modulator) LCD : TODO (Segment LCD controller) SAIPLL : works (PLL For Digital Audio interfaces, and other things) -SAI : TODO (Digital Audio interfaces, I2S, SPDIF, etc) +SAI : There is some code (Digital Audio interfaces, I2S, SPDIF, etc) HASH : TODO (SHA-1, SHA-224, SHA-256, HMAC) DCMI : TODO (Digital Camera interfaces) -DMA2D : TODO (Chrom-Art Accelerator for image manipulation) diff --git a/arch/arm/src/stm32l4/chip/stm32l4_wdg.h b/arch/arm/src/stm32l4/chip/stm32l4_wdg.h new file mode 100644 index 00000000000..9c381f790a4 --- /dev/null +++ b/arch/arm/src/stm32l4/chip/stm32l4_wdg.h @@ -0,0 +1,154 @@ +/************************************************************************************ + * arch/arm/src/stm32l4/chip/stm32l4_wdg.h + * + * Copyright (C) 2009, 2011-2013, 2017 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Juha Niskanen + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_WDG_H +#define __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_WDG_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "chip.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Register Offsets *****************************************************************/ + +#define STM32L4_IWDG_KR_OFFSET 0x0000 /* Key register (32-bit) */ +#define STM32L4_IWDG_PR_OFFSET 0x0004 /* Prescaler register (32-bit) */ +#define STM32L4_IWDG_RLR_OFFSET 0x0008 /* Reload register (32-bit) */ +#define STM32L4_IWDG_SR_OFFSET 0x000c /* Status register (32-bit) */ +#define STM32L4_IWDG_WINR_OFFSET 0x0010 /* Window register (32-bit) */ + +#define STM32L4_WWDG_CR_OFFSET 0x0000 /* Control Register (32-bit) */ +#define STM32L4_WWDG_CFR_OFFSET 0x0004 /* Configuration register (32-bit) */ +#define STM32L4_WWDG_SR_OFFSET 0x0008 /* Status register (32-bit) */ + +/* Register Addresses ***************************************************************/ + +#define STM32L4_IWDG_KR (STM32L4_IWDG_BASE+STM32L4_IWDG_KR_OFFSET) +#define STM32L4_IWDG_PR (STM32L4_IWDG_BASE+STM32L4_IWDG_PR_OFFSET) +#define STM32L4_IWDG_RLR (STM32L4_IWDG_BASE+STM32L4_IWDG_RLR_OFFSET) +#define STM32L4_IWDG_SR (STM32L4_IWDG_BASE+STM32L4_IWDG_SR_OFFSET) +#define STM32L4_IWDG_WINR (STM32L4_IWDG_BASE+STM32L4_IWDG_WINR_OFFSET) + +#define STM32L4_WWDG_CR (STM32L4_WWDG_BASE+STM32L4_WWDG_CR_OFFSET) +#define STM32L4_WWDG_CFR (STM32L4_WWDG_BASE+STM32L4_WWDG_CFR_OFFSET) +#define STM32L4_WWDG_SR (STM32L4_WWDG_BASE+STM32L4_WWDG_SR_OFFSET) + +/* Register Bitfield Definitions ****************************************************/ + +/* Key register (32-bit) */ + +#define IWDG_KR_KEY_SHIFT (0) /* Bits 15:0: Key value (write only, read 0000h) */ +#define IWDG_KR_KEY_MASK (0xffff << IWDG_KR_KEY_SHIFT) + +#define IWDG_KR_KEY_ENABLE (0x5555) /* Enable register access */ +#define IWDG_KR_KEY_DISABLE (0x0000) /* Disable register access */ +#define IWDG_KR_KEY_RELOAD (0xaaaa) /* Reload the counter */ +#define IWDG_KR_KEY_START (0xcccc) /* Start the watchdog */ + +/* Prescaler register (32-bit) */ + +#define IWDG_PR_SHIFT (0) /* Bits 2:0: Prescaler divider */ +#define IWDG_PR_MASK (7 << IWDG_PR_SHIFT) +# define IWDG_PR_DIV4 (0 << IWDG_PR_SHIFT) /* 000: divider /4 */ +# define IWDG_PR_DIV8 (1 << IWDG_PR_SHIFT) /* 001: divider /8 */ +# define IWDG_PR_DIV16 (2 << IWDG_PR_SHIFT) /* 010: divider /16 */ +# define IWDG_PR_DIV32 (3 << IWDG_PR_SHIFT) /* 011: divider /32 */ +# define IWDG_PR_DIV64 (4 << IWDG_PR_SHIFT) /* 100: divider /64 */ +# define IWDG_PR_DIV128 (5 << IWDG_PR_SHIFT) /* 101: divider /128 */ +# define IWDG_PR_DIV256 (6 << IWDG_PR_SHIFT) /* 11x: divider /256 */ + +/* Reload register (32-bit) */ + +#define IWDG_RLR_RL_SHIFT (0) /* Bits 11:0 RL[11:0]: Watchdog counter reload value */ +#define IWDG_RLR_RL_MASK (0x0fff << IWDG_RLR_RL_SHIFT) + +#define IWDG_RLR_MAX (0xfff) + +/* Status register (32-bit) */ + +#define IWDG_SR_PVU (1 << 0) /* Bit 0: Watchdog prescaler value update */ +#define IWDG_SR_RVU (1 << 1) /* Bit 1: Watchdog counter reload value update */ +#define IWDG_SR_WVU (1 << 2) /* Bit 2: Watchdog counter window value update */ + +/* Window register (32-bit) */ + +#define IWDG_WINR_SHIFT (0) /* Bits 11:0 WIN[11:0]: Watchdog counter window value */ +#define IWDG_WINR_MASK (0x0fff << IWDG_WINR_SHIFT) + +/* Control Register (32-bit) */ + +#define WWDG_CR_T_SHIFT (0) /* Bits 6:0 T[6:0]: 7-bit counter (MSB to LSB) */ +#define WWDG_CR_T_MASK (0x7f << WWDG_CR_T_SHIFT) +# define WWDG_CR_T_MAX (0x3f << WWDG_CR_T_SHIFT) +# define WWDG_CR_T_RESET (0x40 << WWDG_CR_T_SHIFT) +#define WWDG_CR_WDGA (1 << 7) /* Bit 7: Activation bit */ + +/* Configuration register (32-bit) */ + +#define WWDG_CFR_W_SHIFT (0) /* Bits 6:0 W[6:0] 7-bit window value */ +#define WWDG_CFR_W_MASK (0x7f << WWDG_CFR_W_SHIFT) +#define WWDG_CFR_WDGTB_SHIFT (7) /* Bits 8:7 [1:0]: Timer Base */ +#define WWDG_CFR_WDGTB_MASK (3 << WWDG_CFR_WDGTB_SHIFT) +# define WWDG_CFR_PCLK1 (0 << WWDG_CFR_WDGTB_SHIFT) /* 00: CK Counter Clock (PCLK1 div 4096) div 1 */ +# define WWDG_CFR_PCLK1d2 (1 << WWDG_CFR_WDGTB_SHIFT) /* 01: CK Counter Clock (PCLK1 div 4096) div 2 */ +# define WWDG_CFR_PCLK1d4 (2 << WWDG_CFR_WDGTB_SHIFT) /* 10: CK Counter Clock (PCLK1 div 4096) div 4 */ +# define WWDG_CFR_PCLK1d8 (3 << WWDG_CFR_WDGTB_SHIFT) /* 11: CK Counter Clock (PCLK1 div 4096) div 8 */ +#define WWDG_CFR_EWI (1 << 9) /* Bit 9: Early Wakeup Interrupt */ + +/* Status register (32-bit) */ + +#define WWDG_SR_EWIF (1 << 0) /* Bit 0: Early Wakeup Interrupt Flag */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ARCH_ARM_SRC_STM32L4_CHIP_STM32L4_WDG_H */ diff --git a/arch/arm/src/stm32l4/stm32l4_i2c.c b/arch/arm/src/stm32l4/stm32l4_i2c.c index 18da3a2d268..892cde5f69e 100644 --- a/arch/arm/src/stm32l4/stm32l4_i2c.c +++ b/arch/arm/src/stm32l4/stm32l4_i2c.c @@ -307,7 +307,7 @@ static int stm32l4_i2c_reset(FAR struct i2c_master_s *dev); /* Device Structures, Instantiation */ -const struct i2c_ops_s stm32l4_i2c_ops = +static const struct i2c_ops_s stm32l4_i2c_ops = { .transfer = stm32l4_i2c_transfer #ifdef CONFIG_I2C_RESET @@ -329,7 +329,7 @@ static const struct stm32l4_i2c_config_s stm32l4_i2c1_config = #endif }; -struct stm32l4_i2c_priv_s stm32l4_i2c1_priv = +static struct stm32l4_i2c_priv_s stm32l4_i2c1_priv = { .ops = &stm32l4_i2c_ops, .config = &stm32l4_i2c1_config, @@ -358,7 +358,7 @@ static const struct stm32l4_i2c_config_s stm32l4_i2c2_config = #endif }; -struct stm32l4_i2c_priv_s stm32l4_i2c2_priv = +static struct stm32l4_i2c_priv_s stm32l4_i2c2_priv = { .ops = &stm32l4_i2c_ops, .config = &stm32l4_i2c2_config, @@ -387,7 +387,7 @@ static const struct stm32l4_i2c_config_s stm32l4_i2c3_config = #endif }; -struct stm32l4_i2c_priv_s stm32l4_i2c3_priv = +static struct stm32l4_i2c_priv_s stm32l4_i2c3_priv = { .ops = &stm32l4_i2c_ops, .config = &stm32l4_i2c3_config, @@ -416,7 +416,7 @@ static const struct stm32l4_i2c_config_s stm32l4_i2c4_config = #endif }; -struct stm32l4_i2c_priv_s stm32l4_i2c4_priv = +static struct stm32l4_i2c_priv_s stm32l4_i2c4_priv = { .ops = &stm32l4_i2c_ops, .config = &stm32l4_i2c4_config, @@ -1831,7 +1831,7 @@ static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg * dev - Device-specific state data * * Returned Value: - * Zero (OK) on success; a negated errno value on failure. + * Zero (OK) on success; negative value on failure. * ************************************************************************************/ diff --git a/arch/arm/src/stm32l4/stm32l4_iwdg.c b/arch/arm/src/stm32l4/stm32l4_iwdg.c new file mode 100644 index 00000000000..9977e4d727d --- /dev/null +++ b/arch/arm/src/stm32l4/stm32l4_iwdg.c @@ -0,0 +1,658 @@ +/**************************************************************************** + * arch/arm/src/stm32l4/stm32l4_iwdg.c + * + * Copyright (C) 2012, 2016, 2017 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Juha Niskanen + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +#include "up_arch.h" +#include "stm32l4_rcc.h" +#include "chip/stm32l4_dbgmcu.h" +#include "stm32l4_wdg.h" + +#if defined(CONFIG_WATCHDOG) && defined(CONFIG_STM32L4_IWDG) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Clocking *****************************************************************/ +/* The minimum frequency of the IWDG clock is: + * + * Fmin = Flsi / 256 + * + * So the maximum delay (in milliseconds) is then: + * + * 1000 * IWDG_RLR_MAX / Fmin + * + * For example, if Flsi = 30Khz (the nominal, uncalibrated value), then the + * maximum delay is: + * + * Fmin = 117.1875 + * 1000 * 4095 / Fmin = 34,944 MSec + */ + +#define IWDG_FMIN (STM32L4_LSI_FREQUENCY / 256) +#define IWDG_MAXTIMEOUT (1000 * IWDG_RLR_MAX / IWDG_FMIN) + +/* Configuration ************************************************************/ + +#ifndef CONFIG_STM32L4_IWDG_DEFTIMOUT +# define CONFIG_STM32L4_IWDG_DEFTIMOUT IWDG_MAXTIMEOUT +#endif + +#ifndef CONFIG_DEBUG_WATCHDOG_INFO +# undef CONFIG_STM32L4_IWDG_REGDEBUG +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure provides the private representation of the "lower-half" + * driver state structure. This structure must be cast-compatible with the + * well-known watchdog_lowerhalf_s structure. + */ + +struct stm32l4_lowerhalf_s +{ + FAR const struct watchdog_ops_s *ops; /* Lower half operations */ + uint32_t lsifreq; /* The calibrated frequency of the LSI oscillator */ + uint32_t timeout; /* The (actual) selected timeout */ + uint32_t lastreset; /* The last reset time */ + bool started; /* true: The watchdog timer has been started */ + uint8_t prescaler; /* Clock prescaler value */ + uint16_t reload; /* Timer reload value */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ +/* Register operations ******************************************************/ + +#ifdef CONFIG_STM32L4_IWDG_REGDEBUG +static uint16_t stm32l4_getreg(uint32_t addr); +static void stm32l4_putreg(uint16_t val, uint32_t addr); +#else +# define stm32l4_getreg(addr) getreg16(addr) +# define stm32l4_putreg(val,addr) putreg16(val,addr) +#endif + +static inline void stm32l4_setprescaler(FAR struct stm32l4_lowerhalf_s *priv); + +/* "Lower half" driver methods **********************************************/ + +static int stm32l4_start(FAR struct watchdog_lowerhalf_s *lower); +static int stm32l4_stop(FAR struct watchdog_lowerhalf_s *lower); +static int stm32l4_keepalive(FAR struct watchdog_lowerhalf_s *lower); +static int stm32l4_getstatus(FAR struct watchdog_lowerhalf_s *lower, + FAR struct watchdog_status_s *status); +static int stm32l4_settimeout(FAR struct watchdog_lowerhalf_s *lower, + uint32_t timeout); + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* "Lower half" driver methods */ + +static const struct watchdog_ops_s g_wdgops = +{ + .start = stm32l4_start, + .stop = stm32l4_stop, + .keepalive = stm32l4_keepalive, + .getstatus = stm32l4_getstatus, + .settimeout = stm32l4_settimeout, + .capture = NULL, + .ioctl = NULL, +}; + +/* "Lower half" driver state */ + +static struct stm32l4_lowerhalf_s g_wdgdev; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32l4_getreg + * + * Description: + * Get the contents of an STM32 IWDG register + * + ****************************************************************************/ + +#ifdef CONFIG_STM32_IWDG_REGDEBUG +static uint16_t stm32l4_getreg(uint32_t addr) +{ + static uint32_t prevaddr = 0; + static uint32_t count = 0; + static uint16_t preval = 0; + + /* Read the value from the register */ + + uint16_t val = getreg16(addr); + + /* Is this the same value that we read from the same register last time? Are + * we polling the register? If so, suppress some of the output. + */ + + if (addr == prevaddr && val == preval) + { + if (count == 0xffffffff || ++count > 3) + { + if (count == 4) + { + wdinfo("...\n"); + } + + return val; + } + } + + /* No this is a new address or value */ + + else + { + /* Did we print "..." for the previous value? */ + + if (count > 3) + { + /* Yes.. then show how many times the value repeated */ + + wdinfo("[repeats %d more times]\n", count-3); + } + + /* Save the new address, value, and count */ + + prevaddr = addr; + preval = val; + count = 1; + } + + /* Show the register value read */ + + wdinfo("%08x->%04x\n", addr, val); + return val; +} +#endif + +/**************************************************************************** + * Name: stm32l4_putreg + * + * Description: + * Set the contents of an STM32 register to a value + * + ****************************************************************************/ + +#ifdef CONFIG_STM32L4_IWDG_REGDEBUG +static void stm32l4_putreg(uint16_t val, uint32_t addr) +{ + /* Show the register value being written */ + + wdinfo("%08x<-%04x\n", addr, val); + + /* Write the value */ + + putreg16(val, addr); +} +#endif + +/**************************************************************************** + * Name: stm32l4_setprescaler + * + * Description: + * Set up the prescaler and reload values. + * + * Input Parameters: + * priv - A pointer the internal representation of the "lower-half" + * driver state structure. + * + ****************************************************************************/ + +static inline void stm32l4_setprescaler(FAR struct stm32l4_lowerhalf_s *priv) +{ + irqstate_t flags; + + flags = enter_critical_section(); + + /* Enable write access to IWDG_PR and IWDG_RLR registers */ + + stm32l4_putreg(IWDG_KR_KEY_ENABLE, STM32L4_IWDG_KR); + + /* Wait for the PVU and RVU bits to be reset by hardware. These bits + * were set the last time that the PR register was written and may not + * yet be cleared. + */ + + while ((stm32l4_getreg(STM32L4_IWDG_SR) & (IWDG_SR_PVU | IWDG_SR_RVU)) != 0); + + /* Set the prescaler */ + + stm32l4_putreg((uint16_t)priv->prescaler << IWDG_PR_SHIFT, STM32L4_IWDG_PR); + + /* Set the reload value */ + + stm32l4_putreg((uint16_t)priv->reload, STM32L4_IWDG_RLR); + + /* Reload the counter (and disable write access) */ + + stm32l4_putreg(IWDG_KR_KEY_RELOAD, STM32L4_IWDG_KR); + + /* Wait for the PVU and RVU bits to be reset by hardware. This is + * to wait for the change to take effect before exiting critical section, + * as we are not allowed to enter any low-power modes while this update is + * in progress. + * + * REVISIT: PVU and RVU don't get cleared as promised, until the IWDG is + * started by writing IWDG_KR_KEY_START into IWDG_KR, regardless of whether + * LSI has been started explicitly previously, or not. RM does not document + * this behavior. Lets hope no low-power mode entry happens in this case + * during the next up to five RC 40 kHz cycles. + */ + + if (priv->started) + { + while ((stm32l4_getreg(STM32L4_IWDG_SR) & (IWDG_SR_PVU | IWDG_SR_RVU)) != 0); + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: stm32l4_start + * + * Description: + * Start the watchdog timer, resetting the time to the current timeout, + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int stm32l4_start(FAR struct watchdog_lowerhalf_s *lower) +{ + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; + irqstate_t flags; + + wdinfo("Entry: started=%d\n"); + DEBUGASSERT(priv); + + /* Have we already been started? */ + + if (!priv->started) + { + /* Set up prescaler and reload value for the selected timeout before + * starting the watchdog timer. + */ + + stm32l4_setprescaler(priv); + + /* Enable IWDG (the LSI oscillator will be enabled by hardware). NOTE: + * If the "Hardware watchdog" feature is enabled through the device option + * bits, the watchdog is automatically enabled at power-on. + */ + + flags = enter_critical_section(); + stm32l4_putreg(IWDG_KR_KEY_START, STM32L4_IWDG_KR); + priv->lastreset = clock_systimer(); + priv->started = true; + leave_critical_section(flags); + } + + return OK; +} + +/**************************************************************************** + * Name: stm32l4_stop + * + * Description: + * Stop the watchdog timer + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int stm32l4_stop(FAR struct watchdog_lowerhalf_s *lower) +{ + /* There is no way to disable the IDWG timer once it has been started */ + + wdinfo("Entry\n"); + return -ENOSYS; +} + +/**************************************************************************** + * Name: stm32l4_keepalive + * + * Description: + * Reset the watchdog timer to the current timeout value, prevent any + * imminent watchdog timeouts. This is sometimes referred as "pinging" + * the watchdog timer or "petting the dog". + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int stm32l4_keepalive(FAR struct watchdog_lowerhalf_s *lower) +{ + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; + irqstate_t flags; + + wdinfo("Entry\n"); + + /* Reload the IWDG timer */ + + flags = enter_critical_section(); + stm32l4_putreg(IWDG_KR_KEY_RELOAD, STM32L4_IWDG_KR); + priv->lastreset = clock_systimer(); + leave_critical_section(flags); + + return OK; +} + +/**************************************************************************** + * Name: stm32l4_getstatus + * + * Description: + * Get the current watchdog timer status + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * status - The location to return the watchdog status information. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int stm32l4_getstatus(FAR struct watchdog_lowerhalf_s *lower, + FAR struct watchdog_status_s *status) +{ + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; + uint32_t ticks; + uint32_t elapsed; + + wdinfo("Entry\n"); + DEBUGASSERT(priv); + + /* Return the status bit */ + + status->flags = WDFLAGS_RESET; + if (priv->started) + { + status->flags |= WDFLAGS_ACTIVE; + } + + /* Return the actual timeout in milliseconds */ + + status->timeout = priv->timeout; + + /* Get the elapsed time since the last ping */ + + ticks = clock_systimer() - priv->lastreset; + elapsed = (int32_t)TICK2MSEC(ticks); + + if (elapsed > priv->timeout) + { + elapsed = priv->timeout; + } + + /* Return the approximate time until the watchdog timer expiration */ + + status->timeleft = priv->timeout - elapsed; + + wdinfo("Status :\n"); + wdinfo(" flags : %08x\n", status->flags); + wdinfo(" timeout : %d\n", status->timeout); + wdinfo(" timeleft : %d\n", status->timeleft); + return OK; +} + +/**************************************************************************** + * Name: stm32l4_settimeout + * + * Description: + * Set a new timeout value (and reset the watchdog timer) + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * timeout - The new timeout value in milliseconds. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int stm32l4_settimeout(FAR struct watchdog_lowerhalf_s *lower, + uint32_t timeout) +{ + FAR struct stm32l4_lowerhalf_s *priv = (FAR struct stm32l4_lowerhalf_s *)lower; + uint32_t fiwdg; + uint64_t reload; + int prescaler; + int shift; + + wdinfo("Entry: timeout=%d\n", timeout); + DEBUGASSERT(priv); + + /* Can this timeout be represented? */ + + if (timeout < 1 || timeout > IWDG_MAXTIMEOUT) + { + wderr("ERROR: Cannot represent timeout=%d > %d\n", + timeout, IWDG_MAXTIMEOUT); + return -ERANGE; + } + + /* Select the smallest prescaler that will result in a reload value that is + * less than the maximum. + */ + + for (prescaler = 0; ; prescaler++) + { + /* PR = 0 -> Divider = 4 = 1 << 2 + * PR = 1 -> Divider = 8 = 1 << 3 + * PR = 2 -> Divider = 16 = 1 << 4 + * PR = 3 -> Divider = 32 = 1 << 5 + * PR = 4 -> Divider = 64 = 1 << 6 + * PR = 5 -> Divider = 128 = 1 << 7 + * PR = 6 -> Divider = 256 = 1 << 8 + * PR = n -> Divider = 1 << (n+2) + */ + + shift = prescaler + 2; + + /* Get the IWDG counter frequency in Hz. For a nominal 32Khz LSI clock, + * this is value in the range of 7500 and 125. + */ + + fiwdg = priv->lsifreq >> shift; + + /* We want: + * 1000 * reload / Fiwdg = timeout + * Or: + * reload = Fiwdg * timeout / 1000 + */ + + reload = (uint64_t)fiwdg * (uint64_t)timeout / 1000; + + /* If this reload valid is less than the maximum or we are not ready + * at the prescaler value, then break out of the loop to use these + * settings. + */ + + if (reload <= IWDG_RLR_MAX || prescaler == 6) + { + /* Note that we explicitly break out of the loop rather than using + * the 'for' loop termination logic because we do not want the + * value of prescaler to be incremented. + */ + + break; + } + } + + /* Make sure that the final reload value is within range */ + + if (reload > IWDG_RLR_MAX) + { + reload = IWDG_RLR_MAX; + } + + /* Get the actual timeout value in milliseconds. + * + * We have: + * reload = Fiwdg * timeout / 1000 + * So we want: + * timeout = 1000 * reload / Fiwdg + */ + + priv->timeout = (1000 * (uint32_t)reload) / fiwdg; + + /* Save setup values for later use */ + + priv->prescaler = prescaler; + priv->reload = reload; + + /* Write the prescaler and reload values to the IWDG registers. */ + + if (priv->started) + { + stm32l4_setprescaler(priv); + } + + wdinfo("prescaler=%d fiwdg=%d reload=%d\n", prescaler, fiwdg, reload); + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32l4_iwdginitialize + * + * Description: + * Initialize the IWDG watchdog timer. The watchdog timer is initialized and + * registers as 'devpath'. The initial state of the watchdog timer is + * disabled. + * + * Input Parameters: + * devpath - The full path to the watchdog. This should be of the form + * /dev/watchdog0 + * lsifreq - The calibrated LSI clock frequency + * + * Returned Values: + * None + * + ****************************************************************************/ + +void stm32l4_iwdginitialize(FAR const char *devpath, uint32_t lsifreq) +{ + FAR struct stm32l4_lowerhalf_s *priv = &g_wdgdev; + uint32_t cr; + + wdinfo("Entry: devpath=%s lsifreq=%d\n", devpath, lsifreq); + + /* NOTE we assume that clocking to the IWDG has already been provided by + * the RCC initialization logic. + */ + + /* Initialize the driver state structure. */ + + priv->ops = &g_wdgops; + priv->lsifreq = lsifreq; + priv->started = false; + + /* Make sure that the LSI oscillator is enabled. NOTE: The LSI oscillator + * is enabled here but is not disabled by this file, because this file does + * not know the global usage of the oscillator. Any clock management + * logic (say, as part of a power management scheme) needs handle other + * LSI controls outside of this file. + */ + + stm32l4_rcc_enablelsi(); + wdinfo("RCC CSR: %08x\n", getreg32(STM32L4_RCC_CSR)); + + /* Select an arbitrary initial timeout value. But don't start the watchdog + * yet. NOTE: If the "Hardware watchdog" feature is enabled through the + * device option bits, the watchdog is automatically enabled at power-on. + */ + + stm32l4_settimeout((FAR struct watchdog_lowerhalf_s *)priv, CONFIG_STM32L4_IWDG_DEFTIMOUT); + + /* Register the watchdog driver as /dev/watchdog0 */ + + (void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv); + + /* When the microcontroller enters debug mode (Cortex-M4F core halted), + * the IWDG counter either continues to work normally or stops, depending + * on DBG_IWDG_STOP configuration bit in DBG module. + */ + + cr = getreg32(STM32_DBGMCU_APB1_FZ); + cr |= DBGMCU_APB1_IWDGSTOP; + putreg32(cr, STM32_DBGMCU_APB1_FZ); +} + +#endif /* CONFIG_WATCHDOG && CONFIG_STM32L4_IWDG */ diff --git a/arch/arm/src/stm32l4/stm32l4_lsi.c b/arch/arm/src/stm32l4/stm32l4_lsi.c new file mode 100644 index 00000000000..cc0a8d64bf1 --- /dev/null +++ b/arch/arm/src/stm32l4/stm32l4_lsi.c @@ -0,0 +1,87 @@ +/**************************************************************************** + * arch/arm/src/stm32l4/stm32l4_lsi.c + * + * Copyright (C) 2012, 2015-2017 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Juha Niskanen + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include "up_arch.h" +#include "stm32l4_rcc.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32l4_rcc_enablelsi + * + * Description: + * Enable the Internal Low-Speed (LSI) RC Oscillator. + * + ****************************************************************************/ + +void stm32l4_rcc_enablelsi(void) +{ + /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION + * bit the RCC CSR register. + */ + + modifyreg32(STM32L4_RCC_CSR, 0, RCC_CSR_LSION); + + /* Wait for the internal LSI oscillator to be stable. */ + + while ((getreg32(STM32L4_RCC_CSR) & RCC_CSR_LSIRDY) == 0); +} + +/**************************************************************************** + * Name: stm32l4_rcc_disablelsi + * + * Description: + * Disable the Internal Low-Speed (LSI) RC Oscillator. + * + ****************************************************************************/ + +void stm32l4_rcc_disablelsi(void) +{ + /* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION + * bit the RCC CSR register. + */ + + modifyreg32(STM32L4_RCC_CSR, RCC_CSR_LSION, 0); + + /* LSIRDY should go low after 3 LSI clock cycles */ +} diff --git a/arch/arm/src/stm32l4/stm32l4_otgfshost.c b/arch/arm/src/stm32l4/stm32l4_otgfshost.c index 573cf892a5e..aadae1721c6 100644 --- a/arch/arm/src/stm32l4/stm32l4_otgfshost.c +++ b/arch/arm/src/stm32l4/stm32l4_otgfshost.c @@ -1956,14 +1956,25 @@ static ssize_t stm32l4_in_transfer(FAR struct stm32l4_usbhost_s *priv, delay = 1000; } - /* Wait for the next polling interval. + /* Wait for the next polling interval. For interrupt and + * isochronous endpoints, this is necessaryto assure the + * polling interval. It is used in other cases only to + * prevent the polling from consuming too much CPU bandwith. * - * REVISIT: This delay could require more resolution than - * is provided by the system timer. In that case, the - * delay could be significantly longer than required. + * Small delays could require more resolution than is provided + * by the system timer. For example, if the system timer + * resolution is 10MS, then usleep(1000) will actually request + * a delay 20MS (due to both quantization and rounding). + * + * REVISIT: So which is better? To ignore tiny delays and + * hog the system bandwidth? Or to wait for an excessive + * amount and destroy system throughput? */ - usleep(delay); + if (delay > CONFIG_USEC_PER_TICK) + { + usleep(delay - CONFIG_USEC_PER_TICK); + } } } else diff --git a/arch/arm/src/stm32l4/stm32l4_serial.c b/arch/arm/src/stm32l4/stm32l4_serial.c index 15b9cbd120c..f1a5550212c 100644 --- a/arch/arm/src/stm32l4/stm32l4_serial.c +++ b/arch/arm/src/stm32l4/stm32l4_serial.c @@ -765,11 +765,11 @@ static inline void stm32l4serial_putreg(FAR struct stm32l4_serial_s *priv, } /**************************************************************************** - * Name: stm32l4serial_restoreusartint + * Name: stm32l4serial_setusartint ****************************************************************************/ -static void stm32l4serial_restoreusartint(FAR struct stm32l4_serial_s *priv, - uint16_t ie) +static inline void stm32l4serial_setusartint(FAR struct stm32l4_serial_s *priv, + uint16_t ie) { uint32_t cr; @@ -790,13 +790,33 @@ static void stm32l4serial_restoreusartint(FAR struct stm32l4_serial_s *priv, stm32l4serial_putreg(priv, STM32L4_USART_CR3_OFFSET, cr); } +/**************************************************************************** + * Name: up_restoreusartint + ****************************************************************************/ + +static void stm32l4serial_restoreusartint(FAR struct stm32l4_serial_s *priv, + uint16_t ie) +{ + irqstate_t flags; + + flags = enter_critical_section(); + + stm32l4serial_setusartint(priv, ie); + + leave_critical_section(flags); +} + /**************************************************************************** * Name: stm32l4serial_disableusartint ****************************************************************************/ -static inline void stm32l4serial_disableusartint(FAR struct stm32l4_serial_s *priv, - FAR uint16_t *ie) +static void stm32l4serial_disableusartint(FAR struct stm32l4_serial_s *priv, + FAR uint16_t *ie) { + irqstate_t flags; + + flags = enter_critical_section(); + if (ie) { uint32_t cr1; @@ -833,7 +853,9 @@ static inline void stm32l4serial_disableusartint(FAR struct stm32l4_serial_s *pr /* Disable all interrupts */ - stm32l4serial_restoreusartint(priv, 0); + stm32l4serial_setusartint(priv, 0); + + leave_critical_section(flags); } /**************************************************************************** diff --git a/arch/arm/src/stm32l4/stm32l4_wdg.h b/arch/arm/src/stm32l4/stm32l4_wdg.h index e69de29bb2d..794c5e2aef8 100644 --- a/arch/arm/src/stm32l4/stm32l4_wdg.h +++ b/arch/arm/src/stm32l4/stm32l4_wdg.h @@ -0,0 +1,119 @@ +/**************************************************************************** + * arch/arm/src/stm32l4/stm32l4_wdg.h + * + * Copyright (C) 2012, 2015, 2017 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32L4_STM32L4_WDG_H +#define __ARCH_ARM_SRC_STM32L4_STM32L4_WDG_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip.h" +#include "chip/stm32l4_wdg.h" + +#ifdef CONFIG_WATCHDOG + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32l4_iwdginitialize + * + * Description: + * Initialize the IWDG watchdog time. The watchdog timer is initialized + * and registers as 'devpath. The initial state of the watchdog time is + * disabled. + * + * Input Parameters: + * devpath - The full path to the watchdog. This should be of the form + * /dev/watchdog0 + * lsifreq - The calibrated LSI clock frequency + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_STM32L4_IWDG +void stm32l4_iwdginitialize(FAR const char *devpath, uint32_t lsifreq); +#endif + +/**************************************************************************** + * Name: stm32l4_wwdginitialize + * + * Description: + * Initialize the WWDG watchdog time. The watchdog timer is initialized and + * registers as 'devpath. The initial state of the watchdog time is + * disabled. + * + * Input Parameters: + * devpath - The full path to the watchdog. This should be of the form + * /dev/watchdog0 + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_STM32L4_WWDG +void stm32l4_wwdginitialize(FAR const char *devpath); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* CONFIG_WATCHDOG */ +#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_WDG_H */ diff --git a/arch/arm/src/tiva/tiva_i2c.c b/arch/arm/src/tiva/tiva_i2c.c index 86bea9cef65..6cc2d5fbe19 100644 --- a/arch/arm/src/tiva/tiva_i2c.c +++ b/arch/arm/src/tiva/tiva_i2c.c @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/tiva/tiva_i2c.c * - * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2014-2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * The basic structure of this driver derives in spirit (if nothing more) from the @@ -1378,7 +1378,7 @@ static int tiva_i2c_process(struct tiva_i2c_priv_s *priv, uint32_t status) * ************************************************************************************/ -#if !defined(CONFIG_I2C_POLLED) && defined(CONFIG_TIVA_I2C0) +#ifndef CONFIG_I2C_POLLED static int tiva_i2c_interrupt(int irq, void *context, void *arg) { struct tiva_i2c_priv_s *priv = (struct tiva_i2c_priv_s *)arg; diff --git a/binfmt/libelf/libelf_dtors.c b/binfmt/libelf/libelf_dtors.c index 6d0b0cff1a4..9e10f703f72 100644 --- a/binfmt/libelf/libelf_dtors.c +++ b/binfmt/libelf/libelf_dtors.c @@ -163,14 +163,14 @@ int elf_loaddtors(FAR struct elf_loadinfo_s *loadinfo) { /* Allocate memory to hold a copy of the .dtor section */ - loadinfo->ctoralloc = (binfmt_dtor_t *)kumm_malloc(dtorsize); - if (!loadinfo->ctoralloc) + loadinfo->dtoralloc = (binfmt_dtor_t *)kumm_malloc(dtorsize); + if (!loadinfo->dtoralloc) { berr("Failed to allocate memory for .dtors\n"); return -ENOMEM; } - loadinfo->dtors = (binfmt_dtor_t *)loadinfo->ctoralloc; + loadinfo->dtors = (binfmt_dtor_t *)loadinfo->dtoralloc; /* Read the section header table into memory */ diff --git a/configs/arduino-due/nsh/defconfig b/configs/arduino-due/nsh/defconfig index a43823cce61..e1101645f96 100644 --- a/configs/arduino-due/nsh/defconfig +++ b/configs/arduino-due/nsh/defconfig @@ -124,8 +124,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/bambino-200e/netnsh/defconfig b/configs/bambino-200e/netnsh/defconfig index 7b3e53b6ccd..5cad2e7172a 100644 --- a/configs/bambino-200e/netnsh/defconfig +++ b/configs/bambino-200e/netnsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc43xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/bambino-200e/nsh/defconfig b/configs/bambino-200e/nsh/defconfig index 3d4282dbc83..fc72cef1ae0 100644 --- a/configs/bambino-200e/nsh/defconfig +++ b/configs/bambino-200e/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc43xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/bambino-200e/usbnsh/defconfig b/configs/bambino-200e/usbnsh/defconfig index 01f5f865615..558c13c30ee 100644 --- a/configs/bambino-200e/usbnsh/defconfig +++ b/configs/bambino-200e/usbnsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc43xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/c5471evm/httpd/defconfig b/configs/c5471evm/httpd/defconfig index 763da2a5bd1..227ca4a58a6 100644 --- a/configs/c5471evm/httpd/defconfig +++ b/configs/c5471evm/httpd/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="c5471" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/c5471evm/nettest/defconfig b/configs/c5471evm/nettest/defconfig index 72dc20b6f1b..7df297ee2c8 100644 --- a/configs/c5471evm/nettest/defconfig +++ b/configs/c5471evm/nettest/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="c5471" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/c5471evm/nsh/defconfig b/configs/c5471evm/nsh/defconfig index bb9f4857009..5dff7fac5f2 100644 --- a/configs/c5471evm/nsh/defconfig +++ b/configs/c5471evm/nsh/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="c5471" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/cc3200-launchpad/nsh/defconfig b/configs/cc3200-launchpad/nsh/defconfig index 0c3ea5e93d1..f0db72f06e5 100644 --- a/configs/cc3200-launchpad/nsh/defconfig +++ b/configs/cc3200-launchpad/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/clicker2-stm32/knsh/defconfig b/configs/clicker2-stm32/knsh/defconfig index 5a4d128ac29..caa991f103e 100644 --- a/configs/clicker2-stm32/knsh/defconfig +++ b/configs/clicker2-stm32/knsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/clicker2-stm32/mrf24j40-radio/defconfig b/configs/clicker2-stm32/mrf24j40-radio/defconfig index 95adaa70127..b258d177c3f 100644 --- a/configs/clicker2-stm32/mrf24j40-radio/defconfig +++ b/configs/clicker2-stm32/mrf24j40-radio/defconfig @@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y # # Build Configuration # -# CONFIG_APPS_DIR="../apps" +CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set @@ -980,8 +979,7 @@ CONFIG_IOB_NCHAINS=0 # CONFIG_WIRELESS=y CONFIG_WIRELESS_IEEE802154=y -CONFIG_IEEE802154_MAC=y -# CONFIG_IEEE802154_MAC_DEV is not set +CONFIG_IEEE802154_MAC_DEV=y CONFIG_MAC802154_HPWORK=y CONFIG_IEEE802154_NTXDESC=3 CONFIG_IEEE802154_IND_PREALLOC=20 @@ -1164,10 +1162,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set -# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXLINES is not set # CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set @@ -1372,7 +1370,7 @@ CONFIG_READLINE_ECHO=y # # IEEE 802.15.4 applications # -# CONFIG_IEEE802154_LIBMAC is not set +CONFIG_IEEE802154_LIBMAC=y CONFIG_IEEE802154_LIBUTILS=y CONFIG_IEEE802154_I8SAK=y CONFIG_IEEE802154_I8SAK_PRIORITY=100 diff --git a/configs/clicker2-stm32/nsh/defconfig b/configs/clicker2-stm32/nsh/defconfig index 02dc18e067c..ae4b8ff23cd 100644 --- a/configs/clicker2-stm32/nsh/defconfig +++ b/configs/clicker2-stm32/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/clicker2-stm32/src/stm32_mrf24j40.c b/configs/clicker2-stm32/src/stm32_mrf24j40.c index c92b93239b8..c89b28b8385 100644 --- a/configs/clicker2-stm32/src/stm32_mrf24j40.c +++ b/configs/clicker2-stm32/src/stm32_mrf24j40.c @@ -1,5 +1,5 @@ /**************************************************************************** - * configs/freedom-kl25z/src/stm32_mrf24j40.c + * configs/clicker2-stm32/src/stm32_mrf24j40.c * * Copyright (C) 2017 Gregory Nutt, All rights reserver * Author: Gregory Nutt @@ -220,9 +220,7 @@ static void stm32_enable_irq(FAR const struct mrf24j40_lower_s *lower, static int stm32_mrf24j40_devsetup(FAR struct stm32_priv_s *priv) { FAR struct ieee802154_radio_s *radio; -#ifdef CONFIG_IEEE802154_MAC MACHANDLE mac; -#endif FAR struct spi_dev_s *spi; int ret; @@ -248,7 +246,6 @@ static int stm32_mrf24j40_devsetup(FAR struct stm32_priv_s *priv) return -ENODEV; } -#if defined(CONFIG_IEEE802154_MAC) /* Create a 802.15.4 MAC device from a 802.15.4 compatible radio device. */ mac = mac802154_create(radio); @@ -285,8 +282,6 @@ static int stm32_mrf24j40_devsetup(FAR struct stm32_priv_s *priv) } #endif -#endif /* CONFIG_IEEE802154_MAC */ - return OK; } diff --git a/configs/clicker2-stm32/usbnsh/defconfig b/configs/clicker2-stm32/usbnsh/defconfig index 943e8a7cc83..c82313ce756 100644 --- a/configs/clicker2-stm32/usbnsh/defconfig +++ b/configs/clicker2-stm32/usbnsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/cloudctrl/nsh/defconfig b/configs/cloudctrl/nsh/defconfig index f14809e3f84..5f87a306d19 100644 --- a/configs/cloudctrl/nsh/defconfig +++ b/configs/cloudctrl/nsh/defconfig @@ -130,8 +130,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/dk-tm4c129x/ipv6/defconfig b/configs/dk-tm4c129x/ipv6/defconfig index 86189d524b4..0e082999173 100644 --- a/configs/dk-tm4c129x/ipv6/defconfig +++ b/configs/dk-tm4c129x/ipv6/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/dk-tm4c129x/nsh/defconfig b/configs/dk-tm4c129x/nsh/defconfig index 92a8d79c741..8b8ea559d07 100644 --- a/configs/dk-tm4c129x/nsh/defconfig +++ b/configs/dk-tm4c129x/nsh/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/ea3131/nsh/defconfig b/configs/ea3131/nsh/defconfig index dc4dd7bff8b..5820f7eb959 100644 --- a/configs/ea3131/nsh/defconfig +++ b/configs/ea3131/nsh/defconfig @@ -127,8 +127,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc31xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/ea3131/pgnsh/defconfig b/configs/ea3131/pgnsh/defconfig index 1d6a5864ac1..c70463809ca 100644 --- a/configs/ea3131/pgnsh/defconfig +++ b/configs/ea3131/pgnsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc31xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/ea3131/usbserial/defconfig b/configs/ea3131/usbserial/defconfig index 4a502be9b7b..6acce61b13b 100644 --- a/configs/ea3131/usbserial/defconfig +++ b/configs/ea3131/usbserial/defconfig @@ -127,8 +127,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc31xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/ea3152/ostest/defconfig b/configs/ea3152/ostest/defconfig index 74acabf1d26..188d64ca4a0 100644 --- a/configs/ea3152/ostest/defconfig +++ b/configs/ea3152/ostest/defconfig @@ -127,8 +127,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc31xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/eagle100/httpd/defconfig b/configs/eagle100/httpd/defconfig index d18b5ce5139..2f5fac899db 100644 --- a/configs/eagle100/httpd/defconfig +++ b/configs/eagle100/httpd/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/eagle100/nettest/defconfig b/configs/eagle100/nettest/defconfig index 91197d61e3e..bec8a97047a 100644 --- a/configs/eagle100/nettest/defconfig +++ b/configs/eagle100/nettest/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/eagle100/nsh/defconfig b/configs/eagle100/nsh/defconfig index 34b86ded78a..ffa99ab8cad 100644 --- a/configs/eagle100/nsh/defconfig +++ b/configs/eagle100/nsh/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/eagle100/nxflat/defconfig b/configs/eagle100/nxflat/defconfig index c6af5b59d55..7f14f435536 100644 --- a/configs/eagle100/nxflat/defconfig +++ b/configs/eagle100/nxflat/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/eagle100/thttpd/defconfig b/configs/eagle100/thttpd/defconfig index fc7aef90614..b7858460afb 100644 --- a/configs/eagle100/thttpd/defconfig +++ b/configs/eagle100/thttpd/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/efm32-g8xx-stk/nsh/defconfig b/configs/efm32-g8xx-stk/nsh/defconfig index 999021c2315..2b1e12ffe08 100644 --- a/configs/efm32-g8xx-stk/nsh/defconfig +++ b/configs/efm32-g8xx-stk/nsh/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="efm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/efm32gg-stk3700/nsh/defconfig b/configs/efm32gg-stk3700/nsh/defconfig index 73141e3451d..8118f915cab 100644 --- a/configs/efm32gg-stk3700/nsh/defconfig +++ b/configs/efm32gg-stk3700/nsh/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="efm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/ekk-lm3s9b96/nsh/defconfig b/configs/ekk-lm3s9b96/nsh/defconfig index a9fb835bb87..d2eabf737b0 100644 --- a/configs/ekk-lm3s9b96/nsh/defconfig +++ b/configs/ekk-lm3s9b96/nsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/fire-stm32v2/nsh/defconfig b/configs/fire-stm32v2/nsh/defconfig index 1255771f4a3..53063ac7af0 100644 --- a/configs/fire-stm32v2/nsh/defconfig +++ b/configs/fire-stm32v2/nsh/defconfig @@ -130,8 +130,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/freedom-k64f/netnsh/defconfig b/configs/freedom-k64f/netnsh/defconfig index bcac9353a24..691747b2861 100644 --- a/configs/freedom-k64f/netnsh/defconfig +++ b/configs/freedom-k64f/netnsh/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/freedom-k64f/nsh/defconfig b/configs/freedom-k64f/nsh/defconfig index 9494c766b79..47e37626e8c 100644 --- a/configs/freedom-k64f/nsh/defconfig +++ b/configs/freedom-k64f/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/freedom-k66f/netnsh/defconfig b/configs/freedom-k66f/netnsh/defconfig index 71f0cd33b28..97e053710c0 100644 --- a/configs/freedom-k66f/netnsh/defconfig +++ b/configs/freedom-k66f/netnsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/freedom-k66f/nsh/defconfig b/configs/freedom-k66f/nsh/defconfig index c1b4346b06b..3ba8a3d2796 100644 --- a/configs/freedom-k66f/nsh/defconfig +++ b/configs/freedom-k66f/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/freedom-kl25z/nsh/defconfig b/configs/freedom-kl25z/nsh/defconfig index 44409adf6f5..7f1ca58fe70 100644 --- a/configs/freedom-kl25z/nsh/defconfig +++ b/configs/freedom-kl25z/nsh/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="kl" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/freedom-kl26z/nsh/defconfig b/configs/freedom-kl26z/nsh/defconfig index fc1c40a7593..9c5d47ab793 100644 --- a/configs/freedom-kl26z/nsh/defconfig +++ b/configs/freedom-kl26z/nsh/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="kl" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/hymini-stm32v/nsh/defconfig b/configs/hymini-stm32v/nsh/defconfig index fe68926811c..7df3f16f96f 100644 --- a/configs/hymini-stm32v/nsh/defconfig +++ b/configs/hymini-stm32v/nsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/hymini-stm32v/nsh2/defconfig b/configs/hymini-stm32v/nsh2/defconfig index ee5e4f93f1e..78b8a93b109 100644 --- a/configs/hymini-stm32v/nsh2/defconfig +++ b/configs/hymini-stm32v/nsh2/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/hymini-stm32v/usbmsc/defconfig b/configs/hymini-stm32v/usbmsc/defconfig index eec91e46a45..aa41f35bfb2 100644 --- a/configs/hymini-stm32v/usbmsc/defconfig +++ b/configs/hymini-stm32v/usbmsc/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/hymini-stm32v/usbnsh/defconfig b/configs/hymini-stm32v/usbnsh/defconfig index 239c6c23836..f8bdf8cd52d 100644 --- a/configs/hymini-stm32v/usbnsh/defconfig +++ b/configs/hymini-stm32v/usbnsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/hymini-stm32v/usbserial/defconfig b/configs/hymini-stm32v/usbserial/defconfig index e5ec56e3e1c..7ea3f00e648 100644 --- a/configs/hymini-stm32v/usbserial/defconfig +++ b/configs/hymini-stm32v/usbserial/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/kwikstik-k40/ostest/defconfig b/configs/kwikstik-k40/ostest/defconfig index 17e0f84d149..6234ea74dd5 100644 --- a/configs/kwikstik-k40/ostest/defconfig +++ b/configs/kwikstik-k40/ostest/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/launchxl-tms57004/nsh/defconfig b/configs/launchxl-tms57004/nsh/defconfig index 22236f0c960..d48b4c9b34c 100644 --- a/configs/launchxl-tms57004/nsh/defconfig +++ b/configs/launchxl-tms57004/nsh/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXR4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-r" CONFIG_ARCH_CHIP="tms570" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/lincoln60/netnsh/defconfig b/configs/lincoln60/netnsh/defconfig index 40dfb528ef4..8e2ddd336b5 100644 --- a/configs/lincoln60/netnsh/defconfig +++ b/configs/lincoln60/netnsh/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lincoln60/nsh/defconfig b/configs/lincoln60/nsh/defconfig index 5151256ba65..099a29380dc 100644 --- a/configs/lincoln60/nsh/defconfig +++ b/configs/lincoln60/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lincoln60/thttpd-binfs/defconfig b/configs/lincoln60/thttpd-binfs/defconfig index 4f4316e9c78..fe524e1cab6 100644 --- a/configs/lincoln60/thttpd-binfs/defconfig +++ b/configs/lincoln60/thttpd-binfs/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lm3s6432-s2e/nsh/defconfig b/configs/lm3s6432-s2e/nsh/defconfig index fe849d782cf..7f4046a18b2 100644 --- a/configs/lm3s6432-s2e/nsh/defconfig +++ b/configs/lm3s6432-s2e/nsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lm3s6965-ek/discover/defconfig b/configs/lm3s6965-ek/discover/defconfig index 305695abfba..fa9015122c1 100644 --- a/configs/lm3s6965-ek/discover/defconfig +++ b/configs/lm3s6965-ek/discover/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lm3s6965-ek/nsh/defconfig b/configs/lm3s6965-ek/nsh/defconfig index 305695abfba..fa9015122c1 100644 --- a/configs/lm3s6965-ek/nsh/defconfig +++ b/configs/lm3s6965-ek/nsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lm3s6965-ek/nx/defconfig b/configs/lm3s6965-ek/nx/defconfig index 890bf26a43b..38ca2f3c28c 100644 --- a/configs/lm3s6965-ek/nx/defconfig +++ b/configs/lm3s6965-ek/nx/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lm3s6965-ek/tcpecho/defconfig b/configs/lm3s6965-ek/tcpecho/defconfig index ff3212eaae8..b7f9e0a3ff9 100644 --- a/configs/lm3s6965-ek/tcpecho/defconfig +++ b/configs/lm3s6965-ek/tcpecho/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lm3s8962-ek/nsh/defconfig b/configs/lm3s8962-ek/nsh/defconfig index 86971dec847..96b19a018db 100644 --- a/configs/lm3s8962-ek/nsh/defconfig +++ b/configs/lm3s8962-ek/nsh/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lm3s8962-ek/nx/defconfig b/configs/lm3s8962-ek/nx/defconfig index dfa23602926..c78f7a54f22 100644 --- a/configs/lm3s8962-ek/nx/defconfig +++ b/configs/lm3s8962-ek/nx/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lm4f120-launchpad/nsh/defconfig b/configs/lm4f120-launchpad/nsh/defconfig index b62982b2d45..723ef7ac642 100644 --- a/configs/lm4f120-launchpad/nsh/defconfig +++ b/configs/lm4f120-launchpad/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lpc4330-xplorer/nsh/defconfig b/configs/lpc4330-xplorer/nsh/defconfig index 15fdeb23a5b..b133fea0227 100644 --- a/configs/lpc4330-xplorer/nsh/defconfig +++ b/configs/lpc4330-xplorer/nsh/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc43xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/lpc4337-ws/nsh/defconfig b/configs/lpc4337-ws/nsh/defconfig index 85c38182c05..b228af1f605 100644 --- a/configs/lpc4337-ws/nsh/defconfig +++ b/configs/lpc4337-ws/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc43xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/lpc4357-evb/nsh/defconfig b/configs/lpc4357-evb/nsh/defconfig index f12eb6b565c..cd8935a19f9 100644 --- a/configs/lpc4357-evb/nsh/defconfig +++ b/configs/lpc4357-evb/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc43xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/lpc4370-link2/nsh/defconfig b/configs/lpc4370-link2/nsh/defconfig index e8c417a6381..81a79dfeb56 100644 --- a/configs/lpc4370-link2/nsh/defconfig +++ b/configs/lpc4370-link2/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc43xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/lpcxpresso-lpc1115/nsh/defconfig b/configs/lpcxpresso-lpc1115/nsh/defconfig index deeddca94b0..d46c1d2b71f 100644 --- a/configs/lpcxpresso-lpc1115/nsh/defconfig +++ b/configs/lpcxpresso-lpc1115/nsh/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="lpc11xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/lpcxpresso-lpc1768/dhcpd/defconfig b/configs/lpcxpresso-lpc1768/dhcpd/defconfig index 6e8638e71dc..185cbfeeae5 100644 --- a/configs/lpcxpresso-lpc1768/dhcpd/defconfig +++ b/configs/lpcxpresso-lpc1768/dhcpd/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lpcxpresso-lpc1768/nsh/defconfig b/configs/lpcxpresso-lpc1768/nsh/defconfig index 1246035ad3b..5885acd549d 100644 --- a/configs/lpcxpresso-lpc1768/nsh/defconfig +++ b/configs/lpcxpresso-lpc1768/nsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lpcxpresso-lpc1768/nx/defconfig b/configs/lpcxpresso-lpc1768/nx/defconfig index 48816c4ef3d..d68db2998e4 100644 --- a/configs/lpcxpresso-lpc1768/nx/defconfig +++ b/configs/lpcxpresso-lpc1768/nx/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lpcxpresso-lpc1768/thttpd/defconfig b/configs/lpcxpresso-lpc1768/thttpd/defconfig index 60845d6a636..c854c8a66c7 100644 --- a/configs/lpcxpresso-lpc1768/thttpd/defconfig +++ b/configs/lpcxpresso-lpc1768/thttpd/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/lpcxpresso-lpc1768/usbmsc/defconfig b/configs/lpcxpresso-lpc1768/usbmsc/defconfig index ef5d2b4b476..3c0c09a6fdd 100644 --- a/configs/lpcxpresso-lpc1768/usbmsc/defconfig +++ b/configs/lpcxpresso-lpc1768/usbmsc/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/maple/nsh/defconfig b/configs/maple/nsh/defconfig index 5a9f920921a..0dbf9308c14 100644 --- a/configs/maple/nsh/defconfig +++ b/configs/maple/nsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/maple/nx/defconfig b/configs/maple/nx/defconfig index 7a3e6154303..083bfcf0533 100644 --- a/configs/maple/nx/defconfig +++ b/configs/maple/nx/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/maple/usbnsh/defconfig b/configs/maple/usbnsh/defconfig index b74195b5920..c2d7fb75aab 100644 --- a/configs/maple/usbnsh/defconfig +++ b/configs/maple/usbnsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/mbed/nsh/defconfig b/configs/mbed/nsh/defconfig index 98949e8db01..d72476da059 100644 --- a/configs/mbed/nsh/defconfig +++ b/configs/mbed/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/mcu123-lpc214x/composite/defconfig b/configs/mcu123-lpc214x/composite/defconfig index 4df7bb1f414..64d18989091 100644 --- a/configs/mcu123-lpc214x/composite/defconfig +++ b/configs/mcu123-lpc214x/composite/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc214x" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/mcu123-lpc214x/nsh/defconfig b/configs/mcu123-lpc214x/nsh/defconfig index eceeefccbaa..35d07253e05 100644 --- a/configs/mcu123-lpc214x/nsh/defconfig +++ b/configs/mcu123-lpc214x/nsh/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc214x" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/mcu123-lpc214x/usbmsc/defconfig b/configs/mcu123-lpc214x/usbmsc/defconfig index 8c544ff6818..516afa47202 100644 --- a/configs/mcu123-lpc214x/usbmsc/defconfig +++ b/configs/mcu123-lpc214x/usbmsc/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc214x" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/mcu123-lpc214x/usbserial/defconfig b/configs/mcu123-lpc214x/usbserial/defconfig index a0e67fe99bb..9e9a05c8d52 100644 --- a/configs/mcu123-lpc214x/usbserial/defconfig +++ b/configs/mcu123-lpc214x/usbserial/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc214x" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/mikroe-stm32f4/fulldemo/defconfig b/configs/mikroe-stm32f4/fulldemo/defconfig index e3bfddddd76..956df4df96b 100644 --- a/configs/mikroe-stm32f4/fulldemo/defconfig +++ b/configs/mikroe-stm32f4/fulldemo/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/mikroe-stm32f4/kostest/defconfig b/configs/mikroe-stm32f4/kostest/defconfig index 46e0e594fe3..df4088feca0 100644 --- a/configs/mikroe-stm32f4/kostest/defconfig +++ b/configs/mikroe-stm32f4/kostest/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/mikroe-stm32f4/nsh/defconfig b/configs/mikroe-stm32f4/nsh/defconfig index 5a7361f71b4..ac5595096fb 100644 --- a/configs/mikroe-stm32f4/nsh/defconfig +++ b/configs/mikroe-stm32f4/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/mikroe-stm32f4/nx/defconfig b/configs/mikroe-stm32f4/nx/defconfig index f725a5e05e3..b6d01b2b685 100644 --- a/configs/mikroe-stm32f4/nx/defconfig +++ b/configs/mikroe-stm32f4/nx/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/mikroe-stm32f4/nxlines/defconfig b/configs/mikroe-stm32f4/nxlines/defconfig index 3d0cfb98afe..c299e729b8e 100644 --- a/configs/mikroe-stm32f4/nxlines/defconfig +++ b/configs/mikroe-stm32f4/nxlines/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/mikroe-stm32f4/nxtext/defconfig b/configs/mikroe-stm32f4/nxtext/defconfig index 37b66b8c385..7ea80856083 100644 --- a/configs/mikroe-stm32f4/nxtext/defconfig +++ b/configs/mikroe-stm32f4/nxtext/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/mikroe-stm32f4/usbnsh/defconfig b/configs/mikroe-stm32f4/usbnsh/defconfig index b70490f8169..0b24f1d0e46 100644 --- a/configs/mikroe-stm32f4/usbnsh/defconfig +++ b/configs/mikroe-stm32f4/usbnsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/moxa/nsh/defconfig b/configs/moxa/nsh/defconfig index 76da9497d67..489a186b496 100644 --- a/configs/moxa/nsh/defconfig +++ b/configs/moxa/nsh/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="moxart" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/mx1ads/ostest/defconfig b/configs/mx1ads/ostest/defconfig index 7de94989e19..25ead2ce114 100644 --- a/configs/mx1ads/ostest/defconfig +++ b/configs/mx1ads/ostest/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_ARM920T=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="imx1" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/ntosd-dm320/nettest/defconfig b/configs/ntosd-dm320/nettest/defconfig index e088110948c..afe277011f4 100644 --- a/configs/ntosd-dm320/nettest/defconfig +++ b/configs/ntosd-dm320/nettest/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="dm320" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/ntosd-dm320/nsh/defconfig b/configs/ntosd-dm320/nsh/defconfig index 12b46adc256..7346dc05a6c 100644 --- a/configs/ntosd-dm320/nsh/defconfig +++ b/configs/ntosd-dm320/nsh/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="dm320" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/ntosd-dm320/poll/defconfig b/configs/ntosd-dm320/poll/defconfig index 16874144a1c..4c5c1343b96 100644 --- a/configs/ntosd-dm320/poll/defconfig +++ b/configs/ntosd-dm320/poll/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="dm320" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/ntosd-dm320/thttpd/defconfig b/configs/ntosd-dm320/thttpd/defconfig index 77f922ff67d..d5ae0d1cbae 100644 --- a/configs/ntosd-dm320/thttpd/defconfig +++ b/configs/ntosd-dm320/thttpd/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="dm320" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/ntosd-dm320/udp/defconfig b/configs/ntosd-dm320/udp/defconfig index 1f0c2d5c079..291f86c54b5 100644 --- a/configs/ntosd-dm320/udp/defconfig +++ b/configs/ntosd-dm320/udp/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="dm320" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/ntosd-dm320/webserver/defconfig b/configs/ntosd-dm320/webserver/defconfig index a41eb42fdcd..16966d58623 100644 --- a/configs/ntosd-dm320/webserver/defconfig +++ b/configs/ntosd-dm320/webserver/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="dm320" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/nucleo-144/f746-evalos/defconfig b/configs/nucleo-144/f746-evalos/defconfig index 7661a07ba8d..6a333e8185f 100644 --- a/configs/nucleo-144/f746-evalos/defconfig +++ b/configs/nucleo-144/f746-evalos/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32f7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/nucleo-144/f746-nsh/defconfig b/configs/nucleo-144/f746-nsh/defconfig index 076d5b8c8af..4e100930ac4 100644 --- a/configs/nucleo-144/f746-nsh/defconfig +++ b/configs/nucleo-144/f746-nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32f7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/nucleo-144/f767-evalos/defconfig b/configs/nucleo-144/f767-evalos/defconfig index a6a73654747..cbc8fd61811 100644 --- a/configs/nucleo-144/f767-evalos/defconfig +++ b/configs/nucleo-144/f767-evalos/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32f7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/nucleo-144/f767-nsh/defconfig b/configs/nucleo-144/f767-nsh/defconfig index 165ae152cfb..3fc8fc51815 100644 --- a/configs/nucleo-144/f767-nsh/defconfig +++ b/configs/nucleo-144/f767-nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32f7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/nucleo-f072rb/nsh/defconfig b/configs/nucleo-f072rb/nsh/defconfig index ebce1f4dc3d..978624897eb 100644 --- a/configs/nucleo-f072rb/nsh/defconfig +++ b/configs/nucleo-f072rb/nsh/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="stm32f0" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/nucleo-f091rc/nsh/defconfig b/configs/nucleo-f091rc/nsh/defconfig index e3c9cadefb3..924c68ec5c4 100644 --- a/configs/nucleo-f091rc/nsh/defconfig +++ b/configs/nucleo-f091rc/nsh/defconfig @@ -153,8 +153,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="stm32f0" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/nucleo-f303re/adc/defconfig b/configs/nucleo-f303re/adc/defconfig index ee469d2e8d2..f2dae45cf7f 100644 --- a/configs/nucleo-f303re/adc/defconfig +++ b/configs/nucleo-f303re/adc/defconfig @@ -124,8 +124,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f303re/can/defconfig b/configs/nucleo-f303re/can/defconfig index 4db532a8625..f6252ea707e 100644 --- a/configs/nucleo-f303re/can/defconfig +++ b/configs/nucleo-f303re/can/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f303re/hello/defconfig b/configs/nucleo-f303re/hello/defconfig index 6a1e7fb7c45..736dfa88f80 100644 --- a/configs/nucleo-f303re/hello/defconfig +++ b/configs/nucleo-f303re/hello/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f303re/nxlines/defconfig b/configs/nucleo-f303re/nxlines/defconfig index 60d56ecc84e..f3e7fc382e0 100644 --- a/configs/nucleo-f303re/nxlines/defconfig +++ b/configs/nucleo-f303re/nxlines/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f303re/pwm/defconfig b/configs/nucleo-f303re/pwm/defconfig index 630d14fa4e5..489bb994559 100644 --- a/configs/nucleo-f303re/pwm/defconfig +++ b/configs/nucleo-f303re/pwm/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f303re/serialrx/defconfig b/configs/nucleo-f303re/serialrx/defconfig index 1565a99ecad..2e6e2181fa2 100644 --- a/configs/nucleo-f303re/serialrx/defconfig +++ b/configs/nucleo-f303re/serialrx/defconfig @@ -124,8 +124,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f303re/uavcan/defconfig b/configs/nucleo-f303re/uavcan/defconfig index ee831187d6a..a111dce0a82 100644 --- a/configs/nucleo-f303re/uavcan/defconfig +++ b/configs/nucleo-f303re/uavcan/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f334r8/adc/defconfig b/configs/nucleo-f334r8/adc/defconfig index 9a8481f5162..ff470c333f7 100644 --- a/configs/nucleo-f334r8/adc/defconfig +++ b/configs/nucleo-f334r8/adc/defconfig @@ -152,8 +152,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f334r8/nsh/defconfig b/configs/nucleo-f334r8/nsh/defconfig index a3918af5375..94238e0628f 100644 --- a/configs/nucleo-f334r8/nsh/defconfig +++ b/configs/nucleo-f334r8/nsh/defconfig @@ -150,8 +150,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f4x1re/f401-nsh/defconfig b/configs/nucleo-f4x1re/f401-nsh/defconfig index 5a0c090de18..4748f705091 100644 --- a/configs/nucleo-f4x1re/f401-nsh/defconfig +++ b/configs/nucleo-f4x1re/f401-nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-f4x1re/f411-nsh/defconfig b/configs/nucleo-f4x1re/f411-nsh/defconfig index 13e3a553fe8..6e70b6ec40d 100644 --- a/configs/nucleo-f4x1re/f411-nsh/defconfig +++ b/configs/nucleo-f4x1re/f411-nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/nucleo-l432kc/nsh/defconfig b/configs/nucleo-l432kc/nsh/defconfig index c8fae71740a..efb716c902b 100644 --- a/configs/nucleo-l432kc/nsh/defconfig +++ b/configs/nucleo-l432kc/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32l4" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/nucleo-l452re/nsh/defconfig b/configs/nucleo-l452re/nsh/defconfig index b01b5c23568..354b25f7c7e 100644 --- a/configs/nucleo-l452re/nsh/defconfig +++ b/configs/nucleo-l452re/nsh/defconfig @@ -160,8 +160,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32l4" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/nucleo-l476rg/nsh/defconfig b/configs/nucleo-l476rg/nsh/defconfig index 80a8d83c9cc..7094ab8803c 100644 --- a/configs/nucleo-l476rg/nsh/defconfig +++ b/configs/nucleo-l476rg/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32l4" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/nucleo-l496zg/nsh/defconfig b/configs/nucleo-l496zg/nsh/defconfig index 34f924b27f8..ad95f558a8e 100644 --- a/configs/nucleo-l496zg/nsh/defconfig +++ b/configs/nucleo-l496zg/nsh/defconfig @@ -160,8 +160,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32l4" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/nutiny-nuc120/nsh/defconfig b/configs/nutiny-nuc120/nsh/defconfig index a2966eee963..2f9d28a88b4 100644 --- a/configs/nutiny-nuc120/nsh/defconfig +++ b/configs/nutiny-nuc120/nsh/defconfig @@ -127,8 +127,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="nuc1xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/olimex-efm32g880f128-stk/nsh/defconfig b/configs/olimex-efm32g880f128-stk/nsh/defconfig index 75527d42c7d..f2da9812c14 100644 --- a/configs/olimex-efm32g880f128-stk/nsh/defconfig +++ b/configs/olimex-efm32g880f128-stk/nsh/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="efm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/olimex-lpc-h3131/nsh/defconfig b/configs/olimex-lpc-h3131/nsh/defconfig index 26a8a77162d..b2620d88882 100644 --- a/configs/olimex-lpc-h3131/nsh/defconfig +++ b/configs/olimex-lpc-h3131/nsh/defconfig @@ -127,8 +127,7 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc31xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/olimex-lpc1766stk/ftpc/defconfig b/configs/olimex-lpc1766stk/ftpc/defconfig index a39d8ceacc2..41bc62fc8a5 100644 --- a/configs/olimex-lpc1766stk/ftpc/defconfig +++ b/configs/olimex-lpc1766stk/ftpc/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/hidmouse/defconfig b/configs/olimex-lpc1766stk/hidmouse/defconfig index da29b55e98e..4751e493609 100644 --- a/configs/olimex-lpc1766stk/hidmouse/defconfig +++ b/configs/olimex-lpc1766stk/hidmouse/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/nettest/defconfig b/configs/olimex-lpc1766stk/nettest/defconfig index 20e9abafa11..6cac49f3ef1 100644 --- a/configs/olimex-lpc1766stk/nettest/defconfig +++ b/configs/olimex-lpc1766stk/nettest/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/nsh/defconfig b/configs/olimex-lpc1766stk/nsh/defconfig index 44a0c97d2e2..373eeb3daa2 100644 --- a/configs/olimex-lpc1766stk/nsh/defconfig +++ b/configs/olimex-lpc1766stk/nsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/nx/defconfig b/configs/olimex-lpc1766stk/nx/defconfig index 5728b04b040..0b67c54f619 100644 --- a/configs/olimex-lpc1766stk/nx/defconfig +++ b/configs/olimex-lpc1766stk/nx/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/slip-httpd/defconfig b/configs/olimex-lpc1766stk/slip-httpd/defconfig index 04137cab7a3..fefac5aa76e 100644 --- a/configs/olimex-lpc1766stk/slip-httpd/defconfig +++ b/configs/olimex-lpc1766stk/slip-httpd/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig index 714ed7e3418..7a15c4c5efd 100644 --- a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig +++ b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig index bf1693614c0..208c90d50fa 100644 --- a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig +++ b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/usbmsc/defconfig b/configs/olimex-lpc1766stk/usbmsc/defconfig index 47fffba1f55..9ae53e827a7 100644 --- a/configs/olimex-lpc1766stk/usbmsc/defconfig +++ b/configs/olimex-lpc1766stk/usbmsc/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/usbserial/defconfig b/configs/olimex-lpc1766stk/usbserial/defconfig index 14ddc45c0bf..16a873814f8 100644 --- a/configs/olimex-lpc1766stk/usbserial/defconfig +++ b/configs/olimex-lpc1766stk/usbserial/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc1766stk/zmodem/defconfig b/configs/olimex-lpc1766stk/zmodem/defconfig index 4fdff449c13..ec2b96b6157 100644 --- a/configs/olimex-lpc1766stk/zmodem/defconfig +++ b/configs/olimex-lpc1766stk/zmodem/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-lpc2378/nsh/defconfig b/configs/olimex-lpc2378/nsh/defconfig index 7aa2abee469..5fb9b941710 100644 --- a/configs/olimex-lpc2378/nsh/defconfig +++ b/configs/olimex-lpc2378/nsh/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc2378" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/olimex-stm32-e407/discover/defconfig b/configs/olimex-stm32-e407/discover/defconfig index a0f4c0ff347..c44bf12478f 100644 --- a/configs/olimex-stm32-e407/discover/defconfig +++ b/configs/olimex-stm32-e407/discover/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-e407/netnsh/defconfig b/configs/olimex-stm32-e407/netnsh/defconfig index 3f038016305..70f2e93be0c 100644 --- a/configs/olimex-stm32-e407/netnsh/defconfig +++ b/configs/olimex-stm32-e407/netnsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-e407/nsh/defconfig b/configs/olimex-stm32-e407/nsh/defconfig index c9761c262b2..ac026758f01 100644 --- a/configs/olimex-stm32-e407/nsh/defconfig +++ b/configs/olimex-stm32-e407/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-e407/telnetd/defconfig b/configs/olimex-stm32-e407/telnetd/defconfig index b110e20a117..87dc6849d7f 100644 --- a/configs/olimex-stm32-e407/telnetd/defconfig +++ b/configs/olimex-stm32-e407/telnetd/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-e407/usbnsh/defconfig b/configs/olimex-stm32-e407/usbnsh/defconfig index 7c51b6e66ab..11f6948f93d 100644 --- a/configs/olimex-stm32-e407/usbnsh/defconfig +++ b/configs/olimex-stm32-e407/usbnsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-e407/webserver/defconfig b/configs/olimex-stm32-e407/webserver/defconfig index 8f74cb8be13..2e790c9e1b4 100644 --- a/configs/olimex-stm32-e407/webserver/defconfig +++ b/configs/olimex-stm32-e407/webserver/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-h405/usbnsh/defconfig b/configs/olimex-stm32-h405/usbnsh/defconfig index 12a579f0441..042364cd6dd 100644 --- a/configs/olimex-stm32-h405/usbnsh/defconfig +++ b/configs/olimex-stm32-h405/usbnsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-h407/nsh/defconfig b/configs/olimex-stm32-h407/nsh/defconfig index 0941dcadf84..0936be97e1e 100644 --- a/configs/olimex-stm32-h407/nsh/defconfig +++ b/configs/olimex-stm32-h407/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-p107/nsh/defconfig b/configs/olimex-stm32-p107/nsh/defconfig index d6fdc7e4962..4ce159df736 100644 --- a/configs/olimex-stm32-p107/nsh/defconfig +++ b/configs/olimex-stm32-p107/nsh/defconfig @@ -124,8 +124,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-p207/nsh/defconfig b/configs/olimex-stm32-p207/nsh/defconfig index 16c37e7427c..965a7c32a8e 100644 --- a/configs/olimex-stm32-p207/nsh/defconfig +++ b/configs/olimex-stm32-p207/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-p407/knsh/defconfig b/configs/olimex-stm32-p407/knsh/defconfig index eba898d9223..f5b9cc2d999 100644 --- a/configs/olimex-stm32-p407/knsh/defconfig +++ b/configs/olimex-stm32-p407/knsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-stm32-p407/nsh/defconfig b/configs/olimex-stm32-p407/nsh/defconfig index 01d6cb9c0be..01314696611 100644 --- a/configs/olimex-stm32-p407/nsh/defconfig +++ b/configs/olimex-stm32-p407/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimex-strp711/nettest/defconfig b/configs/olimex-strp711/nettest/defconfig index 4a23d44266d..e0ccedba80c 100644 --- a/configs/olimex-strp711/nettest/defconfig +++ b/configs/olimex-strp711/nettest/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="str71x" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/olimex-strp711/nsh/defconfig b/configs/olimex-strp711/nsh/defconfig index 84f66ba8c29..01d338d07f8 100644 --- a/configs/olimex-strp711/nsh/defconfig +++ b/configs/olimex-strp711/nsh/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="str71x" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/olimexino-stm32/can/defconfig b/configs/olimexino-stm32/can/defconfig index 4c0164e9415..6cc8af2285d 100644 --- a/configs/olimexino-stm32/can/defconfig +++ b/configs/olimexino-stm32/can/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimexino-stm32/composite/defconfig b/configs/olimexino-stm32/composite/defconfig index 4d6f9915d62..898f6ae919e 100644 --- a/configs/olimexino-stm32/composite/defconfig +++ b/configs/olimexino-stm32/composite/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimexino-stm32/nsh/defconfig b/configs/olimexino-stm32/nsh/defconfig index 53eea4afe27..486a4aea620 100644 --- a/configs/olimexino-stm32/nsh/defconfig +++ b/configs/olimexino-stm32/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimexino-stm32/smallnsh/defconfig b/configs/olimexino-stm32/smallnsh/defconfig index 622916d8c24..39a7a0efdfb 100644 --- a/configs/olimexino-stm32/smallnsh/defconfig +++ b/configs/olimexino-stm32/smallnsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/olimexino-stm32/tiny/defconfig b/configs/olimexino-stm32/tiny/defconfig index 11959d3f773..ec4bcd76610 100644 --- a/configs/olimexino-stm32/tiny/defconfig +++ b/configs/olimexino-stm32/tiny/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/open1788/knsh/defconfig b/configs/open1788/knsh/defconfig index a4be59b0628..830d16a8628 100644 --- a/configs/open1788/knsh/defconfig +++ b/configs/open1788/knsh/defconfig @@ -126,8 +126,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/open1788/nsh/defconfig b/configs/open1788/nsh/defconfig index bcfeb085dec..fe79328722e 100644 --- a/configs/open1788/nsh/defconfig +++ b/configs/open1788/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/open1788/nxlines/defconfig b/configs/open1788/nxlines/defconfig index e419534665f..4718ef242c9 100644 --- a/configs/open1788/nxlines/defconfig +++ b/configs/open1788/nxlines/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/pcduino-a10/nsh/defconfig b/configs/pcduino-a10/nsh/defconfig index b547394dfcc..5bf38982d2f 100644 --- a/configs/pcduino-a10/nsh/defconfig +++ b/configs/pcduino-a10/nsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA8=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="a1x" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/photon/nsh/defconfig b/configs/photon/nsh/defconfig index 67f2d12700c..cb679918315 100644 --- a/configs/photon/nsh/defconfig +++ b/configs/photon/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/photon/usbnsh/defconfig b/configs/photon/usbnsh/defconfig index 8050de9c8e3..1e727536516 100644 --- a/configs/photon/usbnsh/defconfig +++ b/configs/photon/usbnsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/photon/wlan/defconfig b/configs/photon/wlan/defconfig index 0aa452a9fe8..409aae40fc6 100644 --- a/configs/photon/wlan/defconfig +++ b/configs/photon/wlan/defconfig @@ -65,14 +65,11 @@ CONFIG_DEBUG_INFO=y # CONFIG_DEBUG_GRAPHICS is not set # CONFIG_DEBUG_LIB is not set # CONFIG_DEBUG_MM is not set -CONFIG_DEBUG_NET=y -CONFIG_DEBUG_NET_ERROR=y -CONFIG_DEBUG_NET_WARN=y -CONFIG_DEBUG_NET_INFO=y +# CONFIG_DEBUG_NET is not set CONFIG_DEBUG_WIRELESS=y CONFIG_DEBUG_WIRELESS_ERROR=y CONFIG_DEBUG_WIRELESS_WARN=y -CONFIG_DEBUG_WIRELESS_INFO=y +# CONFIG_DEBUG_WIRELESS_INFO is not set # CONFIG_DEBUG_SCHED is not set # @@ -169,8 +166,6 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set @@ -570,6 +565,7 @@ CONFIG_STM32_SDIO_DMAPRIO=0x00010000 # # USB Device Configuration # +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_TOOLCHAIN_GNU=y # @@ -871,7 +867,9 @@ CONFIG_NETDEVICES=y # General Ethernet MAC Driver Options # # CONFIG_NETDEV_LOOPBACK is not set -# CONFIG_NETDEV_TELNET is not set +CONFIG_NETDEV_TELNET=y +CONFIG_TELNET_RXBUFFER_SIZE=256 +CONFIG_TELNET_TXBUFFER_SIZE=256 # CONFIG_NETDEV_MULTINIC is not set # CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set CONFIG_NETDEV_LATEINIT=y @@ -893,7 +891,7 @@ CONFIG_NETDEV_LATEINIT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_SERIAL_REMOVABLE is not set -CONFIG_SERIAL_CONSOLE=y +# CONFIG_SERIAL_CONSOLE is not set # CONFIG_16550_UART is not set # CONFIG_UART_SERIALDRIVER is not set # CONFIG_UART0_SERIALDRIVER is not set @@ -924,9 +922,9 @@ CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_DMA is not set # CONFIG_SERIAL_TIOCSERGSTRUCT is not set CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y -CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_USART1_SERIAL_CONSOLE is not set # CONFIG_OTHER_SERIAL_CONSOLE is not set -# CONFIG_NO_SERIAL_CONSOLE is not set +CONFIG_NO_SERIAL_CONSOLE=y # # USART1 Configuration @@ -967,11 +965,14 @@ CONFIG_SYSLOG_WRITE=y # CONFIG_SYSLOG_BUFFER is not set # CONFIG_SYSLOG_INTBUFFER is not set # CONFIG_SYSLOG_TIMESTAMP is not set -CONFIG_SYSLOG_SERIAL_CONSOLE=y -# CONFIG_SYSLOG_CHAR is not set -CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_SERIAL_CONSOLE is not set +CONFIG_SYSLOG_CHAR=y +# CONFIG_SYSLOG_CONSOLE is not set # CONFIG_SYSLOG_NONE is not set # CONFIG_SYSLOG_FILE is not set +# CONFIG_CONSOLE_SYSLOG is not set +CONFIG_SYSLOG_CHAR_CRLF=y +CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" # CONFIG_SYSLOG_CHARDEV is not set # @@ -1077,7 +1078,6 @@ CONFIG_NET_ARPTAB_SIZE=16 CONFIG_NET_ARP_MAXAGE=120 # CONFIG_NET_ARP_IPIN is not set # CONFIG_NET_ARP_SEND is not set -# CONFIG_NET_ARP_DUMP is not set # # User-space networking stack API @@ -1294,7 +1294,6 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # # CONFIG_C99_BOOL8 is not set CONFIG_HAVE_CXX=y -CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_CXX_NEWLONG is not set # @@ -1431,7 +1430,7 @@ CONFIG_NETUTILS_PING=y CONFIG_NETUTILS_PING_SIGNO=13 # CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set -# CONFIG_NETUTILS_TELNETD is not set +CONFIG_NETUTILS_TELNETD=y # CONFIG_NETUTILS_TFTPC is not set # CONFIG_NETUTILS_WEBCLIENT is not set # CONFIG_NETUTILS_WEBSERVER is not set @@ -1534,8 +1533,7 @@ CONFIG_NSH_FILEIOSIZE=512 # # Console Configuration # -CONFIG_NSH_CONSOLE=y -# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_CONSOLE is not set CONFIG_NSH_ARCHINIT=y # @@ -1568,8 +1566,20 @@ CONFIG_NSH_WAPI_ALG=3 CONFIG_NSH_WAPI_SSID="myApSSID" CONFIG_NSH_WAPI_PASSPHRASE="mySSIDpassphrase" CONFIG_NSH_MAX_ROUNDTRIP=20 + +# +# Telnet Configuration +# +CONFIG_NSH_TELNET=y +CONFIG_NSH_TELNETD_PORT=23 +CONFIG_NSH_TELNETD_DAEMONPRIO=100 +CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 +CONFIG_NSH_TELNETD_CLIENTPRIO=100 +CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 +CONFIG_NSH_IOBUFFER_SIZE=512 # CONFIG_NSH_LOGIN is not set # CONFIG_NSH_CONSOLE_LOGIN is not set +# CONFIG_NSH_TELNET_LOGIN is not set # # NxWidgets/NxWM @@ -1579,6 +1589,7 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # Platform-specific Support # # CONFIG_PLATFORM_CONFIGDATA is not set +CONFIG_HAVE_CXXINITIALIZE=y # # System Libraries and NSH Add-Ons diff --git a/configs/sabre-6quad/nsh/defconfig b/configs/sabre-6quad/nsh/defconfig index fb5901f395d..e6854aefa3c 100644 --- a/configs/sabre-6quad/nsh/defconfig +++ b/configs/sabre-6quad/nsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA9=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="imx6" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sabre-6quad/smp/defconfig b/configs/sabre-6quad/smp/defconfig index c98713873a3..d8f479ef6d2 100644 --- a/configs/sabre-6quad/smp/defconfig +++ b/configs/sabre-6quad/smp/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA9=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="imx6" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sam3u-ek/knsh/defconfig b/configs/sam3u-ek/knsh/defconfig index 1bac14a8602..0d457370502 100644 --- a/configs/sam3u-ek/knsh/defconfig +++ b/configs/sam3u-ek/knsh/defconfig @@ -126,8 +126,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam3u-ek/nsh/defconfig b/configs/sam3u-ek/nsh/defconfig index 39d9271e1f7..1115ecb270e 100644 --- a/configs/sam3u-ek/nsh/defconfig +++ b/configs/sam3u-ek/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam3u-ek/nx/defconfig b/configs/sam3u-ek/nx/defconfig index 836d29844c6..2494de67acc 100644 --- a/configs/sam3u-ek/nx/defconfig +++ b/configs/sam3u-ek/nx/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam3u-ek/nxwm/defconfig b/configs/sam3u-ek/nxwm/defconfig index 2f6d7603772..8cd9244edf1 100644 --- a/configs/sam3u-ek/nxwm/defconfig +++ b/configs/sam3u-ek/nxwm/defconfig @@ -124,8 +124,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam4cmp-db/nsh/defconfig b/configs/sam4cmp-db/nsh/defconfig index c7e96c2425a..1794bf5c2f8 100644 --- a/configs/sam4cmp-db/nsh/defconfig +++ b/configs/sam4cmp-db/nsh/defconfig @@ -150,8 +150,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam4e-ek/nsh/defconfig b/configs/sam4e-ek/nsh/defconfig index 7bbdf3723b4..cd4b617a700 100644 --- a/configs/sam4e-ek/nsh/defconfig +++ b/configs/sam4e-ek/nsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam4e-ek/nxwm/defconfig b/configs/sam4e-ek/nxwm/defconfig index ca7322f4929..ed4c3f7e1ae 100644 --- a/configs/sam4e-ek/nxwm/defconfig +++ b/configs/sam4e-ek/nxwm/defconfig @@ -124,8 +124,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam4e-ek/usbnsh/defconfig b/configs/sam4e-ek/usbnsh/defconfig index e8292655ca9..f26914f97db 100644 --- a/configs/sam4e-ek/usbnsh/defconfig +++ b/configs/sam4e-ek/usbnsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam4l-xplained/nsh/defconfig b/configs/sam4l-xplained/nsh/defconfig index a5c734aa407..c31e95a2242 100644 --- a/configs/sam4l-xplained/nsh/defconfig +++ b/configs/sam4l-xplained/nsh/defconfig @@ -124,8 +124,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam4s-xplained-pro/nsh/defconfig b/configs/sam4s-xplained-pro/nsh/defconfig index 1f60e17c360..ab547b3535e 100644 --- a/configs/sam4s-xplained-pro/nsh/defconfig +++ b/configs/sam4s-xplained-pro/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sam4s-xplained/nsh/defconfig b/configs/sam4s-xplained/nsh/defconfig index c59c5a0f8b6..d8874cd6291 100644 --- a/configs/sam4s-xplained/nsh/defconfig +++ b/configs/sam4s-xplained/nsh/defconfig @@ -124,8 +124,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/sama5d2-xult/nsh/defconfig b/configs/sama5d2-xult/nsh/defconfig index db65ee79d58..29da9edcbc8 100644 --- a/configs/sama5d2-xult/nsh/defconfig +++ b/configs/sama5d2-xult/nsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3-xplained/bridge/defconfig b/configs/sama5d3-xplained/bridge/defconfig index c89f19ed615..7e940c157c2 100644 --- a/configs/sama5d3-xplained/bridge/defconfig +++ b/configs/sama5d3-xplained/bridge/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3-xplained/nsh/defconfig b/configs/sama5d3-xplained/nsh/defconfig index 4a7584dfbda..9800716ad60 100644 --- a/configs/sama5d3-xplained/nsh/defconfig +++ b/configs/sama5d3-xplained/nsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3x-ek/demo/defconfig b/configs/sama5d3x-ek/demo/defconfig index e7b781f1a71..fde9166472f 100644 --- a/configs/sama5d3x-ek/demo/defconfig +++ b/configs/sama5d3x-ek/demo/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3x-ek/hello/defconfig b/configs/sama5d3x-ek/hello/defconfig index db156cbd32c..b89238191de 100644 --- a/configs/sama5d3x-ek/hello/defconfig +++ b/configs/sama5d3x-ek/hello/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3x-ek/norboot/defconfig b/configs/sama5d3x-ek/norboot/defconfig index 56ffd88c53f..f17b0631dce 100644 --- a/configs/sama5d3x-ek/norboot/defconfig +++ b/configs/sama5d3x-ek/norboot/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3x-ek/nsh/defconfig b/configs/sama5d3x-ek/nsh/defconfig index 6ed56ba51ee..cced99e1ede 100644 --- a/configs/sama5d3x-ek/nsh/defconfig +++ b/configs/sama5d3x-ek/nsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3x-ek/nx/defconfig b/configs/sama5d3x-ek/nx/defconfig index 7c4fd0babbd..5f847f90885 100644 --- a/configs/sama5d3x-ek/nx/defconfig +++ b/configs/sama5d3x-ek/nx/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3x-ek/nxplayer/defconfig b/configs/sama5d3x-ek/nxplayer/defconfig index bfac9ef93ce..0fe83187f04 100644 --- a/configs/sama5d3x-ek/nxplayer/defconfig +++ b/configs/sama5d3x-ek/nxplayer/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3x-ek/nxwm/defconfig b/configs/sama5d3x-ek/nxwm/defconfig index d3d488735c4..15b961d99fa 100644 --- a/configs/sama5d3x-ek/nxwm/defconfig +++ b/configs/sama5d3x-ek/nxwm/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d3x-ek/ov2640/defconfig b/configs/sama5d3x-ek/ov2640/defconfig index 76c5dcf66db..b9330a20194 100644 --- a/configs/sama5d3x-ek/ov2640/defconfig +++ b/configs/sama5d3x-ek/ov2640/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d4-ek/at25boot/defconfig b/configs/sama5d4-ek/at25boot/defconfig index e8a887220d3..11a0dab220e 100644 --- a/configs/sama5d4-ek/at25boot/defconfig +++ b/configs/sama5d4-ek/at25boot/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d4-ek/bridge/defconfig b/configs/sama5d4-ek/bridge/defconfig index 9248a99e8c3..bbb4e9e530c 100644 --- a/configs/sama5d4-ek/bridge/defconfig +++ b/configs/sama5d4-ek/bridge/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d4-ek/dramboot/defconfig b/configs/sama5d4-ek/dramboot/defconfig index 84ccf16d8b0..c25c40e2316 100644 --- a/configs/sama5d4-ek/dramboot/defconfig +++ b/configs/sama5d4-ek/dramboot/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d4-ek/elf/defconfig b/configs/sama5d4-ek/elf/defconfig index 6b8363dbbb3..07a6c79d33d 100644 --- a/configs/sama5d4-ek/elf/defconfig +++ b/configs/sama5d4-ek/elf/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d4-ek/ipv6/defconfig b/configs/sama5d4-ek/ipv6/defconfig index afe653afc81..fbcd409311c 100644 --- a/configs/sama5d4-ek/ipv6/defconfig +++ b/configs/sama5d4-ek/ipv6/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d4-ek/knsh/defconfig b/configs/sama5d4-ek/knsh/defconfig index 8731f0ebe92..39104b9481c 100644 --- a/configs/sama5d4-ek/knsh/defconfig +++ b/configs/sama5d4-ek/knsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d4-ek/nsh/defconfig b/configs/sama5d4-ek/nsh/defconfig index f25cb4b431a..5a4c97c83c5 100644 --- a/configs/sama5d4-ek/nsh/defconfig +++ b/configs/sama5d4-ek/nsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d4-ek/nxwm/defconfig b/configs/sama5d4-ek/nxwm/defconfig index 4690d35918f..63014d2966f 100644 --- a/configs/sama5d4-ek/nxwm/defconfig +++ b/configs/sama5d4-ek/nxwm/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/sama5d4-ek/ramtest/defconfig b/configs/sama5d4-ek/ramtest/defconfig index 44720daf54a..e199864e5aa 100644 --- a/configs/sama5d4-ek/ramtest/defconfig +++ b/configs/sama5d4-ek/ramtest/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y diff --git a/configs/samd20-xplained/nsh/defconfig b/configs/samd20-xplained/nsh/defconfig index f2fece4c3fc..f7143f1a8c4 100644 --- a/configs/samd20-xplained/nsh/defconfig +++ b/configs/samd20-xplained/nsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="samdl" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/samd21-xplained/nsh/defconfig b/configs/samd21-xplained/nsh/defconfig index bfbf127c9e4..67c907795d4 100644 --- a/configs/samd21-xplained/nsh/defconfig +++ b/configs/samd21-xplained/nsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="samdl" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/same70-xplained/netnsh/defconfig b/configs/same70-xplained/netnsh/defconfig index 45b670fc14e..ea1f8fbbdc1 100644 --- a/configs/same70-xplained/netnsh/defconfig +++ b/configs/same70-xplained/netnsh/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/same70-xplained/nsh/defconfig b/configs/same70-xplained/nsh/defconfig index 106f2498140..4cdbf698ca7 100644 --- a/configs/same70-xplained/nsh/defconfig +++ b/configs/same70-xplained/nsh/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/saml21-xplained/nsh/defconfig b/configs/saml21-xplained/nsh/defconfig index 17eff8509fa..3e1d6fdd03d 100644 --- a/configs/saml21-xplained/nsh/defconfig +++ b/configs/saml21-xplained/nsh/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="samdl" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/samv71-xult/knsh/defconfig b/configs/samv71-xult/knsh/defconfig index c23bda38ee5..084a65b9f08 100644 --- a/configs/samv71-xult/knsh/defconfig +++ b/configs/samv71-xult/knsh/defconfig @@ -132,8 +132,8 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/samv71-xult/module/defconfig b/configs/samv71-xult/module/defconfig index e4172937e3b..2f89f12a0ae 100644 --- a/configs/samv71-xult/module/defconfig +++ b/configs/samv71-xult/module/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/samv71-xult/mxtxplnd/defconfig b/configs/samv71-xult/mxtxplnd/defconfig index d34d7ffdac5..d9fc28ec2db 100644 --- a/configs/samv71-xult/mxtxplnd/defconfig +++ b/configs/samv71-xult/mxtxplnd/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/samv71-xult/netnsh/defconfig b/configs/samv71-xult/netnsh/defconfig index 2e59f382baf..0cf0b67a8e7 100644 --- a/configs/samv71-xult/netnsh/defconfig +++ b/configs/samv71-xult/netnsh/defconfig @@ -130,8 +130,8 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/samv71-xult/nsh/defconfig b/configs/samv71-xult/nsh/defconfig index 99e63b5e889..3233d2a89ff 100644 --- a/configs/samv71-xult/nsh/defconfig +++ b/configs/samv71-xult/nsh/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/samv71-xult/nxwm/defconfig b/configs/samv71-xult/nxwm/defconfig index 0953e98bf00..704a09e3086 100644 --- a/configs/samv71-xult/nxwm/defconfig +++ b/configs/samv71-xult/nxwm/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/samv71-xult/vnc/defconfig b/configs/samv71-xult/vnc/defconfig index 58de7ce6219..da546e0dd04 100644 --- a/configs/samv71-xult/vnc/defconfig +++ b/configs/samv71-xult/vnc/defconfig @@ -129,8 +129,8 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/samv71-xult/vnxwm/defconfig b/configs/samv71-xult/vnxwm/defconfig index 8a0cb8029cf..454f319c8c5 100644 --- a/configs/samv71-xult/vnxwm/defconfig +++ b/configs/samv71-xult/vnxwm/defconfig @@ -130,8 +130,7 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/shenzhou/nsh/defconfig b/configs/shenzhou/nsh/defconfig index 8bd378dc89c..b43530adc27 100644 --- a/configs/shenzhou/nsh/defconfig +++ b/configs/shenzhou/nsh/defconfig @@ -124,8 +124,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/shenzhou/nxwm/defconfig b/configs/shenzhou/nxwm/defconfig index 8136459843f..e1f8f330418 100644 --- a/configs/shenzhou/nxwm/defconfig +++ b/configs/shenzhou/nxwm/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/shenzhou/thttpd/defconfig b/configs/shenzhou/thttpd/defconfig index cb5aaf04583..98020af006a 100644 --- a/configs/shenzhou/thttpd/defconfig +++ b/configs/shenzhou/thttpd/defconfig @@ -124,8 +124,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/spark/composite/defconfig b/configs/spark/composite/defconfig index 4c53bfb69fd..281a489e6c3 100644 --- a/configs/spark/composite/defconfig +++ b/configs/spark/composite/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/spark/nsh/defconfig b/configs/spark/nsh/defconfig index 2768858395d..1e1c422438e 100644 --- a/configs/spark/nsh/defconfig +++ b/configs/spark/nsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/spark/usbmsc/defconfig b/configs/spark/usbmsc/defconfig index bf8b9101fce..feca6a0a92a 100644 --- a/configs/spark/usbmsc/defconfig +++ b/configs/spark/usbmsc/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/spark/usbnsh/defconfig b/configs/spark/usbnsh/defconfig index cb810ac38a1..8fcdcc3ce68 100644 --- a/configs/spark/usbnsh/defconfig +++ b/configs/spark/usbnsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/spark/usbserial/defconfig b/configs/spark/usbserial/defconfig index c50bae0087b..8d6a8293da2 100644 --- a/configs/spark/usbserial/defconfig +++ b/configs/spark/usbserial/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3210e-eval/composite/defconfig b/configs/stm3210e-eval/composite/defconfig index 7293f13d642..4bfafde9e31 100644 --- a/configs/stm3210e-eval/composite/defconfig +++ b/configs/stm3210e-eval/composite/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3210e-eval/nsh/defconfig b/configs/stm3210e-eval/nsh/defconfig index de6c8fbadad..8ccc2e76066 100644 --- a/configs/stm3210e-eval/nsh/defconfig +++ b/configs/stm3210e-eval/nsh/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3210e-eval/nsh2/defconfig b/configs/stm3210e-eval/nsh2/defconfig index 846aceb4f81..4e78fee3f01 100644 --- a/configs/stm3210e-eval/nsh2/defconfig +++ b/configs/stm3210e-eval/nsh2/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3210e-eval/nx/defconfig b/configs/stm3210e-eval/nx/defconfig index 72cffd064c8..951415392f6 100644 --- a/configs/stm3210e-eval/nx/defconfig +++ b/configs/stm3210e-eval/nx/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3210e-eval/nxterm/defconfig b/configs/stm3210e-eval/nxterm/defconfig index 2b7d5531d08..a5777572984 100644 --- a/configs/stm3210e-eval/nxterm/defconfig +++ b/configs/stm3210e-eval/nxterm/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3210e-eval/pm/defconfig b/configs/stm3210e-eval/pm/defconfig index 301b8afa073..a05bfcc94b2 100644 --- a/configs/stm3210e-eval/pm/defconfig +++ b/configs/stm3210e-eval/pm/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3210e-eval/usbmsc/defconfig b/configs/stm3210e-eval/usbmsc/defconfig index 62b5513ad48..84983fb9fcf 100644 --- a/configs/stm3210e-eval/usbmsc/defconfig +++ b/configs/stm3210e-eval/usbmsc/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3210e-eval/usbserial/defconfig b/configs/stm3210e-eval/usbserial/defconfig index 6506425af5b..fb49e872c7c 100644 --- a/configs/stm3210e-eval/usbserial/defconfig +++ b/configs/stm3210e-eval/usbserial/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3220g-eval/dhcpd/defconfig b/configs/stm3220g-eval/dhcpd/defconfig index 2771754291e..ca619c0056e 100644 --- a/configs/stm3220g-eval/dhcpd/defconfig +++ b/configs/stm3220g-eval/dhcpd/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3220g-eval/nettest/defconfig b/configs/stm3220g-eval/nettest/defconfig index 78726df3c1a..010d4fa1749 100644 --- a/configs/stm3220g-eval/nettest/defconfig +++ b/configs/stm3220g-eval/nettest/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3220g-eval/nsh/defconfig b/configs/stm3220g-eval/nsh/defconfig index b64cbf7a368..1b8ee32471e 100644 --- a/configs/stm3220g-eval/nsh/defconfig +++ b/configs/stm3220g-eval/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3220g-eval/nsh2/defconfig b/configs/stm3220g-eval/nsh2/defconfig index 439c8390c5e..003e9148ace 100644 --- a/configs/stm3220g-eval/nsh2/defconfig +++ b/configs/stm3220g-eval/nsh2/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3220g-eval/nxwm/defconfig b/configs/stm3220g-eval/nxwm/defconfig index 170b1cfa0ed..c09050cf119 100644 --- a/configs/stm3220g-eval/nxwm/defconfig +++ b/configs/stm3220g-eval/nxwm/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3220g-eval/telnetd/defconfig b/configs/stm3220g-eval/telnetd/defconfig index 53b2e42c7ef..be338e0500a 100644 --- a/configs/stm3220g-eval/telnetd/defconfig +++ b/configs/stm3220g-eval/telnetd/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/dhcpd/defconfig b/configs/stm3240g-eval/dhcpd/defconfig index 3685d5da3a8..49863ae1585 100644 --- a/configs/stm3240g-eval/dhcpd/defconfig +++ b/configs/stm3240g-eval/dhcpd/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/discover/defconfig b/configs/stm3240g-eval/discover/defconfig index 7644480cc28..67c33f40786 100644 --- a/configs/stm3240g-eval/discover/defconfig +++ b/configs/stm3240g-eval/discover/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/knxwm/defconfig b/configs/stm3240g-eval/knxwm/defconfig index 8f8dbb1f0a1..2dc44e36dbd 100644 --- a/configs/stm3240g-eval/knxwm/defconfig +++ b/configs/stm3240g-eval/knxwm/defconfig @@ -136,8 +136,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/nettest/defconfig b/configs/stm3240g-eval/nettest/defconfig index 43f5d3cfaeb..be929fb671b 100644 --- a/configs/stm3240g-eval/nettest/defconfig +++ b/configs/stm3240g-eval/nettest/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/nsh/defconfig b/configs/stm3240g-eval/nsh/defconfig index b6e2403b4a4..ab364fa9926 100644 --- a/configs/stm3240g-eval/nsh/defconfig +++ b/configs/stm3240g-eval/nsh/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/nsh2/defconfig b/configs/stm3240g-eval/nsh2/defconfig index 31b84e446f1..e412f481f3e 100644 --- a/configs/stm3240g-eval/nsh2/defconfig +++ b/configs/stm3240g-eval/nsh2/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/nxterm/defconfig b/configs/stm3240g-eval/nxterm/defconfig index d7cc5d4f73a..bd0d5919b4c 100644 --- a/configs/stm3240g-eval/nxterm/defconfig +++ b/configs/stm3240g-eval/nxterm/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/nxwm/defconfig b/configs/stm3240g-eval/nxwm/defconfig index 3fc81f25e12..d4f41b9d83b 100644 --- a/configs/stm3240g-eval/nxwm/defconfig +++ b/configs/stm3240g-eval/nxwm/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/telnetd/defconfig b/configs/stm3240g-eval/telnetd/defconfig index edd1dbb11e4..abb14d9aae4 100644 --- a/configs/stm3240g-eval/telnetd/defconfig +++ b/configs/stm3240g-eval/telnetd/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/webserver/defconfig b/configs/stm3240g-eval/webserver/defconfig index 3c9e8c2530b..877d772f469 100644 --- a/configs/stm3240g-eval/webserver/defconfig +++ b/configs/stm3240g-eval/webserver/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm3240g-eval/xmlrpc/defconfig b/configs/stm3240g-eval/xmlrpc/defconfig index a88b63ae195..32ec3cb2ebe 100644 --- a/configs/stm3240g-eval/xmlrpc/defconfig +++ b/configs/stm3240g-eval/xmlrpc/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32_tiny/nsh/defconfig b/configs/stm32_tiny/nsh/defconfig index cb39c3b3266..2588da219ca 100644 --- a/configs/stm32_tiny/nsh/defconfig +++ b/configs/stm32_tiny/nsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32_tiny/usbnsh/defconfig b/configs/stm32_tiny/usbnsh/defconfig index 82b6a3f2fbe..f471ae9dbcd 100644 --- a/configs/stm32_tiny/usbnsh/defconfig +++ b/configs/stm32_tiny/usbnsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32butterfly2/nsh/defconfig b/configs/stm32butterfly2/nsh/defconfig index 9d8bc5eb150..ce0251c52c1 100644 --- a/configs/stm32butterfly2/nsh/defconfig +++ b/configs/stm32butterfly2/nsh/defconfig @@ -124,8 +124,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32butterfly2/nshnet/defconfig b/configs/stm32butterfly2/nshnet/defconfig index 08cc2425c4e..fbf702ddf18 100644 --- a/configs/stm32butterfly2/nshnet/defconfig +++ b/configs/stm32butterfly2/nshnet/defconfig @@ -124,8 +124,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32butterfly2/nshusbdev/defconfig b/configs/stm32butterfly2/nshusbdev/defconfig index 8fd69ba946d..920a2e768c1 100644 --- a/configs/stm32butterfly2/nshusbdev/defconfig +++ b/configs/stm32butterfly2/nshusbdev/defconfig @@ -124,8 +124,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32butterfly2/nshusbhost/defconfig b/configs/stm32butterfly2/nshusbhost/defconfig index 9d8bc5eb150..ce0251c52c1 100644 --- a/configs/stm32butterfly2/nshusbhost/defconfig +++ b/configs/stm32butterfly2/nshusbhost/defconfig @@ -124,8 +124,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f0discovery/README.txt b/configs/stm32f0discovery/README.txt index e69de29bb2d..243dee33768 100644 --- a/configs/stm32f0discovery/README.txt +++ b/configs/stm32f0discovery/README.txt @@ -0,0 +1,17 @@ +STATUS +====== + +05/17: The basic NSH configuration is functional and shows that there is + 3-4KB of free heap space. However, attempts to extend this have + failed. I suspect that 8KB of SRAM is insufficient to do much + with the existing NSH configuration. Perhaps some fine tuning + can improve this situation but at this point, I think this board + is only useful for the initial STM32 F0 bring-up, perhaps for + embedded solutions that do not use NSH and for general + experimentation. + + There is also support for the Nucleo boards with the STM32 F072 + and F092 MCUs. Those ports do not suffer from these problems and + seem to work well in fairly complex configurations. Apparently 8KB + is SRAM is not usable but the parts with larger 16KB and 32KB SRAMs + are better matches. diff --git a/configs/stm32f0discovery/nsh/defconfig b/configs/stm32f0discovery/nsh/defconfig index 6c34641ae8f..643b2b82695 100644 --- a/configs/stm32f0discovery/nsh/defconfig +++ b/configs/stm32f0discovery/nsh/defconfig @@ -123,8 +123,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="stm32f0" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/stm32f103-minimum/audio_tone/defconfig b/configs/stm32f103-minimum/audio_tone/defconfig index 18a2d09978a..a02e34ff9f1 100644 --- a/configs/stm32f103-minimum/audio_tone/defconfig +++ b/configs/stm32f103-minimum/audio_tone/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/buttons/defconfig b/configs/stm32f103-minimum/buttons/defconfig index 0312f7554be..741e8787657 100644 --- a/configs/stm32f103-minimum/buttons/defconfig +++ b/configs/stm32f103-minimum/buttons/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/jlx12864g/defconfig b/configs/stm32f103-minimum/jlx12864g/defconfig index 4a8569c3289..50443110702 100644 --- a/configs/stm32f103-minimum/jlx12864g/defconfig +++ b/configs/stm32f103-minimum/jlx12864g/defconfig @@ -157,8 +157,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/nrf24/defconfig b/configs/stm32f103-minimum/nrf24/defconfig index a13598ba74a..e47dac3b565 100644 --- a/configs/stm32f103-minimum/nrf24/defconfig +++ b/configs/stm32f103-minimum/nrf24/defconfig @@ -153,8 +153,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/nsh/defconfig b/configs/stm32f103-minimum/nsh/defconfig index 7664d88825d..9c30d971fd2 100644 --- a/configs/stm32f103-minimum/nsh/defconfig +++ b/configs/stm32f103-minimum/nsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/pwm/defconfig b/configs/stm32f103-minimum/pwm/defconfig index d8b9bc38daa..d7926d95f4a 100644 --- a/configs/stm32f103-minimum/pwm/defconfig +++ b/configs/stm32f103-minimum/pwm/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/rfid-rc522/defconfig b/configs/stm32f103-minimum/rfid-rc522/defconfig index a8daaf44f6b..105cc29402b 100644 --- a/configs/stm32f103-minimum/rfid-rc522/defconfig +++ b/configs/stm32f103-minimum/rfid-rc522/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/rgbled/defconfig b/configs/stm32f103-minimum/rgbled/defconfig index bae4f13a9f0..057b09e1be2 100644 --- a/configs/stm32f103-minimum/rgbled/defconfig +++ b/configs/stm32f103-minimum/rgbled/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/usbnsh/defconfig b/configs/stm32f103-minimum/usbnsh/defconfig index 312a2e8505d..4d93790163d 100644 --- a/configs/stm32f103-minimum/usbnsh/defconfig +++ b/configs/stm32f103-minimum/usbnsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/userled/defconfig b/configs/stm32f103-minimum/userled/defconfig index d49398b75d9..43ee87336b1 100644 --- a/configs/stm32f103-minimum/userled/defconfig +++ b/configs/stm32f103-minimum/userled/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f103-minimum/veml6070/defconfig b/configs/stm32f103-minimum/veml6070/defconfig index 3d2065e1fad..115d1fa4914 100644 --- a/configs/stm32f103-minimum/veml6070/defconfig +++ b/configs/stm32f103-minimum/veml6070/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f3discovery/nsh/defconfig b/configs/stm32f3discovery/nsh/defconfig index a39d1174850..dcf4905161e 100644 --- a/configs/stm32f3discovery/nsh/defconfig +++ b/configs/stm32f3discovery/nsh/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f3discovery/usbnsh/defconfig b/configs/stm32f3discovery/usbnsh/defconfig index 5ddb409c8ac..1ffe9da4444 100644 --- a/configs/stm32f3discovery/usbnsh/defconfig +++ b/configs/stm32f3discovery/usbnsh/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f411e-disco/nsh/defconfig b/configs/stm32f411e-disco/nsh/defconfig index da44560a907..0dd9aff2d14 100644 --- a/configs/stm32f411e-disco/nsh/defconfig +++ b/configs/stm32f411e-disco/nsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f429i-disco/extflash/defconfig b/configs/stm32f429i-disco/extflash/defconfig index bbca59a2f8e..4815ca65f5f 100644 --- a/configs/stm32f429i-disco/extflash/defconfig +++ b/configs/stm32f429i-disco/extflash/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f429i-disco/lcd/defconfig b/configs/stm32f429i-disco/lcd/defconfig index 40f7f3cb77e..ca016600571 100644 --- a/configs/stm32f429i-disco/lcd/defconfig +++ b/configs/stm32f429i-disco/lcd/defconfig @@ -126,8 +126,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f429i-disco/ltdc/defconfig b/configs/stm32f429i-disco/ltdc/defconfig index bfbad09b9e9..c657306064e 100644 --- a/configs/stm32f429i-disco/ltdc/defconfig +++ b/configs/stm32f429i-disco/ltdc/defconfig @@ -126,8 +126,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f429i-disco/nsh/defconfig b/configs/stm32f429i-disco/nsh/defconfig index f8a7096efdd..5ef88f3db58 100644 --- a/configs/stm32f429i-disco/nsh/defconfig +++ b/configs/stm32f429i-disco/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f429i-disco/nxwm/defconfig b/configs/stm32f429i-disco/nxwm/defconfig index b161e8af4a6..c79f7605eb7 100644 --- a/configs/stm32f429i-disco/nxwm/defconfig +++ b/configs/stm32f429i-disco/nxwm/defconfig @@ -126,8 +126,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f429i-disco/usbmsc/defconfig b/configs/stm32f429i-disco/usbmsc/defconfig index 1707faa7de5..b7f855e112b 100644 --- a/configs/stm32f429i-disco/usbmsc/defconfig +++ b/configs/stm32f429i-disco/usbmsc/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f429i-disco/usbnsh/defconfig b/configs/stm32f429i-disco/usbnsh/defconfig index bc4c70dec6c..2b2c0a4ea9c 100644 --- a/configs/stm32f429i-disco/usbnsh/defconfig +++ b/configs/stm32f429i-disco/usbnsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/canard/defconfig b/configs/stm32f4discovery/canard/defconfig index 8a34f9a42bd..e3378d9df33 100644 --- a/configs/stm32f4discovery/canard/defconfig +++ b/configs/stm32f4discovery/canard/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/cxxtest/defconfig b/configs/stm32f4discovery/cxxtest/defconfig index fb1f67612fd..736dca9f6ce 100644 --- a/configs/stm32f4discovery/cxxtest/defconfig +++ b/configs/stm32f4discovery/cxxtest/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/elf/defconfig b/configs/stm32f4discovery/elf/defconfig index 332126c7c79..cf42ee96b1c 100644 --- a/configs/stm32f4discovery/elf/defconfig +++ b/configs/stm32f4discovery/elf/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/include/board.h b/configs/stm32f4discovery/include/board.h index 805d5f6ce12..91077e674fc 100644 --- a/configs/stm32f4discovery/include/board.h +++ b/configs/stm32f4discovery/include/board.h @@ -300,9 +300,9 @@ /* SPI - There is a MEMS device on SPI1 using these pins: */ -#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 -#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 -#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 +#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 +#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 +#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1 /* SPI2 - Test MAX31855 on SPI2 PB10 = SCK, PB14 = MISO */ @@ -310,10 +310,38 @@ #define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 #define GPIO_SPI2_SCK GPIO_SPI2_SCK_1 +/* SPI3 - Onboard devices use SPI3 */ + +#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2 +#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2 +#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2 +#define GPIO_SPI3_NSS GPIO_SPI3_NSS_2 + +/* I2S3 - Onboard devices use I2S3 */ + +#define GPIO_I2S3_SD GPIO_I2S3_SD_2 +#define GPIO_I2S3_CK GPIO_I2S3_CK_2 +#define GPIO_I2S3_WS GPIO_I2S3_WS_1 + +#define DMACHAN_SPI3_RX DMAMAP_SPI3_RX_2 +#define DMACHAN_SPI3_TX DMAMAP_SPI3_TX_2 + /* I2C config to use with Nunchuk PB7 (SDA) and PB8 (SCL) */ +#if 0 #define GPIO_I2C1_SCL GPIO_I2C1_SCL_2 #define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 +#endif + +/* I2C. Only I2C1 is available on the stm32f4discovery. I2C1_SCL and I2C1_SDA are + * available on the following pins: + * + * - PB6 is I2C1_SCL + * - PB9 is I2C1_SDA + */ + +#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 +#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 /* Timer Inputs/Outputs (see the README.txt file for options) */ diff --git a/configs/stm32f4discovery/ipv6/defconfig b/configs/stm32f4discovery/ipv6/defconfig index d860767e3e9..2db3c1beeb3 100644 --- a/configs/stm32f4discovery/ipv6/defconfig +++ b/configs/stm32f4discovery/ipv6/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/kostest/defconfig b/configs/stm32f4discovery/kostest/defconfig index 0f4e7f28823..ea9e35d2f92 100644 --- a/configs/stm32f4discovery/kostest/defconfig +++ b/configs/stm32f4discovery/kostest/defconfig @@ -133,8 +133,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/netnsh/defconfig b/configs/stm32f4discovery/netnsh/defconfig index 73c893e58ae..ada356f924a 100644 --- a/configs/stm32f4discovery/netnsh/defconfig +++ b/configs/stm32f4discovery/netnsh/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/nsh/defconfig b/configs/stm32f4discovery/nsh/defconfig index fb476819e86..78f20fe4e4c 100644 --- a/configs/stm32f4discovery/nsh/defconfig +++ b/configs/stm32f4discovery/nsh/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/nxlines/defconfig b/configs/stm32f4discovery/nxlines/defconfig index 00bc8ce335c..3ca9c479add 100644 --- a/configs/stm32f4discovery/nxlines/defconfig +++ b/configs/stm32f4discovery/nxlines/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/pm/defconfig b/configs/stm32f4discovery/pm/defconfig index 60084550d89..11fc388755b 100644 --- a/configs/stm32f4discovery/pm/defconfig +++ b/configs/stm32f4discovery/pm/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/posix_spawn/defconfig b/configs/stm32f4discovery/posix_spawn/defconfig index 1c8d37ccdd8..f9eaa1d6470 100644 --- a/configs/stm32f4discovery/posix_spawn/defconfig +++ b/configs/stm32f4discovery/posix_spawn/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/pseudoterm/defconfig b/configs/stm32f4discovery/pseudoterm/defconfig index f07e6f5639a..a4e5461f78d 100644 --- a/configs/stm32f4discovery/pseudoterm/defconfig +++ b/configs/stm32f4discovery/pseudoterm/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/rgbled/defconfig b/configs/stm32f4discovery/rgbled/defconfig index ddecfe7d277..f9d94635326 100644 --- a/configs/stm32f4discovery/rgbled/defconfig +++ b/configs/stm32f4discovery/rgbled/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/src/Makefile b/configs/stm32f4discovery/src/Makefile index d51d09ce1da..d7154251b3d 100644 --- a/configs/stm32f4discovery/src/Makefile +++ b/configs/stm32f4discovery/src/Makefile @@ -44,6 +44,10 @@ else CSRCS += stm32_userleds.c endif +ifeq ($(CONFIG_AUDIO_CS43L22),y) +CSRCS += stm32_cs43l22.c +endif + ifeq ($(CONFIG_ARCH_BUTTONS),y) CSRCS += stm32_buttons.c endif diff --git a/configs/stm32f4discovery/src/stm32_bringup.c b/configs/stm32f4discovery/src/stm32_bringup.c index e360c8cc0c7..042c3386fc8 100644 --- a/configs/stm32f4discovery/src/stm32_bringup.c +++ b/configs/stm32f4discovery/src/stm32_bringup.c @@ -216,6 +216,16 @@ int stm32_bringup(void) } #endif +#ifdef HAVE_CS43L22 + /* Configure CS43L22 audio */ + + ret = stm32_cs43l22_initialize(1); + if (ret != OK) + { + serr("Failed to initialize CS43L22 audio: %d\n", ret); + } +#endif + #ifdef HAVE_ELF /* Initialize the ELF binary loader */ diff --git a/configs/stm32f4discovery/src/stm32_cs43l22.c b/configs/stm32f4discovery/src/stm32_cs43l22.c new file mode 100644 index 00000000000..156458ead89 --- /dev/null +++ b/configs/stm32f4discovery/src/stm32_cs43l22.c @@ -0,0 +1,389 @@ +/************************************************************************************ + * configs/stm32f4discovery/src/stm32_cs43l22.c + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Taras Drozdovskiy + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include "stm32.h" +#include "stm32f4discovery.h" + +#ifdef HAVE_CS43L22 + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_mwinfo_s +{ + /* Standard CS43L22 interface */ + + struct cs43l22_lower_s lower; + + /* Extensions for the stm32f4discovery board */ + + cs43l22_handler_t handler; + FAR void *arg; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the CS43L22 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the CS43L22 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + */ + +static int cs43l22_attach(FAR const struct cs43l22_lower_s *lower, + cs43l22_handler_t isr, FAR void *arg); +static bool cs43l22_enable(FAR const struct cs43l22_lower_s *lower, + bool enable); +static void cs43l22_hw_reset(FAR const struct cs43l22_lower_s *lower); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* A reference to a structure of this type must be passed to the CS43L22 + * driver. This structure provides information about the configuration + * of the CS43L22 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +#define CONFIG_STM32_CS43L22_I2CFREQUENCY 100000 +#define BOARD_MAINCK_FREQUENCY 8000000 + +static struct stm32_mwinfo_s g_cs43l22info = +{ + .lower = + { + .address = CS43L22_I2C_ADDRESS, + .frequency = CONFIG_STM32_CS43L22_I2CFREQUENCY, +#ifdef CONFIG_STM32_CS43L22_SRCSCK + .mclk = BOARD_SLOWCLK_FREQUENCY, +#else + .mclk = BOARD_MAINCK_FREQUENCY, +#endif + .attach = cs43l22_attach, + .enable = cs43l22_enable, + .reset = cs43l22_hw_reset, + }, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * IRQ/PIO access callbacks. These operations all hidden behind + * callbacks to isolate the CS43L22 driver from differences in PIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach the CS43L22 interrupt handler to the PIO interrupt + * enable - Enable or disable the PIO interrupt + * clear - Acknowledge/clear any pending PIO interrupt + * + ****************************************************************************/ + +static int cs43l22_attach(FAR const struct cs43l22_lower_s *lower, + cs43l22_handler_t isr, FAR void *arg) +{ + if (isr) + { + /* Just save the address of the handler and its argument for now. The + * new handler will called via cs43l22_interrupt() when the interrupt occurs. + */ + + audinfo("Attaching %p\n", isr); + g_cs43l22info.handler = isr; + g_cs43l22info.arg = arg; + } + else + { + audinfo("Detaching %p\n", g_cs43l22info.handler); + (void)cs43l22_enable(lower, false); + g_cs43l22info.handler = NULL; + g_cs43l22info.arg = NULL; + } + + return OK; +} + +static bool cs43l22_enable(FAR const struct cs43l22_lower_s *lower, bool enable) +{ + static bool enabled; + irqstate_t flags; + bool ret; + + /* Has the interrupt state changed */ + + flags = enter_critical_section(); + if (enable != enabled) + { + /* Enable or disable interrupts */ + + if (enable && g_cs43l22info.handler) + { + audinfo("Enabling\n"); + /* TODO: stm32_pioirqenable(IRQ_INT_CS43L22); */ + enabled = true; + } + else + { + + audinfo("Disabling\n"); + /* TODO: stm32_pioirqdisable(IRQ_INT_CS43L22); */ + enabled = false; + } + } + + ret = enabled; + leave_critical_section(flags); + return ret; +} + +#if 0 +static int cs43l22_interrupt(int irq, FAR void *context) +{ + Just forward the interrupt to the CS43L22 driver + + audinfo("handler %p\n", g_cs43l22info.handler); + if (g_cs43l22info.handler) + { + return g_cs43l22info.handler(&g_cs43l22info.lower, g_cs43l22info.arg); + } + + We got an interrupt with no handler. This should not + happen. + + TODO: stm32_pioirqdisable(IRQ_INT_CS43L22); + return OK; +} +#endif + +static void cs43l22_hw_reset(FAR const struct cs43l22_lower_s *lower) +{ + int i; + + /* Reset the codec */ + + stm32_gpiowrite(GPIO_CS43L22_RESET, false); + for (i = 0; i < 0x4fff; i++) + { + __asm__ volatile("nop"); + } + + stm32_gpiowrite(GPIO_CS43L22_RESET, true); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_cs43l22_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the CS43L22 device. This function will register the driver + * as /dev/audio/pcm[x] where x is determined by the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +int stm32_cs43l22_initialize(int minor) +{ + FAR struct audio_lowerhalf_s *cs43l22; + FAR struct audio_lowerhalf_s *pcm; + FAR struct i2c_master_s *i2c; + FAR struct i2s_dev_s *i2s; + static bool initialized = false; + char devname[12]; + int ret; + + audinfo("minor %d\n", minor); + DEBUGASSERT(minor >= 0 && minor <= 25); + + /* Have we already initialized? Since we never uninitialize we must prevent + * multiple initializations. This is necessary, for example, when the + * touchscreen example is used as a built-in application in NSH and can be + * called numerous time. It will attempt to initialize each time. + */ + + if (!initialized) + { + stm32_configgpio(GPIO_CS43L22_RESET); + + /* Configure the CS43L22 interrupt pin */ + + /* TODO: (void)stm32_configgpio(PIO_INT_CS43L22); */ + + /* Get an instance of the I2C interface for the CS43L22 chip select */ + + i2c = stm32_i2cbus_initialize(CS43L22_I2C_BUS); + if (!i2c) + { + auderr("ERROR: Failed to initialize TWI%d\n", CS43L22_I2C_BUS); + ret = -ENODEV; + goto errout; + } + /* Get an instance of the I2S interface for the CS43L22 data channel */ + + i2s = stm32_i2sdev_initialize(CS43L22_I2S_BUS); + if (!i2s) + { + auderr("ERROR: Failed to initialize I2S%d\n", CS43L22_I2S_BUS); + ret = -ENODEV; + goto errout_with_i2c; + } + + /* Configure the DAC master clock. This clock is provided by PCK2 (PB10) + * that is connected to the CS43L22 MCLK. + */ + + /* Configure CS43L22 interrupts */ + +#if 0 /* TODO: */ + stm32_pioirq(PIO_INT_CS43L22); + ret = irq_attach(IRQ_INT_CS43L22, cs43l22_interrupt); + if (ret < 0) + { + auderr("ERROR: Failed to attach CS43L22 interrupt: %d\n", ret); + goto errout_with_i2s; + } +#endif + + /* Now we can use these I2C and I2S interfaces to initialize the + * CS43L22 which will return an audio interface. + */ + + cs43l22 = cs43l22_initialize(i2c, i2s, &g_cs43l22info.lower); + if (!cs43l22) + { + auderr("ERROR: Failed to initialize the CS43L22\n"); + ret = -ENODEV; + goto errout_with_irq; + } + /* No we can embed the CS43L22/I2C/I2S conglomerate into a PCM decoder + * instance so that we will have a PCM front end for the the CS43L22 + * driver. + */ + + pcm = pcm_decode_initialize(cs43l22); + if (!pcm) + { + auderr("ERROR: Failed create the PCM decoder\n"); + ret = -ENODEV; + goto errout_with_cs43l22; + } + /* Create a device name */ + + snprintf(devname, 12, "pcm%d", minor); + + /* Finally, we can register the PCM/CS43L22/I2C/I2S audio device. + * + * Is anyone young enough to remember Rube Goldberg? + */ + + ret = audio_register(devname, pcm); + if (ret < 0) + { + auderr("ERROR: Failed to register /dev/%s device: %d\n", + devname, ret); + goto errout_with_pcm; + } + + /* Now we are initialized */ + + initialized = true; + } + + return OK; + + /* Error exits. Unfortunately there is no mechanism in place now to + * recover resources from most errors on initialization failures. + */ + +errout_with_pcm: +errout_with_cs43l22: +errout_with_irq: + +#if 0 + irq_detach(IRQ_INT_CS43L22); +errout_with_i2s: +#endif + +errout_with_i2c: +errout: + return ret; +} + +#endif /* HAVE_CS43L22 */ diff --git a/configs/stm32f4discovery/src/stm32f4discovery.h b/configs/stm32f4discovery/src/stm32f4discovery.h index 75892830adb..eaeed154482 100644 --- a/configs/stm32f4discovery/src/stm32f4discovery.h +++ b/configs/stm32f4discovery/src/stm32f4discovery.h @@ -77,6 +77,7 @@ #define HAVE_USBHOST 1 #define HAVE_USBMONITOR 1 #define HAVE_SDIO 1 +#define HAVE_CS43L22 1 #define HAVE_RTC_DRIVER 1 #define HAVE_ELF 1 #define HAVE_NETMONITOR 1 @@ -148,6 +149,26 @@ # endif #endif +/* The CS43L22 depends on the CS43L22 driver, I2C1, and I2S3 support */ + +#if !defined(CONFIG_AUDIO_CS43L22) || !defined(CONFIG_STM32_I2C1) || \ + !defined(CONFIG_STM32_I2S3) +# undef HAVE_CS43L22 +#endif + +#ifdef HAVE_CS43L22 + /* The CS43L22 communicates on I2C1, I2C address 0x1a for control + * operations + */ + +# define CS43L22_I2C_BUS 1 +# define CS43L22_I2C_ADDRESS (0x94 >> 1) + + /* The CS43L22 transfers data on I2S3 */ + +# define CS43L22_I2S_BUS 3 +#endif + /* Check if we can support the RTC driver */ #if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER) @@ -216,6 +237,8 @@ #define GPIO_ZEROCROSS (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN0) +#define GPIO_CS43L22_RESET (GPIO_OUTPUT|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN4) + /* PWM * * The STM32F4 Discovery has no real on-board PWM devices, but the board can be @@ -369,6 +392,17 @@ void weak_function stm32_spidev_initialize(void); + /**************************************************************************** + * Name: stm32_i2sdev_initialize + * + * Description: + * Called to configure I2S chip select GPIO pins for the stm32f4discovery + * board. + * + ****************************************************************************/ + + FAR struct i2s_dev_s *stm32_i2sdev_initialize(int port); + /**************************************************************************** * Name: stm32_bh1750initialize * @@ -608,6 +642,27 @@ int stm32_zerocross_initialize(void); int stm32_max6675initialize(FAR const char *devpath); #endif +/**************************************************************************** + * Name: stm32_cs43l22_initialize + * + * Description: + * This function is called by platform-specific, setup logic to configure + * and register the CS43L22 device. This function will register the driver + * as /dev/cs43l22[x] where x is determined by the minor device number. + * + * Input Parameters: + * minor - The input device minor number + * + * Returned Value: + * Zero is returned on success. Otherwise, a negated errno value is + * returned to indicate the nature of the failure. + * + ****************************************************************************/ + +#ifdef HAVE_CS43L22 +int stm32_cs43l22_initialize(int minor); +#endif /* HAVE_CS43L22 */ + /**************************************************************************** * Name: stm32_pca9635_initialize * diff --git a/configs/stm32f4discovery/uavcan/defconfig b/configs/stm32f4discovery/uavcan/defconfig index 6fc7f915d29..ca307a20064 100644 --- a/configs/stm32f4discovery/uavcan/defconfig +++ b/configs/stm32f4discovery/uavcan/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/usbnsh/defconfig b/configs/stm32f4discovery/usbnsh/defconfig index f5c9f5d7ab3..35c6cd7d45e 100644 --- a/configs/stm32f4discovery/usbnsh/defconfig +++ b/configs/stm32f4discovery/usbnsh/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/winbuild/defconfig b/configs/stm32f4discovery/winbuild/defconfig index db8d26e2ff9..0deb8cd65b1 100644 --- a/configs/stm32f4discovery/winbuild/defconfig +++ b/configs/stm32f4discovery/winbuild/defconfig @@ -108,7 +108,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXA8 is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -CONFIG_ARM_TOOLCHAIN_GNU=y +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f4discovery/xen1210/defconfig b/configs/stm32f4discovery/xen1210/defconfig index 1a29b5fba62..514ce52a4e2 100644 --- a/configs/stm32f4discovery/xen1210/defconfig +++ b/configs/stm32f4discovery/xen1210/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32f746-ws/nsh/defconfig b/configs/stm32f746-ws/nsh/defconfig index 80f75265206..eeb171767ed 100644 --- a/configs/stm32f746-ws/nsh/defconfig +++ b/configs/stm32f746-ws/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32f7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/stm32f746g-disco/nsh/defconfig b/configs/stm32f746g-disco/nsh/defconfig index 190d776f420..5fdda7f0741 100644 --- a/configs/stm32f746g-disco/nsh/defconfig +++ b/configs/stm32f746g-disco/nsh/defconfig @@ -131,8 +131,7 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32f7" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/stm32l476-mdk/nsh/defconfig b/configs/stm32l476-mdk/nsh/defconfig index a529cb5fbf3..c94b92be899 100644 --- a/configs/stm32l476-mdk/nsh/defconfig +++ b/configs/stm32l476-mdk/nsh/defconfig @@ -122,8 +122,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32l4" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/stm32l476vg-disco/nsh/defconfig b/configs/stm32l476vg-disco/nsh/defconfig index fcb84c92cc0..ec45e553a1c 100644 --- a/configs/stm32l476vg-disco/nsh/defconfig +++ b/configs/stm32l476vg-disco/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32l4" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/stm32ldiscovery/nsh/defconfig b/configs/stm32ldiscovery/nsh/defconfig index 9c226c4dd4b..9dfcacb8a20 100644 --- a/configs/stm32ldiscovery/nsh/defconfig +++ b/configs/stm32ldiscovery/nsh/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/stm32vldiscovery/nsh/defconfig b/configs/stm32vldiscovery/nsh/defconfig index d8387555228..3865292e7ad 100644 --- a/configs/stm32vldiscovery/nsh/defconfig +++ b/configs/stm32vldiscovery/nsh/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/teensy-3.x/nsh/defconfig b/configs/teensy-3.x/nsh/defconfig index ce5428eb7e5..e4b50bd3c28 100644 --- a/configs/teensy-3.x/nsh/defconfig +++ b/configs/teensy-3.x/nsh/defconfig @@ -127,8 +127,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/teensy-3.x/usbnsh/defconfig b/configs/teensy-3.x/usbnsh/defconfig index b8d5a1086b8..cf01c276756 100644 --- a/configs/teensy-3.x/usbnsh/defconfig +++ b/configs/teensy-3.x/usbnsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/teensy-lc/nsh/defconfig b/configs/teensy-lc/nsh/defconfig index 15e83500b8d..66fc7e61770 100644 --- a/configs/teensy-lc/nsh/defconfig +++ b/configs/teensy-lc/nsh/defconfig @@ -125,8 +125,7 @@ CONFIG_ARCH_CORTEXM0=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv6-m" CONFIG_ARCH_CHIP="kl" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set diff --git a/configs/tm4c123g-launchpad/nsh/defconfig b/configs/tm4c123g-launchpad/nsh/defconfig index b617f84f4a1..625f0d748cb 100644 --- a/configs/tm4c123g-launchpad/nsh/defconfig +++ b/configs/tm4c123g-launchpad/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/tm4c1294-launchpad/ipv6/defconfig b/configs/tm4c1294-launchpad/ipv6/defconfig index 422e5b40be2..e663a9301bf 100644 --- a/configs/tm4c1294-launchpad/ipv6/defconfig +++ b/configs/tm4c1294-launchpad/ipv6/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/tm4c1294-launchpad/nsh/defconfig b/configs/tm4c1294-launchpad/nsh/defconfig index 7ce75c3e86d..91c0781f884 100644 --- a/configs/tm4c1294-launchpad/nsh/defconfig +++ b/configs/tm4c1294-launchpad/nsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/twr-k60n512/nsh/defconfig b/configs/twr-k60n512/nsh/defconfig index f4b6bf7f5ed..9f8055ba1b0 100644 --- a/configs/twr-k60n512/nsh/defconfig +++ b/configs/twr-k60n512/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/twr-k64f120m/netnsh/defconfig b/configs/twr-k64f120m/netnsh/defconfig index ead54aade69..ac3ca96275c 100644 --- a/configs/twr-k64f120m/netnsh/defconfig +++ b/configs/twr-k64f120m/netnsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/twr-k64f120m/nsh/defconfig b/configs/twr-k64f120m/nsh/defconfig index 911905fe7c5..c3b81237e91 100644 --- a/configs/twr-k64f120m/nsh/defconfig +++ b/configs/twr-k64f120m/nsh/defconfig @@ -121,8 +121,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="kinetis" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/u-blox-c027/nsh/defconfig b/configs/u-blox-c027/nsh/defconfig index 68b549e9f6b..d4295f62f91 100644 --- a/configs/u-blox-c027/nsh/defconfig +++ b/configs/u-blox-c027/nsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/viewtool-stm32f107/highpri/defconfig b/configs/viewtool-stm32f107/highpri/defconfig index a77a31403df..6e883f25267 100644 --- a/configs/viewtool-stm32f107/highpri/defconfig +++ b/configs/viewtool-stm32f107/highpri/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/viewtool-stm32f107/netnsh/defconfig b/configs/viewtool-stm32f107/netnsh/defconfig index e422e035c8f..92708d6039f 100644 --- a/configs/viewtool-stm32f107/netnsh/defconfig +++ b/configs/viewtool-stm32f107/netnsh/defconfig @@ -130,8 +130,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/viewtool-stm32f107/nsh/defconfig b/configs/viewtool-stm32f107/nsh/defconfig index d1231a7b2b8..bca8db1a3da 100644 --- a/configs/viewtool-stm32f107/nsh/defconfig +++ b/configs/viewtool-stm32f107/nsh/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/xmc4500-relax/nsh/defconfig b/configs/xmc4500-relax/nsh/defconfig index c6b5a1761bc..db33aac810f 100644 --- a/configs/xmc4500-relax/nsh/defconfig +++ b/configs/xmc4500-relax/nsh/defconfig @@ -128,8 +128,8 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="xmc4" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y diff --git a/configs/zkit-arm-1769/hello/defconfig b/configs/zkit-arm-1769/hello/defconfig index aee67802338..7bea34aa2df 100644 --- a/configs/zkit-arm-1769/hello/defconfig +++ b/configs/zkit-arm-1769/hello/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/zkit-arm-1769/nsh/defconfig b/configs/zkit-arm-1769/nsh/defconfig index 7f6021ea8e0..0afb96b403d 100644 --- a/configs/zkit-arm-1769/nsh/defconfig +++ b/configs/zkit-arm-1769/nsh/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/zkit-arm-1769/nxhello/defconfig b/configs/zkit-arm-1769/nxhello/defconfig index 372619e5635..5472c32bc32 100644 --- a/configs/zkit-arm-1769/nxhello/defconfig +++ b/configs/zkit-arm-1769/nxhello/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/zkit-arm-1769/thttpd/defconfig b/configs/zkit-arm-1769/thttpd/defconfig index 0866830194f..50238485e52 100644 --- a/configs/zkit-arm-1769/thttpd/defconfig +++ b/configs/zkit-arm-1769/thttpd/defconfig @@ -123,8 +123,8 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARCH_TOOLCHAIN_IAR is not set +CONFIG_ARCH_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set diff --git a/configs/zp214xpa/nsh/defconfig b/configs/zp214xpa/nsh/defconfig index 10176fb0541..1f6698b93a6 100644 --- a/configs/zp214xpa/nsh/defconfig +++ b/configs/zp214xpa/nsh/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc214x" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/configs/zp214xpa/nxlines/defconfig b/configs/zp214xpa/nxlines/defconfig index 49360faa84e..8358bb153b9 100644 --- a/configs/zp214xpa/nxlines/defconfig +++ b/configs/zp214xpa/nxlines/defconfig @@ -121,8 +121,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="lpc214x" -# CONFIG_ARM_TOOLCHAIN_IAR is not set -# CONFIG_ARM_TOOLCHAIN_GNU is not set +# CONFIG_ARCH_TOOLCHAIN_IAR is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set diff --git a/drivers/Makefile b/drivers/Makefile index 83d830c8abb..41f5d06c030 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -93,10 +93,6 @@ endif endif endif -ifeq ($(CONFIG_CAN),y) - CSRCS += can.c -endif - ifeq ($(CONFIG_PWM),y) CSRCS += pwm.c endif diff --git a/drivers/audio/Kconfig b/drivers/audio/Kconfig index ade8bc93756..3de9d1f60af 100644 --- a/drivers/audio/Kconfig +++ b/drivers/audio/Kconfig @@ -95,6 +95,67 @@ endif # AUDIO_DRIVER_SPECIFIC_BUFFERS endif # VS1053 +config AUDIO_CS43L22 + bool "CS43L22 audio chip" + default n + depends on AUDIO + ---help--- + Select to enable support for the CS43L22 Audio codec by Cirrus Logic. + This chip is a lower level audio chip.. basically + an exotic D-to-A. It includes no built-in support for audio CODECS + The CS43L22 provides: + + - Low power consumption + - High SNR + - Stereo digital microphone input + - Digital Dynamic Range Controller (compressor / limiter) + - Digital sidetone mixing + - Ground-referenced headphone driver + - Ground-referenced line outputs + + NOTE: This driver also depends on both I2C and I2S support although + that dependency is not explicit here. + +if AUDIO_CS43L22 + +config CS43L22_INITVOLUME + int "CS43L22 initial volume setting" + default 250 + +config CS43L22_INFLIGHT + int "CS43L22 maximum in-flight audio buffers" + default 2 + +config CS43L22_MSG_PRIO + int "CS43L22 message priority" + default 1 + +config CS43L22_BUFFER_SIZE + int "CS43L22 preferred buffer size" + default 8192 + +config CS43L22_NUM_BUFFERS + int "CS43L22 preferred number of buffers" + default 4 + +config CS43L22_WORKER_STACKSIZE + int "CS43L22 worker thread stack size" + default 768 + +config CS43L22_REGDUMP + bool "CS43L22 register dump" + default n + ---help--- + Enable logic to dump the contents of all CS43L22 registers. + +config CS43L22_CLKDEBUG + bool "CS43L22 clock analysis" + default n + ---help--- + Enable logic to analyze CS43L22 clock configuation. + +endif # AUDIO_CS43L22 + config AUDIO_WM8904 bool "WM8904 audio chip" default n diff --git a/drivers/audio/Make.defs b/drivers/audio/Make.defs index 5932714f6d6..96db3968602 100644 --- a/drivers/audio/Make.defs +++ b/drivers/audio/Make.defs @@ -43,6 +43,17 @@ ifeq ($(CONFIG_VS1053),y) CSRCS += vs1053.c endif +ifeq ($(CONFIG_AUDIO_CS43L22),y) +CSRCS += cs43l22.c +ifeq ($(CONFIG_CS43L22_REGDUMP),y) +CSRCS += cs43l22_debug.c +else +ifeq ($(CONFIG_CS43L22_CLKDEBUG),y) +CSRCS += cs43l22_debug.c +endif +endif +endif + ifeq ($(CONFIG_AUDIO_WM8904),y) CSRCS += wm8904.c ifeq ($(CONFIG_WM8904_REGDUMP),y) diff --git a/drivers/audio/audio_null.c b/drivers/audio/audio_null.c index d6c522101ae..4ed7a010a68 100644 --- a/drivers/audio/audio_null.c +++ b/drivers/audio/audio_null.c @@ -653,6 +653,8 @@ static int null_enqueuebuffer(FAR struct audio_lowerhalf_s *dev, FAR struct null_dev_s *priv = (FAR struct null_dev_s *)dev; bool done; + DEBUGASSERT(priv && apb && priv->dev.upper); + audinfo("apb=%p curbyte=%d nbytes=%d\n", apb, apb->curbyte, apb->nbytes); /* Say that we consumed all of the data */ @@ -663,10 +665,6 @@ static int null_enqueuebuffer(FAR struct audio_lowerhalf_s *dev, done = ((apb->flags & AUDIO_APB_FINAL) != 0); - /* And return the buffer to the upper level */ - - DEBUGASSERT(priv && apb && priv->dev.upper); - /* The buffer belongs to to an upper level. Just forward the event to * the next level up. */ diff --git a/drivers/audio/cs43l22.c b/drivers/audio/cs43l22.c new file mode 100644 index 00000000000..239144c6daf --- /dev/null +++ b/drivers/audio/cs43l22.c @@ -0,0 +1,1959 @@ +/**************************************************************************** + * drivers/audio/cs43l22.c + * Audio device driver for Cirrus logic CS43L22 Audio codec. + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Taras Drozdovskiy + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cs43l22.h" + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#if !defined(CONFIG_CS43L22_REGDUMP) && !defined(CONFIG_CS43L22_CLKDEBUG) +static +#endif +uint8_t cs43l22_readreg(FAR struct cs43l22_dev_s *priv, uint8_t regaddr); +static void cs43l22_writereg(FAR struct cs43l22_dev_s *priv, uint8_t regaddr, + uint8_t regval); +static void cs43l22_takesem(sem_t * sem); +#define cs43l22_givesem(s) sem_post(s) + +#ifndef CONFIG_AUDIO_EXCLUDE_VOLUME +static inline uint16_t cs43l22_scalevolume(uint16_t volume, b16_t scale); +static void cs43l22_setvolume(FAR struct cs43l22_dev_s *priv, uint16_t volume, + bool mute); +#endif +#ifndef CONFIG_AUDIO_EXCLUDE_TONE +static void cs43l22_setbass(FAR struct cs43l22_dev_s *priv, uint8_t bass); +static void cs43l22_settreble(FAR struct cs43l22_dev_s *priv, uint8_t treble); +#endif + +static void cs43l22_setdatawidth(FAR struct cs43l22_dev_s *priv); +static void cs43l22_setbitrate(FAR struct cs43l22_dev_s *priv); + +/* Audio lower half methods (and close friends) */ + +static int cs43l22_getcaps(FAR struct audio_lowerhalf_s *dev, int type, + FAR struct audio_caps_s *caps); +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_configure(FAR struct audio_lowerhalf_s *dev, + FAR void *session, + FAR const struct audio_caps_s *caps); +#else +static int cs43l22_configure(FAR struct audio_lowerhalf_s *dev, + FAR const struct audio_caps_s *caps); +#endif +static int cs43l22_shutdown(FAR struct audio_lowerhalf_s *dev); +static void cs43l22_senddone(FAR struct i2s_dev_s *i2s, + FAR struct ap_buffer_s *apb, FAR void *arg, + int result); +static void cs43l22_returnbuffers(FAR struct cs43l22_dev_s *priv); +static int cs43l22_sendbuffer(FAR struct cs43l22_dev_s *priv); + +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_start(FAR struct audio_lowerhalf_s *dev, FAR void *session); +#else +static int cs43l22_start(FAR struct audio_lowerhalf_s *dev); +#endif +#ifndef CONFIG_AUDIO_EXCLUDE_STOP +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_stop(FAR struct audio_lowerhalf_s *dev, FAR void *session); +#else +static int cs43l22_stop(FAR struct audio_lowerhalf_s *dev); +#endif +#endif +#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_pause(FAR struct audio_lowerhalf_s *dev, FAR void *session); +static int cs43l22_resume(FAR struct audio_lowerhalf_s *dev, FAR void *session); +#else +static int cs43l22_pause(FAR struct audio_lowerhalf_s *dev); +static int cs43l22_resume(FAR struct audio_lowerhalf_s *dev); +#endif +#endif +static int cs43l22_enqueuebuffer(FAR struct audio_lowerhalf_s *dev, + FAR struct ap_buffer_s *apb); +static int cs43l22_cancelbuffer(FAR struct audio_lowerhalf_s *dev, + FAR struct ap_buffer_s *apb); +static int cs43l22_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd, + unsigned long arg); +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_reserve(FAR struct audio_lowerhalf_s *dev, + FAR void **session); +#else +static int cs43l22_reserve(FAR struct audio_lowerhalf_s *dev); +#endif +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_release(FAR struct audio_lowerhalf_s *dev, + FAR void *session); +#else +static int cs43l22_release(FAR struct audio_lowerhalf_s *dev); +#endif + +/* Interrupt handling an worker thread */ + +#ifdef CS43L22_USE_FFLOCK_INT +static void cs43l22_interrupt_work(FAR void *arg); +static int cs43l22_interrupt(FAR const struct cs43l22_lower_s *lower, + FAR void *arg); +#endif + +static void *cs43l22_workerthread(pthread_addr_t pvarg); + +/* Initialization */ + +static void cs43l22_audio_output(FAR struct cs43l22_dev_s *priv); +#if 0 /* Not used */ +static void cs43l22_audio_input(FAR struct cs43l22_dev_s *priv); +#endif +#ifdef CS43L22_USE_FFLOCK_INT +static void cs43l22_configure_ints(FAR struct cs43l22_dev_s *priv); +#else +# define cs43l22_configure_ints(p) +#endif +static void cs43l22_reset(FAR struct cs43l22_dev_s *priv); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct audio_ops_s g_audioops = +{ + cs43l22_getcaps, /* getcaps */ + cs43l22_configure, /* configure */ + cs43l22_shutdown, /* shutdown */ + cs43l22_start, /* start */ +#ifndef CONFIG_AUDIO_EXCLUDE_STOP + cs43l22_stop, /* stop */ +#endif +#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME + cs43l22_pause, /* pause */ + cs43l22_resume, /* resume */ +#endif + NULL, /* allocbuffer */ + NULL, /* freebuffer */ + cs43l22_enqueuebuffer, /* enqueue_buffer */ + cs43l22_cancelbuffer, /* cancel_buffer */ + cs43l22_ioctl, /* ioctl */ + NULL, /* read */ + NULL, /* write */ + cs43l22_reserve, /* reserve */ + cs43l22_release /* release */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: cs43l22_readreg + * + * Description + * Read the specified 16-bit register from the CS43L22 device. + * + ****************************************************************************/ + +#if !defined(CONFIG_CS43L22_REGDUMP) && !defined(CONFIG_CS43L22_CLKDEBUG) +static +#endif +uint8_t cs43l22_readreg(FAR struct cs43l22_dev_s *priv, uint8_t regaddr) +{ + int retries; + + /* Try up to three times to read the register */ + + for (retries = 1; retries <= 3; retries++) + { + struct i2c_msg_s msg[2]; + uint8_t data; + int ret; + + /* Set up to write the address */ + + msg[0].frequency = priv->lower->frequency; + msg[0].addr = priv->lower->address; + msg[0].flags = 0; + msg[0].buffer = ®addr; + msg[0].length = 1; + + /* Followed by the read data */ + + msg[1].frequency = priv->lower->frequency; + msg[1].addr = priv->lower->address; + msg[1].flags = I2C_M_READ; + msg[1].buffer = &data; + msg[1].length = 12; + + /* Read the register data. The returned value is the number messages + * completed. + */ + + ret = I2C_TRANSFER(priv->i2c, msg, 2); + if (ret < 0) + { +#ifdef CONFIG_I2C_RESET + /* Perhaps the I2C bus is locked up? Try to shake the bus free */ + + audwarn("WARNING: I2C_TRANSFER failed: %d ... Resetting\n", ret); + + ret = I2C_RESET(priv->i2c); + if (ret < 0) + { + auderr("ERROR: I2C_RESET failed: %d\n", ret); + break; + } +#else + auderr("ERROR: I2C_TRANSFER failed: %d\n", ret); +#endif + } + else + { + + /* The I2C transfer was successful... break out of the loop and + * return the value read. + */ + + audinfo("Read: %02x -> %02x\n", regaddr, data); + return data; + } + + audinfo("retries=%d regaddr=%02x\n", retries, regaddr); + } + + /* No error indication is returned on a failure... just return zero */ + + return 0; +} + +/************************************************************************************ + * Name: cs43l22_writereg + * + * Description: + * Write the specified 16-bit register to the CS43L22 device. + * + ************************************************************************************/ + +static void +cs43l22_writereg(FAR struct cs43l22_dev_s *priv, uint8_t regaddr, + uint8_t regval) +{ + struct i2c_config_s config; + int retries; + + /* Setup up the I2C configuration */ + + config.frequency = priv->lower->frequency; + config.address = priv->lower->address; + config.addrlen = 7; + + /* Try up to three times to read the register */ + + for (retries = 1; retries <= 3; retries++) + { + uint8_t data[2]; + int ret; + + /* Set up the data to write */ + + data[0] = regaddr; + data[1] = regval; + + /* Read the register data. The returned value is the number messages + * completed. + */ + + ret = i2c_write(priv->i2c, &config, data, 2); + if (ret < 0) + { +#ifdef CONFIG_I2C_RESET + /* Perhaps the I2C bus is locked up? Try to shake the bus free */ + + audwarn("WARNING: i2c_write failed: %d ... Resetting\n", ret); + + ret = I2C_RESET(priv->i2c); + if (ret < 0) + { + auderr("ERROR: I2C_RESET failed: %d\n", ret); + break; + } +#else + auderr("ERROR: I2C_TRANSFER failed: %d\n", ret); +#endif + } + else + { + /* The I2C transfer was successful... break out of the loop and + * return the value read. + */ + + audinfo("Write: %02x <- %02x\n", regaddr, regval); + return; + } + + audinfo("retries=%d regaddr=%02x\n", retries, regaddr); + } +} + +/************************************************************************************ + * Name: cs43l22_takesem + * + * Description: + * Take a semaphore count, handling the nasty EINTR return if we are interrupted + * by a signal. + * + ************************************************************************************/ + +static void cs43l22_takesem(sem_t * sem) +{ + int ret; + + do + { + ret = sem_wait(sem); + DEBUGASSERT(ret == 0 || errno == EINTR); + } + while (ret < 0); +} + +/************************************************************************************ + * Name: cs43l22_scalevolume + * + * Description: + * Set the right and left volume values in the CS43L22 device based on the current + * volume and balance settings. + * + ************************************************************************************/ + +#ifndef CONFIG_AUDIO_EXCLUDE_VOLUME +static inline uint16_t cs43l22_scalevolume(uint16_t volume, b16_t scale) +{ + return b16toi((b16_t) volume * scale); +} +#endif + +/************************************************************************************ + * Name: cs43l22_setvolume + * + * Description: + * Set the right and left volume values in the CS43L22 device based on the current + * volume and balance settings. + * + ************************************************************************************/ + +#ifndef CONFIG_AUDIO_EXCLUDE_VOLUME +static void +cs43l22_setvolume(FAR struct cs43l22_dev_s *priv, uint16_t volume, bool mute) +{ + uint32_t leftlevel; + uint32_t rightlevel; + uint8_t regval; + + audinfo("volume=%u mute=%u\n", volume, mute); + +#ifndef CONFIG_AUDIO_EXCLUDE_BALANCE + /* Calculate the left channel volume level {0..1000} */ + + if (priv->balance <= 500) + { + leftlevel = volume; + } + else if (priv->balance == 1000) + { + leftlevel = 0; + } + else + { + leftlevel = ((((1000 - priv->balance) * 100) / 500) * volume) / 100; + } + +/* Calculate the right channel volume level {0..1000} */ + + if (priv->balance >= 500) + { + rightlevel = volume; + } + else if (priv->balance == 0) + { + rightlevel = 0; + } + else + { + rightlevel = (((priv->balance * 100) / 500) * volume) / 100; + } + +# else + leftlevel = priv->volume; + rightlevel = priv->volume; +# endif + + /* Set the volume */ + + regval = (rightlevel + 0x19) & 0xff; + cs43l22_writereg(priv, CS43L22_MS_VOL_CTRL_A, regval); + regval = ((leftlevel + 0x19) & 0xff); + cs43l22_writereg(priv, CS43L22_MS_VOL_CTRL_B, regval); + +#if 0 + regval = (rightlevel + 0x01) & 0xff; + cs43l22_writereg(priv, CS43L22_HP_VOL_CTRL_A, regval); + regval = (leftlevel + 0x01) & 0xff; + cs43l22_writereg(priv, CS43L22_HP_VOL_CTRL_B, regval); +#endif + + regval = cs43l22_readreg(priv, CS43L22_PLAYBACK_CTRL2); + + if (mute) + { + regval |= (CS43L22_HPAMUTE | CS43L22_HPBMUTE); + } + else + { + regval &= ~(CS43L22_HPAMUTE | CS43L22_HPBMUTE); + } + + cs43l22_writereg(priv, CS43L22_PLAYBACK_CTRL2, regval); + + /* Remember the volume level and mute settings */ + + priv->volume = volume; + priv->mute = mute; +} +#endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */ + +/************************************************************************************ + * Name: cs43l22_setbass + * + * Description: + * Set the bass level. + * + * The level and range are in whole percentage levels (0-100). + * + ************************************************************************************/ + +#ifndef CONFIG_AUDIO_EXCLUDE_TONE +static void cs43l22_setbass(FAR struct cs43l22_dev_s *priv, uint8_t bass) +{ + audinfo("bass=%u\n", bass); +#warning Missing logic +} +#endif /* CONFIG_AUDIO_EXCLUDE_TONE */ + +/************************************************************************************ + * Name: cs43l22_settreble + * + * Description: + * Set the treble level . + * + * The level and range are in whole percentage levels (0-100). + * + ************************************************************************************/ + +#ifndef CONFIG_AUDIO_EXCLUDE_TONE +static void cs43l22_settreble(FAR struct cs43l22_dev_s *priv, uint8_t treble) +{ + audinfo("treble=%u\n", treble); +#warning Missing logic +} +#endif /* CONFIG_AUDIO_EXCLUDE_TONE */ + +/**************************************************************************** + * Name: cs43l22_setdatawidth + * + * Description: + * Set the 8- or 16-bit data modes + * + ****************************************************************************/ + +static void cs43l22_setdatawidth(FAR struct cs43l22_dev_s *priv) +{ + if (priv->bpsamp == 16) + { + /* Reset default default setting */ + priv->i2s->ops->i2s_txdatawidth(priv->i2s, 16); + } + else + { + /* This should select 8-bit with no companding */ + priv->i2s->ops->i2s_txdatawidth(priv->i2s, 8); + } +} + +/**************************************************************************** + * Name: cs43l22_setbitrate + * + ****************************************************************************/ + +static void cs43l22_setbitrate(FAR struct cs43l22_dev_s *priv) +{ + DEBUGASSERT(priv && priv->lower); + + priv->i2s->ops->i2s_txsamplerate(priv->i2s, priv->samprate); + + audinfo("sample rate=%u nchannels=%u bpsamp=%u\n", + priv->samprate, priv->nchannels, priv->bpsamp); +} + +/**************************************************************************** + * Name: cs43l22_getcaps + * + * Description: + * Get the audio device capabilities + * + ****************************************************************************/ + +static int cs43l22_getcaps(FAR struct audio_lowerhalf_s *dev, int type, + FAR struct audio_caps_s *caps) +{ + /* Validate the structure */ + + DEBUGASSERT(caps && caps->ac_len >= sizeof(struct audio_caps_s)); + audinfo("type=%d ac_type=%d\n", type, caps->ac_type); + + /* Fill in the caller's structure based on requested info */ + + caps->ac_format.hw = 0; + caps->ac_controls.w = 0; + + switch (caps->ac_type) + { + /* Caller is querying for the types of units we support */ + + case AUDIO_TYPE_QUERY: + + /* Provide our overall capabilities. The interfacing software + * must then call us back for specific info for each capability. + */ + + caps->ac_channels = 2; /* Stereo output */ + + switch (caps->ac_subtype) + { + case AUDIO_TYPE_QUERY: + /* We don't decode any formats! Only something above us in + * the audio stream can perform decoding on our behalf. + */ + + /* The types of audio units we implement */ + + caps->ac_controls.b[0] = AUDIO_TYPE_OUTPUT | AUDIO_TYPE_FEATURE | + AUDIO_TYPE_PROCESSING; + break; + + case AUDIO_FMT_MIDI: + /* We only support Format 0 */ + + caps->ac_controls.b[0] = AUDIO_SUBFMT_END; + break; + + default: + caps->ac_controls.b[0] = AUDIO_SUBFMT_END; + break; + } + + break; + + /* Provide capabilities of our OUTPUT unit */ + + case AUDIO_TYPE_OUTPUT: + + caps->ac_channels = 2; + + switch (caps->ac_subtype) + { + case AUDIO_TYPE_QUERY: + + /* Report the Sample rates we support */ + + caps->ac_controls.b[0] = AUDIO_SAMP_RATE_8K | AUDIO_SAMP_RATE_11K | + AUDIO_SAMP_RATE_16K | AUDIO_SAMP_RATE_22K | + AUDIO_SAMP_RATE_32K | AUDIO_SAMP_RATE_44K | + AUDIO_SAMP_RATE_48K; + break; + + case AUDIO_FMT_MP3: + case AUDIO_FMT_WMA: + case AUDIO_FMT_PCM: + break; + + default: + break; + } + + break; + + /* Provide capabilities of our FEATURE units */ + + case AUDIO_TYPE_FEATURE: + + /* If the sub-type is UNDEF, then report the Feature Units we support */ + + if (caps->ac_subtype == AUDIO_FU_UNDEF) + { + /* Fill in the ac_controls section with the Feature Units we have */ + + caps->ac_controls.b[0] = AUDIO_FU_VOLUME | AUDIO_FU_BASS | AUDIO_FU_TREBLE; + caps->ac_controls.b[1] = AUDIO_FU_BALANCE >> 8; + } + else + { + /* TODO: Do we need to provide specific info for the Feature Units, + * such as volume setting ranges, etc.? + */ + } + + break; + + /* Provide capabilities of our PROCESSING unit */ + + case AUDIO_TYPE_PROCESSING: + + switch (caps->ac_subtype) + { + case AUDIO_PU_UNDEF: + /* Provide the type of Processing Units we support */ + + caps->ac_controls.b[0] = AUDIO_PU_STEREO_EXTENDER; + break; + + case AUDIO_PU_STEREO_EXTENDER: + /* Provide capabilities of our Stereo Extender */ + + caps->ac_controls.b[0] = AUDIO_STEXT_ENABLE | AUDIO_STEXT_WIDTH; + break; + + default: + /* Other types of processing uint we don't support */ + + break; + } + break; + + /* All others we don't support */ + + default: + + /* Zero out the fields to indicate no support */ + + caps->ac_subtype = 0; + caps->ac_channels = 0; + + break; + } + + /* Return the length of the audio_caps_s struct for validation of + * proper Audio device type. + */ + + return caps->ac_len; +} + +/**************************************************************************** + * Name: cs43l22_configure + * + * Description: + * Configure the audio device for the specified mode of operation. + * + ****************************************************************************/ + +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int +cs43l22_configure(FAR struct audio_lowerhalf_s *dev, + FAR void *session, FAR const struct audio_caps_s *caps) +#else +static int +cs43l22_configure(FAR struct audio_lowerhalf_s *dev, + FAR const struct audio_caps_s *caps) +#endif +{ +#if !defined(CONFIG_AUDIO_EXCLUDE_VOLUME) || !defined(CONFIG_AUDIO_EXCLUDE_TONE) + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)dev; +#endif + int ret = OK; + + DEBUGASSERT(priv && caps); + audinfo("ac_type: %d\n", caps->ac_type); + + /* Process the configure operation */ + + switch (caps->ac_type) + { + case AUDIO_TYPE_FEATURE: + audinfo(" AUDIO_TYPE_FEATURE\n"); + + /* Process based on Feature Unit */ + + switch (caps->ac_format.hw) + { +#ifndef CONFIG_AUDIO_EXCLUDE_VOLUME + case AUDIO_FU_VOLUME: + { + /* Set the volume */ + + uint16_t volume = caps->ac_controls.hw[0]; + audinfo(" Volume: %d\n", volume); + + if (volume >= 0 && volume <= 1000) + { + /* Scale the volume setting to the range {76..255} */ + + cs43l22_setvolume(priv, (179 * volume / 1000) + 76, priv->mute); + } + else + { + ret = -EDOM; + } + } + break; +#endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */ + +#ifndef CONFIG_AUDIO_EXCLUDE_BALANCE + case AUDIO_FU_BALANCE: + { + /* Set the Balance */ + + uint16_t balance = caps->ac_controls.hw[0]; + audinfo(" Balance: %d\n", balance); + if (balance >= 0 && balance <= 1000) + { + /* Scale the volume setting to the range {76..255} */ + + cs43l22_setvolume(priv, (179 * priv->volume / 1000) + 76, + priv->mute); + } + else + { + ret = -EDOM; + } + } + break; +#endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */ + +#ifndef CONFIG_AUDIO_EXCLUDE_TONE + case AUDIO_FU_BASS: + { + /* Set the bass. The percentage level (0-100) is in the + * ac_controls.b[0] parameter. + */ + + uint8_t bass = caps->ac_controls.b[0]; + audinfo(" Bass: %d\n", bass); + + if (bass <= 100) + { + cs43l22_setbass(priv, bass); + } + else + { + ret = -EDOM; + } + } + break; + + case AUDIO_FU_TREBLE: + { + /* Set the treble. The percentage level (0-100) is in the + * ac_controls.b[0] parameter. + */ + + uint8_t treble = caps->ac_controls.b[0]; + audinfo(" Treble: %d\n", treble); + + if (treble <= 100) + { + cs43l22_settreble(priv, treble); + } + else + { + ret = -EDOM; + } + } + break; +#endif /* CONFIG_AUDIO_EXCLUDE_TONE */ + + default: + auderr(" ERROR: Unrecognized feature unit\n"); + ret = -ENOTTY; + break; + } + break; + + case AUDIO_TYPE_OUTPUT: + { + audinfo(" AUDIO_TYPE_OUTPUT:\n"); + audinfo(" Number of channels: %u\n", caps->ac_channels); + audinfo(" Sample rate: %u\n", caps->ac_controls.hw[0]); + audinfo(" Sample width: %u\n", caps->ac_controls.b[2]); + + /* Verify that all of the requested values are supported */ + + ret = -ERANGE; + if (caps->ac_channels != 1 && caps->ac_channels != 2) + { + auderr("ERROR: Unsupported number of channels: %d\n", + caps->ac_channels); + break; + } + + if (caps->ac_controls.b[2] != 8 && caps->ac_controls.b[2] != 16) + { + auderr("ERROR: Unsupported bits per sample: %d\n", + caps->ac_controls.b[2]); + break; + } + + /* Save the current stream configuration */ + + priv->samprate = caps->ac_controls.hw[0]; + priv->nchannels = caps->ac_channels; + priv->bpsamp = caps->ac_controls.b[2]; + + /* Reconfigure the FLL to support the resulting number or channels, + * bits per sample, and bitrate. + */ + + cs43l22_setdatawidth(priv); + cs43l22_setbitrate(priv); + cs43l22_clock_analysis(&priv->dev, "AUDIO_TYPE_OUTPUT"); + ret = OK; + } + break; + + case AUDIO_TYPE_PROCESSING: + break; + } + + return ret; +} + +/**************************************************************************** + * Name: cs43l22_shutdown + * + * Description: + * Shutdown the CS43L22 chip and put it in the lowest power state possible. + * + ****************************************************************************/ + +static int cs43l22_shutdown(FAR struct audio_lowerhalf_s *dev) +{ + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)dev; + + DEBUGASSERT(priv); + + /* First disable interrupts */ + + CS43L22_DISABLE(priv->lower); + + /* Now issue a software reset. This puts all CS43L22 registers back in + * their default state. + */ + + cs43l22_reset(priv); + return OK; +} + +/**************************************************************************** + * Name: cs43l22_senddone + * + * Description: + * This is the I2S callback function that is invoked when the transfer + * completes. + * + ****************************************************************************/ + +static void +cs43l22_senddone(FAR struct i2s_dev_s *i2s, + FAR struct ap_buffer_s *apb, FAR void *arg, int result) +{ + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)arg; + struct audio_msg_s msg; + irqstate_t flags; + int ret; + + DEBUGASSERT(i2s && priv && priv->running && apb); + audinfo("apb=%p inflight=%d result=%d\n", apb, priv->inflight, result); + + /* We do not place any restriction on the context in which this function + * is called. It may be called from an interrupt handler. Therefore, the + * doneq and in-flight values might be accessed from the interrupt level. + * Not the best design. But we will use interrupt controls to protect + * against that possibility. + */ + + flags = enter_critical_section(); + + /* Add the completed buffer to the end of our doneq. We do not yet + * decrement the reference count. + */ + + dq_addlast((FAR dq_entry_t *)apb, &priv->doneq); + + /* And decrement the number of buffers in-flight */ + + DEBUGASSERT(priv->inflight > 0); + priv->inflight--; + + /* Save the result of the transfer */ + /* REVISIT: This can be overwritten */ + + priv->result = result; + leave_critical_section(flags); + + /* Now send a message to the worker thread, informing it that there are + * buffers in the done queue that need to be cleaned up. + */ + + msg.msgId = AUDIO_MSG_COMPLETE; + ret = mq_send(priv->mq, (FAR const char *)&msg, sizeof(msg), + CONFIG_CS43L22_MSG_PRIO); + if (ret < 0) + { + auderr("ERROR: mq_send failed: %d\n", errno); + } +} + +/**************************************************************************** + * Name: cs43l22_returnbuffers + * + * Description: + * This function is called after the complete of one or more data + * transfers. This function will empty the done queue and release our + * reference to each buffer. + * + ****************************************************************************/ + +static void cs43l22_returnbuffers(FAR struct cs43l22_dev_s *priv) +{ + FAR struct ap_buffer_s *apb; + irqstate_t flags; + + /* The doneq and in-flight values might be accessed from the interrupt + * level in some implementations. Not the best design. But we will + * use interrupt controls to protect against that possibility. + */ + + flags = enter_critical_section(); + while (dq_peek(&priv->doneq) != NULL) + { + /* Take the next buffer from the queue of completed transfers */ + + apb = (FAR struct ap_buffer_s *)dq_remfirst(&priv->doneq); + leave_critical_section(flags); + + audinfo("Returning: apb=%p curbyte=%d nbytes=%d flags=%04x\n", + apb, apb->curbyte, apb->nbytes, apb->flags); + + /* Are we returning the final buffer in the stream? */ + + if ((apb->flags & AUDIO_APB_FINAL) != 0) + { + /* Both the pending and the done queues should be empty and there + * should be no buffers in-flight. + */ + + DEBUGASSERT(dq_empty(&priv->doneq) && dq_empty(&priv->pendq) && + priv->inflight == 0); + + /* Set the terminating flag. This will, eventually, cause the + * worker thread to exit (if it is not already terminating). + */ + + audinfo("Terminating\n"); + priv->terminating = true; + } + + /* Release our reference to the audio buffer */ + + apb_free(apb); + + /* Send the buffer back up to the previous level. */ + +#ifdef CONFIG_AUDIO_MULTI_SESSION + priv->dev.upper(priv->dev.priv, AUDIO_CALLBACK_DEQUEUE, apb, OK, NULL); +#else + priv->dev.upper(priv->dev.priv, AUDIO_CALLBACK_DEQUEUE, apb, OK); +#endif + flags = enter_critical_section(); + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: cs43l22_sendbuffer + * + * Description: + * Start the transfer an audio buffer to the CS43L22 via I2S. This + * will not wait for the transfer to complete but will return immediately. + * the wmd8904_senddone called will be invoked when the transfer + * completes, stimulating the worker thread to call this function again. + * + ****************************************************************************/ + +static int cs43l22_sendbuffer(FAR struct cs43l22_dev_s *priv) +{ + FAR struct ap_buffer_s *apb; + irqstate_t flags; + uint32_t timeout; + int shift; + int ret = OK; + + /* Loop while there are audio buffers to be sent and we have few than + * CONFIG_CS43L22_INFLIGHT then "in-flight" + * + * The 'inflight' value might be modified from the interrupt level in some + * implementations. We will use interrupt controls to protect against + * that possibility. + * + * The 'pendq', on the other hand, is protected via a semaphore. Let's + * hold the semaphore while we are busy here and disable the interrupts + * only while accessing 'inflight'. + */ + + cs43l22_takesem(&priv->pendsem); + while (priv->inflight < CONFIG_CS43L22_INFLIGHT && + dq_peek(&priv->pendq) != NULL && !priv->paused) + { + /* Take next buffer from the queue of pending transfers */ + + apb = (FAR struct ap_buffer_s *)dq_remfirst(&priv->pendq); + audinfo("Sending apb=%p, size=%d inflight=%d\n", + apb, apb->nbytes, priv->inflight); + + /* Increment the number of buffers in-flight before sending in order + * to avoid a possible race condition. + */ + + flags = enter_critical_section(); + priv->inflight++; + leave_critical_section(flags); + + /* Send the entire audio buffer via I2S. What is a reasonable timeout + * to use? This would depend on the bit rate and size of the buffer. + * + * Samples in the buffer (samples): + * = buffer_size * 8 / bpsamp samples + * Sample rate (samples/second): + * = samplerate * nchannels + * Expected transfer time (seconds): + * = (buffer_size * 8) / bpsamp / samplerate / nchannels + * + * We will set the timeout about twice that. + * + * NOTES: + * - The multiplier of 8 becomes 16000 for 2x and units of + * milliseconds. + * - 16000 is a approximately 16384 (1 << 14), bpsamp is either + * (1 << 3) or (1 << 4), and nchannels is either (1 << 0) or + * (1 << 1). So this can be simplifies to (milliseconds): + * + * = (buffer_size << shift) / samplerate + */ + + shift = (priv->bpsamp == 8) ? 14 - 3 : 14 - 4; + shift -= (priv->nchannels > 1) ? 1 : 0; + + timeout = MSEC2TICK(((uint32_t)(apb->nbytes - apb->curbyte) << shift) / + (uint32_t)priv->samprate); + + ret = I2S_SEND(priv->i2s, apb, cs43l22_senddone, priv, timeout); + if (ret < 0) + { + auderr("ERROR: I2S_SEND failed: %d\n", ret); + break; + } + } + + cs43l22_givesem(&priv->pendsem); + return ret; +} + +/**************************************************************************** + * Name: cs43l22_start + * + * Description: + * Start the configured operation (audio streaming, volume enabled, etc.). + * + ****************************************************************************/ + +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_start(FAR struct audio_lowerhalf_s *dev, FAR void *session) +#else +static int cs43l22_start(FAR struct audio_lowerhalf_s *dev) +#endif +{ + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)dev; + struct sched_param sparam; + struct mq_attr attr; + pthread_attr_t tattr; + FAR void *value; + int ret; + + audinfo("Entry\n"); + + /* Exit reduced power modes of operation */ + /* REVISIT */ + + /* Create a message queue for the worker thread */ + + snprintf(priv->mqname, sizeof(priv->mqname), "/tmp/%X", priv); + + attr.mq_maxmsg = 16; + attr.mq_msgsize = sizeof(struct audio_msg_s); + attr.mq_curmsgs = 0; + attr.mq_flags = 0; + + priv->mq = mq_open(priv->mqname, O_RDWR | O_CREAT, 0644, &attr); + if (priv->mq == NULL) + { + /* Error creating message queue! */ + + auderr("ERROR: Couldn't allocate message queue\n"); + return -ENOMEM; + } + + /* Join any old worker thread we had created to prevent a memory leak */ + + if (priv->threadid != 0) + { + audinfo("Joining old thread\n"); + pthread_join(priv->threadid, &value); + } + + /* Start our thread for sending data to the device */ + + pthread_attr_init(&tattr); + sparam.sched_priority = sched_get_priority_max(SCHED_FIFO) - 3; + (void)pthread_attr_setschedparam(&tattr, &sparam); + (void)pthread_attr_setstacksize(&tattr, CONFIG_CS43L22_WORKER_STACKSIZE); + + audinfo("Starting worker thread\n"); + ret = pthread_create(&priv->threadid, &tattr, cs43l22_workerthread, + (pthread_addr_t)priv); + if (ret != OK) + { + auderr("ERROR: pthread_create failed: %d\n", ret); + } + else + { + pthread_setname_np(priv->threadid, "cs43l22"); + audinfo("Created worker thread\n"); + } + + return ret; +} + +/**************************************************************************** + * Name: cs43l22_stop + * + * Description: Stop the configured operation (audio streaming, volume + * disabled, etc.). + * + ****************************************************************************/ + +#ifndef CONFIG_AUDIO_EXCLUDE_STOP +# ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_stop(FAR struct audio_lowerhalf_s *dev, FAR void *session) +# else +static int cs43l22_stop(FAR struct audio_lowerhalf_s *dev) +# endif +{ + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)dev; + struct audio_msg_s term_msg; + FAR void *value; + + /* Send a message to stop all audio streaming */ + + term_msg.msgId = AUDIO_MSG_STOP; + term_msg.u.data = 0; + mq_send(priv->mq, (FAR const char *)&term_msg, sizeof(term_msg), + CONFIG_CS43L22_MSG_PRIO); + + /* Join the worker thread */ + + pthread_join(priv->threadid, &value); + priv->threadid = 0; + + /* Enter into a reduced power usage mode */ + /* REVISIT: */ + + return OK; +} +#endif + +/**************************************************************************** + * Name: cs43l22_pause + * + * Description: Pauses the playback. + * + ****************************************************************************/ + +#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME +# ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_pause(FAR struct audio_lowerhalf_s *dev, FAR void *session) +# else +static int cs43l22_pause(FAR struct audio_lowerhalf_s *dev) +# endif +{ + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)dev; + + if (priv->running && !priv->paused) + { + /* Disable interrupts to prevent us from suppling any more data */ + + priv->paused = true; + cs43l22_setvolume(priv, priv->volume, true); + CS43L22_DISABLE(priv->lower); + } + + return OK; +} +#endif /* CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME */ + +/**************************************************************************** + * Name: cs43l22_resume + * + * Description: Resumes the playback. + * + ****************************************************************************/ + +#ifndef CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME +# ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_resume(FAR struct audio_lowerhalf_s *dev, FAR void *session) +# else +static int cs43l22_resume(FAR struct audio_lowerhalf_s *dev) +# endif +{ + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)dev; + + if (priv->running && priv->paused) + { + priv->paused = false; + cs43l22_setvolume(priv, priv->volume, false); + + /* Enable interrupts to allow sampling data */ + + cs43l22_sendbuffer(priv); +#ifdef CS43L22_USE_FFLOCK_INT + CS43L22_ENABLE(priv->lower); +#endif + } + + return OK; +} +#endif /* CONFIG_AUDIO_EXCLUDE_PAUSE_RESUME */ + +/**************************************************************************** + * Name: cs43l22_enqueuebuffer + * + * Description: Enqueue an Audio Pipeline Buffer for playback/ processing. + * + ****************************************************************************/ + +static int cs43l22_enqueuebuffer(FAR struct audio_lowerhalf_s *dev, + FAR struct ap_buffer_s *apb) +{ + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)dev; + struct audio_msg_s term_msg; + int ret; + + audinfo("Enqueueing: apb=%p curbyte=%d nbytes=%d flags=%04x\n", + apb, apb->curbyte, apb->nbytes, apb->flags); + + /* Take a reference on the new audio buffer */ + + apb_reference(apb); + + /* Add the new buffer to the tail of pending audio buffers */ + + cs43l22_takesem(&priv->pendsem); + apb->flags |= AUDIO_APB_OUTPUT_ENQUEUED; + dq_addlast(&apb->dq_entry, &priv->pendq); + cs43l22_givesem(&priv->pendsem); + + /* Send a message to the worker thread indicating that a new buffer has been + * enqueued. If mq is NULL, then the playing has not yet started. In that + * case we are just "priming the pump" and we don't need to send any message. + */ + + ret = OK; + if (priv->mq != NULL) + { + term_msg.msgId = AUDIO_MSG_ENQUEUE; + term_msg.u.data = 0; + + ret = mq_send(priv->mq, (FAR const char *)&term_msg, sizeof(term_msg), + CONFIG_CS43L22_MSG_PRIO); + if (ret < 0) + { + int errcode = errno; + DEBUGASSERT(errcode > 0); + + auderr("ERROR: mq_send failed: %d\n", errcode); + UNUSED(errcode); + } + } + + return ret; +} + +/**************************************************************************** + * Name: cs43l22_cancelbuffer + * + * Description: Called when an enqueued buffer is being cancelled. + * + ****************************************************************************/ + +static int cs43l22_cancelbuffer(FAR struct audio_lowerhalf_s *dev, + FAR struct ap_buffer_s *apb) +{ + audinfo("apb=%p\n", apb); + return OK; +} + +/**************************************************************************** + * Name: cs43l22_ioctl + * + * Description: Perform a device ioctl + * + ****************************************************************************/ + +static int cs43l22_ioctl(FAR struct audio_lowerhalf_s *dev, int cmd, + unsigned long arg) +{ +#ifdef CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS + FAR struct ap_buffer_info_s *bufinfo; +#endif + + /* Deal with ioctls passed from the upper-half driver */ + + switch (cmd) + { + /* Check for AUDIOIOC_HWRESET ioctl. This ioctl is passed straight + * through from the upper-half audio driver. + */ + + case AUDIOIOC_HWRESET: + { + /* REVISIT: Should we completely re-initialize the chip? We + * can't just issue a software reset; that would puts all WM8904 + * registers back in their default state. + */ + + audinfo("AUDIOIOC_HWRESET:\n"); + } + break; + + /* Report our preferred buffer size and quantity */ + +#ifdef CONFIG_AUDIO_DRIVER_SPECIFIC_BUFFERS + case AUDIOIOC_GETBUFFERINFO: + { + audinfo("AUDIOIOC_GETBUFFERINFO:\n"); + bufinfo = (FAR struct ap_buffer_info_s *)arg; + bufinfo->buffer_size = CONFIG_CS43L22_BUFFER_SIZE; + bufinfo->nbuffers = CONFIG_CS43L22_NUM_BUFFERS; + } + break; +#endif + + default: + audinfo("Ignored\n"); + break; + } + + return OK; +} + +/**************************************************************************** + * Name: cs43l22_reserve + * + * Description: Reserves a session (the only one we have). + * + ****************************************************************************/ + +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int +cs43l22_reserve(FAR struct audio_lowerhalf_s *dev, FAR void **session) +#else +static int cs43l22_reserve(FAR struct audio_lowerhalf_s *dev) +#endif +{ + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)dev; + int ret = OK; + + /* Borrow the APBQ semaphore for thread sync */ + + cs43l22_takesem(&priv->pendsem); + if (priv->reserved) + { + ret = -EBUSY; + } + else + { + /* Initialize the session context */ + +#ifdef CONFIG_AUDIO_MULTI_SESSION + *session = NULL; +#endif + priv->inflight = 0; + priv->running = false; + priv->paused = false; +#ifndef CONFIG_AUDIO_EXCLUDE_STOP + priv->terminating = false; +#endif + priv->reserved = true; + } + + cs43l22_givesem(&priv->pendsem); + + return ret; +} + +/**************************************************************************** + * Name: cs43l22_release + * + * Description: Releases the session (the only one we have). + * + ****************************************************************************/ + +#ifdef CONFIG_AUDIO_MULTI_SESSION +static int cs43l22_release(FAR struct audio_lowerhalf_s *dev, FAR void *session) +#else +static int cs43l22_release(FAR struct audio_lowerhalf_s *dev) +#endif +{ + FAR struct cs43l22_dev_s *priv = (FAR struct cs43l22_dev_s *)dev; + void *value; + + /* Join any old worker thread we had created to prevent a memory leak */ + + if (priv->threadid != 0) + { + pthread_join(priv->threadid, &value); + priv->threadid = 0; + } + + /* Borrow the APBQ semaphore for thread sync */ + + cs43l22_takesem(&priv->pendsem); + + /* Really we should free any queued buffers here */ + + priv->reserved = false; + cs43l22_givesem(&priv->pendsem); + + return OK; +} + +/**************************************************************************** + * Name: cs43l22_interrupt_work + * + * Description: + * CS43L22 interrupt actions cannot be performed in the interrupt handler + * because I2C access is not possible in that context. Instead, all I2C + * operations are deferred to the work queue. + * + * Assumptions: + * CS43L22 interrupts were disabled in the interrupt handler. + * + ****************************************************************************/ + +#ifdef CS43L22_USE_FFLOCK_INT +static void cs43l22_interrupt_work(FAR void *arg) +{ + /* TODO */ +#warning Missing logic +} +#endif + +/**************************************************************************** + * Name: cs43l22_interrupt + * + * Description: + * This is the ISR that services the GPIO1/IRQ pin from the CS43L22. It + * signals CS43L22 events such FLL lock. + * + ****************************************************************************/ + +#ifdef CS43L22_USE_FFLOCK_INT +static int +cs43l22_interrupt(FAR const struct cs43l22_lower_s *lower, FAR void *arg) +{ + /* TODO */ +#warning Missing logic +} +#endif + +/**************************************************************************** + * Name: cs43l22_workerthread + * + * This is the thread that feeds data to the chip and keeps the audio + * stream going. + * + ****************************************************************************/ + +static void *cs43l22_workerthread(pthread_addr_t pvarg) +{ + FAR struct cs43l22_dev_s *priv = (struct cs43l22_dev_s *)pvarg; + struct audio_msg_s msg; + FAR struct ap_buffer_s *apb; + int msglen; + int prio; + + audinfo("Entry\n"); + +#ifndef CONFIG_AUDIO_EXCLUDE_STOP + priv->terminating = false; +#endif + +/* Mark ourself as running and make sure that CS43L22 interrupts are + * enabled. + */ + + priv->running = true; +#ifdef CS43L22_USE_FFLOCK_INT + CS43L22_ENABLE(priv->lower); +#endif + cs43l22_setvolume(priv, priv->volume, false); + + /* Loop as long as we are supposed to be running and as long as we have + * buffers in-flight. + */ + + while (priv->running || priv->inflight > 0) + { + /* Check if we have been asked to terminate. We have to check if we + * still have buffers in-flight. If we do, then we can't stop until + * birds come back to roost. + */ + + if (priv->terminating && priv->inflight <= 0) + { + /* We are IDLE. Break out of the loop and exit. */ + + break; + } + else + { + /* Check if we can send more audio buffers to the CS43L22 */ + + cs43l22_sendbuffer(priv); + } + + /* Wait for messages from our message queue */ + + msglen = mq_receive(priv->mq, (FAR char *)&msg, sizeof(msg), &prio); + + /* Handle the case when we return with no message */ + + if (msglen < sizeof(struct audio_msg_s)) + { + auderr("ERROR: Message too small: %d\n", msglen); + continue; + } + + /* Process the message */ + + switch (msg.msgId) + { + /* The ISR has requested more data. We will catch this case at + * the top of the loop. + */ + + case AUDIO_MSG_DATA_REQUEST: + audinfo("AUDIO_MSG_DATA_REQUEST\n"); + break; + + /* Stop the playback */ + +#ifndef CONFIG_AUDIO_EXCLUDE_STOP + case AUDIO_MSG_STOP: + /* Indicate that we are terminating */ + + audinfo("AUDIO_MSG_STOP: Terminating\n"); + priv->terminating = true; + break; +#endif + + /* We have a new buffer to send. We will catch this case at + * the top of the loop. + */ + + case AUDIO_MSG_ENQUEUE: + audinfo("AUDIO_MSG_ENQUEUE\n"); + break; + + /* We will wake up from the I2S callback with this message */ + + case AUDIO_MSG_COMPLETE: + audinfo("AUDIO_MSG_COMPLETE\n"); + cs43l22_returnbuffers(priv); + break; + + default: + auderr("ERROR: Ignoring message ID %d\n", msg.msgId); + break; + } + } + + /* Reset the CS43L22 hardware */ + + cs43l22_reset(priv); + + /* Return any pending buffers in our pending queue */ + + cs43l22_takesem(&priv->pendsem); + while ((apb = (FAR struct ap_buffer_s *)dq_remfirst(&priv->pendq)) != NULL) + { + /* Release our reference to the buffer */ + + apb_free(apb); + + /* Send the buffer back up to the previous level. */ + +#ifdef CONFIG_AUDIO_MULTI_SESSION + priv->dev.upper(priv->dev.priv, AUDIO_CALLBACK_DEQUEUE, apb, OK, NULL); +#else + priv->dev.upper(priv->dev.priv, AUDIO_CALLBACK_DEQUEUE, apb, OK); +#endif + } + + cs43l22_givesem(&priv->pendsem); + + /* Return any pending buffers in our done queue */ + + cs43l22_returnbuffers(priv); + + /* Close the message queue */ + + mq_close(priv->mq); + mq_unlink(priv->mqname); + priv->mq = NULL; + + /* Send an AUDIO_MSG_COMPLETE message to the client */ + +#ifdef CONFIG_AUDIO_MULTI_SESSION + priv->dev.upper(priv->dev.priv, AUDIO_CALLBACK_COMPLETE, NULL, OK, NULL); +#else + priv->dev.upper(priv->dev.priv, AUDIO_CALLBACK_COMPLETE, NULL, OK); +#endif + + audinfo("Exit\n"); + return NULL; +} + +/**************************************************************************** + * Name: cs43l22_audio_output + * + * Description: + * Initialize and configure the CS43L22 device as an audio output device. + * + * Input Parameters: + * priv - A reference to the driver state structure + * + * Returned Value: + * None. No failures are detected. + * + ****************************************************************************/ + +static void cs43l22_audio_output(FAR struct cs43l22_dev_s *priv) +{ + uint8_t regval; + + /* Keep codec powered off */ + + regval = CS43L22_POWER_DOWN; + cs43l22_writereg(priv, CS43L22_POWER_CTRL1, regval); + + /* SPK always off and HP always on */ + + regval = CS43L22_PDN_HPB_ON | CS43L22_PDN_HPA_ON | CS43L22_PDN_SPKB_OFF | CS43L22_PDN_SPKA_OFF; + cs43l22_writereg(priv, CS43L22_POWER_CTRL2, regval); + + /* Clock configuration: Auto detection */ + + regval = CS43L22_AUTO_DETECT_ENABLE | CS43L22_CLKDIV2_ENABLE; + cs43l22_writereg(priv, CS43L22_CLOCK_CTRL, regval); + + /* Set slave mode and Philips audio standard */ + + regval = CS43L22_DAC_IF_I2S; + cs43l22_writereg(priv, CS43L22_INTERFACE_CTRL1, regval); + + /* Power on the codec */ + + regval = CS43L22_POWER_UP; + cs43l22_writereg(priv, CS43L22_POWER_CTRL1, regval); + + /* Disable the analog soft ramp */ + + regval = 0x00; + cs43l22_writereg(priv, CS43L22_ANLG_ZC_SR_SEL, regval); + + /* Disable the digital soft ramp */ + + regval = CS43L22_DEEMPHASIS_ENABLE; + cs43l22_writereg(priv, CS43L22_MISCLLNS_CTRL, regval); + + /* Disable the limiter attack level */ + + regval = 0x00; + cs43l22_writereg(priv, CS43L22_LIM_CTRL1, regval); + + /* Adjust bass and treble levels */ + + regval = CS43L22_BASS_GAIN(0x0f); + cs43l22_writereg(priv, CS43L22_TONE_CTRL, regval); + + /* Adjust PCM volume level */ + + regval = 0x0a; + cs43l22_writereg(priv, CS43L22_PCM_VOL_A, regval); + cs43l22_writereg(priv, CS43L22_PCM_VOL_B, regval); + + cs43l22_setdatawidth(priv); + + cs43l22_setvolume(priv, CONFIG_CS43L22_INITVOLUME, false); +} + +/**************************************************************************** + * Name: cs43l22_audio_input + * + * Description: + * Initialize and configure the CS43L22 device as an audio output device + * (Right input only). cs43l22_audio_output() must be called first, this + * function then modifies the configuration to support audio input. + * + * Input Parameters: + * priv - A reference to the driver state structure + * + * Returned Value: + * None. No failures are detected. + * + ****************************************************************************/ + +#if 0 /* Not used */ +static void cs43l22_audio_input(FAR struct cs43l22_dev_s *priv) +{ + /* TODO */ +#warning Missing logic +} +#endif + +/**************************************************************************** + * Name: cs43l22_configure_ints + * + * Description: + * Configure the GPIO/IRQ interrupt + * + * Input Parameters: + * priv - A reference to the driver state structure + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CS43L22_USE_FFLOCK_INT +static void cs43l22_configure_ints(FAR struct cs43l22_dev_s *priv) +{ + /* TODO */ +#warning Missing logic +} +#endif + +/**************************************************************************** + * Name: cs43l22_reset + * + * Description: + * Reset and re-initialize the CS43L22 + * + * Input Parameters: + * priv - A reference to the driver state structure + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void cs43l22_reset(FAR struct cs43l22_dev_s *priv) +{ + /* Put audio output back to its initial configuration */ + + /* Put audio output back to its initial configuration */ + + priv->samprate = CS43L22_DEFAULT_SAMPRATE; + priv->nchannels = CS43L22_DEFAULT_NCHANNELS; + priv->bpsamp = CS43L22_DEFAULT_BPSAMP; +#if !defined(CONFIG_AUDIO_EXCLUDE_VOLUME) && !defined(CONFIG_AUDIO_EXCLUDE_BALANCE) + priv->balance = 500; // b16HALF; /* Center balance */ +#endif + + /* Software reset. This puts all CS43L22 registers back in their + * default state. + */ + + /* cs43l22_writereg(priv, CS43L22_SWRST, 0); */ + + /* Configure the CS43L22 hardware as an audio input device */ + + cs43l22_audio_output(priv); + + /* Configure interrupts */ + + /* cs43l22_configure_ints(priv); */ + + /* Configure the FLL and the LRCLK */ + + cs43l22_setbitrate(priv); + + /* Dump some information and return the device instance */ + + cs43l22_dump_registers(&priv->dev, "After configuration"); + cs43l22_clock_analysis(&priv->dev, "After configuration"); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: cs43l22_initialize + * + * Description: + * Initialize the CS43L22 device. + * + * Input Parameters: + * i2c - An I2C driver instance + * i2s - An I2S driver instance + * lower - Persistent board configuration data + * + * Returned Value: + * A new lower half audio interface for the CS43L22 device is returned on + * success; NULL is returned on failure. + * + ****************************************************************************/ + +FAR struct audio_lowerhalf_s *cs43l22_initialize(FAR struct i2c_master_s *i2c, + FAR struct i2s_dev_s *i2s, + FAR const struct + cs43l22_lower_s *lower) +{ + FAR struct cs43l22_dev_s *priv; + uint16_t regval; + + /* Sanity check */ + + DEBUGASSERT(i2c && i2s && lower); + + /* Allocate a CS43L22 device structure */ + + priv = (FAR struct cs43l22_dev_s *)kmm_zalloc(sizeof(struct cs43l22_dev_s)); + if (priv) + { + /* Initialize the CS43L22 device structure. Since we used kmm_zalloc, + * only the non-zero elements of the structure need to be initialized. + */ + + priv->dev.ops = &g_audioops; + priv->lower = lower; + priv->i2c = i2c; + priv->i2s = i2s; + + sem_init(&priv->pendsem, 0, 1); + dq_init(&priv->pendq); + dq_init(&priv->doneq); + + /* Initialize I2C */ + + audinfo("address=%02x frequency=%d\n", lower->address, lower->frequency); + + /* Software reset. This puts all CS43L22 registers back in their default + * state. */ + + CS43L22_HW_RESET(priv->lower); + + cs43l22_dump_registers(&priv->dev, "After reset"); + + /* Verify that CS43L22 is present and available on this I2C */ + + regval = cs43l22_readreg(priv, CS43L22_ID_REV); + if ((regval & 0xff) != CS43L22_DEV_ID_REV) + { + auderr("ERROR: CS43L22 not found: ID=%02x\n", regval); + goto errout_with_dev; + } + + /* Reset and reconfigure the CS43L22 hardware */ + + cs43l22_reset(priv); + return &priv->dev; + } + + return NULL; + +errout_with_dev: + sem_destroy(&priv->pendsem); + kmm_free(priv); + return NULL; +} diff --git a/drivers/audio/cs43l22.h b/drivers/audio/cs43l22.h new file mode 100644 index 00000000000..f2ec078e109 --- /dev/null +++ b/drivers/audio/cs43l22.h @@ -0,0 +1,388 @@ +/**************************************************************************** + * drivers/audio/cs43l22.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Reference: + * "CS43L22 Ultra Low Power CODEC for Portable Audio Applications, Pre- + * Production", September 2012, Rev 3.3, Wolfson Microelectronics + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __DRIVERS_AUDIO_CS43L22_H +#define __DRIVERS_AUDIO_CS43L22_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include + +#include +#include + +#define getreg32(a) (*(volatile uint32_t *)(a)) +#define putreg32(v,a) (*(volatile uint32_t *)(a) = (v)) +#define getreg16(a) (*(volatile uint16_t *)(a)) +#define putreg16(v,a) (*(volatile uint16_t *)(a) = (v)) + +#ifdef CONFIG_AUDIO + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ +/* So far, I have not been able to get FLL lock interrupts. Worse, I have + * been able to get the FLL to claim that it is locked at all even when + * polling. What am I doing wrong? + * + * Hmmm.. seems unnecessary anyway + */ + +#undef CS43L22_USE_FFLOCK_INT +#undef CS43L22_USE_FFLOCK_POLL + +/* Registers Addresses ******************************************************/ + +#define CS43L22_ID_REV 0x01 /* Chip I.D. and Revision */ +#define CS43L22_POWER_CTRL1 0x02 /* Power Control 1 */ +#define CS43L22_POWER_CTRL2 0x04 /* Power Control 2 */ +#define CS43L22_CLOCK_CTRL 0x05 /* Clocking Control */ +#define CS43L22_INTERFACE_CTRL1 0x06 /* Interface Control 1 */ +#define CS43L22_INTERFACE_CTRL2 0x07 /* Interface Control 2 */ +#define CS43L22_PASS_SEL_A 0x08 /* Passthrough x Select: PassA */ +#define CS43L22_PASS_SEL_B 0x09 /* Passthrough x Select: PassB */ +#define CS43L22_ANLG_ZC_SR_SEL 0x0A /* Analog ZC and SR Settings */ +#define CS43L22_PASS_GANG_CTRL 0x0C /* Passthrough Gang Control */ +#define CS43L22_PLAYBACK_CTRL1 0x0D /* Playback Control 1 */ +#define CS43L22_MISCLLNS_CTRL 0x0E /* Miscellaneous Controls */ +#define CS43L22_PLAYBACK_CTRL2 0x0F /* Playback Control 2 */ +#define CS43L22_PASS_VOL_A 0x14 /* Passthrough x Volume: PASSAVOL */ +#define CS43L22_PASS_VOL_B 0x15 /* Passthrough x Volume: PASSBVOL */ +#define CS43L22_PCM_VOL_A 0x1A /* PCMx Volume: PCMA */ +#define CS43L22_PCM_VOL_B 0x1B /* PCMx Volume: PCMB */ +#define CS43L22_BP_FREQ_ON_TIME 0x1C /* Beep Frequency & On Time */ +#define CS43L22_BP_VOL_OFF_TIME 0x1D /* Beep Volume & Off Time */ +#define CS43L22_BP_TONE_CFG 0x1E /* Beep & Tone Configuration */ +#define CS43L22_TONE_CTRL 0x1F /* Tone Control */ +#define CS43L22_MS_VOL_CTRL_A 0x20 /* Master Volume Control: MSTA */ +#define CS43L22_MS_VOL_CTRL_B 0x21 /* Master Volume Control: MSTB */ +#define CS43L22_HP_VOL_CTRL_A 0x22 /* Headphone Volume Control: HPA */ +#define CS43L22_HP_VOL_CTRL_B 0x23 /* Headphone Volume Control: HPB */ +#define CS43L22_SPK_VOL_CTRL_A 0x24 /* Speaker Volume Control: SPKA */ +#define CS43L22_SPK_VOL_CTRL_B 0x25 /* Speaker Volume Control: SPKB */ +#define CS43L22_PCM_CH_SWAP 0x26 /* PCM Channel Swap */ +#define CS43L22_LIM_CTRL1 0x27 /* Limiter Control 1, Min/Max Thresholds */ +#define CS43L22_LIM_CTRL2 0x28 /* Limiter Control 2, Release Rate */ +#define CS43L22_LIM_ATTACK_RATE 0x29 /* Limiter Attack Rate */ +#define CS43L22_STATUS 0x2E /* Status */ +#define CS43L22_BAT_COMP 0x2F /* Battery Compensation */ +#define CS43L22_VP_BAT_LEVEL 0x30 /* VP Battery Level */ +#define CS43L22_SPK_STATUS 0x31 /* Speaker Status */ +#define CS43L22_TEMP_MON_CTRL 0x32 /* Temperature Monitor Control */ +#define CS43L22_THERMAL_FOLDBACK 0x33 /* Thermal Foldback */ +#define CS43L22_CHRG_PUMP_FREQ 0x34 /* Charge Pump Frequency */ + +#define CS43L22_HPBMUTE (1 << 7) +#define CS43L22_HPAMUTE (1 << 6) +#define CS43L22_SPKBMUTE (1 << 5) +#define CS43L22_SPKAMUTE (1 << 4) + +/* Register Default Values **************************************************/ +/* Registers have some undocumented bits set on power up. These probably + * should be retained on writes (?). + */ + +#define CS43L22_ID_REV_DEFAULT 0xe3 /* Chip I.D. and Revision */ +#define CS43L22_POWER_CTRL1_DEFAULT 0x01 /* Power Control 1 */ +#define CS43L22_POWER_CTRL2_DEFAULT 0x05 /* Power Control 2 */ +#define CS43L22_CLOCK_CTRL_DEFAULT 0xa0 /* Clocking Control */ +#define CS43L22_INTERFACE_CTRL1_DEFAULT 0x00 /* Interface Control 1 */ +#define CS43L22_INTERFACE_CTRL2_DEFAULT 0x00 /* Interface Control 2 */ +#define CS43L22_PASS_SEL_A_DEFAULT 0x81 /* Passthrough x Select: PassA */ +#define CS43L22_PASS_SEL_B_DEFAULT 0x81 /* Passthrough x Select: PassB */ +#define CS43L22_ANLG_ZC_SR_SEL_DEFAULT 0xa5 /* Analog ZC and SR Settings */ +#define CS43L22_PASS_GANG_CTRL_DEFAULT 0x00 /* Passthrough Gang Control */ +#define CS43L22_PLAYBACK_CTRL1_DEFAULT 0x60 /* Playback Control 1 */ +#define CS43L22_MISCLLNS_CTRL_DEFAULT 0x02 /* Miscellaneous Controls */ +#define CS43L22_PLAYBACK_CTRL2_DEFAULT 0x00 /* Playback Control 2 */ +#define CS43L22_PASS_VOL_A_DEFAULT 0x00 /* Passthrough x Volume: PASSAVOL */ +#define CS43L22_PASS_VOL_B_DEFAULT 0x00 /* Passthrough x Volume: PASSBVOL */ +#define CS43L22_PCM_VOL_A_DEFAULT 0x00 /* PCMx Volume: PCMA */ +#define CS43L22_PCM_VOL_B_DEFAULT 0x00 /* PCMx Volume: PCMB */ +#define CS43L22_BP_FREQ_ON_TIME_DEFAULT 0x00 /* Beep Frequency & On Time */ +#define CS43L22_BP_VOL_OFF_TIME_DEFAULT 0x00 /* Beep Volume & Off Time */ +#define CS43L22_BP_TONE_CFG_DEFAULT 0x00 /* Beep & Tone Configuration */ +#define CS43L22_TONE_CTRL_DEFAULT 0x88 /* Tone Control */ +#define CS43L22_MS_VOL_CTRL_A_DEFAULT 0x00 /* Master Volume Control: MSTA */ +#define CS43L22_MS_VOL_CTRL_B_DEFAULT 0x00 /* Master Volume Control: MSTB */ +#define CS43L22_HP_VOL_CTRL_A_DEFAULT 0x00 /* Headphone Volume Control: HPA */ +#define CS43L22_HP_VOL_CTRL_B_DEFAULT 0x00 /* Headphone Volume Control: HPB */ +#define CS43L22_SPK_VOL_CTRL_A_DEFAULT 0x00 /* Speaker Volume Control: SPKA */ +#define CS43L22_SPK_VOL_CTRL_B_DEFAULT 0x00 /* Speaker Volume Control: SPKB */ +#define CS43L22_PCM_CH_SWAP_DEFAULT 0x00 /* PCM Channel Swap */ +#define CS43L22_LIM_CTRL1_DEFAULT 0x00 /* Limiter Control 1, Min/Max Thresholds */ +#define CS43L22_LIM_CTRL2_DEFAULT 0x7f /* Limiter Control 2, Release Rate */ +#define CS43L22_LIM_ATTACK_RATE_DEFAULT 0xc0 /* Limiter Attack Rate */ +#define CS43L22_STATUS_DEFAULT 0x00 /* Status */ +#define CS43L22_BAT_COMP_DEFAULT 0x00 /* Battery Compensation */ +#define CS43L22_VP_BAT_LEVEL_DEFAULT 0x00 /* VP Battery Level */ +#define CS43L22_SPK_STATUS_DEFAULT 0x00 /* Speaker Status */ +#define CS43L22_TEMP_MON_CTRL_DEFAULT 0x3b /* Temperature Monitor Control */ +#define CS43L22_THERMAL_FOLDBACK_DEFAULT 0x00 /* Thermal Foldback */ +#define CS43L22_CHRG_PUMP_FREQ_DEFAULT 0x5f /* Charge Pump Frequency */ + +/* Register Bit Definitions *************************************************/ + +/* 0x01 Chip I.D. and Revision (Read Only) */ +#define CS43L22_DEV_ID_REV (0xe3) +#define CS43L22_ID_SHIFT (3) +#define CS43L22_ID_MASK (0x1f << CS43L22_ID_SHIFT) +#define CS43L22_REV_SHIFT (0) +#define CS43L22_REV_MASK (0x07 << CS43L22_REV_SHIFT) + +/* 0x02 Power Control 1 */ +#define CS43L22_POWER_DOWN (0x01) /* Powered Down */ +#define CS43L22_POWER_UP (0x9e) /* Powered Up */ + +/* 0x04 Power Control 2 */ +#define CS43L22_PDN_HPB_SHIFT (6) /* Bits 6-7: Headphone channel B Control */ +#define CS43L22_PDN_HPB_ON_HW_PIN_LO (0 << CS43L22_PDN_HPB_SHIFT) /* PDN_HPx[1:0] 00 Headphone channel is ON when the SPK/HP_SW pin, 6, is LO + Headphone channel is OFF when the SPK/HP_SW pin, 6, is HI */ +#define CS43L22_PDN_HPB_ON_HW_PIN_HI (1 << CS43L22_PDN_HPB_SHIFT) /* PDN_HPx[1:0] 01 Headphone channel is ON when the SPK/HP_SW pin, 6, is HI + Headphone channel is OFF when the SPK/HP_SW pin, 6, is LO */ +#define CS43L22_PDN_HPB_ON (2 << CS43L22_PDN_HPB_SHIFT) /* PDN_HPx[1:0] 10 Headphone channel is always ON */ +#define CS43L22_PDN_HPB_OFF (3 << CS43L22_PDN_HPB_SHIFT) /* PDN_HPx[1:0] 11 Headphone channel is always OFF */ + +#define CS43L22_PDN_HPA_SHIFT (4) /* Bits 4-5: Headphone channel A Control */ +#define CS43L22_PDN_HPA_ON_HW_PIN_LO (0 << CS43L22_PDN_HPA_SHIFT) /* PDN_HPx[1:0] 00 Headphone channel is ON when the SPK/HP_SW pin, 6, is LO + Headphone channel is OFF when the SPK/HP_SW pin, 6, is HI */ +#define CS43L22_PDN_HPA_ON_HW_PIN_HI (1 << CS43L22_PDN_HPA_SHIFT) /* PDN_HPx[1:0] 01 Headphone channel is ON when the SPK/HP_SW pin, 6, is HI + Headphone channel is OFF when the SPK/HP_SW pin, 6, is LO */ +#define CS43L22_PDN_HPA_ON (2 << CS43L22_PDN_HPA_SHIFT) /* PDN_HPx[1:0] 10 Headphone channel is always ON */ +#define CS43L22_PDN_HPA_OFF (3 << CS43L22_PDN_HPA_SHIFT) /* PDN_HPx[1:0] 11 Headphone channel is always OFF */ + +#define CS43L22_PDN_SPKB_SHIFT (2) /* Bits 2-3: Speaker channel B Control */ +#define CS43L22_PDN_SPKB_ON_HW_PIN_LO (0 << CS43L22_PDN_SPKB_SHIFT) /* PDN_HPx[1:0] 00 Speaker channel is ON when the SPK/HP_SW pin, 6, is LO + Speaker channel is OFF when the SPK/HP_SW pin, 6, is HI */ +#define CS43L22_PDN_SPKB_ON_HW_PIN_HI (1 << CS43L22_PDN_SPKB_SHIFT) /* PDN_HPx[1:0] 01 Speaker channel is ON when the SPK/HP_SW pin, 6, is HI + Speaker channel is OFF when the SPK/HP_SW pin, 6, is LO */ +#define CS43L22_PDN_SPKB_ON (2 << CS43L22_PDN_SPKB_SHIFT) /* PDN_HPx[1:0] 10 Speaker channel is always ON */ +#define CS43L22_PDN_SPKB_OFF (3 << CS43L22_PDN_SPKB_SHIFT) /* PDN_HPx[1:0] 11 Speaker channel is always OFF */ + +#define CS43L22_PDN_SPKA_SHIFT (0) /* Bits 0-1: Speaker channel A Control */ +#define CS43L22_PDN_SPKA_ON_HW_PIN_LO (0 << CS43L22_PDN_SPKA_SHIFT) /* PDN_HPx[1:0] 00 Speaker channel is ON when the SPK/HP_SW pin, 6, is LO + Speaker channel is OFF when the SPK/HP_SW pin, 6, is HI */ +#define CS43L22_PDN_SPKA_ON_HW_PIN_HI (1 << CS43L22_PDN_SPKA_SHIFT) /* PDN_HPx[1:0] 01 Speaker channel is ON when the SPK/HP_SW pin, 6, is HI + Speaker channel is OFF when the SPK/HP_SW pin, 6, is LO */ +#define CS43L22_PDN_SPKA_ON (2 << CS43L22_PDN_SPKA_SHIFT) /* PDN_HPx[1:0] 10 Speaker channel is always ON */ +#define CS43L22_PDN_SPKA_OFF (3 << CS43L22_PDN_SPKA_SHIFT) /* PDN_HPx[1:0] 11 Speaker channel is always OFF */ + +/* 0x05 Clocking Control */ +#define CS43L22_AUTO_DETECT_ENABLE (1 << 7) /* Auto-detection of speed mode enable */ + +#define CS43L22_SPEED_SHIFT (5) /* Bits 5-6: Speed mode */ +#define CS43L22_SPEED_DOUBLE (0 << CS43L22_SPEED_SHIFT) /* Slave: Double-Speed Mode (DSM - 50 kHz -100 kHz Fs) Master: MCLK=512 SCLK=64*/ +#define CS43L22_SPEED_SINGLE (1 << CS43L22_SPEED_SHIFT) /* Slave: Single-Speed Mode (SSM - 4 kHz -50 kHz Fs) Master: MCLK=256 SCLK=64*/ +#define CS43L22_SPEED_HALF (2 << CS43L22_SPEED_SHIFT) /* Slave: Half-Speed Mode (HSM - 12.5kHz -25 kHz Fs) Master: MCLK=128 SCLK=64*/ +#define CS43L22_SPEED_QUARTER (3 << CS43L22_SPEED_SHIFT) /* Slave: Quarter-Speed Mode (QSM - 4 kHz -12.5 kHz Fs)Master: MCLK=128 SCLK=64*/ + +#define CS43L22_32k_GROUP_ENABLE (1 << 4) /* Bit 4: Specifies whether or not the input/output sample rate is 8 kHz, 16 kHz or 32 kHz */ + +#define CS43L22_VIDEOCLK_ENABLE (1 << 3) /* Bit 3: Specifies whether or not the external MCLK frequency is 27 MHz */ + +#define CS43L22_MCLK_LRCK_RATIO_SHIFT (1) /* Bits 1-2: Internal MCLK/LRCK Ratio */ +#define CS43L22_RATIO_128_64 (0 << CS43L22_MCLK_LRCK_RATIO_SHIFT) /* RATIO[1:0] Internal MCLK Cycles per LRCK=128, SCLK/LRCK=64 Ratio in Master Mode */ +#define CS43L22_RATIO_125_62 (1 << CS43L22_MCLK_LRCK_RATIO_SHIFT) /* RATIO[1:0] Internal MCLK Cycles per LRCK=125, SCLK/LRCK=62 Ratio in Master Mode */ +#define CS43L22_RATIO_132_66 (2 << CS43L22_MCLK_LRCK_RATIO_SHIFT) /* RATIO[1:0] Internal MCLK Cycles per LRCK=132, SCLK/LRCK=66 Ratio in Master Mode */ +#define CS43L22_RATIO_136_68 (3 << CS43L22_MCLK_LRCK_RATIO_SHIFT) /* RATIO[1:0] Internal MCLK Cycles per LRCK=136, SCLK/LRCK=68 Ratio in Master Mode */ + +#define CS43L22_CLKDIV2_ENABLE (1 << 0) /* Bit 0: Divided by 2 */ + +/* 0x06 Interface Control 1 */ +#define CS43L22_MODE_MASTER (1 << 7) /* Configures the serial port I/O clocking */ + +#define CS43L22_SCLK_POLARITY_INVERT (1 << 6) /* Configures the polarity of the SCLK signal */ + +#define CS43L22_DSP_MODE_ENABLE (1 << 4) /* Configures a data-packed interface format for the DAC */ + +#define CS43L22_DAC_IF_FORMAT_SHIFT (2) /* Bits 2-3: Configures the digital interface format for data on SDIN */ +#define CS43L22_DAC_IF_LEFT_JUSTIFIED (0 << CS43L22_DAC_IF_FORMAT_SHIFT) /* DACDIF[1:0] Left Justified, up to 24-bit data */ +#define CS43L22_DAC_IF_I2S (1 << CS43L22_DAC_IF_FORMAT_SHIFT) /* DACDIF[1:0] I2S, up to 24-bit data */ +#define CS43L22_DAC_IF_RIGHT_JUSTIFIED (2 << CS43L22_DAC_IF_FORMAT_SHIFT) /* DACDIF[1:0] Right Justified */ +#define CS43L22_DAC_IF_RESERVED (3 << CS43L22_DAC_IF_FORMAT_SHIFT) /* DACDIF[1:0] Reserved */ + +#define CS43L22_AUDIO_WORD_LENGHT_SHIFT (0) /* Bits 0-1: Configures the audio sample word length used for the data into SDIN */ +#define CS43L22_AWL_DSP_32_RJ_24 (0 << CS43L22_AUDIO_WORD_LENGHT_SHIFT)/* AWL[1:0] DSP Mode: 32-bit data, Right Justified: 24-bit data */ +#define CS43L22_AWL_DSP_24_RJ_20 (1 << CS43L22_AUDIO_WORD_LENGHT_SHIFT)/* AWL[1:0] DSP Mode: 24-bit data, Right Justified: 20-bit data */ +#define CS43L22_AWL_DSP_20_RJ_18 (2 << CS43L22_AUDIO_WORD_LENGHT_SHIFT)/* AWL[1:0] DSP Mode: 20-bit data, Right Justified: 18-bit data */ +#define CS43L22_AWL_DSP_16_RJ_16 (3 << CS43L22_AUDIO_WORD_LENGHT_SHIFT)/* AWL[1:0] DSP Mode: 16 bit data, Right Justified: 16-bit data */ + +/* 0x0E Miscellaneous Controls */ +#define CS43L22_FREEZE (1 << 3) /* Configures a hold on all register settings */ +#define CS43L22_DEEMPHASIS_ENABLE (1 << 2) /* Configures a 15μs/50μs digital de-emphasis filter response on the headphone/line and speaker outputs */ + +/* 0x1F Tone Control */ +#define CS43L22_TREB_GAIN_SHIFT (4) /* Sets the gain of the treble shelving filter */ +#define CS43L22_TREB_GAIN(a) ((a) << CS43L22_TREB_GAIN_SHIFT) + /* TREB[3:0] Gain Setting:*/ + /* 0000 +12.0 dB */ + /* ··· ··· */ + /* 0111 +1.5 dB */ + /* 1000 0 dB */ + /* 1001 -1.5 dB */ + /* 1111 -10.5 dB */ + /* Step Size: 1.5 dB */ + +#define CS43L22_BASS_GAIN_SHIFT (0) /* Sets the gain of the bass shelving filter */ +#define CS43L22_BASS_GAIN(a) ((a) << CS43L22_BASS_GAIN_SHIFT) + /* BASS[3:0] Gain Setting:*/ + /* 0000 +12.0 dB */ + /* ··· ··· */ + /* 0111 +1.5 dB */ + /* 1000 0 dB */ + /* 1001 -1.5 dB */ + /* 1111 -10.5 dB */ + /* Step Size: 1.5 dB */ + +/* FLL Configuration *********************************************************/ +/* Default FLL configuration */ + +#define CS43L22_DEFAULT_SAMPRATE 11025 /* Initial sample rate */ +#define CS43L22_DEFAULT_NCHANNELS 1 /* Initial number of channels */ +#define CS43L22_DEFAULT_BPSAMP 16 /* Initial bits per sample */ + +#define CS43L22_NFLLRATIO 5 /* Number of FLL_RATIO values */ + +#define CS43L22_MINOUTDIV 4 /* Minimum FLL_OUTDIV divider */ +#define CS43L22_MAXOUTDIV 64 /* Maximum FLL_OUTDIV divider */ + +#define CS43L22_BCLK_MAXDIV 20 /* Maximum BCLK divider */ + +#define CS43L22_FRAMELEN8 14 /* Bits per frame for 8-bit data */ +#define CS43L22_FRAMELEN16 32 /* Bits per frame for 16-bit data */ + +/* Commonly defined and redefined macros */ + +#ifndef MIN +# define MIN(a,b) (((a) < (b)) ? (a) : (b)) +#endif + +#ifndef MAX +# define MAX(a,b) (((a) > (b)) ? (a) : (b)) +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct cs43l22_dev_s +{ + /* We are an audio lower half driver (We are also the upper "half" of + * the CS43L22 driver with respect to the board lower half driver). + * + * Terminology: Our "lower" half audio instances will be called dev for the + * publicly visible version and "priv" for the version that only this driver + * knows. From the point of view of this driver, it is the board lower + * "half" that is referred to as "lower". + */ + + struct audio_lowerhalf_s dev; /* CS43L22 audio lower half (this device) */ + + /* Our specific driver data goes here */ + + const FAR struct cs43l22_lower_s *lower; /* Pointer to the board lower functions */ + FAR struct i2c_master_s *i2c; /* I2C driver to use */ + FAR struct i2s_dev_s *i2s; /* I2S driver to use */ + struct dq_queue_s pendq; /* Queue of pending buffers to be sent */ + struct dq_queue_s doneq; /* Queue of sent buffers to be returned */ + mqd_t mq; /* Message queue for receiving messages */ + char mqname[16]; /* Our message queue name */ + pthread_t threadid; /* ID of our thread */ + uint32_t bitrate; /* Actual programmed bit rate */ + sem_t pendsem; /* Protect pendq */ +#ifdef CS43L22_USE_FFLOCK_INT + struct work_s work; /* Interrupt work */ +#endif + uint16_t samprate; /* Configured samprate (samples/sec) */ +#ifndef CONFIG_AUDIO_EXCLUDE_VOLUME +#ifndef CONFIG_AUDIO_EXCLUDE_BALANCE + uint16_t balance; /* Current balance level (b16) */ +#endif /* CONFIG_AUDIO_EXCLUDE_BALANCE */ + uint8_t volume; /* Current volume level {0..63} */ +#endif /* CONFIG_AUDIO_EXCLUDE_VOLUME */ + uint8_t nchannels; /* Number of channels (1 or 2) */ + uint8_t bpsamp; /* Bits per sample (8 or 16) */ + volatile uint8_t inflight; /* Number of audio buffers in-flight */ +#ifdef CS43L22_USE_FFLOCK_INT + volatile bool locked; /* FLL is locked */ +#endif + bool running; /* True: Worker thread is running */ + bool paused; /* True: Playing is paused */ + bool mute; /* True: Output is muted */ +#ifndef CONFIG_AUDIO_EXCLUDE_STOP + bool terminating; /* True: Stop requested */ +#endif + bool reserved; /* True: Device is reserved */ + volatile int result; /* The result of the last transfer */ +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifdef CONFIG_CS43L22_CLKDEBUG +extern const uint8_t g_sysclk_scaleb1[CS43L22_BCLK_MAXDIV+1]; +extern const uint8_t g_fllratio[CS43L22_NFLLRATIO]; +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: cs43l22_readreg + * + * Description + * Read the specified 8-bit register from the CS43L22 device. + * + ****************************************************************************/ + +#if defined(CONFIG_CS43L22_REGDUMP) || defined(CONFIG_CS43L22_CLKDEBUG) +struct cs43l22_dev_s; +uint8_t cs43l22_readreg(FAR struct cs43l22_dev_s *priv, uint8_t regaddr); +#endif + +#endif /* CONFIG_AUDIO */ +#endif /* __DRIVERS_AUDIO_CS43L22_H */ diff --git a/drivers/audio/cs43l22_debug.c b/drivers/audio/cs43l22_debug.c new file mode 100644 index 00000000000..2d39fe988a7 --- /dev/null +++ b/drivers/audio/cs43l22_debug.c @@ -0,0 +1,184 @@ +/**************************************************************************** + * drivers/audio/cs43l22_debug.c + * Audio device driver for Cirrus Logic CS43L22 Audio codec. + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Taras Drozdovsky + * + * References: + * - "CS43L22 Ultra Low Power CODEC for Portable Audio Applications, Pre- + * Production", September 2012, Rev b1, Cirrus Logic + * - The framework for this driver is based on Ken Pettit's VS1053 driver. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "cs43l22.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +#ifdef CONFIG_CS43L22_REGDUMP +struct cs43l22_regdump_s +{ + FAR const char *regname; + uint8_t regaddr; +}; +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_CS43L22_REGDUMP +static const struct cs43l22_regdump_s g_cs43l22_debug[] = +{ + {"CHIP_ID_REV", CS43L22_ID_REV }, + {"POWER_CTRL1", CS43L22_POWER_CTRL1 }, + {"POWER_CTRL2", CS43L22_POWER_CTRL2 }, + {"CLOCK_CTRL", CS43L22_CLOCK_CTRL }, + {"INTERFACE_CTRL1", CS43L22_INTERFACE_CTRL1 }, + {"INTERFACE_CTRL2", CS43L22_INTERFACE_CTRL2 }, + {"PASS_SEL_A", CS43L22_PASS_SEL_A }, + {"PASS_SEL_B", CS43L22_PASS_SEL_B }, + {"ANLG_ZC_SR_SEL", CS43L22_ANLG_ZC_SR_SEL }, + {"PASS_GANG_CTRL", CS43L22_PASS_GANG_CTRL }, + {"PLAYBACK_CTRL1", CS43L22_PLAYBACK_CTRL1 }, + {"MISCLLNS_CTRL", CS43L22_MISCLLNS_CTRL }, + {"PLAYBACK_CTRL2", CS43L22_PLAYBACK_CTRL2 }, + {"PASS_VOL_A", CS43L22_PASS_VOL_A }, + {"PASS_VOL_B", CS43L22_PASS_VOL_B }, + {"PCM_VOL_A", CS43L22_PCM_VOL_A }, + {"PCM_VOL_B", CS43L22_PCM_VOL_B }, + {"BP_FREQ_ON_T", CS43L22_BP_FREQ_ON_TIME }, + {"BP_VOL_OFF_T", CS43L22_BP_VOL_OFF_TIME }, + {"BP_TONE_CFG", CS43L22_BP_TONE_CFG }, + {"TONE_CTRL", CS43L22_TONE_CTRL }, + {"MS_VOL_CTRL_A", CS43L22_MS_VOL_CTRL_A }, + {"MS_VOL_CTRL_B", CS43L22_MS_VOL_CTRL_B }, + {"HP_VOL_CTRL_A", CS43L22_HP_VOL_CTRL_A }, + {"HP_VOL_CTRL_B", CS43L22_HP_VOL_CTRL_B }, + {"SPK_VOL_CTRL_A", CS43L22_SPK_VOL_CTRL_A }, + {"SPK_VOL_CTRL_B", CS43L22_SPK_VOL_CTRL_B }, + {"PCM_CH_SWAP", CS43L22_PCM_CH_SWAP }, + {"LIM_CTRL1", CS43L22_LIM_CTRL1 }, + {"LIM_CTRL2", CS43L22_LIM_CTRL2 }, + {"LIM_ATTACK_RATE", CS43L22_LIM_ATTACK_RATE }, + {"STATUS", CS43L22_STATUS }, + {"BAT_COMP", CS43L22_BAT_COMP }, + {"VP_BAT_LEVEL", CS43L22_VP_BAT_LEVEL }, + {"SPK_STATUS", CS43L22_SPK_STATUS }, + {"TEMP_MON_CTRL", CS43L22_TEMP_MON_CTRL }, + {"THERMAL_FOLDBACK",CS43L22_THERMAL_FOLDBACK}, + {"CHRG_PUMP_FREQ", CS43L22_CHRG_PUMP_FREQ } +}; + +# define CS43L22_NREGISTERS (sizeof(g_cs43l22_debug)/sizeof(struct cs43l22_regdump_s)) +#endif /* CONFIG_CS43L22_REGDUMP */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: cs43l22_dump_registers + * + * Description: + * Dump the contents of all CS43L22 registers to the syslog device + * + * Input Parameters: + * dev - The device instance returned by cs43l22_initialize + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_CS43L22_REGDUMP +void cs43l22_dump_registers(FAR struct audio_lowerhalf_s *dev, + FAR const char *msg) +{ + int i; + + syslog(LOG_INFO, "CS43L22 Registers: %s\n", msg); + for (i = 0; i < CS43L22_NREGISTERS; i++) + { + syslog(LOG_INFO, "%16s[%02x]: %02x\n", + g_cs43l22_debug[i].regname, g_cs43l22_debug[i].regaddr, + cs43l22_readreg((FAR struct cs43l22_dev_s *)dev, + g_cs43l22_debug[i].regaddr)); + } +} +#endif /* CONFIG_CS43L22_REGDUMP */ + +/**************************************************************************** + * Name: cs43l22_clock_analysis + * + * Description: + * Analyze the settings in the clock chain and dump to syslog. + * + * Input Parameters: + * dev - The device instance returned by cs43l22_initialize + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_CS43L22_CLKDEBUG +void cs43l22_clock_analysis(FAR struct audio_lowerhalf_s *dev, + FAR const char *msg) +{ + #warning Missing logic + /* TODO */ +} +#endif /* CONFIG_CS43L22_CLKDEBUG */ diff --git a/drivers/bch/bchdev_driver.c b/drivers/bch/bchdev_driver.c index e74ef3f7f7b..9a7f8dcbd22 100644 --- a/drivers/bch/bchdev_driver.c +++ b/drivers/bch/bchdev_driver.c @@ -113,6 +113,7 @@ static int bch_open(FAR struct file *filep) { FAR struct inode *inode = filep->f_inode; FAR struct bchlib_s *bch; + int ret = OK; DEBUGASSERT(inode && inode->i_private); bch = (FAR struct bchlib_s *)inode->i_private; @@ -122,7 +123,7 @@ static int bch_open(FAR struct file *filep) bchlib_semtake(bch); if (bch->refs == MAX_OPENCNT) { - return -EMFILE; + ret = -EMFILE; } else { @@ -130,7 +131,7 @@ static int bch_open(FAR struct file *filep) } bchlib_semgive(bch); - return OK; + return ret; } /**************************************************************************** @@ -339,12 +340,13 @@ static int bch_ioctl(FAR struct file *filep, int cmd, unsigned long arg) bchlib_semtake(bch); if (!bchr || bch->refs == MAX_OPENCNT) { - ret = -EINVAL; + ret = -EINVAL; } else { bch->refs++; *bchr = bch; + ret = OK; } bchlib_semgive(bch); diff --git a/drivers/input/ajoystick.c b/drivers/input/ajoystick.c index 2868e1542ad..76c93e43c74 100644 --- a/drivers/input/ajoystick.c +++ b/drivers/input/ajoystick.c @@ -201,7 +201,7 @@ static inline int ajoy_takesem(sem_t *sem) #if !defined(CONFIG_DISABLE_POLL) || !defined(CONFIG_DISABLE_SIGNALS) static void ajoy_enable(FAR struct ajoy_upperhalf_s *priv) { - FAR const struct ajoy_lowerhalf_s *lower = priv->au_lower; + FAR const struct ajoy_lowerhalf_s *lower; FAR struct ajoy_open_s *opriv; ajoy_buttonset_t press; ajoy_buttonset_t release; @@ -210,8 +210,9 @@ static void ajoy_enable(FAR struct ajoy_upperhalf_s *priv) int i; #endif - DEBUGASSERT(priv && priv->au_lower); + DEBUGASSERT(priv); lower = priv->au_lower; + DEBUGASSERT(lower); /* This routine is called both task level and interrupt level, so * interrupts must be disabled. @@ -295,7 +296,7 @@ static void ajoy_interrupt(FAR const struct ajoy_lowerhalf_s *lower, static void ajoy_sample(FAR struct ajoy_upperhalf_s *priv) { - FAR const struct ajoy_lowerhalf_s *lower = priv->au_lower; + FAR const struct ajoy_lowerhalf_s *lower; FAR struct ajoy_open_s *opriv; ajoy_buttonset_t sample; #if !defined(CONFIG_DISABLE_POLL) || !defined(CONFIG_DISABLE_SIGNALS) @@ -308,8 +309,9 @@ static void ajoy_sample(FAR struct ajoy_upperhalf_s *priv) int i; #endif - DEBUGASSERT(priv && priv->au_lower); + DEBUGASSERT(priv); lower = priv->au_lower; + DEBUGASSERT(lower); /* This routine is called both task level and interrupt level, so * interrupts must be disabled. diff --git a/drivers/input/djoystick.c b/drivers/input/djoystick.c index 62f62fe45af..c0559208fbb 100644 --- a/drivers/input/djoystick.c +++ b/drivers/input/djoystick.c @@ -201,7 +201,7 @@ static inline int djoy_takesem(sem_t *sem) #if !defined(CONFIG_DISABLE_POLL) || !defined(CONFIG_DISABLE_SIGNALS) static void djoy_enable(FAR struct djoy_upperhalf_s *priv) { - FAR const struct djoy_lowerhalf_s *lower = priv->du_lower; + FAR const struct djoy_lowerhalf_s *lower; FAR struct djoy_open_s *opriv; djoy_buttonset_t press; djoy_buttonset_t release; @@ -210,8 +210,9 @@ static void djoy_enable(FAR struct djoy_upperhalf_s *priv) int i; #endif - DEBUGASSERT(priv && priv->du_lower); + DEBUGASSERT(priv); lower = priv->du_lower; + DEBUGASSERT(lower); /* This routine is called both task level and interrupt level, so * interrupts must be disabled. @@ -295,7 +296,7 @@ static void djoy_interrupt(FAR const struct djoy_lowerhalf_s *lower, static void djoy_sample(FAR struct djoy_upperhalf_s *priv) { - FAR const struct djoy_lowerhalf_s *lower = priv->du_lower; + FAR const struct djoy_lowerhalf_s *lower; FAR struct djoy_open_s *opriv; djoy_buttonset_t sample; #if !defined(CONFIG_DISABLE_POLL) || !defined(CONFIG_DISABLE_SIGNALS) @@ -308,8 +309,9 @@ static void djoy_sample(FAR struct djoy_upperhalf_s *priv) int i; #endif - DEBUGASSERT(priv && priv->du_lower); + DEBUGASSERT(priv); lower = priv->du_lower; + DEBUGASSERT(lower); /* This routine is called both task level and interrupt level, so * interrupts must be disabled. diff --git a/drivers/modem/u-blox.c b/drivers/modem/u-blox.c index 95a7fc29d28..014dac102e0 100644 --- a/drivers/modem/u-blox.c +++ b/drivers/modem/u-blox.c @@ -141,13 +141,16 @@ static int ubxmdm_ioctl(FAR struct file* filep, unsigned long arg) { FAR struct inode* inode = filep->f_inode; - FAR struct ubxmdm_upper* upper = inode->i_private; - FAR struct ubxmdm_lower* lower = upper->lower; + FAR struct ubxmdm_upper* upper; + FAR struct ubxmdm_lower* lower; int ret; FAR struct ubxmdm_status* status; m_info("cmd: %d arg: %ld\n", cmd, arg); - DEBUGASSERT(upper && lower); + upper = inode->i_private; + DEBUGASSERT(upper != NULL); + lower = upper->lower; + DEBUGASSERT(lower != NULL); switch (cmd) { @@ -320,8 +323,9 @@ void ubxmdm_unregister(FAR void *handle) FAR struct ubxmdm_lower *lower; upper = (FAR struct ubxmdm_upper*) handle; + DEBUGASSERT(upper != NULL); lower = upper->lower; - DEBUGASSERT(upper && lower); + DEBUGASSERT(lower != NULL); m_info("Unregistering: %s\n", upper->path); diff --git a/drivers/pipes/pipe.c b/drivers/pipes/pipe.c index eb898bfec73..8ffa3a2d7cb 100644 --- a/drivers/pipes/pipe.c +++ b/drivers/pipes/pipe.c @@ -218,7 +218,7 @@ int pipe2(int fd[2], size_t bufsize) /* Create a pathname to the pipe device */ - sprintf(devname, "/dev/pipe%d", pipeno); + snprintf(devname, sizeof(devname), "/dev/pipe%d", pipeno); /* Check if the pipe device has already been created */ diff --git a/drivers/pwm.c b/drivers/pwm.c index 78b60751c04..24c5ae41050 100644 --- a/drivers/pwm.c +++ b/drivers/pwm.c @@ -318,11 +318,13 @@ static ssize_t pwm_write(FAR struct file *filep, FAR const char *buffer, #ifdef CONFIG_PWM_PULSECOUNT static int pwm_start(FAR struct pwm_upperhalf_s *upper, unsigned int oflags) { - FAR struct pwm_lowerhalf_s *lower = upper->dev; + FAR struct pwm_lowerhalf_s *lower; irqstate_t flags; int ret = OK; - DEBUGASSERT(upper != NULL && lower->ops->start != NULL); + DEBUGASSERT(upper != NULL); + lower = upper->dev; + DEBUGASSERT(lower != NULL && lower->ops->start != NULL); /* Verify that the PWM is not already running */ @@ -385,10 +387,12 @@ static int pwm_start(FAR struct pwm_upperhalf_s *upper, unsigned int oflags) #else static int pwm_start(FAR struct pwm_upperhalf_s *upper, unsigned int oflags) { - FAR struct pwm_lowerhalf_s *lower = upper->dev; + FAR struct pwm_lowerhalf_s *lower; int ret = OK; - DEBUGASSERT(upper != NULL && lower->ops->start != NULL); + DEBUGASSERT(upper != NULL); + lower = upper->dev; + DEBUGASSERT(lower != NULL && lower->ops->start != NULL); /* Verify that the PWM is not already running */ diff --git a/drivers/sensors/Kconfig b/drivers/sensors/Kconfig index b5fc76cb419..03911022b57 100644 --- a/drivers/sensors/Kconfig +++ b/drivers/sensors/Kconfig @@ -201,6 +201,7 @@ config MS58XX_I2C_FREQUENCY config MS58XX_VDD int "MEAS MS58XX VDD" default 30 + depends on MS58XX config MPL115A bool "Freescale MPL115A Barometer Sensor support" diff --git a/drivers/sensors/hts221.c b/drivers/sensors/hts221.c index 59c5790ad58..9f3138bddf6 100644 --- a/drivers/sensors/hts221.c +++ b/drivers/sensors/hts221.c @@ -201,10 +201,10 @@ static int hts221_do_transfer(FAR struct hts221_dev_s *priv, break; } - ret = up_i2creset(priv->i2c); + ret = I2C_RESET(priv->i2c); if (ret < 0) { - hts221_dbg("up_i2creset failed: %d\n", ret); + hts221_dbg("I2C_RESET failed: %d\n", ret); return ret; } #endif @@ -892,7 +892,7 @@ static int hts221_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { FAR struct inode *inode = filep->f_inode; FAR struct hts221_dev_s *priv = inode->i_private; - int32_t ret = 0; + int ret = OK; while (sem_wait(&priv->devsem) != 0) { @@ -932,7 +932,7 @@ static int hts221_ioctl(FAR struct file *filep, int cmd, unsigned long arg) break; default: - ret = -EINVAL; + ret = -ENOTTY; break; } diff --git a/drivers/sensors/lis2dh.c b/drivers/sensors/lis2dh.c index b24aa782e36..f7a982f1518 100644 --- a/drivers/sensors/lis2dh.c +++ b/drivers/sensors/lis2dh.c @@ -131,9 +131,11 @@ static int lis2dh_get_reading(FAR struct lis2dh_dev_s *dev, FAR struct lis2dh_vector_s *res, bool force_read); static int lis2dh_powerdown(FAR struct lis2dh_dev_s *dev); static int lis2dh_reboot(FAR struct lis2dh_dev_s *dev); +#ifndef CONFIG_DISABLE_POLL static int lis2dh_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup); static void lis2dh_notify(FAR struct lis2dh_dev_s *priv); +#endif static int lis2dh_int_handler(int irq, FAR void *context, FAR void *arg); static int lis2dh_setup(FAR struct lis2dh_dev_s *dev, @@ -1614,10 +1616,10 @@ static int lis2dh_access(FAR struct lis2dh_dev_s *dev, uint8_t subaddr, { /* Some error. Try to reset I2C bus and keep trying. */ #ifdef CONFIG_I2C_RESET - int ret = up_i2creset(dev->i2c); + int ret = I2C_RESET(dev->i2c); if (ret < 0) { - lis2dh_dbg("up_i2creset failed: %d\n", ret); + lis2dh_dbg("I2C_RESET failed: %d\n", ret); return ret; } #endif diff --git a/drivers/sensors/lps25h.c b/drivers/sensors/lps25h.c index 3ebba982857..bd35f38043a 100644 --- a/drivers/sensors/lps25h.c +++ b/drivers/sensors/lps25h.c @@ -257,10 +257,10 @@ static int lps25h_do_transfer(FAR struct lps25h_dev_s *dev, break; } - ret = up_i2creset(dev->i2c); + ret = I2C_RESET(dev->i2c); if (ret < 0) { - lps25h_dbg("up_i2creset failed: %d\n", ret); + lps25h_dbg("I2C_RESET failed: %d\n", ret); return ret; } #endif @@ -708,7 +708,7 @@ static int lps25h_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { FAR struct inode *inode = filep->f_inode; FAR struct lps25h_dev_s *dev = inode->i_private; - int ret = 0; + int ret = OK; while (sem_wait(&dev->devsem) != 0) { @@ -742,7 +742,7 @@ static int lps25h_ioctl(FAR struct file *filep, int cmd, unsigned long arg) break; default: - ret = -EINVAL; + ret = -ENOTTY; break; } diff --git a/drivers/sensors/qencoder.c b/drivers/sensors/qencoder.c index 7f6edd09788..ead9ec6de75 100644 --- a/drivers/sensors/qencoder.c +++ b/drivers/sensors/qencoder.c @@ -276,12 +276,15 @@ static ssize_t qe_write(FAR struct file *filep, FAR const char *buffer, size_t b static int qe_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { FAR struct inode *inode = filep->f_inode; - FAR struct qe_upperhalf_s *upper = inode->i_private; - FAR struct qe_lowerhalf_s *lower = upper->lower; + FAR struct qe_upperhalf_s *upper; + FAR struct qe_lowerhalf_s *lower; int ret; sninfo("cmd: %d arg: %ld\n", cmd, arg); - DEBUGASSERT(upper && lower); + upper = inode->i_private; + DEBUGASSERT(upper != NULL); + lower = upper->lower; + DEBUGASSERT(lower != NULL); /* Get exclusive access to the device structures */ diff --git a/drivers/syslog/syslog_intbuffer.c b/drivers/syslog/syslog_intbuffer.c index e68ff3fb74b..59aad10954d 100644 --- a/drivers/syslog/syslog_intbuffer.c +++ b/drivers/syslog/syslog_intbuffer.c @@ -120,11 +120,8 @@ static const char g_overrun_msg[SYSLOG_BUFOVERRUN_SIZE] = SYSLOG_BUFOVERRUN_MESS int syslog_remove_intbuffer(void) { irqstate_t flags; - uint32_t inndx; uint32_t outndx; - uint32_t endndx; - int inuse = 0; - int ch; + int ret = EOF; /* Extraction of the character and adjustment of the circular buffer * indices must be performed in a critical section to protect from @@ -133,25 +130,14 @@ int syslog_remove_intbuffer(void) flags = enter_critical_section(); - /* How much space is left in the intbuffer? */ + /* Check if the interrupt buffer? is empty */ - inndx = (uint32_t)g_syslog_intbuffer.si_inndx; outndx = (uint32_t)g_syslog_intbuffer.si_outndx; - if (inndx != outndx) + if (outndx != (uint32_t)g_syslog_intbuffer.si_inndx) { - /* Handle the case where the inndx has wrapped around */ + /* Not empty.. Take the next character from the interrupt buffer */ - endndx = inndx; - if (endndx < outndx) - { - endndx += SYSLOG_INTBUFSIZE; - } - - inuse = (int)(endndx - outndx); - - /* Take the next character from the interrupt buffer */ - - ch = g_syslog_intbuffer.si_buffer[outndx]; + ret = g_syslog_intbuffer.si_buffer[outndx]; /* Increment the OUT index, handling wrap-around */ @@ -167,7 +153,7 @@ int syslog_remove_intbuffer(void) /* Now we can send the extracted character to the SYSLOG device */ - return (inuse > 0) ? ch : EOF; + return ret; } /**************************************************************************** diff --git a/drivers/syslog/syslog_write.c b/drivers/syslog/syslog_write.c index a3100702ca4..02efde09ff4 100644 --- a/drivers/syslog/syslog_write.c +++ b/drivers/syslog/syslog_write.c @@ -40,6 +40,9 @@ #include #include + +#include +#include #include #include "syslog.h" @@ -100,8 +103,21 @@ ssize_t syslog_default_write(FAR const char *buffer, size_t buflen) ssize_t syslog_write(FAR const char *buffer, size_t buflen) { #ifdef CONFIG_SYSLOG_WRITE - return g_syslog_channel->sc_write(buffer, buflen); -#else - return syslog_default_write(buffer, buflen); + if (!up_interrupt_context() && !sched_idletask()) + { +#ifdef CONFIG_SYSLOG_INTBUFFER + /* Flush any characters that may have been added to the interrupt + * buffer. + */ + + (void)syslog_flush_intbuffer(g_syslog_channel, false); #endif + + return g_syslog_channel->sc_write(buffer, buflen); + } + else +#endif + { + return syslog_default_write(buffer, buflen); + } } diff --git a/drivers/timers/timer.c b/drivers/timers/timer.c index 667be5276da..4cfdacaac76 100644 --- a/drivers/timers/timer.c +++ b/drivers/timers/timer.c @@ -254,12 +254,15 @@ static ssize_t timer_write(FAR struct file *filep, FAR const char *buffer, static int timer_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { FAR struct inode *inode = filep->f_inode; - FAR struct timer_upperhalf_s *upper = inode->i_private; - FAR struct timer_lowerhalf_s *lower = upper->lower; + FAR struct timer_upperhalf_s *upper; + FAR struct timer_lowerhalf_s *lower; int ret; tmrinfo("cmd: %d arg: %ld\n", cmd, arg); - DEBUGASSERT(upper && lower); + upper = inode->i_private; + DEBUGASSERT(upper != NULL); + lower = upper->lower; + DEBUGASSERT(lower != NULL); /* Handle built-in ioctl commands */ diff --git a/drivers/timers/watchdog.c b/drivers/timers/watchdog.c index e9320a96121..7ccab15a061 100644 --- a/drivers/timers/watchdog.c +++ b/drivers/timers/watchdog.c @@ -240,12 +240,15 @@ static ssize_t wdog_write(FAR struct file *filep, FAR const char *buffer, size_t static int wdog_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { FAR struct inode *inode = filep->f_inode; - FAR struct watchdog_upperhalf_s *upper = inode->i_private; - FAR struct watchdog_lowerhalf_s *lower = upper->lower; + FAR struct watchdog_upperhalf_s *upper; + FAR struct watchdog_lowerhalf_s *lower; int ret; wdinfo("cmd: %d arg: %ld\n", cmd, arg); - DEBUGASSERT(upper && lower); + upper = inode->i_private; + DEBUGASSERT(upper != NULL); + lower = upper->lower; + DEBUGASSERT(lower != NULL); /* Get exclusive access to the device structures */ @@ -533,8 +536,9 @@ void watchdog_unregister(FAR void *handle) /* Recover the pointer to the upper-half driver state */ upper = (FAR struct watchdog_upperhalf_s *)handle; + DEBUGASSERT(upper != NULL); lower = upper->lower; - DEBUGASSERT(upper && lower); + DEBUGASSERT(lower != NULL); wdinfo("Unregistering: %s\n", upper->path); diff --git a/drivers/usbmisc/fusb301.c b/drivers/usbmisc/fusb301.c index c3627fd909d..f24ae785582 100644 --- a/drivers/usbmisc/fusb301.c +++ b/drivers/usbmisc/fusb301.c @@ -176,10 +176,10 @@ static int fusb301_getreg(FAR struct fusb301_dev_s *priv, uint8_t reg) break; } - ret = up_i2creset(priv->i2c); + ret = I2C_RESET(priv->i2c); if (ret < 0) { - fusb301_err("ERROR: up_i2creset failed: %d\n", ret); + fusb301_err("ERROR: I2C_RESET failed: %d\n", ret); return ret; } #endif @@ -246,10 +246,10 @@ static int fusb301_putreg(FAR struct fusb301_dev_s *priv, uint8_t regaddr, break; } - ret = up_i2creset(priv->i2c); + ret = I2C_RESET(priv->i2c); if (ret < 0) { - fusb301_err("ERROR: up_i2creset failed: %d\n", ret); + fusb301_err("ERROR: I2C_RESET failed: %d\n", ret); return ret; } #endif diff --git a/drivers/wireless/ieee80211/bcmf_driver.c b/drivers/wireless/ieee80211/bcmf_driver.c index 4666d8da9f8..39fdcabd94d 100644 --- a/drivers/wireless/ieee80211/bcmf_driver.c +++ b/drivers/wireless/ieee80211/bcmf_driver.c @@ -50,6 +50,8 @@ #include #include #include +#include +#include #include "bcmf_driver.h" #include "bcmf_cdc.h" @@ -65,6 +67,12 @@ #define DOT11_BSSTYPE_ANY 2 #define BCMF_SCAN_TIMEOUT_TICK (5*CLOCKS_PER_SEC) #define BCMF_AUTH_TIMEOUT_MS 10000 +#define BCMF_SCAN_RESULT_SIZE 1024 + +/* Helper to get iw_event size */ + +#define BCMF_IW_EVENT_SIZE(field) \ + (offsetof(struct iw_event, u)+sizeof(((union iwreq_data*)0)->field)) /**************************************************************************** * Private Types @@ -366,11 +374,13 @@ void bcmf_wl_auth_event_handler(FAR struct bcmf_dev_s *priv, } } +/* bcmf_wl_scan_event_handler must run at high priority else + * race condition may occur on priv->scan_result field + */ void bcmf_wl_scan_event_handler(FAR struct bcmf_dev_s *priv, struct bcmf_event_s *event, unsigned int len) { uint32_t status; - uint32_t reason; uint32_t event_len; struct wl_escan_result *result; struct wl_bss_info *bss; @@ -387,7 +397,6 @@ void bcmf_wl_scan_event_handler(FAR struct bcmf_dev_s *priv, } status = bcmf_getle32(&event->status); - reason = bcmf_getle32(&event->reason); escan_result_len = bcmf_getle32(&event->len); len -= sizeof(struct bcmf_event_s); @@ -416,7 +425,7 @@ void bcmf_wl_scan_event_handler(FAR struct bcmf_dev_s *priv, goto exit_invalid_frame; } - /* wl_escan_result already cointains a wl_bss_info field */ + /* wl_escan_result structure cointains a wl_bss_info field */ len = result->buflen - sizeof(struct wl_escan_result) + sizeof(struct wl_bss_info); @@ -427,6 +436,15 @@ void bcmf_wl_scan_event_handler(FAR struct bcmf_dev_s *priv, while (len > 0 && bss_count < result->bss_count) { + struct iw_event *iwe; + unsigned int result_size; + size_t essid_len; + size_t essid_len_aligned; + uint8_t *ie_buffer; + unsigned int ie_offset; + unsigned int check_offset; + + result_size = BCMF_SCAN_RESULT_SIZE - priv->scan_result_size; bss_info_len = bss->length; if (len < bss_info_len) @@ -435,11 +453,211 @@ void bcmf_wl_scan_event_handler(FAR struct bcmf_dev_s *priv, goto exit_invalid_frame; } + /* Append current bss_info to priv->scan_results + * FIXME protect this against race conditions + */ + + /* Check if current bss AP is not already detected */ + + check_offset = 0; + + while (priv->scan_result_size - check_offset + >= offsetof(struct iw_event, u)) + { + iwe = (struct iw_event*)&priv->scan_result[check_offset]; + + if (iwe->cmd == SIOCGIWAP) + { + if (memcmp(&iwe->u.ap_addr.sa_data, bss->BSSID.ether_addr_octet, + sizeof(bss->BSSID.ether_addr_octet)) == 0) + { + goto process_next_bss; + } + } + + check_offset += iwe->len; + } + wlinfo("Scan result: <%.32s> %02x:%02x:%02x:%02x:%02x:%02x\n", bss->SSID, bss->BSSID.ether_addr_octet[0], bss->BSSID.ether_addr_octet[1], - bss->BSSID.ether_addr_octet[3], bss->BSSID.ether_addr_octet[3], + bss->BSSID.ether_addr_octet[2], bss->BSSID.ether_addr_octet[3], bss->BSSID.ether_addr_octet[4], bss->BSSID.ether_addr_octet[5]); + /* Copy BSSID */ + + if (result_size < BCMF_IW_EVENT_SIZE(ap_addr)) + { + goto scan_result_full; + } + + iwe = (struct iw_event*)&priv->scan_result[priv->scan_result_size]; + iwe->len = BCMF_IW_EVENT_SIZE(ap_addr); + iwe->cmd = SIOCGIWAP; + memcpy(&iwe->u.ap_addr.sa_data, bss->BSSID.ether_addr_octet, + sizeof(bss->BSSID.ether_addr_octet)); + iwe->u.ap_addr.sa_family = ARPHRD_ETHER; + + priv->scan_result_size += BCMF_IW_EVENT_SIZE(ap_addr); + result_size -= BCMF_IW_EVENT_SIZE(ap_addr); + + /* Copy ESSID */ + + essid_len = min(strlen((const char*)bss->SSID), 32); + essid_len_aligned = (essid_len + 3) & -4; + + if (result_size < BCMF_IW_EVENT_SIZE(essid)+essid_len_aligned) + { + goto scan_result_full; + } + + iwe = (struct iw_event*)&priv->scan_result[priv->scan_result_size]; + iwe->len = BCMF_IW_EVENT_SIZE(essid)+essid_len_aligned; + iwe->cmd = SIOCGIWESSID; + iwe->u.essid.flags = 0; + iwe->u.essid.length = essid_len; + + /* Special processing for iw_point, set offset in pointer field */ + + iwe->u.essid.pointer = (FAR void*)sizeof(iwe->u.essid); + memcpy(&iwe->u.essid+1, bss->SSID, essid_len); + + priv->scan_result_size += BCMF_IW_EVENT_SIZE(essid)+essid_len_aligned; + result_size -= BCMF_IW_EVENT_SIZE(essid)+essid_len_aligned; + + /* Copy link quality info */ + + if (result_size < BCMF_IW_EVENT_SIZE(qual)) + { + goto scan_result_full; + } + + iwe = (struct iw_event*)&priv->scan_result[priv->scan_result_size]; + iwe->len = BCMF_IW_EVENT_SIZE(qual); + iwe->cmd = IWEVQUAL; + iwe->u.qual.qual = bss->SNR; + wlinfo("signal %d %d %d\n", bss->RSSI, bss->phy_noise, bss->SNR); + iwe->u.qual.level = bss->RSSI; + iwe->u.qual.noise = bss->phy_noise; + iwe->u.qual.updated = IW_QUAL_DBM | IW_QUAL_ALL_UPDATED; + + priv->scan_result_size += BCMF_IW_EVENT_SIZE(qual); + result_size -= BCMF_IW_EVENT_SIZE(qual); + + /* Copy AP mode */ + + if (result_size < BCMF_IW_EVENT_SIZE(mode)) + { + goto scan_result_full; + } + + iwe = (struct iw_event*)&priv->scan_result[priv->scan_result_size]; + iwe->len = BCMF_IW_EVENT_SIZE(mode); + iwe->cmd = SIOCGIWMODE; + if (bss->capability & DOT11_CAP_ESS) + { + iwe->u.mode = IW_MODE_INFRA; + } + else if (bss->capability & DOT11_CAP_IBSS) + { + iwe->u.mode = IW_MODE_ADHOC; + } + else + { + iwe->u.mode = IW_MODE_AUTO; + } + + priv->scan_result_size += BCMF_IW_EVENT_SIZE(mode); + result_size -= BCMF_IW_EVENT_SIZE(mode); + + /* Copy AP encryption mode */ + + if (result_size < BCMF_IW_EVENT_SIZE(data)) + { + goto scan_result_full; + } + + iwe = (struct iw_event*)&priv->scan_result[priv->scan_result_size]; + iwe->len = BCMF_IW_EVENT_SIZE(data); + iwe->cmd = SIOCGIWENCODE; + iwe->u.data.flags = bss->capability & DOT11_CAP_PRIVACY ? + IW_ENCODE_ENABLED | IW_ENCODE_NOKEY : + IW_ENCODE_DISABLED; + iwe->u.data.length = 0; + iwe->u.essid.pointer = NULL; + + priv->scan_result_size += BCMF_IW_EVENT_SIZE(data); + result_size -= BCMF_IW_EVENT_SIZE(data); + + /* Copy relevant raw IE frame */ + + if (bss->ie_offset >= bss_info_len || + bss->ie_length > bss_info_len-bss->ie_offset) + { + goto process_next_bss; + } + + ie_offset = 0; + ie_buffer = (uint8_t*)bss + bss->ie_offset; + + while (1) + { + size_t ie_frame_size; + + if (bss->ie_length - ie_offset < 2) + { + /* Minimum Information element size is 2 bytes */ + break; + } + + ie_frame_size = ie_buffer[ie_offset+1] + 2; + + if (ie_frame_size > bss->ie_length - ie_offset) + { + /* Entry too big */ + break; + } + + switch (ie_buffer[ie_offset]) + { + case IEEE80211_ELEMID_RSN: + { + size_t ie_frame_size_aligned; + ie_frame_size_aligned = (ie_frame_size + 3) & -4; + wlinfo("found RSN\n"); + if (result_size < BCMF_IW_EVENT_SIZE(data) + ie_frame_size_aligned) + { + break; + } + + iwe = (struct iw_event*)&priv->scan_result[priv->scan_result_size]; + iwe->len = BCMF_IW_EVENT_SIZE(data)+ie_frame_size_aligned; + iwe->cmd = IWEVGENIE; + iwe->u.data.flags = 0; + iwe->u.data.length = ie_frame_size; + iwe->u.data.pointer = (FAR void*)sizeof(iwe->u.data); + memcpy(&iwe->u.data+1, &ie_buffer[ie_offset], ie_frame_size); + + priv->scan_result_size += BCMF_IW_EVENT_SIZE(essid)+ie_frame_size_aligned; + result_size -= BCMF_IW_EVENT_SIZE(essid)+ie_frame_size_aligned; + break; + } + default: + // wlinfo("unhandled IE entry %d %d\n", ie_buffer[ie_offset], + // ie_buffer[ie_offset+1]); + break; + } + + ie_offset += ie_buffer[ie_offset+1] + 2; + } + + goto process_next_bss; + + scan_result_full: + /* Continue instead of break to log dropped AP results */ + + wlerr("No more space in scan_result buffer\n"); + + process_next_bss: /* Process next bss_info */ len -= bss_info_len; @@ -464,7 +682,7 @@ wl_escan_result_processed: /* Scan done */ - wlinfo("escan done event %d %d\n", status, reason); + wlinfo("escan done event %d %d\n", status, bcmf_getle32(&event->reason)); wd_cancel(priv->scan_timeout); @@ -634,12 +852,26 @@ int bcmf_wl_start_scan(FAR struct bcmf_dev_s *priv, struct iwreq *iwr) /* Lock control_mutex semaphore */ if ((ret = sem_wait(&priv->control_mutex)) != OK) + { + goto exit_failed; + } + + /* Allocate buffer to store scan result */ + + if (priv->scan_result == NULL) { - goto exit_failed; + priv->scan_result = kmm_malloc(BCMF_SCAN_RESULT_SIZE); + if (priv->scan_result == NULL) + { + wlerr("Cannot allocate result buffer\n"); + ret = -ENOMEM; + goto exit_sem_post; + } } wlinfo("start scan\n"); + priv->scan_result_size = 0; priv->scan_status = BCMF_SCAN_RUN; out_len = sizeof(scan_params); @@ -660,8 +892,8 @@ int bcmf_wl_start_scan(FAR struct bcmf_dev_s *priv, struct iwreq *iwr) return OK; exit_sem_post: - sem_post(&priv->control_mutex); priv->scan_status = BCMF_SCAN_DISABLED; + sem_post(&priv->control_mutex); exit_failed: wlinfo("Failed\n"); return ret; @@ -669,19 +901,80 @@ exit_failed: int bcmf_wl_get_scan_results(FAR struct bcmf_dev_s *priv, struct iwreq *iwr) { - /* Not implemented yet, set len to zero */ - - iwr->u.data.length = 0; + int ret = OK; if (priv->scan_status == BCMF_SCAN_RUN) { - return -EAGAIN; + ret = -EAGAIN; + goto exit_failed; } - if (priv->scan_status == BCMF_SCAN_DONE) + + if (priv->scan_status != BCMF_SCAN_DONE) { - return OK; + ret = -EINVAL; + goto exit_failed; } - return -EINVAL; + + /* Lock control_mutex semaphore to avoid race condition */ + + if ((ret = sem_wait(&priv->control_mutex)) != OK) + { + ret = -EIO; + goto exit_failed; + } + + if (!priv->scan_result) + { + /* Result have already been requested */ + + ret = OK; + iwr->u.data.length = 0; + goto exit_sem_post; + } + + if (iwr->u.data.pointer == NULL || + iwr->u.data.length < priv->scan_result_size) + { + /* Stat request, return scan_result_size */ + + ret = -E2BIG; + iwr->u.data.pointer = NULL; + iwr->u.data.length = priv->scan_result_size; + goto exit_sem_post; + } + + if (priv->scan_result_size <= 0) + { + ret = OK; + iwr->u.data.length = 0; + goto exit_free_buffer; + } + + /* Copy result to user buffer */ + + if (iwr->u.data.length > priv->scan_result_size) + { + iwr->u.data.length = priv->scan_result_size; + } + + memcpy(iwr->u.data.pointer, priv->scan_result, iwr->u.data.length); + +exit_free_buffer: + /* Free scan result buffer */ + + kmm_free(priv->scan_result); + priv->scan_result = NULL; + priv->scan_result_size = 0; + +exit_sem_post: + sem_post(&priv->control_mutex); + +exit_failed: + if (ret) + { + iwr->u.data.length = 0; + } + return ret; } int bcmf_wl_set_auth_param(FAR struct bcmf_dev_s *priv, struct iwreq *iwr) diff --git a/drivers/wireless/ieee80211/bcmf_driver.h b/drivers/wireless/ieee80211/bcmf_driver.h index 937427a49be..a9d712011f7 100644 --- a/drivers/wireless/ieee80211/bcmf_driver.h +++ b/drivers/wireless/ieee80211/bcmf_driver.h @@ -93,6 +93,8 @@ struct bcmf_dev_s int scan_status; /* Current scan status */ WDOG_ID scan_timeout; /* Scan timeout timer */ + FAR uint8_t *scan_result; /* Temp buffer that holds results */ + unsigned int scan_result_size; /* Current size of temp buffer */ sem_t auth_signal; /* Authentication notification signal */ int auth_status; /* Authentication status */ diff --git a/drivers/wireless/ieee80211/bcmf_ioctl.h b/drivers/wireless/ieee80211/bcmf_ioctl.h index 7c4cc235f21..48d69bf1843 100644 --- a/drivers/wireless/ieee80211/bcmf_ioctl.h +++ b/drivers/wireless/ieee80211/bcmf_ioctl.h @@ -106,6 +106,10 @@ typedef struct wl_bss_info /* variable length Information Elements */ } wl_bss_info_t; +#define DOT11_CAP_ESS 0x0001 +#define DOT11_CAP_IBSS 0x0002 +#define DOT11_CAP_PRIVACY 0x0010 + typedef struct wlc_ssid { uint32_t SSID_len; diff --git a/drivers/wireless/ieee80211/bcmf_netdev.c b/drivers/wireless/ieee80211/bcmf_netdev.c index 02527fe60ce..455b15529bd 100644 --- a/drivers/wireless/ieee80211/bcmf_netdev.c +++ b/drivers/wireless/ieee80211/bcmf_netdev.c @@ -177,7 +177,7 @@ int bcmf_netdev_alloc_tx_frame(FAR struct bcmf_dev_s *priv) priv->cur_tx_frame = bcmf_bdc_allocate_frame(priv, MAX_NET_DEV_MTU, true); if (!priv->cur_tx_frame) { - wlerr("Cannot allocate TX frame\n"); + wlerr("ERROR: Cannot allocate TX frame\n"); return -ENOMEM; } @@ -215,7 +215,7 @@ static int bcmf_transmit(FAR struct bcmf_dev_s *priv, if (ret) { - wlerr("Failed to transmit frame\n"); + wlerr("ERROR: Failed to transmit frame\n"); return -EIO; } @@ -392,7 +392,7 @@ static void bcmf_receive(FAR struct bcmf_dev_s *priv) else #endif { - wlinfo("RX dropped\n"); + wlerr("ERROR: RX dropped\n"); NETDEV_RXDROPPED(&priv->bc_dev); priv->bus->free_frame(priv, frame); } @@ -992,11 +992,11 @@ static int bcmf_ioctl(FAR struct net_driver_s *dev, int cmd, switch (cmd) { case SIOCSIWSCAN: - ret = bcmf_wl_start_scan(priv, (struct ifreq *)arg); + ret = bcmf_wl_start_scan(priv, (struct iwreq *)arg); break; case SIOCGIWSCAN: - ret = bcmf_wl_get_scan_results(priv, (struct ifreq *)arg); + ret = bcmf_wl_get_scan_results(priv, (struct iwreq *)arg); break; case SIOCSIFHWADDR: /* Set device MAC address */ diff --git a/drivers/wireless/ieee80211/bcmf_utils.h b/drivers/wireless/ieee80211/bcmf_utils.h index 32fd4ca5624..ede2098c2b0 100644 --- a/drivers/wireless/ieee80211/bcmf_utils.h +++ b/drivers/wireless/ieee80211/bcmf_utils.h @@ -47,6 +47,14 @@ #define container_of(ptr, type, member) \ (type *)((uint8_t *)(ptr) - offsetof(type, member)) +#ifndef min +#define min(a,b) ((a) < (b) ? (a) : (b)) +#endif + +#ifndef max +#define max(a,b) ((a) > (b) ? (a) : (b)) +#endif + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40.c b/drivers/wireless/ieee802154/mrf24j40.c index fe022d5114e..903b843c9c8 100644 --- a/drivers/wireless/ieee802154/mrf24j40.c +++ b/drivers/wireless/ieee802154/mrf24j40.c @@ -107,13 +107,6 @@ * Private Types ****************************************************************************/ -struct mrf24j40_txdesc_s -{ - struct ieee802154_txdesc_s pub; - - uint8_t busy : 1; /* Is this txdesc being used */ -}; - /* A MRF24J40 device instance */ struct mrf24j40_radio_s @@ -145,11 +138,13 @@ struct mrf24j40_radio_s /* Buffer Allocations */ - struct mrf24j40_txdesc_s csma_desc; + struct ieee802154_txdesc_s *csma_desc; FAR struct iob_s *csma_frame; + bool csma_busy; - struct mrf24j40_txdesc_s gts_desc[MRF24J40_GTS_SLOTS]; + struct ieee802154_txdesc_s *gts_desc[MRF24J40_GTS_SLOTS]; FAR struct iob_s *gts_frame[MRF24J40_GTS_SLOTS]; + bool gts_busy[MRF24J40_GTS_SLOTS]; }; /**************************************************************************** @@ -189,7 +184,6 @@ static int mrf24j40_gts_setup(FAR struct mrf24j40_radio_s *dev, uint8_t gts, static int mrf24j40_setup_fifo(FAR struct mrf24j40_radio_s *dev, FAR struct iob_s *frame, uint32_t fifo_addr); - static int mrf24j40_setchannel(FAR struct mrf24j40_radio_s *dev, uint8_t chan); static int mrf24j40_getchannel(FAR struct mrf24j40_radio_s *dev, @@ -206,10 +200,6 @@ static int mrf24j40_seteaddr(FAR struct mrf24j40_radio_s *dev, FAR const uint8_t *eaddr); static int mrf24j40_geteaddr(FAR struct mrf24j40_radio_s *dev, FAR uint8_t *eaddr); -static int mrf24j40_setpromisc(FAR struct mrf24j40_radio_s *dev, - bool promisc); -static int mrf24j40_getpromisc(FAR struct mrf24j40_radio_s *dev, - FAR bool *promisc); static int mrf24j40_setdevmode(FAR struct mrf24j40_radio_s *dev, uint8_t mode); static int mrf24j40_getdevmode(FAR struct mrf24j40_radio_s *dev, @@ -446,17 +436,17 @@ static void mrf24j40_dopoll_csma(FAR void *arg) /* If this a CSMA transaction and we have room in the CSMA fifo */ - if (!dev->csma_desc.busy) + if (!dev->csma_busy) { /* need to somehow allow for a handle to be passed */ - len = dev->radiocb->poll_csma(dev->radiocb, &dev->csma_desc.pub, + len = dev->radiocb->poll_csma(dev->radiocb, &dev->csma_desc, &dev->csma_frame); if (len > 0) { /* Now the txdesc is in use */ - dev->csma_desc.busy = 1; + dev->csma_busy = 1; /* Setup the transaction on the device in the CSMA FIFO */ @@ -501,15 +491,15 @@ static void mrf24j40_dopoll_gts(FAR void *arg) for (gts = 0; gts < MRF24J40_GTS_SLOTS; gts++) { - if (!dev->gts_desc[gts].busy) + if (!dev->gts_busy[gts]) { - len = dev->radiocb->poll_gts(dev->radiocb, &dev->gts_desc[gts].pub, + len = dev->radiocb->poll_gts(dev->radiocb, &dev->gts_desc[gts], &dev->gts_frame[0]); if (len > 0) { /* Now the txdesc is in use */ - dev->gts_desc[gts].busy = 1; + dev->gts_busy[gts]= 1; /* Setup the transaction on the device in the open GTS FIFO */ @@ -1406,15 +1396,15 @@ static void mrf24j40_irqwork_txnorm(FAR struct mrf24j40_radio_s *dev) */ txstat = mrf24j40_getreg(dev->spi, MRF24J40_TXSTAT); - dev->csma_desc.pub.status = txstat & MRF24J40_TXSTAT_TXNSTAT; + dev->csma_desc->conf->status = txstat & MRF24J40_TXSTAT_TXNSTAT; /* Inform the next layer of the transmission success/failure */ - dev->radiocb->txdone(dev->radiocb, &dev->csma_desc.pub); + dev->radiocb->txdone(dev->radiocb, dev->csma_desc); /* We are now done with the transaction */ - dev->csma_desc.busy = 0; + dev->csma_busy = 0; /* Free the IOB */ @@ -1451,20 +1441,20 @@ static void mrf24j40_irqwork_txgts(FAR struct mrf24j40_radio_s *dev, if (gts == 0) { - dev->csma_desc.pub.status = txstat & MRF24J40_TXSTAT_TXG1STAT; + dev->csma_desc->conf->status = txstat & MRF24J40_TXSTAT_TXG1STAT; } else if (gts == 1) { - dev->csma_desc.pub.status = txstat & MRF24J40_TXSTAT_TXG2STAT; + dev->csma_desc->conf->status = txstat & MRF24J40_TXSTAT_TXG2STAT; } /* Inform the next layer of the transmission success/failure */ - dev->radiocb->txdone(dev->radiocb, &dev->gts_desc[gts].pub); + dev->radiocb->txdone(dev->radiocb, dev->gts_desc[gts]); /* We are now done with the transaction */ - dev->gts_desc[gts].busy = 0; + dev->gts_busy[gts]= 0; /* Free the IOB */ diff --git a/fs/fat/fs_fat32.c b/fs/fat/fs_fat32.c index 78df1f1024d..7c0c6103322 100644 --- a/fs/fat/fs_fat32.c +++ b/fs/fat/fs_fat32.c @@ -547,7 +547,7 @@ static ssize_t fat_read(FAR struct file *filep, FAR char *buffer, ret = fat_currentsector(fs, ff, filep->f_pos); if (ret < 0) { - return ret; + goto errout_with_semaphore; } } @@ -799,7 +799,7 @@ static ssize_t fat_write(FAR struct file *filep, FAR const char *buffer, ret = fat_currentsector(fs, ff, filep->f_pos); if (ret < 0) { - return ret; + goto errout_with_semaphore; } } diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h index 8e02bc35294..6bbdf758b45 100644 --- a/include/nuttx/arch.h +++ b/include/nuttx/arch.h @@ -1940,26 +1940,6 @@ char up_romgetc(FAR const char *ptr); void up_mdelay(unsigned int milliseconds); void up_udelay(useconds_t microseconds); -/**************************************************************************** - * Name: up_cxxinitialize - * - * Description: - * If C++ and C++ static constructors are supported, then this function - * must be provided by board-specific logic in order to perform - * initialization of the static C++ class instances. - * - * This function should then be called in the application-specific - * logic in order to perform the C++ initialization. NOTE that no - * component of the core NuttX RTOS logic is involved; This function - * definition only provides the 'contract' between application - * specific C++ code and platform-specific toolchain support - * - ****************************************************************************/ - -#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE) -void up_cxxinitialize(void); -#endif - /**************************************************************************** * These are standard interfaces that are exported by the OS for use by the * architecture specific logic diff --git a/include/nuttx/audio/cs43l22.h b/include/nuttx/audio/cs43l22.h new file mode 100644 index 00000000000..9065478c2d4 --- /dev/null +++ b/include/nuttx/audio/cs43l22.h @@ -0,0 +1,280 @@ +/**************************************************************************** + * include/nuttx/audio/cs43l22.h + * + * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Reference: + * "CS43L22 Ultra Low Power CODEC for Portable Audio Applications, Pre- + * Production", September 2012, Rev 3.3, Wolfson Microelectronics + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_AUDIO_CS43L22_H +#define __INCLUDE_NUTTX_AUDIO_CS43L22_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#ifdef CONFIG_AUDIO_CS43L22 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************ + * + * CONFIG_AUDIO_CS43L22 - Enables CS43L22 support + * CONFIG_CS43L22_INITVOLUME - The initial volume level in the range {0..1000} + * CONFIG_CS43L22_INFLIGHT - Maximum number of buffers that the CS43L22 driver + * will send to the I2S driver before any have completed. + * CONFIG_CS43L22_MSG_PRIO - Priority of messages sent to the CS43L22 worker + * thread. + * CONFIG_CS43L22_BUFFER_SIZE - Preferred buffer size + * CONFIG_CS43L22_NUM_BUFFERS - Preferred number of buffers + * CONFIG_CS43L22_WORKER_STACKSIZE - Stack size to use when creating the the + * CS43L22 worker thread. + * CONFIG_CS43L22_REGDUMP - Enable logic to dump all CS43L22 registers to + * the SYSLOG device. + */ + +/* Pre-requisites */ + +#ifndef CONFIG_AUDIO +# error CONFIG_AUDIO is required for audio subsystem support +#endif + +#ifndef CONFIG_I2S +# error CONFIG_I2S is required by the CS43L22 driver +#endif + +#ifndef CONFIG_I2C +# error CONFIG_I2C is required by the CS43L22 driver +#endif + +#ifndef CONFIG_SCHED_WORKQUEUE +# error CONFIG_SCHED_WORKQUEUE is required by the CS43L22 driver +#endif + +/* Default configuration values */ + +#ifndef CONFIG_CS43L22_INITVOLUME +# define CONFIG_CS43L22_INITVOLUME 400 +#endif + +#ifndef CONFIG_CS43L22_INFLIGHT +# define CONFIG_CS43L22_INFLIGHT 2 +#endif + +#if CONFIG_CS43L22_INFLIGHT > 255 +# error CONFIG_CS43L22_INFLIGHT must fit in a uint8_t +#endif + +#ifndef CONFIG_CS43L22_MSG_PRIO +# define CONFIG_CS43L22_MSG_PRIO 1 +#endif + +#ifndef CONFIG_CS43L22_BUFFER_SIZE +# define CONFIG_CS43L22_BUFFER_SIZE 8192 +#endif + +#ifndef CONFIG_CS43L22_NUM_BUFFERS +# define CONFIG_CS43L22_NUM_BUFFERS 4 +#endif + +#ifndef CONFIG_CS43L22_WORKER_STACKSIZE +# define CONFIG_CS43L22_WORKER_STACKSIZE 768 +#endif + +/* Helper macros ************************************************************/ + +#define CS43L22_ATTACH(s,isr,arg) ((s)->attach(s,isr,arg)) +#define CS43L22_DETACH(s) ((s)->attach(s,NULL,NULL)) +#define CS43L22_ENABLE(s) ((s)->enable(s,true)) +#define CS43L22_DISABLE(s) ((s)->enable(s,false)) +#define CS43L22_RESTORE(s,e) ((s)->enable(s,e)) +#define CS43L22_HW_RESET(s) ((s)->reset(s)) + +/**************************************************************************** + * Public Types + ****************************************************************************/ +/* This is the type of the CS43L22 interrupt handler. The lower level code + * will intercept the interrupt and provide the upper level with the private + * data that was provided when the interrupt was attached. + */ + +struct cs43l22_lower_s; /* Forward reference. Defined below */ + +typedef CODE int (*cs43l22_handler_t)(FAR const struct cs43l22_lower_s *lower, + FAR void *arg); + +/* A reference to a structure of this type must be passed to the CS43L22 + * driver. This structure provides information about the configuration + * of the CS43L22 and provides some board-specific hooks. + * + * Memory for this structure is provided by the caller. It is not copied + * by the driver and is presumed to persist while the driver is active. + */ + +struct cs43l22_lower_s +{ + /* I2C characterization */ + + uint32_t frequency; /* Initial I2C frequency */ + uint8_t address; /* 7-bit I2C address (only bits 0-6 used) */ + + /* Clocking is provided via MCLK. The CS43L22 driver will need to know + * the frequency of MCLK in order to generate the correct bitrates. + */ + + uint32_t mclk; /* CS43L22 Master clock frequency */ + + /* IRQ/GPIO access callbacks. These operations all hidden behind + * callbacks to isolate the CS43L22 driver from differences in GPIO + * interrupt handling by varying boards and MCUs. If possible, + * interrupts should be configured on both rising and falling edges + * so that contact and loss-of-contact events can be detected. + * + * attach - Attach or detach the CS43L22 interrupt handler to the GPIO + * interrupt + * enable - Enable or disable the GPIO interrupt. Returns the + * previous interrupt state. + * reset - HW reset of the CS43L22 chip + */ + + CODE int (*attach)(FAR const struct cs43l22_lower_s *lower, + cs43l22_handler_t isr, FAR void *arg); + CODE bool (*enable)(FAR const struct cs43l22_lower_s *lower, bool enable); + CODE void (*reset)(FAR const struct cs43l22_lower_s *lower); +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: cs43l22_initialize + * + * Description: + * Initialize the CS43L22 device. + * + * Input Parameters: + * i2c - An I2C driver instance + * i2s - An I2S driver instance + * lower - Persistent board configuration data + * + * Returned Value: + * A new lower half audio interface for the CS43L22 device is returned on + * success; NULL is returned on failure. + * + ****************************************************************************/ + +struct i2c_master_s; /* Forward reference. Defined in include/nuttx/i2c/i2c_master.h */ +struct i2s_dev_s; /* Forward reference. Defined in include/nuttx/audio/i2s.h */ +struct audio_lowerhalf_s; /* Forward reference. Defined in nuttx/audio/audio.h */ + +FAR struct audio_lowerhalf_s * + cs43l22_initialize(FAR struct i2c_master_s *i2c, FAR struct i2s_dev_s *i2s, + FAR const struct cs43l22_lower_s *lower); + +/**************************************************************************** + * Name: cs43l22_dump_registers + * + * Description: + * Dump the contents of all CS43L22 registers to the syslog device + * + * Input Parameters: + * dev - The device instance returned by cs43l22_initialize + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_CS43L22_REGDUMP +void cs43l22_dump_registers(FAR struct audio_lowerhalf_s *dev, + FAR const char *msg); +#else + /* This eliminates the need for any conditional compilation in the + * including file. + */ + +# define cs43l22_dump_registers(d,m) +#endif + +/**************************************************************************** + * Name: cs43l22_clock_analysis + * + * Description: + * Analyze the settings in the clock chain and dump to syslog. + * + * Input Parameters: + * dev - The device instance returned by cs43l22_initialize + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_CS43L22_CLKDEBUG +void cs43l22_clock_analysis(FAR struct audio_lowerhalf_s *dev, + FAR const char *msg); +#else + /* This eliminates the need for any conditional compilation in the + * including file. + */ + +# define cs43l22_clock_analysis(d,m) +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_AUDIO_CS43L22 */ +#endif /* __INCLUDE_NUTTX_AUDIO_CS43L22_H */ diff --git a/include/nuttx/wireless/ieee80211/ieee80211.h b/include/nuttx/wireless/ieee80211/ieee80211.h index b109487d0b5..62ea4491d31 100644 --- a/include/nuttx/wireless/ieee80211/ieee80211.h +++ b/include/nuttx/wireless/ieee80211/ieee80211.h @@ -504,7 +504,7 @@ begin_packed_struct struct ieee80211_qosframe uint8_t i_addr3[IEEE80211_ADDR_LEN]; uint8_t i_seq[2]; uint8_t i_qos[2]; -} end_packet_struct; +} end_packed_struct; begin_packed_struct struct ieee80211_htframe /* 11n */ { @@ -516,7 +516,7 @@ begin_packed_struct struct ieee80211_htframe /* 11n */ uint8_t i_seq[2]; uint8_t i_qos[2]; uint8_t i_ht[4]; -} end_packet_struct; +} end_packed_struct; begin_packed_struct struct ieee80211_frame_addr4 { @@ -527,7 +527,7 @@ begin_packed_struct struct ieee80211_frame_addr4 uint8_t i_addr3[IEEE80211_ADDR_LEN]; uint8_t i_seq[2]; uint8_t i_addr4[IEEE80211_ADDR_LEN]; -} end_packet_struct; +} end_packed_struct; begin_packed_struct struct ieee80211_qosframe_addr4 { @@ -539,7 +539,7 @@ begin_packed_struct struct ieee80211_qosframe_addr4 uint8_t i_seq[2]; uint8_t i_addr4[IEEE80211_ADDR_LEN]; uint8_t i_qos[2]; -} end_packet_struct; +} end_packed_struct; begin_packed_struct struct ieee80211_htframe_addr4 /* 11n */ { @@ -552,7 +552,7 @@ begin_packed_struct struct ieee80211_htframe_addr4 /* 11n */ uint8_t i_addr4[IEEE80211_ADDR_LEN]; uint8_t i_qos[2]; uint8_t i_ht[4]; -} end_packet_struct; +} end_packed_struct; /* Control frames. */ @@ -565,7 +565,7 @@ begin_packed_struct struct ieee80211_frame_min /* FCS */ -} end_packet_struct; +} end_packed_struct; begin_packed_struct struct ieee80211_frame_rts { @@ -576,7 +576,7 @@ begin_packed_struct struct ieee80211_frame_rts /* FCS */ -} end_packet_struct; +} end_packed_struct; struct ieee80211_frame_cts { @@ -586,7 +586,7 @@ struct ieee80211_frame_cts /* FCS */ -} end_packet_struct; +} end_packed_struct; struct ieee80211_frame_ack { @@ -596,7 +596,7 @@ struct ieee80211_frame_ack /* FCS */ -} end_packet_struct; +} end_packed_struct; struct ieee80211_frame_pspoll { @@ -607,7 +607,7 @@ struct ieee80211_frame_pspoll /* FCS */ -} end_packet_struct; +} end_packed_struct; struct ieee80211_frame_cfend { /* NB: also CF-End+CF-Ack */ @@ -618,7 +618,7 @@ struct ieee80211_frame_cfend /* FCS */ -} end_packet_struct; +} end_packed_struct; /* Information elements (see Table 7-26). */ @@ -818,7 +818,7 @@ struct ieee80211_eapol_key uint8_t reserved[8]; uint8_t mic[EAPOL_KEY_MIC_LEN]; uint8_t paylen[2]; -} end_packet_struct; +} end_packed_struct; /* Pairwise Transient Key (see 8.5.1.2) */ @@ -827,7 +827,7 @@ struct ieee80211_ptk uint8_t kck[16]; /* Key Confirmation Key */ uint8_t kek[16]; /* Key Encryption Key */ uint8_t tk[32]; /* Temporal Key */ -} end_packet_struct; +} end_packed_struct; /* Key Data Encapsulation (see Table 62) */ diff --git a/include/nuttx/wireless/ieee802154/ieee802154_ioctl.h b/include/nuttx/wireless/ieee802154/ieee802154_ioctl.h index 5f14f2e2c6e..318289b4db0 100644 --- a/include/nuttx/wireless/ieee802154/ieee802154_ioctl.h +++ b/include/nuttx/wireless/ieee802154/ieee802154_ioctl.h @@ -62,8 +62,9 @@ /* IEEE 802.15.4 MAC Character Driver IOCTL commands ********************************/ -#define MAC802154IOC_MCPS_REGISTER _WLCIOC(IEEE802154_FIRST) -#define MAC802154IOC_MLME_REGISTER _WLCIOC(IEEE802154_FIRST+1) +#define MAC802154IOC_NOTIFY_REGISTER _WLCIOC(IEEE802154_FIRST) +#define MAC802154IOC_GET_EVENT _WLCIOC(IEEE802154_FIRST+1) +#define MAC802154IOC_ENABLE_EVENTS _WLCIOC(IEEE802154_FIRST+2) /************************************************************************************ * Public Types diff --git a/include/nuttx/wireless/ieee802154/ieee802154_mac.h b/include/nuttx/wireless/ieee802154/ieee802154_mac.h index 15963b46e18..5f28cfa0c73 100644 --- a/include/nuttx/wireless/ieee802154/ieee802154_mac.h +++ b/include/nuttx/wireless/ieee802154/ieee802154_mac.h @@ -102,31 +102,12 @@ /* IEEE 802.15.4 MAC Interface **********************************************/ -/* Frame Type */ - -#define IEEE802154_FRAME_BEACON 0x00 -#define IEEE802154_FRAME_DATA 0x01 -#define IEEE802154_FRAME_ACK 0x02 -#define IEEE802154_FRAME_COMMAND 0x03 - -/* MAC commands */ - -#define IEEE802154_CMD_ASSOC_REQ 0x01 -#define IEEE802154_CMD_ASSOC_RESP 0x02 -#define IEEE802154_CMD_DISASSOC_NOT 0x03 -#define IEEE802154_CMD_DATA_REQ 0x04 -#define IEEE802154_CMD_PANID_CONF_NOT 0x05 -#define IEEE802154_CMD_ORPHAN_NOT 0x06 -#define IEEE802154_CMD_BEACON_REQ 0x07 -#define IEEE802154_CMD_COORD_REALIGN 0x08 -#define IEEE802154_CMD_GTS_REQ 0x09 - /* Some addresses */ #define IEEE802154_PAN_UNSPEC (uint16_t)0xFFFF #define IEEE802154_SADDR_UNSPEC (uint16_t)0xFFFF #define IEEE802154_SADDR_BCAST (uint16_t)0xFFFE -#define IEEE802154_EADDR_UNSPEC (uint8_t*)"\xff\xff\xff\xff\xff\xff\xff\xff" +#define IEEE802154_EADDR_UNSPEC (uint8_t[]){0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF} /* Frame control field masks, 2 bytes * Seee IEEE 802.15.4/2011 5.2.1.1 page 57 @@ -150,6 +131,22 @@ #define IEEE802154_FRAMECTRL_SHIFT_VERSION 12 /* Source addressing mode, bits 12-13 */ #define IEEE802154_FRAMECTRL_SHIFT_SADDR 14 /* Source addressing mode, bits 14-15 */ +/* Capability Information Bitfield + * + */ + +#define IEEE802154_CAPABILITY_DEVTYPE 0x02 +#define IEEE802154_CAPABILITY_PWRSRC 0x04 +#define IEEE802154_CAPABILITY_RXONIDLE 0x08 +#define IEEE802154_CAPABILITY_SECURITY 0x40 +#define IEEE802154_CAPABILITY_ALLOCADDR 0x80 + +#define IEEE802154_CAPABILITY_SHIFT_DEVTYPE 1 +#define IEEE802154_CAPABILITY_SHIFT_PWRSRC 2 +#define IEEE802154_CAPABILITY_SHIFT_RXONIDLE 3 +#define IEEE802154_CAPABILITY_SHIFT_SECURITY 6 +#define IEEE802154_CAPABILITY_SHIFT_ALLOCADDR 7 + /* IEEE 802.15.4 PHY constants */ #define IEEE802154_MAX_PHY_PACKET_SIZE 127 @@ -194,7 +191,6 @@ #define MAX_ORPHAN_ADDR 32 /* REVISIT */ -// TODO: Add macros /**************************************************************************** * Public Types @@ -329,6 +325,31 @@ enum ieee802154_pib_attr_e IEEE802154_PIB_MAC_PANCOORD_SHORT_ADDR, }; +/* Frame Type */ + +enum ieee802154_frametype_e +{ + IEEE802154_FRAME_BEACON = 0, + IEEE802154_FRAME_DATA, + IEEE802154_FRAME_ACK, + IEEE802154_FRAME_COMMAND +}; + +/* MAC command IDs */ + +enum ieee802154_cmdid_e +{ + IEEE802154_CMD_ASSOC_REQ = 1, + IEEE802154_CMD_ASSOC_RESP, + IEEE802154_CMD_DISASSOC_NOT, + IEEE802154_CMD_DATA_REQ, + IEEE802154_CMD_PANID_CONF_NOT, + IEEE802154_CMD_ORPHAN_NOT, + IEEE802154_CMD_BEACON_REQ, + IEEE802154_CMD_COORD_REALIGN, + IEEE802154_CMD_GTS_REQ, +}; + enum ieee802154_devmode_e { IEEE802154_DEVMODE_ENDPOINT, @@ -405,13 +426,13 @@ enum ieee802154_ranging_e struct ieee802154_capability_info_s { uint8_t reserved_0 : 1; /* Reserved */ - uint8_t device_type : 1; /* 0=RFD, 1=FFD */ - uint8_t power_source : 1; /* 1=AC, 0=Other */ - uint8_t rx_on_idle : 1; /* 0=Receiver off when idle + uint8_t devtype : 1; /* 0=RFD, 1=FFD */ + uint8_t powersource : 1; /* 1=AC, 0=Other */ + uint8_t rxonidle : 1; /* 0=Receiver off when idle * 1=Receiver on when idle */ uint8_t reserved_45 : 2; /* Reserved */ uint8_t security : 1; /* 0=disabled, 1=enabled */ - uint8_t allocate_addr : 1; /* 1=Coordinator allocates short address + uint8_t allocaddr : 1; /* 1=Coordinator allocates short address * 0=otherwise */ }; @@ -462,31 +483,6 @@ struct ieee802154_pend_addr_s struct ieee802154_addr_s addr[7]; /* Array of at most 7 addresses */ }; -#ifdef CONFIG_IEEE802154_RANGING -#define IEEE802154_TXDESC_FIELDS \ - uint8_t handle; \ - uint32_t timestamp; \ - uint8_t status; -#else -#define IEEE802154_TXDESC_FIELDS \ - uint8_t handle; \ - uint32_t timestamp; \ - uint8_t status; - bool rng_rcvd; \ - uint32_t rng_counter_start; \ - uint32_t rng_counter_stop; \ - uint32_t rng_tracking_interval; \ - uint32_t rng_offset;\ - uint8_t rng_fom; -#endif - -struct ieee802154_txdesc_s -{ - IEEE802154_TXDESC_FIELDS - - /* TODO: Add slotting information for GTS transactions */ -}; - struct ieee802154_cca_s { uint8_t use_ed : 1; /* CCA using ED */ @@ -631,7 +627,44 @@ struct ieee802154_frame_meta_s struct ieee802154_data_conf_s { - IEEE802154_TXDESC_FIELDS + uint8_t handle; /* Handle assoc. with MSDU */ + + /* The time, in symbols, at which the data were transmitted */ + + uint32_t timestamp; + enum ieee802154_status_e status; /* The status of the MSDU transmission */ + +#ifdef CONFIG_IEEE802154_RANGING + bool rng_rcvd; /* Ranging indicated by MSDU */ + + /* A count of the time units corresponding to an RMARKER at the antenna at + * the beginning of the ranging exchange + */ + + uint32_t rng_counter_start; + + /* A count of the time units corresponding to an RMARKER at the antenna at + * end of the ranging exchange + */ + + uint32_t rng_counter_stop; + + /* A count of the time units in a message exchange over which the tracking + * offset was measured + */ + + uint32_t rng_tracking_interval; + + /* A count of the time units slipped or advanced by the radio tracking + * system over the course of the entire tracking interval + */ + + uint32_t rng_offset; + + /* The Figure of Merit (FoM) characterizing the ranging measurement */ + + uint8_t rng_fom; +#endif }; /***************************************************************************** @@ -734,12 +767,12 @@ struct ieee802154_purge_req_s struct ieee802154_assoc_req_s { - uint8_t channel; /* Channel number to attempt association */ - uint8_t channel_page; /* Channel page to attempt association */ + uint8_t chnum; /* Channel number to attempt association */ + uint8_t chpage; /* Channel page to attempt association */ /* Coordinator Address with which to associate */ - struct ieee802154_addr_s coord_addr; + struct ieee802154_addr_s coordaddr; /* Capabilities of associating device */ @@ -1307,8 +1340,42 @@ struct ieee802154_poll_conf_s enum ieee802154_status_e status; }; -union ieee802154_mlme_notify_u +/* MAC Service Notifications */ + +enum ieee802154_notify_e { + /* MCPS Notifications */ + + IEEE802154_NOTIFY_CONF_DATA = 0x00, + + /* MLME Notifications */ + + IEEE802154_NOTIFY_CONF_ASSOC, + IEEE802154_NOTIFY_CONF_DISASSOC, + IEEE802154_NOTIFY_CONF_GTS, + IEEE802154_NOTIFY_CONF_RESET, + IEEE802154_NOTIFY_CONF_RXENABLE, + IEEE802154_NOTIFY_CONF_SCAN, + IEEE802154_NOTIFY_CONF_START, + IEEE802154_NOTIFY_CONF_POLL, + + IEEE802154_NOTIFY_IND_ASSOC, + IEEE802154_NOTIFY_IND_DISASSOC, + IEEE802154_NOTIFY_IND_BEACONNOTIFY, + IEEE802154_NOTIFY_IND_GTS, + IEEE802154_NOTIFY_IND_ORPHAN, + IEEE802154_NOTIFY_IND_COMMSTATUS, + IEEE802154_NOTIFY_IND_SYNCLOSS +}; + +union ieee802154_notif_u +{ + /* MCPS Notifications */ + + struct ieee802154_data_conf_s dataconf; + + /* MLME Notifications */ + struct ieee802154_assoc_conf_s assocconf; struct ieee802154_disassoc_conf_s disassocconf; struct ieee802154_gts_conf_s gtsconf; @@ -1326,10 +1393,18 @@ union ieee802154_mlme_notify_u struct ieee802154_syncloss_ind_s synclossind; }; -union ieee802154_mcps_notify_u +struct ieee802154_notif_s { - struct ieee802154_data_conf_s dataconf; - struct ieee802154_data_ind_s *dataind; + /* Must be first member so that we can interchange between the actual + *notification and this extended struct. + */ + + union ieee802154_notif_u u; + enum ieee802154_notify_e notiftype; + + /* Support a singly linked list */ + + FAR struct ieee802154_notif_s *flink; }; /* A pointer to this structure is passed as the argument of each IOCTL @@ -1376,51 +1451,6 @@ struct ieee802154_netmac_s typedef FAR void *MACHANDLE; -/* MAC Service Notifications */ - -enum ieee802154_macnotify_e -{ - /* MCPS Notifications */ - - IEEE802154_NOTIFY_CONF_DATA = 0x00, - IEEE802154_NOTIFY_IND_DATA, - - /* MLME Notifications */ - - IEEE802154_NOTIFY_CONF_ASSOC, - IEEE802154_NOTIFY_CONF_DISASSOC, - IEEE802154_NOTIFY_CONF_GTS, - IEEE802154_NOTIFY_CONF_RESET, - IEEE802154_NOTIFY_CONF_RXENABLE, - IEEE802154_NOTIFY_CONF_SCAN, - IEEE802154_NOTIFY_CONF_START, - IEEE802154_NOTIFY_CONF_POLL, - - IEEE802154_NOTIFY_IND_ASSOC, - IEEE802154_NOTIFY_IND_DISASSOC, - IEEE802154_NOTIFY_IND_BEACONNOTIFY, - IEEE802154_NOTIFY_IND_GTS, - IEEE802154_NOTIFY_IND_ORPHAN, - IEEE802154_NOTIFY_IND_COMMSTATUS, - IEEE802154_NOTIFY_IND_SYNCLOSS -}; - -/* Callback operations to notify the next highest layer of various asynchronous - * events, usually triggered by some previous request or response invoked by the - * upper layer. - */ - -struct ieee802154_maccb_s -{ - CODE void (*mlme_notify)(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mlme_notify_u *arg); - - CODE void (*mcps_notify)(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mcps_notify_u *arg); -}; - #ifdef __cplusplus #define EXTERN extern "C" extern "C" diff --git a/include/nuttx/wireless/ieee802154/ieee802154_radio.h b/include/nuttx/wireless/ieee802154/ieee802154_radio.h index d3fcb5db740..e0ff8b664fe 100644 --- a/include/nuttx/wireless/ieee802154/ieee802154_radio.h +++ b/include/nuttx/wireless/ieee802154/ieee802154_radio.h @@ -58,15 +58,35 @@ * Public Types ****************************************************************************/ +/* Data only used between radio and MAC layer */ + +struct ieee802154_txdesc_s +{ + /* Support a singly linked list of tx descriptors */ + + FAR struct ieee802154_txdesc_s *flink; + + /* Pointer to the data confirmation structure to be populated upon + * success/failure of the transmission. + */ + + FAR struct ieee802154_data_conf_s *conf; + + enum ieee802154_frametype_e frametype; /* Frame type. Used by MAC layer to + * control how tx done is handled */ + + /* TODO: Add slotting information for GTS transactions */ +}; + /* IEEE802.15.4 Radio Interface Operations **********************************/ struct ieee802154_radiocb_s { CODE int (*poll_csma) (FAR const struct ieee802154_radiocb_s *radiocb, - FAR struct ieee802154_txdesc_s *tx_desc, + FAR struct ieee802154_txdesc_s **tx_desc, FAR struct iob_s **frame); CODE int (*poll_gts) (FAR const struct ieee802154_radiocb_s *radiocb, - FAR struct ieee802154_txdesc_s *tx_desc, + FAR struct ieee802154_txdesc_s **tx_desc, FAR struct iob_s **frame); CODE void (*txdone) (FAR const struct ieee802154_radiocb_s *radiocb, FAR const struct ieee802154_txdesc_s *tx_desc); diff --git a/include/nuttx/wireless/wireless.h b/include/nuttx/wireless/wireless.h index 5455e14d4f4..144e346fcad 100644 --- a/include/nuttx/wireless/wireless.h +++ b/include/nuttx/wireless/wireless.h @@ -160,6 +160,47 @@ #define WL_NNETCMDS 0x0032 /* Number of network commands */ #define WL_USERFIRST (WL_NETFIRST + WL_NNETCMDS) +/* ----------------------- WIRELESS EVENTS ----------------------- */ +/* Those are *NOT* ioctls, do not issue request on them !!! */ +/* Most events use the same identifier as ioctl requests */ + +#define IWEVTXDROP 0x8C00 /* Packet dropped to excessive retry */ +#define IWEVQUAL 0x8C01 /* Quality part of statistics (scan) */ +#define IWEVCUSTOM 0x8C02 /* Driver specific ascii string */ +#define IWEVREGISTERED 0x8C03 /* Discovered a new node (AP mode) */ +#define IWEVEXPIRED 0x8C04 /* Expired a node (AP mode) */ +#define IWEVGENIE 0x8C05 /* Generic IE (WPA, RSN, WMM, ..) + * (scan results); This includes id and + * length fields. One IWEVGENIE may + * contain more than one IE. Scan + * results may contain one or more + * IWEVGENIE events. */ +#define IWEVMICHAELMICFAILURE 0x8C06 /* Michael MIC failure + * (struct iw_michaelmicfailure) + */ +#define IWEVASSOCREQIE 0x8C07 /* IEs used in (Re)Association Request. + * The data includes id and length + * fields and may contain more than one + * IE. This event is required in + * Managed mode if the driver + * generates its own WPA/RSN IE. This + * should be sent just before + * IWEVREGISTERED event for the + * association. */ +#define IWEVASSOCRESPIE 0x8C08 /* IEs used in (Re)Association + * Response. The data includes id and + * length fields and may contain more + * than one IE. This may be sent + * between IWEVASSOCREQIE and + * IWEVREGISTERED events for the + * association. */ +#define IWEVPMKIDCAND 0x8C09 /* PMKID candidate for RSN + * pre-authentication + * (struct iw_pmkid_cand) */ + +#define IWEVFIRST 0x8C00 +#define IW_EVENT_IDX(cmd) ((cmd) - IWEVFIRST) + /* Other Common Wireless Definitions ***********************************************/ /* Maximum size of the ESSID and NICKN strings */ @@ -178,6 +219,31 @@ #define IW_MODE_MESH 7 /* Mesh (IEEE 802.11s) network */ #define IW_MODE_NFLAGS 8 +/* Statistics flags (bitmask in updated) */ + +#define IW_QUAL_QUAL_UPDATED 0x01 /* Value was updated since last read */ +#define IW_QUAL_LEVEL_UPDATED 0x02 +#define IW_QUAL_NOISE_UPDATED 0x04 +#define IW_QUAL_ALL_UPDATED 0x07 +#define IW_QUAL_DBM 0x08 /* Level + Noise are dBm */ +#define IW_QUAL_QUAL_INVALID 0x10 /* Driver doesn't provide value */ +#define IW_QUAL_LEVEL_INVALID 0x20 +#define IW_QUAL_NOISE_INVALID 0x40 +#define IW_QUAL_RCPI 0x80 /* Level + Noise are 802.11k RCPI */ +#define IW_QUAL_ALL_INVALID 0x70 + +/* Flags for encoding (along with the token) */ + +#define IW_ENCODE_INDEX 0x00FF /* Token index (if needed) */ +#define IW_ENCODE_FLAGS 0xFF00 /* Flags defined below */ +#define IW_ENCODE_MODE 0xF000 /* Modes defined below */ +#define IW_ENCODE_DISABLED 0x8000 /* Encoding disabled */ +#define IW_ENCODE_ENABLED 0x0000 /* Encoding enabled */ +#define IW_ENCODE_RESTRICTED 0x4000 /* Refuse non-encoded packets */ +#define IW_ENCODE_OPEN 0x2000 /* Accept non-encoded packets */ +#define IW_ENCODE_NOKEY 0x0800 /* Key is write only, so not present */ +#define IW_ENCODE_TEMP 0x0400 /* Temporary key */ + /* Frequency flags */ #define IW_FREQ_AUTO 0 /* Let the driver decides */ diff --git a/include/sys/ioctl.h b/include/sys/ioctl.h index 76abe7f01fb..ded8c5a6594 100644 --- a/include/sys/ioctl.h +++ b/include/sys/ioctl.h @@ -66,11 +66,9 @@ #ifdef CONFIG_WIRELESS_IEEE802154 -#ifdef CONFIG_IEEE802154_MAC /* Include ieee802.15.4 MAC IOCTL definitions */ # include -#endif #ifdef CONFIG_IEEE802154_MAC_DEV /* Include ieee802.15.4 character driver IOCTL definitions */ diff --git a/libc/machine/arm/armv7-a/Kconfig b/libc/machine/arm/armv7-a/Kconfig index 7a216e711cb..64a769aa967 100644 --- a/libc/machine/arm/armv7-a/Kconfig +++ b/libc/machine/arm/armv7-a/Kconfig @@ -6,6 +6,6 @@ config ARMV7A_MEMCPY bool "Enable optimized memcpy() for ARMv7-A" select LIBC_ARCH_MEMCPY - depends on ARM_TOOLCHAIN_GNU + depends on ARCH_TOOLCHAIN_GNU ---help--- Enable optimized ARMv7-A specific memcpy() library function diff --git a/libc/machine/arm/armv7-m/Kconfig b/libc/machine/arm/armv7-m/Kconfig index 7148c25c4b7..a95e6f5a148 100644 --- a/libc/machine/arm/armv7-m/Kconfig +++ b/libc/machine/arm/armv7-m/Kconfig @@ -6,6 +6,6 @@ config ARMV7M_MEMCPY bool "Enable optimized memcpy() for ARMv7-M" select LIBC_ARCH_MEMCPY - depends on ARM_TOOLCHAIN_GNU + depends on ARCH_TOOLCHAIN_GNU ---help--- Enable optimized ARMv7-M specific memcpy() library function diff --git a/libc/machine/arm/armv7-r/Kconfig b/libc/machine/arm/armv7-r/Kconfig index e772a2942d5..881d8646fc3 100644 --- a/libc/machine/arm/armv7-r/Kconfig +++ b/libc/machine/arm/armv7-r/Kconfig @@ -6,6 +6,6 @@ config ARMV7R_MEMCPY bool "Enable optimized memcpy() for ARMv7-R" select LIBC_ARCH_MEMCPY - depends on ARM_TOOLCHAIN_GNU + depends on ARCH_TOOLCHAIN_GNU ---help--- Enable optimized ARMv7-R specific memcpy() library function diff --git a/libc/netdb/lib_dnscache.c b/libc/netdb/lib_dnscache.c index 30cfdcd577f..ee7d0e68e83 100644 --- a/libc/netdb/lib_dnscache.c +++ b/libc/netdb/lib_dnscache.c @@ -156,7 +156,7 @@ void dns_save_answer(FAR const char *hostname, #if CONFIG_NETDB_DNSCLIENT_LIFESEC > 0 /* Get the current time, using CLOCK_MONOTONIC if possible */ - (void)clock_settime(DNS_CLOCK, &now); + (void)clock_gettime(DNS_CLOCK, &now); entry->ctime = (time_t)now.tv_sec; #endif @@ -218,7 +218,7 @@ int dns_find_answer(FAR const char *hostname, FAR struct sockaddr *addr, #if CONFIG_NETDB_DNSCLIENT_LIFESEC > 0 /* Get the current time, using CLOCK_MONOTONIC if possible */ - ret = clock_settime(DNS_CLOCK, &now); + ret = clock_gettime(DNS_CLOCK, &now); #endif /* REVISIT: This is not thread safe */ diff --git a/libc/wchar/Make.defs b/libc/wchar/Make.defs index 12c559a5cef..c9a3efec05e 100644 --- a/libc/wchar/Make.defs +++ b/libc/wchar/Make.defs @@ -43,6 +43,7 @@ CSRCS += lib_wcslcpy.c lib_wcsxfrm.c lib_wcrtomb.c lib_wcsftime.c CSRCS += lib_wcscoll.c lib_wcstol.c lib_wcstoll.c lib_wcstoul.c CSRCS += lib_wcstoull.c lib_wcstold.c lib_wcstof.c lib_wcstod.c CSRCS += lib_swprintf.c lib_mbsnrtowcs.c lib_wcsnrtombs.c +CSRCS += lib_mbrlen.c lib_mbsrtowcs.c # Add the wchar directory to the build diff --git a/libc/wchar/lib_mbrlen.c b/libc/wchar/lib_mbrlen.c new file mode 100644 index 00000000000..de075005d4d --- /dev/null +++ b/libc/wchar/lib_mbrlen.c @@ -0,0 +1,68 @@ +/**************************************************************************** + * libc/wchar/lib_mbrtowc.c + * + * Copyright (c) 2002-2004 Tim J. Robbins. + * All rights reserved. + * + * Copyright (c) 2011 The FreeBSD Foundation + * All rights reserved. + * + * Portions of this software were developed by David Chisnall + * under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#ifdef CONFIG_LIBC_WCHAR + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mbrlen + * + * Description: + * Determine number of bytes in next multibyte character + * + ****************************************************************************/ + +size_t mbrlen(const char *s, size_t n, mbstate_t *ps) +{ + return mbrtowc(NULL, s, n, ps); +} + +#endif diff --git a/libc/wchar/lib_mbsrtowcs.c b/libc/wchar/lib_mbsrtowcs.c new file mode 100644 index 00000000000..ffab88d1842 --- /dev/null +++ b/libc/wchar/lib_mbsrtowcs.c @@ -0,0 +1,69 @@ +/**************************************************************************** + * libc/wchar/lib_mbsrtowcs.c + * + * Copyright (c) 2002-2004 Tim J. Robbins. + * All rights reserved. + * + * Copyright (c) 2011 The FreeBSD Foundation + * All rights reserved. + * + * Portions of this software were developed by David Chisnall + * under sponsorship from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_LIBC_WCHAR + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mbsrtowcs + * + * Description: + * Convert a multibyte string to a wide-character string + * + ****************************************************************************/ + +size_t mbsrtowcs(wchar_t *dst, const char **src, size_t len, mbstate_t *ps) +{ + return mbsnrtowcs(dst, src, SIZE_MAX, len, ps); +} + +#endif diff --git a/libxx/Kconfig b/libxx/Kconfig index b55bcd799a6..722207e6b95 100644 --- a/libxx/Kconfig +++ b/libxx/Kconfig @@ -22,14 +22,6 @@ config HAVE_CXX if HAVE_CXX -config HAVE_CXXINITIALIZE - bool "Have C++ initialization" - default n - ---help--- - The platform-specific logic includes support for initialization - of static C++ instances for this architecture and for the selected - toolchain (via up_cxxinitialize()). - config CXX_NEWLONG bool "size_t is type long" default n diff --git a/mm/iob/Kconfig b/mm/iob/Kconfig index 3d603fde380..b64f90e3ce8 100644 --- a/mm/iob/Kconfig +++ b/mm/iob/Kconfig @@ -51,7 +51,6 @@ config IOB_THROTTLE int "I/O buffer throttle value" default 0 if !NET_TCP_WRITE_BUFFERS || !NET_TCP_READAHEAD default 8 if NET_TCP_WRITE_BUFFERS && NET_TCP_READAHEAD - depends on NET_TCP_WRITE_BUFFERS && NET_TCP_READAHEAD ---help--- TCP write buffering and read-ahead buffer use the same pool of free I/O buffers. In order to prevent uncontrolled incoming TCP packets @@ -63,12 +62,15 @@ config IOB_THROTTLE config IOB_DEBUG bool "Force I/O buffer debug" default n - depends on DEBUG_FEATURES + depends on DEBUG_FEATURES && !SYSLOG_BUFFER ---help--- This option will force debug output from I/O buffer logic. This is not normally something that would want to do but is convenient if you are debugging the I/O buffer logic and do not want to get overloaded with other un-related debug output. + NOTE that this selection is not available if IOBs are being used + to syslog buffering logic (CONFIG_SYSLOG_BUFFER=y)! + endif # MM_IOB endmenu # Common I/O buffer support diff --git a/mm/iob/iob.h b/mm/iob/iob.h index 5f4436980c1..9f43612d710 100644 --- a/mm/iob/iob.h +++ b/mm/iob/iob.h @@ -91,10 +91,18 @@ extern FAR struct iob_s *g_iob_freelist; -/* A list of all free, unallocated I/O buffer queue containers */ +/* A list of I/O buffers that are committed for allocation */ + +extern FAR struct iob_s *g_iob_committed; #if CONFIG_IOB_NCHAINS > 0 +/* A list of all free, unallocated I/O buffer queue containers */ + extern FAR struct iob_qentry_s *g_iob_freeqlist; + +/* A list of I/O buffer queue containers that are committed for allocation */ + +extern FAR struct iob_s *g_iob_qcommitted; #endif /* Counting semaphores that tracks the number of free IOBs/qentries */ diff --git a/mm/iob/iob_alloc.c b/mm/iob/iob_alloc.c index 27de2946706..9aee7ab8d43 100644 --- a/mm/iob/iob_alloc.c +++ b/mm/iob/iob_alloc.c @@ -1,7 +1,7 @@ /**************************************************************************** * mm/iob/iob_alloc.c * - * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016-2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -54,6 +54,47 @@ * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: iob_alloc_committed + * + * Description: + * Allocate an I/O buffer by taking the buffer at the head of the committed + * list. + * + ****************************************************************************/ + +static FAR struct iob_s *iob_alloc_committed(void) +{ + FAR struct iob_s *iob = NULL; + irqstate_t flags; + + /* We don't know what context we are called from so we use extreme measures + * to protect the committed list: We disable interrupts very briefly. + */ + + flags = enter_critical_section(); + + /* Take the I/O buffer from the head of the committed list */ + + iob = g_iob_committed; + if (iob != NULL) + { + /* Remove the I/O buffer from the committed list */ + + g_iob_committed = iob->io_flink; + + /* Put the I/O buffer in a known state */ + + iob->io_flink = NULL; /* Not in a chain */ + iob->io_len = 0; /* Length of the data in the entry */ + iob->io_offset = 0; /* Offset to the beginning of data */ + iob->io_pktlen = 0; /* Total length of the packet */ + } + + leave_critical_section(flags); + return iob; +} + /**************************************************************************** * Name: iob_allocwait * @@ -85,73 +126,76 @@ static FAR struct iob_s *iob_allocwait(bool throttled) */ flags = enter_critical_section(); - do + + /* Try to get an I/O buffer. If successful, the semaphore count will be + * decremented atomically. + */ + + iob = iob_tryalloc(throttled); + while (ret == OK && iob == NULL) { - /* Try to get an I/O buffer. If successful, the semaphore count - * will be decremented atomically. + /* If not successful, then the semaphore count was less than or equal + * to zero (meaning that there are no free buffers). We need to wait + * for an I/O buffer to be released and placed in the committed + * list. */ - iob = iob_tryalloc(throttled); - if (!iob) + ret = sem_wait(sem); + if (ret < 0) { - /* If not successful, then the semaphore count was less than or - * equal to zero (meaning that there are no free buffers). We - * need to wait for an I/O buffer to be released when the semaphore - * count will be incremented. + int errcode = get_errno(); + + /* EINTR is not an error! EINTR simply means that we were + * awakened by a signal and we should try again. + * + * REVISIT: Many end-user interfaces are required to return with + * an error if EINTR is set. Most uses of this function are in + * internal, non-user logic. But are there cases where the error + * should be returned. */ - ret = sem_wait(sem); - if (ret < 0) + if (errcode == EINTR) { - int errcode = get_errno(); + /* Force a success indication so that we will continue looping. */ - /* EINTR is not an error! EINTR simply means that we were - * awakened by a signal and we should try again. - * - * REVISIT: Many end-user interfaces are required to return - * with an error if EINTR is set. Most uses of this function - * is in internal, non-user logic. But are there cases where - * the error should be returned. - */ - - if (errcode == EINTR) - { - /* Force a success indication so that we will continue - * looping. - */ - - ret = 0; - } - else - { - /* Stop the loop and return a error */ - - DEBUGASSERT(errcode > 0); - ret = -errcode; - } + ret = 0; } else { - /* When we wake up from wait successfully, an I/O buffer was - * returned to the free list. However, if there are concurrent - * allocations from interrupt handling, then I suspect that - * there is a race condition. But no harm, we will just wait - * again in that case. + /* Stop the loop and return a error */ + + DEBUGASSERT(errcode > 0); + ret = -errcode; + } + } + else + { + /* When we wake up from wait successfully, an I/O buffer was + * freed and we hold a count for one IOB. Unless somehting + * failed, we should have an IOB waiting for us in the + * committed list. + */ + + iob = iob_alloc_committed(); + DEBUGASSERT(iob != NULL); + + if (iob == NULL) + { + /* This should not fail, but we allow for that possibility to + * handle any potential, non-obvious race condition. Perhaps + * the free IOB ended up in the g_iob_free list? * * We need release our count so that it is available to * iob_tryalloc(), perhaps allowing another thread to take our * count. In that event, iob_tryalloc() will fail above and * we will have to wait again. - * - * TODO: Consider a design modification to permit us to - * complete the allocation without losing our count. */ sem_post(sem); + iob = iob_tryalloc(throttled); } } } - while (ret == OK && iob == NULL); leave_critical_section(flags); return iob; @@ -225,7 +269,7 @@ FAR struct iob_s *iob_tryalloc(bool throttled) /* Take the I/O buffer from the head of the free list */ iob = g_iob_freelist; - if (iob) + if (iob != NULL) { /* Remove the I/O buffer from the free list and decrement the * counting semaphore(s) that tracks the number of available diff --git a/mm/iob/iob_alloc_qentry.c b/mm/iob/iob_alloc_qentry.c index a1d4044bc45..10bc1123d7a 100644 --- a/mm/iob/iob_alloc_qentry.c +++ b/mm/iob/iob_alloc_qentry.c @@ -55,6 +55,44 @@ * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: iob_alloc_qcommitted + * + * Description: + * Allocate an I/O buffer by taking the buffer at the head of the committed + * list. + * + ****************************************************************************/ + +static FAR struct iob_qentry_s *iob_alloc_qcommitted(void) +{ + FAR struct iob_qentry_s *iobq = NULL; + irqstate_t flags; + + /* We don't know what context we are called from so we use extreme measures + * to protect the committed list: We disable interrupts very briefly. + */ + + flags = enter_critical_section(); + + /* Take the I/O buffer from the head of the committed list */ + + iobq = g_iob_qcommitted; + if (iobq != NULL) + { + /* Remove the I/O buffer from the committed list */ + + g_iob_qcommitted = iobq->qe_flink; + + /* Put the I/O buffer in a known state */ + + iobq->qe_head = NULL; /* Nothing is contained */ + } + + leave_critical_section(flags); + return iobq; +} + /**************************************************************************** * Name: iob_allocwait_qentry * @@ -78,73 +116,78 @@ static FAR struct iob_qentry_s *iob_allocwait_qentry(void) */ flags = enter_critical_section(); - do + + /* Try to get an I/O buffer chain container. If successful, the semaphore + * count will bedecremented atomically. + */ + + qentry = iob_tryalloc_qentry(); + while (ret == OK && qentry == NULL) { - /* Try to get an I/O buffer chain container. If successful, the - * semaphore count will be decremented atomically. + /* If not successful, then the semaphore count was less than or equal + * to zero (meaning that there are no free buffers). We need to wait + * for an I/O buffer chain container to be released when the + * semaphore count will be incremented. */ - qentry = iob_tryalloc_qentry(); - if (!qentry) + ret = sem_wait(&g_qentry_sem); + if (ret < 0) { - /* If not successful, then the semaphore count was less than or - * equal to zero (meaning that there are no free buffers). We - * need to wait for an I/O buffer chain container to be released - * when the semaphore count will be incremented. + int errcode = get_errno(); + + /* EINTR is not an error! EINTR simply means that we were + * awakened by a signal and we should try again. + * + * REVISIT: Many end-user interfaces are required to return + * with an error if EINTR is set. Most uses of this function + * is in internal, non-user logic. But are there cases where + * the error should be returned. */ - ret = sem_wait(&g_qentry_sem); - if (ret < 0) + if (errcode == EINTR) { - int errcode = get_errno(); - - /* EINTR is not an error! EINTR simply means that we were - * awakened by a signal and we should try again. - * - * REVISIT: Many end-user interfaces are required to return - * with an error if EINTR is set. Most uses of this function - * is in internal, non-user logic. But are there cases where - * the error should be returned. + /* Force a success indication so that we will continue + * looping. */ - if (errcode == EINTR) - { - /* Force a success indication so that we will continue - * looping. - */ - - ret = 0; - } - else - { - /* Stop the loop and return a error */ - - DEBUGASSERT(errcode > 0); - ret = -errcode; - } + ret = 0; } else { - /* When we wake up from wait successfully, an I/O buffer chain - * container was returned to the free list. However, if there - * are concurrent allocations from interrupt handling, then I - * suspect that there is a race condition. But no harm, we - * will just wait again in that case. + /* Stop the loop and return a error */ + + DEBUGASSERT(errcode > 0); + ret = -errcode; + } + } + else + { + /* When we wake up from wait successfully, an I/O buffer chain container was + * freed and we hold a count for one IOB. Unless somehting + * failed, we should have an IOB waiting for us in the + * committed list. + */ + + qentry = iob_alloc_qcommitted(); + DEBUGASSERT(qentry != NULL); + + if (qentry == NULL) + { + /* This should not fail, but we allow for that possibility to + * handle any potential, non-obvious race condition. Perhaps + * the free IOB ended up in the g_iob_free list? * * We need release our count so that it is available to - * iob_tryalloc_qentry(), perhaps allowing another thread to - * take our count. In that event, iob_tryalloc_qentry() will - * fail above and we will have to wait again. - * - * TODO: Consider a design modification to permit us to - * complete the allocation without losing our count. + * iob_tryalloc(), perhaps allowing another thread to take our + * count. In that event, iob_tryalloc() will fail above and + * we will have to wait again. */ sem_post(&g_qentry_sem); + qentry = iob_tryalloc_qentry(); } } } - while (ret == OK && !qentry); leave_critical_section(flags); return qentry; diff --git a/mm/iob/iob_free.c b/mm/iob/iob_free.c index 75a01cf89b6..0265e2d899a 100644 --- a/mm/iob/iob_free.c +++ b/mm/iob/iob_free.c @@ -74,7 +74,7 @@ FAR struct iob_s *iob_free(FAR struct iob_s *iob) * the next entry. */ - if (next) + if (next != NULL) { /* Copy and decrement the total packet length, being careful to * do nothing too crazy. @@ -101,16 +101,36 @@ FAR struct iob_s *iob_free(FAR struct iob_s *iob) next, next->io_pktlen, next->io_len); } - /* Free the I/O buffer by adding it to the head of the free list. We don't - * know what context we are called from so we use extreme measures to - * protect the free list: We disable interrupts very briefly. + /* Free the I/O buffer by adding it to the head of the free or the + * committed list. We don't know what context we are called from so + * we use extreme measures to protect the free list: We disable + * interrupts very briefly. */ flags = enter_critical_section(); - iob->io_flink = g_iob_freelist; - g_iob_freelist = iob; - /* Signal that an IOB is available */ + /* Which list? If there is a task waiting for an IOB, then put + * the IOB on either the free list or on the committed list where + * it is reserved for that allocation (and not available to + * iob_tryalloc()). + */ + + if (g_iob_sem.semcount < 0) + { + iob->io_flink = g_iob_committed; + g_iob_committed = iob; + } + else + { + iob->io_flink = g_iob_freelist; + g_iob_freelist = iob; + } + + /* Signal that an IOB is available. If there is a thread waiting + * for an IOB, this will wake up exactly one thread. The semaphore + * count will correctly indicated that the awakened task owns an + * IOB and should find it in the committed list. + */ sem_post(&g_iob_sem); #if CONFIG_IOB_THROTTLE > 0 diff --git a/mm/iob/iob_free_qentry.c b/mm/iob/iob_free_qentry.c index 393f0ee47b6..135cd3ae3ae 100644 --- a/mm/iob/iob_free_qentry.c +++ b/mm/iob/iob_free_qentry.c @@ -1,7 +1,7 @@ /**************************************************************************** * mm/iob/iob_free_qentry.c * - * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016-2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -68,16 +68,37 @@ FAR struct iob_qentry_s *iob_free_qentry(FAR struct iob_qentry_s *iobq) FAR struct iob_qentry_s *nextq = iobq->qe_flink; irqstate_t flags; - /* Free the I/O buffer chain container by adding it to the head of the free - * list. We don't know what context we are called from so we use extreme - * measures to protect the free list: We disable interrupts very briefly. + /* Free the I/O buffer chain container by adding it to the head of the + * free or the committed list. We don't know what context we are called + * from so we use extreme measures to protect the free list: We disable + * interrupts very briefly. */ flags = enter_critical_section(); - iobq->qe_flink = g_iob_freeqlist; - g_iob_freeqlist = iobq; - /* Signal that an I/O buffer chain container is available */ + /* Which list? If there is a task waiting for an IOB, then put + * the IOB on either the free list or on the committed list where + * it is reserved for that allocation (and not available to + * iob_tryalloc()). + */ + + if (g_iob_sem.semcount < 0) + { + iobq->qe_flink = g_iob_qcommitted; + g_iob_qcommitted = iobq; + } + else + { + iobq->qe_flink = g_iob_freeqlist; + g_iob_freeqlist = iobq; + } + + /* Signal that an I/O buffer chain container is available. If there + * is a thread waiting for an I/O buffer chain container, this will + * wake up exactly one thread. The semaphore count will correctly + * indicated that the awakened task owns an I/O buffer chain container + * and should find it in the committed list. + */ sem_post(&g_qentry_sem); leave_critical_section(flags); diff --git a/mm/iob/iob_initialize.c b/mm/iob/iob_initialize.c index 1662fe47728..adab03c228c 100644 --- a/mm/iob/iob_initialize.c +++ b/mm/iob/iob_initialize.c @@ -1,7 +1,7 @@ /**************************************************************************** * mm/iob/iob_initialize.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2017 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -46,6 +46,14 @@ #include "iob.h" +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef NULL +# define NULL ((FAR void *)0) +#endif + /**************************************************************************** * Private Data ****************************************************************************/ @@ -65,10 +73,18 @@ static struct iob_qentry_s g_iob_qpool[CONFIG_IOB_NCHAINS]; FAR struct iob_s *g_iob_freelist; -/* A list of all free, unallocated I/O buffer queue containers */ +/* A list of I/O buffers that are committed for allocation */ + +FAR struct iob_s *g_iob_committed; #if CONFIG_IOB_NCHAINS > 0 +/* A list of all free, unallocated I/O buffer queue containers */ + FAR struct iob_qentry_s *g_iob_freeqlist; + +/* A list of I/O buffer queue containers that are committed for allocation */ + +FAR struct iob_s *g_iob_qcommitted; #endif /* Counting semaphores that tracks the number of free IOBs/qentries */ @@ -114,8 +130,9 @@ void iob_initialize(void) g_iob_freelist = iob; } - sem_init(&g_iob_sem, 0, CONFIG_IOB_NBUFFERS); + g_iob_committed = NULL; + sem_init(&g_iob_sem, 0, CONFIG_IOB_NBUFFERS); #if CONFIG_IOB_THROTTLE > 0 sem_init(&g_throttle_sem, 0, CONFIG_IOB_NBUFFERS - CONFIG_IOB_THROTTLE); #endif @@ -133,6 +150,8 @@ void iob_initialize(void) g_iob_freeqlist = iobq; } + g_iob_qcommitted = NULL; + sem_init(&g_qentry_sem, 0, CONFIG_IOB_NCHAINS); #endif initialized = true; diff --git a/net/netdev/netdev_ioctl.c b/net/netdev/netdev_ioctl.c index dae80646457..3978819d211 100644 --- a/net/netdev/netdev_ioctl.c +++ b/net/netdev/netdev_ioctl.c @@ -506,9 +506,7 @@ static int netdev_ifr_ioctl(FAR struct socket *psock, int cmd, dev = netdev_ifr_dev(req); if (dev) { - netdev_ifdown(dev); ioctl_set_ipv4addr(&dev->d_ipaddr, &req->ifr_addr); - netdev_ifup(dev); ret = OK; } } @@ -599,9 +597,7 @@ static int netdev_ifr_ioctl(FAR struct socket *psock, int cmd, { FAR struct lifreq *lreq = (FAR struct lifreq *)req; - netdev_ifdown(dev); ioctl_set_ipv6addr(dev->d_ipv6addr, &lreq->lifr_addr); - netdev_ifup(dev); ret = OK; } } @@ -830,7 +826,6 @@ static int netdev_ifr_ioctl(FAR struct socket *psock, int cmd, dev = netdev_ifr_dev(req); if (dev) { - netdev_ifdown(dev); #ifdef CONFIG_NET_IPv4 dev->d_ipaddr = 0; #endif diff --git a/net/procfs/netdev_statistics.c b/net/procfs/netdev_statistics.c index 109f4cdca28..cd7dde177d9 100644 --- a/net/procfs/netdev_statistics.c +++ b/net/procfs/netdev_statistics.c @@ -61,9 +61,12 @@ ****************************************************************************/ static int netprocfs_linklayer(FAR struct netprocfs_file_s *netfile); -static int netprocfs_ipaddresses(FAR struct netprocfs_file_s *netfile); +#ifdef CONFIG_NET_IPv4 +static int netprocfs_inet4addresses(FAR struct netprocfs_file_s *netfile); +#endif #ifdef CONFIG_NET_IPv6 -static int netprocfs_dripaddress(FAR struct netprocfs_file_s *netfile); +static int netprocfs_inet6address(FAR struct netprocfs_file_s *netfile); +static int netprocfs_inet6draddress(FAR struct netprocfs_file_s *netfile); #endif #ifdef CONFIG_NETDEV_STATISTICS static int netprocfs_rxstatistics_header(FAR struct netprocfs_file_s *netfile); @@ -83,10 +86,13 @@ static int netprocfs_errors(FAR struct netprocfs_file_s *netfile); static const linegen_t g_linegen[] = { - netprocfs_linklayer, - netprocfs_ipaddresses + netprocfs_linklayer +#ifdef CONFIG_NET_IPv4 + , netprocfs_inet4addresses +#endif #ifdef CONFIG_NET_IPv6 - , netprocfs_dripaddress + , netprocfs_inet6address + , netprocfs_inet6draddress #endif #ifdef CONFIG_NETDEV_STATISTICS , netprocfs_rxstatistics_header, @@ -255,25 +261,19 @@ static int netprocfs_linklayer(FAR struct netprocfs_file_s *netfile) } /**************************************************************************** - * Name: netprocfs_ipaddresses + * Name: netprocfs_inet4addresses ****************************************************************************/ -static int netprocfs_ipaddresses(FAR struct netprocfs_file_s *netfile) +#ifdef CONFIG_NET_IPv4 +static int netprocfs_inet4addresses(FAR struct netprocfs_file_s *netfile) { FAR struct net_driver_s *dev; -#ifdef CONFIG_NET_IPv4 struct in_addr addr; -#endif -#ifdef CONFIG_NET_IPv6 - char addrstr[INET6_ADDRSTRLEN]; - uint8_t preflen; -#endif int len = 0; DEBUGASSERT(netfile != NULL && netfile->dev != NULL); dev = netfile->dev; -#ifdef CONFIG_NET_IPv4 /* Show the IPv4 address */ addr.s_addr = dev->d_ipaddr; @@ -291,9 +291,25 @@ static int netprocfs_ipaddresses(FAR struct netprocfs_file_s *netfile) addr.s_addr = dev->d_netmask; len += snprintf(&netfile->line[len], NET_LINELEN - len, "Mask:%s\n\n", inet_ntoa(addr)); + return len; +} #endif +/**************************************************************************** + * Name: netprocfs_inet6address + ****************************************************************************/ + #ifdef CONFIG_NET_IPv6 +static int netprocfs_inet6address(FAR struct netprocfs_file_s *netfile) +{ + FAR struct net_driver_s *dev; + char addrstr[INET6_ADDRSTRLEN]; + uint8_t preflen; + int len = 0; + + DEBUGASSERT(netfile != NULL && netfile->dev != NULL); + dev = netfile->dev; + /* Convert the 128 network mask to a human friendly prefix length */ preflen = net_ipv6_mask2pref(dev->d_ipv6netmask); @@ -305,17 +321,17 @@ static int netprocfs_ipaddresses(FAR struct netprocfs_file_s *netfile) len += snprintf(&netfile->line[len], NET_LINELEN - len, "\tinet6 addr:%s/%d\n", addrstr, preflen); } -#endif return len; } +#endif /**************************************************************************** - * Name: netprocfs_dripaddress + * Name: netprocfs_inet6draddress ****************************************************************************/ #ifdef CONFIG_NET_IPv6 -static int netprocfs_dripaddress(FAR struct netprocfs_file_s *netfile) +static int netprocfs_inet6draddress(FAR struct netprocfs_file_s *netfile) { FAR struct net_driver_s *dev; char addrstr[INET6_ADDRSTRLEN]; diff --git a/net/procfs/procfs.h b/net/procfs/procfs.h index 889f3507256..9b0d7bfd49f 100644 --- a/net/procfs/procfs.h +++ b/net/procfs/procfs.h @@ -54,7 +54,7 @@ * to handle the longest line generated by this logic. */ -#define NET_LINELEN 64 +#define NET_LINELEN 80 /**************************************************************************** * Public Type Definitions diff --git a/net/tcp/tcp.h b/net/tcp/tcp.h index 4b3bb85e754..2797f4f3bc1 100644 --- a/net/tcp/tcp.h +++ b/net/tcp/tcp.h @@ -697,6 +697,19 @@ void tcp_timer(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn, void tcp_listen_initialize(void); +/**************************************************************************** + * Name: tcp_findlistener + * + * Description: + * Return the connection listener for connections on this port (if any) + * + * Assumptions: + * Called at interrupt level + * + ****************************************************************************/ + +FAR struct tcp_conn_s *tcp_findlistener(uint16_t portno); + /**************************************************************************** * Name: tcp_unlisten * diff --git a/net/tcp/tcp_input.c b/net/tcp/tcp_input.c index 1918bd34924..a064fb07637 100644 --- a/net/tcp/tcp_input.c +++ b/net/tcp/tcp_input.c @@ -179,28 +179,35 @@ static void tcp_input(FAR struct net_driver_s *dev, unsigned int iplen) conn = tcp_alloc_accept(dev, tcp); if (conn) { - /* The connection structure was successfully allocated. Now see if - * there is an application waiting to accept the connection (or at - * least queue it it for acceptance). + /* The connection structure was successfully allocated and has + * been initialized in the TCP_SYN_RECVD state. The expected + * sequence of events is then the rest of the 3-way handshake: + * + * 1. We just received a TCP SYN packet from a remote host. + * 2. We will send the SYN-ACK response below (perhaps + * repeatedly in the event of a timeout) + * 3. Then we expect to receive an ACK from the remote host + * indicated the TCP socket connection is ESTABLISHED. + * + * Possible failure: + * + * 1. The ACK is never received. This will be handled by + * a timeout managed by tcp_timer(). + * 2. The listener "unlistens()". This will be handled by + * the failure of tcp_accept_connection() when the ACK is + * received. */ conn->crefs = 1; - if (tcp_accept_connection(dev, conn, tmp16) != OK) - { - /* No, then we have to give the connection back and drop the packet */ - - conn->crefs = 0; - tcp_free(conn); - conn = NULL; - } } if (!conn) { - /* Either (1) all available connections are in use, or (2) there is no - * application in place to accept the connection. We drop packet and hope that - * the remote end will retransmit the packet at a time when we - * have more spare connections or someone waiting to accept the connection. + /* Either (1) all available connections are in use, or (2) + * there is no application in place to accept the connection. + * We drop packet and hope that the remote end will retransmit + * the packet at a time when we have more spare connections + * or someone waiting to accept the connection. */ #ifdef CONFIG_NET_STATISTICS @@ -307,10 +314,44 @@ found: if ((tcp->flags & TCP_RST) != 0) { - conn->tcpstateflags = TCP_CLOSED; - nwarn("WARNING: RESET - TCP state: TCP_CLOSED\n"); + FAR struct tcp_conn_s *listener = NULL; + + /* An RST received during the 3-way connection handshake requires + * little more clean-up. + */ + + if ((conn->tcpstateflags & TCP_STATE_MASK) == TCP_SYN_RCVD) + { + conn->tcpstateflags = TCP_CLOSED; + nwarn("WARNING: RESET in TCP_SYN_RCVD\n"); + + /* Notify the listener for the connection of the reset event */ + + listener = tcp_findlistener(conn->lport); + + /* We must free this TCP connection structure; this connection + * will never be established. + */ + + tcp_free(conn); + } + else + { + conn->tcpstateflags = TCP_CLOSED; + nwarn("WARNING: RESET TCP state: TCP_CLOSED\n"); + + /* Notify this connection of the reset event */ + + listener = conn; + } + + /* Perform the TCP_ABORT callback and drop the packet */ + + if (listener != NULL) + { + (void)tcp_callback(dev, listener, TCP_ABORT); + } - (void)tcp_callback(dev, conn, TCP_ABORT); goto drop; } @@ -462,8 +503,35 @@ found: if ((flags & TCP_ACKDATA) != 0) { + /* The three way handshake is complete and the TCP connection + * is now in the ESTABLISHED state. + */ + conn->tcpstateflags = TCP_ESTABLISHED; + /* Wake up any listener waiting for a connection on this port */ + + if (tcp_accept_connection(dev, conn, tcp->destport) != OK) + { + /* No more listener for current port. We can free conn here + * because it has not been shared with upper layers yet as + * handshake is not complete + */ + + nerr("Listen canceled while waiting for ACK on port %d\n", + tcp->destport); + + /* Free the connection structure */ + + conn->crefs = 0; + tcp_free(conn); + conn = NULL; + + /* And send a reset packet to the remote host. */ + + goto reset; + } + #ifdef CONFIG_NET_TCP_WRITE_BUFFERS conn->isn = tcp_getsequence(tcp->ackno); tcp_setsequence(conn->sndseq, conn->isn); diff --git a/net/tcp/tcp_listen.c b/net/tcp/tcp_listen.c index f7d771d2b6d..b3d36a126d3 100644 --- a/net/tcp/tcp_listen.c +++ b/net/tcp/tcp_listen.c @@ -257,7 +257,7 @@ int tcp_accept_connection(FAR struct net_driver_s *dev, */ listener = tcp_findlistener(portno); - if (listener) + if (listener != NULL) { /* Yes, there is a listener. Is it accepting connections now? */ diff --git a/net/tcp/tcp_timer.c b/net/tcp/tcp_timer.c index 245e849ec67..03935c964b2 100644 --- a/net/tcp/tcp_timer.c +++ b/net/tcp/tcp_timer.c @@ -218,17 +218,57 @@ void tcp_timer(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn, goto done; } #endif - /* Should we close the connection? */ + /* Check for a timeout on connection in the TCP_SYN_RCVD state. + * On such timeouts, we would normally resend the SYNACK until + * the ACK is received, completing the 3-way handshake. But if + * the retry count elapsed, then we must assume that no ACK is + * forthcoming and terminate the attempted connection. + */ - if ( + if (conn->tcpstateflags == TCP_SYN_RCVD && + conn->nrtx >= TCP_MAXSYNRTX) + { + FAR struct tcp_conn_s *listener; + + conn->tcpstateflags = TCP_CLOSED; + ninfo("TCP state: TCP_SYN_RCVD->TCP_CLOSED\n"); + + /* Find the listener for this connection. */ + + listener = tcp_findlistener(conn->lport); + if (listener != NULL) + { + /* We call tcp_callback() for the connection with + * TCP_TIMEDOUT to inform the listener that the + * connection has timed out. + */ + + result = tcp_callback(dev, listener, TCP_TIMEDOUT); + } + + /* We also send a reset packet to the remote host. */ + + tcp_send(dev, conn, TCP_RST | TCP_ACK, hdrlen); + + /* Finally, we must free this TCP connection structure */ + + tcp_free(conn); + goto done; + } + + /* Otherwise, check for a timeout on an established connection. + * If the retry count is exceeded in this case, we should + * close the connection. + */ + + else if ( #ifdef CONFIG_NET_TCP_WRITE_BUFFERS conn->expired > 0 || #else - conn->nrtx == TCP_MAXRTX || + conn->nrtx >= TCP_MAXRTX || #endif - ((conn->tcpstateflags == TCP_SYN_SENT || - conn->tcpstateflags == TCP_SYN_RCVD) && - conn->nrtx == TCP_MAXSYNRTX) + (conn->tcpstateflags == TCP_SYN_SENT && + conn->nrtx >= TCP_MAXSYNRTX) ) { conn->tcpstateflags = TCP_CLOSED; diff --git a/net/utils/net_ipv6_pref2mask.c b/net/utils/net_ipv6_pref2mask.c index 6b046354131..7155f5856b6 100644 --- a/net/utils/net_ipv6_pref2mask.c +++ b/net/utils/net_ipv6_pref2mask.c @@ -82,7 +82,7 @@ void net_ipv6_pref2mask(uint8_t preflen, net_ipv6addr_t mask) * 1..6 7..2 3..8 9..4 5..0 1..6 7..2 3..8 */ - for (i = 0; i < 7; i++) + for (i = 0; i < 8; i++) { /* bit = {0, 16, 32, 48, 64, 80, 96, 112} */ @@ -92,7 +92,7 @@ void net_ipv6_pref2mask(uint8_t preflen, net_ipv6addr_t mask) { /* Eg. preflen = 38, bit = {0, 16, 32} */ - if (preflen > (bit + 16)) + if (preflen >= (bit + 16)) { /* Eg. preflen = 38, bit = {0, 16} */ @@ -102,7 +102,7 @@ void net_ipv6_pref2mask(uint8_t preflen, net_ipv6addr_t mask) { /* Eg. preflen = 38, bit = {32} * bit - preflen = 6 - * make = 0xffff << (16-6) + * mask = 0xffff << (16-6) * = 0xfc00 */ @@ -111,7 +111,7 @@ void net_ipv6_pref2mask(uint8_t preflen, net_ipv6addr_t mask) } else { - /* Eg. preflen=38, bit= {48, 64, 80, 112} */ + /* Eg. preflen=38, bit= {48, 64, 80, 96, 112} */ mask[i] = 0x0000; } diff --git a/tools/testbuild.sh b/tools/testbuild.sh index e0ceb13bb1e..7e67b061376 100755 --- a/tools/testbuild.sh +++ b/tools/testbuild.sh @@ -212,7 +212,7 @@ function configure { fi if [ "X$toolchain" != "X" ]; then - setting=`grep TOOLCHAIN $nuttx/.config | grep -v CONFIG_ARM_TOOLCHAIN_GNU=y | grep =y` + setting=`grep TOOLCHAIN $nuttx/.config | grep -v CONFIG_ARCH_TOOLCHAIN_GNU=y | grep =y` varname=`echo $setting | cut -d'=' -f1` if [ ! -z "varname" ]; then echo " Disabling $varname" diff --git a/wireless/ieee802154/Kconfig b/wireless/ieee802154/Kconfig index 670ea474f38..9e12f8b1bb5 100644 --- a/wireless/ieee802154/Kconfig +++ b/wireless/ieee802154/Kconfig @@ -3,31 +3,22 @@ # see the file kconfig-language.txt in the NuttX tools repository. # -config WIRELESS_IEEE802154 - bool "IEEE 802.15.4 Wireless Support" +menuconfig WIRELESS_IEEE802154 + bool "IEEE 802.15.4 Support" default n select MM_IOB - ---help--- - Enables support for the IEEE 802.14.5 Wireless library. - -if WIRELESS_IEEE802154 - -menuconfig IEEE802154_MAC - bool "Generic Media Access Control (MAC) layer for 802.15.4 radios" - default n - depends on WIRELESS_IEEE802154 + depends on WIRELESS ---help--- Enables a Media Access Controller for any IEEE802.15.4 radio device. This in turn can be used by higher layer entities - such as 6lowpan. It is not required to use 802.15.4 radios, - but is strongly suggested to ensure exchange of valid frames. + such as 6lowpan. -if IEEE802154_MAC +if WIRELESS_IEEE802154 config IEEE802154_MAC_DEV bool "Character driver for IEEE 802.15.4 MAC layer" default n - depends on IEEE802154_MAC + depends on WIRELESS_IEEE802154 ---help--- Enable the device driver to expose the IEEE 802.15.4 MAC layer access to user space as IOCTLs @@ -58,8 +49,6 @@ config IEEE802154_NTXDESC ---help--- Configured number of Tx descriptors. Default: 3 -endif # IEEE802154_MAC - config IEEE802154_IND_PREALLOC int "Number of pre-allocated meta-data structures" default 20 diff --git a/wireless/ieee802154/Make.defs b/wireless/ieee802154/Make.defs index 73354b2609b..eedec934ebb 100644 --- a/wireless/ieee802154/Make.defs +++ b/wireless/ieee802154/Make.defs @@ -37,22 +37,14 @@ ifeq ($(CONFIG_WIRELESS_IEEE802154),y) # Include IEEE 802.15.4 support -CSRCS += mac802154_indalloc.c +CSRCS += mac802154.c mac802154_indalloc.c # Include wireless devices build support -ifeq ($(CONFIG_IEEE802154_MAC),y) -CSRCS += mac802154.c -endif - ifeq ($(CONFIG_IEEE802154_MAC_DEV),y) CSRCS += mac802154_device.c endif -ifeq ($(CONFIG_IEEE802154_DEV),y) -CSRCS += radio802154_device.c -endif - ifeq ($(CONFIG_IEEE802154_NETDEV),y) CSRCS += mac802154_netdev.c endif diff --git a/wireless/ieee802154/mac802154.c b/wireless/ieee802154/mac802154.c index a345d81933c..c57891f83c2 100644 --- a/wireless/ieee802154/mac802154.c +++ b/wireless/ieee802154/mac802154.c @@ -52,11 +52,11 @@ #include +#include "mac802154.h" + #include #include -#include "mac802154.h" - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -80,17 +80,32 @@ # endif #endif +#if !defined(CONFIG_MAC802154_NNOTIF) || CONFIG_MAC802154_NNOTIF <= 0 +# undef CONFIG_MAC802154_NNOTIF +# define CONFIG_MAC802154_NNOTIF 6 +#endif + +#if !defined(CONFIG_MAC802154_NTXDESC) || CONFIG_MAC802154_NTXDESC <= 0 +# undef CONFIG_MAC802154_NTXDESC +# define CONFIG_MAC802154_NTXDESC 3 +#endif + +#if CONFIG_MAC802154_NTXDESC > CONFIG_MAC802154_NNOTIF +#error CONFIG_MAC802154_NNOTIF must be greater than CONFIG_MAC802154_NTXDESC +#endif + /**************************************************************************** * Private Types ****************************************************************************/ -struct mac802154_txframe_s +struct mac802154_txtrans_s { /* Supports a singly linked list */ - FAR struct mac802154_txframe_s *flink; + FAR struct mac802154_txtrans_s *flink; FAR struct iob_s *frame; - uint8_t msdu_handle; + uint8_t handle; + enum ieee802154_frametype_e frametype; sem_t sem; }; @@ -118,11 +133,46 @@ struct mac802154_radiocb_s struct ieee802154_privmac_s { FAR struct ieee802154_radio_s *radio; /* Contained IEEE802.15.4 radio dev */ - FAR const struct ieee802154_maccb_s *cb; /* Contained MAC callbacks */ + FAR const struct mac802154_maccb_s *cb; /* Contained MAC callbacks */ FAR struct mac802154_radiocb_s radiocb; /* Interface to bind to radio */ sem_t exclsem; /* Support exclusive access */ + /* Support a single transaction dedicated to commands. As of now I see no + * condition where you need to have more than one command frame simultaneously + */ + + struct + { + sem_t sem; /* Exclusive use of the cmdtrans */ + enum ieee802154_cmdid_e type; /* Type of cmd in the cmdtrans */ + struct mac802154_txtrans_s trans; /* Dedicated txframe for cmds */ + + /* Has the command been successfully sent. This is to help protect + * against an odd edge case that may or may not ever happen. The condition + * occurs when you receive a seemingly appropriate response to the command + * yet the command was never actually sent. + */ + + bool txdone; + } cmd; + + /* Pre-allocated notifications to be passed to the registered callback. These + * need to be freed by the application using mac802154_xxxxnotif_free when + * the callee layer is finished with it's use. + */ + + FAR struct ieee802154_notif_s *notif_free; + struct ieee802154_notif_s notif_alloc[CONFIG_MAC802154_NNOTIF]; + sq_queue_t notif_queue; + + FAR struct ieee802154_txdesc_s *txdesc_free; + struct ieee802154_txdesc_s txdesc_alloc[CONFIG_IEEE802154_NTXDESC]; + sq_queue_t txdesc_queue; + sq_queue_t txdone_queue; + + /* Work structures for offloading aynchronous work */ + struct work_s tx_work; struct work_s rx_work; @@ -132,8 +182,7 @@ struct ieee802154_privmac_s * during the CAP of the Coordinator's superframe. */ - FAR struct mac802154_txframe_s *csma_head; - FAR struct mac802154_txframe_s *csma_tail; + sq_queue_t csma_queue; /* Support a singly linked list of transactions that will be sent indirectly. * This list should only be used by a MAC acting as a coordinator. These @@ -142,16 +191,12 @@ struct ieee802154_privmac_s * list should also be used to populate the address list of the outgoing * beacon frame. */ - - FAR struct mac802154_txframe_s *indirect_head; - FAR struct mac802154_txframe_s *indirect_tail; - - uint8_t txdesc_count; - struct ieee802154_txdesc_s txdesc[CONFIG_IEEE802154_NTXDESC]; + + sq_queue_t indirect_queue; /* Support a singly linked list of frames received */ - FAR struct ieee802154_data_ind_s *dataind_head; - FAR struct ieee802154_data_ind_s *dataind_tail; + + sq_queue_t dataind_queue; /* MAC PIB attributes, grouped to save memory */ @@ -264,7 +309,10 @@ struct ieee802154_privmac_s enum ieee802154_devmode_e devmode : 2; - /* 11-bits remaining */ + bool csma_tryagain : 1; + bool gts_tryagain : 1; + + /* 10-bits remaining */ /* End of 32-bit bitfield. */ @@ -275,25 +323,33 @@ struct ieee802154_privmac_s * Private Function Prototypes ****************************************************************************/ +/* Internal Functions */ + static inline int mac802154_takesem(sem_t *sem); #define mac802154_givesem(s) sem_post(s); -static void mac802154_txdone_worker(FAR void *arg); -static void mac802154_rxframe_worker(FAR void *arg); - -/* Internal Functions */ +static void mac802154_resetqueues(FAR struct ieee802154_privmac_s *priv); +static void mac802154_notifpool_init(FAR struct ieee802154_privmac_s *priv); +static FAR struct ieee802154_notif_s * + mac802154_notif_alloc(FAR struct ieee802154_privmac_s *priv); static int mac802154_defaultmib(FAR struct ieee802154_privmac_s *priv); static int mac802154_applymib(FAR struct ieee802154_privmac_s *priv); +static void mac802154_txdone_worker(FAR void *arg); +static void mac802154_rxframe_worker(FAR void *arg); + +static void mac802154_cmd_txdone(FAR struct ieee802154_privmac_s *priv, + FAR struct ieee802154_txdesc_s *txdesc); + /* IEEE 802.15.4 PHY Interface OPs */ static int mac802154_poll_csma(FAR const struct ieee802154_radiocb_s *radiocb, - FAR struct ieee802154_txdesc_s *tx_desc, + FAR struct ieee802154_txdesc_s **tx_desc, FAR struct iob_s **frame); static int mac802154_poll_gts(FAR const struct ieee802154_radiocb_s *radiocb, - FAR struct ieee802154_txdesc_s *tx_desc, + FAR struct ieee802154_txdesc_s **tx_desc, FAR struct iob_s **frame); static void mac802154_txdone(FAR const struct ieee802154_radiocb_s *radiocb, @@ -339,149 +395,100 @@ static inline int mac802154_takesem(sem_t *sem) } /**************************************************************************** - * Name: mac802154_push_csma + * Name: mac802154_resetqueues * * Description: - * Push a CSMA transaction onto the list + * Initializes the various queues used in the MAC layer. Called on creation + * of MAC. * ****************************************************************************/ -static void mac802154_push_csma(FAR struct ieee802154_privmac_s *priv, - FAR struct mac802154_txframe_s *trans) +static void mac802154_resetqueues(FAR struct ieee802154_privmac_s *priv) { - /* Ensure the transactions forward link is NULL */ + int i; - trans->flink = NULL; + sq_init(&priv->txdone_queue); + sq_init(&priv->csma_queue); + sq_init(&priv->indirect_queue); + sq_init(&priv->dataind_queue); - /* If the tail is not empty, make the transaction pointed to by the tail, - * point to the new transaction */ + sq_init(&priv->notif_queue); + sq_init(&priv->txdesc_queue); - if (priv->csma_tail != NULL) + for (i = 0; i < CONFIG_MAC802154_NNOTIF; i++) { - priv->csma_tail->flink = trans; + sq_addlast((FAR sq_entry_t *)&priv->notif_alloc[i], &priv->notif_queue); } - /* Point the tail at the new transaction */ - - priv->csma_tail = trans; - - /* If the head is NULL, we need to point it at the transaction since there - * is only one transaction in the list at this point */ - - if (priv->csma_head == NULL) + for (i = 0; i < CONFIG_MAC802154_NTXDESC; i++) { - priv->csma_head = trans; + sq_addlast((FAR sq_entry_t *)&priv->txdesc_alloc[i], &priv->txdesc_queue); + } + + mac802154_notifpool_init(priv); +} + +/**************************************************************************** + * Name: mac802154_notifpool_init + * + * Description: + * This function initializes the notification structure pool. It allows the + * MAC to pass notifications and for the callee to free them when they are + * done using them, saving copying the data when passing. + * + ****************************************************************************/ + +static void mac802154_notifpool_init(FAR struct ieee802154_privmac_s *priv) +{ + FAR struct ieee802154_notif_s *pool = priv->notif_alloc; + int remaining = CONFIG_MAC802154_NNOTIF; + + priv->notif_free = NULL; + while (remaining > 0) + { + FAR struct ieee802154_notif_s *notif = pool; + + /* Add the next meta data structure from the pool to the list of + * general structures. + */ + + notif->flink = priv->notif_free; + priv->notif_free = notif; + + /* Set up for the next structure from the pool */ + + pool++; + remaining--; } } /**************************************************************************** - * Name: mac802154_pop_csma + * Name: mac802154_notif_alloc * * Description: - * Pop a CSMA transaction from the list + * This function allocates a free notification structure from the free list + * to be used for passing to the registered notify callback. The callee software + * is responsible for freeing the notification structure after it is done using + * it via mac802154_notif_free. + * + * Assumptions: + * priv MAC struct is locked when calling. * ****************************************************************************/ - -static FAR struct mac802154_txframe_s * - mac802154_pop_csma(FAR struct ieee802154_privmac_s *priv) +static FAR struct ieee802154_notif_s * + mac802154_notif_alloc(FAR struct ieee802154_privmac_s *priv) { - FAR struct mac802154_txframe_s *trans; + FAR struct ieee802154_notif_s *notif; - if (priv->csma_head == NULL) + if (priv->notif_free == NULL) { return NULL; } - /* Get the transaction from the head of the list */ + notif = priv->notif_free; + priv->notif_free = notif->flink; - trans = priv->csma_head; - trans->flink = NULL; - - /* Move the head pointer to the next transaction */ - - priv->csma_head = trans->flink; - - /* If the head is now NULL, the list is empty, so clear the tail too */ - - if (priv->csma_head == NULL) - { - priv->csma_tail = NULL; - } - - return trans; -} - -/**************************************************************************** - * Name: mac802154_push_dataind - * - * Description: - * Push a data indication onto the list to be processed - * - ****************************************************************************/ - -static void mac802154_push_dataind(FAR struct ieee802154_privmac_s *priv, - FAR struct ieee802154_data_ind_s *ind) -{ - /* Ensure the forward link is NULL */ - - ind->flink = NULL; - - /* If the tail is not empty, make the frame pointed to by the tail, - * point to the new data indication */ - - if (priv->dataind_tail != NULL) - { - priv->dataind_tail->flink = ind; - } - - /* Point the tail at the new frame */ - - priv->dataind_tail = ind; - - /* If the head is NULL, we need to point it at the data indication since there - * is only one indication in the list at this point */ - - if (priv->dataind_head == NULL) - { - priv->dataind_head = ind; - } -} - -/**************************************************************************** - * Name: mac802154_pop_dataind - * - * Description: - * Pop a data indication from the list - * - ****************************************************************************/ - -static FAR struct ieee802154_data_ind_s * - mac802154_pop_dataind(FAR struct ieee802154_privmac_s *priv) -{ - FAR struct ieee802154_data_ind_s *ind; - - if (priv->dataind_head == NULL) - { - return NULL; - } - - /* Get the data indication from the head of the list */ - - ind = priv->dataind_head; - ind->flink = NULL; - - /* Move the head pointer to the next data indication */ - - priv->dataind_head = ind->flink; - - /* If the head is now NULL, the list is empty, so clear the tail too */ - - if (priv->dataind_head == NULL) - { - priv->dataind_tail = NULL; - } - - return ind; + return notif; } /**************************************************************************** @@ -518,7 +525,6 @@ static int mac802154_defaultmib(FAR struct ieee802154_privmac_s *priv) priv->trans_persisttime = 0x01F4; - /* Reset the Coordinator address */ priv->coordaddr.mode = IEEE802154_ADDRMODE_NONE; @@ -580,13 +586,15 @@ static int mac802154_applymib(FAR struct ieee802154_privmac_s *priv) ****************************************************************************/ static int mac802154_poll_csma(FAR const struct ieee802154_radiocb_s *radiocb, - FAR struct ieee802154_txdesc_s *tx_desc, + FAR struct ieee802154_txdesc_s **txdesc, FAR struct iob_s **frame) { FAR struct mac802154_radiocb_s *cb = (FAR struct mac802154_radiocb_s *)radiocb; FAR struct ieee802154_privmac_s *priv; - FAR struct mac802154_txframe_s *trans; + FAR struct mac802154_txtrans_s *trans; + FAR struct ieee802154_txdesc_s *desc; + FAR struct ieee802154_notif_s *notif; DEBUGASSERT(cb != NULL && cb->priv != NULL); priv = cb->priv; @@ -599,16 +607,41 @@ static int mac802154_poll_csma(FAR const struct ieee802154_radiocb_s *radiocb, /* Check to see if there are any CSMA transactions waiting */ - trans = mac802154_pop_csma(priv); + trans = (FAR struct mac802154_txtrans_s *)sq_remfirst(&priv->csma_queue); mac802154_givesem(&priv->exclsem); if (trans != NULL) { - /* Setup the transmit descriptor */ + /* Allocate a Tx descriptor to pass */ - tx_desc->handle = trans->msdu_handle; + desc = (FAR struct ieee802154_txdesc_s *)sq_remfirst(&priv->txdesc_queue); + if (desc == NULL) + { + wlerr("ERROR: Failed to allocate ieee802154_txdesc_s"); + goto errout; + } + + /* Allocate a notif struct (ie data confirmation struct) to pass with + * the tx descriptor. + */ + + notif = mac802154_notif_alloc(priv); + if (notif == NULL) + { + wlerr("ERROR: Failed to allocate ieee802154_notif_s"); + + /* Free the tx descriptor */ + + sq_addlast((FAR sq_entry_t *)desc, &priv->txdesc_queue); + goto errout; + } + + desc->conf = (FAR struct ieee802154_data_conf_s *)notif; + desc->conf->handle = trans->handle; + desc->frametype = trans->frametype; *frame = trans->frame; + *txdesc = desc; /* Now that we've passed off the data, notify the waiting thread. * NOTE: The transaction was allocated on the waiting thread's stack so @@ -619,6 +652,13 @@ static int mac802154_poll_csma(FAR const struct ieee802154_radiocb_s *radiocb, return (trans->frame->io_len); } +errout: + /* Need to set flag to tell MAC to retry notifying radio layer about transmit + * since we couldn't allocate the required data structures at this time. + */ + + priv->csma_tryagain = true; + mac802154_givesem(&priv->exclsem); return 0; } @@ -634,13 +674,14 @@ static int mac802154_poll_csma(FAR const struct ieee802154_radiocb_s *radiocb, ****************************************************************************/ static int mac802154_poll_gts(FAR const struct ieee802154_radiocb_s *radiocb, - FAR struct ieee802154_txdesc_s *tx_desc, + FAR struct ieee802154_txdesc_s **tx_desc, FAR struct iob_s **frame) { FAR struct mac802154_radiocb_s *cb = (FAR struct mac802154_radiocb_s *)radiocb; FAR struct ieee802154_privmac_s *priv; - FAR struct mac802154_txframe_s *trans; + FAR struct mac802154_txtrans_s *trans; + FAR struct ieee802154_txdesc_s *desc; int ret = 0; DEBUGASSERT(cb != NULL && cb->priv != NULL); @@ -657,6 +698,15 @@ static int mac802154_poll_gts(FAR const struct ieee802154_radiocb_s *radiocb, mac802154_givesem(&priv->exclsem); return 0; + +errout: + /* Need to set flag to tell MAC to retry notifying radio layer about transmit + * since we couldn't allocate the required data structures at this time. + */ + + priv->gts_tryagain = true; + mac802154_givesem(&priv->exclsem); + return 0; } /**************************************************************************** @@ -673,7 +723,7 @@ static int mac802154_poll_gts(FAR const struct ieee802154_radiocb_s *radiocb, ****************************************************************************/ static void mac802154_txdone(FAR const struct ieee802154_radiocb_s *radiocb, - FAR const struct ieee802154_txdesc_s *tx_desc) + FAR const struct ieee802154_txdesc_s *txdesc) { FAR struct mac802154_radiocb_s *cb = (FAR struct mac802154_radiocb_s *)radiocb; @@ -688,20 +738,7 @@ static void mac802154_txdone(FAR const struct ieee802154_radiocb_s *radiocb, while (mac802154_takesem(&priv->exclsem) != 0); - /* Check to see if there is an available tx descriptor slot. If there is - * not we simply drop the notification */ - - if (priv->txdesc_count < CONFIG_IEEE802154_NTXDESC) - { - /* Copy the txdesc over and link it into our list */ - - memcpy(&priv->txdesc[priv->txdesc_count++], tx_desc, - sizeof(struct ieee802154_txdesc_s)); - } - else - { - wlinfo("MAC802154: No room for TX Desc.\n"); - } + sq_addlast((FAR sq_entry_t *)txdesc, &priv->txdone_queue); mac802154_givesem(&priv->exclsem); @@ -728,7 +765,11 @@ static void mac802154_txdone_worker(FAR void *arg) { FAR struct ieee802154_privmac_s *priv = (FAR struct ieee802154_privmac_s *)arg; - int i = 0; + FAR struct ieee802154_txdesc_s *txdesc; + FAR struct ieee802154_data_conf_s *conf; + FAR struct ieee802154_notif_s *notif; + enum ieee802154_frametype_e frametype; + int count; /* Get exclusive access to the driver structure. We don't care about any * signals so if we see one, just go back to trying to get access again. @@ -736,20 +777,121 @@ static void mac802154_txdone_worker(FAR void *arg) while (mac802154_takesem(&priv->exclsem) != 0); - /* For each pending TX descriptor, send an application callback */ - - for (i = 0; i < priv->txdesc_count; i++) + while (1) { - priv->cb->mcps_notify(priv->cb, IEEE802154_NOTIFY_CONF_DATA, - (FAR const union ieee802154_mcps_notify_u *) &priv->txdesc[i]); + txdesc = (FAR struct ieee802154_txdesc_s *)sq_remfirst(&priv->txdone_queue); + + if (txdesc == NULL) + { + break; + } + + count++; + + /* Once we get the frametype and data confirmation struct, we can free + * the tx descriptor. + */ + + conf = txdesc->conf; + frametype = txdesc->frametype; + sq_addlast((FAR sq_entry_t *)txdesc, &priv->txdesc_queue); + + /* Cast the data_conf to a notification */ + + notif = (FAR struct ieee802154_notif_s *)conf; + + switch(frametype) + { + case IEEE802154_FRAME_DATA: + { + notif->notiftype = IEEE802154_NOTIFY_CONF_DATA; + + /* Release the MAC then call the callback */ + + mac802154_givesem(&priv->exclsem); + priv->cb->notify(priv->cb, notif); + } + break; + + case IEEE802154_FRAME_COMMAND: + { + mac802154_cmd_txdone(priv, txdesc); + + /* We can deallocate the data conf notification as it is no longer + * needed. We don't use the public function here since we already + * have the MAC locked. Additionally, we are already handling the + * tx_tryagain here, so we wouldn't want to handle it twice. + */ + + notif->flink = priv->notif_free; + priv->notif_free = notif; + mac802154_givesem(&priv->exclsem); + } + break; + + default: + { + mac802154_givesem(&priv->exclsem); + } + break; + + } } - /* We've handled all the descriptors and no further desc could have been added - * since we have the struct locked */ + /* If we've freed a tx descriptor or notification structure and a previous + * attempt at passing data to the radio layer failed due to insufficient + * available structures, try again now that we've freed some resources */ - priv->txdesc_count = 0; + if (count > 0 && priv->csma_tryagain) + { + priv->csma_tryagain = false; + priv->radio->ops->txnotify_csma(priv->radio); + } + + if (count > 0 && priv->gts_tryagain) + { + priv->gts_tryagain = false; + priv->radio->ops->txnotify_gts(priv->radio); + } +} - mac802154_givesem(&priv->exclsem); +/**************************************************************************** + * Name: mac802154_cmd_txdone + * + * Description: + * Called from mac802154_txdone_worker, this is a helper function for + * handling command frames that have either successfully sent or failed. + * + ****************************************************************************/ + +static void mac802154_cmd_txdone(FAR struct ieee802154_privmac_s *priv, + FAR struct ieee802154_txdesc_s *txdesc) +{ + + /* Check to see what type of command it was. All information about the command + * will still be valid because it is protected by a semaphore. + */ + + switch (priv->cmd.type) + { + case IEEE802154_CMD_ASSOC_REQ: + if(txdesc->conf->status != IEEE802154_STATUS_SUCCESS) + { + /* if the association request command cannot be sent due to a + * channel access failure, the MAC sublayer shall notify the next + * higher layer. [1] pg. 33 + */ + + + } + else + { + priv->cmd.txdone = true; + } + break; + default: + break; + } } /**************************************************************************** @@ -784,7 +926,7 @@ static void mac802154_rxframe(FAR const struct ieee802154_radiocb_s *radiocb, /* Push the iob onto the tail of the frame list for processing */ - mac802154_push_dataind(priv, ind); + sq_addlast((FAR sq_entry_t *)ind, &priv->dataind_queue); mac802154_givesem(&priv->exclsem); @@ -813,7 +955,6 @@ static void mac802154_rxframe_worker(FAR void *arg) FAR struct ieee802154_privmac_s *priv = (FAR struct ieee802154_privmac_s *)arg; FAR struct ieee802154_data_ind_s *ind; - union ieee802154_mcps_notify_u mcps_notify; FAR struct iob_s *frame; uint16_t *frame_ctrl; bool panid_comp; @@ -829,7 +970,7 @@ static void mac802154_rxframe_worker(FAR void *arg) /* Push the iob onto the tail of the frame list for processing */ - ind = mac802154_pop_dataind(priv); + ind = (FAR struct ieee802154_data_ind_s *)sq_remfirst(&priv->dataind_queue); if (ind == NULL) { @@ -932,11 +1073,9 @@ static void mac802154_rxframe_worker(FAR void *arg) * the frame, otherwise, throw it out. */ - if (priv->cb->mcps_notify != NULL) + if (priv->cb->rxframe != NULL) { - mcps_notify.dataind = ind; - priv->cb->mcps_notify(priv->cb, IEEE802154_NOTIFY_IND_DATA, - &mcps_notify); + priv->cb->rxframe(priv->cb, ind); } else { @@ -1009,6 +1148,15 @@ MACHANDLE mac802154_create(FAR struct ieee802154_radio_s *radiodev) sem_init(&mac->exclsem, 0, 1); + /* Allow exlusive access to the dedicated command transaction */ + + sem_init(&mac->cmd.sem, 0, 1); + + /* Setup the signaling semaphore for the dedicated command transaction */ + + sem_init(&mac->cmd.trans.sem, 0, 0); + sem_setprotocol(&mac->cmd.trans.sem, SEM_PRIO_NONE); + /* Initialize fields */ mac->radio = radiodev; @@ -1030,10 +1178,11 @@ MACHANDLE mac802154_create(FAR struct ieee802154_radio_s *radiodev) radiodev->ops->bind(radiodev, &mac->radiocb.cb); - /* Initialize our data indication pool */ + /* Initialize our various data pools */ ieee802154_indpool_initialize(); - + mac802154_resetqueues(mac); + return (MACHANDLE)mac; } @@ -1052,7 +1201,7 @@ MACHANDLE mac802154_create(FAR struct ieee802154_radio_s *radiodev) * ****************************************************************************/ -int mac802154_bind(MACHANDLE mac, FAR const struct ieee802154_maccb_s *cb) +int mac802154_bind(MACHANDLE mac, FAR const struct mac802154_maccb_s *cb) { FAR struct ieee802154_privmac_s *priv = (FAR struct ieee802154_privmac_s *)mac; @@ -1260,7 +1409,7 @@ int mac802154_get_mhrlen(MACHANDLE mac, * The MCPS-DATA.request primitive requests the transfer of a data SPDU * (i.e., MSDU) from a local SSCS entity to a single peer SSCS entity. * Confirmation is returned via the - * struct ieee802154_maccb_s->conf_data callback. + * struct mac802154_maccb_s->conf_data callback. * ****************************************************************************/ @@ -1270,7 +1419,7 @@ int mac802154_req_data(MACHANDLE mac, { FAR struct ieee802154_privmac_s *priv = (FAR struct ieee802154_privmac_s *)mac; - FAR struct mac802154_txframe_s trans; + FAR struct mac802154_txtrans_s trans; uint16_t *frame_ctrl; uint8_t mhr_len = 3; /* Start assuming frame control and seq. num */ int ret; @@ -1284,7 +1433,7 @@ int mac802154_req_data(MACHANDLE mac, /* Cast the first two bytes of the IOB to a uint16_t frame control field */ - frame_ctrl = (uint16_t *)&frame->io_data[0]; + frame_ctrl = (FAR uint16_t *)&frame->io_data[0]; /* Ensure we start with a clear frame control field */ @@ -1415,9 +1564,11 @@ int mac802154_req_data(MACHANDLE mac, /* Setup our transaction */ - trans.msdu_handle = meta->msdu_handle; + trans.handle = meta->msdu_handle; + trans.frametype = IEEE802154_FRAME_DATA; trans.frame = frame; - sem_init(&trans.sem, 0, 1); + sem_init(&trans.sem, 0, 0); + sem_setprotocol(&trans.sem, SEM_PRIO_NONE); /* If the TxOptions parameter specifies that a GTS transmission is required, * the MAC sublayer will determine whether it has a valid GTS as described @@ -1477,7 +1628,7 @@ int mac802154_req_data(MACHANDLE mac, { /* Link the transaction into the CSMA transaction list */ - mac802154_push_csma(priv, &trans); + sq_addlast((FAR sq_entry_t *)&trans, &priv->csma_queue); /* We no longer need to have the MAC layer locked. */ @@ -1505,7 +1656,7 @@ int mac802154_req_data(MACHANDLE mac, * Description: * The MCPS-PURGE.request primitive allows the next higher layer to purge * an MSDU from the transaction queue. Confirmation is returned via - * the struct ieee802154_maccb_s->conf_purge callback. + * the struct mac802154_maccb_s->conf_purge callback. * * NOTE: The standard specifies that confirmation should be indicated via * the asynchronous MLME-PURGE.confirm primitve. However, in our @@ -1528,7 +1679,7 @@ int mac802154_req_purge(MACHANDLE mac, uint8_t msdu_handle) * Description: * The MLME-ASSOCIATE.request primitive allows a device to request an * association with a coordinator. Confirmation is returned via the - * struct ieee802154_maccb_s->conf_associate callback. + * struct mac802154_maccb_s->conf_associate callback. * ****************************************************************************/ @@ -1537,31 +1688,213 @@ int mac802154_req_associate(MACHANDLE mac, { FAR struct ieee802154_privmac_s *priv = (FAR struct ieee802154_privmac_s *)mac; + FAR struct mac802154_txtrans_s trans; + FAR struct iob_s *iob; + FAR uint16_t *u16; + bool rxonidle; + int ret; - /* Set the channel of the PHY layer */ - - /* Set the channel page of the PHY layer */ - - /* Set the macPANId */ - - /* Set either the macCoordExtendedAddress and macCoordShortAddress - * depending on the CoordAddrMode in the primitive. + /* On receipt of the MLME-ASSOCIATE.request primitive, the MLME of an + * unassociated device first updates the appropriate PHY and MAC PIB + * attributes, as described in 5.1.3.1, and then generates an association + * request command, as defined in 5.3.1 [1] pg.80 */ - if (req->coord_addr.mode == IEEE802154_ADDRMODE_EXTENDED) - { + /* Get exlusive access to the shared command transaction. This must happen + * before getting exclusive access to the MAC struct or else there could be + * a lockup condition. This would occur if another thread is using the cmdtrans + * but needs access to the MAC in order to unlock it. + */ + if (sem_wait(&priv->cmd.sem) < 0) + { + /* EINTR is the only error that we expect */ + + int errcode = get_errno(); + DEBUGASSERT(errcode == EINTR); + return -errcode; } - else if (req->coord_addr.mode == IEEE802154_ADDRMODE_EXTENDED) - { + /* Get exclusive access to the MAC */ + + ret = mac802154_takesem(&priv->exclsem); + if (ret < 0) + { + wlerr("ERROR: mac802154_takesem failed: %d\n", ret); + return ret; + } + + /* Set the channel and channel page of the PHY layer */ + + priv->radio->ops->set_attr(priv->radio, IEEE802154_PIB_PHY_CURRENT_CHANNEL, + (FAR const union ieee802154_attr_u *)&req->chnum); + + priv->radio->ops->set_attr(priv->radio, IEEE802154_PIB_PHY_CURRENT_PAGE, + (FAR const union ieee802154_attr_u *)&req->chpage); + + /* Set the PANID attribute */ + + priv->addr.panid = req->coordaddr.panid; + priv->coordaddr.panid = req->coordaddr.panid; + priv->radio->ops->set_attr(priv->radio, IEEE802154_PIB_MAC_PANID, + (FAR const union ieee802154_attr_u *)&req->coordaddr.panid); + + /* Set the coordinator address attributes */ + + priv->coordaddr.mode = req->coordaddr.mode; + + if (priv->coordaddr.mode == IEEE802154_ADDRMODE_SHORT) + { + priv->coordaddr.saddr = req->coordaddr.saddr; + memcpy(&priv->coordaddr.eaddr[0], IEEE802154_EADDR_UNSPEC, + IEEE802154_EADDR_LEN); + } + else if (priv->coordaddr.mode == IEEE802154_ADDRMODE_EXTENDED) + { + priv->coordaddr.saddr = IEEE802154_SADDR_UNSPEC; + memcpy(&priv->coordaddr.eaddr[0], &req->coordaddr.eaddr[0], + IEEE802154_EADDR_LEN); } else + { + ret = -EINVAL; + goto errout; + } + + /* Copy in the capabilities information bitfield */ + + priv->devmode = (req->capabilities.devtype) ? + IEEE802154_DEVMODE_COORD : IEEE802154_DEVMODE_ENDPOINT; + + /* Unlike other attributes, we can't simply cast this one since it is a bit + * in a bitfield. Casting it will give us unpredicatble results. Instead + * of creating a ieee802154_attr_u, we use a local bool. Allocating the + * ieee802154_attr_u value would take up more room on the stack since it is + * as large as the largest attribute type. + */ + + rxonidle = req->capabilities.rxonidle; + priv->radio->ops->set_attr(priv->radio, IEEE802154_PIB_MAC_RX_ON_WHEN_IDLE, + (FAR const union ieee802154_attr_u *)&rxonidle); + + /* Allocate an IOB to put the frame in */ + + iob = iob_alloc(false); + DEBUGASSERT(iob != NULL); + + iob->io_flink = NULL; + iob->io_len = 0; + iob->io_offset = 0; + iob->io_pktlen = 0; + + /* Get a uin16_t reference to the first two bytes. ie frame control field */ + + u16 = (FAR uint16_t *)&iob->io_data[0]; + + *u16 = (IEEE802154_FRAME_COMMAND << IEEE802154_FRAMECTRL_SHIFT_FTYPE); + *u16 |= IEEE802154_FRAMECTRL_ACKREQ; + *u16 |= (priv->coordaddr.mode << IEEE802154_FRAMECTRL_SHIFT_DADDR); + *u16 |= (IEEE802154_ADDRMODE_EXTENDED << IEEE802154_FRAMECTRL_SHIFT_SADDR); + + iob->io_len = 2; + + /* Each time a data or a MAC command frame is generated, the MAC sublayer + * shall copy the value of macDSN into the Sequence Number field of the MHR + * of the outgoing frame and then increment it by one. [1] pg. 40. + */ + + iob->io_data[iob->io_len++] = priv->dsn++; + + /* The Destination PAN Identifier field shall contain the identifier of the + * PAN to which to associate. [1] pg. 68 + */ + + memcpy(&iob->io_data[iob->io_len], &priv->coordaddr.panid, 2); + + /* The Destination Address field shall contain the address from the beacon + * frame that was transmitted by the coordinator to which the association + * request command is being sent. [1] pg. 68 + */ + + if (priv->coordaddr.mode == IEEE802154_ADDRMODE_SHORT) { - return -EINVAL; + memcpy(&iob->io_data[iob->io_len], &priv->coordaddr.saddr, 2); + iob->io_len += 2; + } + else if (priv->coordaddr.mode == IEEE802154_ADDRMODE_EXTENDED) + { + memcpy(&iob->io_data[iob->io_len], &priv->coordaddr.eaddr[0], + IEEE802154_EADDR_LEN); + iob->io_len += IEEE802154_EADDR_LEN; + } + + /* The Source PAN Identifier field shall contain the broadcast PAN identifier.*/ + + u16 = (uint16_t *)&iob->io_data[iob->io_len]; + *u16 = IEEE802154_SADDR_BCAST; + iob->io_len += 2; + + /* The Source Address field shall contain the value of macExtendedAddress. */ + + memcpy(&iob->io_data[iob->io_len], &priv->addr.eaddr[0], + IEEE802154_EADDR_LEN); + iob->io_len += IEEE802154_EADDR_LEN; + + /* Copy in the Command Frame Identifier */ + + iob->io_data[iob->io_len++] = IEEE802154_CMD_ASSOC_REQ; + + /* Copy in the capability information bits */ + + iob->io_data[iob->io_len] = 0; + iob->io_data[iob->io_len] |= (req->capabilities.devtype << + IEEE802154_CAPABILITY_SHIFT_DEVTYPE); + iob->io_data[iob->io_len] |= (req->capabilities.powersource << + IEEE802154_CAPABILITY_SHIFT_PWRSRC); + iob->io_data[iob->io_len] |= (req->capabilities.rxonidle << + IEEE802154_CAPABILITY_SHIFT_RXONIDLE); + iob->io_data[iob->io_len] |= (req->capabilities.security << + IEEE802154_CAPABILITY_SHIFT_SECURITY); + iob->io_data[iob->io_len] |= (req->capabilities.allocaddr << + IEEE802154_CAPABILITY_SHIFT_ALLOCADDR); + + iob->io_len++; + + /* Copy reference to the frame into the shared command transaction */ + + priv->cmd.trans.frame = iob; + priv->cmd.trans.frametype = IEEE802154_FRAME_COMMAND; + priv->cmd.type = IEEE802154_CMD_ASSOC_REQ; + + /* Link the transaction into the CSMA transaction list */ + + sq_addlast((FAR sq_entry_t *)&trans, &priv->csma_queue); + + /* We no longer need to have the MAC layer locked. */ + + mac802154_givesem(&priv->exclsem); + + /* TODO: Need to setup a timeout here so that we can return an error to the + * user if the device never receives a response. + */ + + /* Notify the radio driver that there is data available */ + + priv->radio->ops->txnotify_csma(priv->radio); + + /* Wait for the transaction to be passed to the radio layer */ + + ret = sem_wait(&priv->cmd.trans.sem); + if (ret < 0) + { + return -EINTR; } - return -ENOTTY; + return OK; + +errout: + mac802154_givesem(&priv->exclsem); + return ret; } /**************************************************************************** @@ -1572,7 +1905,7 @@ int mac802154_req_associate(MACHANDLE mac, * notify the coordinator of its intent to leave the PAN. It is also used by * the coordinator to instruct an associated device to leave the PAN. * Confirmation is returned via the - * struct ieee802154_maccb_s->conf_disassociate callback. + * struct mac802154_maccb_s->conf_disassociate callback. * ****************************************************************************/ @@ -1584,7 +1917,6 @@ int mac802154_req_disassociate(MACHANDLE mac, return -ENOTTY; } - /**************************************************************************** * Name: mac802154_req_gts * @@ -1592,7 +1924,7 @@ int mac802154_req_disassociate(MACHANDLE mac, * The MLME-GTS.request primitive allows a device to send a request to the PAN * coordinator to allocate a new GTS or to deallocate an existing GTS. * Confirmation is returned via the - * struct ieee802154_maccb_s->conf_gts callback. + * struct mac802154_maccb_s->conf_gts callback. * ****************************************************************************/ @@ -1636,7 +1968,7 @@ int mac802154_req_reset(MACHANDLE mac, bool rst_pibattr) * The MLME-RX-ENABLE.request primitive allows the next higher layer to * request that the receiver is enable for a finite period of time. * Confirmation is returned via the - * struct ieee802154_maccb_s->conf_rxenable callback. + * struct mac802154_maccb_s->conf_rxenable callback. * ****************************************************************************/ @@ -1657,7 +1989,7 @@ int mac802154_req_rxenable(MACHANDLE mac, * energy on the channel, search for the coordinator with which it associated, * or search for all coordinators transmitting beacon frames within the POS of * the scanning device. Scan results are returned - * via MULTIPLE calls to the struct ieee802154_maccb_s->conf_scan callback. + * via MULTIPLE calls to the struct mac802154_maccb_s->conf_scan callback. * This is a difference with the official 802.15.4 specification, implemented * here to save memory. * @@ -1750,7 +2082,7 @@ int mac802154_req_set(MACHANDLE mac, enum ieee802154_pib_attr_e pib_attr, * Description: * The MLME-START.request primitive makes a request for the device to start * using a new superframe configuration. Confirmation is returned - * via the struct ieee802154_maccb_s->conf_start callback. + * via the struct mac802154_maccb_s->conf_start callback. * ****************************************************************************/ @@ -1842,6 +2174,8 @@ int mac802154_req_start(MACHANDLE mac, FAR struct ieee802154_start_req_s *req) return -ENOTTY; } + mac802154_givesem(&priv->exclsem); + return OK; errout: @@ -1856,7 +2190,7 @@ errout: * The MLME-SYNC.request primitive requests to synchronize with the * coordinator by acquiring and, if specified, tracking its beacons. * Confirmation is returned via the - * struct ieee802154_maccb_s->int_commstatus callback. TOCHECK. + * struct mac802154_maccb_s->int_commstatus callback. TOCHECK. * ****************************************************************************/ @@ -1873,8 +2207,8 @@ int mac802154_req_sync(MACHANDLE mac, FAR struct ieee802154_sync_req_s *req) * Description: * The MLME-POLL.request primitive prompts the device to request data from * the coordinator. Confirmation is returned via the - * struct ieee802154_maccb_s->conf_poll callback, followed by a - * struct ieee802154_maccb_s->ind_data callback. + * struct mac802154_maccb_s->conf_poll callback, followed by a + * struct mac802154_maccb_s->ind_data callback. * ****************************************************************************/ @@ -1919,3 +2253,42 @@ int mac802154_resp_orphan(MACHANDLE mac, return -ENOTTY; } +/**************************************************************************** + * Name: mac802154_notif_free + * + * Description: + * When the MAC calls the registered callback, it passes a reference + * to a mac802154_notify_s structure. This structure needs to be freed + * after the callback handler is done using it. + * + ****************************************************************************/ + +int mac802154_notif_free(MACHANDLE mac, + FAR struct ieee802154_notif_s *notif) +{ + FAR struct ieee802154_privmac_s *priv = + (FAR struct ieee802154_privmac_s *)mac; + + /* Get exclusive access to the MAC */ + + while(mac802154_takesem(&priv->exclsem) < 0); + + notif->flink = priv->notif_free; + priv->notif_free = notif; + + mac802154_givesem(&priv->exclsem); + + if (priv->csma_tryagain) + { + priv->csma_tryagain = false; + priv->radio->ops->txnotify_csma(priv->radio); + } + + if (priv->gts_tryagain) + { + priv->gts_tryagain = false; + priv->radio->ops->txnotify_gts(priv->radio); + } + + return -ENOTTY; +} diff --git a/wireless/ieee802154/mac802154.h b/wireless/ieee802154/mac802154.h index 168bc33cf23..2e8110f755a 100644 --- a/wireless/ieee802154/mac802154.h +++ b/wireless/ieee802154/mac802154.h @@ -54,6 +54,26 @@ #include +/**************************************************************************** + * Public Data Types + ****************************************************************************/ + + + +/* Callback operations to notify the next highest layer of various asynchronous + * events, usually triggered by some previous request or response invoked by the + * upper layer. + */ + +struct mac802154_maccb_s +{ + CODE void (*notify)(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_notif_s *notif); + + CODE void (*rxframe)(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_data_ind_s *ind); +}; + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ @@ -75,7 +95,7 @@ struct iob_s; /* Forward reference */ * ****************************************************************************/ -int mac802154_bind(MACHANDLE mac, FAR const struct ieee802154_maccb_s *cb); +int mac802154_bind(MACHANDLE mac, FAR const struct mac802154_maccb_s *cb); /**************************************************************************** * Name: mac802154_ioctl @@ -117,7 +137,7 @@ int mac802154_get_mhrlen(MACHANDLE mac, * The MCPS-DATA.request primitive requests the transfer of a data SPDU * (i.e., MSDU) from a local SSCS entity to a single peer SSCS entity. * Confirmation is returned via the - * struct ieee802154_maccb_s->conf_data callback. + * struct mac802154_maccb_s->conf_data callback. * ****************************************************************************/ @@ -131,7 +151,7 @@ int mac802154_req_data(MACHANDLE mac, * Description: * The MCPS-PURGE.request primitive allows the next higher layer to purge * an MSDU from the transaction queue. Confirmation is returned via - * the struct ieee802154_maccb_s->conf_purge callback. + * the struct mac802154_maccb_s->conf_purge callback. * * NOTE: The standard specifies that confirmation should be indicated via * the asynchronous MLME-PURGE.confirm primitve. However, in our @@ -149,7 +169,7 @@ int mac802154_req_purge(MACHANDLE mac, uint8_t msdu_handle); * Description: * The MLME-ASSOCIATE.request primitive allows a device to request an * association with a coordinator. Confirmation is returned via the - * struct ieee802154_maccb_s->conf_associate callback. + * struct mac802154_maccb_s->conf_associate callback. * ****************************************************************************/ @@ -166,7 +186,7 @@ int mac802154_req_associate(MACHANDLE mac, * PAN. * * Confirmation is returned via the - * struct ieee802154_maccb_s->conf_disassociate callback. + * struct mac802154_maccb_s->conf_disassociate callback. * ****************************************************************************/ @@ -180,7 +200,7 @@ int mac802154_req_disassociate(MACHANDLE mac, * The MLME-GTS.request primitive allows a device to send a request to the * PAN coordinator to allocate a new GTS or to deallocate an existing GTS. * Confirmation is returned via the - * struct ieee802154_maccb_s->conf_gts callback. + * struct mac802154_maccb_s->conf_gts callback. * ****************************************************************************/ @@ -214,7 +234,7 @@ int mac802154_req_reset(MACHANDLE mac, bool rst_pibattr); * The MLME-RX-ENABLE.request primitive allows the next higher layer to * request that the receiver is enable for a finite period of time. * Confirmation is returned via the - * struct ieee802154_maccb_s->conf_rxenable callback. + * struct mac802154_maccb_s->conf_rxenable callback. * ****************************************************************************/ @@ -230,7 +250,7 @@ int mac802154_req_rxenable(MACHANDLE mac, * the energy on the channel, search for the coordinator with which it * associated, or search for all coordinators transmitting beacon frames * within the POS of the scanning device. Scan results are returned - * via MULTIPLE calls to the struct ieee802154_maccb_s->conf_scan + * via MULTIPLE calls to the struct mac802154_maccb_s->conf_scan * callback. This is a difference with the official 802.15.4 * specification, implemented here to save memory. * @@ -280,7 +300,7 @@ int mac802154_req_set(MACHANDLE mac, enum ieee802154_pib_attr_e pib_attr, * Description: * The MLME-START.request primitive makes a request for the device to * start using a new superframe configuration. Confirmation is returned - * via the struct ieee802154_maccb_s->conf_start callback. + * via the struct mac802154_maccb_s->conf_start callback. * ****************************************************************************/ @@ -293,7 +313,7 @@ int mac802154_req_start(MACHANDLE mac, FAR struct ieee802154_start_req_s *req); * The MLME-SYNC.request primitive requests to synchronize with the * coordinator by acquiring and, if specified, tracking its beacons. * Confirmation is returned via the - * struct ieee802154_maccb_s->int_commstatus callback. TOCHECK. + * struct mac802154_maccb_s->int_commstatus callback. TOCHECK. * ****************************************************************************/ @@ -305,8 +325,8 @@ int mac802154_req_sync(MACHANDLE mac, FAR struct ieee802154_sync_req_s *req); * Description: * The MLME-POLL.request primitive prompts the device to request data from * the coordinator. Confirmation is returned via the - * struct ieee802154_maccb_s->conf_poll callback, followed by a - * struct ieee802154_maccb_s->ind_data callback. + * struct mac802154_maccb_s->conf_poll callback, followed by a + * struct mac802154_maccb_s->ind_data callback. * ****************************************************************************/ @@ -336,6 +356,18 @@ int mac802154_resp_associate(MACHANDLE mac, int mac802154_resp_orphan(MACHANDLE mac, FAR struct ieee802154_orphan_resp_s *resp); +/**************************************************************************** + * Name: mac802154_notif_free + * + * Description: + * When the MAC calls the registered callback, it passes a reference + * to a mac802154_notify_s structure. This structure needs to be freed + * after the callback handler is done using it. + * + ****************************************************************************/ + +int mac802154_notif_free(MACHANDLE mac, + FAR struct ieee802154_notif_s *notif); #undef EXTERN #ifdef __cplusplus diff --git a/wireless/ieee802154/mac802154_device.c b/wireless/ieee802154/mac802154_device.c index 309ca2c99c5..a41ff240bf6 100644 --- a/wireless/ieee802154/mac802154_device.c +++ b/wireless/ieee802154/mac802154_device.c @@ -83,22 +83,11 @@ struct mac802154dev_open_s volatile bool md_closing; }; -struct mac802154dev_dwait_s -{ - uint8_t mw_handle; /* The msdu handle identifying the frame */ - sem_t mw_sem; /* The semaphore used to signal the completion */ - int mw_status; /* The success/error of the transaction */ - - /* Supports a singly linked list */ - - FAR struct mac802154dev_dwait_s *mw_flink; -}; - struct mac802154dev_callback_s { /* This holds the information visible to the MAC layer */ - struct ieee802154_maccb_s mc_cb; /* Interface understood by the MAC layer */ + struct mac802154_maccb_s mc_cb; /* Interface understood by the MAC layer */ FAR struct mac802154_chardevice_s *mc_priv; /* Our priv data */ }; @@ -108,31 +97,33 @@ struct mac802154_chardevice_s struct mac802154dev_callback_s md_cb; /* Callback information */ sem_t md_exclsem; /* Exclusive device access */ - bool readpending; /* Is there a read using the semaphore? */ - sem_t readsem; /* Signaling semaphore for waiting read */ + /* Hold a list of events */ + + bool enableevents : 1; /* Are events enabled? */ + bool geteventpending : 1; /* Is there a get event using the semaphore? */ + sem_t geteventsem; /* Signaling semaphore for waiting get event */ + FAR struct ieee802154_notif_s *event_head; + FAR struct ieee802154_notif_s *event_tail; /* The following is a singly linked list of open references to the * MAC device. */ FAR struct mac802154dev_open_s *md_open; - FAR struct mac802154dev_dwait_s *md_dwait; /* Hold a list of transactions as a "readahead" buffer */ - FAR struct ieee802154_data_ind_s *dataind_head; - FAR struct ieee802154_data_ind_s *dataind_tail; + bool readpending; /* Is there a read using the semaphore? */ + sem_t readsem; /* Signaling semaphore for waiting read */ + sq_queue_t dataind_queue; #ifndef CONFIG_DISABLE_SIGNALS - /* MCPS Service notification information */ + /* MAC Service notification information */ - struct mac802154dev_notify_s md_mcps_notify; - pid_t md_mcps_pid; + bool notify_registered; + struct mac802154dev_notify_s md_notify; + pid_t md_notify_pid; - /* MLME Service notification information */ - - struct mac802154dev_notify_s md_mlme_notify; - pid_t md_mlme_pid; #endif }; @@ -145,19 +136,16 @@ struct mac802154_chardevice_s static inline int mac802154dev_takesem(sem_t *sem); #define mac802154dev_givesem(s) sem_post(s); -static void mac802154dev_push_dataind(FAR struct mac802154_chardevice_s *dev, - FAR struct ieee802154_data_ind_s *ind); -static FAR struct ieee802154_data_ind_s * - mac802154dev_pop_dataind(FAR struct mac802154_chardevice_s *dev); +static inline void mac802154dev_pushevent(FAR struct mac802154_chardevice_s *dev, + FAR struct ieee802154_notif_s *notif); +static inline FAR struct ieee802154_notif_s * + mac802154dev_popevent(FAR struct mac802154_chardevice_s *dev); +static void mac802154dev_notify(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_notif_s *notif); -static void mac802154dev_mlme_notify(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mlme_notify_u *arg); - -static void mac802154dev_mcps_notify(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mcps_notify_u *arg); +static void mac802154dev_rxframe(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_data_ind_s *ind); static int mac802154dev_open(FAR struct file *filep); static int mac802154dev_close(FAR struct file *filep); @@ -168,13 +156,6 @@ static ssize_t mac802154dev_write(FAR struct file *filep, static int mac802154dev_ioctl(FAR struct file *filep, int cmd, unsigned long arg); -/* MAC callback helpers */ - -static void mac802154dev_conf_data(FAR struct mac802154_chardevice_s *dev, - FAR const struct ieee802154_data_conf_s *conf); -static void mac802154dev_ind_data(FAR struct mac802154_chardevice_s *dev, - FAR struct ieee802154_data_ind_s *ind); - /**************************************************************************** * Private Data ****************************************************************************/ @@ -224,76 +205,60 @@ static inline int mac802154dev_takesem(sem_t *sem) } /**************************************************************************** - * Name: mac802154dev_push_dataind + * Name: mac802154dev_pushevent * * Description: - * Push a data indication onto the list to be processed + * Push event onto the event queue + * + * Assumptions: + * Called with the char device struct locked. * ****************************************************************************/ -static void mac802154dev_push_dataind(FAR struct mac802154_chardevice_s *dev, - FAR struct ieee802154_data_ind_s *ind) +static inline void mac802154dev_pushevent(FAR struct mac802154_chardevice_s *dev, + FAR struct ieee802154_notif_s *notif) { - /* Ensure the forward link is NULL */ - - ind->flink = NULL; - - /* If the tail is not empty, make the frame pointed to by the tail, - * point to the new data indication */ - - if (dev->dataind_tail != NULL) + notif->flink = NULL; + if (!dev->event_head) { - dev->dataind_tail->flink = ind; + dev->event_head = notif; + dev->event_tail = notif; } - - /* Point the tail at the new frame */ - - dev->dataind_tail = ind; - - /* If the head is NULL, we need to point it at the data indication since there - * is only one indication in the list at this point */ - - if (dev->dataind_head == NULL) + else { - dev->dataind_head = ind; + dev->event_tail->flink = notif; + dev->event_tail = notif; } } /**************************************************************************** - * Name: mac802154dev_pop_dataind + * Name: mac802154dev_popevent * * Description: - * Pop a data indication from the list + * Pop an event off of the event queue + * + * Assumptions: + * Called with the char device struct locked. * ****************************************************************************/ -static FAR struct ieee802154_data_ind_s * - mac802154dev_pop_dataind(FAR struct mac802154_chardevice_s *dev) +static inline FAR struct ieee802154_notif_s * + mac802154dev_popevent(FAR struct mac802154_chardevice_s *dev) { - FAR struct ieee802154_data_ind_s *ind; + FAR struct ieee802154_notif_s *notif = dev->event_head; - if (dev->dataind_head == NULL) + if (notif) { - return NULL; + dev->event_head = notif->flink; + if (!dev->event_head) + { + dev->event_head = NULL; + } + + notif->flink = NULL; } - /* Get the data indication from the head of the list */ - - ind = dev->dataind_head; - ind->flink = NULL; - - /* Move the head pointer to the next data indication */ - - dev->dataind_head = ind->flink; - - /* If the head is now NULL, the list is empty, so clear the tail too */ - - if (dev->dataind_head == NULL) - { - dev->dataind_tail = NULL; - } - - return ind; + return notif; } /**************************************************************************** @@ -383,7 +348,7 @@ static int mac802154dev_close(FAR struct file *filep) * * This is actually a pretty feeble attempt to handle this. The * improbable race condition occurs if two different threads try to - * close the joystick driver at the same time. The rule: don't do + * close the driver at the same time. The rule: don't do * that! It is feeble because we do not really enforce stale pointer * detection anyway. */ @@ -437,6 +402,23 @@ static int mac802154dev_close(FAR struct file *filep) /* And free the open structure */ kmm_free(opriv); + + /* If there are now no open instances of the driver and a signal handler is + * not registered, purge the list of events. + */ + + if (dev->md_open) + { + FAR struct ieee802154_notif_s *notif; + + while (dev->event_head != NULL) + { + notif = mac802154dev_popevent(dev); + DEBUGASSERT(notif != NULL); + mac802154_notif_free(dev->md_mac, notif); + } + } + ret = OK; errout_with_exclsem: @@ -491,7 +473,7 @@ static ssize_t mac802154dev_read(FAR struct file *filep, FAR char *buffer, /* Try popping a data indication off the list */ - ind = mac802154dev_pop_dataind(dev); + ind = (FAR struct ieee802154_data_ind_s *)sq_remfirst(&dev->dataind_queue); /* If the indication is not null, we can exit the loop and copy the data */ @@ -522,11 +504,7 @@ static ssize_t mac802154dev_read(FAR struct file *filep, FAR char *buffer, if (sem_wait(&dev->readsem) < 0) { DEBUGASSERT(errno == EINTR); - /* Need to get exclusive access again to change the pending bool */ - - ret = mac802154dev_takesem(&dev->md_exclsem); dev->readpending = false; - mac802154dev_givesem(&dev->md_exclsem); return -EINTR; } @@ -571,7 +549,6 @@ static ssize_t mac802154dev_write(FAR struct file *filep, FAR struct mac802154_chardevice_s *dev; FAR struct mac802154dev_txframe_s *tx; FAR struct iob_s *iob; - struct mac802154dev_dwait_s dwait; int ret; DEBUGASSERT(filep && filep->f_inode); @@ -579,7 +556,7 @@ static ssize_t mac802154dev_write(FAR struct file *filep, DEBUGASSERT(inode->i_private); dev = (FAR struct mac802154_chardevice_s *)inode->i_private; - /* Check if the struct is write */ + /* Check if the struct is the correct size */ if (len != sizeof(struct mac802154dev_txframe_s)) { @@ -618,38 +595,6 @@ static ssize_t mac802154dev_write(FAR struct file *filep, iob->io_len += tx->length; - /* If this is a blocking operation, we need to setup a wait struct so we - * can unblock when the packet transmission has finished. If this is a - * non-blocking write, we pass off the data and then move along. Technically - * we stil have to wait for the transaction to get put into the buffer, but we - * won't wait for the transaction to actually finish. */ - - if (!(filep->f_oflags & O_NONBLOCK)) - { - /* Get exclusive access to the driver structure */ - - ret = mac802154dev_takesem(&dev->md_exclsem); - if (ret < 0) - { - wlerr("ERROR: mac802154dev_takesem failed: %d\n", ret); - return ret; - } - - /* Setup the wait struct */ - - dwait.mw_handle = tx->meta.msdu_handle; - - /* Link the wait struct */ - - dwait.mw_flink = dev->md_dwait; - dev->md_dwait = &dwait; - - sem_init(&dwait.mw_sem, 0, 0); - sem_setprotocol(&dwait.mw_sem, SEM_PRIO_NONE); - - mac802154dev_givesem(&dev->md_exclsem); - } - /* Pass the request to the MAC layer */ ret = mac802154_req_data(dev->md_mac, &tx->meta, iob); @@ -659,28 +604,6 @@ static ssize_t mac802154dev_write(FAR struct file *filep, return ret; } - if (!(filep->f_oflags & O_NONBLOCK)) - { - /* Wait for the DATA.confirm callback to be called for our handle */ - - if (sem_wait(&dwait.mw_sem) < 0) - { - /* This should only happen if the wait was canceled by an signal */ - - sem_destroy(&dwait.mw_sem); - DEBUGASSERT(errno == EINTR); - return -EINTR; - } - - /* The unlinking of the wait struct happens inside the callback. This - * is more efficient since it will already have to find the struct in - * the list in order to perform the sem_post. - */ - - sem_destroy(&dwait.mw_sem); - return dwait.mw_status; - } - return OK; } @@ -688,7 +611,7 @@ static ssize_t mac802154dev_write(FAR struct file *filep, * Name: mac802154dev_ioctl * * Description: - * Control the MAC layer via MLME IOCTL commands. + * Control the MAC layer via IOCTL commands. * ****************************************************************************/ @@ -728,7 +651,7 @@ static int mac802154dev_ioctl(FAR struct file *filep, int cmd, * failure with the errno value set appropriately. */ - case MAC802154IOC_MLME_REGISTER: + case MAC802154IOC_NOTIFY_REGISTER: { FAR struct mac802154dev_notify_s *notify = (FAR struct mac802154dev_notify_s *)((uintptr_t)arg); @@ -737,38 +660,101 @@ static int mac802154dev_ioctl(FAR struct file *filep, int cmd, { /* Save the notification events */ - dev->md_mlme_notify.mn_signo = notify->mn_signo; - dev->md_mlme_pid = getpid(); + dev->md_notify.mn_signo = notify->mn_signo; + dev->md_notify_pid = getpid(); + dev->notify_registered = true; - return OK; + ret = OK; } - } - break; - - case MAC802154IOC_MCPS_REGISTER: - { - FAR struct mac802154dev_notify_s *notify = - (FAR struct mac802154dev_notify_s *)((uintptr_t)arg); - - if (notify) + else { - /* Save the notification events */ - - dev->md_mcps_notify.mn_signo = notify->mn_signo; - dev->md_mcps_pid = getpid(); - - return OK; + ret = -EINVAL; } } break; #endif + + case MAC802154IOC_GET_EVENT: + { + FAR struct ieee802154_notif_s *usr_notif = + (FAR struct ieee802154_notif_s *)((uintptr_t)arg); + FAR struct ieee802154_notif_s *notif; + + while (1) + { + /* Try popping an event off the queue */ + + notif = mac802154dev_popevent(dev); + + /* If there was an event to pop off, copy it into the user data and + * free it from the MAC layer's memory. + */ + + if (notif != NULL) + { + memcpy(usr_notif, notif, sizeof(struct ieee802154_notif_s)); + + /* Free the notification */ + + mac802154_notif_free(dev->md_mac, notif); + + ret = OK; + break; + } + + /* If this is a non-blocking call, or if there is another getevent + * operation already pending, don't block. This driver returns + * EAGAIN even when configured as non-blocking if another getevent + * operation is already pending This situation should be rare. + * It will only occur when there are 2 calls from separate threads + * and there was no events in the queue. + */ + + if ((filep->f_oflags & O_NONBLOCK) || dev->geteventpending) + { + ret = -EAGAIN; + break; + } + + dev->geteventpending = true; + mac802154dev_givesem(&dev->md_exclsem); + + /* Wait to be signaled when an event is queued */ + + if (sem_wait(&dev->geteventsem) < 0) + { + DEBUGASSERT(errno == EINTR); + dev->geteventpending = false; + return -EINTR; + } + + /* Get exclusive access again, then loop back around and try and + * pop an event off the queue + */ + + ret = mac802154dev_takesem(&dev->md_exclsem); + if (ret < 0) + { + wlerr("ERROR: mac802154dev_takesem failed: %d\n", ret); + return ret; + } + } + } + break; + + case MAC802154IOC_ENABLE_EVENTS: + { + dev->enableevents = (bool)arg; + ret = OK; + } + break; + default: { /* Forward any unrecognized commands to the MAC layer */ - mac802154_ioctl(dev->md_mac, cmd, arg); + ret = mac802154_ioctl(dev->md_mac, cmd, arg); } - break; } @@ -776,9 +762,8 @@ static int mac802154dev_ioctl(FAR struct file *filep, int cmd, return ret; } -static void mac802154dev_mlme_notify(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mlme_notify_u *arg) +static void mac802154dev_notify(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_notif_s *notif) { FAR struct mac802154dev_callback_s *cb = (FAR struct mac802154dev_callback_s *)maccb; @@ -787,108 +772,70 @@ static void mac802154dev_mlme_notify(FAR const struct ieee802154_maccb_s *maccb, DEBUGASSERT(cb != NULL && cb->mc_priv != NULL); dev = cb->mc_priv; - switch (notif) - { -#warning Handle MLME notifications - default: - break; - } -} - -static void mac802154dev_mcps_notify(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mcps_notify_u *arg) -{ - FAR struct mac802154dev_callback_s *cb = - (FAR struct mac802154dev_callback_s *)maccb; - FAR struct mac802154_chardevice_s *dev; - - DEBUGASSERT(cb != NULL && cb->mc_priv != NULL); - dev = cb->mc_priv; - - switch (notif) - { - case IEEE802154_NOTIFY_CONF_DATA: - { - mac802154dev_conf_data(dev, &arg->dataconf); - } - break; - case IEEE802154_NOTIFY_IND_DATA: - { - mac802154dev_ind_data(dev, arg->dataind); - } - break; - default: - break; - } -} - -static void mac802154dev_conf_data(FAR struct mac802154_chardevice_s *dev, - FAR const struct ieee802154_data_conf_s *conf) -{ - FAR struct mac802154dev_dwait_s *curr; - FAR struct mac802154dev_dwait_s *prev; - /* Get exclusive access to the driver structure. We don't care about any * signals so if we see one, just go back to trying to get access again */ while (mac802154dev_takesem(&dev->md_exclsem) != 0); - /* Search to see if there is a dwait pending for this transaction */ + /* If there is a registered notification receiver, queue the event and signal + * the receiver. Events should be popped from the queue from the application + * at a reasonable rate in order for the MAC layer to be able to allocate new + * notifications. + */ - for (prev = NULL, curr = dev->md_dwait; - curr && curr->mw_handle != conf->handle; - prev = curr, curr = curr->mw_flink); + if (dev->enableevents && (dev->md_open != NULL || dev->notify_registered)) + { + mac802154dev_pushevent(dev, notif); - /* If a dwait is found */ + /* Check if there is a read waiting for data */ - if (curr) - { - /* Unlink the structure from the list. The struct should be allocated on - * the calling write's stack, so we don't need to worry about deallocating - * here */ - - if (prev) + if (dev->geteventpending) { - prev->mw_flink = curr->mw_flink; - } - else - { - dev->md_dwait = curr->mw_flink; + /* Wake the thread waiting for the data transmission */ + + dev->geteventpending = false; + sem_post(&dev->geteventsem); } - /* Copy the transmission status into the dwait struct */ - - curr->mw_status = conf->status; - - /* Wake the thread waiting for the data transmission */ - - sem_post(&curr->mw_sem); - - /* Release the driver */ - - mac802154dev_givesem(&dev->md_exclsem); - } - -#ifndef CONFIG_DISABLE_SIGNALS - /* Send a signal to the registered application */ +#ifndef CONFIG_DISABLE_SIGNALS + if (dev->notify_registered) + { #ifdef CONFIG_CAN_PASS_STRUCTS - /* Copy the status as the signal data to be optionally used by app */ - - union sigval value; - value.sival_int = (int)conf->status; - (void)sigqueue(dev->md_mcps_pid, dev->md_mcps_notify.mn_signo, value); + union sigval value; + value.sival_int = (int)notif->notiftype; + (void)sigqueue(dev->md_notify_pid, dev->md_notify.mn_signo, value); #else - (void)sigqueue(dev->md_mcps_pid, dev->md_mcps_notify.mn_signo, - value.sival_ptr); -#endif + (void)sigqueue(dev->md_notify_pid, dev->md_notify.mn_signo, + (FAR void *)notif->notiftype); #endif + } +#endif + } + else + { + /* Just free the event if the driver is closed and there isn't a registered + * signal number. + */ + + mac802154_notif_free(dev->md_mac, notif); + } + + /* Release the driver */ + + mac802154dev_givesem(&dev->md_exclsem); } -static void mac802154dev_ind_data(FAR struct mac802154_chardevice_s *dev, - FAR struct ieee802154_data_ind_s *ind) +static void mac802154dev_rxframe(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_data_ind_s *ind) { + FAR struct mac802154dev_callback_s *cb = + (FAR struct mac802154dev_callback_s *)maccb; + FAR struct mac802154_chardevice_s *dev; + + DEBUGASSERT(cb != NULL && cb->mc_priv != NULL); + dev = cb->mc_priv; + /* Get exclusive access to the driver structure. We don't care about any * signals so if we see one, just go back to trying to get access again */ @@ -896,7 +843,7 @@ static void mac802154dev_ind_data(FAR struct mac802154_chardevice_s *dev, /* Push the indication onto the list */ - mac802154dev_push_dataind(dev, ind); + sq_addlast((FAR sq_entry_t *)ind, &dev->dataind_queue); /* Check if there is a read waiting for data */ @@ -911,21 +858,6 @@ static void mac802154dev_ind_data(FAR struct mac802154_chardevice_s *dev, /* Release the driver */ mac802154dev_givesem(&dev->md_exclsem); - -#ifndef CONFIG_DISABLE_SIGNALS - /* Send a signal to the registered application */ - -#ifdef CONFIG_CAN_PASS_STRUCTS - /* Copy the status as the signal data to be optionally used by app */ - - union sigval value; - value.sival_int = IEEE802154_STATUS_SUCCESS; - (void)sigqueue(dev->md_mcps_pid, dev->md_mcps_notify.mn_signo, value); -#else - (void)sigqueue(dev->md_mcps_pid, dev->md_mcps_notify.mn_signo, - value.sival_ptr); -#endif -#endif } /**************************************************************************** @@ -953,7 +885,7 @@ static void mac802154dev_ind_data(FAR struct mac802154_chardevice_s *dev, int mac802154dev_register(MACHANDLE mac, int minor) { FAR struct mac802154_chardevice_s *dev; - FAR struct ieee802154_maccb_s *maccb; + FAR struct mac802154_maccb_s *maccb; char devname[DEVNAME_FMTLEN]; int ret; @@ -974,13 +906,25 @@ int mac802154dev_register(MACHANDLE mac, int minor) sem_setprotocol(&dev->readsem, SEM_PRIO_NONE); dev->readpending = false; + sq_init(&dev->dataind_queue); + + dev->geteventpending = false; + sem_init(&dev->geteventsem, 0, 0); + sem_setprotocol(&dev->geteventsem, SEM_PRIO_NONE); + + dev->event_head = NULL; + dev->event_tail = NULL; + + dev->enableevents = true; + dev->notify_registered = false; + /* Initialize the MAC callbacks */ dev->md_cb.mc_priv = dev; - maccb = &dev->md_cb.mc_cb; - maccb->mlme_notify = mac802154dev_mlme_notify; - maccb->mcps_notify = mac802154dev_mcps_notify; + maccb = &dev->md_cb.mc_cb; + maccb->notify = mac802154dev_notify; + maccb->rxframe = mac802154dev_rxframe; /* Bind the callback structure */ diff --git a/wireless/ieee802154/mac802154_netdev.c b/wireless/ieee802154/mac802154_netdev.c index b09ea4493c5..7fcd25e3af6 100644 --- a/wireless/ieee802154/mac802154_netdev.c +++ b/wireless/ieee802154/mac802154_netdev.c @@ -109,7 +109,7 @@ struct macnet_callback_s { /* This holds the information visible to the MAC layer */ - struct ieee802154_maccb_s mc_cb; /* Interface understood by the MAC layer */ + struct mac802154_maccb_s mc_cb; /* Interface understood by the MAC layer */ FAR struct macnet_driver_s *mc_priv; /* Our priv data */ }; @@ -138,12 +138,10 @@ struct macnet_driver_s /* IEE802.15.4 MAC callback functions ***************************************/ -static void macnet_mlme_notify(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mlme_notify_u *arg); -static void macnet_mcps_notify(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mcps_notify_u *arg); +static void macnet_notify(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_notif_s *notif); +static void macnet_rxframe(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_data_ind_s *ind); /* Asynchronous confirmations to requests */ @@ -166,8 +164,6 @@ static void macnet_conf_poll(FAR struct macnet_driver_s *priv, /* Asynchronous event indications, replied to synchronously with responses */ -static void macnet_ind_data(FAR struct macnet_driver_s *priv, - FAR struct ieee802154_data_ind_s *conf); static void macnet_ind_associate(FAR struct macnet_driver_s *priv, FAR struct ieee802154_assoc_ind_s *conf); static void macnet_ind_disassociate(FAR struct macnet_driver_s *priv, @@ -221,15 +217,14 @@ static int macnet_req_data(FAR struct ieee802154_driver_s *netdev, ****************************************************************************/ /**************************************************************************** - * Name: macnet_mlme_notify + * Name: macnet_notify * * Description: * ****************************************************************************/ -static void macnet_mlme_notify(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mlme_notify_u *arg) +static void macnet_notify(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_notif_s *notif) { FAR struct macnet_callback_s *cb = (FAR struct macnet_callback_s *)maccb; @@ -238,8 +233,13 @@ static void macnet_mlme_notify(FAR const struct ieee802154_maccb_s *maccb, DEBUGASSERT(cb != NULL && cb->mc_priv != NULL); priv = cb->mc_priv; - switch (notif) + switch (notif->notiftype) { + case IEEE802154_NOTIFY_CONF_DATA: + { + macnet_conf_data(priv, ¬if->u.dataconf); + } + break; default: break; @@ -247,40 +247,38 @@ static void macnet_mlme_notify(FAR const struct ieee802154_maccb_s *maccb, } /**************************************************************************** - * Name: macnet_mcps_notify + * Name: macnet_rxframe * * Description: * ****************************************************************************/ -static void macnet_mcps_notify(FAR const struct ieee802154_maccb_s *maccb, - enum ieee802154_macnotify_e notif, - FAR const union ieee802154_mcps_notify_u *arg) +static void macnet_rxframe(FAR const struct mac802154_maccb_s *maccb, + FAR struct ieee802154_data_ind_s *ind) { FAR struct macnet_callback_s *cb = (FAR struct macnet_callback_s *)maccb; FAR struct macnet_driver_s *priv; + FAR struct iob_s *iob; DEBUGASSERT(cb != NULL && cb->mc_priv != NULL); priv = cb->mc_priv; - switch (notif) - { - case IEEE802154_NOTIFY_CONF_DATA: - { - macnet_conf_data(priv, &arg->dataconf); - } - break; + /* Extract the IOB containing the frame from the struct ieee802154_data_ind_s */ - case IEEE802154_NOTIFY_IND_DATA: - { - macnet_ind_data(priv, arg->dataind); - } - break; + DEBUGASSERT(priv != NULL && ind != NULL && ind->frame != NULL); + iob = ind->frame; + ind->frame = NULL; - default: - break; - } + /* Transfer the frame to the network logic */ + + sixlowpan_input(&priv->md_dev, iob, ind); + + /* sixlowpan_input() will free the IOB, but we must free the struct + * ieee802154_data_ind_s container here. + */ + + ieee802154_ind_free(ind); } /**************************************************************************** @@ -391,36 +389,6 @@ static void macnet_conf_poll(FAR struct macnet_driver_s *priv, } -/**************************************************************************** - * Name: macnet_ind_data - * - * Description: - * Data frame received - * - ****************************************************************************/ - -static void macnet_ind_data(FAR struct macnet_driver_s *priv, - FAR struct ieee802154_data_ind_s *ind) -{ - FAR struct iob_s *iob; - - /* Extract the IOB containing the frame from the struct ieee802154_data_ind_s */ - - DEBUGASSERT(priv != NULL && ind != NULL && ind->frame != NULL); - iob = ind->frame; - ind->frame = NULL; - - /* Transfer the frame to the network logic */ - - sixlowpan_input(&priv->md_dev, iob, ind); - - /* sixlowpan_input() will free the IOB, but we must free the struct - * ieee802154_data_ind_s container here. - */ - - ieee802154_ind_free(ind); -} - /**************************************************************************** * Name: macnet_ind_associate * @@ -1041,7 +1009,7 @@ int mac802154netdev_register(MACHANDLE mac) FAR struct macnet_driver_s *priv; FAR struct ieee802154_driver_s *ieee; FAR struct net_driver_s *dev; - FAR struct ieee802154_maccb_s *maccb; + FAR struct mac802154_maccb_s *maccb; FAR uint8_t *pktbuf; int ret; @@ -1103,9 +1071,9 @@ int mac802154netdev_register(MACHANDLE mac) priv->md_cb.mc_priv = priv; - maccb = &priv->md_cb.mc_cb; - maccb->mlme_notify = macnet_mlme_notify; - maccb->mcps_notify = macnet_mcps_notify; + maccb = &priv->md_cb.mc_cb; + maccb->notify = macnet_notify; + maccb->rxframe = macnet_rxframe; /* Bind the callback structure */