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armv7a: Amp mode support

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reason:
In AMP mode, we can also use SGI as an inter-core interrupt,
and ensure that arm_gic0_initialize is called only once.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
This commit is contained in:
hujun5
2025-01-03 20:58:36 +08:00
committed by Xiang Xiao
parent 699b23fa19
commit bac838b888
2 changed files with 8 additions and 7 deletions
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arch/arm/src/armv7-a/arm_gicv2.c
-5
View File
@@ -724,13 +724,8 @@ void arm_cpu_sgi(int sgi, unsigned int cpuset)
arm_gic_wait_done(cpuset); arm_gic_wait_done(cpuset);
#ifdef CONFIG_SMP
regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(cpuset) | regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(cpuset) |
GIC_ICDSGIR_TGTFILTER_LIST; GIC_ICDSGIR_TGTFILTER_LIST;
#else
regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(0) |
GIC_ICDSGIR_TGTFILTER_THIS;
#endif
#if defined(CONFIG_ARCH_TRUSTZONE_SECURE) #if defined(CONFIG_ARCH_TRUSTZONE_SECURE)
if (sgi >= GIC_IRQ_SGI0 && sgi <= GIC_IRQ_SGI7) if (sgi >= GIC_IRQ_SGI0 && sgi <= GIC_IRQ_SGI7)
arch/arm/src/qemu/qemu_irq.c
+8 -2
View File
@@ -116,9 +116,15 @@ void up_irqinitialize(void)
* access to the GIC. * access to the GIC.
*/ */
/* Initialize the Generic Interrupt Controller (GIC) for CPU0 */ /* Initialize the Generic Interrupt Controller (GIC) for CPU0.
* In AMP mode, we want arm_gic0_initialize to be called only once.
*/
if (sched_getcpu() == 0)
{
arm_gic0_initialize(); /* Initialization unique to CPU0 */
}
arm_gic0_initialize(); /* Initialization unique to CPU0 */
arm_gic_initialize(); /* Initialization common to all CPUs */ arm_gic_initialize(); /* Initialization common to all CPUs */
#ifndef CONFIG_SUPPRESS_INTERRUPTS #ifndef CONFIG_SUPPRESS_INTERRUPTS