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risc-v: replace fence.i with __ISB for instruction sync

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Summary:
- Replace direct use of `fence.i` instruction with `__ISB()` macro for instruction synchronization
- This change improves portability while maintaining the same functionality

Impact:
- No functional changes - both `fence.i` and `__ISB()` ensure instruction
synchronization on RISC-V
- Makes the code more maintainable by using the architecture abstraction
layer

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi
2025-01-16 14:51:46 +08:00
committed by Xiang Xiao
parent 56415a0275
commit bac2df6bc8
1 changed files with 2 additions and 1 deletions
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libs/libc/machine/risc-v/arch_elf.c
+2 -1
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@@ -33,6 +33,7 @@
#include <assert.h> #include <assert.h>
#include <nuttx/elf.h> #include <nuttx/elf.h>
#include <arch/barriers.h>
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
@@ -129,7 +130,7 @@ static void _set_val(uint16_t *addr, uint32_t val)
/* NOTE: Ensure relocation before execution */ /* NOTE: Ensure relocation before execution */
asm volatile ("fence.i"); __ISB();
} }
static void _add_val(uint16_t *addr, uint32_t val) static void _add_val(uint16_t *addr, uint32_t val)