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Centralize definitions associated with CONFIG_DEBUG_SPI

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This commit is contained in:
Gregory Nutt
2016-06-15 10:41:13 -06:00
parent 0e180c3ad8
commit ba03134bed
104 changed files with 335 additions and 1835 deletions
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Kconfig
+28 -2
View File
@@ -1091,14 +1091,40 @@ config DEBUG_SENSORS_INFO
endif # DEBUG_SENSORS
config DEBUG_SPI
bool "SPI Debug Output"
bool "SPI Debug Features"
default n
depends on SPI
---help---
Enable I2C driver debug SYSLOG output (disabled by default).
Enable SPI debug features.
Support for this debug option is architecture-specific and may not
be available for some MCUs.
if DEBUG_SPI
config DEBUG_SPI_ERROR
bool "SPI Error Output"
default n
depends on DEBUG_ERROR
---help---
Enable SPI error output to SYSLOG.
config DEBUG_SPI_WARN
bool "SPI Warnings Output"
default n
depends on DEBUG_WARN
---help---
Enable SPI warning output to SYSLOG.
config DEBUG_SPI_INFO
bool "SPI Informational Output"
default n
depends on DEBUG_INFO
---help---
Enable SPI informational output to SYSLOG.
endif # DEBUG_SPI
config DEBUG_TIMER
bool "Timer Debug Output"
default n
arch/arm/src/efm32/efm32_spi.c
-20
View File
@@ -91,26 +91,6 @@
#define SPI_DMA16_CONFIG (EFM32_DMA_XFERSIZE_HWORD | EFM32_DMA_MEMINCR)
#define SPI_DMA16NULL_CONFIG (EFM32_DMA_XFERSIZE_HWORD | EFM32_DMA_NOINCR)
/* Debug ********************************************************************/
/* Check if SPI debug is enabled */
#ifndef CONFIG_DEBUG_FEATURES
# undef CONFIG_DEBUG_INFO
# undef CONFIG_DEBUG_SPI
#endif
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spierr(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
arch/arm/src/kl/kl_spi.c
-23
View File
@@ -59,29 +59,6 @@
#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
* CONFIG_DEBUG_FEATURES - Define to enable general debug features
* CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
* CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spierr(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
arch/arm/src/lpc11xx/lpc11_spi.c
-20
View File
@@ -71,26 +71,6 @@
# error "CONFIG_SPI_EXCHANGE must not be defined in the configuration"
#endif
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
* CONFIG_DEBUG_FEATURES - Define to enable general debug features
* CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
* CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spierr(x...)
# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
/* The CPU clock by 1, 2, 4, or 8 to get the SPI peripheral clock (SPI_CLOCK).
* SPI_CLOCK may be further divided by 8-254 to get the SPI clock. If we
arch/arm/src/lpc11xx/lpc11_ssp.c
-20
View File
@@ -72,26 +72,6 @@
# error "CONFIG_SPI_EXCHANGE must not be defined in the configuration"
#endif
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
* CONFIG_DEBUG_FEATURES - Define to enable general debug features
* CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
* CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
# define ssperr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define ssperr(x...)
# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
#if defined(LPC111x)
arch/arm/src/lpc17xx/lpc17_spi.c
-20
View File
@@ -71,26 +71,6 @@
# error "CONFIG_SPI_EXCHANGE must not be defined in the configuration"
#endif
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
* CONFIG_DEBUG_FEATURES - Define to enable general debug features
* CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
* CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spierr(x...)
# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
/* The CPU clock by 1, 2, 4, or 8 to get the SPI peripheral clock (SPI_CLOCK).
* SPI_CLOCK may be further divided by 8-254 to get the SPI clock. If we
arch/arm/src/lpc17xx/lpc17_ssp.c
-20
View File
@@ -72,26 +72,6 @@
# error "CONFIG_SPI_EXCHANGE must not be defined in the configuration"
#endif
/* Debug ********************************************************************/
/* The following enable debug output from this file:
*
* CONFIG_DEBUG_FEATURES - Define to enable general debug features
* CONFIG_DEBUG_SPI - Define to enable basic SSP debug (needs CONFIG_DEBUG_FEATURES)
* CONFIG_DEBUG_INFO - Define to enable verbose SSP debug
*/
#ifdef CONFIG_DEBUG_SPI
# define ssperr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define ssperr(x...)
# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
#if defined(LPC176x)
arch/arm/src/lpc2378/lpc23xx_spi.c
-15
View File
@@ -75,21 +75,6 @@
# error CONFIG_SPI_EXCHANGE is not supported by this driver
#endif
/* Debug ********************************************************************/
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spierr(x...)
# define spiinfo(x...)
#endif
/* SPI Clocking.
*
* The CPU clock is divided by by 1, 2, 4, or 8 to get the SPI peripheral
arch/arm/src/lpc43xx/lpc43_gpdma.c
-42
View File
@@ -57,48 +57,6 @@
#ifdef CONFIG_LPC43_GPDMA
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#undef DMA_DEBUG /* Define to enable debug */
#undef DMA_VERBOSE /* Define to enable verbose debug */
#ifdef DMA_DEBUG
# define dmaerr llerr
# ifdef DMA_VERBOSE
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# undef DMA_VERBOSE
# define dmaerr(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
arch/arm/src/lpc43xx/lpc43_spi.c
-12
View File
@@ -64,18 +64,6 @@
* Pre-processor Definitions
****************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/* SPI Clocking.
*
* The CPU clock by 1, 2, 4, or 8 to get the SPI peripheral clock (SPI_CLOCK).
arch/arm/src/lpc43xx/lpc43_ssp.c
+6 -23
View File
@@ -62,25 +62,8 @@
#include "lpc43_ccu.h"
#include "lpc43_pinconfig.h"
#if defined(CONFIG_LPC43_SSP0) || defined(CONFIG_LPC43_SSP1)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* The following enable debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssperr llerr
# define sspwarn llwarn
# define sspinfo llinfo
#else
# define ssperr(x...)
# define sspwarn(x...)
# define sspinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@@ -369,7 +352,7 @@ static uint32_t ssp_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
priv->frequency = frequency;
priv->actual = actual;
ssperr("Frequency %d->%d\n", frequency, actual);
spierr("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -420,7 +403,7 @@ static void ssp_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
break;
default:
ssperr("Bad mode: %d\n", mode);
spierr("Bad mode: %d\n", mode);
DEBUGASSERT(FALSE);
return;
}
@@ -508,7 +491,7 @@ static uint16_t ssp_send(FAR struct spi_dev_s *dev, uint16_t wd)
/* Get the value from the RX FIFO and return it */
regval = ssp_getreg(priv, LPC43_SSP_DR_OFFSET);
ssperr("%04x->%04x\n", wd, regval);
spierr("%04x->%04x\n", wd, regval);
return (uint16_t)regval;
}
@@ -555,7 +538,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
/* While there is remaining to be sent (and no synchronization error has occurred) */
ssperr("nwords: %d\n", nwords);
spierr("nwords: %d\n", nwords);
tx.pv = txbuffer;
rx.pv = rxbuffer;
@@ -567,7 +550,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
* and (3) there are more bytes to be sent.
*/
sspinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
spiinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
while ((ssp_getreg(priv, LPC43_SSP_SR_OFFSET) & SSP_SR_TNF) &&
(rxpending < LPC43_SSP_FIFOSZ) && nwords)
{
@@ -590,7 +573,7 @@ static void ssp_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
/* Now, read the RX data from the RX FIFO while the RX FIFO is not empty */
sspinfo("RX: rxpending: %d\n", rxpending);
spiinfo("RX: rxpending: %d\n", rxpending);
while (ssp_getreg(priv, LPC43_SSP_SR_OFFSET) & SSP_SR_RNE)
{
data = ssp_getreg(priv, LPC43_SSP_DR_OFFSET);
arch/arm/src/sam34/sam_spi.c
+2 -12
View File
@@ -138,16 +138,6 @@
# undef CONFIG_SAM34_SPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
#define DMA_INITIAL 0
#define DMA_AFTER_SETUP 1
#define DMA_AFTER_START 2
@@ -241,7 +231,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
unsigned int offset);
static inline struct sam_spidev_s *spi_device(struct sam_spics_s *spics);
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg);
#else
# define spi_dumpregs(spi,msg)
@@ -509,7 +499,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
*
****************************************************************************/
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg)
{
spiinfo("%s:\n", msg);
arch/arm/src/sama5/sam_spi.c
+2 -12
View File
@@ -131,16 +131,6 @@
# undef CONFIG_SAMA5_SPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
#define DMA_INITIAL 0
#define DMA_AFTER_SETUP 1
#define DMA_AFTER_START 2
@@ -232,7 +222,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
unsigned int offset);
static inline struct sam_spidev_s *spi_device(struct sam_spics_s *spics);
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg);
#else
# define spi_dumpregs(spi,msg)
@@ -498,7 +488,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
*
****************************************************************************/
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg)
{
spiinfo("%s:\n", msg);
arch/arm/src/samdl/sam_spi.c
+2 -19
View File
@@ -73,23 +73,6 @@
#ifdef SAMDL_HAVE_SPI
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Debug *******************************************************************/
/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@@ -163,7 +146,7 @@ static uint32_t spi_getreg32(struct sam_spidev_s *priv,
static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
unsigned int offset);
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg);
#else
# define spi_dumpregs(priv,msg)
@@ -727,7 +710,7 @@ static void spi_putreg32(struct sam_spidev_s *priv, uint32_t regval,
*
****************************************************************************/
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg)
{
spiinfo("%s:\n", msg);
arch/arm/src/samv7/sam_qspi.c
+3 -13
View File
@@ -144,16 +144,6 @@
# undef CONFIG_SAMV7_QSPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
#define DMA_INITIAL 0
#define DMA_AFTER_SETUP 1
#define DMA_AFTER_START 2
@@ -232,7 +222,7 @@ static inline uint32_t qspi_getreg(struct sam_qspidev_s *priv,
static inline void qspi_putreg(struct sam_qspidev_s *priv, uint32_t value,
unsigned int offset);
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void qspi_dumpregs(struct sam_qspidev_s *priv, const char *msg);
#else
# define qspi_dumpregs(priv,msg)
@@ -463,7 +453,7 @@ static inline void qspi_putreg(struct sam_qspidev_s *priv, uint32_t value,
*
****************************************************************************/
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void qspi_dumpregs(struct sam_qspidev_s *priv, const char *msg)
{
qspiinfo("%s:\n", msg);
@@ -1352,7 +1342,7 @@ static int qspi_command(struct qspi_dev_s *dev,
DEBUGASSERT(priv != NULL && cmdinfo != NULL);
#ifdef CONFIG_DEBUG_SPI
#ifdef CONFIG_DEBUG_SPI_INFO
qspiinfo("Transfer:\n");
qspiinfo(" flags: %02x\n", cmdinfo->flags);
qspiinfo(" cmd: %04x\n", cmdinfo->cmd);
arch/arm/src/samv7/sam_spi.c
+2 -12
View File
@@ -126,16 +126,6 @@
# undef CONFIG_SAMV7_SPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
#define DMA_INITIAL 0
#define DMA_AFTER_SETUP 1
#define DMA_AFTER_START 2
@@ -228,7 +218,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
unsigned int offset);
static inline struct sam_spidev_s *spi_device(struct sam_spics_s *spics);
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg);
#else
# define spi_dumpregs(spi,msg)
@@ -517,7 +507,7 @@ static inline void spi_putreg(struct sam_spidev_s *spi, uint32_t value,
*
****************************************************************************/
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *spi, const char *msg)
{
spiinfo("%s:\n", msg);
arch/arm/src/samv7/sam_spi_slave.c
+5 -18
View File
@@ -74,19 +74,6 @@
# define CONFIG_SAMV7_SPI_SLAVE_QSIZE 8
#endif
/* Debug *******************************************************************/
/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@@ -144,7 +131,7 @@ static uint32_t spi_getreg(struct sam_spidev_s *priv,
static void spi_putreg(struct sam_spidev_s *priv, uint32_t value,
unsigned int offset);
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg);
#else
# define spi_dumpregs(priv,msg)
@@ -339,7 +326,7 @@ static void spi_putreg(struct sam_spidev_s *priv, uint32_t value,
*
****************************************************************************/
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(struct sam_spidev_s *priv, const char *msg)
{
spiinfo("%s:\n", msg);
@@ -448,7 +435,7 @@ static int spi_interrupt(struct sam_spidev_s *priv)
* bit.
*/
#ifdef CONFIG_DEBUG_SPI
#ifdef CONFIG_DEBUG_SPI_ERROR
/* Check the RX data overflow condition */
if ((pending & SPI_INT_OVRES) != 0)
@@ -515,7 +502,7 @@ static int spi_interrupt(struct sam_spidev_s *priv)
* Underrun Error Status Flag (UNDES) is set in the SPI_SR.
*/
#ifdef CONFIG_DEBUG_SPI
#ifdef CONFIG_DEBUG_SPI_ERROR
/* Check the TX data underflow condition */
if ((pending & SPI_INT_UNDES) != 0)
@@ -882,7 +869,7 @@ static void spi_bind(struct spi_sctrlr_s *sctrlr,
*/
regval = (SPI_INT_RDRF | SPI_INT_NSSR);
#ifdef CONFIG_DEBUG_SPI
#ifdef CONFIG_DEBUG_SPI_ERROR
regval |= SPI_INT_OVRES;
#endif
arch/arm/src/stm32/stm32_spi.c
-14
View File
@@ -155,20 +155,6 @@
# error "Unknown STM32 DMA"
#endif
/* Debug ****************************************************************************/
/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Private Types
************************************************************************************/
arch/arm/src/stm32f7/stm32_spi.c
-13
View File
@@ -136,19 +136,6 @@
# define SPI_TXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_SCR_MSIZE_8BITS |DMA_SCR_PSIZE_8BITS |DMA_SCR_DIR_M2P)
#endif
/* Debug ****************************************************************************/
/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Private Types
************************************************************************************/
arch/arm/src/stm32l4/stm32l4_qspi.c
+57 -71
View File
@@ -91,16 +91,6 @@
# undef CONFIG_STM32L4_QSPI_DMADEBUG
#endif
#ifdef CONFIG_DEBUG_SPI
# define qspierr llerr
# define qspiwarn llwarn
# define qspiinfo llinfo
#else
# define qspierr(x...)
# define qspiwarn(x...)
# define qspiinfo(x...)
#endif
#define DMA_INITIAL 0
#define DMA_AFTER_SETUP 1
#define DMA_AFTER_START 2
@@ -275,13 +265,13 @@ static inline uint32_t qspi_getreg(struct stm32l4_qspidev_s *priv,
static inline void qspi_putreg(struct stm32l4_qspidev_s *priv, uint32_t value,
unsigned int offset);
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg);
#else
# define qspi_dumpregs(priv,msg)
#endif
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_GPIO)
#if defined(CONFIG_DEBUG_SPI_INFO) && defined(CONFIG_DEBUG_GPIO)
static void qspi_dumpgpioconfig(const char *msg);
#else
# define qspi_dumpgpioconfig(msg)
@@ -494,11 +484,11 @@ static inline void qspi_putreg(struct stm32l4_qspidev_s *priv, uint32_t value,
*
****************************************************************************/
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
{
uint32_t regval;
qspiinfo("%s:\n", msg);
spiinfo("%s:\n", msg);
#if 0
/* this extra verbose output may be helpful in some cases; you'll need
@@ -506,8 +496,8 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
*/
regval = getreg32(priv->base + STM32L4_QUADSPI_CR_OFFSET); /* Control Register */
qspiinfo("CR:%08x\n",regval);
qspiinfo(" EN:%1d ABORT:%1d DMAEN:%1d TCEN:%1d SSHIFT:%1d\n"
spiinfo("CR:%08x\n",regval);
spiinfo(" EN:%1d ABORT:%1d DMAEN:%1d TCEN:%1d SSHIFT:%1d\n"
" FTHRES: %d\n"
" TEIE:%1d TCIE:%1d FTIE:%1d SMIE:%1d TOIE:%1d APMS:%1d PMM:%1d\n"
" PRESCALER: %d\n",
@@ -524,20 +514,18 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
(regval & QSPI_CR_TOIE) ? 1 : 0,
(regval & QSPI_CR_APMS) ? 1 : 0,
(regval & QSPI_CR_PMM) ? 1 : 0,
(regval&QSPI_CR_PRESCALER_MASK)>>QSPI_CR_PRESCALER_SHIFT
);
(regval & QSPI_CR_PRESCALER_MASK) >> QSPI_CR_PRESCALER_SHIFT);
regval = getreg32(priv->base + STM32L4_QUADSPI_DCR_OFFSET); /* Device Configuration Register */
qspiinfo("DCR:%08x\n",regval);
qspiinfo(" CKMODE:%1d CSHT:%d FSIZE:%d\n",
spiinfo("DCR:%08x\n",regval);
spiinfo(" CKMODE:%1d CSHT:%d FSIZE:%d\n",
(regval & QSPI_DCR_CKMODE) ? 1 : 0,
(regval & QSPI_DCR_CSHT_MASK) >> QSPI_DCR_CSHT_SHIFT,
(regval&QSPI_DCR_FSIZE_MASK)>>QSPI_DCR_FSIZE_SHIFT
);
(regval & QSPI_DCR_FSIZE_MASK) >> QSPI_DCR_FSIZE_SHIFT);
regval = getreg32(priv->base + STM32L4_QUADSPI_CCR_OFFSET); /* Communication Configuration Register */
qspiinfo("CCR:%08x\n",regval);
qspiinfo(" INST:%02x IMODE:%d ADMODE:%d ADSIZE:%d ABMODE:%d\n"
spiinfo("CCR:%08x\n",regval);
spiinfo(" INST:%02x IMODE:%d ADMODE:%d ADSIZE:%d ABMODE:%d\n"
" ABSIZE:%d DCYC:%d DMODE:%d FMODE:%d\n"
" SIOO:%1d DDRM:%1d\n",
(regval & QSPI_CCR_INSTRUCTION_MASK) >> QSPI_CCR_INSTRUCTION_SHIFT,
@@ -550,33 +538,31 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
(regval & QSPI_CCR_DMODE_MASK) >> QSPI_CCR_DMODE_SHIFT,
(regval & QSPI_CCR_FMODE_MASK) >> QSPI_CCR_FMODE_SHIFT,
(regval & QSPI_CCR_SIOO) ? 1 : 0,
(regval&QSPI_CCR_DDRM)?1:0
);
(regval & QSPI_CCR_DDRM) ? 1 : 0);
regval = getreg32(priv->base + STM32L4_QUADSPI_SR_OFFSET); /* Status Register */
qspiinfo("SR:%08x\n",regval);
qspiinfo(" TEF:%1d TCF:%1d FTF:%1d SMF:%1d TOF:%1d BUSY:%1d FLEVEL:%d\n",
spiinfo("SR:%08x\n",regval);
spiinfo(" TEF:%1d TCF:%1d FTF:%1d SMF:%1d TOF:%1d BUSY:%1d FLEVEL:%d\n",
(regval & QSPI_SR_TEF) ? 1 : 0,
(regval & QSPI_SR_TCF) ? 1 : 0,
(regval & QSPI_SR_FTF) ? 1 : 0,
(regval & QSPI_SR_SMF) ? 1 : 0,
(regval & QSPI_SR_TOF) ? 1 : 0,
(regval & QSPI_SR_BUSY) ? 1 : 0,
(regval&QSPI_SR_FLEVEL_MASK)>>QSPI_SR_FLEVEL_SHIFT
);
(regval & QSPI_SR_FLEVEL_MASK) >> QSPI_SR_FLEVEL_SHIFT);
#else
qspiinfo(" CR:%08x DCR:%08x CCR:%08x SR:%08x\n",
spiinfo(" CR:%08x DCR:%08x CCR:%08x SR:%08x\n",
getreg32(priv->base + STM32L4_QUADSPI_CR_OFFSET), /* Control Register */
getreg32(priv->base + STM32L4_QUADSPI_DCR_OFFSET), /* Device Configuration Register */
getreg32(priv->base + STM32L4_QUADSPI_CCR_OFFSET), /* Communication Configuration Register */
getreg32(priv->base + STM32L4_QUADSPI_SR_OFFSET)); /* Status Register */
qspiinfo(" DLR:%08x ABR:%08x PSMKR:%08x PSMAR:%08x\n",
spiinfo(" DLR:%08x ABR:%08x PSMKR:%08x PSMAR:%08x\n",
getreg32(priv->base + STM32L4_QUADSPI_DLR_OFFSET), /* Data Length Register */
getreg32(priv->base + STM32L4_QUADSPI_ABR_OFFSET), /* Alternate Bytes Register */
getreg32(priv->base + STM32L4_QUADSPI_PSMKR_OFFSET), /* Polling Status mask Register */
getreg32(priv->base + STM32L4_QUADSPI_PSMAR_OFFSET)); /* Polling Status match Register */
qspiinfo(" PIR:%08x LPTR:%08x\n",
spiinfo(" PIR:%08x LPTR:%08x\n",
getreg32(priv->base + STM32L4_QUADSPI_PIR_OFFSET), /* Polling Interval Register */
getreg32(priv->base + STM32L4_QUADSPI_LPTR_OFFSET)); /* Low-Power Timeout Register */
(void)regval;
@@ -584,29 +570,29 @@ static void qspi_dumpregs(struct stm32l4_qspidev_s *priv, const char *msg)
}
#endif
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_GPIO)
#if defined(CONFIG_DEBUG_SPI_INFO) && defined(CONFIG_DEBUG_GPIO)
static void qspi_dumpgpioconfig(const char *msg)
{
uint32_t regval;
qspiinfo("%s:\n", msg);
spiinfo("%s:\n", msg);
regval = getreg32(STM32L4_GPIOE_MODER);
qspiinfo("E_MODER:%08x\n",regval);
spiinfo("E_MODER:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_OTYPER);
qspiinfo("E_OTYPER:%08x\n",regval);
spiinfo("E_OTYPER:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_OSPEED);
qspiinfo("E_OSPEED:%08x\n",regval);
spiinfo("E_OSPEED:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_PUPDR);
qspiinfo("E_PUPDR:%08x\n",regval);
spiinfo("E_PUPDR:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_AFRL);
qspiinfo("E_AFRL:%08x\n",regval);
spiinfo("E_AFRL:%08x\n",regval);
regval = getreg32(STM32L4_GPIOE_AFRH);
qspiinfo("E_AFRH:%08x\n",regval);
spiinfo("E_AFRH:%08x\n",regval);
}
#endif
@@ -717,21 +703,21 @@ static int qspi_setupxctnfromcmd(struct qspi_xctnspec_s *xctn,
{
DEBUGASSERT(xctn != NULL && cmdinfo != NULL);
#ifdef CONFIG_DEBUG_SPI
qspiinfo("Transfer:\n");
qspiinfo(" flags: %02x\n", cmdinfo->flags);
qspiinfo(" cmd: %04x\n", cmdinfo->cmd);
#ifdef CONFIG_DEBUG_SPI_INFO
spiinfo("Transfer:\n");
spiinfo(" flags: %02x\n", cmdinfo->flags);
spiinfo(" cmd: %04x\n", cmdinfo->cmd);
if (QSPICMD_ISADDRESS(cmdinfo->flags))
{
qspiinfo(" address/length: %08lx/%d\n",
spiinfo(" address/length: %08lx/%d\n",
(unsigned long)cmdinfo->addr, cmdinfo->addrlen);
}
if (QSPICMD_ISDATA(cmdinfo->flags))
{
qspiinfo(" %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
qspiinfo(" buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
spiinfo(" %s Data:\n", QSPICMD_ISWRITE(cmdinfo->flags) ? "Write" : "Read");
spiinfo(" buffer/length: %p/%d\n", cmdinfo->buffer, cmdinfo->buflen);
}
#endif
@@ -841,14 +827,14 @@ static int qspi_setupxctnfrommem(struct qspi_xctnspec_s *xctn,
{
DEBUGASSERT(xctn != NULL && meminfo != NULL);
#ifdef CONFIG_DEBUG_SPI
qspiinfo("Transfer:\n");
qspiinfo(" flags: %02x\n", meminfo->flags);
qspiinfo(" cmd: %04x\n", meminfo->cmd);
qspiinfo(" address/length: %08lx/%d\n",
#ifdef CONFIG_DEBUG_SPI_INFO
spiinfo("Transfer:\n");
spiinfo(" flags: %02x\n", meminfo->flags);
spiinfo(" cmd: %04x\n", meminfo->cmd);
spiinfo(" address/length: %08lx/%d\n",
(unsigned long)meminfo->addr, meminfo->addrlen);
qspiinfo(" %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
qspiinfo(" buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
spiinfo(" %s Data:\n", QSPIMEM_ISWRITE(meminfo->flags) ? "Write" : "Read");
spiinfo(" buffer/length: %p/%d\n", meminfo->buffer, meminfo->buflen);
#endif
DEBUGASSERT(meminfo->cmd < 256);
@@ -1461,7 +1447,7 @@ static int qspi_memory_dma(struct stm32l4_qspidev_s *priv,
(wdentry_t)qspi_dma_timeout, 1, (uint32_t)priv);
if (ret != OK)
{
qspierr("ERROR: wd_start failed: %d\n", ret);
spierr("ERROR: wd_start failed: %d\n", ret);
}
/* Wait for the DMA complete */
@@ -1524,7 +1510,7 @@ static int qspi_memory_dma(struct stm32l4_qspidev_s *priv,
if (priv->result)
{
qspierr("ERROR: DMA failed with result: %d\n", priv->result);
spierr("ERROR: DMA failed with result: %d\n", priv->result);
}
return priv->result;
@@ -1694,7 +1680,7 @@ static int qspi_lock(struct qspi_dev_s *dev, bool lock)
{
struct stm32l4_qspidev_s *priv = (struct stm32l4_qspidev_s *)dev;
qspiinfo("lock=%d\n", lock);
spiinfo("lock=%d\n", lock);
if (lock)
{
/* Take the semaphore (perhaps waiting) */
@@ -1747,7 +1733,7 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
return 0;
}
qspiinfo("frequency=%d\n", frequency);
spiinfo("frequency=%d\n", frequency);
DEBUGASSERT(priv);
/* Wait till BUSY flag reset */
@@ -1799,14 +1785,14 @@ static uint32_t qspi_setfrequency(struct qspi_dev_s *dev, uint32_t frequency)
/* Calculate the new actual frequency */
actual = STL32L4_QSPI_CLOCK / prescaler;
qspiinfo("prescaler=%d actual=%d\n", prescaler, actual);
spiinfo("prescaler=%d actual=%d\n", prescaler, actual);
/* Save the frequency setting */
priv->frequency = frequency;
priv->actual = actual;
qspiinfo("Frequency %d->%d\n", frequency, actual);
spiinfo("Frequency %d->%d\n", frequency, actual);
return actual;
}
@@ -1839,7 +1825,7 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
return;
}
qspiinfo("mode=%d\n", mode);
spiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -1869,14 +1855,14 @@ static void qspi_setmode(struct qspi_dev_s *dev, enum qspi_mode_e mode)
case QSPIDEV_MODE1: /* CPOL=0; CPHA=1 */
case QSPIDEV_MODE2: /* CPOL=1; CPHA=0 */
qspiinfo("unsupported mode=%d\n", mode);
spiinfo("unsupported mode=%d\n", mode);
default:
DEBUGASSERT(FALSE);
return;
}
qspi_putreg(priv, regval, STM32L4_QUADSPI_DCR);
qspiinfo("DCR=%08x\n", regval);
spiinfo("DCR=%08x\n", regval);
/* Save the mode so that subsequent re-configurations will be faster */
@@ -1906,7 +1892,7 @@ static void qspi_setbits(struct qspi_dev_s *dev, int nbits)
if (8 != nbits)
{
qspiinfo("unsupported nbits=%d\n", nbits);
spiinfo("unsupported nbits=%d\n", nbits);
DEBUGASSERT(FALSE);
}
}
@@ -2445,7 +2431,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
/* The STM32L4 has only a single QSPI port */
qspiinfo("intf: %d\n", intf);
spiinfo("intf: %d\n", intf);
DEBUGASSERT(intf == 0);
/* Select the QSPI interface */
@@ -2486,7 +2472,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
}
else
{
qspierr("ERROR: QSPI%d not supported\n", intf);
spierr("ERROR: QSPI%d not supported\n", intf);
return NULL;
}
@@ -2509,7 +2495,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
priv->dmach = stm32l4_dmachannel(DMACHAN_QUADSPI);
if (!priv->dmach)
{
qspierr("ERROR: Failed to allocate the DMA channel\n");
spierr("ERROR: Failed to allocate the DMA channel\n");
priv->candma = false;
}
}
@@ -2525,7 +2511,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
priv->dmadog = wd_create();
if (priv->dmadog == NULL)
{
qspierr("ERROR: Failed to create wdog\n");
spierr("ERROR: Failed to create wdog\n");
goto errout_with_dmahandles;
}
#endif
@@ -2536,7 +2522,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
ret = irq_attach(priv->irq, priv->handler);
if (ret < 0)
{
qspierr("ERROR: Failed to attach irq %d\n", priv->irq);
spierr("ERROR: Failed to attach irq %d\n", priv->irq);
goto errout_with_dmadog;
}
@@ -2553,7 +2539,7 @@ struct qspi_dev_s *stm32l4_qspi_initialize(int intf)
ret = qspi_hw_initialize(priv);
if (ret < 0)
{
qspierr("ERROR: Failed to initialize QSPI hardware\n");
spierr("ERROR: Failed to initialize QSPI hardware\n");
goto errout_with_irq;
}
arch/arm/src/stm32l4/stm32l4_spi.c
-13
View File
@@ -136,19 +136,6 @@
#define SPI_TXDMA16NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_16BITS |DMA_CCR_DIR)
#define SPI_TXDMA8NULL_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_DIR)
/* Debug ****************************************************************************/
/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Private Types
************************************************************************************/
arch/arm/src/tiva/tiva_ssi.c
+26 -32
View File
@@ -69,14 +69,8 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssierr llerr
# define ssiwarn llwarn
# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
# define ssierr(x...)
# define ssiwarn(x...)
# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
@@ -462,7 +456,7 @@ static uint32_t ssi_disable(struct tiva_ssidev_s *priv)
retval = ssi_getreg(priv, TIVA_SSI_CR1_OFFSET);
regval = (retval & ~SSI_CR1_SSE);
ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval);
ssiinfo("CR1: %08x\n", regval);
spiinfo("CR1: %08x\n", regval);
return retval;
}
@@ -489,7 +483,7 @@ static void ssi_enable(struct tiva_ssidev_s *priv, uint32_t enable)
regval &= ~SSI_CR1_SSE;
regval |= (enable & SSI_CR1_SSE);
ssi_putreg(priv, TIVA_SSI_CR1_OFFSET, regval);
ssiinfo("CR1: %08x\n", regval);
spiinfo("CR1: %08x\n", regval);
}
/****************************************************************************
@@ -538,14 +532,14 @@ static void ssi_semtake(sem_t *sem)
static void ssi_txnull(struct tiva_ssidev_s *priv)
{
ssiinfo("TX: ->0xffff\n");
spiinfo("TX: ->0xffff\n");
ssi_putreg(priv, TIVA_SSI_DR_OFFSET, 0xffff);
}
static void ssi_txuint16(struct tiva_ssidev_s *priv)
{
uint16_t *ptr = (uint16_t *)priv->txbuffer;
ssiinfo("TX: %p->%04x\n", ptr, *ptr);
spiinfo("TX: %p->%04x\n", ptr, *ptr);
ssi_putreg(priv, TIVA_SSI_DR_OFFSET, (uint32_t)(*ptr++));
priv->txbuffer = (void *)ptr;
}
@@ -553,7 +547,7 @@ static void ssi_txuint16(struct tiva_ssidev_s *priv)
static void ssi_txuint8(struct tiva_ssidev_s *priv)
{
uint8_t *ptr = (uint8_t *)priv->txbuffer;
ssiinfo("TX: %p->%02x\n", ptr, *ptr);
spiinfo("TX: %p->%02x\n", ptr, *ptr);
ssi_putreg(priv, TIVA_SSI_DR_OFFSET, (uint32_t)(*ptr++));
priv->txbuffer = (void *)ptr;
}
@@ -577,9 +571,9 @@ static void ssi_txuint8(struct tiva_ssidev_s *priv)
static void ssi_rxnull(struct tiva_ssidev_s *priv)
{
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
uint32_t regval = ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
ssiinfo("RX: discard %04x\n", regval);
spiinfo("RX: discard %04x\n", regval);
#else
(void)ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
#endif
@@ -589,7 +583,7 @@ static void ssi_rxuint16(struct tiva_ssidev_s *priv)
{
uint16_t *ptr = (uint16_t *)priv->rxbuffer;
*ptr = (uint16_t)ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
ssiinfo("RX: %p<-%04x\n", ptr, *ptr);
spiinfo("RX: %p<-%04x\n", ptr, *ptr);
priv->rxbuffer = (void *)(++ptr);
}
@@ -597,7 +591,7 @@ static void ssi_rxuint8(struct tiva_ssidev_s *priv)
{
uint8_t *ptr = (uint8_t *)priv->rxbuffer;
*ptr = (uint8_t)ssi_getreg(priv, TIVA_SSI_DR_OFFSET);
ssiinfo("RX: %p<-%02x\n", ptr, *ptr);
spiinfo("RX: %p<-%02x\n", ptr, *ptr);
priv->rxbuffer = (void *)(++ptr);
}
@@ -841,7 +835,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
#endif
int ntxd;
ssiinfo("txbuffer: %p rxbuffer: %p nwords: %d\n",
spiinfo("txbuffer: %p rxbuffer: %p nwords: %d\n",
txbuffer, rxbuffer, nwords);
/* Set up to perform the transfer */
@@ -883,7 +877,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
#ifndef CONFIG_SSI_POLLWAIT
flags = enter_critical_section();
ssiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
spiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
priv->ntxwords, priv->nrxwords, priv->nwords,
ssi_getreg(priv, TIVA_SSI_SR_OFFSET));
@@ -897,7 +891,7 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
ssi_performrx(priv);
ssiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
spiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
priv->ntxwords, priv->nrxwords, priv->nwords,
ssi_getreg(priv, TIVA_SSI_SR_OFFSET),
ssi_getreg(priv, TIVA_SSI_IM_OFFSET));
@@ -907,14 +901,14 @@ static int ssi_transfer(struct tiva_ssidev_s *priv, const void *txbuffer,
* with the transfer, so it should be safe with no timeout.
*/
ssiinfo("Waiting for transfer complete\n");
spiinfo("Waiting for transfer complete\n");
leave_critical_section(flags);
do
{
ssi_semtake(&priv->xfrsem);
}
while (priv->nrxwords < priv->nwords);
ssiinfo("Transfer complete\n");
spiinfo("Transfer complete\n");
#else
/* Perform the transfer using polling logic. This will totally
@@ -1023,14 +1017,14 @@ static int ssi_interrupt(int irq, void *context)
/* Check for Rx FIFO overruns */
#ifdef CONFIG_DEBUG_SPI
#ifdef CONFIG_DEBUG_SPI_ERROR
if ((regval & SSI_RIS_ROR) != 0)
{
ssierr("ERROR: Rx FIFO Overrun!\n");
spierr("ERROR: Rx FIFO Overrun!\n");
}
#endif
ssiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
spiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x\n",
priv->ntxwords, priv->nrxwords, priv->nwords,
ssi_getreg(priv, TIVA_SSI_SR_OFFSET));
@@ -1042,7 +1036,7 @@ static int ssi_interrupt(int irq, void *context)
ssi_performrx(priv);
ssiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
spiinfo("ntxwords: %d nrxwords: %d nwords: %d SR: %08x IM: %08x\n",
priv->ntxwords, priv->nrxwords, priv->nwords,
ssi_getreg(priv, TIVA_SSI_SR_OFFSET),
ssi_getreg(priv, TIVA_SSI_IM_OFFSET));
@@ -1057,7 +1051,7 @@ static int ssi_interrupt(int irq, void *context)
/* Wake up the waiting thread */
ssiinfo("Transfer complete\n");
spiinfo("Transfer complete\n");
ssi_semgive(&priv->xfrsem);
}
@@ -1138,7 +1132,7 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
uint32_t scr;
uint32_t actual;
ssiinfo("frequency: %d\n", frequency);
spiinfo("frequency: %d\n", frequency);
DEBUGASSERT(frequency);
/* Has the frequency changed? */
@@ -1208,7 +1202,7 @@ static uint32_t ssi_setfrequencyinternal(struct tiva_ssidev_s *priv,
regval &= ~SSI_CR0_SCR_MASK;
regval |= (scr << SSI_CR0_SCR_SHIFT);
ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
ssiinfo("CR0: %08x CPSR: %08x\n", regval, cpsdvsr);
spiinfo("CR0: %08x CPSR: %08x\n", regval, cpsdvsr);
/* Calcluate the actual frequency */
@@ -1262,7 +1256,7 @@ static void ssi_setmodeinternal(struct tiva_ssidev_s *priv, enum spi_mode_e mode
uint32_t modebits;
uint32_t regval;
ssiinfo("mode: %d\n", mode);
spiinfo("mode: %d\n", mode);
DEBUGASSERT(priv);
/* Has the number of bits per word changed? */
@@ -1299,7 +1293,7 @@ static void ssi_setmodeinternal(struct tiva_ssidev_s *priv, enum spi_mode_e mode
regval &= ~(SSI_CR0_FRF_MASK | SSI_CR0_SPH | SSI_CR0_SPO);
regval |= modebits;
ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
ssiinfo("CR0: %08x\n", regval);
spiinfo("CR0: %08x\n", regval);
/* Save the mode so that subsequent re-configuratins will be faster */
@@ -1341,7 +1335,7 @@ static void ssi_setbitsinternal(struct tiva_ssidev_s *priv, int nbits)
{
uint32_t regval;
ssiinfo("nbits: %d\n", nbits);
spiinfo("nbits: %d\n", nbits);
DEBUGASSERT(priv);
if (nbits != priv->nbits && nbits >= 4 && nbits <= 16)
{
@@ -1349,7 +1343,7 @@ static void ssi_setbitsinternal(struct tiva_ssidev_s *priv, int nbits)
regval &= ~SSI_CR0_DSS_MASK;
regval |= ((nbits - 1) << SSI_CR0_DSS_SHIFT);
ssi_putreg(priv, TIVA_SSI_CR0_OFFSET, regval);
ssiinfo("CR0: %08x\n", regval);
spiinfo("CR0: %08x\n", regval);
priv->nbits = nbits;
}
@@ -1508,7 +1502,7 @@ FAR struct spi_dev_s *tiva_ssibus_initialize(int port)
struct tiva_ssidev_s *priv;
irqstate_t flags;
ssiinfo("port: %d\n", port);
spiinfo("port: %d\n", port);
/* Set up for the selected port */
arch/avr/src/avr/up_spi.c
-16
View File
@@ -62,22 +62,6 @@
#ifdef CONFIG_AVR_SPI
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
arch/mips/src/pic32mx/pic32mx-spi.c
-12
View File
@@ -72,18 +72,6 @@
# error CONFIG_SPI_EXCHANGE not supported by this driver
#endif
/* Debug */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
arch/mips/src/pic32mz/pic32mz-spi.c
-12
View File
@@ -67,18 +67,6 @@
#define BOARD_PBCLOCK BOARD_PBCLK2
/* Debug */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
arch/sim/src/up_spiflash.c
-13
View File
@@ -60,19 +60,6 @@
************************************************************************************/
/* Configuration ********************************************************************/
/* Debug ****************************************************************************/
/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/* Define the FLASH SIZE in bytes */
#ifdef CONFIG_SIM_SPIFLASH_1M
arch/z16/src/z16f/z16f_espi.c
+2 -18
View File
@@ -55,22 +55,6 @@
#ifdef CONFIG_Z16F_ESPI
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Debug *******************************************************************/
/* Check if SPI debug is enabled */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@@ -117,7 +101,7 @@ static void spi_putreg16(FAR struct z16f_spi_s *priv, uint16_t regval,
# define spi_putreg16(priv,regval,regaddr) putreg16(regval, regaddr)
#endif
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(FAR struct z16f_spi_s *priv, const char *msg);
#else
# define spi_dumpregs(priv,msg)
@@ -317,7 +301,7 @@ static void spi_putreg16(FAR struct z16f_spi_s *priv, uint16_t regval,
*
****************************************************************************/
#if defined(CONFIG_DEBUG_SPI) && defined(CONFIG_DEBUG_INFO)
#ifdef CONFIG_DEBUG_SPI_INFO
static void spi_dumpregs(FAR struct z16f_spi_s *priv, FAR const char *msg)
{
spiinfo("%s:\n", msg);
configs/cloudctrl/src/stm32_spi.c
-16
View File
@@ -54,22 +54,6 @@
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
configs/demo9s12ne64/src/m9s12_spi.c
-16
View File
@@ -50,22 +50,6 @@
#if defined(CONFIG_HCS12_SPI)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
configs/dk-tm4c129x/src/tm4c_ssi.c
+2 -8
View File
@@ -62,14 +62,8 @@
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssierr llerr
# define ssiwarn llwarn
# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
# define ssierr(x...)
# define ssiwarn(x...)
# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
@@ -110,14 +104,14 @@ void weak_function tm4c_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
ssiinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
configs/ea3131/src/lpc31_spi.c
-16
View File
@@ -55,22 +55,6 @@
#if 0 /* At present, EA3131 specific logic is hard-coded in the file lpc31_spi.c
* in arch/arm/src/lpc31xx */
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
configs/ea3152/src/lpc31_spi.c
-16
View File
@@ -55,22 +55,6 @@
#if 0 /* At present, EA3152 specific logic is hard-coded in the file lpc31_spi.c
* in arch/arm/src/lpc31xx */
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
configs/eagle100/src/lm_ssi.c
+2 -8
View File
@@ -62,14 +62,8 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssierr llerr
# define ssiwarn llwarn
# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
# define ssierr(x...)
# define ssiwarn(x...)
# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
@@ -115,7 +109,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
if (devid == SPIDEV_MMCSD)
{
/* Assert the CS pin to the card */
@@ -128,7 +122,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
ssiinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
configs/ekk-lm3s9b96/src/lm_ssi.c
+2 -8
View File
@@ -61,14 +61,8 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssierr llerr
# define ssiwarn llwarn
# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
# define ssierr(x...)
# define ssiwarn(x...)
# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
@@ -115,7 +109,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
{
@@ -136,7 +130,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
ssiinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
#endif
configs/fire-stm32v2/src/stm32_spi.c
-16
View File
@@ -53,22 +53,6 @@
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
configs/freedom-kl25z/src/kl_spi.c
-22
View File
@@ -51,28 +51,6 @@
#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spierr(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
configs/freedom-kl26z/src/kl_spi.c
-22
View File
@@ -51,28 +51,6 @@
#if defined(CONFIG_KL_SPI0) || defined(CONFIG_KL_SPI1)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Enables debug output from this file (needs CONFIG_DEBUG_FEATURES too) */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spierr(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
configs/hymini-stm32v/src/stm32_spi.c
-16
View File
@@ -54,22 +54,6 @@
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
configs/kwikstik-k40/src/k40_spi.c
-16
View File
@@ -53,22 +53,6 @@
#if defined(CONFIG_KINETIS_SPI1) || defined(CONFIG_KINETIS_SPI2)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
configs/lm3s6432-s2e/src/lm_ssi.c
+2 -8
View File
@@ -60,14 +60,8 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssierr llerr
# define ssiwarn llwarn
# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
# define ssierr(x...)
# define ssiwarn(x...)
# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
@@ -113,7 +107,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
@@ -128,7 +122,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
ssiinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
configs/lm3s6965-ek/src/lm_ssi.c
+2 -8
View File
@@ -62,14 +62,8 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssierr llerr
# define ssiwarn llwarn
# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
# define ssierr(x...)
# define ssiwarn(x...)
# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
@@ -118,7 +112,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
@@ -140,7 +134,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
ssiinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
configs/lm3s8962-ek/src/lm_ssi.c
+2 -8
View File
@@ -62,14 +62,8 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssierr llerr
# define ssiwarn llwarn
# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
# define ssierr(x...)
# define ssiwarn(x...)
# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
@@ -118,7 +112,7 @@ void weak_function lm_ssidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
if (devid == SPIDEV_MMCSD)
@@ -140,7 +134,7 @@ void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool select
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
ssiinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
configs/lm4f120-launchpad/src/lm4f_ssi.c
+2 -8
View File
@@ -63,14 +63,8 @@
/* CONFIG_DEBUG_SPI enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssierr llerr
# define ssiwarn llwarn
# define ssiinfo llinfo
# define ssi_dumpgpio(m) tiva_dumpgpio(SDCCS_GPIO, m)
#else
# define ssierr(x...)
# define ssiwarn(x...)
# define ssiinfo(x...)
# define ssi_dumpgpio(m)
#endif
@@ -111,14 +105,14 @@ void weak_function lm4f_spidev_initialize(void)
void tiva_ssiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
ssiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssi_dumpgpio("tiva_ssiselect() Entry");
ssi_dumpgpio("tiva_ssiselect() Exit");
}
uint8_t tiva_ssistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
ssiinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
configs/lpcxpresso-lpc1115/src/lpc11_ssp.c
+5 -17
View File
@@ -58,18 +58,6 @@
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssperr llerr
# define sspwarn llwarn
# define sspinfo llinfo
#else
# define ssperr(x...)
# define sspwarn(x...)
# define sspinfo(x...)
#endif
/* Dump GPIO registers */
#ifdef CONFIG_DEBUG_GPIO_INFO
@@ -144,7 +132,7 @@ void weak_function lpcxpresso_sspdev_initialize(void)
#ifdef CONFIG_LPC17_SSP0
void lpc11_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssp_dumpgpio("lpc11_ssp0select() Entry");
#warning "Assert CS here (false)"
@@ -154,7 +142,7 @@ void lpc11_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
sspinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
#endif
@@ -162,7 +150,7 @@ uint8_t lpc11_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_LPC17_SSP1
void lpc11_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssp_dumpgpio("lpc11_ssp1select() Entry");
if (devid == SPIDEV_MMCSD)
@@ -190,12 +178,12 @@ uint8_t lpc11_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
if (lpc11_gpioread(LPCXPRESSO_SD_CD) == 0)
{
sspinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
}
sspinfo("Returning zero\n");
spiinfo("Returning zero\n");
return 0;
}
#endif
configs/lpcxpresso-lpc1768/src/lpc17_ssp.c
+5 -17
View File
@@ -58,18 +58,6 @@
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define ssperr llerr
# define sspwarn llwarn
# define sspinfo llinfo
#else
# define ssperr(x...)
# define sspwarn(x...)
# define sspinfo(x...)
#endif
/* Dump GPIO registers */
#ifdef CONFIG_DEBUG_GPIO_INFO
@@ -144,7 +132,7 @@ void weak_function lpcxpresso_sspdev_initialize(void)
#ifdef CONFIG_LPC17_SSP0
void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssp_dumpgpio("lpc17_ssp0select() Entry");
#warning "Assert CS here (false)"
@@ -154,7 +142,7 @@ void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sel
uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
{
sspinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
#endif
@@ -162,7 +150,7 @@ uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_LPC17_SSP1
void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
sspinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
ssp_dumpgpio("lpc17_ssp1select() Entry");
if (devid == SPIDEV_MMCSD)
@@ -190,12 +178,12 @@ uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
if (lpc17_gpioread(LPCXPRESSO_SD_CD) == 0)
{
sspinfo("Returning SPI_STATUS_PRESENT\n");
spiinfo("Returning SPI_STATUS_PRESENT\n");
return SPI_STATUS_PRESENT;
}
}
sspinfo("Returning zero\n");
spiinfo("Returning zero\n");
return 0;
}
#endif
configs/maple/src/stm32_spi.c
-16
View File
@@ -55,22 +55,6 @@
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
configs/mcu123-lpc214x/src/lpc2148_spi1.c
-14
View File
@@ -86,20 +86,6 @@
* Pre-processor Definitions
****************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# ifdef CONFIG_DEBUG_INFO
# define spiinfo llerr
# else
# define spiinfo(x...)
# endif
#else
# define spierr(x...)
# define spiinfo(x...)
#endif
/* Clocking */
#define LPC214X_CCLKFREQ (LPC214X_FOSC*LPC214X_PLL_M)
configs/mikroe-stm32f4/src/stm32_spi.c
-16
View File
@@ -59,22 +59,6 @@
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
configs/mirtoo/src/pic32_spi2.c
-15
View File
@@ -92,21 +92,6 @@
#define GPIO_PGA117_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN7)
#define GPIO_SST25VF032B_CS (GPIO_OUTPUT|GPIO_VALUE_ONE|GPIO_PORTB|GPIO_PIN13)
/* The following enable debug output from this file (needs CONFIG_DEBUG_FEATURES too).
*
* CONFIG_DEBUG_SPI - Define to enable basic SPI debug
*/
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/
configs/ne64badge/src/m9s12_spi.c
-16
View File
@@ -50,22 +50,6 @@
#if defined(CONFIG_HCS12_SPI)
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Enables debug output from this file */
#ifdef CONFIG_DEBUG_SPI
# define spierr llerr
# define spiwarn llwarn
# define spiinfo llinfo
#else
# define spierr(x...)
# define spiwarn(x...)
# define spiinfo(x...)
#endif
/************************************************************************************
* Public Functions
************************************************************************************/

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