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arch/arm/stm32h7: fix stm32_mdio private structure use

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The struct stm32_mdio_bus_s aka g_stm32_mdio_bus
has not been referenced at all, because  mdio_register()
allocates its own structure. Then lower half drivers
receive only their respective part in mdio_read()
and mdio_write() because MDIO_WRITE/MDIO_READ provides
only d->lower to the specific lower level drivers.

Signed-off-by: Pavel Pisa <pisa@fel.cvut.cz>
This commit is contained in:
Pavel Pisa
2026-04-09 01:05:21 +02:00
committed by Michal Lenc
parent 67f1cd288a
commit b6cb94a06d
1 changed files with 13 additions and 12 deletions
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arch/arm/src/stm32h7/stm32_mdio.c
+13 -12
View File
@@ -46,6 +46,7 @@ static void stm32_checksetup(void);
#include <nuttx/mutex.h> #include <nuttx/mutex.h>
#include <nuttx/config.h> #include <nuttx/config.h>
#include <nuttx/nuttx.h>
#include <nuttx/debug.h> #include <nuttx/debug.h>
#include <errno.h> #include <errno.h>
@@ -58,9 +59,9 @@ static void stm32_checksetup(void);
* Private Types * Private Types
****************************************************************************/ ****************************************************************************/
struct stm32_mdio_bus_s struct stm32_mdio_lowerhalf_s
{ {
struct mdio_lowerhalf_s *lower; struct mdio_lowerhalf_s base;
/* MDIO bus timeout in milliseconds */ /* MDIO bus timeout in milliseconds */
@@ -88,14 +89,12 @@ const struct mdio_ops_s g_stm32_mdio_ops =
.reset = NULL, .reset = NULL,
}; };
struct mdio_lowerhalf_s g_stm32_mdio_lowerhalf = struct stm32_mdio_lowerhalf_s g_stm32_mdio_lowerhalf =
{ {
.ops = &g_stm32_mdio_ops .base =
}; {
.ops = &g_stm32_mdio_ops
struct stm32_mdio_bus_s g_stm32_mdio_bus = },
{
.lower = &g_stm32_mdio_lowerhalf,
.timeout = 10 .timeout = 10
}; };
@@ -110,7 +109,8 @@ static int stm32_c22_read(struct mdio_lowerhalf_s *dev, uint8_t phydev,
uint32_t regval; uint32_t regval;
int retval = -ETIMEDOUT; int retval = -ETIMEDOUT;
struct stm32_mdio_bus_s *priv = (struct stm32_mdio_bus_s *)dev; struct stm32_mdio_lowerhalf_s *priv =
container_of(dev, struct stm32_mdio_lowerhalf_s, base);
/* Configure the MACMDIOAR register, preserving CSR Clock Range CR[3:0] /* Configure the MACMDIOAR register, preserving CSR Clock Range CR[3:0]
* bits * bits
@@ -161,7 +161,8 @@ static int stm32_c22_write(struct mdio_lowerhalf_s *dev, uint8_t phydev,
uint32_t regval; uint32_t regval;
int retval = -ETIMEDOUT; int retval = -ETIMEDOUT;
struct stm32_mdio_bus_s *priv = (struct stm32_mdio_bus_s *)dev; struct stm32_mdio_lowerhalf_s *priv =
container_of(dev, struct stm32_mdio_lowerhalf_s, base);
/* Configure the MACMDIOAR register, preserving CSR Clock Range CR[3:0] /* Configure the MACMDIOAR register, preserving CSR Clock Range CR[3:0]
* bits * bits
@@ -228,5 +229,5 @@ static int stm32_c22_write(struct mdio_lowerhalf_s *dev, uint8_t phydev,
struct mdio_bus_s *stm32_mdio_bus_initialize(void) struct mdio_bus_s *stm32_mdio_bus_initialize(void)
{ {
return mdio_register(&g_stm32_mdio_lowerhalf); return mdio_register(&g_stm32_mdio_lowerhalf.base);
} }