diff --git a/boards/hc/m9s12/demo9s12ne64/include/board.h b/boards/hc/m9s12/demo9s12ne64/include/board.h
index 037e412a6e0..5c7b7a18bc0 100644
--- a/boards/hc/m9s12/demo9s12ne64/include/board.h
+++ b/boards/hc/m9s12/demo9s12ne64/include/board.h
@@ -43,9 +43,9 @@
 /* PLL Settings
  *
  * SYNR register controls the multiplication factor of the PLL.
- * If the PLL is on, the count in the loop divider (SYNR) register effectively
- * multiplies up the PLL clock (PLLCLK) from the reference frequency by 2 x
- * (SYNR+1).
+ * If the PLL is on, the count in the loop divider (SYNR) register
+ * effectively multiplies up the PLL clock (PLLCLK) from the reference
+ * frequency by 2 x(SYNR+1).
  * PLLCLK will not be below the minimum VCO frequency (fSCM).
  *
  * The REFDV register provides a finer granularity for the PLL multiplier
diff --git a/boards/hc/m9s12/demo9s12ne64/src/demo9s12ne64.h b/boards/hc/m9s12/demo9s12ne64/src/demo9s12ne64.h
index 2e5a4b7ba3f..75751ba28e5 100644
--- a/boards/hc/m9s12/demo9s12ne64/src/demo9s12ne64.h
+++ b/boards/hc/m9s12/demo9s12ne64/src/demo9s12ne64.h
@@ -45,14 +45,15 @@
 #ifndef __ASSEMBLY__
 
 /****************************************************************************
- * Public Functions
+ * Public Functions Definitions
  ****************************************************************************/
 
 /****************************************************************************
  * Name: hcs12_spidev_initialize
  *
  * Description:
- *  Called to configure SPI chip select GPIO pins for the STM3210E-EVAL board.
+ *  Called to configure SPI chip select GPIO pins for the STM3210E-EVAL
+ *  board.
  *
  ****************************************************************************/
 
diff --git a/boards/hc/m9s12/demo9s12ne64/src/m9s12_spi.c b/boards/hc/m9s12/demo9s12ne64/src/m9s12_spi.c
index c5d29b2da65..07fd234ded1 100644
--- a/boards/hc/m9s12/demo9s12ne64/src/m9s12_spi.c
+++ b/boards/hc/m9s12/demo9s12ne64/src/m9s12_spi.c
@@ -56,7 +56,7 @@ void weak_function hcs12_spidev_initialize(void)
  *
  * Description:
  *   The external functions, hcs12_spiselect and hcs12_spistatus must be
- *   provided by board-specific logic.  They are implementations of the select
+ *   provided by board-specific logic. They are implementations of the select
  *   and status methods of the SPI interface defined by struct spi_ops_s (see
  *   include/nuttx/spi/spi.h).
  *   All other methods (including hcs12_spibus_initialize()) are provided by
@@ -66,10 +66,10 @@ void weak_function hcs12_spidev_initialize(void)
  *   1. Provide logic in hcs12_boardinitialize() to configure SPI chip select
  *      pins.
  *   2. Provide hcs12_spiselect() and hcs12_spistatus() functions in your
- *      board-specific logic.  These functions will perform chip selection and
+ *      board-specific logic. These functions will perform chip selection and
  *      status operations using GPIOs in the way your board is configured.
- *   3. Add a calls to hcs12_spibus_initialize() in your low level application
- *      initialization logic
+ *   3. Add a calls to hcs12_spibus_initialize() in your low level
+ *      application initialization logic
  *   4. The handle returned by hcs12_spibus_initialize() may then be used to
  *      bind the SPI driver to higher level logic (e.g., calling
  *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
@@ -77,7 +77,8 @@ void weak_function hcs12_spidev_initialize(void)
  *
  ****************************************************************************/
 
-void hcs12_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void hcs12_spiselect(FAR struct spi_dev_s *dev,
+                     uint32_t devid, bool selected)
 {
 }
 
diff --git a/boards/hc/m9s12/ne64badge/src/m9s12_boot.c b/boards/hc/m9s12/ne64badge/src/m9s12_boot.c
index e3162c0f3e4..f906fabeb9f 100644
--- a/boards/hc/m9s12/ne64badge/src/m9s12_boot.c
+++ b/boards/hc/m9s12/ne64badge/src/m9s12_boot.c
@@ -48,8 +48,8 @@
  *
  * Description:
  *   All HCS12 architectures must provide the following entry point.
- *   This entry point is called early in the initialization - after all memory
- *   has been configured and mapped but before any devices have been
+ *   This entry point is called early in the initialization - after all
+ *   memory has been configured and mapped but before any devices have been
  *   initialized.
  *
  ****************************************************************************/
diff --git a/boards/hc/m9s12/ne64badge/src/m9s12_spi.c b/boards/hc/m9s12/ne64badge/src/m9s12_spi.c
index 7a9eee5233d..889609c48fa 100644
--- a/boards/hc/m9s12/ne64badge/src/m9s12_spi.c
+++ b/boards/hc/m9s12/ne64badge/src/m9s12_spi.c
@@ -56,20 +56,20 @@ void weak_function hcs12_spidev_initialize(void)
  *
  * Description:
  *   The external functions, hcs12_spiselect and hcs12_spistatus must be
- *   provided by board-specific logic.  They are implementations of the select
+ *   provided by board-specific logic. They are implementations of the select
  *   and status methods of the SPI interface defined by struct spi_ops_s (see
  *   include/nuttx/spi/spi.h).
  *   All other methods (including hcs12_spibus_initialize())
- *   are provided by common HCS12 logic.  To use this common SPI logic on your
+ *   are provided by common HCS12 logic. To use this common SPI logic on your
  *   board:
  *
  *   1. Provide logic in hcs12_boardinitialize() to configure SPI chip select
  *      pins.
  *   2. Provide hcs12_spiselect() and hcs12_spistatus() functions in your
- *      board-specific logic.  These functions will perform chip selection and
+ *      board-specific logic. These functions will perform chip selection and
  *      status operations using GPIOs in the way your board is configured.
- *   3. Add a calls to hcs12_spibus_initialize() in your low level application
- *      initialization logic
+ *   3. Add a calls to hcs12_spibus_initialize() in your low level
+ *      application initialization logic
  *   4. The handle returned by hcs12_spibus_initialize() may then be used to
  *      bind the SPI driver to higher level logic (e.g., calling
  *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
@@ -77,7 +77,8 @@ void weak_function hcs12_spidev_initialize(void)
  *
  ****************************************************************************/
 
-void hcs12_spiselect(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
+void hcs12_spiselect(FAR struct spi_dev_s *dev,
+                     uint32_t devid, bool selected)
 {
 }
 
diff --git a/boards/hc/m9s12/ne64badge/src/ne64badge.h b/boards/hc/m9s12/ne64badge/src/ne64badge.h
index 1366d05f787..623d540a74d 100644
--- a/boards/hc/m9s12/ne64badge/src/ne64badge.h
+++ b/boards/hc/m9s12/ne64badge/src/ne64badge.h
@@ -160,14 +160,15 @@
 #ifndef __ASSEMBLY__
 
 /****************************************************************************
- * Public Functions
+ * Public Functions Definitions
  ****************************************************************************/
 
 /****************************************************************************
  * Name: hcs12_spidev_initialize
  *
  * Description:
- *  Called to configure SPI chip select GPIO pins for the STM3210E-EVAL board.
+ *  Called to configure SPI chip select GPIO pins for the STM3210E-EVAL
+ *  board.
  *
  ****************************************************************************/
 
diff --git a/boards/mips/pic32mx/mirtoo/include/board.h b/boards/mips/pic32mx/mirtoo/include/board.h
index 456c4630fda..091296fe2ef 100644
--- a/boards/mips/pic32mx/mirtoo/include/board.h
+++ b/boards/mips/pic32mx/mirtoo/include/board.h
@@ -93,7 +93,7 @@
  * controllable from software.
  */
 
- /* LED index values for use with board_userled() */
+/* LED index values for use with board_userled() */
 
 #define PIC32MX_MIRTOO_LED0     0
 #define PIC32MX_MIRTOO_LED1     1
diff --git a/boards/mips/pic32mx/mirtoo/src/mirtoo.h b/boards/mips/pic32mx/mirtoo/src/mirtoo.h
index fb5003dca4c..25c48e1cfaf 100644
--- a/boards/mips/pic32mx/mirtoo/src/mirtoo.h
+++ b/boards/mips/pic32mx/mirtoo/src/mirtoo.h
@@ -30,6 +30,7 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+
 /* Configuration ************************************************************/
 
 /****************************************************************************
diff --git a/boards/mips/pic32mx/mirtoo/src/pic32_adc.c b/boards/mips/pic32mx/mirtoo/src/pic32_adc.c
index 00350cef613..7b324a950a7 100644
--- a/boards/mips/pic32mx/mirtoo/src/pic32_adc.c
+++ b/boards/mips/pic32mx/mirtoo/src/pic32_adc.c
@@ -39,8 +39,8 @@
 
 /* Configuration ************************************************************/
 
-/* The Mirtoo features a PGA117 amplifier/multipexer that can be configured to
- * bring any analog signal from PORT0,.. PORT7 to pin 19 of the PIC32MX:
+/* The Mirtoo features a PGA117 amplifier/multipexer that can be configured
+ * to bring any analog signal from PORT0,.. PORT7 to pin 19 of the PIC32MX:
  *
  * --- ------------------------------------------------ ---------------------
  * PIN PIC32 SIGNAL(s)                                  BOARD SIGNAL/USAGE
diff --git a/boards/mips/pic32mx/mirtoo/src/pic32_spi2.c b/boards/mips/pic32mx/mirtoo/src/pic32_spi2.c
index db257ec7216..9f82eb83797 100644
--- a/boards/mips/pic32mx/mirtoo/src/pic32_spi2.c
+++ b/boards/mips/pic32mx/mirtoo/src/pic32_spi2.c
@@ -64,7 +64,8 @@
  *  SCK2   SCK    PGA117 and SST25VF032B     SPI2 clock
  *
  *  RB7   ~CSAI   PGA117                     PGA117 chip select (active low)
- *  RB13  ~CSM    SST25VF032B                SST25VF032B chip select (active low)
+ *  RB13  ~CSM    SST25VF032B                SST25VF032B chip select
+ *                                           (active low)
  */
 
 #define GPIO_SI             (GPIO_OUTPUT|GPIO_PORTA|GPIO_PIN1)
diff --git a/boards/mips/pic32mx/pic32mx-starterkit/src/pic32mx_spi.c b/boards/mips/pic32mx/pic32mx-starterkit/src/pic32mx_spi.c
index 5971793797c..0e9bc89ee5b 100644
--- a/boards/mips/pic32mx/pic32mx-starterkit/src/pic32mx_spi.c
+++ b/boards/mips/pic32mx/pic32mx-starterkit/src/pic32mx_spi.c
@@ -47,7 +47,8 @@
  * Name: pic32mx_spidev_initialize
  *
  * Description:
- *   Called to configure SPI chip select GPIO pins for the Sure PIC32MX board.
+ *   Called to configure SPI chip select GPIO pins for the Sure PIC32MX
+ *   board.
  *
  ****************************************************************************/
 
@@ -106,8 +107,10 @@ uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
-int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev,
+                        uint32_t devid, bool cmd)
 {
 #warning "Missing logic"
   return 0;
@@ -130,6 +133,7 @@ uint8_t pic32mx_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mx_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -154,6 +158,7 @@ uint8_t pic32mx_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mx_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -178,6 +183,7 @@ uint8_t pic32mx_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mx_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
diff --git a/boards/mips/pic32mx/pic32mx7mmb/include/board.h b/boards/mips/pic32mx/pic32mx7mmb/include/board.h
index bcadb784a29..88be543ff41 100644
--- a/boards/mips/pic32mx/pic32mx7mmb/include/board.h
+++ b/boards/mips/pic32mx/pic32mx7mmb/include/board.h
@@ -157,6 +157,7 @@
 #define LED_NVALUES            6
 
 /* Switch definitions *******************************************************/
+
 /* The Mikroelektronika PIC32MX7 MMB has a joystick:
  *
  * ------ -------- --------------------------
diff --git a/boards/mips/pic32mx/pic32mx7mmb/src/pic32_mio283qt2.c b/boards/mips/pic32mx/pic32mx7mmb/src/pic32_mio283qt2.c
index 547bfe14159..5ec2e006e45 100644
--- a/boards/mips/pic32mx/pic32mx7mmb/src/pic32_mio283qt2.c
+++ b/boards/mips/pic32mx/pic32mx7mmb/src/pic32_mio283qt2.c
@@ -59,37 +59,38 @@
 
 /* PIC32MX7MMB LCD Hardware Definitions *************************************/
 
-/* --- ---------------------------------- -------------------- ------------------------
- * PIN CONFIGURATIONS                     SIGNAL NAME          ON-BOARD CONNECTIONS
- *     (Family Data Sheet Table 1-1)     (PIC32MX7 Schematic)
- * --- ---------------------------------- -------------------- ------------------------
- *   6 RC1/T2CK                           LCD_RST              TFT display
- *  43 PMA1/AETXD3/AN14/ERXD2/PMALH/RB14  LCD-CS#              TFT display, HDR2 pin 3
- *  77 OC3/RD2                            LCD_BLED             LCD backlight LED
- *  44 PMA0/AETXD2/AN15/CN12/ERXD3/OCFB/  LCD-RS               TFT display
+/* --- ---------------------------------- ---------- --------------
+ * PIN CONFIGURATIONS                     SIGNAL NAME   ON-BOARD
+ *     (Family Data Sheet Table 1-1)     (PIC32MX7      CONNECTIONS
+ *                                        Schematic)
+ * --- ---------------------------------- ---------- ------------------------
+ *   6 RC1/T2CK                           LCD_RST    TFT display
+ *  43 PMA1/AETXD3/AN14/ERXD2/PMALH/RB14  LCD-CS#    TFT display, HDR2 pin 3
+ *  77 OC3/RD2                            LCD_BLED   LCD backlight LED
+ *  44 PMA0/AETXD2/AN15/CN12/ERXD3/OCFB/  LCD-RS     TFT display
  *     PMALL/RB15
  *
- *  34 PMA13/AN10/RB10/CVREFOUT           LCD-YD               TFT display
- *  35 PMA12/AETXERR/AN11/ERXERR/RB11     LCD-XR               TFT display
- *  41 PMA11/AECRS/AN12/ERXD0/RB12        LCD-YU               TFT display
- *  42 PMA10/AECOL/AN13/ERXD1/RB13        LCD-XL               TFT display
+ *  34 PMA13/AN10/RB10/CVREFOUT           LCD-YD     TFT display
+ *  35 PMA12/AETXERR/AN11/ERXERR/RB11     LCD-XR     TFT display
+ *  41 PMA11/AECRS/AN12/ERXD0/RB12        LCD-YU     TFT display
+ *  42 PMA10/AECOL/AN13/ERXD1/RB13        LCD-XL     TFT display
  *
- *  93 PMD0/RE0                           PMPD0                TFT display, HDR1 pin 18
- *  94 PMD1/RE1                           PMPD1                TFT display, HDR1 pin 17
- *  98 PMD2/RE2                           PMPD2                TFT display, HDR1 pin 16
- *  99 PMD3/RE3                           PMPD3                TFT display, HDR1 pin 15
- * 100 PMD4/RE4                           PMPD4                TFT display, HDR1 pin 14
- *   3 PMD5/RE5                           PMPD5                TFT display, HDR1 pin 13
- *   4 PMD6/RE6                           PMPD6                TFT display, HDR1 pin 12
- *   5 PMD7/RE7                           PMPD7                TFT display, HDR1 pin 11
- *  90 PMD8/C2RX/RG0                      PMPD8                TFT display, HDR1 pin 10
- *  89 PMD9/C2TX/ETXERR/RG1               PMPD9                TFT display, HDR1 pin 9
- *  88 PMD10/C1TX/ETXD0/RF1               PMPD10               TFT display, HDR1 pin 8
- *  87 PMD11/C1RX/ETXD1/RF0               PMPD11               TFT display, HDR1 pin 7
- *  79 PMD12/ETXD2/IC5/RD12               PMPD12               TFT display, HDR1 pin 6
- *  80 PMD13/CN19/ETXD3/RD13              PMPD13               TFT display, HDR1 pin 5
- *  83 PMD14/CN15/ETXEN/RD6               PMPD14               TFT display, HDR1 pin 4
- *  84 PMD15/CN16/ETXCLK/RD7              PMPD15               TFT display, HDR1 pin 3
+ *  93 PMD0/RE0                           PMPD0      TFT display, HDR1 pin 18
+ *  94 PMD1/RE1                           PMPD1      TFT display, HDR1 pin 17
+ *  98 PMD2/RE2                           PMPD2      TFT display, HDR1 pin 16
+ *  99 PMD3/RE3                           PMPD3      TFT display, HDR1 pin 15
+ * 100 PMD4/RE4                           PMPD4      TFT display, HDR1 pin 14
+ *   3 PMD5/RE5                           PMPD5      TFT display, HDR1 pin 13
+ *   4 PMD6/RE6                           PMPD6      TFT display, HDR1 pin 12
+ *   5 PMD7/RE7                           PMPD7      TFT display, HDR1 pin 11
+ *  90 PMD8/C2RX/RG0                      PMPD8      TFT display, HDR1 pin 10
+ *  89 PMD9/C2TX/ETXERR/RG1               PMPD9      TFT display, HDR1 pin 9
+ *  88 PMD10/C1TX/ETXD0/RF1               PMPD10     TFT display, HDR1 pin 8
+ *  87 PMD11/C1RX/ETXD1/RF0               PMPD11     TFT display, HDR1 pin 7
+ *  79 PMD12/ETXD2/IC5/RD12               PMPD12     TFT display, HDR1 pin 6
+ *  80 PMD13/CN19/ETXD3/RD13              PMPD13     TFT display, HDR1 pin 5
+ *  83 PMD14/CN15/ETXEN/RD6               PMPD14     TFT display, HDR1 pin 4
+ *  84 PMD15/CN16/ETXCLK/RD7              PMPD15     TFT display, HDR1 pin 3
  *
  *  82 CN14/PMRD/RD5                      PMPRD
  *  81 CN13/OC5/PMWR/RD4                  PMPWR
diff --git a/boards/mips/pic32mx/pic32mx7mmb/src/pic32mx7mmb.h b/boards/mips/pic32mx/pic32mx7mmb/src/pic32mx7mmb.h
index a048491c424..b6299f3f192 100644
--- a/boards/mips/pic32mx/pic32mx7mmb/src/pic32mx7mmb.h
+++ b/boards/mips/pic32mx/pic32mx7mmb/src/pic32mx7mmb.h
@@ -80,7 +80,8 @@
  *   RD0   SPO1    SD card slot              SPI1 data OUT
  *   RD10  SCK1    SD card slot              SD card, SPI clock
  *
- *   RA9   SD_CS#  SD card slot              SD card, SPI chip select (active low)
+ *   RA9   SD_CS#  SD card slot              SD card, SPI chip select
+ *                                           (active low)
  *   RG6   SD_WP   SD card slot              SD card, write protect
  *   RG7   SD_CD#  SD card slot              SD card, card detect (not)
  */
diff --git a/boards/mips/pic32mx/sure-pic32mx/include/board.h b/boards/mips/pic32mx/sure-pic32mx/include/board.h
index 798a05c7565..2da92dd74b0 100644
--- a/boards/mips/pic32mx/sure-pic32mx/include/board.h
+++ b/boards/mips/pic32mx/sure-pic32mx/include/board.h
@@ -93,22 +93,24 @@
  * D9  "Flash"  Yellow  RF0 Low illuminates
  * D10 "Error"  Red     RF1 Low illuminates
  */
-                                  /* ON                  OFF                 */
-                                  /* USB SD  FLASH ERROR USB SD  FLASH ERROR */
-#define LED_STARTED            0  /* OFF OFF OFF   OFF   --- --- ---   ---   */
-#define LED_HEAPALLOCATE       1  /* ON  OFF N/C   N/C   --- --- ---   ---   */
-#define LED_IRQSENABLED        2  /* OFF ON  N/C   N/C   --- --- ---   ---   */
-#define LED_STACKCREATED       3  /* ON  ON  N/C   N/C   --- --- ---   ---   */
-#define LED_INIRQ              4  /* N/C N/C ON    N/C   N/C N/C OFF   N/C   */
-#define LED_SIGNAL             4  /* N/C N/C ON    N/C   N/C N/C OFF   N/C   */
-#define LED_ASSERTION          4  /* N/C N/C ON    N/C   N/C N/C OFF   N/C   */
-#define LED_PANIC              5  /* N/C N/C N/C   ON    N/C N/C N/C   OFF   */
-#define LED_NVALUES            6
+
+                                  /* ON                  OFF               */
+
+                                /* USB SD  FLASH ERROR USB SD  FLASH ERROR */
+#define LED_STARTED          0  /* OFF OFF OFF   OFF   --- --- ---   ---   */
+#define LED_HEAPALLOCATE     1  /* ON  OFF N/C   N/C   --- --- ---   ---   */
+#define LED_IRQSENABLED      2  /* OFF ON  N/C   N/C   --- --- ---   ---   */
+#define LED_STACKCREATED     3  /* ON  ON  N/C   N/C   --- --- ---   ---   */
+#define LED_INIRQ            4  /* N/C N/C ON    N/C   N/C N/C OFF   N/C   */
+#define LED_SIGNAL           4  /* N/C N/C ON    N/C   N/C N/C OFF   N/C   */
+#define LED_ASSERTION        4  /* N/C N/C ON    N/C   N/C N/C OFF   N/C   */
+#define LED_PANIC            5  /* N/C N/C N/C   ON    N/C N/C N/C   OFF   */
+#define LED_NVALUES          6
 
 /* The Sure DB-DP11212 PIC32 General Purpose Demo Board does not have any
  * user controllable LEDs, but does does have a segment LED display.
- * That display is however, obscured by the larger segment display attached to
- * the board and, so, is not supported.
+ * That display is however, obscured by the larger segment display attached
+ * to the board and, so, is not supported.
  */
 
 /* For distinguishing individual LEDs */
@@ -122,9 +124,9 @@
 
 /* The Sure PIC32MX board has three buttons.
  *
- * SW1  (SW_UP, left arrow)          RB3 Pulled high, Grounded/low when depressed
- * SW2  (SW_DOWN, down/right arrow)  RB2 Pulled high, Grounded/low when depressed
- * SW3  (SW_OK, right arrow)         RB4 Pulled high, Grounded/low when depressed
+ * SW1  (SW_UP, left arrow)          RB3 Pulled high, GND/low when depressed
+ * SW2  (SW_DOWN, down/right arrow)  RB2 Pulled high, GND/low when depressed
+ * SW3  (SW_OK, right arrow)         RB4 Pulled high, GND/low when depressed
  */
 
 #define BUTTON_SW1             0
@@ -152,7 +154,8 @@
 
 #ifdef __cplusplus
 #define EXTERN extern "C"
-extern "C" {
+extern "C"
+{
 #else
 #define EXTERN extern
 #endif
diff --git a/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_lcd1602.c b/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_lcd1602.c
index 7f04ffbd374..1063ac45c0a 100644
--- a/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_lcd1602.c
+++ b/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_lcd1602.c
@@ -260,7 +260,8 @@ static void lcd_dumpstream(FAR const char *msg,
 
 static int lcd_getstream(FAR struct lib_instream_s *instream)
 {
-  FAR struct lcd_instream_s *lcdstream = (FAR struct lcd_instream_s *)instream;
+  FAR struct lcd_instream_s *lcdstream =
+                            (FAR struct lcd_instream_s *)instream;
 
   DEBUGASSERT(lcdstream && lcdstream->buffer);
   if (lcdstream->nbytes > 0)
@@ -564,7 +565,9 @@ static void lcd_action(enum slcdcode_e code, uint8_t count)
         {
           int tmp;
 
-          /* If we are at the home position or if the count is zero, then ignore the action */
+          /* If we are at the home position or if the count is zero,
+           * then ignore the action
+           */
 
           if (g_lcd1602.curcol < 1 || count < 1)
             {
@@ -603,7 +606,9 @@ static void lcd_action(enum slcdcode_e code, uint8_t count)
             nchars = LCD_NCOLUMNS - g_lcd1602.curcol;
             nmove  = MIN(nchars, count) - 1;
 
-            /* Move all characters after the current cursor position left by 'nmove' characters */
+            /* Move all characters after the current cursor position left by
+             * 'nmove' characters
+             */
 
             for (i = g_lcd1602.curcol + nmove; i < LCD_NCOLUMNS - 1; i++)
               {
@@ -636,7 +641,9 @@ static void lcd_action(enum slcdcode_e code, uint8_t count)
                 last = LCD_NCOLUMNS - 1;
               }
 
-            /* Erase N characters after the current cursor position left by one */
+            /* Erase N characters after the current cursor position left by
+             * one
+             */
 
             for (i = g_lcd1602.curcol; i < last; i++)
               {
@@ -662,7 +669,9 @@ static void lcd_action(enum slcdcode_e code, uint8_t count)
         {
           int i;
 
-          /* Erase characters after the current cursor position to the end of the line */
+          /* Erase characters after the current cursor position to the end of
+           * the line
+           */
 
           for (i = g_lcd1602.curcol; i < LCD_NCOLUMNS; i++)
             {
@@ -834,7 +843,8 @@ static ssize_t lcd_write(FAR struct file *filep,  FAR const char *buffer,
   /* Now decode and process every byte in the input buffer */
 
   memset(&state, 0, sizeof(struct slcdstate_s));
-  while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF)
+  while ((result = slcd_decode(&instream.stream,
+         &state, &ch, &count)) != SLCDRET_EOF)
     {
       lcdinfo("slcd_decode returned result=%d char=%d count=%d\n",
               result, ch, count);
@@ -910,7 +920,8 @@ static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SLCDIOC_GETATTRIBUTES:
         {
-          FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg);
+          FAR struct slcd_attributes_s *attr =
+                            (FAR struct slcd_attributes_s *)((uintptr_t)arg);
 
           lcdinfo("SLCDIOC_GETATTRIBUTES:\n");
 
@@ -935,9 +946,11 @@ static int lcd_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
 
       case SLCDIOC_CURPOS:
         {
-          FAR struct slcd_curpos_s *curpos = (FAR struct slcd_curpos_s *)((uintptr_t)arg);
+          FAR struct slcd_curpos_s *curpos =
+                              (FAR struct slcd_curpos_s *)((uintptr_t)arg);
 
-          lcdinfo("SLCDIOC_CURPOS: row=%d column=%d\n", g_lcd1602.currow, g_lcd1602.curcol);
+          lcdinfo("SLCDIOC_CURPOS: row=%d column=%d\n",
+                   g_lcd1602.currow, g_lcd1602.curcol);
 
           if (!curpos)
             {
@@ -1007,12 +1020,13 @@ static int lcd_poll(FAR struct file *filep, FAR struct pollfd *fds,
     {
       /* Data is always available to be read */
 
-      fds->revents |= (fds->events & (POLLIN|POLLOUT));
+      fds->revents |= (fds->events & (POLLIN | POLLOUT));
       if (fds->revents != 0)
         {
           nxsem_post(fds->sem);
         }
     }
+
   return OK;
 }
 
@@ -1054,7 +1068,7 @@ int up_lcd1602_initialize(void)
       g_lcd1602.brightness = 0;                 /* Remember the light is off */
 
       /* A small delay is necessary between when GPIO_LCD_E was set up as an
-       * output with initial value of 0 and this operation.  That delay should
+       * output with initial value of 0 and this operation. That delay should
        * be well covered by the intervening GPIO configurations.
        */
 
@@ -1066,8 +1080,8 @@ int up_lcd1602_initialize(void)
 
       up_mdelay(5);
 
-      /* Select the 8-bit interface. BF cannot be checked before this command.
-       * This needs to be done a few times with some magic delays.
+      /* Select the 8-bit interface. BF cannot be checked before this
+       * command. This needs to be done a few times with some magic delays.
        *
        * Function set: 5x7 Style | N=2R | DL=8D
        */
diff --git a/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_spi.c b/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_spi.c
index f9fe9fe145d..57cfc353f3d 100644
--- a/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_spi.c
+++ b/boards/mips/pic32mx/sure-pic32mx/src/pic32mx_spi.c
@@ -112,14 +112,15 @@
  * Name: pic32mx_spidev_initialize
  *
  * Description:
- *   Called to configure SPI chip select GPIO pins for the Sure PIC32MX board.
+ *   Called to configure SPI chip select GPIO pins for the Sure PIC32MX
+ *   board.
  *
  ****************************************************************************/
 
 void weak_function pic32mx_spidev_initialize(void)
 {
-  /* Configure the SPI2 chip select (CS) GPIO output, and the card detect (CD)
-   * and write protect (WP) inputs.
+  /* Configure the SPI2 chip select (CS) GPIO output, and the card detect
+   * (CD) and write protect (WP) inputs.
    */
 
 #ifdef PIC32_HAVE_SD
diff --git a/boards/mips/pic32mz/flipnclick-pic32mz/include/board.h b/boards/mips/pic32mz/flipnclick-pic32mz/include/board.h
index f794c8ef01a..a6f0b1ec9f1 100644
--- a/boards/mips/pic32mz/flipnclick-pic32mz/include/board.h
+++ b/boards/mips/pic32mz/flipnclick-pic32mz/include/board.h
@@ -279,10 +279,10 @@
  * 2) Mikroe Click Serial Shield.  There are four Click bus connectors with
  *    serial ports available as follows:
  *
- *    Click A:  UART4 UART4_RX and UART4_TX which are RG9 and RE3, respectively.
- *    Click B:  UART3 UART3_RX and UART3_TX which are RF0 and RF1, respectively.
- *    Click C:  UART1 UART1_RX and UART1_TX which are RC1 and RE5, respectively.
- *    Click D:  UART2 UART2_RX and UART2_TX which are RC3 and RC2, respectively.
+ *  Click A: UART4 UART4_RX and UART4_TX which are RG9 and RE3, respectively.
+ *  Click B: UART3 UART3_RX and UART3_TX which are RF0 and RF1, respectively.
+ *  Click C: UART1 UART1_RX and UART1_TX which are RC1 and RE5, respectively.
+ *  Click D: UART2 UART2_RX and UART2_TX which are RC3 and RC2, respectively.
  */
 
 #define BOARD_U1RX_PPS  U1RXR_RPC1
diff --git a/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_appinit.c b/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_appinit.c
index 333c66d052d..d289e104310 100644
--- a/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_appinit.c
+++ b/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_appinit.c
@@ -61,8 +61,8 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-  /* If CONFIG_BOARD_LATE_INITIALIZE is selected then board initialization was
-   * already performed in board_late_initialize.
+  /* If CONFIG_BOARD_LATE_INITIALIZE is selected then board initialization
+   * was already performed in board_late_initialize.
    */
 
 #ifndef CONFIG_BOARD_LATE_INITIALIZE
diff --git a/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_autoleds.c b/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_autoleds.c
index cfd1a359399..f8d33afde01 100644
--- a/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_autoleds.c
+++ b/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_autoleds.c
@@ -102,7 +102,14 @@
 
 static void board_autoled_setone(int ledndx)
 {
-  bool ledon[NLEDS] = {false, false, false, false, false};
+  bool ledon[NLEDS] =
+    {
+      false,
+      false,
+      false,
+      false,
+      false
+    };
 
   ledon[ledndx] = true;
   pic32mz_gpiowrite(GPIO_LED_L, ledon[INDEX_LED_L]);
diff --git a/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_boot.c b/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_boot.c
index e5b4a9d6bf2..630db87763f 100644
--- a/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_boot.c
+++ b/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_boot.c
@@ -40,9 +40,9 @@
  *
  * Description:
  *  All PIC32MZ architectures must provide the following entry point.
- *  This entry point is called early in the initialization -- after all memory
- *  has been configured and mapped but before any devices have been
- * initialized.
+ *  This entry point is called early in the initialization -- after all
+ *  memory has been configured and mapped but before any devices have been
+ *  initialized.
  *
  ****************************************************************************/
 
@@ -73,7 +73,7 @@ void pic32mz_boardinitialize(void)
  * Description:
  *   If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
  *   initialization call will be performed in the boot-up sequence to a
- *   function called board_late_initialize().  board_late_initialize() will be
+ *   function called board_late_initialize(). board_late_initialize() will be
  *   called immediately after up_initialize() is called and just before the
  *   initial application is started.  This additional initialization phase
  *   may be used, for example, to initialize board-specific device drivers.
diff --git a/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_spi.c b/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_spi.c
index 192e60f383b..ddf9a3395ff 100644
--- a/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_spi.c
+++ b/boards/mips/pic32mz/flipnclick-pic32mz/src/pic32mz_spi.c
@@ -47,7 +47,8 @@
  * Name: pic32mz_spidev_initialize
  *
  * Description:
- *   Called to configure SPI chip select GPIO pins for the Sure PIC32MZ board.
+ *   Called to configure SPI chip select GPIO pins for the Sure PIC32MZ
+ *   board.
  *
  ****************************************************************************/
 
@@ -85,8 +86,8 @@ void weak_function pic32mz_spidev_initialize(void)
  *      the way your board is configured.
  *   3. Add a call to pic32mz_spibus_initialize() in your low level
  *      application initialization logic
- *   4. The handle returned by pic32mz_spibus_initialize() may then be used to
- *      bind the SPI driver to higher level logic (e.g., calling
+ *   4. The handle returned by pic32mz_spibus_initialize() may then be used
+ *      to bind the SPI driver to higher level logic (e.g., calling
  *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
  *      the SPI MMC/SD driver).
  *
@@ -119,6 +120,7 @@ uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
   spiinfo("Returning nothing\n");
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -132,8 +134,8 @@ int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 
       pic32mz_gpiowrite(GPIO_SSD1306_DC, !cmd);
     }
-#endif
 
+#endif
   return 0;
 }
 #endif
@@ -164,6 +166,7 @@ uint8_t pic32mz_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
   spiinfo("Returning nothing\n");
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -197,6 +200,7 @@ uint8_t pic32mz_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
   spiinfo("Returning nothing\n");
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -218,6 +222,7 @@ uint8_t pic32mz_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
   spiinfo("Returning nothing\n");
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -240,6 +245,7 @@ uint8_t pic32mz_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -264,6 +270,7 @@ uint8_t pic32mz_spi6status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi6cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
diff --git a/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_appinit.c b/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_appinit.c
index 5178f052257..49b815faa7e 100644
--- a/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_appinit.c
+++ b/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_appinit.c
@@ -61,8 +61,8 @@
 
 int board_app_initialize(uintptr_t arg)
 {
-  /* If CONFIG_BOARD_LATE_INITIALIZE is selected then board initialization was
-   * already performed in board_late_initialize.
+  /* If CONFIG_BOARD_LATE_INITIALIZE is selected then board initialization
+   * was already performed in board_late_initialize.
    */
 
 #ifndef CONFIG_BOARD_LATE_INITIALIZE
diff --git a/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_boot.c b/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_boot.c
index bd2283aed96..7a3d05029ff 100644
--- a/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_boot.c
+++ b/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_boot.c
@@ -81,7 +81,7 @@ void pic32mz_boardinitialize(void)
  * Description:
  *   If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
  *   initialization call will be performed in the boot-up sequence to a
- *   function called board_late_initialize().  board_late_initialize() will be
+ *   function called board_late_initialize(). board_late_initialize() will be
  *   called immediately after up_initialize() is called and just before the
  *   initial application is started.  This additional initialization phase
  *   may be used, for example, to initialize board-specific device drivers.
diff --git a/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_spi.c b/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_spi.c
index a8d6f13d058..0e1a4e43a20 100644
--- a/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_spi.c
+++ b/boards/mips/pic32mz/pic32mz-starterkit/src/pic32mz_spi.c
@@ -45,7 +45,8 @@
  * Name: pic32mz_spidev_initialize
  *
  * Description:
- *   Called to configure SPI chip select GPIO pins for the Sure PIC32MZ board.
+ *   Called to configure SPI chip select GPIO pins for the Sure PIC32MZ
+ *   board.
  *
  ****************************************************************************/
 
@@ -76,8 +77,8 @@ void weak_function pic32mz_spidev_initialize(void)
  *      configured.
  *   2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
  *      pic32mz_spiNcmddata() functions in your board-specific logic.
- *      These functions will perform cmd/data selection operations using GPIOs
- *      in the way your board is configured.
+ *      These functions will perform cmd/data selection operations using
+ *      GPIOs in the way your board is configured.
  *   3. Add a call to pic32mz_spibus_initialize() in your low level
  *      application initialization logic
  *   4. The handle returned by pic32mz_spibus_initialize() may then be used
@@ -104,6 +105,7 @@ uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -128,6 +130,7 @@ uint8_t pic32mz_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -152,6 +155,7 @@ uint8_t pic32mz_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -176,6 +180,7 @@ uint8_t pic32mz_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {
@@ -200,6 +205,7 @@ uint8_t pic32mz_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid,
                         bool cmd)
@@ -225,6 +231,7 @@ uint8_t pic32mz_spi6status(FAR struct spi_dev_s *dev, uint32_t devid)
 #warning "Missing logic"
   return 0;
 }
+
 #ifdef CONFIG_SPI_CMDDATA
 int pic32mz_spi6cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
 {