diff --git a/arch/arm/include/stm32l4/stm32l4x6xx_irq.h b/arch/arm/include/stm32l4/stm32l4x6xx_irq.h index 23d5ec42472..b675e786bb8 100644 --- a/arch/arm/include/stm32l4/stm32l4x6xx_irq.h +++ b/arch/arm/include/stm32l4/stm32l4x6xx_irq.h @@ -149,8 +149,8 @@ /* STM32L496xx/4A6xx only: */ #define STM32L4_IRQ_HASH_CRS (STM32L4_IRQ_FIRST+82) /* 82: HASH and CRS global interrupt */ -#define STM32L4_IRQ_I2C4_EV (STM32L4_IRQ_FIRST+83) /* 83: I2C4 event interrupt */ -#define STM32L4_IRQ_I2C4_ER (STM32L4_IRQ_FIRST+84) /* 84: I2C4 error interrupt */ +#define STM32L4_IRQ_I2C4EV (STM32L4_IRQ_FIRST+83) /* 83: I2C4 event interrupt */ +#define STM32L4_IRQ_I2C4ER (STM32L4_IRQ_FIRST+84) /* 84: I2C4 error interrupt */ #define STM32L4_IRQ_DCMI (STM32L4_IRQ_FIRST+85) /* 85: DCMI global interrupt */ #define STM32L4_IRQ_CAN2TX (STM32L4_IRQ_FIRST+86) /* 86: CAN2 TX interrupts */ #define STM32L4_IRQ_CAN2RX0 (STM32L4_IRQ_FIRST+87) /* 87: CAN2 RX0 interrupts */ diff --git a/arch/arm/src/stm32l4/README.txt b/arch/arm/src/stm32l4/README.txt index 944be02c29b..9124d966a78 100644 --- a/arch/arm/src/stm32l4/README.txt +++ b/arch/arm/src/stm32l4/README.txt @@ -26,7 +26,7 @@ SRAM2 : OK; can be included in MM region or left separate for special app : purposes FIREWALL : Code written, to be tested, requires support from ldscript SPI : OK, tested (Including DMA) -I2C : Code written, to be tested (I2C4 missing) +I2C : Code written, to be tested RTC : works QSPI : works in polling, interrupt, DMA, and also memory-mapped modes CAN : OK, tested @@ -57,7 +57,7 @@ SWP : TODO (Single wire protocol master, to connect with NFC enabled LPUART : TODO (Low power UART working with LSE at low baud rates) LPTIMER : TODO (Low power TIMER) OPAMP : TODO (Analog operational amplifier) -COMP : TODO (Analog comparators) +COMP : There is some code (Analog comparators) DFSDM : TODO (Digital Filter and Sigma-Delta Modulator) LCD : TODO (Segment LCD controller) SAIPLL : works (PLL For Digital Audio interfaces, and other things) diff --git a/arch/arm/src/stm32l4/stm32l4_i2c.c b/arch/arm/src/stm32l4/stm32l4_i2c.c index 3468af22be2..6df49e444fa 100644 --- a/arch/arm/src/stm32l4/stm32l4_i2c.c +++ b/arch/arm/src/stm32l4/stm32l4_i2c.c @@ -96,7 +96,8 @@ /* At least one I2C peripheral must be enabled */ -#if defined(CONFIG_STM32L4_I2C1) || defined(CONFIG_STM32L4_I2C2) || defined(CONFIG_STM32L4_I2C3) +#if defined(CONFIG_STM32L4_I2C1) || defined(CONFIG_STM32L4_I2C2) || \ + defined(CONFIG_STM32L4_I2C3) || defined(CONFIG_STM32L4_I2C4) /************************************************************************************ * Pre-processor Definitions @@ -300,6 +301,9 @@ static int stm32l4_i2c2_isr(int irq, void *context, FAR void *arg); #ifdef CONFIG_STM32L4_I2C3 static int stm32l4_i2c3_isr(int irq, void *context, FAR void *arg); #endif +#ifdef CONFIG_STM32L4_I2C4 +static int stm32l4_i2c4_isr(int irq, void *context, FAR void *arg); +#endif #endif static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv); static int stm32l4_i2c_deinit(FAR struct stm32l4_i2c_priv_s *priv); @@ -413,6 +417,36 @@ struct stm32l4_i2c_priv_s stm32l4_i2c3_priv = }; #endif +#ifdef CONFIG_STM32L4_I2C4 +static const struct stm32l4_i2c_config_s stm32l4_i2c4_config = +{ + .base = STM32L4_I2C4_BASE, + .clk_bit = RCC_APB1ENR2_I2C4EN, + .reset_bit = RCC_APB1RSTR2_I2C4RST, + .scl_pin = GPIO_I2C4_SCL, + .sda_pin = GPIO_I2C4_SDA, +#ifndef CONFIG_I2C_POLLED + .isr = stm32l4_i2c4_isr, + .ev_irq = STM32L4_IRQ_I2C4EV, + .er_irq = STM32L4_IRQ_I2C4ER +#endif +}; + +struct stm32l4_i2c_priv_s stm32l4_i2c4_priv = +{ + .ops = &stm32l4_i2c_ops, + .config = &stm32l4_i2c4_config, + .refs = 0, + .intstate = INTSTATE_IDLE, + .msgc = 0, + .msgv = NULL, + .ptr = NULL, + .dcnt = 0, + .flags = 0, + .status = 0 +}; +#endif + /************************************************************************************ * Private Functions ************************************************************************************/ @@ -1541,7 +1575,7 @@ static int stm32l4_i2c2_isr(int irq, void *context, FAR void *arg) * Name: stm32l4_i2c3_isr * * Description: - * I2C2 interrupt service routine + * I2C3 interrupt service routine * ************************************************************************************/ @@ -1551,7 +1585,22 @@ static int stm32l4_i2c3_isr(int irq, void *context, FAR void *arg) return stm32l4_i2c_isr(&stm32l4_i2c3_priv); } #endif + +/************************************************************************************ + * Name: stm32l4_i2c4_isr + * + * Description: + * I2C4 interrupt service routine + * + ************************************************************************************/ + +#ifdef CONFIG_STM32L4_I2C4 +static int stm32l4_i2c4_isr(int irq, void *context, FAR void *arg) +{ + return stm32l4_i2c_isr(&stm32l4_i2c4_priv); +} #endif +#endif /* !CONFIG_I2C_POLLED */ /************************************************************************************ * Private Initialization and Deinitialization @@ -2009,6 +2058,11 @@ FAR struct i2c_master_s *stm32l4_i2cbus_initialize(int port) case 3: priv = (struct stm32l4_i2c_priv_s *)&stm32l4_i2c3_priv; break; +#endif +#ifdef CONFIG_STM32L4_I2C4 + case 4: + priv = (struct stm32l4_i2c_priv_s *)&stm32l4_i2c4_priv; + break; #endif default: return NULL; @@ -2072,5 +2126,5 @@ int stm32l4_i2cbus_uninitialize(FAR struct i2c_master_s * dev) return OK; } -#endif /* CONFIG_STM32L4_I2C1 || CONFIG_STM32L4_I2C2 || CONFIG_STM32L4_I2C3 */ +#endif /* CONFIG_STM32L4_I2C1 || CONFIG_STM32L4_I2C2 || CONFIG_STM32L4_I2C3 || CONFIG_STM32L4_I2C4 */