A10: Serial clock is OSC24M. From Alan Carvalho de Assis

This commit is contained in:
Gregory Nutt
2014-01-10 15:32:42 -06:00
parent 25fd6d1904
commit b301471adb
5 changed files with 15 additions and 24 deletions
+3
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@@ -6409,3 +6409,6 @@
the Viewtool LCD module connected to the Viewtool STM32F103 the Viewtool LCD module connected to the Viewtool STM32F103
board (2014-1-9). board (2014-1-9).
* libc/strings/lib_stpcpy.c: Add stpcpy() (2014-1-9). * libc/strings/lib_stpcpy.c: Add stpcpy() (2014-1-9).
* arch/arm/src/a1x/a1x_lowputc.c and a1x_serial.c: Mystery
finally solved: The A10 serial clock is the OSC24M clock.
Thanks to Alan Carvalho de Assis (2014-1-10)
+6 -3
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@@ -150,10 +150,13 @@
#define CONSOLE_FCR_VALUE (UART_FCR_RT_HALF | UART_FCR_XFIFOR |\ #define CONSOLE_FCR_VALUE (UART_FCR_RT_HALF | UART_FCR_XFIFOR |\
UART_FCR_RFIFOR | UART_FCR_FIFOE) UART_FCR_RFIFOR | UART_FCR_FIFOE)
/* SCLK is the UART input clock */ /* SCLK is the UART input clock.
*
* Through experimentation, it has been found that the serial clock is
* OSC24M
*/
#define A1X_SCLK 0 #define A1X_SCLK 24000000
#warning What is the correct value of SCLK
/* The output baud rate is equal to the serial clock (SCLK) frequency divided /* The output baud rate is equal to the serial clock (SCLK) frequency divided
* by sixteen times the value of the baud rate divisor, as follows: * by sixteen times the value of the baud rate divisor, as follows:
+6 -3
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@@ -77,10 +77,13 @@
#if defined(USE_SERIALDRIVER) && defined(HAVE_UART_DEVICE) #if defined(USE_SERIALDRIVER) && defined(HAVE_UART_DEVICE)
/* SCLK is the UART input clock */ /* SCLK is the UART input clock.
*
* Through experimentation, it has been found that the serial clock is
* OSC24M
*/
#define A1X_SCLK 0 #define A1X_SCLK 24000000
#warning What is the correct value of SCLK
/**************************************************************************** /****************************************************************************
* Private Types * Private Types
-5
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@@ -404,8 +404,3 @@ Configurations
the pcDuino, we are executing out of SDRAM so when the TLBs for the SDRAM the pcDuino, we are executing out of SDRAM so when the TLBs for the SDRAM
region are invalidated that cause a crash. That has not been proven, region are invalidated that cause a crash. That has not been proven,
however. however.
d) nuttx/arch/arm/src/common/up_internal.h: One of the values need for UART
baud calculation is missing (the frequency of SCLK, the UART input clock).
As a result, UART configuration is currently suppressed by a setting in
this file.
@@ -91,16 +91,3 @@ index f82490c..5c16e48 100644
} }
#endif #endif
diff --git a/nuttx/arch/arm/src/common/up_internal.h b/nuttx/arch/arm/src/common/up_internal.h
index eb3ca89..8310d8a 100644
--- a/nuttx/arch/arm/src/common/up_internal.h
+++ b/nuttx/arch/arm/src/common/up_internal.h
@@ -60,7 +60,7 @@
#undef CONFIG_SUPPRESS_INTERRUPTS /* DEFINED: Do not enable interrupts */
#undef CONFIG_SUPPRESS_TIMER_INTS /* DEFINED: No timer */
#undef CONFIG_SUPPRESS_SERIAL_INTS /* DEFINED: Console will poll */
-#undef CONFIG_SUPPRESS_UART_CONFIG /* DEFINED: Do not reconfig UART */
+#define CONFIG_SUPPRESS_UART_CONFIG 1 /* DEFINED: Do not reconfig UART */
#undef CONFIG_DUMP_ON_EXIT /* DEFINED: Dump task state on exit */
/* Determine which (if any) console driver to use. If a console is enabled