diff --git a/arch/arm/src/armv7-a/mmu.h b/arch/arm/src/armv7-a/mmu.h index 3ea2074a7ca..64406572420 100644 --- a/arch/arm/src/armv7-a/mmu.h +++ b/arch/arm/src/armv7-a/mmu.h @@ -605,9 +605,8 @@ #define MMU_L2_VECTROFLAGS (PTE_TYPE_SMALL | PTE_WRITE_THROUGH | PTE_AP_R1) #define MMU_L2_VECTORFLAGS MMU_L2_VECTRWFLAGS -#define MMU_L1_INTERCPUFLAGS (PMD_TYPE_PTE | PMD_PTE_PXN | PMD_DEVICE | \ - PMD_PTE_DOM(0)) -#define MMU_L2_INTERCPUFLAGS (PTE_TYPE_SMALL | PTE_DEVICE | PTE_AP_R1) +#define MMU_L1_INTERCPUFLAGS (PMD_TYPE_PTE | PMD_PTE_PXN | PMD_PTE_DOM(0)) +#define MMU_L2_INTERCPUFLAGS (PTE_TYPE_SMALL | PTE_DEVICE | PTE_AP_RW1) /* Mapped section size */ diff --git a/arch/arm/src/imx6/chip/imx_memorymap.h b/arch/arm/src/imx6/chip/imx_memorymap.h index bd352ce7c79..f71eecb4327 100644 --- a/arch/arm/src/imx6/chip/imx_memorymap.h +++ b/arch/arm/src/imx6/chip/imx_memorymap.h @@ -917,8 +917,7 @@ * the address space. */ -#define INTERCPU_L2_PAGES 1 /* Pages allowed for inter-processor communications */ -#define L2_BASE 0x80000000 /* Beginning of L2 page table */ +#define INTERCPU_L2_PAGES 1 /* Pages allowed for inter-processor communications */ #ifndef CONFIG_ARCH_LOWVECTORS /* Memory map @@ -1051,10 +1050,14 @@ # define IMX_VECTOR_VADDR 0x00000000 #ifdef CONFIG_SMP -/* Inter-processor communications */ +/* Inter-processor communications. + * + * NOTICE that we use the unused virtual address space at 0x00400000 for + * the inter-CPU virtual communication area. + */ # define INTERCPU_PADDR (IMX_VECTOR_PADDR + VECTOR_TABLE_SIZE) -# define INTERCPU_VADDR (INTERCPU_L2_VBASE << 18) +# define INTERCPU_VADDR (0x00400000) # define INTERCPU_SIZE (INTERCPU_L2_PAGES << 12) # define INTERCPU_VSRAM (IMX_VECTOR_VSRAM + VECTOR_TABLE_SIZE) #endif @@ -1075,10 +1078,14 @@ # define IMX_VECTOR_VADDR 0xffff0000 #ifdef CONFIG_SMP -/* Inter-processor communications */ +/* Inter-processor communications + * + * NOTICE that we use the unused virtual address space at 0x00400000 for + * the inter-CPU virtual communication area. + */ # define INTERCPU_PADDR (IMX_VECTOR_PADDR - INTERCPU_L2_SIZE) -# define INTERCPU_VADDR (INTERCPU_L2_VBASE << 18) +# define INTERCPU_VADDR (0x00400000) # define INTERCPU_SIZE (INTERCPU_L2_PAGES << 12) # define INTERCPU_VSRAM (IMX_VECTOR_VSRAM - INTERCPU_L2_SIZE) #endif diff --git a/arch/arm/src/imx6/imx_boot.c b/arch/arm/src/imx6/imx_boot.c index b635a27aec5..59ccb8ac067 100644 --- a/arch/arm/src/imx6/imx_boot.c +++ b/arch/arm/src/imx6/imx_boot.c @@ -256,7 +256,7 @@ static void imx_intercpu_mapping(void) /* Now set the level 1 descriptor to refer to the level 2 page table. */ - mmu_l1_setentry(INTERCPU_PADDR & PMD_PTE_PADDR_MASK, + mmu_l1_setentry(INTERCPU_L2_PBASE & PMD_PTE_PADDR_MASK, INTERCPU_VADDR & PMD_PTE_PADDR_MASK, MMU_L1_INTERCPUFLAGS); } diff --git a/configs/sabre-6quad/scripts/dramboot.ld b/configs/sabre-6quad/scripts/dramboot.ld index b496eb23c42..da35b396aae 100644 --- a/configs/sabre-6quad/scripts/dramboot.ld +++ b/configs/sabre-6quad/scripts/dramboot.ld @@ -44,9 +44,9 @@ MEMORY { + nocache (WR) : ORIGIN = 0x00400000, LENGTH = 4K oscram (W!RX) : ORIGIN = 0x00900000, LENGTH = 256K - 16K ddr3 (W!RX) : ORIGIN = 0x10800000, LENGTH = 1024M - 8M - nocache (WR) : ORIGIN = 0xe0000000, LENGTH = 4K } OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")