From b28d60947aec27a9dd471fe61b4d496b1a69adee Mon Sep 17 00:00:00 2001 From: Tiago Medicci Serrano Date: Thu, 9 Apr 2026 17:16:21 -0300 Subject: [PATCH] boards/xtensa/esp32/esp32-devkitc: Fix psram_usrheap defconfig When both CONFIG_ESP32_SPIRAM and CONFIG_ESP32_SPIRAM_USER_HEAP are selected, the device must not select CONFIG_NSH_ARCHINIT. Instead, CONFIG_BOARD_LATE_INITIALIZE must be selected. This is necessary because the SPI flash initialization disables the cache, and only internal memory is then accessible. So, if the SPI flash initialization is performed by the entry task (nsh_main, a regular task), it would use the user heap to allocate memory, which would cause a system crash when the cache is disabled. On the other hand, by selecting CONFIG_BOARD_LATE_INITIALIZE, a kernel thread is dedicated to perform the initialization, and the cache can be safely disabled. Signed-off-by: Tiago Medicci Serrano --- .../xtensa/esp32/esp32-devkitc/configs/psram_usrheap/defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/psram_usrheap/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/psram_usrheap/defconfig index cb9e5efc38b..be80b959edc 100644 --- a/boards/xtensa/esp32/esp32-devkitc/configs/psram_usrheap/defconfig +++ b/boards/xtensa/esp32/esp32-devkitc/configs/psram_usrheap/defconfig @@ -21,6 +21,7 @@ CONFIG_ARCH_MINIMAL_VECTORTABLE_DYNAMIC=y CONFIG_ARCH_NUSER_INTERRUPTS=2 CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH_XTENSA=y +CONFIG_BOARD_LATE_INITIALIZE=y CONFIG_BOARD_LOOPSPERMSEC=16717 CONFIG_BUILTIN=y CONFIG_ESP32_SPIFLASH=y @@ -43,7 +44,6 @@ CONFIG_IOB_THROTTLE=8 CONFIG_LINE_MAX=64 CONFIG_MM_IOB=y CONFIG_MM_REGIONS=4 -CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_READLINE=y