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Fix nuttx coding style

Browse Source 
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.
This commit is contained in:
simbit18
2023-07-13 15:50:40 +02:00
committed by Xiang Xiao
parent d8797bde4e
commit b0965ab963
33 changed files with 418 additions and 424 deletions
Download Patch File Download Diff File Expand all files Collapse all files
boards/arm/cxd56xx/drivers/sensors/bmi160_scu.c
+2 -2
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@@ -205,9 +205,9 @@
/* Register 0x7e - CMD */
#define ACCEL_PM_SUSPEND (0X10)
#define ACCEL_PM_SUSPEND (0X10)
#define ACCEL_PM_NORMAL (0x11)
#define ACCEL_PM_LOWPOWER (0X12)
#define ACCEL_PM_LOWPOWER (0X12)
#define GYRO_PM_SUSPEND (0x14)
#define GYRO_PM_NORMAL (0x15)
#define GYRO_PM_FASTSTARTUP (0x17)
boards/arm/cxd56xx/spresense/include/cxd56_gpioif.h
+9 -9
View File
@@ -51,20 +51,20 @@ extern "C"
* Pin floating, pull up, pull down definitions
*/
#define PIN_FLOAT (0) /**< Floating */
#define PIN_PULLUP (1) /**< Internal Weak Pull Up */
#define PIN_PULLDOWN (2) /**< Internal Weak Pull Down */
#define PIN_BUSKEEPER (3) /**< Internal Bus-Keeper */
#define PIN_FLOAT (0) /* Floating */
#define PIN_PULLUP (1) /* Internal Weak Pull Up */
#define PIN_PULLDOWN (2) /* Internal Weak Pull Down */
#define PIN_BUSKEEPER (3) /* Internal Bus-Keeper */
/* GPIO Interrupt Setting
* GPIO interrupt level and edge trigger types
*/
#define INT_HIGH_LEVEL (2) /**< High Level */
#define INT_LOW_LEVEL (3) /**< Low Level */
#define INT_RISING_EDGE (4) /**< Rising Edge */
#define INT_FALLING_EDGE (5) /**< Falling Edge */
#define INT_BOTH_EDGE (7) /**< Both Edge */
#define INT_HIGH_LEVEL (2) /* High Level */
#define INT_LOW_LEVEL (3) /* Low Level */
#define INT_RISING_EDGE (4) /* Rising Edge */
#define INT_FALLING_EDGE (5) /* Falling Edge */
#define INT_BOTH_EDGE (7) /* Both Edge */
#ifndef __ASSEMBLY__
boards/arm/imxrt/imxrt1020-evk/src/imxrt1020-evk.h
+1 -1
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@@ -70,7 +70,7 @@
/* ETH Disambiguation *******************************************************/
#define GPIO_ENET_INT (IOMUX_ENET_INT_DEFAULT | GPIO_INTERRUPT | \
GPIO_INT_FALLINGEDGE | GPIO_PORT1 | GPIO_PIN22) /* AD_B1_06 */
GPIO_INT_FALLINGEDGE | GPIO_PORT1 | GPIO_PIN22) /* AD_B1_06 */
#define GPIO_ENET_IRQ IMXRT_IRQ_GPIO1_12
#define GPIO_ENET_RST (GPIO_OUTPUT | IOMUX_ENET_RST_DEFAULT | \
GPIO_OUTPUT_ZERO | GPIO_PORT1 | GPIO_PIN4 ) /* AD_B0_04, Inverted logic */
boards/arm/lpc43xx/lpc4337-ws/include/board.h
+17 -17
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@@ -188,23 +188,23 @@
#endif
#if CONFIG_SPIFI_LIBRARY
# define SPIFI_DEVICE_ALL 0 /**< Enables all devices in family */
# define SPIFI_DEVICE_S25FL016K 0 /**< Enables Spansion S25FL016K device */
# define SPIFI_DEVICE_S25FL032P 0 /**< Enables Spansion S25FL032P device */
# define SPIFI_DEVICE_S25FL064P 0 /**< Enables Spansion S25FL064P device */
# define SPIFI_DEVICE_S25FL129P_64K 0 /**< Enables Spansion S25FL129P (64K block) device */
# define SPIFI_DEVICE_S25FL129P_256K 0 /**< Enables Spansion S25FL129P (256K block) device */
# define SPIFI_DEVICE_S25FL164K 0 /**< Enables Spansion S25FL164K device */
# define SPIFI_DEVICE_S25FL256S_64K 0 /**< Enables Spansion S25FL256S (64K block) device */
# define SPIFI_DEVICE_S25FL256S_256K 0 /**< Enables Spansion S25FL256S (256K block) device */
# define SPIFI_DEVICE_S25FL512S 0 /**< Enables Spansion S25FL512S device */
# define SPIFI_DEVICE_MX25L1635E 0 /**< Enables Macronix MX25L1635E device */
# define SPIFI_DEVICE_MX25L3235E 0 /**< Enables Macronix MX25L3235E device */
# define SPIFI_DEVICE_MX25L8035E 0 /**< Enables Macronix MX25L8035E device */
# define SPIFI_DEVICE_MX25L6435E 0 /**< Enables Macronix MX25L6435E device */
# define SPIFI_DEVICE_W25Q32FV 0 /**< Enables Winbond W25Q32FV device */
# define SPIFI_DEVICE_W25Q64FV 0 /**< Enables Winbond W25Q32V device */
# define SPIFI_DEVICE_W25Q80BV 1 /**< Enables Winbond W25Q80BV device */
# define SPIFI_DEVICE_ALL 0 /* Enables all devices in family */
# define SPIFI_DEVICE_S25FL016K 0 /* Enables Spansion S25FL016K device */
# define SPIFI_DEVICE_S25FL032P 0 /* Enables Spansion S25FL032P device */
# define SPIFI_DEVICE_S25FL064P 0 /* Enables Spansion S25FL064P device */
# define SPIFI_DEVICE_S25FL129P_64K 0 /* Enables Spansion S25FL129P (64K block) device */
# define SPIFI_DEVICE_S25FL129P_256K 0 /* Enables Spansion S25FL129P (256K block) device */
# define SPIFI_DEVICE_S25FL164K 0 /* Enables Spansion S25FL164K device */
# define SPIFI_DEVICE_S25FL256S_64K 0 /* Enables Spansion S25FL256S (64K block) device */
# define SPIFI_DEVICE_S25FL256S_256K 0 /* Enables Spansion S25FL256S (256K block) device */
# define SPIFI_DEVICE_S25FL512S 0 /* Enables Spansion S25FL512S device */
# define SPIFI_DEVICE_MX25L1635E 0 /* Enables Macronix MX25L1635E device */
# define SPIFI_DEVICE_MX25L3235E 0 /* Enables Macronix MX25L3235E device */
# define SPIFI_DEVICE_MX25L8035E 0 /* Enables Macronix MX25L8035E device */
# define SPIFI_DEVICE_MX25L6435E 0 /* Enables Macronix MX25L6435E device */
# define SPIFI_DEVICE_W25Q32FV 0 /* Enables Winbond W25Q32FV device */
# define SPIFI_DEVICE_W25Q64FV 0 /* Enables Winbond W25Q32V device */
# define SPIFI_DEVICE_W25Q80BV 1 /* Enables Winbond W25Q80BV device */
# define SPIFI_DEVICE_REQUENCY_DIVIDER 2 /* PLL1 clock divider */
#endif
boards/arm/lpc43xx/lpc4370-link2/include/board.h
+17 -17
View File
@@ -183,23 +183,23 @@
#endif
#if CONFIG_SPIFI_LIBRARY
# define SPIFI_DEVICE_ALL 0 /**< Enables all devices in family */
# define SPIFI_DEVICE_S25FL016K 0 /**< Enables Spansion S25FL016K device */
# define SPIFI_DEVICE_S25FL032P 0 /**< Enables Spansion S25FL032P device */
# define SPIFI_DEVICE_S25FL064P 0 /**< Enables Spansion S25FL064P device */
# define SPIFI_DEVICE_S25FL129P_64K 0 /**< Enables Spansion S25FL129P (64K block) device */
# define SPIFI_DEVICE_S25FL129P_256K 0 /**< Enables Spansion S25FL129P (256K block) device */
# define SPIFI_DEVICE_S25FL164K 0 /**< Enables Spansion S25FL164K device */
# define SPIFI_DEVICE_S25FL256S_64K 0 /**< Enables Spansion S25FL256S (64K block) device */
# define SPIFI_DEVICE_S25FL256S_256K 0 /**< Enables Spansion S25FL256S (256K block) device */
# define SPIFI_DEVICE_S25FL512S 0 /**< Enables Spansion S25FL512S device */
# define SPIFI_DEVICE_MX25L1635E 0 /**< Enables Macronix MX25L1635E device */
# define SPIFI_DEVICE_MX25L3235E 0 /**< Enables Macronix MX25L3235E device */
# define SPIFI_DEVICE_MX25L8035E 0 /**< Enables Macronix MX25L8035E device */
# define SPIFI_DEVICE_MX25L6435E 0 /**< Enables Macronix MX25L6435E device */
# define SPIFI_DEVICE_W25Q32FV 0 /**< Enables Winbond W25Q32FV device */
# define SPIFI_DEVICE_W25Q64FV 0 /**< Enables Winbond W25Q32V device */
# define SPIFI_DEVICE_W25Q80BV 1 /**< Enables Winbond W25Q80BV device */
# define SPIFI_DEVICE_ALL 0 /* Enables all devices in family */
# define SPIFI_DEVICE_S25FL016K 0 /* Enables Spansion S25FL016K device */
# define SPIFI_DEVICE_S25FL032P 0 /* Enables Spansion S25FL032P device */
# define SPIFI_DEVICE_S25FL064P 0 /* Enables Spansion S25FL064P device */
# define SPIFI_DEVICE_S25FL129P_64K 0 /* Enables Spansion S25FL129P (64K block) device */
# define SPIFI_DEVICE_S25FL129P_256K 0 /* Enables Spansion S25FL129P (256K block) device */
# define SPIFI_DEVICE_S25FL164K 0 /* Enables Spansion S25FL164K device */
# define SPIFI_DEVICE_S25FL256S_64K 0 /* Enables Spansion S25FL256S (64K block) device */
# define SPIFI_DEVICE_S25FL256S_256K 0 /* Enables Spansion S25FL256S (256K block) device */
# define SPIFI_DEVICE_S25FL512S 0 /* Enables Spansion S25FL512S device */
# define SPIFI_DEVICE_MX25L1635E 0 /* Enables Macronix MX25L1635E device */
# define SPIFI_DEVICE_MX25L3235E 0 /* Enables Macronix MX25L3235E device */
# define SPIFI_DEVICE_MX25L8035E 0 /* Enables Macronix MX25L8035E device */
# define SPIFI_DEVICE_MX25L6435E 0 /* Enables Macronix MX25L6435E device */
# define SPIFI_DEVICE_W25Q32FV 0 /* Enables Winbond W25Q32FV device */
# define SPIFI_DEVICE_W25Q64FV 0 /* Enables Winbond W25Q32V device */
# define SPIFI_DEVICE_W25Q80BV 1 /* Enables Winbond W25Q80BV device */
# define SPIFI_DEVICE_REQUENCY_DIVIDER 2 /* PLL1 clock divider */
#endif
boards/arm/samd5e5/metro-m4/include/board.h
+2 -2
View File
@@ -453,8 +453,8 @@
#define BOARD_SERCOM5_PINMAP_PAD2 0 /* PAD2: (not used) */
#define BOARD_SERCOM5_PINMAP_PAD3 0 /* PAD3: (not used) */
#define BOARD_SERCOM5_GCLKGEN 1 /* 48MHz Core clock */
#define BOARD_SERCOM5_SLOW_GCLKGEN 3
#define BOARD_SERCOM5_GCLKGEN 1 /* 48MHz Core clock */
#define BOARD_SERCOM5_SLOW_GCLKGEN 3
#define BOARD_SERCOM5_FREQUENCY BOARD_GCLK1_FREQUENCY
/* Tickless */
boards/arm/stm32h7/stm32h745i-disco/src/stm32h745i_disco.h
+3 -3
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@@ -82,9 +82,9 @@
#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \
GPIO_OUTPUT_CLEAR | GPIO_PORTD | GPIO_PIN3)
#define GPIO_LED_GREEN GPIO_LD1
#define GPIO_LED_ORANGE GPIO_LD2
#define GPIO_LED_RED GPIO_LD3
#define GPIO_LED_GREEN GPIO_LD1
#define GPIO_LED_ORANGE GPIO_LD2
#define GPIO_LED_RED GPIO_LD3
#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz| \
GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)