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https://github.com/apache/nuttx.git
synced 2026-06-06 00:14:22 +08:00
Trivial stylistic changes from review of last PR
This commit is contained in:
@@ -128,7 +128,7 @@ struct stm32l4_pwmchan_s
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uint8_t channel; /* Timer output channel: {1,..4} */
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uint8_t channel; /* Timer output channel: {1,..4} */
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uint32_t pincfg; /* Output pin configuration */
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uint32_t pincfg; /* Output pin configuration */
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enum stm32l4_chanmode_e mode;
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enum stm32l4_chanmode_e mode;
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uint32_t npincfg; /* Complementary output pin configuration (only TIM1/8 CH1-3)*/
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uint32_t npincfg; /* Complementary output pin configuration (only TIM1/8 CH1-3)*/
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};
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};
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/* This structure represents the state of one PWM timer */
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/* This structure represents the state of one PWM timer */
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@@ -996,10 +996,10 @@ static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv,
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/* Handle channel specific setup */
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/* Handle channel specific setup */
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ccenable = 0;
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ccenable = 0;
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ccnenable = 0;
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ccnenable = 0;
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ocmode1 = 0;
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ocmode1 = 0;
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ocmode2 = 0;
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ocmode2 = 0;
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#ifdef CONFIG_PWM_MULTICHAN
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#ifdef CONFIG_PWM_MULTICHAN
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for (i = 0; i < CONFIG_PWM_NCHANNELS; i++)
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for (i = 0; i < CONFIG_PWM_NCHANNELS; i++)
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@@ -1104,7 +1104,7 @@ static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv,
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/* Conditionnaly enable the complementary output */
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/* Conditionnaly enable the complementary output */
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if(compout)
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if (compout)
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{
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{
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ccnenable |= ATIM_CCER_CC1NE;
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ccnenable |= ATIM_CCER_CC1NE;
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}
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}
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@@ -1134,7 +1134,7 @@ static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv,
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/* Conditionnaly enable the complementary output */
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/* Conditionnaly enable the complementary output */
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if(compout)
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if (compout)
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{
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{
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ccnenable |= ATIM_CCER_CC2NE;
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ccnenable |= ATIM_CCER_CC2NE;
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}
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}
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@@ -1164,7 +1164,7 @@ static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv,
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/* Conditionnaly enable the complementary output */
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/* Conditionnaly enable the complementary output */
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if(compout)
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if (compout)
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{
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{
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ccnenable |= ATIM_CCER_CC3NE;
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ccnenable |= ATIM_CCER_CC3NE;
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}
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}
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@@ -1289,14 +1289,13 @@ static int stm32l4pwm_timer(FAR struct stm32l4_pwmtimer_s *priv,
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*/
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*/
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ccer &= ~(ATIM_CCER_CC1NE | ATIM_CCER_CC1NP);
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ccer &= ~(ATIM_CCER_CC1NE | ATIM_CCER_CC1NP);
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ccer |= ccnenable;
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ccer |= ccnenable;
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}
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}
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else
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else
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#endif
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#endif
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#endif
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#endif
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{
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{
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ccer &= ~(GTIM_CCER_CC1NP | GTIM_CCER_CC2NP | GTIM_CCER_CC3NP); //Not sure why ??
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ccer &= ~(GTIM_CCER_CC1NP | GTIM_CCER_CC2NP | GTIM_CCER_CC3NP); /* Not sure why? */
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}
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}
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/* Save the modified register values */
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/* Save the modified register values */
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@@ -1783,7 +1782,6 @@ static int stm32l4pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
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pwminfo("pincfg: %08x\n", pincfg);
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pwminfo("pincfg: %08x\n", pincfg);
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pincfg &= (GPIO_PORT_MASK | GPIO_PIN_MASK);
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pincfg &= (GPIO_PORT_MASK | GPIO_PIN_MASK);
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pincfg |= GPIO_INPUT | GPIO_FLOAT;
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pincfg |= GPIO_INPUT | GPIO_FLOAT;
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stm32l4_configgpio(pincfg);
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stm32l4_configgpio(pincfg);
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@@ -1795,7 +1793,6 @@ static int stm32l4pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
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pwminfo("npincfg: %08x\n", pincfg);
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pwminfo("npincfg: %08x\n", pincfg);
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pincfg &= (GPIO_PORT_MASK | GPIO_PIN_MASK);
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pincfg &= (GPIO_PORT_MASK | GPIO_PIN_MASK);
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pincfg |= GPIO_INPUT | GPIO_FLOAT;
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pincfg |= GPIO_INPUT | GPIO_FLOAT;
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stm32l4_configgpio(pincfg);
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stm32l4_configgpio(pincfg);
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@@ -96,14 +96,15 @@ int board_pwm_setup(void)
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if (!initialized)
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if (!initialized)
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{
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{
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/* Call stm32l4_pwminitialize() to get an instance of the PWM interface */
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/* Call stm32l4_pwminitialize() to get an instance of the PWM interface */
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/* PWM
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*
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* The Nucleo-l476rg has no real on-board PWM devices, but the board can be
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* configured to output a pulse train using TIM1 or 8, or others (see board.h).
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* Let's figure out which the user has configured.
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*/
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# if defined(CONFIG_STM32L4_TIM1_PWM)
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/* PWM
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*
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* The Nucleo-l476rg has no real on-board PWM devices, but the board can be
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* configured to output a pulse train using TIM1 or 8, or others (see board.h).
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* Let's figure out which the user has configured.
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*/
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#if defined(CONFIG_STM32L4_TIM1_PWM)
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pwm = stm32l4_pwminitialize(1);
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pwm = stm32l4_pwminitialize(1);
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if (!pwm)
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if (!pwm)
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{
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{
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@@ -121,7 +122,7 @@ int board_pwm_setup(void)
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}
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}
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#endif
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#endif
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# if defined(CONFIG_STM32L4_TIM2_PWM)
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#if defined(CONFIG_STM32L4_TIM2_PWM)
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pwm = stm32l4_pwminitialize(2);
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pwm = stm32l4_pwminitialize(2);
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if (!pwm)
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if (!pwm)
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{
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{
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@@ -139,7 +140,7 @@ int board_pwm_setup(void)
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}
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}
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#endif
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#endif
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# if defined(CONFIG_STM32L4_TIM3_PWM)
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#if defined(CONFIG_STM32L4_TIM3_PWM)
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pwm = stm32l4_pwminitialize(3);
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pwm = stm32l4_pwminitialize(3);
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if (!pwm)
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if (!pwm)
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{
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{
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@@ -157,7 +158,7 @@ int board_pwm_setup(void)
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}
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}
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#endif
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#endif
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# if defined(CONFIG_STM32L4_TIM4_PWM)
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#if defined(CONFIG_STM32L4_TIM4_PWM)
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pwm = stm32l4_pwminitialize(4);
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pwm = stm32l4_pwminitialize(4);
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if (!pwm)
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if (!pwm)
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{
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{
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@@ -175,7 +176,7 @@ int board_pwm_setup(void)
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}
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}
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#endif
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#endif
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# if defined(CONFIG_STM32L4_TIM5_PWM)
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#if defined(CONFIG_STM32L4_TIM5_PWM)
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pwm = stm32l4_pwminitialize(5);
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pwm = stm32l4_pwminitialize(5);
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if (!pwm)
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if (!pwm)
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{
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{
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@@ -193,7 +194,7 @@ int board_pwm_setup(void)
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}
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}
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#endif
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#endif
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# if defined(CONFIG_STM32L4_TIM8_PWM)
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#if defined(CONFIG_STM32L4_TIM8_PWM)
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pwm = stm32l4_pwminitialize(8);
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pwm = stm32l4_pwminitialize(8);
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if (!pwm)
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if (!pwm)
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{
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{
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@@ -211,7 +212,7 @@ int board_pwm_setup(void)
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}
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}
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#endif
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#endif
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# if defined(CONFIG_STM32L4_TIM15_PWM)
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#if defined(CONFIG_STM32L4_TIM15_PWM)
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pwm = stm32l4_pwminitialize(15);
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pwm = stm32l4_pwminitialize(15);
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if (!pwm)
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if (!pwm)
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{
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{
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@@ -229,7 +230,7 @@ int board_pwm_setup(void)
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}
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}
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#endif
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#endif
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# if defined(CONFIG_STM32L4_TIM16_PWM)
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#if defined(CONFIG_STM32L4_TIM16_PWM)
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pwm = stm32l4_pwminitialize(16);
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pwm = stm32l4_pwminitialize(16);
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if (!pwm)
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if (!pwm)
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{
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{
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@@ -247,7 +248,7 @@ int board_pwm_setup(void)
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}
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}
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#endif
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#endif
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# if defined(CONFIG_STM32L4_TIM17_PWM)
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#if defined(CONFIG_STM32L4_TIM17_PWM)
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pwm = stm32l4_pwminitialize(17);
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pwm = stm32l4_pwminitialize(17);
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if (!pwm)
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if (!pwm)
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{
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{
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@@ -273,3 +274,4 @@ int board_pwm_setup(void)
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}
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}
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#endif /* CONFIG_PWM */
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#endif /* CONFIG_PWM */
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