From ac2fe431aa7256c8a292f3df2a69ffcd60358db9 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 20 May 2015 13:51:40 -0600
Subject: [PATCH] SAML21: Add some parameter checking for FDPLL96M

---
 arch/arm/src/samdl/saml_clockconfig.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/src/samdl/saml_clockconfig.c b/arch/arm/src/samdl/saml_clockconfig.c
index a3d82aa4768..e2c77d6169d 100644
--- a/arch/arm/src/samdl/saml_clockconfig.c
+++ b/arch/arm/src/samdl/saml_clockconfig.c
@@ -73,6 +73,23 @@
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
+/* Force enabling of the FDPLL reference clock */
+
+#ifdef BOARD_FDPLL96M_ENABLE
+#  if BOARD_FDPLL96M_REFCLK == OSCCTRL_DPLLCTRLB_REFLCK_XOSC && \
+      !defined(BOARD_XOSC_ENABLE)
+#    warning Forcing BOARD_XOSC_ENABLE for FDPLL96M
+#    define BOARD_XOSC_ENABLE 1
+#  elif BOARD_FDPLL96M_REFCLK == OSCCTRL_DPLLCTRLB_REFLCK_XOSCK32K && \
+        !defined(BOARD_XOSC32K_ENABLE)
+#    warning Forcing BOARD_XOSC32K_ENABLE for FDPLL96M
+#    define BOARD_XOSC32K_ENABLE 1
+#  elif BOARD_FDPLL96M_REFCLK == OSCCTRL_DPLLCTRLB_REFLCK_GLCK && \
+        !defined(BOARD_GCLK_ENABLE)
+#    warning Forcing BOARD_GCLK_ENABLE for FDPLL96M
+#    define BOARD_GCLK_ENABLE 1
+#  endif
+#endif
 
 /****************************************************************************
  * Private Types