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arch/arm: Change all spsr_cxsf to spsr

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unify the SPSR register usage

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
Xiang Xiao
2021-04-06 02:19:06 +08:00
committed by Masayuki Ishikawa
parent f1e821833b
commit a7f7796db1
5 changed files with 17 additions and 19 deletions
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arch/arm/src/arm/arm_vectors.S
+3 -3
View File
@@ -260,7 +260,7 @@ arm_vectordata:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */ ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr_cxsf, r0 msr spsr, r0
ldmia sp, {r0-r15}^ /* Return */ ldmia sp, {r0-r15}^ /* Return */
.Ldaborttmp: .Ldaborttmp:
@@ -332,7 +332,7 @@ arm_vectorprefetch:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */ ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr_cxsf, r0 msr spsr, r0
ldmia sp, {r0-r15}^ /* Return */ ldmia sp, {r0-r15}^ /* Return */
.Lpaborttmp: .Lpaborttmp:
@@ -401,7 +401,7 @@ arm_vectorundefinsn:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */ ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr_cxsf, r0 msr spsr, r0
ldmia sp, {r0-r15}^ /* Return */ ldmia sp, {r0-r15}^ /* Return */
.Lundeftmp: .Lundeftmp:
arch/arm/src/armv7-a/arm_vectors.S
+4 -6
View File
@@ -256,12 +256,10 @@ arm_vectorirq:
ldmia r0, {r0-r15}^ /* Return */ ldmia r0, {r0-r15}^ /* Return */
#if CONFIG_ARCH_INTERRUPTSTACK > 7 #if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
#ifndef CONFIG_SMP
.Lirqstackbase: .Lirqstackbase:
.word g_intstackbase .word g_intstackbase
#endif #endif
#endif /* CONFIG_ARCH_INTERRUPTSTACK > 7 */
.size arm_vectorirq, . - arm_vectorirq .size arm_vectorirq, . - arm_vectorirq
.align 5 .align 5
@@ -500,7 +498,7 @@ arm_vectordata:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */
msr spsr_cxsf, r1 /* Set the return mode SPSR */ msr spsr, r1 /* Set the return mode SPSR */
#ifdef CONFIG_BUILD_KERNEL #ifdef CONFIG_BUILD_KERNEL
/* Are we leaving in user mode? If so then we need to restore the /* Are we leaving in user mode? If so then we need to restore the
@@ -642,7 +640,7 @@ arm_vectorprefetch:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */
msr spsr_cxsf, r1 /* Set the return mode SPSR */ msr spsr, r1 /* Set the return mode SPSR */
#ifdef CONFIG_BUILD_KERNEL #ifdef CONFIG_BUILD_KERNEL
/* Are we leaving in user mode? If so then we need to restore the /* Are we leaving in user mode? If so then we need to restore the
@@ -780,7 +778,7 @@ arm_vectorundefinsn:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */
msr spsr_cxsf, r1 /* Set the return mode SPSR */ msr spsr, r1 /* Set the return mode SPSR */
#ifdef CONFIG_BUILD_KERNEL #ifdef CONFIG_BUILD_KERNEL
/* Are we leaving in user mode? If so then we need to restore the /* Are we leaving in user mode? If so then we need to restore the
arch/arm/src/armv7-r/arm_fullcontextrestore.S
+1 -1
View File
@@ -133,7 +133,7 @@ arm_fullcontextrestore:
*/ */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the stored CPSR value */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the stored CPSR value */
msr spsr_cxsf, r1 /* Set the SPSR */ msr spsr, r1 /* Set the SPSR */
/* Now recover r0-r1, pc and cpsr, destroying the stack frame */ /* Now recover r0-r1, pc and cpsr, destroying the stack frame */
arch/arm/src/armv7-r/arm_vectors.S
+6 -6
View File
@@ -182,7 +182,7 @@ arm_vectorirq:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */
msr spsr_cxsf, r1 /* Set the return mode SPSR */ msr spsr, r1 /* Set the return mode SPSR */
#ifdef CONFIG_BUILD_PROTECTED #ifdef CONFIG_BUILD_PROTECTED
/* Are we leaving in user mode? If so then we need to restore the /* Are we leaving in user mode? If so then we need to restore the
@@ -310,7 +310,7 @@ arm_vectorsvc:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */
msr spsr_cxsf, r1 /* Set the return mode SPSR */ msr spsr, r1 /* Set the return mode SPSR */
#ifdef CONFIG_BUILD_PROTECTED #ifdef CONFIG_BUILD_PROTECTED
/* Are we leaving in user mode? If so then we need to restore the /* Are we leaving in user mode? If so then we need to restore the
@@ -452,7 +452,7 @@ arm_vectordata:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */
msr spsr_cxsf, r1 /* Set the return mode SPSR */ msr spsr, r1 /* Set the return mode SPSR */
#ifdef CONFIG_BUILD_PROTECTED #ifdef CONFIG_BUILD_PROTECTED
/* Are we leaving in user mode? If so then we need to restore the /* Are we leaving in user mode? If so then we need to restore the
@@ -594,7 +594,7 @@ arm_vectorprefetch:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */
msr spsr_cxsf, r1 /* Set the return mode SPSR */ msr spsr, r1 /* Set the return mode SPSR */
#ifdef CONFIG_BUILD_PROTECTED #ifdef CONFIG_BUILD_PROTECTED
/* Are we leaving in user mode? If so then we need to restore the /* Are we leaving in user mode? If so then we need to restore the
@@ -732,7 +732,7 @@ arm_vectorundefinsn:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */
msr spsr_cxsf, r1 /* Set the return mode SPSR */ msr spsr, r1 /* Set the return mode SPSR */
#ifdef CONFIG_BUILD_PROTECTED #ifdef CONFIG_BUILD_PROTECTED
/* Are we leaving in user mode? If so then we need to restore the /* Are we leaving in user mode? If so then we need to restore the
@@ -879,7 +879,7 @@ arm_vectorfiq:
/* Restore the CPSR, SVC mode registers and return */ /* Restore the CPSR, SVC mode registers and return */
ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */ ldr r1, [r0, #(4*REG_CPSR)] /* Fetch the return SPSR */
msr spsr_cxsf, r1 /* Set the return mode SPSR */ msr spsr, r1 /* Set the return mode SPSR */
#ifdef CONFIG_BUILD_PROTECTED #ifdef CONFIG_BUILD_PROTECTED
/* Are we leaving in user mode? If so then we need to restore the /* Are we leaving in user mode? If so then we need to restore the
arch/arm/src/c5471/c5471_vectors.S
+3 -3
View File
@@ -280,7 +280,7 @@ arm_vectordata:
/* Restore the CPSR, SVC modr registers and return */ /* Restore the CPSR, SVC modr registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */ ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr_cxsf, r0 msr spsr, r0
ldmia sp, {r0-r15}^ /* Return */ ldmia sp, {r0-r15}^ /* Return */
.Ldaborttmp: .Ldaborttmp:
@@ -346,7 +346,7 @@ arm_vectorprefetch:
/* Restore the CPSR, SVC modr registers and return */ /* Restore the CPSR, SVC modr registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */ ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr_cxsf, r0 msr spsr, r0
ldmia sp, {r0-r15}^ /* Return */ ldmia sp, {r0-r15}^ /* Return */
.Lpaborttmp: .Lpaborttmp:
@@ -412,7 +412,7 @@ arm_vectorundefinsn:
/* Restore the CPSR, SVC modr registers and return */ /* Restore the CPSR, SVC modr registers and return */
ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */ ldr r0, [sp, #(4*REG_CPSR)] /* Setup the SVC mode SPSR */
msr spsr_cxsf, r0 msr spsr, r0
ldmia sp, {r0-r15}^ /* Return */ ldmia sp, {r0-r15}^ /* Return */
.Lundeftmp: .Lundeftmp: