mirror of
https://github.com/apache/nuttx.git
synced 2026-05-27 11:26:12 +08:00
Eliminate some warnings
This commit is contained in:
+1
-1
Submodule arch updated: 2391024361...64609d18df
+1
-1
Submodule configs updated: 11b777b1b5...c706f1adc1
+116
-92
@@ -300,11 +300,17 @@ struct cc1101_dev_s
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uint8_t power;
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uint8_t power;
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};
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};
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static volatile int cc1101_interrupt = 0;
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/****************************************************************************
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/****************************************************************************
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* Private Functions
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* Private Functions
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****************************************************************************/
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****************************************************************************/
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void cc1101_access_begin(struct cc1101_dev_s * dev)
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void cc1101_access_begin(FAR struct cc1101_dev_s * dev)
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{
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{
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(void)SPI_LOCK(dev->spi, true);
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(void)SPI_LOCK(dev->spi, true);
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SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true);
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SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true);
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@@ -312,24 +318,28 @@ void cc1101_access_begin(struct cc1101_dev_s * dev)
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SPI_SETBITS(dev->spi, 8);
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SPI_SETBITS(dev->spi, 8);
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}
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}
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void cc1101_access_end(struct cc1101_dev_s * dev)
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void cc1101_access_end(FAR struct cc1101_dev_s * dev)
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{
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{
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SPI_SELECT(dev->spi, SPIDEV_WIRELESS, false);
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SPI_SELECT(dev->spi, SPIDEV_WIRELESS, false);
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(void)SPI_LOCK(dev->spi, false);
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(void)SPI_LOCK(dev->spi, false);
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}
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}
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/** CC1101 Access with Range Check
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/* CC1101 Access with Range Check
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*
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*
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* \param dev CC1101 Private Structure
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* Input Paramters:
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* \param addr CC1101 Address
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* dev CC1101 Private Structure
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* \param buf Pointer to buffer, either for read or write access
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* addr CC1101 Address
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* \param length when >0 it denotes read access, when <0 it denotes write
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* buf Pointer to buffer, either for read or write access
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* length when >0 it denotes read access, when <0 it denotes write
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* access of -length. abs(length) greater of 1 implies burst mode,
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* access of -length. abs(length) greater of 1 implies burst mode,
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* however
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* however
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* \return OK on success or errno is set.
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*
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* Returned Value:
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* OK on success or errno is set.
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*/
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*/
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int cc1101_access(struct cc1101_dev_s * dev, uint8_t addr, uint8_t *buf, int length)
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int cc1101_access(FAR struct cc1101_dev_s * dev, uint8_t addr,
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FAR uint8_t *buf, int length)
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{
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{
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int stabyte;
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int stabyte;
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@@ -339,143 +349,157 @@ int cc1101_access(struct cc1101_dev_s * dev, uint8_t addr, uint8_t *buf, int len
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*/
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*/
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if ((addr & CC1101_READ_SINGLE) && length != 1)
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if ((addr & CC1101_READ_SINGLE) && length != 1)
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return ERROR;
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{
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return ERROR;
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}
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/* Prepare SPI */
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/* Prepare SPI */
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cc1101_access_begin(dev);
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cc1101_access_begin(dev);
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if (length>1 || length < -1)
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if (length>1 || length < -1)
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SPI_SETFREQUENCY(dev->spi, CC1101_SPIFREQ_BURST);
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{
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else SPI_SETFREQUENCY(dev->spi, CC1101_SPIFREQ_SINGLE);
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SPI_SETFREQUENCY(dev->spi, CC1101_SPIFREQ_BURST);
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}
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else
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{
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SPI_SETFREQUENCY(dev->spi, CC1101_SPIFREQ_SINGLE);
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}
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/* Transfer */
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/* Transfer */
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if (length <= 0) { /* 0 length are command strobes */
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if (length <= 0)
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if (length < -1)
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{
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addr |= CC1101_WRITE_BURST;
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/* 0 length are command strobes */
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stabyte = SPI_SEND(dev->spi, addr);
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if (length < -1)
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if (length) {
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{
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SPI_SNDBLOCK(dev->spi, buf, -length);
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addr |= CC1101_WRITE_BURST;
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}
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stabyte = SPI_SEND(dev->spi, addr);
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if (length)
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{
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SPI_SNDBLOCK(dev->spi, buf, -length);
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}
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}
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}
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}
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else {
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else
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addr |= CC1101_READ_SINGLE;
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{
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if (length > 1)
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addr |= CC1101_READ_SINGLE;
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addr |= CC1101_READ_BURST;
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if (length > 1)
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{
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addr |= CC1101_READ_BURST;
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}
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stabyte = SPI_SEND(dev->spi, addr);
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stabyte = SPI_SEND(dev->spi, addr);
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SPI_RECVBLOCK(dev->spi, buf, length);
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SPI_RECVBLOCK(dev->spi, buf, length);
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}
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}
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cc1101_access_end(dev);
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cc1101_access_end(dev);
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return stabyte;
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return stabyte;
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}
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}
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/* Strobes command and returns chip status byte
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/** Strobes command and returns chip status byte
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*
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*
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* By default commands are send as Write. To a command,
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* By default commands are send as Write. To a command,
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* CC1101_READ_SINGLE may be OR'ed to obtain the number of RX bytes
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* CC1101_READ_SINGLE may be OR'ed to obtain the number of RX bytes
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* pending in RX FIFO.
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* pending in RX FIFO.
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*/
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*/
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inline uint8_t cc1101_strobe(struct cc1101_dev_s * dev, uint8_t command)
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inline uint8_t cc1101_strobe(struct cc1101_dev_s * dev, uint8_t command)
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{
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{
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uint8_t status;
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uint8_t status;
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cc1101_access_begin(dev);
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cc1101_access_begin(dev);
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SPI_SETFREQUENCY(dev->spi, CC1101_SPIFREQ_SINGLE);
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SPI_SETFREQUENCY(dev->spi, CC1101_SPIFREQ_SINGLE);
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status = SPI_SEND(dev->spi, command);
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status = SPI_SEND(dev->spi, command);
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cc1101_access_end(dev);
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cc1101_access_end(dev);
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return status;
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return status;
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}
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}
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int cc1101_reset(struct cc1101_dev_s * dev)
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int cc1101_reset(struct cc1101_dev_s * dev)
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{
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{
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cc1101_strobe(dev, CC1101_SRES);
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cc1101_strobe(dev, CC1101_SRES);
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return OK;
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return OK;
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}
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}
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int cc1101_checkpart(struct cc1101_dev_s * dev)
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int cc1101_checkpart(struct cc1101_dev_s * dev)
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{
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{
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uint8_t partnum, version;
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uint8_t partnum;
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uint8_t version;
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if (cc1101_access(dev, CC1101_PARTNUM, &partnum, 1) < 0 ||
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if (cc1101_access(dev, CC1101_PARTNUM, &partnum, 1) < 0 ||
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cc1101_access(dev, CC1101_VERSION, &version, 1) < 0)
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cc1101_access(dev, CC1101_VERSION, &version, 1) < 0)
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return ERROR;
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{
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return ERROR;
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}
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if (partnum == CC1101_PARTNUM_VALUE && version == CC1101_VERSION_VALUE)
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if (partnum == CC1101_PARTNUM_VALUE && version == CC1101_VERSION_VALUE)
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return OK;
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{
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return OK;
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}
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return ERROR;
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return ERROR;
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}
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}
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void cc1101_dumpregs(struct cc1101_dev_s * dev, uint8_t addr, uint8_t length)
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void cc1101_dumpregs(struct cc1101_dev_s * dev, uint8_t addr, uint8_t length)
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{
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{
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uint8_t buf[0x30], i;
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uint8_t buf[0x30], i;
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cc1101_access(dev, addr, buf, length);
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cc1101_access(dev, addr, FAR uint8_t *buf, length);
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printf("CC1101[%2x]: ", addr);
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printf("CC1101[%2x]: ", addr);
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for (i=0; i<length; i++) printf(" %2x,", buf[i]);
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for (i=0; i<length; i++) printf(" %2x,", buf[i]);
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printf("\n");
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printf("\n");
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}
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}
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void cc1101_setpacketctrl(struct cc1101_dev_s * dev)
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void cc1101_setpacketctrl(struct cc1101_dev_s * dev)
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{
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{
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uint8_t values[3];
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uint8_t values[3];
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values[0] = 0; /* Rx FIFO threshold = 32, Tx FIFO threshold = 33 */
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values[0] = 0; /* Rx FIFO threshold = 32, Tx FIFO threshold = 33 */
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cc1101_access(dev, CC1101_FIFOTHR, values, -1);
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cc1101_access(dev, CC1101_FIFOTHR, values, -1);
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/* Packet length
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/* Packet length
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* Limit it to 61 bytes in total: pktlen, data[61], rssi, lqi
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* Limit it to 61 bytes in total: pktlen, data[61], rssi, lqi
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*/
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*/
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values[0] = CC1101_PACKET_MAXDATALEN;
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values[0] = CC1101_PACKET_MAXDATALEN;
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cc1101_access(dev, CC1101_PKTLEN, values, -1);
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cc1101_access(dev, CC1101_PKTLEN, values, -1);
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/* Packet Control */
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/* Packet Control */
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values[0] = 0x04; /* Append status: RSSI and LQI at the end of received packet */
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values[0] = 0x04; /* Append status: RSSI and LQI at the end of received packet */
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/* TODO: CRC Auto Flash bit 0x08 ??? */
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/* TODO: CRC Auto Flash bit 0x08 ??? */
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values[1] = 0x05; /* CRC in Rx and Tx Enabled: Variable Packet mode, defined by first byte */
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values[1] = 0x05; /* CRC in Rx and Tx Enabled: Variable Packet mode, defined by first byte */
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/* TODO: Enable data whitening ... */
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/* TODO: Enable data whitening ... */
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cc1101_access(dev, CC1101_PKTCTRL1, values, -2);
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cc1101_access(dev, CC1101_PKTCTRL1, values, -2);
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/* Main Radio Control State Machine */
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/* Main Radio Control State Machine */
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values[0] = 0x07; /* No time-out */
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values[0] = 0x07; /* No time-out */
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values[1] = 0x00; /* Clear channel if RSSI < thr && !receiving;
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values[1] = 0x00; /* Clear channel if RSSI < thr && !receiving;
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* TX -> RX, RX -> RX: 0x3F */
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* TX -> RX, RX -> RX: 0x3F */
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values[2] = CC1101_MCSM0_VALUE; /* Calibrate on IDLE -> RX/TX, OSC Timeout = ~500 us
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values[2] = CC1101_MCSM0_VALUE; /* Calibrate on IDLE -> RX/TX, OSC Timeout = ~500 us
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TODO: has XOSC_FORCE_ON */
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TODO: has XOSC_FORCE_ON */
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cc1101_access(dev, CC1101_MCSM2, values, -3);
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cc1101_access(dev, CC1101_MCSM2, values, -3);
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/* Wake-On Radio Control */
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/* Wake-On Radio Control */
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// Not used yet.
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// Not used yet.
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// WOREVT1:WOREVT0 - 16-bit timeout register
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// WOREVT1:WOREVT0 - 16-bit timeout register
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}
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}
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/****************************************************************************
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/****************************************************************************
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* Callbacks
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* Callbacks
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****************************************************************************/
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****************************************************************************/
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volatile int cc1101_interrupt = 0;
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/* External line triggers this callback
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/** External line triggers this callback
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*
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*
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* The concept todo is:
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* The concept todo is:
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* - GPIO provides EXTI Interrupt
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* - GPIO provides EXTI Interrupt
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@@ -612,7 +636,7 @@ int cc1101_setgdo(struct cc1101_dev_s * dev, uint8_t pin, uint8_t function)
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/* Force XOSC to stay active even in sleep mode */
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/* Force XOSC to stay active even in sleep mode */
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int value = CC1101_MCSM0_VALUE | CC1101_MCSM0_XOSC_FORCE_ON;
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int value = CC1101_MCSM0_VALUE | CC1101_MCSM0_XOSC_FORCE_ON;
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cc1101_access(dev, CC1101_MCSM0, &value, -1);
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cc1101_access(dev, CC1101_MCSM0, (FAR uint8_t *)&value, -1);
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dev->flags |= FLAGS_XOSCENABLED;
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dev->flags |= FLAGS_XOSCENABLED;
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}
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}
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@@ -621,7 +645,7 @@ int cc1101_setgdo(struct cc1101_dev_s * dev, uint8_t pin, uint8_t function)
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/* Disable XOSC in sleep mode */
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/* Disable XOSC in sleep mode */
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int value = CC1101_MCSM0_VALUE;
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int value = CC1101_MCSM0_VALUE;
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cc1101_access(dev, CC1101_MCSM0, &value, -1);
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cc1101_access(dev, CC1101_MCSM0, (FAR uint8_t *)&value, -1);
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dev->flags &= ~FLAGS_XOSCENABLED;
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dev->flags &= ~FLAGS_XOSCENABLED;
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}
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}
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@@ -634,24 +658,24 @@ int cc1101_setrf(struct cc1101_dev_s * dev, const struct c1101_rfsettings_s *set
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ASSERT(dev);
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ASSERT(dev);
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ASSERT(settings);
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ASSERT(settings);
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if (cc1101_access(dev, CC1101_FSCTRL1, &settings->FSCTRL1, -11) < 0)
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if (cc1101_access(dev, CC1101_FSCTRL1, (FAR uint8_t *)&settings->FSCTRL1, -11) < 0)
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{
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{
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return ERROR;
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return ERROR;
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}
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}
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if (cc1101_access(dev, CC1101_FOCCFG, &settings->FOCCFG, -5) < 0)
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if (cc1101_access(dev, CC1101_FOCCFG, (FAR uint8_t *)&settings->FOCCFG, -5) < 0)
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{
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{
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return ERROR;
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return ERROR;
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}
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}
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if (cc1101_access(dev, CC1101_FREND1, &settings->FREND1, -6) < 0)
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if (cc1101_access(dev, CC1101_FREND1, (FAR uint8_t *)&settings->FREND1, -6) < 0)
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{
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{
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return ERROR;
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return ERROR;
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}
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}
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/* Load Power Table */
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/* Load Power Table */
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if (cc1101_access(dev, CC1101_PATABLE, settings->PA, -8) < 0)
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if (cc1101_access(dev, CC1101_PATABLE, (FAR uint8_t *)settings->PA, -8) < 0)
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{
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{
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return ERROR;
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return ERROR;
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}
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}
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@@ -664,7 +688,7 @@ int cc1101_setrf(struct cc1101_dev_s * dev, const struct c1101_rfsettings_s *set
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cc1101_setchannel(dev, dev->channel);
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cc1101_setchannel(dev, dev->channel);
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cc1101_setpower(dev, dev->power);
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cc1101_setpower(dev, dev->power);
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return OK;
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return OK;
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}
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}
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int cc1101_setchannel(struct cc1101_dev_s * dev, uint8_t channel)
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int cc1101_setchannel(struct cc1101_dev_s * dev, uint8_t channel)
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@@ -823,7 +847,7 @@ int cc1101_write(struct cc1101_dev_s * dev, const uint8_t * buf, size_t size)
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}
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}
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cc1101_access(dev, CC1101_TXFIFO, &packetlen, -1);
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cc1101_access(dev, CC1101_TXFIFO, &packetlen, -1);
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cc1101_access(dev, CC1101_TXFIFO, buf, -size);
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cc1101_access(dev, CC1101_TXFIFO, (FAR uint8_t *)buf, -size);
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return 0;
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return 0;
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}
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}
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@@ -46,6 +46,8 @@
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#include <nuttx/net/iob.h>
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#include <nuttx/net/iob.h>
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#ifdef CONFIG_NET_IOB
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/****************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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* Pre-processor Definitions
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****************************************************************************/
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****************************************************************************/
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@@ -132,4 +134,5 @@ FAR struct iob_s *iob_tryalloc(bool throttled);
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FAR struct iob_qentry_s *iob_free_qentry(FAR struct iob_qentry_s *iobq);
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FAR struct iob_qentry_s *iob_free_qentry(FAR struct iob_qentry_s *iobq);
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#endif /* CONFIG_NET_IOB */
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#endif /* __NET_IOB_IOB_H */
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#endif /* __NET_IOB_IOB_H */
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