mirror of
https://github.com/apache/nuttx.git
synced 2026-05-31 23:40:19 +08:00
boards/arch: Remove FAR from 32bit/64bit arch
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
This commit is contained in:
committed by
Petro Karashchenko
parent
78fcc6670d
commit
a7b3217c37
@@ -184,14 +184,14 @@ static void arm_dump_task(struct tcb_s *tcb, void *arg)
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#ifndef CONFIG_DISABLE_PTHREAD
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#ifndef CONFIG_DISABLE_PTHREAD
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if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
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if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
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{
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{
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FAR struct pthread_tcb_s *ptcb = (FAR struct pthread_tcb_s *)tcb;
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struct pthread_tcb_s *ptcb = (struct pthread_tcb_s *)tcb;
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snprintf(args, sizeof(args), " %p", ptcb->arg);
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snprintf(args, sizeof(args), " %p", ptcb->arg);
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}
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}
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else
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else
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#endif
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#endif
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{
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{
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FAR char **argv = tcb->group->tg_info->argv + 1;
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char **argv = tcb->group->tg_info->argv + 1;
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size_t npos = 0;
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size_t npos = 0;
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while (*argv != NULL && npos < sizeof(args))
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while (*argv != NULL && npos < sizeof(args))
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@@ -363,7 +363,7 @@ static void arm_dump_stack(const char *tag, uint32_t sp,
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#ifdef CONFIG_STACK_COLORATION
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#ifdef CONFIG_STACK_COLORATION
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uint32_t remain;
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uint32_t remain;
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remain = size - arm_stack_check((FAR void *)(uintptr_t)base, size);
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remain = size - arm_stack_check((void *)(uintptr_t)base, size);
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base += remain;
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base += remain;
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size -= remain;
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size -= remain;
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#endif
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#endif
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@@ -300,11 +300,11 @@ struct imxrt_enc_lowerhalf_s
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/* IMXRT driver-specific fields: */
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/* IMXRT driver-specific fields: */
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FAR const struct imxrt_qeconfig_s *config; /* static configuration */
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const struct imxrt_qeconfig_s *config; /* static configuration */
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struct qe_index_s *data;
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struct qe_index_s *data;
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sem_t sem_excl; /* Mutual exclusion semaphore to
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sem_t sem_excl; /* Mutual exclusion semaphore to
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* ensure atomic 32-bit reads.
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* ensure atomic 32-bit reads.
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*/
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*/
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};
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};
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/****************************************************************************
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/****************************************************************************
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@@ -336,7 +336,7 @@ static void imxrt_enc_modulo_enable(struct imxrt_enc_lowerhalf_s *priv,
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uint32_t modulus);
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uint32_t modulus);
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static void imxrt_enc_modulo_disable(struct imxrt_enc_lowerhalf_s *priv);
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static void imxrt_enc_modulo_disable(struct imxrt_enc_lowerhalf_s *priv);
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static int imxrt_enc_index(int irq, void *context, FAR void *arg);
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static int imxrt_enc_index(int irq, void *context, void *arg);
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#ifdef CONFIG_DEBUG_SENSORS
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#ifdef CONFIG_DEBUG_SENSORS
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static int imxrt_enc_test_gen(struct imxrt_enc_lowerhalf_s *priv,
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static int imxrt_enc_test_gen(struct imxrt_enc_lowerhalf_s *priv,
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@@ -835,12 +835,12 @@ static void imxrt_enc_modulo_disable(struct imxrt_enc_lowerhalf_s *priv)
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*
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*
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****************************************************************************/
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****************************************************************************/
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static int imxrt_enc_index(int irq, void *context, FAR void *arg)
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static int imxrt_enc_index(int irq, void *context, void *arg)
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{
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{
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FAR struct imxrt_enc_lowerhalf_s *priv =
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struct imxrt_enc_lowerhalf_s *priv =
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(FAR struct imxrt_enc_lowerhalf_s *)arg;
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(struct imxrt_enc_lowerhalf_s *)arg;
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FAR const struct imxrt_qeconfig_s *config = priv->config;
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const struct imxrt_qeconfig_s *config = priv->config;
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FAR struct qe_index_s *data = priv->data;
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struct qe_index_s *data = priv->data;
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uint16_t regval = getreg16(config->base + IMXRT_ENC_CTRL_OFFSET);
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uint16_t regval = getreg16(config->base + IMXRT_ENC_CTRL_OFFSET);
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if ((regval & ENC_CTRL_XIRQ) != 0)
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if ((regval & ENC_CTRL_XIRQ) != 0)
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@@ -1159,7 +1159,7 @@ static int imxrt_ioctl(struct qe_lowerhalf_s *lower, int cmd,
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unsigned long arg)
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unsigned long arg)
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{
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{
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struct imxrt_enc_lowerhalf_s *priv = (struct imxrt_enc_lowerhalf_s *)lower;
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struct imxrt_enc_lowerhalf_s *priv = (struct imxrt_enc_lowerhalf_s *)lower;
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FAR struct qe_index_s *data = priv->data;
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struct qe_index_s *data = priv->data;
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switch (cmd)
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switch (cmd)
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{
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{
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/* QEIOC_POSDIFF:
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/* QEIOC_POSDIFF:
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@@ -273,7 +273,7 @@ static inline void imxrt_lpi2c_sendstop(struct imxrt_lpi2c_priv_s *priv);
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static inline uint32_t
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static inline uint32_t
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imxrt_lpi2c_getstatus(struct imxrt_lpi2c_priv_s *priv);
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imxrt_lpi2c_getstatus(struct imxrt_lpi2c_priv_s *priv);
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static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s * priv);
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static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv);
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#ifndef CONFIG_I2C_POLLED
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#ifndef CONFIG_I2C_POLLED
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static int imxrt_lpi2c_isr(int irq, void *context, void *arg);
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static int imxrt_lpi2c_isr(int irq, void *context, void *arg);
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@@ -1326,7 +1326,7 @@ imxrt_lpi2c_getstatus(struct imxrt_lpi2c_priv_s *priv)
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****************************************************************************/
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****************************************************************************/
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static inline uint32_t
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static inline uint32_t
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imxrt_lpi2c_getenabledints(FAR struct imxrt_lpi2c_priv_s *priv)
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imxrt_lpi2c_getenabledints(struct imxrt_lpi2c_priv_s *priv)
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{
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{
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return imxrt_lpi2c_getreg(priv, IMXRT_LPI2C_MIER_OFFSET);
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return imxrt_lpi2c_getreg(priv, IMXRT_LPI2C_MIER_OFFSET);
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}
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}
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@@ -1818,8 +1818,7 @@ static int imxrt_lpi2c_deinit(struct imxrt_lpi2c_priv_s *priv)
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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static int imxrt_lpi2c_dma_configure_mder(FAR struct imxrt_lpi2c_priv_s *
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static int imxrt_lpi2c_dma_configure_mder(struct imxrt_lpi2c_priv_s *priv)
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priv)
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{
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{
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struct imxrt_edma_xfrconfig_s config;
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struct imxrt_edma_xfrconfig_s config;
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memset(&config, 0, sizeof(config));
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memset(&config, 0, sizeof(config));
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@@ -1850,9 +1849,8 @@ static int imxrt_lpi2c_dma_configure_mder(FAR struct imxrt_lpi2c_priv_s *
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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static int imxrt_lpi2c_dma_command_configure(FAR struct imxrt_lpi2c_priv_s
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static int imxrt_lpi2c_dma_command_configure(struct imxrt_lpi2c_priv_s *priv,
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*priv, uint16_t *ccmd,
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uint16_t *ccmd, uint32_t ncmd)
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uint32_t ncmd)
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{
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{
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struct imxrt_edma_xfrconfig_s config;
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struct imxrt_edma_xfrconfig_s config;
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memset(&config, 0, sizeof(config));
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memset(&config, 0, sizeof(config));
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@@ -1883,9 +1881,8 @@ static int imxrt_lpi2c_dma_command_configure(FAR struct imxrt_lpi2c_priv_s
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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static int imxrt_lpi2c_dma_data_configure(FAR struct imxrt_lpi2c_priv_s
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static int imxrt_lpi2c_dma_data_configure(struct imxrt_lpi2c_priv_s *priv,
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*priv,
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struct i2c_msg_s *msg)
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struct i2c_msg_s *msg)
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{
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{
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struct imxrt_edma_xfrconfig_s config;
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struct imxrt_edma_xfrconfig_s config;
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memset(&config, 0, sizeof(config));
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memset(&config, 0, sizeof(config));
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@@ -1928,9 +1925,8 @@ static int imxrt_lpi2c_dma_data_configure(FAR struct imxrt_lpi2c_priv_s
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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static int imxrt_lpi2c_form_command_list(FAR struct imxrt_lpi2c_priv_s
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static int imxrt_lpi2c_form_command_list(struct imxrt_lpi2c_priv_s *priv,
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*priv, struct i2c_msg_s *msg,
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struct i2c_msg_s *msg, int ncmds)
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int ncmds)
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{
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{
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ssize_t length = 0;
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ssize_t length = 0;
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@@ -1989,7 +1985,7 @@ static int imxrt_lpi2c_form_command_list(FAR struct imxrt_lpi2c_priv_s
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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#ifdef CONFIG_IMXRT_LPI2C_DMA
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static int imxrt_lpi2c_dma_transfer(FAR struct imxrt_lpi2c_priv_s *priv)
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static int imxrt_lpi2c_dma_transfer(struct imxrt_lpi2c_priv_s *priv)
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{
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{
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int m;
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int m;
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int ntotcmds = 0;
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int ntotcmds = 0;
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@@ -164,16 +164,16 @@ static inline void imxrt_lpspi_master_set_delay_scaler(
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/* DMA support */
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/* DMA support */
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static int spi_dmarxwait(FAR struct imxrt_lpspidev_s *priv);
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static int spi_dmarxwait(struct imxrt_lpspidev_s *priv);
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static int spi_dmatxwait(FAR struct imxrt_lpspidev_s *priv);
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static int spi_dmatxwait(struct imxrt_lpspidev_s *priv);
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static inline void spi_dmarxwakeup(FAR struct imxrt_lpspidev_s *priv);
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static inline void spi_dmarxwakeup(struct imxrt_lpspidev_s *priv);
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static inline void spi_dmatxwakeup(FAR struct imxrt_lpspidev_s *priv);
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static inline void spi_dmatxwakeup(struct imxrt_lpspidev_s *priv);
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static void spi_dmarxcallback(DMACH_HANDLE handle, void *arg,
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static void spi_dmarxcallback(DMACH_HANDLE handle, void *arg,
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bool done, int result);
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bool done, int result);
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static void spi_dmatxcallback(DMACH_HANDLE handle, void *arg,
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static void spi_dmatxcallback(DMACH_HANDLE handle, void *arg,
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bool done, int result);
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bool done, int result);
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static inline void spi_dmarxstart(FAR struct imxrt_lpspidev_s *priv);
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static inline void spi_dmarxstart(struct imxrt_lpspidev_s *priv);
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static inline void spi_dmatxstart(FAR struct imxrt_lpspidev_s *priv);
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static inline void spi_dmatxstart(struct imxrt_lpspidev_s *priv);
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#endif
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#endif
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/* SPI methods */
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/* SPI methods */
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@@ -1404,9 +1404,9 @@ static void imxrt_lpspi_exchange_nodma(struct spi_dev_s *dev,
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static void imxrt_lpspi_exchange(FAR struct spi_dev_s * dev,
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static void imxrt_lpspi_exchange(struct spi_dev_s * dev,
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FAR const void * txbuffer,
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const void * txbuffer,
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FAR void * rxbuffer, size_t nwords)
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void * rxbuffer, size_t nwords)
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{
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{
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int ret;
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int ret;
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size_t adjust;
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size_t adjust;
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@@ -1414,7 +1414,7 @@ static void imxrt_lpspi_exchange(FAR struct spi_dev_s * dev,
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static uint8_t rxdummy[4] aligned_data(4);
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static uint8_t rxdummy[4] aligned_data(4);
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static const uint16_t txdummy = 0xffff;
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static const uint16_t txdummy = 0xffff;
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uint32_t regval;
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uint32_t regval;
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FAR struct imxrt_lpspidev_s *priv = (FAR struct imxrt_lpspidev_s *)dev;
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struct imxrt_lpspidev_s *priv = (struct imxrt_lpspidev_s *)dev;
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DEBUGASSERT(priv != NULL);
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DEBUGASSERT(priv != NULL);
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DEBUGASSERT(priv && priv->spibase);
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DEBUGASSERT(priv && priv->spibase);
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@@ -1729,7 +1729,7 @@ static void imxrt_lpspi_bus_initialize(struct imxrt_lpspidev_s *priv)
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static int spi_dmarxwait(FAR struct imxrt_lpspidev_s *priv)
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static int spi_dmarxwait(struct imxrt_lpspidev_s *priv)
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{
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{
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int ret;
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int ret;
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@@ -1762,7 +1762,7 @@ static int spi_dmarxwait(FAR struct imxrt_lpspidev_s *priv)
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static int spi_dmatxwait(FAR struct imxrt_lpspidev_s *priv)
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static int spi_dmatxwait(struct imxrt_lpspidev_s *priv)
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{
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{
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int ret;
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int ret;
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@@ -1795,7 +1795,7 @@ static int spi_dmatxwait(FAR struct imxrt_lpspidev_s *priv)
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static inline void spi_dmarxwakeup(FAR struct imxrt_lpspidev_s *priv)
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static inline void spi_dmarxwakeup(struct imxrt_lpspidev_s *priv)
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{
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{
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nxsem_post(&priv->rxsem);
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nxsem_post(&priv->rxsem);
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}
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}
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@@ -1810,7 +1810,7 @@ static inline void spi_dmarxwakeup(FAR struct imxrt_lpspidev_s *priv)
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static inline void spi_dmatxwakeup(FAR struct imxrt_lpspidev_s *priv)
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static inline void spi_dmatxwakeup(struct imxrt_lpspidev_s *priv)
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{
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{
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nxsem_post(&priv->txsem);
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nxsem_post(&priv->txsem);
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}
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}
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@@ -1828,7 +1828,7 @@ static inline void spi_dmatxwakeup(FAR struct imxrt_lpspidev_s *priv)
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static void spi_dmarxcallback(DMACH_HANDLE handle, void *arg, bool done,
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static void spi_dmarxcallback(DMACH_HANDLE handle, void *arg, bool done,
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int result)
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int result)
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{
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{
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FAR struct imxrt_lpspidev_s *priv = (FAR struct imxrt_lpspidev_s *)arg;
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struct imxrt_lpspidev_s *priv = (struct imxrt_lpspidev_s *)arg;
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priv->rxresult = result | 0x80000000; /* assure non-zero */
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priv->rxresult = result | 0x80000000; /* assure non-zero */
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spi_dmarxwakeup(priv);
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spi_dmarxwakeup(priv);
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@@ -1847,7 +1847,7 @@ static void spi_dmarxcallback(DMACH_HANDLE handle, void *arg, bool done,
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static void spi_dmatxcallback(DMACH_HANDLE handle, void *arg, bool done,
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static void spi_dmatxcallback(DMACH_HANDLE handle, void *arg, bool done,
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int result)
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int result)
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{
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{
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FAR struct imxrt_lpspidev_s *priv = (FAR struct imxrt_lpspidev_s *)arg;
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struct imxrt_lpspidev_s *priv = (struct imxrt_lpspidev_s *)arg;
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/* Wake-up the SPI driver */
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/* Wake-up the SPI driver */
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@@ -1865,7 +1865,7 @@ static void spi_dmatxcallback(DMACH_HANDLE handle, void *arg, bool done,
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static inline void spi_dmarxstart(FAR struct imxrt_lpspidev_s *priv)
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static inline void spi_dmarxstart(struct imxrt_lpspidev_s *priv)
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{
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{
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priv->rxresult = 0;
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priv->rxresult = 0;
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imxrt_dmach_start(priv->rxdma, spi_dmarxcallback, priv);
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imxrt_dmach_start(priv->rxdma, spi_dmarxcallback, priv);
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@@ -1881,7 +1881,7 @@ static inline void spi_dmarxstart(FAR struct imxrt_lpspidev_s *priv)
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****************************************************************************/
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****************************************************************************/
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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#ifdef CONFIG_IMXRT_LPSPI_DMA
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static inline void spi_dmatxstart(FAR struct imxrt_lpspidev_s *priv)
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static inline void spi_dmatxstart(struct imxrt_lpspidev_s *priv)
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{
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{
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priv->txresult = 0;
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priv->txresult = 0;
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imxrt_dmach_start(priv->txdma, spi_dmatxcallback, priv);
|
imxrt_dmach_start(priv->txdma, spi_dmatxcallback, priv);
|
||||||
|
|||||||
@@ -246,7 +246,7 @@ struct lpc17_40_can_s
|
|||||||
|
|
||||||
struct net_driver_s dev; /* Interface understood by the network */
|
struct net_driver_s dev; /* Interface understood by the network */
|
||||||
|
|
||||||
FAR void *cd_priv; /* Used by the arch-specific logic */
|
void *cd_priv; /* Used by the arch-specific logic */
|
||||||
|
|
||||||
#ifdef CONFIG_NET_CAN_RAW_TX_DEADLINE
|
#ifdef CONFIG_NET_CAN_RAW_TX_DEADLINE
|
||||||
struct txmbstats txmb[TXMBCOUNT];
|
struct txmbstats txmb[TXMBCOUNT];
|
||||||
@@ -308,9 +308,9 @@ static int lpc17can_ifup(struct net_driver_s *dev);
|
|||||||
static int lpc17can_ifdown(struct net_driver_s *dev);
|
static int lpc17can_ifdown(struct net_driver_s *dev);
|
||||||
static int lpc17can_txavail(struct net_driver_s *dev);
|
static int lpc17can_txavail(struct net_driver_s *dev);
|
||||||
|
|
||||||
static bool lpc17can_txringfull(FAR struct lpc17_40_can_s *dev);
|
static bool lpc17can_txringfull(struct lpc17_40_can_s *dev);
|
||||||
static int lpc17can_txpoll(struct net_driver_s *dev);
|
static int lpc17can_txpoll(struct net_driver_s *dev);
|
||||||
static int lpc17can_transmit(FAR struct lpc17_40_can_s *dev);
|
static int lpc17can_transmit(struct lpc17_40_can_s *dev);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
@@ -1013,7 +1013,7 @@ static int lpc17can_send(struct lpc17_40_can_s *dev,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static inline bool lpc17can_txringfull(FAR struct lpc17_40_can_s *dev)
|
static inline bool lpc17can_txringfull(struct lpc17_40_can_s *dev)
|
||||||
{
|
{
|
||||||
return !lpc17can_txready(dev);
|
return !lpc17can_txready(dev);
|
||||||
}
|
}
|
||||||
@@ -1040,8 +1040,8 @@ static inline bool lpc17can_txringfull(FAR struct lpc17_40_can_s *dev)
|
|||||||
|
|
||||||
static int lpc17can_txpoll(struct net_driver_s *dev)
|
static int lpc17can_txpoll(struct net_driver_s *dev)
|
||||||
{
|
{
|
||||||
FAR struct lpc17_40_can_s *priv =
|
struct lpc17_40_can_s *priv =
|
||||||
(FAR struct lpc17_40_can_s *)dev->d_private;
|
(struct lpc17_40_can_s *)dev->d_private;
|
||||||
|
|
||||||
/* If the polling resulted in data that should be sent out on the network,
|
/* If the polling resulted in data that should be sent out on the network,
|
||||||
* the field d_len is set to a value > 0.
|
* the field d_len is set to a value > 0.
|
||||||
@@ -1093,9 +1093,9 @@ static int lpc17can_txpoll(struct net_driver_s *dev)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int lpc17can_transmit(FAR struct lpc17_40_can_s *dev)
|
static int lpc17can_transmit(struct lpc17_40_can_s *dev)
|
||||||
{
|
{
|
||||||
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->cd_priv;
|
struct up_dev_s *priv = (struct up_dev_s *)dev->cd_priv;
|
||||||
struct can_frame *frame = (struct can_frame *)dev->dev.d_buf;
|
struct can_frame *frame = (struct can_frame *)dev->dev.d_buf;
|
||||||
uint32_t tid = (uint32_t)frame->can_id;
|
uint32_t tid = (uint32_t)frame->can_id;
|
||||||
uint32_t tfi = (uint32_t)frame->can_dlc << 16;
|
uint32_t tfi = (uint32_t)frame->can_dlc << 16;
|
||||||
@@ -1679,8 +1679,8 @@ static int can_bittiming(struct up_dev_s *priv)
|
|||||||
|
|
||||||
static int lpc17can_txavail(struct net_driver_s *dev)
|
static int lpc17can_txavail(struct net_driver_s *dev)
|
||||||
{
|
{
|
||||||
FAR struct lpc17_40_can_s *priv =
|
struct lpc17_40_can_s *priv =
|
||||||
(FAR struct lpc17_40_can_s *)dev->d_private;
|
(struct lpc17_40_can_s *)dev->d_private;
|
||||||
|
|
||||||
/* Ignore the notification if the interface is not yet up */
|
/* Ignore the notification if the interface is not yet up */
|
||||||
|
|
||||||
@@ -1725,8 +1725,8 @@ static int lpc17can_txavail(struct net_driver_s *dev)
|
|||||||
|
|
||||||
static int lpc17can_ifup(struct net_driver_s *dev)
|
static int lpc17can_ifup(struct net_driver_s *dev)
|
||||||
{
|
{
|
||||||
FAR struct lpc17_40_can_s *priv =
|
struct lpc17_40_can_s *priv =
|
||||||
(FAR struct lpc17_40_can_s *)dev->d_private;
|
(struct lpc17_40_can_s *)dev->d_private;
|
||||||
|
|
||||||
priv->bifup = true;
|
priv->bifup = true;
|
||||||
|
|
||||||
@@ -1760,8 +1760,8 @@ static int lpc17can_ifup(struct net_driver_s *dev)
|
|||||||
|
|
||||||
static int lpc17can_ifdown(struct net_driver_s *dev)
|
static int lpc17can_ifdown(struct net_driver_s *dev)
|
||||||
{
|
{
|
||||||
FAR struct lpc17_40_can_s *priv =
|
struct lpc17_40_can_s *priv =
|
||||||
(FAR struct lpc17_40_can_s *)dev->d_private;
|
(struct lpc17_40_can_s *)dev->d_private;
|
||||||
|
|
||||||
lpc17can_reset(priv);
|
lpc17can_reset(priv);
|
||||||
|
|
||||||
|
|||||||
@@ -85,7 +85,7 @@
|
|||||||
|
|
||||||
/* Get the private data pointer from a device pointer */
|
/* Get the private data pointer from a device pointer */
|
||||||
|
|
||||||
#define PRIV(x) ((FAR struct private_s *)(x)->ad_priv)
|
#define PRIV(x) ((struct private_s *)(x)->ad_priv)
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Private Type Definitions
|
* Private Type Definitions
|
||||||
@@ -93,34 +93,34 @@
|
|||||||
|
|
||||||
struct private_s
|
struct private_s
|
||||||
{
|
{
|
||||||
FAR const struct adc_callback_s *callback; /* ADC Callback Structure */
|
const struct adc_callback_s *callback; /* ADC Callback Structure */
|
||||||
FAR FAR struct adc_dev_s *next_device;
|
struct adc_dev_s *next_device;
|
||||||
FAR FAR struct adc_dev_s *prior_device;
|
struct adc_dev_s *prior_device;
|
||||||
bool has_channel[ADC_CHANNEL_COUNT];
|
bool has_channel[ADC_CHANNEL_COUNT];
|
||||||
};
|
};
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Private Functions
|
* Private Functions
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int interrupt_handler(int irq,
|
static int interrupt_handler(int irq,
|
||||||
FAR void *context,
|
void *context,
|
||||||
FAR void *arg);
|
void *arg);
|
||||||
|
|
||||||
static void get_next_channel(void);
|
static void get_next_channel(void);
|
||||||
static void add_device(FAR struct adc_dev_s *dev);
|
static void add_device(struct adc_dev_s *dev);
|
||||||
static void remove_device(FAR struct adc_dev_s *dev);
|
static void remove_device(struct adc_dev_s *dev);
|
||||||
|
|
||||||
/* ADC methods */
|
/* ADC methods */
|
||||||
|
|
||||||
static int my_bind(FAR struct adc_dev_s *dev,
|
static int my_bind(struct adc_dev_s *dev,
|
||||||
FAR const struct adc_callback_s *callback);
|
const struct adc_callback_s *callback);
|
||||||
|
|
||||||
static void my_reset(FAR struct adc_dev_s *dev);
|
static void my_reset(struct adc_dev_s *dev);
|
||||||
static int my_setup(FAR struct adc_dev_s *dev);
|
static int my_setup(struct adc_dev_s *dev);
|
||||||
static void my_shutdown(FAR struct adc_dev_s *dev);
|
static void my_shutdown(struct adc_dev_s *dev);
|
||||||
static void my_rxint(FAR struct adc_dev_s *dev, bool enable);
|
static void my_rxint(struct adc_dev_s *dev, bool enable);
|
||||||
static int my_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg);
|
static int my_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg);
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Private Data
|
* Private Data
|
||||||
@@ -141,7 +141,7 @@ static const int8_t g_gpio_map[ADC_CHANNEL_COUNT] =
|
|||||||
26, 27, 28, 29, -1
|
26, 27, 28, 29, -1
|
||||||
};
|
};
|
||||||
|
|
||||||
static FAR struct adc_dev_s *g_first_device = NULL;
|
static struct adc_dev_s *g_first_device = NULL;
|
||||||
|
|
||||||
static uint8_t g_current_channel = 0xf0; /* too big */
|
static uint8_t g_current_channel = 0xf0; /* too big */
|
||||||
static uint8_t g_active_count = 0;
|
static uint8_t g_active_count = 0;
|
||||||
@@ -162,10 +162,10 @@ static uint8_t g_active_count = 0;
|
|||||||
|
|
||||||
static int interrupt_handler(int irq, void *context, void *arg)
|
static int interrupt_handler(int irq, void *context, void *arg)
|
||||||
{
|
{
|
||||||
FAR struct adc_dev_s *a_device;
|
struct adc_dev_s *a_device;
|
||||||
FAR const struct adc_callback_s *a_callback;
|
const struct adc_callback_s *a_callback;
|
||||||
int32_t value;
|
int32_t value;
|
||||||
bool error_bit_set;
|
bool error_bit_set;
|
||||||
|
|
||||||
if (g_active_count == 0)
|
if (g_active_count == 0)
|
||||||
{
|
{
|
||||||
@@ -242,9 +242,9 @@ static int interrupt_handler(int irq, void *context, void *arg)
|
|||||||
|
|
||||||
static void get_next_channel(void)
|
static void get_next_channel(void)
|
||||||
{
|
{
|
||||||
FAR struct adc_dev_s *a_device;
|
struct adc_dev_s *a_device;
|
||||||
uint8_t next = g_current_channel + 1;
|
uint8_t next = g_current_channel + 1;
|
||||||
uint32_t value;
|
uint32_t value;
|
||||||
|
|
||||||
while (true)
|
while (true)
|
||||||
{
|
{
|
||||||
@@ -324,9 +324,9 @@ static void get_next_channel(void)
|
|||||||
* Note: This is called from inside a critical section.
|
* Note: This is called from inside a critical section.
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void add_device(FAR struct adc_dev_s *dev)
|
static void add_device(struct adc_dev_s *dev)
|
||||||
{
|
{
|
||||||
uint32_t value;
|
uint32_t value;
|
||||||
|
|
||||||
g_active_count += 1;
|
g_active_count += 1;
|
||||||
|
|
||||||
@@ -381,9 +381,9 @@ static void add_device(FAR struct adc_dev_s *dev)
|
|||||||
* Note: This is called from inside a critical section.
|
* Note: This is called from inside a critical section.
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
void remove_device(FAR struct adc_dev_s *dev)
|
void remove_device(struct adc_dev_s *dev)
|
||||||
{
|
{
|
||||||
FAR struct adc_dev_s *a_device;
|
struct adc_dev_s *a_device;
|
||||||
|
|
||||||
if (dev == g_first_device)
|
if (dev == g_first_device)
|
||||||
{
|
{
|
||||||
@@ -488,7 +488,7 @@ static void my_reset(struct adc_dev_s *dev)
|
|||||||
|
|
||||||
static int my_setup(struct adc_dev_s *dev)
|
static int my_setup(struct adc_dev_s *dev)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ainfo("entered: 0x%08lX\n", dev);
|
ainfo("entered: 0x%08lX\n", dev);
|
||||||
|
|
||||||
@@ -520,7 +520,7 @@ static int my_setup(struct adc_dev_s *dev)
|
|||||||
* Note: This is called from inside a critical section.
|
* Note: This is called from inside a critical section.
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void my_shutdown(FAR struct adc_dev_s *dev)
|
static void my_shutdown(struct adc_dev_s *dev)
|
||||||
{
|
{
|
||||||
ainfo("entered: 0x%08lX\n", dev);
|
ainfo("entered: 0x%08lX\n", dev);
|
||||||
|
|
||||||
@@ -598,16 +598,16 @@ static int my_ioctl(struct adc_dev_s *dev,
|
|||||||
* success or NULL (with errno set) on failure
|
* success or NULL (with errno set) on failure
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int rp2040_adc_setup(FAR const char *path,
|
int rp2040_adc_setup(const char *path,
|
||||||
bool read_adc0,
|
bool read_adc0,
|
||||||
bool read_adc1,
|
bool read_adc1,
|
||||||
bool read_adc2,
|
bool read_adc2,
|
||||||
bool read_adc3,
|
bool read_adc3,
|
||||||
bool read_temp)
|
bool read_temp)
|
||||||
{
|
{
|
||||||
FAR struct adc_dev_s *dev;
|
struct adc_dev_s *dev;
|
||||||
FAR struct private_s *priv;
|
struct private_s *priv;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ainfo("entered\n");
|
ainfo("entered\n");
|
||||||
|
|
||||||
|
|||||||
@@ -83,12 +83,12 @@ extern "C"
|
|||||||
* OK on success or an ERROR on failure
|
* OK on success or an ERROR on failure
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int rp2040_adc_setup(FAR const char *path,
|
int rp2040_adc_setup(const char *path,
|
||||||
bool read_adc0,
|
bool read_adc0,
|
||||||
bool read_adc1,
|
bool read_adc1,
|
||||||
bool read_adc2,
|
bool read_adc2,
|
||||||
bool read_adc3,
|
bool read_adc3,
|
||||||
bool read_temp);
|
bool read_temp);
|
||||||
|
|
||||||
#else /* CONFIG_ADC */
|
#else /* CONFIG_ADC */
|
||||||
|
|
||||||
|
|||||||
@@ -124,7 +124,7 @@ static const rp2040_pio_program_t pio_program =
|
|||||||
|
|
||||||
static void dma_complete(DMA_HANDLE handle, uint8_t status, void *arg)
|
static void dma_complete(DMA_HANDLE handle, uint8_t status, void *arg)
|
||||||
{
|
{
|
||||||
FAR dma_info_t *dma_info = arg;
|
dma_info_t *dma_info = arg;
|
||||||
|
|
||||||
/* Remember the status and post the dma complete event. */
|
/* Remember the status and post the dma complete event. */
|
||||||
|
|
||||||
@@ -140,9 +140,9 @@ static void dma_complete(DMA_HANDLE handle, uint8_t status, void *arg)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int my_init(FAR gspi_dev_t *gspi)
|
static int my_init(gspi_dev_t *gspi)
|
||||||
{
|
{
|
||||||
FAR rp2040_gspi_t *rp_io = (FAR rp2040_gspi_t *)(gspi->io_dev);
|
rp2040_gspi_t *rp_io = (rp2040_gspi_t *)(gspi->io_dev);
|
||||||
|
|
||||||
uint32_t divisor;
|
uint32_t divisor;
|
||||||
irqstate_t flags;
|
irqstate_t flags;
|
||||||
@@ -283,11 +283,11 @@ static int my_init(FAR gspi_dev_t *gspi)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int my_set_isr(FAR gspi_dev_t *gspi,
|
static int my_set_isr(gspi_dev_t *gspi,
|
||||||
xcpt_t thread_isr,
|
xcpt_t thread_isr,
|
||||||
FAR void *thread_isr_arg)
|
void *thread_isr_arg)
|
||||||
{
|
{
|
||||||
FAR rp2040_gspi_t *rp_io = (FAR rp2040_gspi_t *)(gspi->io_dev);
|
rp2040_gspi_t *rp_io = (rp2040_gspi_t *)(gspi->io_dev);
|
||||||
|
|
||||||
/* Set up, but do not enable, interrupt service for the data pin */
|
/* Set up, but do not enable, interrupt service for the data pin */
|
||||||
|
|
||||||
@@ -309,10 +309,10 @@ static int my_set_isr(FAR gspi_dev_t *gspi,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int my_interrupt_enable(FAR gspi_dev_t *gspi,
|
static int my_interrupt_enable(gspi_dev_t *gspi,
|
||||||
bool enable)
|
bool enable)
|
||||||
{
|
{
|
||||||
FAR rp2040_gspi_t *rp_io = (FAR rp2040_gspi_t *)(gspi->io_dev);
|
rp2040_gspi_t *rp_io = (rp2040_gspi_t *)(gspi->io_dev);
|
||||||
static int disable_count = 0;
|
static int disable_count = 0;
|
||||||
|
|
||||||
if (enable)
|
if (enable)
|
||||||
@@ -336,9 +336,9 @@ static int my_interrupt_enable(FAR gspi_dev_t *gspi,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int my_deinit(FAR gspi_dev_t *gspi)
|
static int my_deinit(gspi_dev_t *gspi)
|
||||||
{
|
{
|
||||||
FAR rp2040_gspi_t *rp_io = (FAR rp2040_gspi_t *)(gspi->io_dev);
|
rp2040_gspi_t *rp_io = (rp2040_gspi_t *)(gspi->io_dev);
|
||||||
|
|
||||||
rp2040_gpio_irq_attach(rp_io->gpio_data,
|
rp2040_gpio_irq_attach(rp_io->gpio_data,
|
||||||
RP2040_GPIO_INTR_EDGE_LOW,
|
RP2040_GPIO_INTR_EDGE_LOW,
|
||||||
@@ -364,14 +364,14 @@ static int my_deinit(FAR gspi_dev_t *gspi)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int my_write(FAR struct gspi_dev_s *gspi,
|
static int my_write(struct gspi_dev_s *gspi,
|
||||||
bool increment,
|
bool increment,
|
||||||
enum gspi_cmd_func_e function,
|
enum gspi_cmd_func_e function,
|
||||||
uint32_t address,
|
uint32_t address,
|
||||||
uint16_t length,
|
uint16_t length,
|
||||||
FAR const uint32_t *data)
|
const uint32_t *data)
|
||||||
{
|
{
|
||||||
FAR rp2040_gspi_t *rp_io = (FAR rp2040_gspi_t *)(gspi->io_dev);
|
rp2040_gspi_t *rp_io = (rp2040_gspi_t *)(gspi->io_dev);
|
||||||
dma_info_t dma_info;
|
dma_info_t dma_info;
|
||||||
DMA_HANDLE xfer_dma = rp2040_dmachannel();
|
DMA_HANDLE xfer_dma = rp2040_dmachannel();
|
||||||
uint32_t command = (0x1 << 31)
|
uint32_t command = (0x1 << 31)
|
||||||
@@ -554,25 +554,25 @@ static int my_write(FAR struct gspi_dev_s *gspi,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int my_read(FAR struct gspi_dev_s *gspi,
|
static int my_read(struct gspi_dev_s *gspi,
|
||||||
bool increment,
|
bool increment,
|
||||||
enum gspi_cmd_func_e function,
|
enum gspi_cmd_func_e function,
|
||||||
uint32_t address,
|
uint32_t address,
|
||||||
uint16_t length,
|
uint16_t length,
|
||||||
FAR uint32_t *buffer)
|
uint32_t *buffer)
|
||||||
{
|
{
|
||||||
FAR rp2040_gspi_t *rp_io = (FAR rp2040_gspi_t *)(gspi->io_dev);
|
rp2040_gspi_t *rp_io = (rp2040_gspi_t *)(gspi->io_dev);
|
||||||
dma_info_t dma_info;
|
dma_info_t dma_info;
|
||||||
DMA_HANDLE xfer_dma = rp2040_dmachannel();
|
DMA_HANDLE xfer_dma = rp2040_dmachannel();
|
||||||
DMA_HANDLE ctrl_dma = rp2040_dmachannel();
|
DMA_HANDLE ctrl_dma = rp2040_dmachannel();
|
||||||
uint32_t temp_word;
|
uint32_t temp_word;
|
||||||
uint32_t bit_length;
|
uint32_t bit_length;
|
||||||
uint32_t command = ((increment ? 1 : 0) << 30)
|
uint32_t command = ((increment ? 1 : 0) << 30)
|
||||||
| ((function & 0x3) << 28)
|
| ((function & 0x3) << 28)
|
||||||
| ((address & 0x1ffff) << 11)
|
| ((address & 0x1ffff) << 11)
|
||||||
| (length & 0x7ff);
|
| (length & 0x7ff);
|
||||||
|
|
||||||
uint32_t pacing = rp2040_pio_get_dreq(rp_io->pio,
|
uint32_t pacing = rp2040_pio_get_dreq(rp_io->pio,
|
||||||
rp_io->pio_sm,
|
rp_io->pio_sm,
|
||||||
false);
|
false);
|
||||||
|
|
||||||
@@ -783,9 +783,9 @@ gspi_dev_t *rp2040_cyw_setup(uint8_t gpio_on,
|
|||||||
uint8_t gpio_clock,
|
uint8_t gpio_clock,
|
||||||
uint8_t gpio_intr)
|
uint8_t gpio_intr)
|
||||||
{
|
{
|
||||||
FAR gspi_dev_t *gspi;
|
gspi_dev_t *gspi;
|
||||||
FAR rp2040_gspi_t *rp_io;
|
rp2040_gspi_t *rp_io;
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
wlinfo("entered.\n");
|
wlinfo("entered.\n");
|
||||||
|
|
||||||
@@ -845,7 +845,7 @@ gspi_dev_t *rp2040_cyw_setup(uint8_t gpio_on,
|
|||||||
|
|
||||||
wlinfo("setup complete. gspi = 0x%08lX\n", (uint32_t) gspi);
|
wlinfo("setup complete. gspi = 0x%08lX\n", (uint32_t) gspi);
|
||||||
|
|
||||||
return (FAR void *) gspi;
|
return (void *)gspi;
|
||||||
}
|
}
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
@@ -857,7 +857,7 @@ gspi_dev_t *rp2040_cyw_setup(uint8_t gpio_on,
|
|||||||
|
|
||||||
void rp2040_cyw_remove(gspi_dev_t *gspi)
|
void rp2040_cyw_remove(gspi_dev_t *gspi)
|
||||||
{
|
{
|
||||||
/* gspi_deregister((FAR gspi_dev_t *)gspi); */
|
/* gspi_deregister((gspi_dev_t *)gspi); */
|
||||||
}
|
}
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
|
|||||||
@@ -104,7 +104,7 @@ gspi_dev_t *rp2040_cyw_setup(uint8_t gpio_on,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
void rp2040_cyw_remove(FAR gspi_dev_t *dev);
|
void rp2040_cyw_remove(gspi_dev_t *dev);
|
||||||
|
|
||||||
#undef EXTERN
|
#undef EXTERN
|
||||||
#if defined(__cplusplus)
|
#if defined(__cplusplus)
|
||||||
|
|||||||
@@ -42,13 +42,13 @@
|
|||||||
|
|
||||||
struct instance
|
struct instance
|
||||||
{
|
{
|
||||||
uint32_t pio; /* The pio instance we are using. */
|
uint32_t pio; /* The pio instance we are using. */
|
||||||
uint32_t pio_location; /* the program location in the pio. */
|
uint32_t pio_location; /* the program location in the pio. */
|
||||||
uint32_t pio_sm; /* The state machine we are using. */
|
uint32_t pio_sm; /* The state machine we are using. */
|
||||||
FAR uint8_t *pixels; /* Buffer to hold pixels */
|
uint8_t *pixels; /* Buffer to hold pixels */
|
||||||
size_t open_count; /* Number of opens on this instance. */
|
size_t open_count; /* Number of opens on this instance. */
|
||||||
clock_t last_dma; /* when last DMA completed. */
|
clock_t last_dma; /* when last DMA completed. */
|
||||||
int power_pin; /* pin for ws2812 power */
|
int power_pin; /* pin for ws2812 power */
|
||||||
};
|
};
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
@@ -96,9 +96,8 @@ static const struct rp2040_pio_program pio_program =
|
|||||||
|
|
||||||
void dma_complete(DMA_HANDLE handle, uint8_t status, void *arg)
|
void dma_complete(DMA_HANDLE handle, uint8_t status, void *arg)
|
||||||
{
|
{
|
||||||
FAR struct ws2812_dev_s *dev_data = arg;
|
struct ws2812_dev_s *dev_data = arg;
|
||||||
FAR struct instance *priv = (FAR struct instance *)
|
struct instance *priv = (struct instance *)dev_data->private;
|
||||||
dev_data->private;
|
|
||||||
|
|
||||||
rp2040_dmafree(handle);
|
rp2040_dmafree(handle);
|
||||||
|
|
||||||
@@ -118,13 +117,12 @@ void dma_complete(DMA_HANDLE handle, uint8_t status, void *arg)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void update_pixels(FAR struct ws2812_dev_s *dev_data)
|
static void update_pixels(struct ws2812_dev_s *dev_data)
|
||||||
{
|
{
|
||||||
FAR struct instance *priv = (FAR struct instance *)
|
struct instance *priv = (struct instance *)dev_data->private;
|
||||||
dev_data->private;
|
clock_t time_delta;
|
||||||
clock_t time_delta;
|
DMA_HANDLE dma_handle = rp2040_dmachannel();
|
||||||
DMA_HANDLE dma_handle = rp2040_dmachannel();
|
dma_config_t dma_config =
|
||||||
dma_config_t dma_config =
|
|
||||||
{
|
{
|
||||||
.dreq = rp2040_pio_get_dreq(priv->pio, priv->pio_sm, true),
|
.dreq = rp2040_pio_get_dreq(priv->pio, priv->pio_sm, true),
|
||||||
.size = RP2040_DMA_SIZE_WORD,
|
.size = RP2040_DMA_SIZE_WORD,
|
||||||
@@ -165,16 +163,15 @@ static void update_pixels(FAR struct ws2812_dev_s *dev_data)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int my_open(FAR struct file *filep)
|
static int my_open(struct file *filep)
|
||||||
{
|
{
|
||||||
FAR struct inode *inode = filep->f_inode;
|
struct inode *inode = filep->f_inode;
|
||||||
FAR struct ws2812_dev_s *dev_data = inode->i_private;
|
struct ws2812_dev_s *dev_data = inode->i_private;
|
||||||
FAR struct instance *priv = (FAR struct instance *)
|
struct instance *priv = (struct instance *)dev_data->private;
|
||||||
dev_data->private;
|
rp2040_pio_sm_config config;
|
||||||
rp2040_pio_sm_config config;
|
int divisor;
|
||||||
int divisor;
|
int ret;
|
||||||
int ret;
|
irqstate_t flags;
|
||||||
irqstate_t flags;
|
|
||||||
|
|
||||||
flags = enter_critical_section();
|
flags = enter_critical_section();
|
||||||
|
|
||||||
@@ -341,12 +338,11 @@ post_and_return:
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int my_close(FAR struct file *filep)
|
static int my_close(struct file *filep)
|
||||||
{
|
{
|
||||||
FAR struct inode *inode = filep->f_inode;
|
struct inode *inode = filep->f_inode;
|
||||||
FAR struct ws2812_dev_s *dev_data = inode->i_private;
|
struct ws2812_dev_s *dev_data = inode->i_private;
|
||||||
FAR struct instance *priv = (FAR struct instance *)
|
struct instance *priv = (struct instance *)dev_data->private;
|
||||||
dev_data->private;
|
|
||||||
|
|
||||||
nxsem_wait(&dev_data->exclsem);
|
nxsem_wait(&dev_data->exclsem);
|
||||||
|
|
||||||
@@ -379,17 +375,16 @@ static int my_close(FAR struct file *filep)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static ssize_t my_write(FAR struct file *filep,
|
static ssize_t my_write(struct file *filep,
|
||||||
FAR const char *data,
|
const char *data,
|
||||||
size_t len)
|
size_t len)
|
||||||
{
|
{
|
||||||
FAR struct inode *inode = filep->f_inode;
|
struct inode *inode = filep->f_inode;
|
||||||
FAR struct ws2812_dev_s *dev_data = inode->i_private;
|
struct ws2812_dev_s *dev_data = inode->i_private;
|
||||||
FAR struct instance *priv = (FAR struct instance *)
|
struct instance *priv = (struct instance *)dev_data->private;
|
||||||
dev_data->private;
|
int position = filep->f_pos;
|
||||||
int position = filep->f_pos;
|
uint8_t *xfer_p = priv->pixels + position;
|
||||||
FAR uint8_t *xfer_p = priv->pixels + position;
|
int xfer_index = 0;
|
||||||
int xfer_index = 0;
|
|
||||||
|
|
||||||
if (data == NULL)
|
if (data == NULL)
|
||||||
{
|
{
|
||||||
@@ -462,17 +457,16 @@ static ssize_t my_write(FAR struct file *filep,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static ssize_t my_read(FAR struct file *filep,
|
static ssize_t my_read(struct file *filep,
|
||||||
FAR char *data,
|
char *data,
|
||||||
size_t len)
|
size_t len)
|
||||||
{
|
{
|
||||||
FAR struct inode *inode = filep->f_inode;
|
struct inode *inode = filep->f_inode;
|
||||||
FAR struct ws2812_dev_s *dev_data = inode->i_private;
|
struct ws2812_dev_s *dev_data = inode->i_private;
|
||||||
FAR struct instance *priv = (FAR struct instance *)
|
struct instance *priv = (struct instance *)dev_data->private;
|
||||||
dev_data->private;
|
int position = filep->f_pos;
|
||||||
int position = filep->f_pos;
|
uint8_t *xfer_p = priv->pixels + position;
|
||||||
FAR uint8_t *xfer_p = priv->pixels + position;
|
int xfer_index = 0;
|
||||||
int xfer_index = 0;
|
|
||||||
|
|
||||||
if (data == NULL || len == 0)
|
if (data == NULL || len == 0)
|
||||||
{
|
{
|
||||||
@@ -543,14 +537,14 @@ static ssize_t my_read(FAR struct file *filep,
|
|||||||
* success or NULL (with errno set) on failure
|
* success or NULL (with errno set) on failure
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
FAR void * rp2040_ws2812_setup(FAR const char *path,
|
void * rp2040_ws2812_setup(const char *path,
|
||||||
int port,
|
int port,
|
||||||
int power_pin,
|
int power_pin,
|
||||||
uint16_t pixel_count,
|
uint16_t pixel_count,
|
||||||
bool has_white)
|
bool has_white)
|
||||||
{
|
{
|
||||||
FAR struct ws2812_dev_s * dev_data;
|
struct ws2812_dev_s *dev_data;
|
||||||
FAR struct instance * priv;
|
struct instance *priv;
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
dev_data = kmm_zalloc(sizeof(struct ws2812_dev_s));
|
dev_data = kmm_zalloc(sizeof(struct ws2812_dev_s));
|
||||||
@@ -616,11 +610,10 @@ FAR void * rp2040_ws2812_setup(FAR const char *path,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int rp2040_ws2812_release(FAR void * driver)
|
int rp2040_ws2812_release(void * driver)
|
||||||
{
|
{
|
||||||
FAR struct ws2812_dev_s *dev_data = driver;
|
struct ws2812_dev_s *dev_data = driver;
|
||||||
FAR struct instance *priv = (FAR struct instance *)
|
struct instance *priv = (struct instance *)dev_data->private;
|
||||||
dev_data->private;
|
|
||||||
|
|
||||||
int ret = OK;
|
int ret = OK;
|
||||||
|
|
||||||
|
|||||||
@@ -62,11 +62,11 @@ extern "C"
|
|||||||
* success or NULL (with errno set) on failure
|
* success or NULL (with errno set) on failure
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
FAR void * rp2040_ws2812_setup(FAR const char *path,
|
void * rp2040_ws2812_setup(const char *path,
|
||||||
int port,
|
int port,
|
||||||
int power_pin,
|
int power_pin,
|
||||||
uint16_t pixel_count,
|
uint16_t pixel_count,
|
||||||
bool has_white);
|
bool has_white);
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Name: rp2040_ws2812_release
|
* Name: rp2040_ws2812_release
|
||||||
@@ -84,7 +84,7 @@ FAR void * rp2040_ws2812_setup(FAR const char *path,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int rp2040_ws2812_release(FAR void * driver);
|
int rp2040_ws2812_release(void * driver);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
@@ -107,7 +107,7 @@
|
|||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
#ifdef CONFIG_HEAP_COLORATION
|
#ifdef CONFIG_HEAP_COLORATION
|
||||||
static inline void up_heap_color(FAR void *start, size_t size)
|
static inline void up_heap_color(void *start, size_t size)
|
||||||
{
|
{
|
||||||
memset(start, HEAP_COLOR, size);
|
memset(start, HEAP_COLOR, size);
|
||||||
}
|
}
|
||||||
@@ -153,7 +153,7 @@ static inline void up_heap_color(FAR void *start, size_t size)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
|
void up_allocate_heap(void **heap_start, size_t *heap_size)
|
||||||
{
|
{
|
||||||
#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
|
#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
|
||||||
/* Get the unaligned size and position of the user-space heap.
|
/* Get the unaligned size and position of the user-space heap.
|
||||||
@@ -182,12 +182,12 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
|
|||||||
/* Return the user-space heap settings */
|
/* Return the user-space heap settings */
|
||||||
|
|
||||||
board_autoled_on(LED_HEAPALLOCATE);
|
board_autoled_on(LED_HEAPALLOCATE);
|
||||||
*heap_start = (FAR void *)ubase;
|
*heap_start = (void *)ubase;
|
||||||
*heap_size = usize;
|
*heap_size = usize;
|
||||||
|
|
||||||
/* Colorize the heap for debug */
|
/* Colorize the heap for debug */
|
||||||
|
|
||||||
up_heap_color((FAR void *)ubase, usize);
|
up_heap_color((void *)ubase, usize);
|
||||||
|
|
||||||
/* Allow user-mode access to the user heap memory */
|
/* Allow user-mode access to the user heap memory */
|
||||||
|
|
||||||
@@ -197,7 +197,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
|
|||||||
/* Return the heap settings */
|
/* Return the heap settings */
|
||||||
|
|
||||||
board_autoled_on(LED_HEAPALLOCATE);
|
board_autoled_on(LED_HEAPALLOCATE);
|
||||||
*heap_start = (FAR void *)g_idle_topstack;
|
*heap_start = (void *)g_idle_topstack;
|
||||||
*heap_size = SRAM1_END - g_idle_topstack;
|
*heap_size = SRAM1_END - g_idle_topstack;
|
||||||
|
|
||||||
/* Colorize the heap for debug */
|
/* Colorize the heap for debug */
|
||||||
@@ -217,7 +217,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
|
|||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
|
#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
|
||||||
void up_allocate_kheap(FAR void **heap_start, size_t *heap_size)
|
void up_allocate_kheap(void **heap_start, size_t *heap_size)
|
||||||
{
|
{
|
||||||
/* Get the unaligned size and position of the user-space heap.
|
/* Get the unaligned size and position of the user-space heap.
|
||||||
* This heap begins after the user-space .bss section at an offset
|
* This heap begins after the user-space .bss section at an offset
|
||||||
@@ -246,7 +246,7 @@ void up_allocate_kheap(FAR void **heap_start, size_t *heap_size)
|
|||||||
* that was not dedicated to the user heap).
|
* that was not dedicated to the user heap).
|
||||||
*/
|
*/
|
||||||
|
|
||||||
*heap_start = (FAR void *)USERSPACE->us_bssend;
|
*heap_start = (void *)USERSPACE->us_bssend;
|
||||||
*heap_size = ubase - (uintptr_t)USERSPACE->us_bssend;
|
*heap_size = ubase - (uintptr_t)USERSPACE->us_bssend;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
@@ -274,11 +274,11 @@ void arm_addregion(void)
|
|||||||
|
|
||||||
/* Colorize the heap for debug */
|
/* Colorize the heap for debug */
|
||||||
|
|
||||||
up_heap_color((FAR void *)SRAM2_START, SRAM2_END - SRAM2_START);
|
up_heap_color((void *)SRAM2_START, SRAM2_END - SRAM2_START);
|
||||||
|
|
||||||
/* Add the SRAM2 user heap region. */
|
/* Add the SRAM2 user heap region. */
|
||||||
|
|
||||||
kumm_addregion((FAR void *)SRAM2_START, SRAM2_END - SRAM2_START);
|
kumm_addregion((void *)SRAM2_START, SRAM2_END - SRAM2_START);
|
||||||
|
|
||||||
#endif /* SRAM2 */
|
#endif /* SRAM2 */
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -719,7 +719,7 @@ static ssize_t stm32wl5_ipcc_write_notify(struct ipcc_lower_s *ipcc)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_ipcc_cleanup(FAR struct ipcc_lower_s *ipcc)
|
static int stm32wl5_ipcc_cleanup(struct ipcc_lower_s *ipcc)
|
||||||
{
|
{
|
||||||
DEBUGASSERT(ipcc);
|
DEBUGASSERT(ipcc);
|
||||||
DEBUGASSERT(ipcc->chan <= IPCC_NCHAN);
|
DEBUGASSERT(ipcc->chan <= IPCC_NCHAN);
|
||||||
|
|||||||
@@ -156,7 +156,7 @@ static void stm32wl5_dumpnvic(const char *msg, int irq)
|
|||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
#ifdef CONFIG_DEBUG_FEATURES
|
#ifdef CONFIG_DEBUG_FEATURES
|
||||||
static int stm32wl5_nmi(int irq, FAR void *context, FAR void *arg)
|
static int stm32wl5_nmi(int irq, void *context, void *arg)
|
||||||
{
|
{
|
||||||
up_irq_save();
|
up_irq_save();
|
||||||
_err("PANIC!!! NMI received\n");
|
_err("PANIC!!! NMI received\n");
|
||||||
@@ -164,7 +164,7 @@ static int stm32wl5_nmi(int irq, FAR void *context, FAR void *arg)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int stm32wl5_busfault(int irq, FAR void *context, FAR void *arg)
|
static int stm32wl5_busfault(int irq, void *context, void *arg)
|
||||||
{
|
{
|
||||||
up_irq_save();
|
up_irq_save();
|
||||||
_err("PANIC!!! Bus fault received: %08x\n",
|
_err("PANIC!!! Bus fault received: %08x\n",
|
||||||
@@ -173,7 +173,7 @@ static int stm32wl5_busfault(int irq, FAR void *context, FAR void *arg)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int stm32wl5_usagefault(int irq, FAR void *context, FAR void *arg)
|
static int stm32wl5_usagefault(int irq, void *context, void *arg)
|
||||||
{
|
{
|
||||||
up_irq_save();
|
up_irq_save();
|
||||||
_err("PANIC!!! Usage fault received: %08x\n",
|
_err("PANIC!!! Usage fault received: %08x\n",
|
||||||
@@ -182,7 +182,7 @@ static int stm32wl5_usagefault(int irq, FAR void *context, FAR void *arg)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int stm32wl5_pendsv(int irq, FAR void *context, FAR void *arg)
|
static int stm32wl5_pendsv(int irq, void *context, void *arg)
|
||||||
{
|
{
|
||||||
up_irq_save();
|
up_irq_save();
|
||||||
_err("PANIC!!! PendSV received\n");
|
_err("PANIC!!! PendSV received\n");
|
||||||
@@ -190,7 +190,7 @@ static int stm32wl5_pendsv(int irq, FAR void *context, FAR void *arg)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int stm32wl5_dbgmonitor(int irq, FAR void *context, FAR void *arg)
|
static int stm32wl5_dbgmonitor(int irq, void *context, void *arg)
|
||||||
{
|
{
|
||||||
up_irq_save();
|
up_irq_save();
|
||||||
_err("PANIC!!! Debug Monitor received\n");
|
_err("PANIC!!! Debug Monitor received\n");
|
||||||
@@ -198,7 +198,7 @@ static int stm32wl5_dbgmonitor(int irq, FAR void *context, FAR void *arg)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int stm32wl5_reserved(int irq, FAR void *context, FAR void *arg)
|
static int stm32wl5_reserved(int irq, void *context, void *arg)
|
||||||
{
|
{
|
||||||
up_irq_save();
|
up_irq_save();
|
||||||
_err("PANIC!!! Reserved interrupt\n");
|
_err("PANIC!!! Reserved interrupt\n");
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@@ -210,7 +210,7 @@
|
|||||||
|
|
||||||
struct stm32wl5_tim_priv_s
|
struct stm32wl5_tim_priv_s
|
||||||
{
|
{
|
||||||
FAR const struct stm32wl5_tim_ops_s *ops;
|
const struct stm32wl5_tim_ops_s *ops;
|
||||||
enum stm32wl5_tim_mode_e mode;
|
enum stm32wl5_tim_mode_e mode;
|
||||||
uint32_t base; /* TIMn base address */
|
uint32_t base; /* TIMn base address */
|
||||||
};
|
};
|
||||||
@@ -221,61 +221,61 @@ struct stm32wl5_tim_priv_s
|
|||||||
|
|
||||||
/* Register helpers */
|
/* Register helpers */
|
||||||
|
|
||||||
static inline uint16_t stm32wl5_getreg16(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline uint16_t stm32wl5_getreg16(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset);
|
uint8_t offset);
|
||||||
static inline void stm32wl5_putreg16(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline void stm32wl5_putreg16(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset, uint16_t value);
|
uint8_t offset, uint16_t value);
|
||||||
static inline void stm32wl5_modifyreg16(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline void stm32wl5_modifyreg16(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset, uint16_t clearbits,
|
uint8_t offset, uint16_t clearbits,
|
||||||
uint16_t setbits);
|
uint16_t setbits);
|
||||||
static inline uint32_t stm32wl5_getreg32(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline uint32_t stm32wl5_getreg32(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset);
|
uint8_t offset);
|
||||||
static inline void stm32wl5_putreg32(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline void stm32wl5_putreg32(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset, uint32_t value);
|
uint8_t offset, uint32_t value);
|
||||||
|
|
||||||
/* Timer helpers */
|
/* Timer helpers */
|
||||||
|
|
||||||
static void stm32wl5_tim_reload_counter(FAR struct stm32wl5_tim_dev_s *dev);
|
static void stm32wl5_tim_reload_counter(struct stm32wl5_tim_dev_s *dev);
|
||||||
static void stm32wl5_tim_enable(FAR struct stm32wl5_tim_dev_s *dev);
|
static void stm32wl5_tim_enable(struct stm32wl5_tim_dev_s *dev);
|
||||||
static void stm32wl5_tim_disable(FAR struct stm32wl5_tim_dev_s *dev);
|
static void stm32wl5_tim_disable(struct stm32wl5_tim_dev_s *dev);
|
||||||
static void stm32wl5_tim_reset(FAR struct stm32wl5_tim_dev_s *dev);
|
static void stm32wl5_tim_reset(struct stm32wl5_tim_dev_s *dev);
|
||||||
#if defined(HAVE_TIM1_GPIOCONFIG) || defined(HAVE_TIM2_GPIOCONFIG) || \
|
#if defined(HAVE_TIM1_GPIOCONFIG) || defined(HAVE_TIM2_GPIOCONFIG) || \
|
||||||
defined(HAVE_TIM3_GPIOCONFIG) || defined(HAVE_TIM4_GPIOCONFIG) || \
|
defined(HAVE_TIM3_GPIOCONFIG) || defined(HAVE_TIM4_GPIOCONFIG) || \
|
||||||
defined(HAVE_TIM5_GPIOCONFIG) || defined(HAVE_TIM8_GPIOCONFIG) || \
|
defined(HAVE_TIM5_GPIOCONFIG) || defined(HAVE_TIM8_GPIOCONFIG) || \
|
||||||
defined(HAVE_TIM15_GPIOCONFIG) || defined(HAVE_TIM16_GPIOCONFIG) || \
|
defined(HAVE_TIM15_GPIOCONFIG) || defined(HAVE_TIM16_GPIOCONFIG) || \
|
||||||
defined(HAVE_TIM17_GPIOCONFIG)
|
defined(HAVE_TIM17_GPIOCONFIG)
|
||||||
static void stm32wl5_tim_gpioconfig(uint32_t cfg,
|
static void stm32wl5_tim_gpioconfig(uint32_t cfg,
|
||||||
enum stm32wl5_tim_channel_e mode);
|
enum stm32wl5_tim_channel_e mode);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Timer methods */
|
/* Timer methods */
|
||||||
|
|
||||||
static int stm32wl5_tim_setmode(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setmode(struct stm32wl5_tim_dev_s *dev,
|
||||||
enum stm32wl5_tim_mode_e mode);
|
enum stm32wl5_tim_mode_e mode);
|
||||||
static int stm32wl5_tim_setclock(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setclock(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint32_t freq);
|
uint32_t freq);
|
||||||
static uint32_t stm32wl5_tim_getclock(FAR struct stm32wl5_tim_dev_s *dev);
|
static uint32_t stm32wl5_tim_getclock(struct stm32wl5_tim_dev_s *dev);
|
||||||
static void stm32wl5_tim_setperiod(FAR struct stm32wl5_tim_dev_s *dev,
|
static void stm32wl5_tim_setperiod(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint32_t period);
|
uint32_t period);
|
||||||
static uint32_t stm32wl5_tim_getperiod(FAR struct stm32wl5_tim_dev_s *dev);
|
static uint32_t stm32wl5_tim_getperiod(struct stm32wl5_tim_dev_s *dev);
|
||||||
static uint32_t stm32wl5_tim_getcounter(FAR struct stm32wl5_tim_dev_s *dev);
|
static uint32_t stm32wl5_tim_getcounter(struct stm32wl5_tim_dev_s *dev);
|
||||||
static int stm32wl5_tim_setchannel(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setchannel(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t channel,
|
uint8_t channel,
|
||||||
enum stm32wl5_tim_channel_e mode);
|
enum stm32wl5_tim_channel_e mode);
|
||||||
static int stm32wl5_tim_setcompare(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setcompare(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t channel, uint32_t compare);
|
uint8_t channel, uint32_t compare);
|
||||||
static int stm32wl5_tim_getcapture(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_getcapture(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t channel);
|
uint8_t channel);
|
||||||
static int stm32wl5_tim_setisr(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setisr(struct stm32wl5_tim_dev_s *dev,
|
||||||
xcpt_t handler, void *arg, int source);
|
xcpt_t handler, void *arg, int source);
|
||||||
static void stm32wl5_tim_enableint(FAR struct stm32wl5_tim_dev_s *dev,
|
static void stm32wl5_tim_enableint(struct stm32wl5_tim_dev_s *dev,
|
||||||
int source);
|
|
||||||
static void stm32wl5_tim_disableint(FAR struct stm32wl5_tim_dev_s *dev,
|
|
||||||
int source);
|
int source);
|
||||||
static void stm32wl5_tim_ackint(FAR struct stm32wl5_tim_dev_s *dev,
|
static void stm32wl5_tim_disableint(struct stm32wl5_tim_dev_s *dev,
|
||||||
int source);
|
int source);
|
||||||
static int stm32wl5_tim_checkint(FAR struct stm32wl5_tim_dev_s *dev,
|
static void stm32wl5_tim_ackint(struct stm32wl5_tim_dev_s *dev,
|
||||||
int source);
|
int source);
|
||||||
|
static int stm32wl5_tim_checkint(struct stm32wl5_tim_dev_s *dev,
|
||||||
|
int source);
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Private Data
|
* Private Data
|
||||||
@@ -409,8 +409,8 @@ struct stm32wl5_tim_priv_s stm32wl5_tim17_priv =
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static inline uint16_t stm32wl5_getreg16(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline uint16_t stm32wl5_getreg16(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset)
|
uint8_t offset)
|
||||||
{
|
{
|
||||||
return getreg16(((struct stm32wl5_tim_priv_s *)dev)->base + offset);
|
return getreg16(((struct stm32wl5_tim_priv_s *)dev)->base + offset);
|
||||||
}
|
}
|
||||||
@@ -423,8 +423,8 @@ static inline uint16_t stm32wl5_getreg16(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static inline void stm32wl5_putreg16(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline void stm32wl5_putreg16(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset, uint16_t value)
|
uint8_t offset, uint16_t value)
|
||||||
{
|
{
|
||||||
putreg16(value, ((struct stm32wl5_tim_priv_s *)dev)->base + offset);
|
putreg16(value, ((struct stm32wl5_tim_priv_s *)dev)->base + offset);
|
||||||
}
|
}
|
||||||
@@ -437,9 +437,9 @@ static inline void stm32wl5_putreg16(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static inline void stm32wl5_modifyreg16(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline void stm32wl5_modifyreg16(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset, uint16_t clearbits,
|
uint8_t offset, uint16_t clearbits,
|
||||||
uint16_t setbits)
|
uint16_t setbits)
|
||||||
{
|
{
|
||||||
modifyreg16(((struct stm32wl5_tim_priv_s *)dev)->base + offset, clearbits,
|
modifyreg16(((struct stm32wl5_tim_priv_s *)dev)->base + offset, clearbits,
|
||||||
setbits);
|
setbits);
|
||||||
@@ -454,8 +454,8 @@ static inline void stm32wl5_modifyreg16(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static inline uint32_t stm32wl5_getreg32(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline uint32_t stm32wl5_getreg32(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset)
|
uint8_t offset)
|
||||||
{
|
{
|
||||||
return getreg32(((struct stm32wl5_tim_priv_s *)dev)->base + offset);
|
return getreg32(((struct stm32wl5_tim_priv_s *)dev)->base + offset);
|
||||||
}
|
}
|
||||||
@@ -469,7 +469,7 @@ static inline uint32_t stm32wl5_getreg32(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static inline void stm32wl5_putreg32(FAR struct stm32wl5_tim_dev_s *dev,
|
static inline void stm32wl5_putreg32(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t offset, uint32_t value)
|
uint8_t offset, uint32_t value)
|
||||||
{
|
{
|
||||||
putreg32(value, ((struct stm32wl5_tim_priv_s *)dev)->base + offset);
|
putreg32(value, ((struct stm32wl5_tim_priv_s *)dev)->base + offset);
|
||||||
@@ -479,7 +479,7 @@ static inline void stm32wl5_putreg32(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_reload_counter
|
* Name: stm32wl5_tim_reload_counter
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void stm32wl5_tim_reload_counter(FAR struct stm32wl5_tim_dev_s *dev)
|
static void stm32wl5_tim_reload_counter(struct stm32wl5_tim_dev_s *dev)
|
||||||
{
|
{
|
||||||
uint16_t val = stm32wl5_getreg16(dev, STM32WL5_GTIM_EGR_OFFSET);
|
uint16_t val = stm32wl5_getreg16(dev, STM32WL5_GTIM_EGR_OFFSET);
|
||||||
val |= GTIM_EGR_UG;
|
val |= GTIM_EGR_UG;
|
||||||
@@ -490,7 +490,7 @@ static void stm32wl5_tim_reload_counter(FAR struct stm32wl5_tim_dev_s *dev)
|
|||||||
* Name: stm32wl5_tim_enable
|
* Name: stm32wl5_tim_enable
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void stm32wl5_tim_enable(FAR struct stm32wl5_tim_dev_s *dev)
|
static void stm32wl5_tim_enable(struct stm32wl5_tim_dev_s *dev)
|
||||||
{
|
{
|
||||||
uint16_t val = stm32wl5_getreg16(dev, STM32WL5_GTIM_CR1_OFFSET);
|
uint16_t val = stm32wl5_getreg16(dev, STM32WL5_GTIM_CR1_OFFSET);
|
||||||
val |= GTIM_CR1_CEN;
|
val |= GTIM_CR1_CEN;
|
||||||
@@ -502,7 +502,7 @@ static void stm32wl5_tim_enable(FAR struct stm32wl5_tim_dev_s *dev)
|
|||||||
* Name: stm32wl5_tim_disable
|
* Name: stm32wl5_tim_disable
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void stm32wl5_tim_disable(FAR struct stm32wl5_tim_dev_s *dev)
|
static void stm32wl5_tim_disable(struct stm32wl5_tim_dev_s *dev)
|
||||||
{
|
{
|
||||||
uint16_t val = stm32wl5_getreg16(dev, STM32WL5_GTIM_CR1_OFFSET);
|
uint16_t val = stm32wl5_getreg16(dev, STM32WL5_GTIM_CR1_OFFSET);
|
||||||
val &= ~GTIM_CR1_CEN;
|
val &= ~GTIM_CR1_CEN;
|
||||||
@@ -518,7 +518,7 @@ static void stm32wl5_tim_disable(FAR struct stm32wl5_tim_dev_s *dev)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void stm32wl5_tim_reset(FAR struct stm32wl5_tim_dev_s *dev)
|
static void stm32wl5_tim_reset(struct stm32wl5_tim_dev_s *dev)
|
||||||
{
|
{
|
||||||
((struct stm32wl5_tim_priv_s *)dev)->mode = STM32WL5_TIM_MODE_DISABLED;
|
((struct stm32wl5_tim_priv_s *)dev)->mode = STM32WL5_TIM_MODE_DISABLED;
|
||||||
stm32wl5_tim_disable(dev);
|
stm32wl5_tim_disable(dev);
|
||||||
@@ -553,8 +553,8 @@ static void stm32wl5_tim_gpioconfig(uint32_t cfg,
|
|||||||
* Name: stm32wl5_tim_setmode
|
* Name: stm32wl5_tim_setmode
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_tim_setmode(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setmode(struct stm32wl5_tim_dev_s *dev,
|
||||||
enum stm32wl5_tim_mode_e mode)
|
enum stm32wl5_tim_mode_e mode)
|
||||||
{
|
{
|
||||||
uint16_t val = GTIM_CR1_CEN | GTIM_CR1_ARPE;
|
uint16_t val = GTIM_CR1_CEN | GTIM_CR1_ARPE;
|
||||||
|
|
||||||
@@ -629,8 +629,8 @@ static int stm32wl5_tim_setmode(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_setclock
|
* Name: stm32wl5_tim_setclock
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_tim_setclock(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setclock(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint32_t freq)
|
uint32_t freq)
|
||||||
{
|
{
|
||||||
uint32_t freqin;
|
uint32_t freqin;
|
||||||
int prescaler;
|
int prescaler;
|
||||||
@@ -754,7 +754,7 @@ static int stm32wl5_tim_setclock(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_getclock
|
* Name: stm32wl5_tim_getclock
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static uint32_t stm32wl5_tim_getclock(FAR struct stm32wl5_tim_dev_s *dev)
|
static uint32_t stm32wl5_tim_getclock(struct stm32wl5_tim_dev_s *dev)
|
||||||
{
|
{
|
||||||
uint32_t freqin;
|
uint32_t freqin;
|
||||||
uint32_t clock;
|
uint32_t clock;
|
||||||
@@ -844,8 +844,8 @@ static uint32_t stm32wl5_tim_getclock(FAR struct stm32wl5_tim_dev_s *dev)
|
|||||||
* Name: stm32wl5_tim_setperiod
|
* Name: stm32wl5_tim_setperiod
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void stm32wl5_tim_setperiod(FAR struct stm32wl5_tim_dev_s *dev,
|
static void stm32wl5_tim_setperiod(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint32_t period)
|
uint32_t period)
|
||||||
{
|
{
|
||||||
DEBUGASSERT(dev != NULL);
|
DEBUGASSERT(dev != NULL);
|
||||||
stm32wl5_putreg32(dev, STM32WL5_GTIM_ARR_OFFSET, period);
|
stm32wl5_putreg32(dev, STM32WL5_GTIM_ARR_OFFSET, period);
|
||||||
@@ -855,7 +855,7 @@ static void stm32wl5_tim_setperiod(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_getperiod
|
* Name: stm32wl5_tim_getperiod
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static uint32_t stm32wl5_tim_getperiod (FAR struct stm32wl5_tim_dev_s *dev)
|
static uint32_t stm32wl5_tim_getperiod (struct stm32wl5_tim_dev_s *dev)
|
||||||
{
|
{
|
||||||
DEBUGASSERT(dev != NULL);
|
DEBUGASSERT(dev != NULL);
|
||||||
return stm32wl5_getreg32 (dev, STM32WL5_GTIM_ARR_OFFSET);
|
return stm32wl5_getreg32 (dev, STM32WL5_GTIM_ARR_OFFSET);
|
||||||
@@ -865,7 +865,7 @@ static uint32_t stm32wl5_tim_getperiod (FAR struct stm32wl5_tim_dev_s *dev)
|
|||||||
* Name: stm32wl5_tim_getcounter
|
* Name: stm32wl5_tim_getcounter
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static uint32_t stm32wl5_tim_getcounter(FAR struct stm32wl5_tim_dev_s *dev)
|
static uint32_t stm32wl5_tim_getcounter(struct stm32wl5_tim_dev_s *dev)
|
||||||
{
|
{
|
||||||
DEBUGASSERT(dev != NULL);
|
DEBUGASSERT(dev != NULL);
|
||||||
uint32_t counter = stm32wl5_getreg32(dev, STM32WL5_GTIM_CNT_OFFSET);
|
uint32_t counter = stm32wl5_getreg32(dev, STM32WL5_GTIM_CNT_OFFSET);
|
||||||
@@ -897,9 +897,9 @@ static uint32_t stm32wl5_tim_getcounter(FAR struct stm32wl5_tim_dev_s *dev)
|
|||||||
* Name: stm32wl5_tim_setchannel
|
* Name: stm32wl5_tim_setchannel
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_tim_setchannel(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setchannel(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t channel,
|
uint8_t channel,
|
||||||
enum stm32wl5_tim_channel_e mode)
|
enum stm32wl5_tim_channel_e mode)
|
||||||
{
|
{
|
||||||
uint16_t ccmr_orig = 0;
|
uint16_t ccmr_orig = 0;
|
||||||
uint16_t ccmr_val = 0;
|
uint16_t ccmr_val = 0;
|
||||||
@@ -1294,8 +1294,8 @@ static int stm32wl5_tim_setchannel(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_setcompare
|
* Name: stm32wl5_tim_setcompare
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_tim_setcompare(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setcompare(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t channel, uint32_t compare)
|
uint8_t channel, uint32_t compare)
|
||||||
{
|
{
|
||||||
DEBUGASSERT(dev != NULL);
|
DEBUGASSERT(dev != NULL);
|
||||||
|
|
||||||
@@ -1328,8 +1328,8 @@ static int stm32wl5_tim_setcompare(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_getcapture
|
* Name: stm32wl5_tim_getcapture
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_tim_getcapture(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_getcapture(struct stm32wl5_tim_dev_s *dev,
|
||||||
uint8_t channel)
|
uint8_t channel)
|
||||||
{
|
{
|
||||||
DEBUGASSERT(dev != NULL);
|
DEBUGASSERT(dev != NULL);
|
||||||
|
|
||||||
@@ -1355,8 +1355,8 @@ static int stm32wl5_tim_getcapture(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_setisr
|
* Name: stm32wl5_tim_setisr
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_tim_setisr(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_setisr(struct stm32wl5_tim_dev_s *dev,
|
||||||
xcpt_t handler, void *arg, int source)
|
xcpt_t handler, void *arg, int source)
|
||||||
{
|
{
|
||||||
int vectorno;
|
int vectorno;
|
||||||
|
|
||||||
@@ -1454,8 +1454,8 @@ static int stm32wl5_tim_setisr(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_enableint
|
* Name: stm32wl5_tim_enableint
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void stm32wl5_tim_enableint(FAR struct stm32wl5_tim_dev_s *dev,
|
static void stm32wl5_tim_enableint(struct stm32wl5_tim_dev_s *dev,
|
||||||
int source)
|
int source)
|
||||||
{
|
{
|
||||||
DEBUGASSERT(dev != NULL);
|
DEBUGASSERT(dev != NULL);
|
||||||
stm32wl5_modifyreg16(dev, STM32WL5_GTIM_DIER_OFFSET, 0, GTIM_DIER_UIE);
|
stm32wl5_modifyreg16(dev, STM32WL5_GTIM_DIER_OFFSET, 0, GTIM_DIER_UIE);
|
||||||
@@ -1465,8 +1465,8 @@ static void stm32wl5_tim_enableint(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_disableint
|
* Name: stm32wl5_tim_disableint
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void stm32wl5_tim_disableint(FAR struct stm32wl5_tim_dev_s *dev,
|
static void stm32wl5_tim_disableint(struct stm32wl5_tim_dev_s *dev,
|
||||||
int source)
|
int source)
|
||||||
{
|
{
|
||||||
DEBUGASSERT(dev != NULL);
|
DEBUGASSERT(dev != NULL);
|
||||||
stm32wl5_modifyreg16(dev, STM32WL5_GTIM_DIER_OFFSET, GTIM_DIER_UIE, 0);
|
stm32wl5_modifyreg16(dev, STM32WL5_GTIM_DIER_OFFSET, GTIM_DIER_UIE, 0);
|
||||||
@@ -1476,8 +1476,7 @@ static void stm32wl5_tim_disableint(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_ackint
|
* Name: stm32wl5_tim_ackint
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void stm32wl5_tim_ackint(FAR struct stm32wl5_tim_dev_s *dev,
|
static void stm32wl5_tim_ackint(struct stm32wl5_tim_dev_s *dev, int source)
|
||||||
int source)
|
|
||||||
{
|
{
|
||||||
stm32wl5_putreg16(dev, STM32WL5_GTIM_SR_OFFSET, ~GTIM_SR_UIF);
|
stm32wl5_putreg16(dev, STM32WL5_GTIM_SR_OFFSET, ~GTIM_SR_UIF);
|
||||||
}
|
}
|
||||||
@@ -1486,7 +1485,7 @@ static void stm32wl5_tim_ackint(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_checkint
|
* Name: stm32wl5_tim_checkint
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_tim_checkint(FAR struct stm32wl5_tim_dev_s *dev,
|
static int stm32wl5_tim_checkint(struct stm32wl5_tim_dev_s *dev,
|
||||||
int source)
|
int source)
|
||||||
{
|
{
|
||||||
uint16_t regval = stm32wl5_getreg16(dev, STM32WL5_GTIM_SR_OFFSET);
|
uint16_t regval = stm32wl5_getreg16(dev, STM32WL5_GTIM_SR_OFFSET);
|
||||||
@@ -1501,7 +1500,7 @@ static int stm32wl5_tim_checkint(FAR struct stm32wl5_tim_dev_s *dev,
|
|||||||
* Name: stm32wl5_tim_init
|
* Name: stm32wl5_tim_init
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
FAR struct stm32wl5_tim_dev_s *stm32wl5_tim_init(int timer)
|
struct stm32wl5_tim_dev_s *stm32wl5_tim_init(int timer)
|
||||||
{
|
{
|
||||||
struct stm32wl5_tim_dev_s *dev = NULL;
|
struct stm32wl5_tim_dev_s *dev = NULL;
|
||||||
|
|
||||||
@@ -1608,7 +1607,7 @@ FAR struct stm32wl5_tim_dev_s *stm32wl5_tim_init(int timer)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int stm32wl5_tim_deinit(FAR struct stm32wl5_tim_dev_s *dev)
|
int stm32wl5_tim_deinit(struct stm32wl5_tim_dev_s *dev)
|
||||||
{
|
{
|
||||||
DEBUGASSERT(dev != NULL);
|
DEBUGASSERT(dev != NULL);
|
||||||
|
|
||||||
|
|||||||
@@ -139,30 +139,30 @@ struct stm32wl5_tim_ops_s
|
|||||||
{
|
{
|
||||||
/* Basic Timers */
|
/* Basic Timers */
|
||||||
|
|
||||||
int (*setmode)(FAR struct stm32wl5_tim_dev_s *dev,
|
int (*setmode)(struct stm32wl5_tim_dev_s *dev,
|
||||||
enum stm32wl5_tim_mode_e mode);
|
enum stm32wl5_tim_mode_e mode);
|
||||||
int (*setclock)(FAR struct stm32wl5_tim_dev_s *dev, uint32_t freq);
|
int (*setclock)(struct stm32wl5_tim_dev_s *dev, uint32_t freq);
|
||||||
uint32_t (*getclock)(FAR struct stm32wl5_tim_dev_s *dev);
|
uint32_t (*getclock)(struct stm32wl5_tim_dev_s *dev);
|
||||||
void (*setperiod)(FAR struct stm32wl5_tim_dev_s *dev, uint32_t period);
|
void (*setperiod)(struct stm32wl5_tim_dev_s *dev, uint32_t period);
|
||||||
uint32_t (*getperiod)(FAR struct stm32wl5_tim_dev_s *dev);
|
uint32_t (*getperiod)(struct stm32wl5_tim_dev_s *dev);
|
||||||
uint32_t (*getcounter)(FAR struct stm32wl5_tim_dev_s *dev);
|
uint32_t (*getcounter)(struct stm32wl5_tim_dev_s *dev);
|
||||||
|
|
||||||
/* General and Advanced Timers Adds */
|
/* General and Advanced Timers Adds */
|
||||||
|
|
||||||
int (*setchannel)(FAR struct stm32wl5_tim_dev_s *dev, uint8_t channel,
|
int (*setchannel)(struct stm32wl5_tim_dev_s *dev, uint8_t channel,
|
||||||
enum stm32wl5_tim_channel_e mode);
|
enum stm32wl5_tim_channel_e mode);
|
||||||
int (*setcompare)(FAR struct stm32wl5_tim_dev_s *dev, uint8_t channel,
|
int (*setcompare)(struct stm32wl5_tim_dev_s *dev, uint8_t channel,
|
||||||
uint32_t compare);
|
uint32_t compare);
|
||||||
int (*getcapture)(FAR struct stm32wl5_tim_dev_s *dev, uint8_t channel);
|
int (*getcapture)(struct stm32wl5_tim_dev_s *dev, uint8_t channel);
|
||||||
|
|
||||||
/* Timer interrupts */
|
/* Timer interrupts */
|
||||||
|
|
||||||
int (*setisr)(FAR struct stm32wl5_tim_dev_s *dev,
|
int (*setisr)(struct stm32wl5_tim_dev_s *dev,
|
||||||
xcpt_t handler, void *arg, int source);
|
xcpt_t handler, void *arg, int source);
|
||||||
void (*enableint)(FAR struct stm32wl5_tim_dev_s *dev, int source);
|
void (*enableint)(struct stm32wl5_tim_dev_s *dev, int source);
|
||||||
void (*disableint)(FAR struct stm32wl5_tim_dev_s *dev, int source);
|
void (*disableint)(struct stm32wl5_tim_dev_s *dev, int source);
|
||||||
void (*ackint)(FAR struct stm32wl5_tim_dev_s *dev, int source);
|
void (*ackint)(struct stm32wl5_tim_dev_s *dev, int source);
|
||||||
int (*checkint)(FAR struct stm32wl5_tim_dev_s *dev, int source);
|
int (*checkint)(struct stm32wl5_tim_dev_s *dev, int source);
|
||||||
};
|
};
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
@@ -171,11 +171,11 @@ struct stm32wl5_tim_ops_s
|
|||||||
|
|
||||||
/* Power-up timer and get its structure */
|
/* Power-up timer and get its structure */
|
||||||
|
|
||||||
FAR struct stm32wl5_tim_dev_s *stm32wl5_tim_init(int timer);
|
struct stm32wl5_tim_dev_s *stm32wl5_tim_init(int timer);
|
||||||
|
|
||||||
/* Power-down timer, mark it as unused */
|
/* Power-down timer, mark it as unused */
|
||||||
|
|
||||||
int stm32wl5_tim_deinit(FAR struct stm32wl5_tim_dev_s *dev);
|
int stm32wl5_tim_deinit(struct stm32wl5_tim_dev_s *dev);
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Name: stm32wl5_timer_initialize
|
* Name: stm32wl5_timer_initialize
|
||||||
@@ -196,7 +196,7 @@ int stm32wl5_tim_deinit(FAR struct stm32wl5_tim_dev_s *dev);
|
|||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
#ifdef CONFIG_TIMER
|
#ifdef CONFIG_TIMER
|
||||||
int stm32wl5_timer_initialize(FAR const char *devpath, int timer);
|
int stm32wl5_timer_initialize(const char *devpath, int timer);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#undef EXTERN
|
#undef EXTERN
|
||||||
|
|||||||
@@ -73,12 +73,12 @@
|
|||||||
|
|
||||||
struct stm32wl5_lowerhalf_s
|
struct stm32wl5_lowerhalf_s
|
||||||
{
|
{
|
||||||
FAR const struct timer_ops_s *ops; /* Lower half operations */
|
const struct timer_ops_s *ops; /* Lower half operations */
|
||||||
FAR struct stm32wl5_tim_dev_s *tim; /* stm32 timer driver */
|
struct stm32wl5_tim_dev_s *tim; /* stm32 timer driver */
|
||||||
tccb_t callback; /* Current upper half interrupt callback */
|
tccb_t callback; /* Current upper half interrupt callback */
|
||||||
FAR void *arg; /* Argument passed to upper half callback */
|
void *arg; /* Argument passed to upper half callback */
|
||||||
bool started; /* True: Timer has been started */
|
bool started; /* True: Timer has been started */
|
||||||
const uint8_t resolution; /* Number of bits in the timer (16 or 32 bits) */
|
const uint8_t resolution; /* Number of bits in the timer (16 or 32 bits) */
|
||||||
};
|
};
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
@@ -91,14 +91,14 @@ static int stm32wl5_timer_handler(int irq, void *context, void *arg);
|
|||||||
|
|
||||||
/* "Lower half" driver methods **********************************************/
|
/* "Lower half" driver methods **********************************************/
|
||||||
|
|
||||||
static int stm32wl5_start(FAR struct timer_lowerhalf_s *lower);
|
static int stm32wl5_start(struct timer_lowerhalf_s *lower);
|
||||||
static int stm32wl5_stop(FAR struct timer_lowerhalf_s *lower);
|
static int stm32wl5_stop(struct timer_lowerhalf_s *lower);
|
||||||
static int stm32wl5_getstatus(FAR struct timer_lowerhalf_s *lower,
|
static int stm32wl5_getstatus(struct timer_lowerhalf_s *lower,
|
||||||
FAR struct timer_status_s *status);
|
struct timer_status_s *status);
|
||||||
static int stm32wl5_settimeout(FAR struct timer_lowerhalf_s *lower,
|
static int stm32wl5_settimeout(struct timer_lowerhalf_s *lower,
|
||||||
uint32_t timeout);
|
uint32_t timeout);
|
||||||
static void stm32wl5_setcallback(FAR struct timer_lowerhalf_s *lower,
|
static void stm32wl5_setcallback(struct timer_lowerhalf_s *lower,
|
||||||
tccb_t callback, FAR void *arg);
|
tccb_t callback, void *arg);
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Private Data
|
* Private Data
|
||||||
@@ -222,8 +222,8 @@ static struct stm32wl5_lowerhalf_s g_tim17_lowerhalf =
|
|||||||
|
|
||||||
static int stm32wl5_timer_handler(int irq, void *context, void *arg)
|
static int stm32wl5_timer_handler(int irq, void *context, void *arg)
|
||||||
{
|
{
|
||||||
FAR struct stm32wl5_lowerhalf_s *lower =
|
struct stm32wl5_lowerhalf_s *lower =
|
||||||
(FAR struct stm32wl5_lowerhalf_s *)arg;
|
(struct stm32wl5_lowerhalf_s *)arg;
|
||||||
uint32_t next_interval_us = 0;
|
uint32_t next_interval_us = 0;
|
||||||
|
|
||||||
STM32WL5_TIM_ACKINT(lower->tim, 0);
|
STM32WL5_TIM_ACKINT(lower->tim, 0);
|
||||||
@@ -258,10 +258,10 @@ static int stm32wl5_timer_handler(int irq, void *context, void *arg)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_start(FAR struct timer_lowerhalf_s *lower)
|
static int stm32wl5_start(struct timer_lowerhalf_s *lower)
|
||||||
{
|
{
|
||||||
FAR struct stm32wl5_lowerhalf_s *priv =
|
struct stm32wl5_lowerhalf_s *priv =
|
||||||
(FAR struct stm32wl5_lowerhalf_s *)lower;
|
(struct stm32wl5_lowerhalf_s *)lower;
|
||||||
|
|
||||||
if (!priv->started)
|
if (!priv->started)
|
||||||
{
|
{
|
||||||
@@ -297,10 +297,10 @@ static int stm32wl5_start(FAR struct timer_lowerhalf_s *lower)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_stop(FAR struct timer_lowerhalf_s *lower)
|
static int stm32wl5_stop(struct timer_lowerhalf_s *lower)
|
||||||
{
|
{
|
||||||
FAR struct stm32wl5_lowerhalf_s *priv =
|
struct stm32wl5_lowerhalf_s *priv =
|
||||||
(FAR struct stm32wl5_lowerhalf_s *)lower;
|
(struct stm32wl5_lowerhalf_s *)lower;
|
||||||
|
|
||||||
if (priv->started)
|
if (priv->started)
|
||||||
{
|
{
|
||||||
@@ -332,11 +332,11 @@ static int stm32wl5_stop(FAR struct timer_lowerhalf_s *lower)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_getstatus(FAR struct timer_lowerhalf_s *lower,
|
static int stm32wl5_getstatus(struct timer_lowerhalf_s *lower,
|
||||||
FAR struct timer_status_s *status)
|
struct timer_status_s *status)
|
||||||
{
|
{
|
||||||
FAR struct stm32wl5_lowerhalf_s *priv =
|
struct stm32wl5_lowerhalf_s *priv =
|
||||||
(FAR struct stm32wl5_lowerhalf_s *)lower;
|
(struct stm32wl5_lowerhalf_s *)lower;
|
||||||
uint64_t maxtimeout;
|
uint64_t maxtimeout;
|
||||||
uint32_t timeout;
|
uint32_t timeout;
|
||||||
uint32_t clock;
|
uint32_t clock;
|
||||||
@@ -399,11 +399,11 @@ static int stm32wl5_getstatus(FAR struct timer_lowerhalf_s *lower,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int stm32wl5_settimeout(FAR struct timer_lowerhalf_s *lower,
|
static int stm32wl5_settimeout(struct timer_lowerhalf_s *lower,
|
||||||
uint32_t timeout)
|
uint32_t timeout)
|
||||||
{
|
{
|
||||||
FAR struct stm32wl5_lowerhalf_s *priv =
|
struct stm32wl5_lowerhalf_s *priv =
|
||||||
(FAR struct stm32wl5_lowerhalf_s *)lower;
|
(struct stm32wl5_lowerhalf_s *)lower;
|
||||||
uint64_t maxtimeout;
|
uint64_t maxtimeout;
|
||||||
|
|
||||||
if (priv->started)
|
if (priv->started)
|
||||||
@@ -447,11 +447,11 @@ static int stm32wl5_settimeout(FAR struct timer_lowerhalf_s *lower,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static void stm32wl5_setcallback(FAR struct timer_lowerhalf_s *lower,
|
static void stm32wl5_setcallback(struct timer_lowerhalf_s *lower,
|
||||||
tccb_t callback, FAR void *arg)
|
tccb_t callback, void *arg)
|
||||||
{
|
{
|
||||||
FAR struct stm32wl5_lowerhalf_s *priv =
|
struct stm32wl5_lowerhalf_s *priv =
|
||||||
(FAR struct stm32wl5_lowerhalf_s *)lower;
|
(struct stm32wl5_lowerhalf_s *)lower;
|
||||||
irqstate_t flags = enter_critical_section();
|
irqstate_t flags = enter_critical_section();
|
||||||
|
|
||||||
/* Save the new callback */
|
/* Save the new callback */
|
||||||
@@ -495,9 +495,9 @@ static void stm32wl5_setcallback(FAR struct timer_lowerhalf_s *lower,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int stm32wl5_timer_initialize(FAR const char *devpath, int timer)
|
int stm32wl5_timer_initialize(const char *devpath, int timer)
|
||||||
{
|
{
|
||||||
FAR struct stm32wl5_lowerhalf_s *lower;
|
struct stm32wl5_lowerhalf_s *lower;
|
||||||
|
|
||||||
switch (timer)
|
switch (timer)
|
||||||
{
|
{
|
||||||
@@ -586,8 +586,8 @@ int stm32wl5_timer_initialize(FAR const char *devpath, int timer)
|
|||||||
* REVISIT: The returned handle is discard here.
|
* REVISIT: The returned handle is discard here.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
FAR void *drvr = timer_register(devpath,
|
void *drvr = timer_register(devpath,
|
||||||
(FAR struct timer_lowerhalf_s *)lower);
|
(struct timer_lowerhalf_s *)lower);
|
||||||
if (drvr == NULL)
|
if (drvr == NULL)
|
||||||
{
|
{
|
||||||
/* The actual cause of the failure may have been a failure to allocate
|
/* The actual cause of the failure may have been a failure to allocate
|
||||||
|
|||||||
@@ -184,14 +184,14 @@ static void riscv_dump_task(struct tcb_s *tcb, void *arg)
|
|||||||
#ifndef CONFIG_DISABLE_PTHREAD
|
#ifndef CONFIG_DISABLE_PTHREAD
|
||||||
if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
|
if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
|
||||||
{
|
{
|
||||||
FAR struct pthread_tcb_s *ptcb = (FAR struct pthread_tcb_s *)tcb;
|
struct pthread_tcb_s *ptcb = (struct pthread_tcb_s *)tcb;
|
||||||
|
|
||||||
snprintf(args, sizeof(args), " %p", ptcb->arg);
|
snprintf(args, sizeof(args), " %p", ptcb->arg);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
#endif
|
#endif
|
||||||
{
|
{
|
||||||
FAR char **argv = tcb->group->tg_info->argv + 1;
|
char **argv = tcb->group->tg_info->argv + 1;
|
||||||
size_t npos = 0;
|
size_t npos = 0;
|
||||||
|
|
||||||
while (*argv != NULL && npos < sizeof(args))
|
while (*argv != NULL && npos < sizeof(args))
|
||||||
|
|||||||
@@ -393,7 +393,7 @@ void usrsock_register(void)
|
|||||||
* Name: usrsock_request
|
* Name: usrsock_request
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int usrsock_request(FAR struct iovec *iov, unsigned int iovcnt)
|
int usrsock_request(struct iovec *iov, unsigned int iovcnt)
|
||||||
{
|
{
|
||||||
struct usrsock_request_common_s *common;
|
struct usrsock_request_common_s *common;
|
||||||
int ret;
|
int ret;
|
||||||
|
|||||||
@@ -427,7 +427,7 @@ void bm3803_wdginitialize(const char *devpath)
|
|||||||
|
|
||||||
/* Register the watchdog driver as /dev/watchdog0 */
|
/* Register the watchdog driver as /dev/watchdog0 */
|
||||||
|
|
||||||
watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv);
|
watchdog_register(devpath, (struct watchdog_lowerhalf_s *)priv);
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* CONFIG_WATCHDOG && CONFIG_BM3803_WDG */
|
#endif /* CONFIG_WATCHDOG && CONFIG_BM3803_WDG */
|
||||||
|
|||||||
@@ -99,14 +99,14 @@ static void xtensa_dump_task(struct tcb_s *tcb, void *arg)
|
|||||||
#ifndef CONFIG_DISABLE_PTHREAD
|
#ifndef CONFIG_DISABLE_PTHREAD
|
||||||
if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
|
if ((tcb->flags & TCB_FLAG_TTYPE_MASK) == TCB_FLAG_TTYPE_PTHREAD)
|
||||||
{
|
{
|
||||||
FAR struct pthread_tcb_s *ptcb = (FAR struct pthread_tcb_s *)tcb;
|
struct pthread_tcb_s *ptcb = (struct pthread_tcb_s *)tcb;
|
||||||
|
|
||||||
snprintf(args, sizeof(args), " %p", ptcb->arg);
|
snprintf(args, sizeof(args), " %p", ptcb->arg);
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
#endif
|
#endif
|
||||||
{
|
{
|
||||||
FAR char **argv = tcb->group->tg_info->argv + 1;
|
char **argv = tcb->group->tg_info->argv + 1;
|
||||||
size_t npos = 0;
|
size_t npos = 0;
|
||||||
|
|
||||||
while (*argv != NULL && npos < sizeof(args))
|
while (*argv != NULL && npos < sizeof(args))
|
||||||
|
|||||||
@@ -97,7 +97,7 @@ void *fat_dma_alloc(size_t size)
|
|||||||
return gran_alloc(dma_allocator, size);
|
return gran_alloc(dma_allocator, size);
|
||||||
}
|
}
|
||||||
|
|
||||||
void fat_dma_free(FAR void *memory, size_t size)
|
void fat_dma_free(void *memory, size_t size)
|
||||||
{
|
{
|
||||||
gran_free(dma_allocator, memory, size);
|
gran_free(dma_allocator, memory, size);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -61,8 +61,8 @@ struct sam_gpio_enc_lowerhalf_s
|
|||||||
* half callback structure:
|
* half callback structure:
|
||||||
*/
|
*/
|
||||||
|
|
||||||
FAR const struct qe_ops_s *ops; /* Lower half callback structure */
|
const struct qe_ops_s *ops; /* Lower half callback structure */
|
||||||
FAR struct sam_qeconfig_s *config; /* static configuration */
|
struct sam_qeconfig_s *config; /* static configuration */
|
||||||
};
|
};
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
@@ -71,13 +71,11 @@ struct sam_gpio_enc_lowerhalf_s
|
|||||||
|
|
||||||
static int board_gpio_enc_irqx(gpio_pinset_t pinset, int irq,
|
static int board_gpio_enc_irqx(gpio_pinset_t pinset, int irq,
|
||||||
xcpt_t irqhandler, void *arg);
|
xcpt_t irqhandler, void *arg);
|
||||||
static int sam_gpio_enc_interrupt(int irq, FAR void *context,
|
static int sam_gpio_enc_interrupt(int irq, void *context, void *arg);
|
||||||
FAR void *arg);
|
static int sam_gpio_enc_position(struct qe_lowerhalf_s *lower, int32_t *pos);
|
||||||
static int sam_gpio_enc_position(FAR struct qe_lowerhalf_s *lower,
|
static int sam_gpio_enc_setup(struct qe_lowerhalf_s *lower);
|
||||||
FAR int32_t *pos);
|
static int sam_gpio_enc_shutdown(struct qe_lowerhalf_s *lower);
|
||||||
static int sam_gpio_enc_setup(FAR struct qe_lowerhalf_s *lower);
|
static int sam_gpio_enc_reset(struct qe_lowerhalf_s *lower);
|
||||||
static int sam_gpio_enc_shutdown(FAR struct qe_lowerhalf_s *lower);
|
|
||||||
static int sam_gpio_enc_reset(FAR struct qe_lowerhalf_s *lower);
|
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Private Data
|
* Private Data
|
||||||
@@ -119,7 +117,7 @@ static struct sam_gpio_enc_lowerhalf_s sam_gpio_enc_priv =
|
|||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int board_gpio_enc_irqx(gpio_pinset_t pinset, int irq,
|
static int board_gpio_enc_irqx(gpio_pinset_t pinset, int irq,
|
||||||
xcpt_t irqhandler, void *arg)
|
xcpt_t irqhandler, void *arg)
|
||||||
{
|
{
|
||||||
irqstate_t flags;
|
irqstate_t flags;
|
||||||
|
|
||||||
@@ -159,12 +157,11 @@ static int board_gpio_enc_irqx(gpio_pinset_t pinset, int irq,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int sam_gpio_enc_interrupt(int irq, FAR void *context,
|
static int sam_gpio_enc_interrupt(int irq, void *context, void *arg)
|
||||||
FAR void *arg)
|
|
||||||
{
|
{
|
||||||
FAR struct sam_gpio_enc_lowerhalf_s *dev =
|
struct sam_gpio_enc_lowerhalf_s *dev =
|
||||||
(FAR struct sam_gpio_enc_lowerhalf_s *)arg;
|
(struct sam_gpio_enc_lowerhalf_s *)arg;
|
||||||
FAR struct sam_qeconfig_s *priv = (struct sam_qeconfig_s *)dev->config;
|
struct sam_qeconfig_s *priv = (struct sam_qeconfig_s *)dev->config;
|
||||||
|
|
||||||
unsigned int state_a;
|
unsigned int state_a;
|
||||||
unsigned int state_b;
|
unsigned int state_b;
|
||||||
@@ -200,12 +197,11 @@ static int sam_gpio_enc_interrupt(int irq, FAR void *context,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int sam_gpio_enc_position(FAR struct qe_lowerhalf_s *lower,
|
static int sam_gpio_enc_position(struct qe_lowerhalf_s *lower, int32_t *pos)
|
||||||
FAR int32_t *pos)
|
|
||||||
{
|
{
|
||||||
FAR struct sam_gpio_enc_lowerhalf_s *priv =
|
struct sam_gpio_enc_lowerhalf_s *priv =
|
||||||
(FAR struct sam_gpio_enc_lowerhalf_s *)lower;
|
(struct sam_gpio_enc_lowerhalf_s *)lower;
|
||||||
FAR struct sam_qeconfig_s *config = priv->config;
|
struct sam_qeconfig_s *config = priv->config;
|
||||||
|
|
||||||
*pos = config->position - config->position_base;
|
*pos = config->position - config->position_base;
|
||||||
return OK;
|
return OK;
|
||||||
@@ -221,11 +217,11 @@ static int sam_gpio_enc_position(FAR struct qe_lowerhalf_s *lower,
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int sam_gpio_enc_setup(FAR struct qe_lowerhalf_s *lower)
|
static int sam_gpio_enc_setup(struct qe_lowerhalf_s *lower)
|
||||||
{
|
{
|
||||||
FAR struct sam_gpio_enc_lowerhalf_s *priv =
|
struct sam_gpio_enc_lowerhalf_s *priv =
|
||||||
(FAR struct sam_gpio_enc_lowerhalf_s *)lower;
|
(struct sam_gpio_enc_lowerhalf_s *)lower;
|
||||||
FAR struct sam_qeconfig_s *config = priv->config;
|
struct sam_qeconfig_s *config = priv->config;
|
||||||
int ret;
|
int ret;
|
||||||
unsigned int state_a;
|
unsigned int state_a;
|
||||||
unsigned int state_b;
|
unsigned int state_b;
|
||||||
@@ -274,11 +270,11 @@ static int sam_gpio_enc_setup(FAR struct qe_lowerhalf_s *lower)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static int sam_gpio_enc_shutdown(FAR struct qe_lowerhalf_s *lower)
|
static int sam_gpio_enc_shutdown(struct qe_lowerhalf_s *lower)
|
||||||
{
|
{
|
||||||
FAR struct sam_gpio_enc_lowerhalf_s *priv =
|
struct sam_gpio_enc_lowerhalf_s *priv =
|
||||||
(FAR struct sam_gpio_enc_lowerhalf_s *)lower;
|
(struct sam_gpio_enc_lowerhalf_s *)lower;
|
||||||
FAR struct sam_qeconfig_s *config = priv->config;
|
struct sam_qeconfig_s *config = priv->config;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
/* Disable GPIO interrupts. */
|
/* Disable GPIO interrupts. */
|
||||||
@@ -304,12 +300,12 @@ static int sam_gpio_enc_shutdown(FAR struct qe_lowerhalf_s *lower)
|
|||||||
return OK;
|
return OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int sam_gpio_enc_reset(FAR struct qe_lowerhalf_s *lower)
|
static int sam_gpio_enc_reset(struct qe_lowerhalf_s *lower)
|
||||||
{
|
{
|
||||||
FAR struct sam_gpio_enc_lowerhalf_s *priv =
|
struct sam_gpio_enc_lowerhalf_s *priv =
|
||||||
(FAR struct sam_gpio_enc_lowerhalf_s *)lower;
|
(struct sam_gpio_enc_lowerhalf_s *)lower;
|
||||||
FAR struct sam_qeconfig_s *config =
|
struct sam_qeconfig_s *config =
|
||||||
(FAR struct sam_qeconfig_s *)priv->config;
|
(struct sam_qeconfig_s *)priv->config;
|
||||||
|
|
||||||
config->position = config->position_base;
|
config->position = config->position_base;
|
||||||
|
|
||||||
@@ -339,13 +335,13 @@ int sam_gpio_enc_init(gpio_pinset_t enca_cfg, gpio_pinset_t encb_cfg,
|
|||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
FAR struct sam_gpio_enc_lowerhalf_s *dev =
|
struct sam_gpio_enc_lowerhalf_s *dev =
|
||||||
(struct sam_gpio_enc_lowerhalf_s *)&sam_gpio_enc_priv;
|
(struct sam_gpio_enc_lowerhalf_s *)&sam_gpio_enc_priv;
|
||||||
FAR struct sam_qeconfig_s *priv = (struct sam_qeconfig_s *)dev->config;
|
struct sam_qeconfig_s *priv = (struct sam_qeconfig_s *)dev->config;
|
||||||
|
|
||||||
/* Register the device as "dev/gpio_enc". */
|
/* Register the device as "dev/gpio_enc". */
|
||||||
|
|
||||||
ret = qe_register("/dev/gpio_enc", (FAR struct qe_lowerhalf_s *)dev);
|
ret = qe_register("/dev/gpio_enc", (struct qe_lowerhalf_s *)dev);
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
{
|
{
|
||||||
snerr("ERROR: qe_register failed: %d\n", ret);
|
snerr("ERROR: qe_register failed: %d\n", ret);
|
||||||
|
|||||||
@@ -84,7 +84,7 @@
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int stm32_capture_setup(FAR const char *devpath)
|
int stm32_capture_setup(const char *devpath)
|
||||||
{
|
{
|
||||||
#ifdef HAVE_CAPTURE
|
#ifdef HAVE_CAPTURE
|
||||||
struct cap_lowerhalf_s *capture;
|
struct cap_lowerhalf_s *capture;
|
||||||
|
|||||||
@@ -592,7 +592,7 @@ int stm32_pwm_setup(void);
|
|||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
#ifdef CONFIG_CAPTURE
|
#ifdef CONFIG_CAPTURE
|
||||||
int stm32_capture_setup(FAR const char *devpath);
|
int stm32_capture_setup(const char *devpath);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
|
|||||||
@@ -134,7 +134,7 @@ static void systick_disable(void)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int board_boot_image(FAR const char *path, uint32_t hdr_size)
|
int board_boot_image(const char *path, uint32_t hdr_size)
|
||||||
{
|
{
|
||||||
static struct arm_vector_table vt;
|
static struct arm_vector_table vt;
|
||||||
int fd;
|
int fd;
|
||||||
|
|||||||
@@ -95,7 +95,7 @@ static int init_ota_partitions(void);
|
|||||||
* Private Data
|
* Private Data
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
static FAR struct mtd_dev_s *g_progmem_mtd;
|
static struct mtd_dev_s *g_progmem_mtd;
|
||||||
|
|
||||||
#if defined(CONFIG_STM32_PROGMEM_OTA_PARTITION)
|
#if defined(CONFIG_STM32_PROGMEM_OTA_PARTITION)
|
||||||
static const struct ota_partition_s g_ota_partition_table[] =
|
static const struct ota_partition_s g_ota_partition_table[] =
|
||||||
|
|||||||
@@ -173,8 +173,8 @@ static const struct part_table part_table[] =
|
|||||||
|
|
||||||
int stm32wl5_flash_init(void)
|
int stm32wl5_flash_init(void)
|
||||||
{
|
{
|
||||||
FAR struct mtd_dev_s *mtd;
|
struct mtd_dev_s *mtd;
|
||||||
FAR struct mtd_dev_s *mtd_part;
|
struct mtd_dev_s *mtd_part;
|
||||||
int offset;
|
int offset;
|
||||||
int mtdconfig_minor;
|
int mtdconfig_minor;
|
||||||
int mtdblk_minor;
|
int mtdblk_minor;
|
||||||
|
|||||||
@@ -114,7 +114,7 @@ int board_lcd_initialize(void)
|
|||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
FAR struct lcd_dev_s *board_lcd_getdev(int devno)
|
struct lcd_dev_s *board_lcd_getdev(int devno)
|
||||||
{
|
{
|
||||||
g_lcd = st7789_lcdinitialize(g_spidev);
|
g_lcd = st7789_lcdinitialize(g_spidev);
|
||||||
if (g_lcd == NULL)
|
if (g_lcd == NULL)
|
||||||
|
|||||||
Reference in New Issue
Block a user