diff --git a/arch/arm/src/stm32/stm32_flash.c b/arch/arm/src/stm32/stm32_flash.c
index 67942672299..529596df65c 100644
--- a/arch/arm/src/stm32/stm32_flash.c
+++ b/arch/arm/src/stm32/stm32_flash.c
@@ -62,10 +62,11 @@
 
 #include "up_arch.h"
 
-/* Only for the STM32F[1|3|4]0xx family and STM32L15xx. */
+/* Only for the STM32F[1|2|3|4]0xx family and STM32L15xx. */
 
-#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
-    defined (CONFIG_STM32_STM32F4XXX) || defined(CONFIG_STM32_STM32L15XX)
+#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F20XX) || \
+    defined(CONFIG_STM32_STM32F30XX) || defined (CONFIG_STM32_STM32F4XXX) || \
+    defined(CONFIG_STM32_STM32L15XX)
 
 #if defined(CONFIG_STM32_FLASH_CONFIG_DEFAULT) && \
     (defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX))
@@ -93,7 +94,7 @@
 #if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX)
 #  define FLASH_CR_PAGE_ERASE              FLASH_CR_PER
 #  define FLASH_SR_WRITE_PROTECTION_ERROR  FLASH_SR_WRPRT_ERR
-#elif defined(CONFIG_STM32_STM32F4XXX)
+#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
 #  define FLASH_CR_PAGE_ERASE              FLASH_CR_SER
 #  define FLASH_SR_WRITE_PROTECTION_ERROR  FLASH_SR_WRPERR
 #elif defined(CONFIG_STM32_STM32L15XX)
@@ -432,20 +433,16 @@ ssize_t stm32_eeprom_erase(size_t addr, size_t eraselen)
  *
  ************************************************************************************/
 
-#ifdef CONFIG_STM32_STM32F4XXX
+#ifdef defined(CONFIG_STM32_STM32F20XX) || CONFIG_STM32_STM32F4XXX
 int stm32_flash_writeprotect(size_t page, bool enabled)
 {
   uint32_t reg;
   uint32_t val;
 
-#ifdef CONFIG_STM32_STM32F4XXX
   if (page >= STM32_FLASH_NPAGES)
     {
       return -EFAULT;
     }
-#else
-#  warning missing logic in stm32_flash_writeprotect
-#endif
 
   /* Select the register that contains the bit to be changed */
 
@@ -453,7 +450,7 @@ int stm32_flash_writeprotect(size_t page, bool enabled)
     {
       reg = STM32_FLASH_OPTCR;
     }
-#if defined(CONFIG_STM32_FLASH_CONFIG_I) && defined(CONFIG_STM32_STM32F4XXX)
+#if defined(CONFIG_STM32_FLASH_CONFIG_I)
   else
     {
       reg = STM32_FLASH_OPTCR1;
@@ -490,7 +487,7 @@ int stm32_flash_writeprotect(size_t page, bool enabled)
 
   putreg32(val, reg);
 
-  /* Trigger programmation */
+  /* Trigger programming */
 
   modifyreg32(STM32_FLASH_OPTCR, 0, FLASH_OPTCR_OPTSTRT);
 
@@ -545,7 +542,7 @@ size_t up_progmem_getaddress(size_t page)
 #endif /* defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
           defined(CONFIG_STM32_STM32L15XX) */
 
-#ifdef CONFIG_STM32_STM32F4XXX
+#ifdef defined(CONFIG_STM32_STM32F20XX) || CONFIG_STM32_STM32F4XXX
 size_t up_progmem_pagesize(size_t page)
 {
   static const size_t page_sizes[STM32_FLASH_NPAGES] = STM32_FLASH_SIZES;
@@ -605,7 +602,7 @@ size_t up_progmem_getaddress(size_t page)
   return base_address;
 }
 
-#endif /* defined(CONFIG_STM32_STM32F4XXX) */
+#endif /* defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX) */
 
 size_t up_progmem_npages(void)
 {
@@ -783,7 +780,7 @@ ssize_t up_progmem_erasepage(size_t page)
 
   sem_lock();
 
-#if !defined(CONFIG_STM32_STM32F4XXX)
+#if !defined(CONFIG_STM32_STM32F20XX) && !defined(CONFIG_STM32_STM32F4XXX)
   if (!(getreg32(STM32_RCC_CR) & RCC_CR_HSION))
     {
       sem_unlock();
@@ -803,7 +800,7 @@ ssize_t up_progmem_erasepage(size_t page)
   page_address = up_progmem_getaddress(page);
   putreg32(page_address, STM32_FLASH_AR);
 
-#elif defined(CONFIG_STM32_STM32F4XXX)
+#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
   modifyreg32(STM32_FLASH_CR, FLASH_CR_SNB_MASK, FLASH_CR_SNB(page));
 #endif
 
@@ -851,7 +848,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
 
   sem_lock();
 
-#if !defined(CONFIG_STM32_STM32F4XXX)
+#if !defined(CONFIG_STM32_STM32F20XX) && !defined(CONFIG_STM32_STM32F4XXX)
   if (!(getreg32(STM32_RCC_CR) & RCC_CR_HSION))
     {
       sem_unlock();
@@ -869,8 +866,9 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
 
   modifyreg32(STM32_FLASH_CR, 0, FLASH_CR_PG);
 
-#if defined(CONFIG_STM32_STM32F4XXX)
+#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX)
   /* TODO: implement up_progmem_write() to support other sizes than 16-bits */
+
   modifyreg32(STM32_FLASH_CR, FLASH_CR_PSIZE_MASK, FLASH_CR_PSIZE_X16);
 #endif
 
@@ -910,5 +908,6 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t count)
 }
 #endif /* !defined(CONFIG_STM32_STM32L15XX) */
 
-#endif /* defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \
-          defined(CONFIG_STM32_STM32F4XXX) || defined(CONFIG_STM32_STM32L15XX) */
+#endif /* defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F20XX) || \
+        * defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F4XXX) || \
+        * defined(CONFIG_STM32_STM32L15XX) */