diff --git a/arch/arm/src/armv7-a/arm_testset.S b/arch/arm/src/armv7-a/arm_testset.S index c20e93ca0af..6d6cdcd4acb 100644 --- a/arch/arm/src/armv7-a/arm_testset.S +++ b/arch/arm/src/armv7-a/arm_testset.S @@ -97,13 +97,13 @@ up_testset: 1: ldrexb r2, [r0] /* Test if spinlock is locked or not */ - cmp r2, r1 /* Locked state? */ - beq 2f /* If locked, return SP_LOCKED */ + cmp r2, r1 /* Already locked? */ + beq 2f /* If alrady locked, return SP_LOCKED */ /* Not locked ... attempt to lock it */ - strexbne r2, r1, [r0] /* Not locked, attempt to lock it */ - cmpne r2, #SP_LOCKED + strexb r2, r1, [r0] /* Attempt to set the locked state */ + cmp r2, r1 /* r2 will be 1 is strexb failed */ beq 1b /* Failed to lock... try again */ /* Lock acquired -- return SP_UNLOCKED */ diff --git a/arch/arm/src/armv7-m/up_testset.S b/arch/arm/src/armv7-m/up_testset.S new file mode 100644 index 00000000000..3f550951d4f --- /dev/null +++ b/arch/arm/src/armv7-m/up_testset.S @@ -0,0 +1,123 @@ +/**************************************************************************** + * arch/arm/src/armv7-m/up_testset.S + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + + .syntax unified + .thumb + .file "up_testset.S" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Symbols + ****************************************************************************/ + + .globl up_testset + +/**************************************************************************** + * Assembly Macros + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + + .text + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_testset + * + * Description: + * Perform and atomic test and set operation on the provided spinlock. + * + * This function must be provided via the architecture-specific logoic. + * + * Input Parameters: + * lock - The address of spinlock object. + * + * Returned Value: + * The spinlock is always locked upon return. The value of previous value + * of the spinlock variable is returned, either SP_LOCKED if the spinlock + * as previously locked (meaning that the test-and-set operation failed to + * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked + * (meaning that we successfully obtained the lock) + * + ****************************************************************************/ + + .globl up_testset + .type up_testset, %function + +up_testset: + + mov r1, #SP_LOCKED + + /* Test if the spinlock is locked or not */ + +1: + ldrexb r2, [r0] /* Test if spinlock is locked or not */ + cmp r2, r1 /* Already locked? */ + beq 2f /* If already locked, return SP_LOCKED */ + + /* Not locked ... attempt to lock it */ + + strexb r2, r1, [r0] /* Attempt to set the locked state */ + cmp r2, r1 /* r2 will be 1 is strexb succeeded */ + beq 1b /* Failed to lock... try again */ + + /* Lock acquired -- return SP_UNLOCKED */ + + dmb /* Required before accessing protected resource */ + mov r0, #SP_UNLOCKED + bx lr + + /* Lock not acquired -- return SP_LOCKED */ + +2: + mov r0, #SP_LOCKED + bx lr + .size up_testset, . - up_testset + .end diff --git a/arch/arm/src/armv7-r/arm_testset.S b/arch/arm/src/armv7-r/arm_testset.S index cd2a44c5bd0..fa8e8e4174a 100644 --- a/arch/arm/src/armv7-r/arm_testset.S +++ b/arch/arm/src/armv7-r/arm_testset.S @@ -97,13 +97,13 @@ up_testset: 1: ldrexb r2, [r0] /* Test if spinlock is locked or not */ - cmp r2, r1 /* Locked state? */ - beq 2f /* If locked, return SP_LOCKED */ + cmp r2, r1 /* Already locked? */ + beq 2f /* If already locked, return SP_LOCKED */ /* Not locked ... attempt to lock it */ - strexbne r2, r1, [r0] /* Not locked, attempt to lock it */ - cmpne r2, #SP_LOCKED + strexb r2, r1, [r0] /* Attempt to set the locked state */ + cmp r2, r1 /* r2 will be 1 is strexb succeeded */ beq 1b /* Failed to lock... try again */ /* Lock acquired -- return SP_UNLOCKED */ diff --git a/arch/arm/src/efm32/Make.defs b/arch/arm/src/efm32/Make.defs index 5e23655f645..623941031bb 100644 --- a/arch/arm/src/efm32/Make.defs +++ b/arch/arm/src/efm32/Make.defs @@ -1,7 +1,7 @@ ############################################################################ # arch/arm/src/efm32/Make.defs # -# Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. +# Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt # # Redistribution and use in source and binary forms, with or without @@ -39,7 +39,7 @@ CMN_UASRCS = CMN_UCSRCS = CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S -CMN_ASRCS += vfork.S +CMN_ASRCS += up_testset.S vfork.S CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copyfullstate.c CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_hardfault.c diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs index b8a6bb5cce4..c9c5ec6ca80 100644 --- a/arch/arm/src/kinetis/Make.defs +++ b/arch/arm/src/kinetis/Make.defs @@ -40,7 +40,7 @@ HEAD_ASRC = kinetis_vectors.S # Common ARM and Cortex-M3 files CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S -CMN_ASRCS += vfork.S +CMN_ASRCS += up_testset.S vfork.S CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c diff --git a/arch/arm/src/lpc17xx/Make.defs b/arch/arm/src/lpc17xx/Make.defs index ff8285474e7..2d6193a41d7 100644 --- a/arch/arm/src/lpc17xx/Make.defs +++ b/arch/arm/src/lpc17xx/Make.defs @@ -47,7 +47,7 @@ CMN_UASRCS = CMN_UCSRCS = CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S -CMN_ASRCS += vfork.S +CMN_ASRCS += up_testset.S vfork.S CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c diff --git a/arch/arm/src/lpc43xx/Make.defs b/arch/arm/src/lpc43xx/Make.defs index 883e57acd35..29bf2e316f9 100644 --- a/arch/arm/src/lpc43xx/Make.defs +++ b/arch/arm/src/lpc43xx/Make.defs @@ -36,7 +36,7 @@ HEAD_ASRC = CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S -CMN_ASRCS += vfork.S +CMN_ASRCS += up_testset.S vfork.S CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c diff --git a/arch/arm/src/sam34/Make.defs b/arch/arm/src/sam34/Make.defs index 03b241d632c..48c751799ce 100644 --- a/arch/arm/src/sam34/Make.defs +++ b/arch/arm/src/sam34/Make.defs @@ -47,7 +47,8 @@ CMN_UASRCS = CMN_UCSRCS = CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S -CMN_ASRCS += vfork.S +CMN_ASRCS += up_testset.S vfork.S + CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_memfault.c up_modifyreg8.c diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs index 0a9af083f39..3fdecedc851 100644 --- a/arch/arm/src/samv7/Make.defs +++ b/arch/arm/src/samv7/Make.defs @@ -44,7 +44,7 @@ CMN_UASRCS = CMN_UCSRCS = CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S -CMN_ASRCS += vfork.S +CMN_ASRCS += up_testset.S vfork.S CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_memfault.c up_modifyreg8.c diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs index f0ef9c22b0e..64034976b5a 100644 --- a/arch/arm/src/stm32/Make.defs +++ b/arch/arm/src/stm32/Make.defs @@ -43,7 +43,7 @@ CMN_UASRCS = CMN_UCSRCS = CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S -CMN_ASRCS += vfork.S +CMN_ASRCS += up_testset.S vfork.S CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c diff --git a/arch/arm/src/stm32f7/Make.defs b/arch/arm/src/stm32f7/Make.defs index 3239f8d725b..2f4b7b25134 100644 --- a/arch/arm/src/stm32f7/Make.defs +++ b/arch/arm/src/stm32f7/Make.defs @@ -44,7 +44,8 @@ CMN_UASRCS = CMN_UCSRCS = CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S -CMN_ASRCS += vfork.S +CMN_ASRCS += up_testset.S vfork.S + CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_memfault.c up_modifyreg8.c diff --git a/arch/arm/src/tiva/Make.defs b/arch/arm/src/tiva/Make.defs index b8cb81e7e6d..cb564881758 100644 --- a/arch/arm/src/tiva/Make.defs +++ b/arch/arm/src/tiva/Make.defs @@ -36,7 +36,7 @@ HEAD_ASRC = tiva_vectors.S CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S -CMN_ASRCS += vfork.S +CMN_ASRCS += up_testset.S vfork.S CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_idle.c up_initialize.c