Jupiter Nano support

- Adds support for the Starcat Jupiter Nano
  SAMA5D27C-LD1G board
- https://github.com/starcat-io/jupiter-nano
- this board is very similar to the Microchip/Atmel
  SAMA5D2-Xplained board (sama5d2-xult)
This commit is contained in:
Adam Feuer
2022-12-20 10:16:35 -08:00
committed by Xiang Xiao
parent aac9eb57e8
commit a65ecf793c
47 changed files with 8494 additions and 5 deletions
+13
View File
@@ -1796,6 +1796,15 @@ config ARCH_BOARD_GIANT_BOARD
This options selects support for NuttX on the Groboards Giant Board,
featuring the SAMA5D27C-D1G SIP with 128MB DDR2 RAM.
config ARCH_BOARD_JUPITER_NANO
bool "Starcat Jupiter Nano (SAMA5D27C-LD1G)"
depends on ARCH_CHIP_ATSAMA5D27
select SAMA5D27_JUPITER_NANO_498MHZ
select ARCH_HAVE_LEDS
---help---
This options selects support for NuttX on the Starcat Jupiter Nano
featuring the SAMA5D27C-LD1G SIP with 128MB LPDDR2 RAM.
config ARCH_BOARD_SAMA5D3X_EK
bool "Atmel SAMA5D3x-EK development board"
depends on ARCH_CHIP_ATSAMA5D31 || ARCH_CHIP_ATSAMA5D33 || ARCH_CHIP_ATSAMA5D34 || ARCH_CHIP_ATSAMA5D35
@@ -2862,6 +2871,7 @@ config ARCH_BOARD
default "pinephone" if ARCH_BOARD_PINEPHONE
default "sama5d2-xult" if ARCH_BOARD_SAMA5D2_XULT
default "giant-board" if ARCH_BOARD_GIANT_BOARD
default "jupiter-nano" if ARCH_BOARD_JUPITER_NANO
default "sama5d3x-ek" if ARCH_BOARD_SAMA5D3X_EK
default "sama5d3-xplained" if ARCH_BOARD_SAMA5D3_XPLAINED
default "sama5d4-ek" if ARCH_BOARD_SAMA5D4_EK
@@ -3253,6 +3263,9 @@ endif
if ARCH_BOARD_GIANT_BOARD
source "boards/arm/sama5/giant-board/Kconfig"
endif
if ARCH_BOARD_JUPITER_NANO
source "boards/arm/sama5/jupiter-nano/Kconfig"
endif
if ARCH_BOARD_SAMA5D3X_EK
source "boards/arm/sama5/sama5d3x-ek/Kconfig"
endif
+135
View File
@@ -0,0 +1,135 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_JUPITER_NANO
choice
prompt "CPU Frequency"
default JUPITERNANO_498MHZ
config JUPITERNANO_384MHZ
bool "384 MHz"
config JUPITERNANO_396MHZ
bool "396 MHz"
config JUPITERNANO_498MHZ
bool "498 MHz"
config JUPITERNANO_528MHZ
bool "528 MHz"
endchoice # CPU Frequency
config JUPITERNANO_USBHOST_STACKSIZE
int "USB host waiter stack size"
default 1536 if USBHOST_HUB
default 2048 if !USBHOST_HUB
depends on USBHOST
config JUPITERNANO_USBHOST_PRIO
int "USB host waiter task priority"
default 100
depends on USBHOST
config SAMA5_SDMMC
bool "enable SDMMC controller"
default y if SAMA5_HAVE_SDMMC
select SDIO_DMA
select SCHED_WORKQUEUE
select SCHED_HPWORK
select MMCSD
select MMCSD_SDIO
select SDIO_BLOCKSETUP
select ARCH_HAVE_SDIO
select SAMA5_SDMMC_DMA
---help---
Enable SD Card interface SDMMC0. Selects SAMA5_SDMMC SAMA5_SDMMC0 SAMA5_SDMMC_DMA SDIO_DMA SCHED_WORKQUEUE SCHED_HPWORK SDIO_BLOCKSETUP
config SAMA5_SDMMC0
bool "Enable SDMMC0 (built-in eMMC)"
default n if SAMA5_SDMMC
depends on SAMA5_SDMMC
config SAMA5_SDMMC0_SIZE
int "SDMMC0 size in bytes"
default 4294967296
depends on SAMA5_SDMMC0
---help---
Size of eMMC flash in bytes. Default: 4GB
config SAMA5D27_SDMMC0_MOUNT
bool "Mount SDMMC0 at startup"
default n
depends on SAMA5_SDMMC0
config SAMA5D27_SDMMC0_MOUNT_BLKDEV
string "SDMMC0 block device name"
default "mmc0"
depends on SAMA5_SDMMC0
config SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT
string "SDMMC0 mountpoint"
default "/mnt/sdmmc0"
depends on SAMA5_SDMMC0
config SAMA5D27_SDMMC0_MOUNT_FSTYPE
string "SDMMC0 file system type"
default "vfat"
depends on SAMA5_SDMMC0
config CONFIG_SAMA5_SDMMC1_WIDTH_D1_D8
bool "SDMMC0 data bus width 8 bits"
default y
depends on SAMA5_SDMMC0
config SAMA5_SDMMC1
bool "Enable SDMMC1"
default y if SAMA5_SDMMC
select SAMA5_SDMMC1_WIDTH_D1_D4
depends on SAMA5_SDMMC
config SAMA5_SDMMC1_SIZE
int "SDMMC1 size in bytes"
default 1073741824
depends on SAMA5_SDMMC1
---help---
Size of SD Card in bytes. Default: 16GB
config SAMA5D27_SDMMC1_MOUNT
bool "Mount SDMMC1 at startup"
default n
depends on SAMA5_SDMMC1
config SAMA5D27_SDMMC1_MOUNT_BLKDEV
string "SDMMC1 block device name"
default "mmc1"
depends on SAMA5_SDMMC1
config SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT
string "SDMMC1 mountpoint"
default "/mnt/sdmmc1"
depends on SAMA5_SDMMC1
config SAMA5D27_SDMMC1_MOUNT_FSTYPE
string "SDMMC1 file system type"
default "vfat"
depends on SAMA5_SDMMC1
config MMCSD_HAVE_CARDDETECT
bool "SDMMC1 card detect"
default y
depends on SAMA5_SDMMC1
config SAMA5_SDMMC1_WIDTH_D1_D4
bool "SDMMC1 data bus width 4 bits"
default y
depends on SAMA5_SDMMC1
config SAMA5_SYSTEMRESET
bool "Enable system reset - this will enable the nsh reboot command"
select BOARDCTL_RESET
endif # ARCH_BOARD_JUPITER_NANO
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,116 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_AUDIO_FORMAT_MP3 is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_SAMA5_UART0 is not set
# CONFIG_SAMA5_UHPHS_RHPORT3 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sama5d2-xult"
CONFIG_ARCH_BOARD_SAMA5D2_XULT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="sama5"
CONFIG_ARCH_CHIP_ATSAMA5D27=y
CONFIG_ARCH_CHIP_SAMA5=y
CONFIG_ARCH_CHIP_SAMA5D2=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_AUDIO=y
CONFIG_AUDIO_NUM_BUFFERS=8
CONFIG_BOARD_LOOPSPERMSEC=65775
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_DEV_ZERO=y
CONFIG_EXAMPLES_TCPBLASTER=y
CONFIG_EXAMPLES_TCPECHO=y
CONFIG_EXAMPLES_UDPBLASTER=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_BINFS=y
CONFIG_FS_FAT=y
CONFIG_FS_FATTIME=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_TMPFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HIDKBD_POLLUSEC=80000
CONFIG_I2S=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_NBUFFERS=24
CONFIG_IOB_THROTTLE=0
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_CDCECM=y
CONFIG_NET_ETH_PKTSIZE=1500
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_LOOPBACK=y
CONFIG_NET_SENDFILE=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_SOLINGER=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_DELAYED_ACK=y
CONFIG_NET_TCP_KEEPALIVE=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_WRITE_BUFFERS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=16384
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=268435456
CONFIG_RAM_START=0x20000000
CONFIG_RAM_VSTART=0x20000000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y
CONFIG_RR_INTERVAL=200
CONFIG_SAMA5D2XULT_498MHZ=y
CONFIG_SAMA5_BOOT_SDRAM=y
CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
CONFIG_SAMA5_DDRCS_RESERVE=y
CONFIG_SAMA5_EHCI=y
CONFIG_SAMA5_OHCI=y
CONFIG_SAMA5_PIO_IRQ=y
CONFIG_SAMA5_RTC=y
CONFIG_SAMA5_TRNG=y
CONFIG_SAMA5_UART1=y
CONFIG_SAMA5_UDPHS=y
CONFIG_SAMA5_UHPHS=y
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_SIG_DEFAULT=y
CONFIG_SIG_EVTHREAD=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSLOG_TIMESTAMP=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_TTY_SIGINT=y
CONFIG_TTY_SIGTSTP=y
CONFIG_UART1_SERIAL_CONSOLE=y
CONFIG_UBOOT_UIMAGE=y
CONFIG_UIMAGE_ENTRY_POINT=0x20008040
CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000
CONFIG_USBDEV=y
CONFIG_USBDEV_DUALSPEED=y
CONFIG_USBHOST_CDCACM=y
CONFIG_USBHOST_COMPOSITE=y
CONFIG_USBHOST_HIDKBD=y
CONFIG_USBHOST_HUB=y
CONFIG_USBHOST_MSC=y
@@ -0,0 +1,77 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_AUDIO_FORMAT_MP3 is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_SAMA5_UART0 is not set
# CONFIG_SAMA5_UHPHS_RHPORT1 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sama5d2-xult"
CONFIG_ARCH_BOARD_SAMA5D2_XULT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="sama5"
CONFIG_ARCH_CHIP_ATSAMA5D27=y
CONFIG_ARCH_CHIP_SAMA5=y
CONFIG_ARCH_CHIP_SAMA5D2=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_AUDIO=y
CONFIG_AUDIO_NUM_BUFFERS=8
CONFIG_BOARD_LOOPSPERMSEC=65775
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_DEV_ZERO=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HIDKBD_POLLUSEC=80000
CONFIG_I2S=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_READLINE=y
CONFIG_NXPLAYER_DEFAULT_MEDIADIR="/mnt/sdcard"
CONFIG_NXPLAYER_INCLUDE_SYSTEM_RESET=y
CONFIG_NXPLAYER_RECURSIVE_MEDIA_SEARCH=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=16384
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=268435456
CONFIG_RAM_START=0x20000000
CONFIG_RAM_VSTART=0x20000000
CONFIG_RR_INTERVAL=200
CONFIG_SAMA5D2XULT_498MHZ=y
CONFIG_SAMA5_BOOT_SDRAM=y
CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
CONFIG_SAMA5_DDRCS_RESERVE=y
CONFIG_SAMA5_EHCI=y
CONFIG_SAMA5_OHCI=y
CONFIG_SAMA5_PIO_IRQ=y
CONFIG_SAMA5_RTC=y
CONFIG_SAMA5_TRNG=y
CONFIG_SAMA5_UART1=y
CONFIG_SAMA5_UHPHS=y
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_NXPLAYER=y
CONFIG_UART1_SERIAL_CONSOLE=y
CONFIG_UBOOT_UIMAGE=y
CONFIG_UIMAGE_ENTRY_POINT=0x20008040
CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000
CONFIG_USBHOST_HIDKBD=y
CONFIG_USBHOST_MSC=y
@@ -0,0 +1,142 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_AUDIO_FORMAT_MP3 is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_SAMA5_UART0 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="jupiter-nano"
CONFIG_ARCH_BOARD_JUPITER_NANO=y
CONFIG_ARCH_CHIP="sama5"
CONFIG_ARCH_CHIP_ATSAMA5D27=y
CONFIG_ARCH_CHIP_SAMA5=y
CONFIG_ARCH_CHIP_SAMA5D2=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_AUDIO=y
CONFIG_AUDIO_NUM_BUFFERS=8
CONFIG_BOARD_LOOPSPERMSEC=65775
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_CONSOLE_SYSLOG=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_LOOP=y
CONFIG_DEV_ZERO=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_TCPBLASTER=y
CONFIG_EXAMPLES_TCPECHO=y
CONFIG_EXAMPLES_WGET=y
CONFIG_EXAMPLES_WGET_URL="http://10.0.0.1/"
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_AUTOMOUNTER=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_EXCLUDE_VERSION=y
CONFIG_FS_ROMFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HIDKBD_POLLUSEC=80000
CONFIG_I2S=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_NBUFFERS=72
CONFIG_IOB_THROTTLE=16
CONFIG_NETDB_BUFSIZE=128
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_RESOLVCONF=y
CONFIG_NETINIT_NETLOCAL=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_TELNETC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_CDCECM=y
CONFIG_NET_ETH_PKTSIZE=1514
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ROUTE=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_NOTIFIER=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_ARCHROMFS=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_PROMPT_STRING="nsh> "
CONFIG_NSH_QUOTE=y
CONFIG_NSH_READLINE=y
CONFIG_NSH_ROMFSETC=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=268435456
CONFIG_RAM_START=0x20000000
CONFIG_RAM_VSTART=0x20000000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_CMD_HISTORY_LEN=100
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
CONFIG_READLINE_TABCOMPLETION=y
CONFIG_RR_INTERVAL=200
CONFIG_SAMA5D27_SDMMC0_MOUNT_BLKDEV="/dev/mmcsd0"
CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT="/mnt/mmcsd0"
CONFIG_SAMA5D27_SDMMC1_MOUNT=y
CONFIG_SAMA5D27_SDMMC1_MOUNT_BLKDEV="/dev/mmcsd1"
CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT="/mnt/mmcsd1"
CONFIG_SAMA5_BOOT_SDRAM=y
CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
CONFIG_SAMA5_DDRCS_RESERVE=y
CONFIG_SAMA5_EHCI=y
CONFIG_SAMA5_HSMC=y
CONFIG_SAMA5_OHCI=y
CONFIG_SAMA5_PIOA_IRQ=y
CONFIG_SAMA5_PIOB_IRQ=y
CONFIG_SAMA5_PIOC_IRQ=y
CONFIG_SAMA5_PIO_IRQ=y
CONFIG_SAMA5_RTC=y
CONFIG_SAMA5_SDMMC0=y
CONFIG_SAMA5_SDMMC0_SIZE=1073741824
CONFIG_SAMA5_SDMMC=y
CONFIG_SAMA5_TRNG=y
CONFIG_SAMA5_UART1=y
CONFIG_SAMA5_UDPHS=y
CONFIG_SAMA5_UHPHS=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPNTHREADS=2
CONFIG_SCHED_WAITPID=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_SIG_DEFAULT=y
CONFIG_SIG_EVTHREAD=y
CONFIG_START_DAY=31
CONFIG_START_MONTH=7
CONFIG_START_YEAR=2014
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSLOG_TIMESTAMP=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_SYSTEM_VI=y
CONFIG_TTY_SIGINT=y
CONFIG_TTY_SIGTSTP=y
CONFIG_UART1_SERIAL_CONSOLE=y
CONFIG_UBOOT_UIMAGE=y
CONFIG_UIMAGE_ENTRY_POINT=0x200082E0
CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000
CONFIG_USBDEV=y
CONFIG_USBDEV_DMA=y
CONFIG_USBDEV_DUALSPEED=y
CONFIG_USBDEV_TRACE=y
CONFIG_USBDEV_TRACE_NRECORDS=512
CONFIG_USBHOST_HIDKBD=y
CONFIG_USBHOST_MSC=y
@@ -0,0 +1,137 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_AUDIO_FORMAT_MP3 is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_SAMA5_UART0 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="jupiter-nano"
CONFIG_ARCH_BOARD_JUPITER_NANO=y
CONFIG_ARCH_CHIP="sama5"
CONFIG_ARCH_CHIP_ATSAMA5D27=y
CONFIG_ARCH_CHIP_SAMA5=y
CONFIG_ARCH_CHIP_SAMA5D2=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_AUDIO=y
CONFIG_AUDIO_NUM_BUFFERS=8
CONFIG_BOARDCTL_ROMDISK=y
CONFIG_BOARD_LOOPSPERMSEC=65775
CONFIG_BOOT_RUNFROMSDRAM=y
CONFIG_BUILTIN=y
CONFIG_CONSOLE_SYSLOG=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEV_LOOP=y
CONFIG_DEV_ZERO=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_EXAMPLES_TCPBLASTER=y
CONFIG_EXAMPLES_TCPECHO=y
CONFIG_EXAMPLES_WGET=y
CONFIG_EXAMPLES_WGET_URL="http://10.0.0.1/"
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_AUTOMOUNTER=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_EXCLUDE_VERSION=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HIDKBD_POLLUSEC=80000
CONFIG_I2S=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_NBUFFERS=72
CONFIG_IOB_THROTTLE=16
CONFIG_NETDB_BUFSIZE=128
CONFIG_NETINIT_NETLOCAL=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_TELNETC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_CDCECM=y
CONFIG_NET_ETH_PKTSIZE=1514
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_ROUTE=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_NOTIFIER=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_PROMPT_STRING="nsh> "
CONFIG_NSH_QUOTE=y
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=268435456
CONFIG_RAM_START=0x20000000
CONFIG_RAM_VSTART=0x20000000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_CMD_HISTORY_LEN=100
CONFIG_READLINE_CMD_HISTORY_LINELEN=120
CONFIG_READLINE_TABCOMPLETION=y
CONFIG_RR_INTERVAL=200
CONFIG_SAMA5D27_SDMMC0_MOUNT_BLKDEV="/dev/mmcsd0"
CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT="/mnt/mmcsd0"
CONFIG_SAMA5D27_SDMMC1_MOUNT=y
CONFIG_SAMA5D27_SDMMC1_MOUNT_BLKDEV="/dev/mmcsd1"
CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT="/mnt/mmcsd1"
CONFIG_SAMA5_BOOT_SDRAM=y
CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
CONFIG_SAMA5_DDRCS_RESERVE=y
CONFIG_SAMA5_EHCI=y
CONFIG_SAMA5_HSMC=y
CONFIG_SAMA5_OHCI=y
CONFIG_SAMA5_PIOA_IRQ=y
CONFIG_SAMA5_PIOB_IRQ=y
CONFIG_SAMA5_PIOC_IRQ=y
CONFIG_SAMA5_PIO_IRQ=y
CONFIG_SAMA5_RTC=y
CONFIG_SAMA5_SDMMC0=y
CONFIG_SAMA5_SDMMC0_SIZE=1073741824
CONFIG_SAMA5_SDMMC=y
CONFIG_SAMA5_TRNG=y
CONFIG_SAMA5_UART1=y
CONFIG_SAMA5_UDPHS=y
CONFIG_SAMA5_UHPHS=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPNTHREADS=2
CONFIG_SCHED_WAITPID=y
CONFIG_SERIAL_TERMIOS=y
CONFIG_SIG_DEFAULT=y
CONFIG_SIG_EVTHREAD=y
CONFIG_START_DAY=31
CONFIG_START_MONTH=7
CONFIG_START_YEAR=2014
CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSLOG_TIMESTAMP=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_SYSTEM_VI=y
CONFIG_TTY_SIGINT=y
CONFIG_TTY_SIGTSTP=y
CONFIG_UART1_SERIAL_CONSOLE=y
CONFIG_UBOOT_UIMAGE=y
CONFIG_UIMAGE_ENTRY_POINT=0x200082E0
CONFIG_UIMAGE_LOAD_ADDRESS=0x20008000
CONFIG_USBDEV=y
CONFIG_USBDEV_DMA=y
CONFIG_USBDEV_DUALSPEED=y
CONFIG_USBDEV_TRACE=y
CONFIG_USBDEV_TRACE_NRECORDS=512
CONFIG_USBHOST_HIDKBD=y
CONFIG_USBHOST_MSC=y
@@ -0,0 +1 @@
/boot_romfsimg.h
@@ -0,0 +1,334 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_H
#define __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdbool.h>
# include <nuttx/irq.h>
#endif
/* Clocking *****************************************************************/
/* On-board crystal frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */
#define BOARD_UPLL_FREQUENCY (480000000) /* USB PLL: 480MHz */
/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC.
* These definitions will configure operational clocking.
*/
#if defined(CONFIG_SAMA5_BOOT_SDRAM)
/* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate
* bootloader.
* That bootloader had to have already configured the PLL and SDRAM for
* proper operation.
*
* In this case, we don not reconfigure the clocking.
* Rather, we need to query the register settings to determine the clock
* frequencies.
* We can only assume that the Main clock source is the on-board 12MHz
* crystal.
*/
# include <arch/board/board_sdram.h>
#elif defined(CONFIG_JUPITERNANO_384MHZ)
/* OHCI Only.
* This is an alternative slower configuration that will produce a 48MHz
* USB clock with the required accuracy using only PLLA.
* When PPLA is used to clock OHCI, an additional requirement is the
* PLLACK be a multiple of 48MHz.
* This setup results in a CPU clock of 384MHz.
*
* This case is only interesting for experimentation.
*/
# include <arch/board/board_384mhz.h>
#elif defined(CONFIG_JUPITERNANO_498MHZ)
/* This is the configuration results in a CPU clock of 498MHz.
*
* In this configuration, UPLL is the source of the UHPHS clock (if enabled).
*/
# include <arch/board/board_498mhz.h>
#elif defined(CONFIG_JUPITERNANO_528MHZ)
/* This is the configuration results in a CPU clock of 528MHz.
*
* In this configuration, UPLL is the source of the UHPHS clock (if enabled).
*/
# include <arch/board/board_528mhz.h>
#else /* #elif defined(CONFIG_JUPITERNANO_396MHZ) */
/* This is the configuration provided in the Atmel example code.
* This setup results in a CPU clock of 396MHz.
*
* In this configuration, UPLL is the source of the UHPHS clock (if enabled).
*/
# include <arch/board/board_396mhz.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* LED definitions **********************************************************/
/* There is a blue LED on board the Jupiter Nano.
* The blue component is driven by pin PA6.
* The LED is connected to ground, so bringing the LED high will
* will illuminate the LED.
*
* ------------------------------ ------------------- ---------------------
* SAMA5D2 PIO SIGNAL USAGE
* ------------------------------ ------------------- ---------------------
* PA6 STATUS_LED_PA6 Blue LED
* ------------------------------ ------------------- ---------------------
*/
#ifndef CONFIG_ARCH_LEDS
/* LED index values for use with board_userled() */
#define BOARD_BLUE 0
/* LED bits for use with board_userled_all() */
#define BOARD_BLUE_BIT (1 << BOARD_BLUE)
#else
/* LED index values for use with board_userled() */
#define BOARD_BLUE 0
#define BOARD_NLEDS 1
/* LED bits for use with board_userled_all() */
#define BOARD_BLUE_BIT (1 << BOARD_BLUE)
#endif
/* These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
* defined. In that case, the usage by the board port is defined in
* include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
* events as follows. Note that only the GREEN LED is used in this case
*
* SYMBOL Val Meaning Green LED
* ----------------- --- ----------------------- -----------
*/
#define LED_STARTED 0 /* NuttX has been started OFF */
#define LED_HEAPALLOCATE 0 /* Heap has been allocated OFF */
#define LED_IRQSENABLED 0 /* Interrupts enabled OFF */
#define LED_STACKCREATED 1 /* Idle stack created ON */
#define LED_INIRQ 2 /* In an interrupt N/C */
#define LED_SIGNAL 2 /* In a signal handler N/C */
#define LED_ASSERTION 2 /* An assertion failed N/C */
#define LED_PANIC 3 /* The system has crashed Flash */
#undef LED_IDLE /* MCU is is sleep mode Not used */
/* Thus if the blue LED is statically on, NuttX has successfully booted
* and is, apparently, running normally.
* If LED is flashing at approximately 2Hz, then a fatal error has been
* detected and the system has halted.
*/
/* Pin disambiguation *******************************************************/
/* Alternative pin selections are provided with a numeric suffix like _1, _2,
* etc. Drivers, however, will use the pin selection without the numeric
* suffix.
* Additional definitions are required in this board.h file.
* For example, if we wanted the PCK0on PB26, then the following definition
* should appear in the board.h header file for that board:
*
* #define PIO_PMC_PCK0 PIO_PMC_PCK0_1
*
* The PCK logic will then automatically configure PB26 as the PCK0 pin.
*/
/* DEBUG / DBGU Port (J1). There is a TTL serial connection available on
* pins 2 and 3 of the DEBUG connector. This may be driven by UART1,
* depending upon the setting of JP2 (DBGU_PE on the schematic, DEBUG_DIS
* on the board):
*
* ---- ------------------------ -------------
* J1 SCHEMATIC SAMA5D2
* PIN NAME(s) PIO FUNCTION
* ---- ------------------------ -------------
* 2 DBGU_TXD DBGU_UTXD1_PD3 PD3 UTXD1
* 3 DBGU_RXD DBGU_URXD1_PD2 PD2 URXD1
* ---- ------------------------ -------------
*/
#define PIO_UART1_RXD PIO_UART1_RXD_1
#define PIO_UART1_TXD PIO_UART1_TXD_1
/* Standard UART on Arduino connector (J22) is UART2.
*
* ---- ------- -------------
* J22 BOARD SAMA5D2
* PIN NAME PIO FUNCTION
* ---- ------- -------------
* 7 URXD2 PD4 UART2 URXD2
* 8 UTXD2 PD5 UART2 UTXD2
* ---- ------- -------------
*/
#define PIO_UART2_RXD PIO_UART2_RXD_2
#define PIO_UART2_TXD PIO_UART2_TXD_2
/* Standard UART on Arduino connector (J17) is UART3.
*
* ---- ------- -------------
* J17 BOARD SAMA5D2
* PIN NAME PIO FUNCTION
* ---- ------- -------------
* 27 URXD3 PB11 UART3 URXD3
* 28 UTXD3 PB12 UART3 UTXD3
* ---- ------- -------------
*/
#define PIO_UART3_RXD PIO_UART3_RXD_1
#define PIO_UART3_TXD PIO_UART3_TXD_1
/* Standard UART on Arduino connector (J21) is FLEXCOM4.
*
* ---- ------- -------------
* J21 BOARD SAMA5D2
* PIN NAME PIO FUNCTION
* ---- ------- -------------
* 7 F4_TXD PD12 FLEXCOM4
* 8 F4_RXD PD13 FLEXCOM4
* ---- ------- -------------
*/
#define PIO_FLEXCOM4_IO0 PIO_FLEXCOM4_IO0_2
#define PIO_FLEXCOM4_IO1 PIO_FLEXCOM4_IO1_2
/* Other USARTs are available on J22:
*
* ---- ------- -------------
* J22 BOARD SAMA5D2
* PIN NAME PIO FUNCTION
* ---- ------- -------------
* 3 F0_TXD PB28 FLEXCOM0
* 4 F0_RXD PB29 FLEXCOM0
* 5 F3_TXD PB23 FLEXCOM3
* 6 F3_RXD PB22 FLEXCOM3
* ---- ------- -------------
*/
#define PIO_FLEXCOM3_IO0 PIO_FLEXCOM3_IO0_2
#define PIO_FLEXCOM3_IO1 PIO_FLEXCOM3_IO1_2
/* UARTs available on EXT1
*
* ---- ------- -------------
* EXT1 BOARD SAMA5D2
* PIN NAME PIO FUNCTION
* ---- ------- -------------
* 13 UART_RX PA23 FLEXCOM1
* 14 UART_TX PA24 FLEXCOM1
* ---- ------- ---- --------
*/
/* UARTs available on EXT2
*
* ---- ------- -------------
* EXT2 BOARD SAMA5D2
* PIN NAME PIO FUNCTION
* ---- ------- -------------
* 13 UART_RX PB29 FLEXCOM0
* 14 UART_TX PB28 FLEXCOM0
* ---- ------- ---- --------
*/
/* SPIs available on EXT1
*
* ---- ------- -------------
* EXT1 BOARD SAMA5D2
* PIN NAME PIO FUNCTION
* ---- ------- -------------
* 42 SPI_SS PD29 SPI1
* 39 SPI_MOSI PD26 SPI1
* 40 SPI_MISO PD27 SPI1
* 24 SPI_SCK PD25 SPI1
* ---- ------- ---- --------
*/
#define PIO_SPI1_MISO PIO_SPI1_MISO_1
#define PIO_SPI1_MOSI PIO_SPI1_MOSI_1
#define PIO_SPI1_NPCS1 PIO_SPI1_NPCS1_1
#define PIO_SPI1_SPCK PIO_SPI1_SPCK_1
/* SPI0 Definition on EXP */
#define PIO_SPI0_MISO PIO_SPI0_MISO_1
#define PIO_SPI0_MOSI PIO_SPI0_MOSI_1
#define PIO_SPI0_NPCS0 PIO_SPI0_NPCS0_1
#define PIO_SPI0_SPCK PIO_SPI0_SPCK_1
/* SDIO - Used for both Port 0 & 1 ******************************************/
/* 386 KHz for initial inquiry stuff */
#define BOARD_SDMMC_IDMODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV256
#define BOARD_SDMMC_IDMODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(2)
/* 24.8MHz for other modes */
#define BOARD_SDMMC_MMCMODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8
#define BOARD_SDMMC_MMCMODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1)
#define BOARD_SDMMC_SD1MODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8
#define BOARD_SDMMC_SD1MODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1)
#define BOARD_SDMMC_SD4MODE_PRESCALER SDMMC_SYSCTL_SDCLKFS_DIV8
#define BOARD_SDMMC_SD4MODE_DIVISOR SDMMC_SYSCTL_DVS_DIV(1)
/****************************************************************************
* Assembly Language Macros
****************************************************************************/
#ifdef __ASSEMBLY__
.macro config_sdram
.endm
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_H */
@@ -0,0 +1,219 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/include/board_384mhz.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_384MHZ_H
#define __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_384MHZ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC.
* These definitions will configure operational clocking.
*
* This is an alternative slower configuration that will produce a 48MHz USB
* clock with the required accuracy.
* When used with OHCI, an additional requirement is the PLLACK be a multiple
* of 48MHz.
* This setup results in a CPU clock of 384MHz.
*
* MAINOSC: Frequency = 12MHz (crystal)
* PLLA: PLL Multiplier = 64 to generate PLLACK = 768MHz
* Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate
* MCK = 128MHz
* CPU clock = 384MHz
*/
/* Main oscillator register settings.
*
* The start up time should be should be:
* Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles.
*/
#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
/* PLLA configuration.
*
* Multipler = 64: PLLACK = 64 * 12MHz = 768MHz
*/
#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT)
#define BOARD_CKGR_PLLAR_OUT (0)
#define BOARD_CKGR_PLLAR_MUL (63 << PMC_CKGR_PLLAR_MUL_SHIFT)
/* PMC master clock register settings.
*
* Master/Processor Clock Source Selection = PLLA
* Master/Processor Clock Prescaler = 1
* PLLA Divider = 2
* Master Clock Division (MDIV) = 3
*
* NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3.
*
* Prescaler input = 768MHz / 2 = 384MHz
* Prescaler output = 384MHz / 1 = 384MHz
* Processor Clock (PCK) = 384MHz
* Master clock (MCK) = 396MHz / 3 = 128MHz
*/
#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA
#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1
#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2
#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)
/* For OHCI Full-speed operations, the user has to perform the following:
*
* 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in PMC_PCER
* register.
* 2) Select PLLACK as Input clock of OHCI part, USBS bit in PMC_USB
* register.
* 3) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in
* PMC_USB register. USBDIV value is calculated regarding the PLLACK
* value and USB Full-speed accuracy.
* 4) Enable the OHCI clocks, UHP bit in PMC_SCER register.
*
* "The USB Host controller requires 48 MHz and 12 MHz clocks for OHCI
* full-speed operations. These clocks must be generated by a PLL with a
* correct accuracy of ± 0.25% thanks to USBDIV field.
*
* "Thus the USB Host peripheral receives three clocks from the Power
* Management Controller (PMC): the Peripheral Clock (MCK domain), the
* UHP48M and the UHP12M (built-in UHP48M divided by four) used by the
* OHCI to interface with the bus USB signals (Recovered 12 MHz domain)
* in Full-speed operations"
*
* USB Clock = PLLACK / (USBDIV + 1) = 48MHz
* USBDIV = PLLACK / 48MHz - 1
* = 15
*
* The maximum value of USBDIV is 15 corresponding to a divisor of 16.
* REVISIT: However, using the divisor of (15+1) yields a frame rate
* of 500 frames per second. A divisor of (7+1) gives the correct 1MS
* frame rate. I cannot explain the factor of 2 difference.
*/
# undef BOARD_USE_UPLL /* Use PLLA as source clock */
# define BOARD_OHCI_INPUT PMC_USB_USBS_PLLA /* Input is PLLACK */
# if 1 /* REVISIT */
# define BOARD_OHCI_DIVIDER (7) /* Divided by 8 */
# else
# define BOARD_OHCI_DIVIDER (15) /* Divided by 16 */
# endif
#endif
/* ADC Configuration
*
* ADCClock = MCK / ((PRESCAL+1) * 2)
*
* Given:
* MCK = 128MHz
* ADCClock = 8MHz
* Then:
* PRESCAL = 7
*/
#define BOARD_ADC_PRESCAL (7)
#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */
#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */
#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (768000000) /* PLLACK: 64 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (384000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (128000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
/* HSMCI clocking
*
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
* divided by (2*(CLKDIV) + CLOCKODD + 2).
*
* MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2)
*
* Where CLKDIV has a range of 0-255.
*/
/* MCK = 128MHz,
* CLKDIV = 159,
* MCI_SPEED = 128MHz / (2*159 + 0 + 2) = 400 KHz
*/
#define HSMCI_INIT_CLKDIV (159 << HSMCI_MR_CLKDIV_SHIFT)
/* MCK = 128MHz,
* CLKDIV = 2 w/CLOCKODD,
* MCI_SPEED = 128MHz /(2*2 + 1 + 2) = 18.3 MHz
*/
#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD)
/* MCK = 128MHz, CLKDIV = 2, MCI_SPEED = 128MHz /(2*2 + 0 + 2) = 21.3 MHz */
#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT)
#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* !__ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_384MHZ_H */
@@ -0,0 +1,209 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/include/board_396mhz.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_396MHZ_H
#define __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_396MHZ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC.
* These definitions will configure operational clocking.
*
* This is the configuration provided in the Atmel example code.
* This results in a CPU clock of 396MHz:
*
* MAINOSC: Frequency = 12MHz (crystal)
* PLLA: PLL Multiplier = 66 to generate PLLACK = 792MHz
* Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate
* MCK = 132MHz
* CPU clock = 396MHz
*/
/* Main oscillator register settings.
*
* The start up time should be should be:
* Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles.
*/
#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
/* PLLA configuration.
*
* Multipler = 66: PLLACK = 66 * 12MHz = 792MHz
*/
#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT)
#define BOARD_CKGR_PLLAR_OUT (0)
#define BOARD_CKGR_PLLAR_MUL (65 << PMC_CKGR_PLLAR_MUL_SHIFT)
/* PMC master clock register settings.
*
* Master/Processor Clock Source Selection = PLLA
* Master/Processor Clock Prescaler = 1
* PLLA Divider = 2
* Master Clock Division (MDIV) = 3
*
* NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3.
*
* Prescaler input = 792MHz / 2 = 396MHz
* Prescaler output = 396MHz / 1 = 396MHz
* Processor Clock (PCK) = 396MHz
* Master clock (MCK) = 396MHz / 3 = 132MHz
*/
#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA
#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1
#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2
#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3
/* ADC Configuration
*
* ADCClock = MCK / ((PRESCAL+1) * 2)
*
* Given:
* MCK = 132MHz
* ADCClock = 8MHz
* Then:
* PRESCAL = 7.25
*
* PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz
*/
#define BOARD_ADC_PRESCAL (7)
#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */
#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */
#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (792000000) /* PLLACK: 66 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (396000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 2 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)
/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded
* High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL
* (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either
* the 12MHz internal RC oscillator on a an external 12MHz crystal. The
* Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier.
*
* For High-speed operations, the user has to perform the following:
*
* 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in
* PMC_PCER register.
* 2) Write CKGR_PLLCOUNT field in PMC_UCKR register.
* 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register.
* 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register
* 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register.
* 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB
* register.
* 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in
* PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is
* selected.
* 8) Enable OHCI clocks, UHP bit in PMC_SCER register.
*
* Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI
* driver is initialized.
*/
# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */
# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */
# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */
# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */
#endif
/* HSMCI clocking
*
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
* divided by (2*(CLKDIV) + CLOCKODD + 2).
*
* MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2)
*
* Where CLKDIV has a range of 0-255.
*/
/* MCK = 132MHz,
* CLKDIV = 164,
* MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz
*/
#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT)
/* MCK = 132MHz,
* CLKDIV = 2 w/CLOCKODD,
* MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz
*/
#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD)
/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */
#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT)
#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* !__ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_396MHZ_H */
@@ -0,0 +1,206 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/include/board_498mhz.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_498MHZ_H
#define __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_498MHZ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC.
* These definitions will configure operational clocking.
*
* This is the configuration results in a CPU clock of 498MHz:
*
* MAINOSC: Frequency = 12MHz (crystal)
* PLLA: PLL Multiplier = 43+1 to generate PLLACK = 498MHz
* Master Clock (MCK): Source = PLLACK/1, Prescalar = 1, MDIV = 4 to generate
* MCK = 166MHz
* CPU clock = 498MHz
*/
/* Main oscillator register settings.
*
* The start up time should be should be:
* Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles.
*/
#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
/* PLLA configuration.
*
* Multipler = 43+1: PLLACK = 44 * 12MHz = 498MHz
*/
#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT)
#define BOARD_CKGR_PLLAR_OUT (0)
#define BOARD_CKGR_PLLAR_MUL (43 << PMC_CKGR_PLLAR_MUL_SHIFT)
/* PMC master clock register settings.
*
* Master/Processor Clock Source Selection = PLLA
* Master/Processor Clock Prescaler = 1
* PLLA Divider = 1
* Master Clock Division (MDIV) = 4
*
* NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3.
*
* Prescaler input = 498MHz / 1 = 498MHz
* Prescaler output = 498MHz / 1 = 498MHz
* Processor Clock (PCK) = 498MHz
* Master clock (MCK) = 498MHz / 4 = 132MHz
*/
#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA
#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1
#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV1
#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV4
/* ADC Configuration
*
* ADCClock = MCK / ((PRESCAL+1) * 2)
*
* Given:
* MCK = 132MHz
* ADCClock = 8MHz
* Then:
* PRESCAL = 7.25
*
* PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz
*/
#define BOARD_ADC_PRESCAL (7)
#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */
#define BOARD_TSD_TRACKTIM (2000) /* Min 1us at 8MHz */
#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (996000000) /* PLLACK: 83 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (498000000) /* CPU: PLLACK / 2 / 1 */
#define BOARD_MCK_FREQUENCY (166000000) /* MCK: PLLACK / 1 / 1 / 3 */
#define BOARD_ADCCLK_FREQUENCY (83000000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)
/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded
* High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL
* (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either
* the 12MHz internal RC oscillator on a an external 12MHz crystal. The
* Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier.
*
* For High-speed operations, the user has to perform the following:
*
* 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in
* PMC_PCER register.
* 2) Write CKGR_PLLCOUNT field in PMC_UCKR register.
* 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register.
* 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register
* 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register.
* 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB
* register.
* 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in
* PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is
* selected.
* 8) Enable OHCI clocks, UHP bit in PMC_SCER register.
*
* Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI
* driver is initialized.
*/
# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */
# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */
# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */
# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */
#endif
/* HSMCI clocking
*
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
* divided by (2*(CLKDIV) + CLOCKODD + 2).
*
* MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2)
*
* Where CLKDIV has a range of 0-255.
*/
/* MCK = 132MHz, CLKDIV = 164,
* MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz
*/
#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT)
/* MCK = 132MHz, CLKDIV = 2 w/CLOCKODD,
* MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz
*/
#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD)
/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */
#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT)
#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* !__ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_498MHZ_H */
@@ -0,0 +1,208 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/include/board_528mhz.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_528MHZ_H
#define __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_528MHZ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC.
* These definitions will configure operational clocking.
*
* This is the configuration results in a CPU clock of 528MHz:
*
* MAINOSC: Frequency = 12MHz (crystal)
* PLLA: PLL Multiplier = 43+1 to generate PLLACK = 528MHz
* Master Clock (MCK): Source = PLLACK/1, Prescalar = 1, MDIV = 4 to generate
* MCK = 132MHz
* CPU clock = 528MHz
*/
/* Main oscillator register settings.
*
* The start up time should be should be:
* Start Up Time = 8 * MOSCXTST / SLCK = 56 Slow Clock Cycles.
*/
#define BOARD_CKGR_MOR_MOSCXTST (62 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
/* PLLA configuration.
*
* Multipler = 43+1: PLLACK = 44 * 12MHz = 528MHz
*/
#define BOARD_CKGR_PLLAR_COUNT (63 << PMC_CKGR_PLLAR_COUNT_SHIFT)
#define BOARD_CKGR_PLLAR_OUT (0)
#define BOARD_CKGR_PLLAR_MUL (43 << PMC_CKGR_PLLAR_MUL_SHIFT)
/* PMC master clock register settings.
*
* Master/Processor Clock Source Selection = PLLA
* Master/Processor Clock Prescaler = 1
* PLLA Divider = 1
* Master Clock Division (MDIV) = 4
*
* NOTE: Bit PLLADIV2 must always be set to 1 when MDIV is set to 3.
*
* Prescaler input = 528MHz / 1 = 528MHz
* Prescaler output = 528MHz / 1 = 528MHz
* Processor Clock (PCK) = 528MHz
* Master clock (MCK) = 528MHz / 4 = 132MHz
*/
#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA
#define BOARD_PMC_MCKR_PRES PMC_MCKR_PRES_DIV1
#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV1
#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV4
/* ADC Configuration
*
* ADCClock = MCK / ((PRESCAL+1) * 2)
*
* Given:
* MCK = 132MHz
* ADCClock = 8MHz
* Then:
* PRESCAL = 7.25
*
* PRESCAL=7 and MCK=132MHz yields ADC clock of 8.25MHz
*/
#define BOARD_ADC_PRESCAL (7)
#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */
#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */
#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */
/* Resulting frequencies */
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (528000000) /* PLLACK: 44 * 12Mhz / 1 */
#define BOARD_PCK_FREQUENCY (528000000) /* CPU: PLLACK / 1 / 1 */
#define BOARD_MCK_FREQUENCY (132000000) /* MCK: PLLACK / 1 / 1 / 4 */
#define BOARD_ADCCLK_FREQUENCY (8250000) /* ADCCLK: MCK / ((7+1)*2) */
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)
/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded
* High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL
* (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either
* the 12MHz internal RC oscillator on a an external 12MHz crystal. The
* Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier.
*
* For High-speed operations, the user has to perform the following:
*
* 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in
* PMC_PCER register.
* 2) Write CKGR_PLLCOUNT field in PMC_UCKR register.
* 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register.
* 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register
* 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register.
* 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB
* register.
* 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in
* PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is
* selected.
* 8) Enable OHCI clocks, UHP bit in PMC_SCER register.
*
* Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI
* driver is initialized.
*/
# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */
# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */
# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */
# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */
#endif
/* HSMCI clocking
*
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
* divided by (2*(CLKDIV) + CLOCKODD + 2).
*
* MCI_SPEED = MCK / (2*CLKDIV + CLOCKODD + 2)
*
* Where CLKDIV has a range of 0-255.
*/
/* MCK = 132MHz,
* CLKDIV = 164,
* MCI_SPEED = 132MHz / (2*164 + 0 + 2) = 400 KHz
*/
#define HSMCI_INIT_CLKDIV (164 << HSMCI_MR_CLKDIV_SHIFT)
/* MCK = 132MHz,
* CLKDIV = 2 w/CLOCKODD,
* MCI_SPEED = 132MHz /(2*2 + 1 + 2) = 18.9 MHz
*/
#define HSMCI_MMCXFR_CLKDIV ((2 << HSMCI_MR_CLKDIV_SHIFT) | HSMCI_MR_CLKODD)
/* MCK = 132MHz, CLKDIV = 2, MCI_SPEED = 132MHz /(2*2 + 0 + 2) = 22 MHz */
#define HSMCI_SDXFR_CLKDIV (2 << HSMCI_MR_CLKDIV_SHIFT)
#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* !__ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_528MHZ_H */
@@ -0,0 +1,59 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/include/board_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_MEMORYMAP_H
#define __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_MEMORYMAP_H */
@@ -0,0 +1,167 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/include/board_sdram.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_SDRAM_H
#define __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_SDRAM_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "sam_pmc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* After power-on reset, the SAMA5 device is running on a 12MHz internal RC.
* When booting from SDRAM, NuttX is loaded in SDRAM by an intermediate
* bootloader. That bootloader had to have already configured the PLL
* and SDRAM for proper operation.
*
* In this case, we do not reconfigure the clocking.
* Rather, we need to query the register settings to determine the clock
* frequencies.
* We can only assume that the Main clock source is the on-board 12MHz
* crystal.
*/
#define BOARD_MAINCK_FREQUENCY BOARD_MAINOSC_FREQUENCY
#define BOARD_PLLA_FREQUENCY (sam_pllack_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PLLADIV2_FREQUENCY (sam_plladiv2_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_PCK_FREQUENCY (sam_pck_frequency(BOARD_MAINOSC_FREQUENCY))
#define BOARD_MCK_FREQUENCY (sam_mck_frequency(BOARD_MAINOSC_FREQUENCY))
/* Clocking to certain peripherals may be MCK/2.
*
* REVISIT: I am not sure why this is. Perhaps because of H32MXDIV?
*/
#define BOARD_PIT_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_USART_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#define BOARD_FLEXCOM_FREQUENCY (BOARD_MCK_FREQUENCY >> 1)
#if defined(CONFIG_SAMA5_EHCI) || defined(CONFIG_SAMA5_OHCI) || \
defined(CONFIG_SAMA5_UDPHS)
/* The USB Host High Speed requires a 480 MHz clock (UPLLCK) for the embedded
* High-speed transceivers. UPLLCK is the output of the 480 MHz UTMI PLL
* (UPLL). The source clock of the UTMI PLL is the Main OSC output: Either
* the 12MHz internal RC oscillator on a an external 12MHz crystal. The
* Main OSC must be 12MHz because the UPLL has a built-in 40x multiplier.
*
* For High-speed operations, the user has to perform the following:
*
* 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in
* PMC_PCER register.
* 2) Write CKGR_PLLCOUNT field in PMC_UCKR register.
* 3) Enable UPLL, bit AT91C_CKGR_UPLLEN in PMC_UCKR register.
* 4) Wait until UTMI_PLL is locked. LOCKU bit in PMC_SR register
* 5) Enable BIAS, bit AT91C_CKGR_BIASEN in PMC_UCKR register.
* 6) Select UPLLCK as Input clock of OHCI part, USBS bit in PMC_USB
* register.
* 7) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in
* PMC_USB register. USBDIV must be 9 (division by 10) if UPLLCK is
* selected.
* 8) Enable OHCI clocks, UHP bit in PMC_SCER register.
*
* Steps 2 through 7 performed here. 1 and 8 are performed in the EHCI
* driver is initialized.
*/
# define BOARD_USE_UPLL 1 /* Use UPLL for clock source */
# define BOARD_CKGR_UCKR_UPLLCOUNT (15) /* Maximum value */
# define BOARD_CKGR_UCKR_BIASCOUNT (15) /* Maximum value */
# define BOARD_UPLL_OHCI_DIV (10) /* Divide by 10 */
#endif
/* ADC Configuration
*
* ADCClock = MCK / ((PRESCAL+1) * 2)
* PRESCAL = (MCK / (2 * ADCClock) - 1)
*/
#define BOARD_ADCCLK_FREQUENCY (8000000) /* ADCCLK: MCK / ((7+1)*2) */
#define BOARD_ADCCLK_FREQUENCY \
((BOARD_PLLADIV2_FREQUENCY / (2 *BOARD_PLLADIV2_FREQUENCY)) - 1)
#define BOARD_ADC_PRESCAL (7)
#define BOARD_TSD_STARTUP (40) /* 40 nanoseconds */
#define BOARD_TSD_TRACKTIM (2000) /* Min 1µs at 8MHz */
#define BOARD_TSD_DEBOUNCE (10000000) /* 10 milliseconds (units nanoseconds) */
/* HSMCI clocking
*
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
* divided by (2*(CLKDIV) + CLOCKODD + 2).
*
* CLKFULLDIV = 2*CLKDIV + CLOCKODD;
* MCI_SPEED = MCK / (CLKFULLDIV + 2)
* CLKFULLDIV = MCK / MCI_SPEED - 2
*
* CLKDIV = CLKFULLDIV >> 1
* CLOCKODD = CLKFULLDIV & 1
*
* Where CLKDIV has a range of 0-255.
*/
/* Initial clock: 400 KHz (target) */
#define HSMCI_INIT_CLKDIV sam_hsmci_clkdiv(400000)
/* MMC transfer clock: 20 MHz (target) */
#define HSMCI_MMCXFR_CLKDIV sam_hsmci_clkdiv(20000000)
/* SD transfer clock: 25 MHz (target) */
#define HSMCI_SDXFR_CLKDIV sam_hsmci_clkdiv(25000000)
#define HSMCI_SDWIDEXFR_CLKDIV HSMCI_SDXFR_CLKDIV
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* !__ASSEMBLY__ */
#endif /* __BOARDS_ARM_SAMA5_JUPITER_NANO_INCLUDE_BOARD_SDRAM_H */
@@ -0,0 +1,110 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/include/nsh_romfsimg.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
const unsigned char aligned_data(4) romfs_img[] =
{
0x2d, 0x72, 0x6f, 0x6d, 0x31, 0x66, 0x73, 0x2d, 0x00, 0x00, 0x01, 0x30,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x20,
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0x66, 0x75, 0x70, 0x20, 0x65, 0x74, 0x68, 0x30, 0x0a, 0x74, 0x65, 0x6c,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00
};
unsigned int romfs_img_len = 1024;
@@ -0,0 +1,66 @@
############################################################################
# boards/arm/sama5/sama5d2-xult/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-a/Toolchain.defs
ifeq ($(CONFIG_SAMA5_BOOT_ISRAM),y)
LDSCRIPT = isram.ld
endif
ifeq ($(CONFIG_SAMA5_BOOT_SDRAM),y)
ifeq ($(CONFIG_SAMA5D2XULT_DRAM_BOOT),y)
LDSCRIPT = dramboot.ld
else
LDSCRIPT = uboot.ld
endif
endif
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
# NXFLAT module definitions
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections
#LDNXFLATFLAGS = -e main -s 2048
LDNXFLATFLAGS = -s 2048
# ELF module definitions
CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
#LDELFFLAGS = -r -e main
LDELFFLAGS += -T $(call CONVERT_PATH,$(TOPDIR)/binfmt/libelf/gnu-elf.ld)
#ifneq ($(CROSSDEV),arm-nuttx-elf-)
# LDFLAGS += --nostartfiles -nodefaultlibs
#endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
@@ -0,0 +1,123 @@
/****************************************************************************
* boards/arm/sama5/sama5d2-xult/scripts/dramboot.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The SAMA5D4 has 128 KB of ISRAM beginning at virtual address 0x0020:0000.
* This memory configuration, however, loads into the 256MB SDRAM on board
* the SAMA5D4-EK which lies at 0x2000:0000.
*
* Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
* high end of ISRAM for the page table.
*/
MEMORY
{
isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K
sdram (W!RX) : ORIGIN = 0x20000000, LENGTH = 256M
}
ENTRY(entry)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
*(.ARM.extab*)
*(.gnu.linkonce.armextab.*)
_etext = ABSOLUTE(.);
} > sdram
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > sdram
.ARM.extab :
{
*(.ARM.extab*)
} > sdram
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > sdram
PROVIDE_HIDDEN (__exidx_end = .);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sdram
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,124 @@
/****************************************************************************
* boards/arm/sama5/sama5d2-xult/scripts/gnu-elf.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
SECTIONS
{
.text 0x00000000 :
{
_stext = . ;
*(.text)
*(.text.*)
*(.gnu.warning)
*(.stub)
*(.glue_7)
*(.glue_7t)
*(.jcr)
/* C++ support: The .init and .fini sections contain specific logic
* to manage static constructors and destructors.
*/
*(.gnu.linkonce.t.*)
*(.init) /* Old ABI */
*(.fini) /* Old ABI */
_etext = . ;
}
.rodata :
{
_srodata = . ;
*(.rodata)
*(.rodata1)
*(.rodata.*)
*(.gnu.linkonce.r*)
_erodata = . ;
}
.data :
{
_sdata = . ;
*(.data)
*(.data1)
*(.data.*)
*(.gnu.linkonce.d*)
. = ALIGN(4);
_edata = . ;
}
/* Uninitialized data */
.noinit :
{
_snoinit = . ;
*(.noinit*)
_enoinit = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as
* simple, linear arrays in the .ctors section of the object file.
* Similarly, pointers to global/static destructor routines are
* stored in .dtors.
*/
.ctors :
{
_sctors = . ;
*(.ctors) /* Old ABI: Unallocated */
*(.init_array) /* New ABI: Allocated */
_edtors = . ;
}
.dtors :
{
_sdtors = . ;
*(.dtors) /* Old ABI: Unallocated */
*(.fini_array) /* New ABI: Allocated */
_edtors = . ;
}
.bss :
{
_sbss = . ;
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.b*)
*(COMMON)
_ebss = . ;
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,119 @@
/****************************************************************************
* boards/arm/sama5/sama5d2-xult/scripts/isram.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The SAMA5D27 has 128 KB of ISRAM beginning at virtual address 0x0020:0000.
*
* Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
* high end of ISRAM for the page table.
*/
MEMORY
{
isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K
}
ENTRY(entry)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
*(.ARM.extab*)
*(.gnu.linkonce.armextab.*)
_etext = ABSOLUTE(.);
} > isram
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > isram
.ARM.extab : {
*(.ARM.extab*)
} > isram
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > isram
PROVIDE_HIDDEN (__exidx_end = .);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > isram
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > isram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > isram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,124 @@
/****************************************************************************
* boards/arm/sama5/sama5d2-xult/scripts/uboot.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The SAMA5D4 has 128 KB of ISRAM beginning at virtual address 0x0020:0000.
* This memory configuration, however, loads into the 256MB SDRAM on board
* the SAMA5D4-EK which lies at 0x2000:0000. An offset 0x00008000 is
* reserved for used by the U-boot bootloader.
*
* Vectors in low memory are assumed and 16KB of ISRAM is reserved at the
* high end of ISRAM for the page table.
*/
MEMORY
{
isram (W!RX) : ORIGIN = 0x00200000, LENGTH = 128K - 16K
sdram (W!RX) : ORIGIN = 0x20008000, LENGTH = 256M - 32K
}
ENTRY(entry)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
*(.ARM.extab*)
*(.gnu.linkonce.armextab.*)
_etext = ABSOLUTE(.);
} > sdram
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > sdram
.ARM.extab :
{
*(.ARM.extab*)
} > sdram
/* .ARM.exidx is sorted, so has to go in its own output section. */
PROVIDE_HIDDEN (__exidx_start = .);
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > sdram
PROVIDE_HIDDEN (__exidx_end = .);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sdram
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sdram
/* Uninitialized data */
.noinit :
{
_snoinit = ABSOLUTE(.);
*(.noinit*)
_enoinit = ABSOLUTE(.);
} > sdram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
+131
View File
@@ -0,0 +1,131 @@
############################################################################
# boards/arm/sama5/jupiter-nano/src/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = sam_boot.c
ifeq ($(CONFIG_SAMA5_SPI0),y)
CSRCS += sam_spi.c
else
ifeq ($(CONFIG_SAMA5_SPI1),y)
CSRCS += sam_spi.c
endif
endif
ifeq ($(CONFIG_SAMA5_DDRCS),y)
CSRCS += sam_sdram.c
endif
ifeq ($(CONFIG_SAMA5_EBICS3_NAND),y)
CSRCS += sam_nandflash.c
endif
ifeq ($(CONFIG_MTD_AT25),y)
ifeq ($(CONFIG_SAMA5_SPI0),y)
CSRCS += sam_at25.c
endif
endif
ifeq ($(CONFIG_SAMA5_SDMMC0),y)
CSRCS += sam_sdmmc.c
else
ifeq ($(CONFIG_SAMA5_SDMMC1),y)
CSRCS += sam_sdmmc.c
endif
endif
ifeq ($(CONFIG_SAMA5_HSMCI0),y)
CSRCS += sam_hsmci.c
else
ifeq ($(CONFIG_SAMA5_HSMCI1),y)
CSRCS += sam_hsmci.c
endif
endif
ifeq ($(CONFIG_SAMA5_UHPHS),y)
CSRCS += sam_usb.c
else
ifeq ($(CONFIG_SAMA5_UDPHS),y)
CSRCS += sam_usb.c
endif
endif
ifeq ($(CONFIG_SAMA5_EMACA),y)
CSRCS += sam_ethernet.c
else
ifeq ($(CONFIG_SAMA5_GMAC),y)
CSRCS += sam_ethernet.c
endif
endif
ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += sam_appinit.c
CSRCS += sam_bringup.c
endif
ifeq ($(CONFIG_ADC),y)
CSRCS += sam_adc.c
ifeq ($(CONFIG_INPUT_AJOYSTICK),y)
CSRCS += sam_ajoystick.c
endif
endif
ifeq ($(CONFIG_PWM),y)
CSRCS += sam_pwm.c
endif
ifeq ($(CONFIG_CAN),y)
CSRCS += sam_can.c
endif
ifeq ($(CONFIG_AUDIO_I2SCHAR),y)
ifeq ($(CONFIG_SAMA5_SSC0),y)
CSRCS += sam_i2schar.c
else
ifeq ($(CONFIG_SAMA5_SSC1),y)
CSRCS += sam_i2schar.c
endif
endif
endif
ifeq ($(CONFIG_USBMSC),y)
CSRCS += sam_usbmsc.c
endif
ifeq ($(CONFIG_ARCH_FPU),y)
CSRCS += sam_ostest.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += sam_autoleds.c
else
CSRCS += sam_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += sam_buttons.c
endif
ifeq ($(CONFIG_BOARDCTL_RESET),y)
CSRCS += sam_reset.c
endif
include $(TOPDIR)/boards/Board.mk
@@ -0,0 +1,490 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/jupiter-nano.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_SAMA5_JUPITER_NANO_SRC_JUPITER_NANO_H
#define __BOARDS_ARM_SAMA5_JUPITER_NANO_SRC_JUPITER_NANO_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
#include <stdbool.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "hardware/sam_pinmap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#define HAVE_SDMMC 1
#define HAVE_AT25 1
#define HAVE_NAND 1
#define HAVE_USBHOST 1
#define HAVE_USBDEV 1
#define HAVE_USBMONITOR 1
#define HAVE_NETWORK 1
/* SDMMC */
/* Can't support MMC/SD if the card interface(s) are not enable */
#if !defined(CONFIG_SAMA5_SDMMC) && !defined(CONFIG_SAMA5_SDMMC0)
# undef HAVE_SDMMC
#endif
/* Can't support MMC/SD features if mountpoints are disabled */
#if defined(HAVE_SDMMC) && defined(CONFIG_DISABLE_MOUNTPOINT)
# warning Mountpoints disabled. No MMC/SD support
# undef HAVE_SDMCC
#endif
/* We need PIO interrupts on PIOD to support card detect interrupts */
#if defined(HAVE_SDMMC) && !defined(CONFIG_SAMA5_PIOA_IRQ)
# warning PIOA interrupts not enabled. No MMC/SD support.
# undef HAVE_SDMMC
#endif
/* NAND FLASH */
/* Can't support the NAND device if NAND flash is not configured on EBI CS3 */
#ifndef CONFIG_SAMA5_EBICS3_NAND
# undef HAVE_NAND
#endif
/* Can't support NAND features if mountpoints are disabled or if we were not
* asked to mount the NAND part
*/
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5D3XPLAINED_NAND_BLOCKMOUNT)
# undef HAVE_NAND
#endif
/* Can't support NAND if the MTD feature is not enabled */
#if !defined(CONFIG_MTD) || !defined(CONFIG_MTD_NAND)
# undef HAVE_NAND
#endif
/* If we are going to mount the NAND, then they user must also have told
* us what to do with it by setting one of CONFIG_JUPITERNANO_NAND_FTL or
* CONFIG_JUPITERNANO_NAND_NXFFS.
*/
#ifndef CONFIG_MTD
# undef CONFIG_JUPITERNANO_NAND_NXFFS
# undef CONFIG_JUPITERNANO_NAND_FTL
#endif
#if !defined(CONFIG_FS_NXFFS) || !defined(CONFIG_NXFFS_NAND)
# undef CONFIG_JUPITERNANO_NAND_NXFFS
#endif
#if !defined(CONFIG_JUPITERNANO_NAND_FTL) && !defined(CONFIG_JUPITERNANO_NAND_NXFFS)
# undef HAVE_NAND
#endif
#if defined(CONFIG_JUPITERNANO_NAND_FTL) && defined(CONFIG_JUPITERNANO_NAND_NXFFS)
# warning Both CONFIG_JUPITERNANO_NAND_FTL and CONFIG_JUPITERNANO_NAND_NXFFS are set
# warning Ignoring CONFIG_JUPITERNANO_NAND_NXFFS
# undef CONFIG_JUPITER_NANO_NAND_NXFFS
#endif
/* AT25 Serial FLASH */
/* Can't support the AT25 device if it SPI0 or AT25 support are not enabled */
#if !defined(CONFIG_SAMA5_SPI0) || !defined(CONFIG_MTD_AT25)
# undef HAVE_AT25
#endif
/* Can't support AT25 features if mountpoints are disabled or if we were not
* asked to mount the AT25 part
*/
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_SAMA5D3XPLAINED_AT25_AUTOMOUNT)
# undef HAVE_AT25
#endif
/* If we are going to mount the AT25, then they user must also have told
* us what to do with it by setting one of these.
*/
#ifndef CONFIG_FS_NXFFS
# undef CONFIG_SAMA5D3XPLAINED_AT25_NXFFS
#endif
#if !defined(CONFIG_JUPITERNANO_AT25_FTL) && !defined(CONFIG_JUPITERNANO_AT25_NXFFS)
# undef HAVE_AT25
#endif
#if defined(CONFIG_JUPITERNANO_AT25_FTL) && defined(CONFIG_JUPITERNANO_AT25_NXFFS)
# warning Both CONFIG_JUPITERNANO_AT25_FTL and CONFIG_JUPITERNANO_AT25_NXFFS are set
# warning Ignoring CONFIG_JUPITERNANO_AT25_NXFFS
# undef CONFIG_JUPITERNANO_AT25_NXFFS
#endif
/* Assign minor device numbers. For example, if we also use MINOR number 0
* for the AT25, it should appear as /dev/mtdblock0
*/
#define _NAND_MINOR 0
#ifdef HAVE_NAND
# define NAND_MINOR _NAND_MINOR
# define _AT25_MINOR (_NAND_MINOR+1)
#else
# define _AT25_MINOR _NAND_MINOR
#endif
#ifdef HAVE_AT25
# define AT25_MINOR _AT25_MINOR
#endif
/* MMC/SD minor numbers: The NSH device minor extended is extended to
* support two devices. If CONFIG_NSH_MMCSDMINOR is zero, these will be:
* /dev/mmcsd0 and /dev/mmcsd1.
*/
#ifndef CONFIG_NSH_MMCSDMINOR
# define CONFIG_NSH_MMCSDMINOR 0
#endif
#ifdef HAVE_SDMMC
# if ( defined(CONFIG_SAMA5_SDMMC0) && defined(CONFIG_SAMA5_SDMMC1) )
# define SDMMC0_SLOTNO 0
# define SDMMC1_SLOTNO 1
# else
# if ( defined(CONFIG_SAMA5_SDMMC0) )
# define SDMMC0_SLOTNO 0
# endif
# if ( defined(CONFIG_SAMA5_SDMMC1) )
# define SDMMC1_SLOTNO 0
# endif
# endif
# ifdef CONFIG_SAMA5_SDMMC0
# define SDMMC0_MINOR CONFIG_NSH_MMCSDMINOR
# define SDMMC1_MINOR (CONFIG_NSH_MMCSDMINOR+1)
# else
# define SDMMC1_MINOR CONFIG_NSH_MMCSDMINOR
# endif
#else
#endif
/* USB Host / USB Device */
/* Either CONFIG_SAMA5_UHPHS or CONFIG_SAMA5_UDPHS must be defined,
* or there is no USB of any kind.
*/
#if !defined(CONFIG_SAMA5_UHPHS)
# undef CONFIG_SAMA5_OHCI
# undef CONFIG_SAMA5_EHCI
#endif
#if !defined(CONFIG_SAMA5_UDPHS)
# undef HAVE_USBDEV
#endif
/* CONFIG_USBDEV and CONFIG_USBHOST must also be defined */
#if !defined(CONFIG_USBDEV)
# undef HAVE_USBDEV
#endif
#if defined(CONFIG_USBHOST)
# if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI)
# warning CONFIG_USBHOST is defined, but neither CONFIG_SAMA5_OHCI nor CONFIG_SAMA5_EHCI are defined
# endif
#else
# undef CONFIG_SAMA5_OHCI
# undef CONFIG_SAMA5_EHCI
#endif
#if !defined(CONFIG_SAMA5_OHCI) && !defined(CONFIG_SAMA5_EHCI)
# undef HAVE_USBHOST
#endif
/* Check if we should enable the USB monitor before starting NSH */
#ifndef CONFIG_USBMONITOR
# undef HAVE_USBMONITOR
#endif
#ifndef HAVE_USBDEV
# undef CONFIG_USBDEV_TRACE
#endif
#ifndef HAVE_USBHOST
# undef CONFIG_USBHOST_TRACE
#endif
#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE)
# undef HAVE_USBMONITOR
#endif
/* Networking */
#if !defined(CONFIG_NET) || (!defined(CONFIG_SAMA5_EMACA) && !defined(CONFIG_SAMA5_GMAC))
# undef HAVE_NETWORK
#endif
/* procfs File System */
#ifdef CONFIG_FS_PROCFS
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
# define SAMA5_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
# else
# define SAMA5_PROCFS_MOUNTPOINT "/proc"
# endif
#endif
/* LEDs *********************************************************************/
/* There is a blue status LED on board the Jupiter Nano. It is driven
* driven by pin PA6. The LED is connected to ground so bringing the LED high
* will illuminate the LED.
*
* ------------------------------ ------------------- ---------------------
* SAMA5D2 PIO SIGNAL USAGE
* ------------------------------ ------------------- ---------------------
* PA6 STATUS_LED Blue LED
* ------------------------------ ------------------- ---------------------
*
*/
#define PIO_LED_BLUE (PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_SET | \
PIO_PORT_PIOA | PIO_PIN6)
/* Buttons ******************************************************************/
/* There are no user-accessible buttons on the Jupiter Nano. */
/* SDMMC clocking
*
* Multimedia Card Interface clock (MCCK or MCI_CK) is Master Clock (MCK)
* divided by (2*(CLKDIV+1)).
*
* MCI_SPEED = MCK / (2*(CLKDIV+1))
* CLKDIV = MCI / MCI_SPEED / 2 - 1
*
* Where CLKDIV has a range of 0-255.
*/
/* MCK = 96MHz, CLKDIV = 119, MCI_SPEED = 96MHz / 2 * (119+1) = 400 KHz */
#define SDMMC_INIT_CLKDIV (119 << SDMMC_MR_CLKDIV_SHIFT)
/* MCK = 96MHz, CLKDIV = 3, MCI_SPEED = 96MHz / 2 * (3+1) = 12 MHz */
#define SDMMC_MMCXFR_CLKDIV (3 << SDMMC_MR_CLKDIV_SHIFT)
/* MCK = 96MHz, CLKDIV = 1, MCI_SPEED = 96MHz / 2 * (1+1) = 24 MHz */
#define SDMMC_SDXFR_CLKDIV (1 << SDMMC_MR_CLKDIV_SHIFT)
#define SDMMC_SDWIDEXFR_CLKDIV SDMMC_SDXFR_CLKDIV
/* SDMMC Card Slots *********************************************************/
/* The Jupiter Nano provides a SD memory card slot:
* a full size SD card slot (J19)
*
* The full size SD card slot connects via SDMMC1. The card detect discrete
* is available on PA30 (pulled high). The write protect discrete is tied to
* ground and not available to software. The slot only supports 4-bit
* wide transfer mode, and the NuttX driver currently uses only the 4-bit
* wide transfer mode.
*
* PA30 SDMMC1_CD
* PA18 SDMMC1_DAT0
* PA19 SDMMC1_DAT1
* PA20 SDMMC1_DAT2
* PA21 SDMMC1_DAT3
* PA22 SDMMC1_CK
* PA28 SDMMC1_CDA
*/
#define IRQ_SDMMC1_CD SAM_IRQ_PA30
/* USB Ports ****************************************************************/
/* The Jupiter Nano features two USB communication ports:
*
* 1. Port A Host High Speed (EHCI) and Full Speed (OHCI) multiplexed with
* USB Device High Speed Micro AB connector, J23
*
* 2. Port B Host High Speed (EHCI) and Full Speed (OHCI) standard type A
* connector, J13
*
* The USB host port (only) is equipped with 500-mA high-side power
* switch for self-powered and bus-powered applications.
*
* The USB device port A (J6) features a VBUS insert detection function.
*
*
* Port A
*
* PIO Signal Name Function
* ---- ----------- -------------------------------------------------------
* PE9 VBUS_SENSE VBus detection
*
* Note: No VBus power switch enable on port A. I think that this limits
* this port to a device port or as a host port for self-powered devices
* only.
*/
#define PIO_USBA_VBUS_SENSE \
(PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \
PIO_INT_BOTHEDGES | PIO_PORT_PIOA | PIO_PIN31)
#define IRQ_USBA_VBUS_SENSE \
SAM_IRQ_PA31
/* Port B
*
* PIO Signal Name Function
* ---- ----------- -------------------------------------------------------
* PE3 EN5V_USBB VBus power enable via MN3 SP2526A-2E dual power
* switch. PE3 (EN5V_USBB)connects to ENB pin of MN3.
* MN3 OUTB (5V_USBB) is provided to pin 1 of J13 USB
* A connector
*
* Active high for SP2526A-1; active low for SP2526A-2
*/
#define PIO_USBB_VBUS_ENABLE \
(PIO_OUTPUT | PIO_CFG_DEFAULT | PIO_OUTPUT_SET | \
PIO_PORT_PIOB | PIO_PIN10)
/* Ports B
*
* PIO Signal Name Function
* ---- ----------- -------------------------------------------------------
* PE5 OVCUR_USB Over-current indication from B
*/
#define PIO_USBB_VBUS_OVERCURRENT \
(PIO_INPUT | PIO_CFG_PULLUP | PIO_CFG_DEGLITCH | \
PIO_INT_BOTHEDGES | PIO_PORT_PIOA | PIO_PIN29)
#define IRQ_USBB_VBUS_OVERCURRENT \
SAM_IRQ_PA29
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: sam_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
int sam_bringup(void);
/****************************************************************************
* Name: sam_sdmmc_initialize
*
* Description:
* Initialize and configure one SDMMC slot
*
****************************************************************************/
#ifdef HAVE_SDMMC
int sam_sdmmc_initialize(int slotno, int minor);
#endif
/****************************************************************************
* Name: sam_cardinserted
*
* Description:
* Check if a card is inserted into the selected SDMMC slot
*
****************************************************************************/
#ifdef HAVE_SDMMC
bool sam_cardinserted(int slotno);
#endif
/****************************************************************************
* Name: sam_writeprotected
*
* Description:
* Check if the card in the MMCSD slot is write protected
*
****************************************************************************/
#ifdef HAVE_HSMCI
bool sam_writeprotected(int slotno);
#endif
/****************************************************************************
* Name: sam_usbinitialize
*
* Description:
* Called from sam_usbinitialize very early in initialization to setup
* USB-related PIO pins for the Jupiter Nano board.
*
****************************************************************************/
#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS)
void weak_function sam_usbinitialize(void);
#endif
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
****************************************************************************/
#ifdef HAVE_USBHOST
int sam_usbhost_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM__SAMA5_JUPITER_NANO_SRC_JUPITER_NANO_H */
@@ -0,0 +1,3 @@
ifconfig eth0 10.0.0.2
ifup eth0
telnetd &
@@ -0,0 +1,86 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_adc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/analog/adc.h>
#include "sam_adc.h"
#include "jupiter-nano.h"
#ifdef CONFIG_SAMA5_ADC
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_adc_setup
*
* Description:
* Initialize ADC and register the ADC driver.
*
****************************************************************************/
int sam_adc_setup(void)
{
static bool initialized = false;
struct adc_dev_s *adc;
int ret;
/* Check if we have already initialized */
if (!initialized)
{
/* Call stm32_adcinitialize() to get an instance of the ADC interface */
adc = sam_adc_initialize();
if (adc == NULL)
{
aerr("ERROR: Failed to get ADC interface\n");
return -ENODEV;
}
/* Register the ADC driver at "/dev/adc0" */
ret = adc_register("/dev/adc0", adc);
if (ret < 0)
{
aerr("ERROR: adc_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
}
#endif /* CONFIG_ADC */
@@ -0,0 +1,438 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_ajoystick.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <fcntl.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/fs/fs.h>
#include <nuttx/input/ajoystick.h>
#include "sam_pio.h"
#include "sam_adc.h"
#include "hardware/sam_adc.h"
#include "jupiter-nano.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Check for pre-requisites and pin conflicts */
#ifdef CONFIG_INPUT_AJOYSTICK
# if !defined(CONFIG_ADC)
# error CONFIG_ADC is required for the Itead joystick
# undef CONFIG_INPUT_AJOYSTICK
# elif !defined(CONFIG_SAMA5_ADC_CHAN0) || !defined(CONFIG_SAMA5_ADC_CHAN1)
# error CONFIG_SAMA5_ADC_CHAN0 and 1 are required for Itead joystick
# elif !defined(CONFIG_SAMA5_PIOC_IRQ)
# error CONFIG_SAMA5_PIOC_IRQ is required for the Itead joystick
# undef CONFIG_INPUT_AJOYSTICK
# elif defined(CONFIG_SAMA5_EMACA)
# error EMAC conflicts with the Itead PIO usage
# undef CONFIG_INPUT_AJOYSTICK
# elif defined(CONFIG_SAMA5_SSC0)
# error SSC0 conflicts with the Itead PIO usage
# undef CONFIG_INPUT_AJOYSTICK
# elif defined(CONFIG_SAMA5_SPI1)
# warning SPI1 may conflict with the Itead PIO usage
# elif defined(CONFIG_SAMA5_ISI)
# warning ISI may conflict with the Itead PIO usage
# endif
#endif /* CONFIG_INPUT_AJOYSTICK */
#ifdef CONFIG_INPUT_AJOYSTICK
/* Number of Joystick buttons */
#define AJOY_NGPIOS 7
/* Bitset of supported Joystick buttons */
#define AJOY_SUPPORTED (AJOY_BUTTON_1_BIT | AJOY_BUTTON_2_BIT | \
AJOY_BUTTON_3_BIT | AJOY_BUTTON_4_BIT | \
AJOY_BUTTON_5_BIT | AJOY_BUTTON_6_BIT | \
AJOY_BUTTON_7_BIT )
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s
*lower);
static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
FAR struct ajoy_sample_s *sample);
static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s
*lower);
static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
ajoy_buttonset_t press, ajoy_buttonset_t release,
ajoy_handler_t handler, FAR void *arg);
static void ajoy_disable(void);
static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each Itead joystick button. Index using AJOY_*
* button definitions in include/nuttx/input/ajoystick.h.
*/
static const pio_pinset_t g_joypio[AJOY_NGPIOS] =
{
PIO_BUTTON_1, PIO_BUTTON_2, PIO_BUTTON_3, PIO_BUTTON_4,
PIO_BUTTON_5, PIO_BUTTON_6, PIO_BUTTON_6
};
static const uint8_t g_joyirq[AJOY_NGPIOS] =
{
IRQ_BUTTON_1, IRQ_BUTTON_2, IRQ_BUTTON_3, IRQ_BUTTON_4,
IRQ_BUTTON_5, IRQ_BUTTON_6, IRQ_BUTTON_6
};
/* This is the button joystick lower half driver interface */
static const struct ajoy_lowerhalf_s g_ajoylower =
{
.al_supported = ajoy_supported,
.al_sample = ajoy_sample,
.al_buttons = ajoy_buttons,
.al_enable = ajoy_enable,
};
/* Thread-independent file structure for the open ADC driver */
static struct file g_adcfile;
/* Current interrupt handler and argument */
static ajoy_handler_t g_ajoyhandler;
static FAR void *g_ajoyarg;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: ajoy_supported
*
* Description:
* Return the set of buttons supported on the button joystick device
*
****************************************************************************/
static ajoy_buttonset_t ajoy_supported(FAR const struct ajoy_lowerhalf_s
*lower)
{
iinfo("Supported: %02x\n", AJOY_SUPPORTED);
return (ajoy_buttonset_t)AJOY_SUPPORTED;
}
/****************************************************************************
* Name: ajoy_sample
*
* Description:
* Return the current state of all button joystick buttons
*
****************************************************************************/
static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower,
FAR struct ajoy_sample_s *sample)
{
struct adc_msg_s adcmsg[SAM_ADC_NCHANNELS];
FAR struct adc_msg_s *ptr;
ssize_t nread;
ssize_t offset;
int have;
int i;
/* Read all of the available samples (handling the case where additional
* channels are enabled).
*/
nread = file_read(&g_adcfile, adcmsg,
MAX_ADC_CHANNELS * sizeof(struct adc_msg_s));
if (nread < 0)
{
if (nread != EINTR)
{
ierr("ERROR: read failed: %d\n", (int)nread);
}
return nread;
}
else if (nread < 2 * sizeof(struct adc_msg_s))
{
ierr("ERROR: read too small: %ld\n", (long)nread);
return -EIO;
}
/* Sample and the raw analog inputs */
for (i = 0, offset = 0, have = 0;
i < SAM_ADC_NCHANNELS && offset < nread && have != 3;
i++, offset += sizeof(struct adc_msg_s))
{
ptr = &adcmsg[i];
/* Is this one of the channels that we need? */
if ((have & 1) == 0 && ptr->am_channel == 0)
{
int32_t tmp = ptr->am_data;
sample->as_x = (int16_t)tmp;
have |= 1;
iinfo("X sample: %ld -> %d\n", (long)tmp, (int)sample->as_x);
}
if ((have & 2) == 0 && ptr->am_channel == 1)
{
int32_t tmp = ptr->am_data;
sample->as_y = (int16_t)tmp;
have |= 2;
iinfo("Y sample: %ld -> %d\n", (long)tmp, (int)sample->as_y);
}
}
if (have != 3)
{
ierr("ERROR: Could not find joystack channels\n");
return -EIO;
}
/* Sample the discrete button inputs */
sample->as_buttons = ajoy_buttons(lower);
iinfo("Returning: %02x\n", AJOY_SUPPORTED);
return OK;
}
/****************************************************************************
* Name: ajoy_buttons
*
* Description:
* Return the current state of button data (only)
*
****************************************************************************/
static ajoy_buttonset_t ajoy_buttons(FAR const struct ajoy_lowerhalf_s
*lower)
{
ajoy_buttonset_t ret = 0;
int i;
/* Read each joystick GPIO value */
for (i = 0; i < AJOY_NGPIOS; i++)
{
/* Button outputs are pulled high. So a sensed low level means that the
* button is pressed.
*/
if (!sam_pioread(g_joypio[i]))
{
ret |= (1 << i);
}
}
iinfo("Returning: %02x\n", ret);
return ret;
}
/****************************************************************************
* Name: ajoy_enable
*
* Description:
* Enable interrupts on the selected set of joystick buttons. And empty
* set will disable all interrupts.
*
****************************************************************************/
static void ajoy_enable(FAR const struct ajoy_lowerhalf_s *lower,
ajoy_buttonset_t press, ajoy_buttonset_t release,
ajoy_handler_t handler, FAR void *arg)
{
irqstate_t flags;
ajoy_buttonset_t either = press | release;
ajoy_buttonset_t bit;
int i;
/* Start with all interrupts disabled */
flags = enter_critical_section();
ajoy_disable();
iinfo("press: %02x release: %02x handler: %p arg: %p\n",
press, release, handler, arg);
/* If no events are indicated or if no handler is provided, then this
* must really be a request to disable interrupts.
*/
if (either && handler)
{
/* Save the new the handler and argument */
g_ajoyhandler = handler;
g_ajoyarg = arg;
/* Check each GPIO. */
for (i = 0; i < AJOY_NGPIOS; i++)
{
/* Enable interrupts on each pin that has either a press or
* release event associated with it.
*/
bit = (1 << i);
if ((either & bit) != 0)
{
/* REVISIT: It would be better if we reconfigured for
* the edges of interest so that we do not get spurious
* interrupts.
*/
sam_pioirqenable(g_joyirq[i]);
}
}
}
leave_critical_section(flags);
}
/****************************************************************************
* Name: ajoy_disable
*
* Description:
* Disable all joystick interrupts
*
****************************************************************************/
static void ajoy_disable(void)
{
irqstate_t flags;
int i;
/* Disable each joystick interrupt */
flags = enter_critical_section();
for (i = 0; i < AJOY_NGPIOS; i++)
{
sam_pioirqdisable(g_joyirq[i]);
}
leave_critical_section(flags);
/* Nullify the handler and argument */
g_ajoyhandler = NULL;
g_ajoyarg = NULL;
}
/****************************************************************************
* Name: ajoy_interrupt
*
* Description:
* Discrete joystick interrupt handler
*
****************************************************************************/
static int ajoy_interrupt(int irq, FAR void *context, FAR void *arg)
{
DEBUGASSERT(g_ajoyhandler);
if (g_ajoyhandler)
{
g_ajoyhandler(&g_ajoylower, g_ajoyarg);
}
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_ajoy_initialization
*
* Description:
* Initialize and register the button joystick driver
*
****************************************************************************/
int sam_ajoy_initialization(void)
{
int ret;
int i;
/* NOTE: The ADC driver was initialized earlier in the bring-up sequence. */
/* Open the ADC driver for reading. */
ret = file_open(&g_adcfile, "/dev/adc0", O_RDONLY);
if (ret < 0)
{
ierr("ERROR: Failed to open /dev/adc0: %d\n", ret);
return ret;
}
/* Configure the GPIO pins as interrupting inputs. */
for (i = 0; i < AJOY_NGPIOS; i++)
{
/* Configure the PIO as an input */
sam_configpio(g_joypio[i]);
/* Configure PIO interrupts, attach the interrupt handler, but leave
* the interrupt disabled.
*/
sam_pioirq(g_joypio[i]);
irq_attach(g_joyirq[i], ajoy_interrupt, NULL);
sam_pioirqdisable(g_joyirq[i]);
}
/* Register the joystick device as /dev/ajoy0 */
ret = ajoy_register("/dev/ajoy0", &g_ajoylower);
if (ret < 0)
{
ierr("ERROR: ajoy_register failed: %d\n", ret);
file_close(&g_adcfile);
}
return ret;
}
#endif /* CONFIG_INPUT_AJOYSTICK */
@@ -0,0 +1,80 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <syslog.h>
#include <debug.h>
#include <nuttx/board.h>
#include "jupiter-nano.h"
#ifndef CONFIG_BUILD_KERNEL
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifndef CONFIG_BOARD_LATE_INITIALIZE
/* Perform board initialization */
mcinfo("Entry\n");
return sam_bringup();
#else
return OK;
#endif
}
#endif /* CONFIG_BUILD_KERNEL */
@@ -0,0 +1,127 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_at25.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <nuttx/mtd/mtd.h>
#include <nuttx/fs/fs.h>
#include <nuttx/fs/nxffs.h>
#include "sam_spi.h"
#include "jupiter-nano.h"
#ifdef HAVE_AT25
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_at25_automount
*
* Description:
* Initialize and configure the AT25 serial FLASH
*
****************************************************************************/
int sam_at25_automount(int minor)
{
FAR struct spi_dev_s *spi;
FAR struct mtd_dev_s *mtd;
static bool initialized = false;
int ret;
/* Have we already initialized? */
if (!initialized)
{
/* No.. Get the SPI port driver */
spi = sam_spibus_initialize(AT25_PORT);
if (!spi)
{
ferr("ERROR: Failed to initialize SPI port %d\n", AT25_PORT);
return -ENODEV;
}
/* Now bind the SPI interface to the AT25 SPI FLASH driver */
mtd = at25_initialize(spi);
if (!mtd)
{
ferr("ERROR: Failed to bind SPI port %d to AT25 FLASH driver\n");
return -ENODEV;
}
#if defined(CONFIG_SAMA5D3XPLAINED_AT25_FTL)
/* And use the FTL layer to wrap the MTD driver as a block driver */
ret = ftl_initialize(AT25_MINOR, mtd);
if (ret < 0)
{
ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
return ret;
}
#elif defined(CONFIG_SAMA5D3XPLAINED_AT25_NXFFS)
/* Initialize to provide NXFFS on the MTD interface */
ret = nxffs_initialize(mtd);
if (ret < 0)
{
ferr("ERROR: NXFFS initialization failed: %d\n", ret);
return ret;
}
/* Mount the file system at /mnt/at25 */
ret = nx_mount(NULL, "/mnt/at25", "nxffs", 0, NULL);
if (ret < 0)
{
ferr("ERROR: Failed to mount the NXFFS volume: %d\n", ret);
return ret;
}
#endif
/* Now we are initializeed */
initialized = true;
}
return OK;
}
#endif /* HAVE_AT25 */
@@ -0,0 +1,140 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_autoleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* There is a blue status LED on board the Jupiter Nano. It is driven
* driven by pin PA6. The LED is connected to ground so bringing the LED high
* will illuminate the LED.
*
* ------------------------------ ------------------- ---------------------
* SAMA5D2 PIO SIGNAL USAGE
* ------------------------------ ------------------- ---------------------
* PA6 STATUS_LED Blue LED
* ------------------------------ ------------------- ---------------------
*
*
* This LED is not used by the board port unless CONFIG_ARCH_LEDS is
* defined. In that case, the usage by the board port is defined in
* include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
* events as follows. Note that only the blue LED is used.
*
* SYMBOL Meaning Blue LED
* ------------------- ----------------------- ---------
* LED_STARTED NuttX has been started OFF
* LED_HEAPALLOCATE Heap has been allocated OFF
* LED_IRQSENABLED Interrupts enabled OFF
* LED_STACKCREATED Idle stack created ON
* LED_INIRQ In an interrupt N/C
* LED_SIGNAL In a signal handler N/C
* LED_ASSERTION An assertion failed N/C
* LED_PANIC The system has crashed FLASH
*
* Thus if the Blue LED is statically on, NuttX has successfully booted
* and is, apparently, running normally. If LED is flashing at
* approximately 2Hz, then a fatal error has been detected and the system
* has halted.
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "sam_pio.h"
#include "jupiter-nano.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LED PIOs for output */
sam_configpio(PIO_LED_BLUE);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
switch (led)
{
default:
case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED */
break; /* Leave blue LED off */
case 1: /* LED_STACKCREATED */
case 3: /* LED_PANIC */
{
/* blue LED is ON (high illuminates) */
sam_piowrite(PIO_LED_BLUE, true);
}
break;
case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */
break; /* No change */
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
switch (led)
{
default:
case 0: /* LED_STARTED, LED_HEAPALLOCATE, LED_IRQSENABLED, */
case 1: /* LED_STACKCREATED */
break; /* Will not happen */
case 2: /* LED_INIRQ, LED_SIGNAL, LED_ASSERTION */
break; /* No change */
case 3: /* LED_PANIC */
{
/* LED is OFF (high illuminates) */
sam_piowrite(PIO_LED_BLUE, false);
}
break;
}
}
#endif /* CONFIG_ARCH_LEDS */
@@ -0,0 +1,98 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include "jupiter-nano.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_boardinitialize
*
* Description:
* All SAMA5 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void sam_boardinitialize(void)
{
/* Initialize USB if the 1) the HS host or device controller is in the
* configuration and 2) the weak function sam_usbinitialize() has been
* brought into the build.
* Presumeably either CONFIG_USBDEV or CONFIG_USBHOST is also selected.
*/
#if defined(CONFIG_SAMA5_UHPHS) || defined(CONFIG_SAMA5_UDPHS)
if (sam_usbinitialize)
{
sam_usbinitialize();
}
#endif
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_initialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
/* Perform board initialization */
sam_bringup();
}
#endif /* CONFIG_BOARD_LATE_INITIALIZE */
@@ -0,0 +1,468 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_bringup.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/mount.h>
#include <stdlib.h>
#include <syslog.h>
#include <debug.h>
#include <string.h>
#include <nuttx/fs/fs.h>
#include <nuttx/irq.h>
#include <nuttx/kthread.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "jupiter-nano.h"
#ifdef CONFIG_CDCACM
# include <nuttx/usb/cdcacm.h>
#endif
#ifdef CONFIG_NET_CDCECM
# include <nuttx/usb/cdcecm.h>
# include <net/if.h>
#endif
#ifdef CONFIG_USBMONITOR
# include <nuttx/usb/usbmonitor.h>
#endif
#ifdef CONFIG_RNDIS
# include <nuttx/usb/rndis.h>
#endif
#ifdef CONFIG_MMCSD
# include <nuttx/mmcsd.h>
# include "sam_sdmmc.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define NSECTORS(n) \
(((n)+CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE-1) / \
CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE)
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: sam_i2c_register
*
* Description:
* Register one I2C drivers for the I2C tool.
*
****************************************************************************/
#ifdef HAVE_I2CTOOL
static void sam_i2c_register(int bus)
{
FAR struct i2c_master_s *i2c;
int ret;
i2c = sam_i2cbus_initialize(bus);
if (i2c == NULL)
{
_err("ERROR: Failed to get I2C%d interface\n", bus);
}
else
{
ret = i2c_register(i2c, bus);
if (ret < 0)
{
_err("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
sam_i2cbus_uninitialize(i2c);
}
}
}
#endif
/****************************************************************************
* Name: sam_i2ctool
*
* Description:
* Register I2C drivers for the I2C tool.
*
****************************************************************************/
#ifdef HAVE_I2CTOOL
static void sam_i2ctool(void)
{
#ifdef CONFIG_SAMA5_TWI0
sam_i2c_register(0);
#endif
#ifdef CONFIG_SAMA5_TWI1
sam_i2c_register(1);
#endif
#ifdef CONFIG_SAMA5_TWI2
sam_i2c_register(2);
#endif
#ifdef CONFIG_SAMA5_TWI3
sam_i2c_register(3);
#endif
}
#else
# define sam_i2ctool()
#endif
/****************************************************************************
* Name: nsh_sdmmc_initialize
*
* Description:
* Initialize SDMMC drivers
*
****************************************************************************/
#ifdef CONFIG_SAMA5_SDMMC
static int nsh_sdmmc_initialize(void)
{
struct sdio_dev_s *sdmmc0;
struct sdio_dev_s *sdmmc1;
int ret = 0;
/* Get an instance of the SDIO interface */
#ifdef CONFIG_SAMA5_SDMMC0
sdmmc0 = sam_sdmmc_sdio_initialize(SDMMC0_SLOTNO);
if (!sdmmc0)
{
syslog(LOG_ERR, "ERROR: Failed to initialize SD/MMC\n");
}
else
{
/* Bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(SDMMC0_MINOR, sdmmc0);
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to bind SDIO to the MMC/SD driver (slot 0): "
"%d\n",
ret);
}
}
#ifdef CONFIG_SAMA5D27_SDMMC0_MOUNT
/* Mount the volume on SDMMC0 */
ret = nx_mount(CONFIG_SAMA5D27_SDMMC0_MOUNT_BLKDEV,
CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT,
CONFIG_SAMA5D27_SDMMC0_MOUNT_FSTYPE,
0, NULL);
if (ret < 0)
{
_err("ERROR: Failed to mount %s: %d\n",
CONFIG_SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT, ret);
}
#endif
#endif
#ifdef CONFIG_SAMA5_SDMMC1
sdmmc1 = sam_sdmmc_sdio_initialize(SDMMC1_SLOTNO);
if (!sdmmc1)
{
syslog(LOG_ERR, "ERROR: Failed to initialize SD/MMC\n");
}
else
{
/* Bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(SDMMC1_MINOR, sdmmc1);
if (ret != OK)
{
syslog(LOG_ERR,
"ERROR: Failed to bind SDIO to the MMC/SD driver (slot 0): "
"%d\n",
ret);
}
}
#ifdef CONFIG_SAMA5D27_SDMMC1_MOUNT
/* Mount the volume on SDMMC1 */
ret = nx_mount(CONFIG_SAMA5D27_SDMMC1_MOUNT_BLKDEV,
CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT,
CONFIG_SAMA5D27_SDMMC1_MOUNT_FSTYPE,
0, NULL);
if (ret < 0)
{
_err("ERROR: Failed to mount %s: %d\n",
CONFIG_SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT, ret);
}
#endif
#endif
return OK;
}
#else
# define nsh_sdmmc_initialize() (OK)
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_bringup
*
* Description:
* Bring up board features
*
****************************************************************************/
int sam_bringup(void)
{
int ret;
/* Register I2C drivers on behalf of the I2C tool */
sam_i2ctool();
#ifdef HAVE_SDMMC
#ifdef CONFIG_SAMA5_SDMMC
/* Initialize SDMCC-based MMC/SD card support */
nsh_sdmmc_initialize();
#endif
#endif
#ifdef HAVE_HSMCI
#ifdef CONFIG_SAMA5_HSMCI0
/* Initialize the HSMCI0 driver */
ret = sam_hsmci_initialize(HSMCI0_SLOTNO, HSMCI0_MINOR);
if (ret < 0)
{
_err("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
HSMCI0_SLOTNO, HSMCI0_MINOR, ret);
}
#ifdef CONFIG_SAMA5D4EK_HSMCI0_MOUNT
else
{
/* REVISIT:
* A delay seems to be required here or the mount will fail.
*/
/* Mount the volume on HSMCI0 */
ret = nx_mount(CONFIG_SAMA5D4EK_HSMCI0_MOUNT_BLKDEV,
CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT,
CONFIG_SAMA5D4EK_HSMCI0_MOUNT_FSTYPE,
0, NULL);
if (ret < 0)
{
_err("ERROR: Failed to mount %s: %d\n",
CONFIG_SAMA5D4EK_HSMCI0_MOUNT_MOUNTPOINT, ret);
}
}
#endif
#endif
#ifdef CONFIG_SAMA5_HSMCI1
/* Initialize the HSMCI1 driver */
ret = sam_hsmci_initialize(HSMCI1_SLOTNO, HSMCI1_MINOR);
if (ret < 0)
{
_err("ERROR: sam_hsmci_initialize(%d,%d) failed: %d\n",
HSMCI1_SLOTNO, HSMCI1_MINOR, ret);
}
#ifdef CONFIG_SAMA5D4EK_HSMCI1_MOUNT
else
{
/* REVISIT: A delay seems required here or the mount will fail. */
/* Mount the volume on HSMCI1 */
ret = nx_mount(CONFIG_SAMA5D4EK_HSMCI1_MOUNT_BLKDEV,
CONFIG_SAMA5D4EK_HSMCI1_MOUNT_MOUNTPOINT,
CONFIG_SAMA5D4EK_HSMCI1_MOUNT_FSTYPE,
0, NULL);
if (ret < 0)
{
_err("ERROR: Failed to mount %s: %d\n",
CONFIG_SAMA5D4EK_HSMCI1_MOUNT_MOUNTPOINT, ret);
}
}
#endif
#endif
#endif
#ifdef HAVE_AUTOMOUNTER
/* Initialize the auto-mounter */
sam_automount_initialize();
#endif
#ifdef HAVE_ROMFS
/* Create a ROM disk for the /etc filesystem */
ret = romdisk_register(CONFIG_SAMA5D4EK_ROMFS_ROMDISK_MINOR, romfs_img,
NSECTORS(romfs_img_len),
CONFIG_SAMA5D4EK_ROMFS_ROMDISK_SECTSIZE);
if (ret < 0)
{
_err("ERROR: romdisk_register failed: %d\n", -ret);
}
else
{
/* Mount the file system */
ret = nx_mount(CONFIG_SAMA5D4EK_ROMFS_ROMDISK_DEVNAME,
CONFIG_SAMA5D4EK_ROMFS_MOUNT_MOUNTPOINT,
"romfs", MS_RDONLY, NULL);
if (ret < 0)
{
_err("ERROR: nx_mount(%s,%s,romfs) failed: %d\n",
CONFIG_SAMA5D4EK_ROMFS_ROMDISK_DEVNAME,
CONFIG_SAMA5D4EK_ROMFS_MOUNT_MOUNTPOINT, ret);
}
}
#endif
#ifdef HAVE_USBHOST
/* Initialize USB host operation. sam_usbhost_initialize() starts a thread
* will monitor for USB connection and disconnection events.
*/
ret = sam_usbhost_initialize();
if (ret != OK)
{
_err("ERROR: Failed to initialize USB host: %d\n", ret);
}
#endif
#ifdef HAVE_USBMONITOR
/* Start the USB Monitor */
ret = usbmonitor_start();
if (ret != OK)
{
_err("ERROR: Failed to start the USB monitor: %d\n", ret);
}
#endif
#ifdef HAVE_MAXTOUCH
/* Initialize the touchscreen */
ret = sam_tsc_setup(0);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: sam_tsc_setup failed: %d\n", ret);
}
#endif
#ifdef CONFIG_PWM
/* Initialize PWM and register the PWM device. */
ret = sam_pwm_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: sam_pwm_setup() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_ADC
/* Initialize ADC and register the ADC driver. */
ret = sam_adc_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: sam_adc_setup failed: %d\n", ret);
}
#endif
#ifdef HAVE_WM8904
/* Configure WM8904 audio */
ret = sam_wm8904_initialize(0);
if (ret != OK)
{
_err("ERROR: Failed to initialize WM8904 audio: %d\n", ret);
}
#endif
#ifdef HAVE_AUDIO_NULL
/* Configure the NULL audio device */
ret = sam_audio_null_initialize(0);
if (ret != OK)
{
_err("ERROR: Failed to initialize the NULL audio device: %d\n", ret);
}
#endif
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, SAMA5_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
_err("ERROR: Failed to mount procfs at %s: %d\n",
SAMA5_PROCFS_MOUNTPOINT, ret);
}
#endif
#if defined(CONFIG_RNDIS)
/* Set up a MAC address for the RNDIS device. */
uint8_t mac[6];
mac[0] = 0xa0; /* TODO */
mac[1] = (CONFIG_NETINIT_MACADDR_2 >> (8 * 0)) & 0xff;
mac[2] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 3)) & 0xff;
mac[3] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 2)) & 0xff;
mac[4] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 1)) & 0xff;
mac[5] = (CONFIG_NETINIT_MACADDR_1 >> (8 * 0)) & 0xff;
usbdev_rndis_initialize(mac);
#endif
#ifdef CONFIG_NET_CDCECM
ret = cdcecm_initialize(0, NULL);
if (ret < 0)
{
_err("ERROR: cdcecm_initialize() failed: %d\n", ret);
}
#endif
/* If we got here then perhaps not all initialization was successful, but
* at least enough succeeded to bring-up NSH with perhaps reduced
* capabilities.
*/
UNUSED(ret);
return OK;
}
@@ -0,0 +1,146 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_buttons.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* A single button, PB_USER (PB6), is available on the Jupiter Nano
*
* ------------------------------ ------------------- ----------------------
* SAMA5D2 PIO SIGNAL USAGE
* ------------------------------ ------------------- ----------------------
* PB6 USER_PB_PB6 PB_USER push button
* ------------------------------ ------------------- ----------------------
*
* Closing PB_USER will bring PB6 to ground so 1) PB6 should have a weak
* pull-up, and 2) when PB_USER is pressed, a low value will be senses.
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "sam_pio.h"
#include "jupiter-nano.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
uint32_t board_button_initialize(void)
{
sam_configpio(PIO_BTN_USER);
return NUM_BUTTONS;
}
/****************************************************************************
* Name: board_buttons
*
* Description:
* After board_button_initialize() has been called, board_buttons() may be
* called to collect the state of all buttons. board_buttons() returns an
* 32-bit bit set with each bit associated with a button. See the BUTTON*
* definitions above for the meaning of each bit in the returned value.
*
****************************************************************************/
uint32_t board_buttons(void)
{
return sam_pioread(PIO_BTN_USER) ? 0 : BUTTON_USER_BIT;
}
/****************************************************************************
* Name: board_button_irq
*
* Description:
* This function may be called to register an interrupt handler that will
* be called when a button is depressed or released. The ID value is one
* of the BUTTON* definitions provided above.
*
* Configuration Notes:
* Configuration CONFIG_SAMA5_PIO_IRQ must be selected to enable the
* overall PIO IRQ feature and CONFIG_SAMA5_PIOB_IRQ must be enabled to
* select PIOs to support interrupts on PIOE.
*
****************************************************************************/
#if defined(CONFIG_SAMA5_PIOB_IRQ) && defined(CONFIG_ARCH_IRQBUTTONS)
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
int ret = -EINVAL;
if (id == BUTTON_USER)
{
irqstate_t flags;
/* Disable interrupts until we are done. This guarantees that the
* following operations are atomic.
*/
flags = enter_critical_section();
/* Are we attaching or detaching? */
if (irqhandler != NULL)
{
/* Configure the interrupt */
sam_pioirq(PIO_BTN_USER);
irq_attach(IRQ_BTN_USER, irqhandler, arg);
sam_pioirqenable(IRQ_BTN_USER);
}
else
{
/* Disable and detach the interrupt */
sam_pioirqdisable(IRQ_BTN_USER);
irq_detach(IRQ_BTN_USER);
}
leave_critical_section(flags);
ret = OK;
}
return ret;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */
@@ -0,0 +1,99 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_can.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/can/can.h>
#include <arch/board/board.h>
#include "chip.h"
#include "sam_can.h"
#include "jupiter-nano.h"
#ifdef CONFIG_CAN
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#if defined(CONFIG_SAMA5_CAN0) && defined(CONFIG_SAMA5_CAN1)
# warning "Both CAN0 and CAN1 are enabled. Assuming only CAN0."
# undef CONFIG_SAMA5_CAN1
#endif
#ifdef CONFIG_SAMA5_CAN0
# define CAN_PORT 0
#else
# define CAN_PORT 1
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_can_setup
*
* Description:
* Initialize CAN and register the CAN device
*
****************************************************************************/
int sam_can_setup(void)
{
#if defined(CONFIG_SAMA5_CAN0) || defined(CONFIG_SAMA5_CAN1)
struct can_dev_s *can;
int ret;
/* Call stm32_caninitialize() to get an instance of the CAN interface */
can = sam_caninitialize(CAN_PORT);
if (can == NULL)
{
canerr("ERROR: Failed to get CAN interface\n");
return -ENODEV;
}
/* Register the CAN driver at "/dev/can0" */
ret = can_register("/dev/can0", can);
if (ret < 0)
{
canerr("ERROR: can_register failed: %d\n", ret);
return ret;
}
return OK;
#else
return -ENODEV;
#endif
}
#endif /* CONFIG_CAN */
@@ -0,0 +1,328 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_ethernet.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/* Force verbose debug on in this file only to support unit-level testing. */
#ifdef CONFIG_NETDEV_PHY_DEBUG
# undef CONFIG_DEBUG_INFO
# define CONFIG_DEBUG_INFO 1
# undef CONFIG_DEBUG_NET
# define CONFIG_DEBUG_NET 1
#endif
#include <string.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "sam_pio.h"
#include "sam_ethernet.h"
#include "jupiter-nano.h"
#ifdef HAVE_NETWORK
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_SAMA5_EMACA
# undef CONFIG_SAMA5_EMAC_ISETH0
#endif
#ifdef CONFIG_SAMA5_EMAC_ISETH0
# define SAMA5_EMAC_DEVNAME "eth0"
# define SAMA5_GMAC_DEVNAME "eth1"
#else
# define SAMA5_GMAC_DEVNAME "eth0"
# define SAMA5_EMAC_DEVNAME "eth1"
#endif
/* Debug ********************************************************************/
/* Extra, in-depth debug output that is only available if
* CONFIG_NETDEV_PHY_DEBUG us defined.
*/
#ifdef CONFIG_NETDEV_PHY_DEBUG
# define phyerr _err
# define phywarn _warn
# define phyinfo _info
#else
# define phyerr(x...)
# define phywarn(x...)
# define phyinfo(x...)
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: sam_emac_phy_enable and sam_gmac_enable
****************************************************************************/
#ifdef CONFIG_SAMA5_PIOE_IRQ
#ifdef CONFIG_SAMA5_EMACA
static void sam_emac_phy_enable(bool enable)
{
phyinfo("IRQ%d: enable=%d\n", IRQ_INT_ETH1, enable);
if (enable)
{
sam_pioirqenable(IRQ_INT_ETH1);
}
else
{
sam_pioirqdisable(IRQ_INT_ETH1);
}
}
#endif
#ifdef CONFIG_SAMA5_GMAC
static void sam_gmac_phy_enable(bool enable)
{
phyinfo("IRQ%d: enable=%d\n", IRQ_INT_ETH0, enable);
if (enable)
{
sam_pioirqenable(IRQ_INT_ETH0);
}
else
{
sam_pioirqdisable(IRQ_INT_ETH0);
}
}
#endif
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_netinitialize
*
* Description:
* Configure board resources to support networking.
*
****************************************************************************/
void weak_function sam_netinitialize(void)
{
#ifdef CONFIG_SAMA5_EMACA
/* Ethernet 10/100 (EMAC A) Port
*
* The main board contains a MICREL PHY device (KSZ8051) operating at
* 10/100 Mbps. The board supports MII and RMII interface modes.
*
* The two independent PHY devices embedded on CM and MB boards are
* connected to independent RJ-45 connectors with built-in magnetic
* and status LEDs.
*
* At the De-Assertion of Reset:
* PHY ADD[2:0]:001
* CONFIG[2:0]:001,Mode:RMII
* Duplex Mode:Half Duplex
* Isolate Mode:Disable
* Speed Mode:100Mbps
* Nway Auto-Negotiation:Enable
*
* The KSZ8051 PHY interrupt is available on PE30 INT_ETH1
*/
phyinfo("Configuring %08x\n", PIO_INT_ETH1);
sam_configpio(PIO_INT_ETH1);
#endif
#ifdef CONFIG_SAMA5_GMAC
/* Tri-Speed Ethernet PHY
*
* The SAMA5D3 series-CM board is equipped with a MICREL PHY devices
* (MICREL KSZ9021/31) operating at 10/100/1000 Mbps.
* The board supports RGMII interface mode.
* The Ethernet interface consists of 4 pairs of low voltage differential
* pair signals designated from GRX and GTx plus control signals for
* link activity indicators. These signals can be used to connect to a
* 10/100/1000 BaseT RJ45 connector integrated on the main board.
*
* The KSZ9021/31 interrupt is available on PB35 INT_GETH0
*/
phyinfo("Configuring %08x\n", PIO_INT_ETH0);
sam_configpio(PIO_INT_ETH0);
#endif
}
/****************************************************************************
* Name: arch_phy_irq
*
* Description:
* This function may be called to register an interrupt handler that will
* be called when a PHY interrupt occurs. This function both attaches
* the interrupt handler and enables the interrupt if 'handler' is non-
* NULL. If handler is NULL, then the interrupt is detached and disabled
* instead.
*
* The PHY interrupt is always disabled upon return. The caller must
* call back through the enable function point to control the state of
* the interrupt.
*
* This interrupt may or may not be available on a given platform depending
* on how the network hardware architecture is implemented. In a typical
* case, the PHY interrupt is provided to board-level logic as a GPIO
* interrupt (in which case this is a board-specific interface and really
* should be called board_phy_irq()); In other cases, the PHY interrupt
* may be cause by the chip's MAC logic (in which case arch_phy_irq()) is
* an appropriate name. Other other boards, there may be no PHY interrupts
* available at all. If client attachable PHY interrupts are available
* from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should
* be defined to indicate that fact.
*
* Typical usage:
* a. OS service logic (not application logic*) attaches to the PHY
* PHY interrupt and enables the PHY interrupt.
* b. When the PHY interrupt occurs: (1) the interrupt should be
* disabled and () work should be scheduled on the worker thread (or
* perhaps a dedicated application thread).
* c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG,
* and SIOCSMIIREG ioctl calls** to communicate with the PHY,
* determine what network event took place (Link Up/Down?), and
* take the appropriate actions.
* d. It should then interact the PHY to clear any pending
* interrupts, then re-enable the PHY interrupt.
*
* * This is an OS internal interface and should not be used from
* application space. Rather applications should use the SIOCMIISIG
* ioctl to receive a signal when a PHY event occurs.
* ** This interrupt is really of no use if the Ethernet MAC driver
* does not support these ioctl calls.
*
* Input Parameters:
* intf - Identifies the network interface. For example "eth0". Only
* useful on platforms that support multiple Ethernet interfaces
* and, hence, multiple PHYs and PHY interrupts.
* handler - The client interrupt handler to be invoked when the PHY
* asserts an interrupt. Must reside in OS space, but can
* signal tasks in user space. A value of NULL can be passed
* in order to detach and disable the PHY interrupt.
* arg - The argument that will accompany the interrupt
* enable - A function pointer that be unused to enable or disable the
* PHY interrupt.
*
* Returned Value:
* Zero (OK) returned on success; a negated errno value is returned on
* failure.
*
****************************************************************************/
#ifdef CONFIG_SAMA5_PIOE_IRQ
int arch_phy_irq(FAR const char *intf, xcpt_t handler, void *arg,
phy_enable_t *enable)
{
irqstate_t flags;
pio_pinset_t pinset;
phy_enable_t enabler;
int irq;
DEBUGASSERT(intf);
ninfo("%s: handler=%p\n", intf, handler);
#ifdef CONFIG_SAMA5_EMACA
phyinfo("EMAC: devname=%s\n", SAMA5_EMAC_DEVNAME);
#endif
#ifdef CONFIG_SAMA5_GMAC
phyinfo("GMAC: devname=%s\n", SAMA5_GMAC_DEVNAME);
#endif
#ifdef CONFIG_SAMA5_EMACA
if (strcmp(intf, SAMA5_EMAC_DEVNAME) == 0)
{
phyinfo("Select EMAC\n");
pinset = PIO_INT_ETH1;
irq = IRQ_INT_ETH1;
enabler = sam_emac_phy_enable;
}
else
#endif
#ifdef CONFIG_SAMA5_GMAC
if (strcmp(intf, SAMA5_GMAC_DEVNAME) == 0)
{
phyinfo("Select GMAC\n");
pinset = PIO_INT_ETH0;
irq = IRQ_INT_ETH0;
enabler = sam_gmac_phy_enable;
}
else
#endif
{
nerr("ERROR: Unsupported interface: %s\n", intf);
return NULL;
}
/* Disable interrupts until we are done. This guarantees that the
* following operations are atomic.
*/
flags = enter_critical_section();
/* Configure the interrupt */
if (handler)
{
phyinfo("Configure pin: %08x\n", pinset);
sam_pioirq(pinset);
phyinfo("Attach IRQ%d\n", irq);
irq_attach(irq, handler, arg);
}
else
{
phyinfo("Detach IRQ%d\n", irq);
irq_detach(irq);
enabler = NULL;
}
/* Return with the interrupt disabled in either case */
sam_pioirqdisable(irq);
/* Return the enabling function pointer */
if (enable)
{
*enable = enabler;
}
/* Return the old handler (so that it can be restored) */
leave_critical_section(flags);
return OK;
}
#endif /* CONFIG_SAMA5_PIOE_IRQ */
#endif /* HAVE_NETWORK */
@@ -0,0 +1,111 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_i2schar.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/audio/i2s.h>
#include "sam_ssc.h"
#include "jupiter-nano.h"
#if defined(CONFIG_AUDIO_I2SCHAR) && \
(defined(CONFIG_SAMA5_SSC0) || defined(CONFIG_SAMA5_SSC1))
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_SAMA5D3XPLAINED_SSC_PORT
# if defined(CONFIG_SAMA5_SSC0)
# define CONFIG_SAMA5D3XPLAINED_SSC_PORT 0
# elif defined(CONFIG_SAMA5_SSC1)
# define CONFIG_SAMA5D3XPLAINED_SSC_PORT 1
# endif
#endif
#ifndef CONFIG_SAMA5D3XPLAINED_I2SCHAR_MINOR
# define CONFIG_SAMA5D3XPLAINED_I2SCHAR_MINOR 0
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: i2schar_devinit
*
* Description:
* All architectures must provide the following interface in order to work
* with apps/examples/i2schar.
*
****************************************************************************/
int i2schar_devinit(void)
{
static bool initialized = false;
struct i2s_dev_s *i2s;
int ret;
/* Have we already initialized? */
if (!initialized)
{
/* Call sam_ssc_initialize() to get an instance of the SSC/I2S
* interface
*/
i2s = sam_ssc_initialize(CONFIG_SAMA5D3XPLAINED_SSC_PORT);
if (!i2s)
{
_err("ERROR: Failed to get the SAMA5 SSC/I2S driver for SSC%d\n",
CONFIG_SAMA5D3XPLAINED_SSC_PORT);
return -ENODEV;
}
/* Register the I2S character driver at "/dev/i2schar0" */
ret = i2schar_register(i2s, CONFIG_SAMA5D3XPLAINED_I2SCHAR_MINOR);
if (ret < 0)
{
aerr("ERROR: i2schar_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
}
#endif /* CONFIG_AUDIO_I2SCHAR && (CONFIG_SAMA5_SSC0 || CONFIG_SAMA5_SSC1) */
@@ -0,0 +1,211 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_nandflash.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdint.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/mtd/mtd.h>
#include <nuttx/fs/fs.h>
#include <nuttx/fs/nxffs.h>
#include "sam_periphclks.h"
#include "sam_pio.h"
#include "sam_nand.h"
#include "hardware/sam_hsmc.h"
#include "hardware/sam_pinmap.h"
#include "jupiter-nano.h"
#ifdef CONFIG_SAMA5_EBICS3_NAND
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_nandflash_config
*
* Description:
* If CONFIG_SAMA5_EBICS3_NAND is defined, then NAND FLASH support is
* enabled. This function provides the board-specific implementation of
* the logic to reprogram the SMC to support NAND FLASH on the specified
* CS.
*
* Input Parameters:
* cs - Chip select number (in the event that multiple NAND devices
* are connected on-board).
*
* Returned Value:
* OK if the HSMC was successfully configured for this CS. A negated
* errno value is returned on a failure. This would fail with -ENODEV,
* for example, if the board does not support NAND FLASH on the requested
* CS.
*
****************************************************************************/
int board_nandflash_config(int cs)
{
uint32_t regval;
/* The Embest and Ronetix CM boards and one Hynix NAND HY27UF(08/16)2G2B
* Series NAND (MT29F2G08ABAEAWP).
* This part has a capacity of 256Mx8bit () with spare 8Mx8 bit capacity.
* The device contains 2048 blocks, composed by 64 x 2112 byte pages.
* The effective size is approximately 256MiB.
*
* NAND is available on CS3.
*/
if (cs == HSMC_CS3)
{
/* Make sure that the SMC peripheral is enabled. */
sam_hsmc_enableclk();
/* Configure the SMC */
regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(1) |
HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(1);
putreg32(regval, SAM_HSMC_SETUP(HSMC_CS3));
regval = HSMC_PULSE_NWE_PULSE(5) | HSMC_PULSE_NCS_WRPULSE(7) |
HSMC_PULSE_NRD_PULSE(5) | HSMC_PULSE_NCS_RDPULSE(7);
putreg32(regval, SAM_HSMC_PULSE(HSMC_CS3));
regval = HSMC_CYCLE_NWE_CYCLE(8) | HSMC_CYCLE_NRD_CYCLE(9);
putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS3));
regval = HSMC_TIMINGS_TCLR(3) | HSMC_TIMINGS_TADL(10) |
HSMC_TIMINGS_TAR(3) | HSMC_TIMINGS_TRR(4) |
HSMC_TIMINGS_TWB(5) | HSMC_TIMINGS_RBNSEL(3) |
HSMC_TIMINGS_NFSEL;
putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS3));
regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE |
HSMC_MODE_BIT_8 | HSMC_MODE_TDFCYCLES(1);
putreg32(regval, SAM_HSMC_MODE(HSMC_CS3));
/* Configure NAND PIO pins
*
* NAND Interface:
*
* NCS3/NANDCE - Dedicated pin; no configuration needed
* NANDCLE - PE21
* NANDALE - PE22
* NRD/NANDOE - Dedicated pin; no configuration needed
* NWE/NANDWE - Dedicated pin; no configuration needed
* NANDRDY - Dedicated pin; no configuration needed
* M_EBI_D0-7 - Dedicated pins; no configuration needed
*/
sam_configpio(PIO_HSMC_NANDALE);
sam_configpio(PIO_HSMC_NANDCLE);
return OK;
}
return -ENODEV;
}
/****************************************************************************
* Name: sam_nand_automount
*
* Description:
* Initialize and configure the NAND on CS3
*
****************************************************************************/
#ifdef HAVE_NAND
int sam_nand_automount(int minor)
{
FAR struct mtd_dev_s *mtd;
static bool initialized = false;
int ret;
/* Have we already initialized? */
if (!initialized)
{
/* Create and initialize an NAND MATD device */
mtd = sam_nand_initialize(HSMC_CS3);
if (!mtd)
{
ferr("ERROR: Failed to create the NAND driver on CS%d\n",
HSMC_CS3);
return -ENODEV;
}
#if defined(CONFIG_SAMA5D3XPLAINED_NAND_FTL)
/* Use the FTL layer to wrap the MTD driver as a block driver */
ret = ftl_initialize(NAND_MINOR, mtd);
if (ret < 0)
{
ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret);
return ret;
}
#elif defined(CONFIG_SAMA5D3XPLAINED_NAND_NXFFS)
/* Initialize to provide NXFFS on the MTD interface */
ret = nxffs_initialize(mtd);
if (ret < 0)
{
ferr("ERROR: NXFFS initialization failed: %d\n", ret);
return ret;
}
/* Mount the file system at /mnt/nand */
ret = nx_mount(NULL, "/mnt/nand", "nxffs", 0, NULL);
if (ret < 0)
{
ferr("ERROR: Failed to mount the NXFFS volume: %d\n", ret);
return ret;
}
#endif
/* Now we are initialized */
initialized = true;
}
return OK;
}
#endif
#endif /* CONFIG_SAMA5_EBICS3_NAND */
@@ -0,0 +1,98 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_ostest.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <string.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "arm_internal.h"
#include "jupiter-nano.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#undef HAVE_FPU
#if defined(CONFIG_ARCH_FPU) && !defined(CONFIG_TESTING_OSTEST_FPUTESTDISABLE) && \
defined(CONFIG_TESTING_OSTEST_FPUSIZE) && defined(CONFIG_SCHED_WAITPID)
# define HAVE_FPU 1
#endif
#ifdef HAVE_FPU
#if CONFIG_TESTING_OSTEST_FPUSIZE != (4*FPU_CONTEXT_REGS)
# error "CONFIG_TESTING_OSTEST_FPUSIZE has the wrong size"
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static uint32_t g_saveregs[XCPTCONTEXT_REGS];
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/* Given an array of size CONFIG_TESTING_OSTEST_FPUSIZE, this function will
* return the current FPU registers.
*/
void arch_getfpu(FAR uint32_t *fpusave)
{
irqstate_t flags;
/* Take a snapshot of the thread context right now */
flags = enter_critical_section();
arm_saveusercontext(g_saveregs);
/* Return only the floating register values */
memcpy(fpusave, &g_saveregs[REG_S0], (4*FPU_CONTEXT_REGS));
leave_critical_section(flags);
}
/* Given two arrays of size CONFIG_TESTING_OSTEST_FPUSIZE this function
* will compare them and return true if they are identical.
*/
bool arch_cmpfpu(FAR const uint32_t *fpusave1, FAR const uint32_t *fpusave2)
{
return memcmp(fpusave1, fpusave2, (4*FPU_CONTEXT_REGS)) == 0;
}
#endif /* HAVE_FPU */
+147
View File
@@ -0,0 +1,147 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_pwm.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/timers/pwm.h>
#include <arch/board/board.h>
#include "sam_pwm.h"
#include "jupiter-nano.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* PWM.
* There are no dedicated PWM output pins available to the user for PWM
* testing.
* Care must be taken because all PWM output pins conflict with some other
* usage of the pin by other devices:
*
* -----+---+---+----+--------------------
* PWM PIN PER PIO CONFLICTS
* -----+---+---+----+--------------------
* PWM0 FI B PC28 SPI1, ISI
* H B PB0 GMAC
* B PA20 LCDC, ISI
* L B PB1 GMAC
* B PA21 LCDC, ISI
* -----+---+---+----+--------------------
* PWM1 FI B PC31 HDMI
* H B PB4 GMAC
* B PA22 LCDC, ISI
* L B PB5 GMAC
* B PE31 ISI, HDMI
* B PA23 LCDC, ISI
* -----+---+---+----+--------------------
* PWM2 FI B PC29 UART0, ISI, HDMI
* H C PD5 HSMCI0
* B PB8 GMAC
* L C PD6 HSMCI0
* B PB9 GMAC
* -----+---+---+----+--------------------
* PWM3 FI C PD16 SPI0, Audio
* H C PD7 HSMCI0
* B PB12 GMAC
* L C PD8 HSMCI0
* B PB13 GMAC
* -----+---+---+----+--------------------
*/
#ifndef CONFIG_SAMA5D3XPLAINED_CHANNEL
# if defined(CONFIG_SAMA5_PWM_CHAN0)
# warning Assuming PWM channel 0
# define CONFIG_SAMA5D3XPLAINED_CHANNEL 0
# elif defined(CONFIG_SAMA5_PWM_CHAN1)
# warning Assuming PWM channel 1
# define CONFIG_SAMA5D3XPLAINED_CHANNEL 1
# elif defined(CONFIG_SAMA5_PWM_CHAN2)
# warning Assuming PWM channel 2
# define CONFIG_SAMA5D3XPLAINED_CHANNEL 2
# elif defined(CONFIG_SAMA5_PWM_CHAN3)
# warning Assuming PWM channel 3
# define CONFIG_SAMA5D3XPLAINED_CHANNEL 3
# endif
#endif
#if defined(CONFIG_PWM) && defined(CONFIG_SAMA5_PWM)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_pwm_setup
*
* Description:
* Initialize PWM and register the PWM device.
*
****************************************************************************/
int sam_pwm_setup(void)
{
static bool initialized = false;
struct pwm_lowerhalf_s *pwm;
int ret;
/* Have we already initialized? */
if (!initialized)
{
/* Call sam_pwminitialize() to get an instance of the PWM interface */
pwm = sam_pwminitialize(CONFIG_SAMA5D3XPLAINED_CHANNEL);
if (!pwm)
{
_err("ERROR: Failed to get the SAMA5 PWM lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm0" */
ret = pwm_register("/dev/pwm0", pwm);
if (ret < 0)
{
aerr("ERROR: pwm_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
}
#endif /* CONFIG_PWM */
@@ -0,0 +1,62 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_reset.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#ifdef CONFIG_BOARDCTL_RESET
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_reset
*
* Description:
* Reset board. Support for this function is required by board-level
* logic if CONFIG_BOARDCTL_RESET is selected.
*
* Input Parameters:
* status - Status information provided with the reset event. This
* meaning of this status information is board-specific. If not
* used by a board, the value zero may be provided in calls to
* board_reset().
*
* Returned Value:
* If this function returns, then it was not possible to power-off the
* board due to some constraints. The return value int this case is a
* board-specific reason for the failure to shutdown.
*
****************************************************************************/
int board_reset(int status)
{
up_systemreset();
return 0;
}
#endif /* CONFIG_BOARDCTL_RESET */
@@ -0,0 +1,335 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_sdmmc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The Jupiter Nano provides a built-in 4GB eMMC (SDMMC0), and one SD
* full-size memory card slot at J19 (SDMMC1).
*
* SDMMC0: There is a Micron 4Gx8 eMMC managed NAND Flash (MTFC4GLDEA-0M WT)
* connected to SDMMC0.
*
* PA1 SDMMC0_CMD
* PA2 SDMMC0_DAT0
* PA3 SDMMC0_DAT1
* PA4 SDMMC0_DAT2
* PA5 SDMMC0_DAT3
* PA6 SDMMC0_DAT4
* PA7 SDMMC0_DAT5
* PA8 SDMMC0_DAT6
* PA9 SDMMC0_DAT7
* PA0 SDMMC0_CK
* PA10 SDMMC0_RSTN
*
* SDMMC1: The full size SD card slot connects via SDMMC1. The card detect
* discrete is available on PA30 (pulled high). The write protect discrete
* is tied to ground and not available to software. The slot only supports
* 4-bit wide transfer mode.
*
* PA30 SDMMC1_CD
* PA18 SDMMC1_DAT0
* PA19 SDMMC1_DAT1
* PA20 SDMMC1_DAT2
* PA21 SDMMC1_DAT3
* PD22 SDMMC1_CK
* PA28 SDMMC1_CDA
*
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "chip.h"
#include "arm_internal.h"
#include "sam_pio.h"
#include "sam_sdmmc.h"
#include "jupiter-nano.h"
#ifdef HAVE_SDMMC
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure holds static information unique to one SDMMC peripheral */
struct sam_sdmmc_state_s
{
struct sdio_dev_s *sdmmc; /* R/W device handle */
pio_pinset_t pincfg; /* Card detect PIO pin configuration */
uint8_t irq; /* Interrupt number (same as pid) */
uint8_t slotno; /* Slot number */
bool cd; /* TRUE: card is inserted */
xcpt_t handler; /* Interrupt handler */
};
/****************************************************************************
* Private Data
****************************************************************************/
/* SDMMC device state */
#ifdef CONFIG_SAMA5_SDMMC0
static int sam_sdmmc0_cardetect(int irq, void *regs, FAR void *arg);
static struct sam_sdmmc_state_s g_sdmmc0 =
{
.pincfg = PIO_SDMMC0_CD,
.irq = -1,
.slotno = 0,
.handler = sam_sdmmc0_cardetect,
};
#endif
#ifdef CONFIG_SAMA5_SDMMC1
static int sam_sdmmc1_cardetect(int irq, void *regs, FAR void *arg);
static struct sam_sdmmc_state_s g_sdmmc1 =
{
.pincfg = PIO_SDMMC1_CD,
.irq = IRQ_SDMMC1_CD,
.slotno = 1,
.handler = sam_sdmmc1_cardetect,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: sam_cardinserted_internal
*
* Description:
* Check if a card is inserted into the selected SDMMC slot
*
****************************************************************************/
bool sam_cardinserted_internal(struct sam_sdmmc_state_s *state)
{
bool inserted;
/* Get the state of the PIO pin */
inserted = sam_pioread(state->pincfg);
finfo("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
return !inserted;
}
/****************************************************************************
* Name: sam_sdmmc_cardetect, sam_sdmmc0_cardetect, and sam_sdmmc1_cardetect
*
* Description:
* Card detect interrupt handlers
*
****************************************************************************/
static int sam_sdmmc_cardetect(struct sam_sdmmc_state_s *state)
{
/* Get the current card insertion state */
bool cd = sam_cardinserted_internal(state);
/* Has the card detect state changed? */
if (cd != state->cd)
{
/* Yes... remember that new state and inform the SDMMC driver */
state->cd = cd;
/* Report the new state to the SDIO driver */
sdio_mediachange(state->sdmmc, cd);
}
return OK;
}
#ifdef CONFIG_SAMA5_SDMMC0
static int sam_sdmmc0_cardetect(int irq, void *regs, FAR void *arg)
{
return sam_sdmmc_cardetect(&g_sdmmc0);
}
#endif
#ifdef CONFIG_SAMA5_SDMMC1
static int sam_sdmmc1_cardetect(int irq, void *regs, FAR void *arg)
{
return sam_sdmmc_cardetect(&g_sdmmc1);
}
#endif
/****************************************************************************
* Name: sam_sdmmc_state
*
* Description:
* Initialize SDMMC PIOs.
*
****************************************************************************/
static struct sam_sdmmc_state_s *sam_sdmmc_state(int slotno)
{
struct sam_sdmmc_state_s *state = NULL;
#ifdef CONFIG_SAMA5_SDMMC0
#ifdef CONFIG_SAMA5_SDMMC1
if (slotno == 0)
#endif
{
state = &g_sdmmc0;
}
#ifdef CONFIG_SAMA5_SDMMC1
else
#endif
#endif
#ifdef CONFIG_SAMA5_SDMMC1
{
state = &g_sdmmc1;
}
#endif
return state;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_sdmmc_initialize
*
* Description:
* Perform architecture specific initialization
*
****************************************************************************/
int sam_sdmmc_initialize(int slotno, int minor)
{
struct sam_sdmmc_state_s *state;
int ret;
mcinfo("Entry.\n");
mcinfo("slotno: %d\n", slotno);
/* Get the static SDMMC description */
state = sam_sdmmc_state(slotno);
if (!state)
{
ferr("ERROR: No state for slotno %d\n", slotno);
return -EINVAL;
}
/* Initialize card-detect and write-protect PIOs */
sam_configpio(state->pincfg);
/* Mount the SDIO-based MMC/SD block driver */
/* First, get an instance of the SDIO interface */
state->sdmmc = sam_sdmmc_sdio_initialize(slotno);
if (!state->sdmmc)
{
ferr("ERROR: Failed to initialize SDIO slot %d\n", slotno);
return -ENODEV;
}
/* Now bind the SDIO interface to the MMC/SD driver */
ret = mmcsd_slotinitialize(minor, state->sdmmc);
if (ret != OK)
{
ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
return ret;
}
/* Configure card detect interrupts */
sam_pioirq(state->pincfg);
irq_attach(state->irq, state->handler, NULL);
/* Then inform the SDMMC driver if there is or is not a card in the slot. */
state->cd = sam_cardinserted_internal(state);
sdio_mediachange(state->sdmmc, state->cd);
/* Enable card detect interrupts */
sam_pioirqenable(state->irq);
return OK;
}
/****************************************************************************
* Name: sam_cardinserted
*
* Description:
* Check if a card is inserted into the selected SDMMC slot
*
****************************************************************************/
bool sam_cardinserted(int slotno)
{
struct sam_sdmmc_state_s *state;
/* Get the SDMMC description */
state = sam_sdmmc_state(slotno);
if (!state)
{
ferr("ERROR: No state for slotno %d\n", slotno);
return false;
}
/* Return the state of the PIO pin */
return sam_cardinserted_internal(state);
}
/****************************************************************************
* Name: sam_writeprotected
*
* Description:
* Check if a card is inserted into the selected SDMMC slot
*
****************************************************************************/
bool sam_writeprotected(int slotno)
{
/* There are no write protect pins */
return false;
}
#endif /* HAVE_SDMMC */
File diff suppressed because it is too large Load Diff
+178
View File
@@ -0,0 +1,178 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_spi.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "chip.h"
#include "sam_pio.h"
#include "sam_spi.h"
#include "jupiter-nano.h"
#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: sam_spidev_initialize
*
* Description:
* Called to configure SPI chip select PIO pins for the SAMA5D3-Xplained
* board.
*
****************************************************************************/
void weak_function sam_spidev_initialize(void)
{
#ifdef CONFIG_SAMA5_SPI0
#ifdef CONFIG_MTD_AT25
/* The AT25 serial FLASH connects using NPCS0 */
sam_configpio(PIO_AT25_NPCS0);
#endif
#endif
#ifdef CONFIG_SAMA5_SPI1
#endif
}
/****************************************************************************
* Name: sam_spi[0|1]select, sam_spi[0|1]status, and sam_spi[0|1]cmddata
*
* Description:
* These external functions must be provided by board-specific logic.
* They include:
*
* o sam_spi[0|1]select is a functions tomanage the board-specific chip
* selects
* o sam_spi[0|1]status and sam_spi[0|1]cmddata:
* Implementations of the status and cmddata methods of the SPI interface
* defined by struct spi_ops_(see include/nuttx/spi/spi.h).
* All other methods including sam_spibus_initialize()) are provided by
* common SAM3/4 logic.
*
* To use this common SPI logic on your board:
*
* 1. Provide logic in sam_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide sam_spi[0|1]select() and sam_spi[0|1]status() functions in
* your board-specific logic.
* These functions will perform chip selection and status operations
* using PIOs in the way your board is configured.
* 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
* sam_spi[0|1]cmddata() functions in your board-specific logic. This
* function will perform cmd/data selection operations using PIOs in
* the way your board is configured.
* 3. Add a call to sam_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by sam_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
/****************************************************************************
* Name: sam_spi[0|1]select
*
* Description:
* PIO chip select pins may be programmed by the board specific logic in
* one of two different ways. First, the pins may be programmed as SPI
* peripherals. In that case, the pins are completely controlled by the
* SPI driver. This method still needs to be provided, but it may be only
* a stub.
*
* An alternative way to program the PIO chip select pins is as a normal
* PIO output. In that case, the automatic control of the CS pins is
* bypassed and this function must provide control of the chip select.
* NOTE: In this case, the PIO output pin does *not* have to be the
* same as the NPCS pin normal associated with the chip select number.
*
* Input Parameters:
* devid - Identifies the (logical) device
* selected - TRUE:Select the device, FALSE:De-select the device
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SAMA5_SPI0
void sam_spi0select(uint32_t devid, bool selected)
{
#ifdef CONFIG_MTD_AT25
/* The AT25 serial FLASH connects using NPCS0 */
if (devid == SPIDEV_FLASH(0))
{
sam_piowrite(PIO_AT25_NPCS0, !selected);
}
#endif
}
#endif
#ifdef CONFIG_SAMA5_SPI1
void sam_spi1select(uint32_t devid, bool selected)
{
}
#endif
/****************************************************************************
* Name: sam_spi[0|1]status
*
* Description:
* Return status information associated with the SPI device.
*
* Input Parameters:
* devid - Identifies the (logical) device
*
* Returned Value:
* Bit-encoded SPI status (see include/nuttx/spi/spi.h.
*
****************************************************************************/
#ifdef CONFIG_SAMA5_SPI0
uint8_t sam_spi0status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_SAMA5_SPI0
uint8_t sam_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#endif /* CONFIG_SAMA5_SPI0 || CONFIG_SAMA5_SPI1 */
File diff suppressed because it is too large Load Diff
@@ -0,0 +1,91 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_usbmsc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <nuttx/board.h>
#include "jupiter-nano.h"
#ifdef CONFIG_USBMSC
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef HAVE_AT25
# error AT25 Serial FLASH not supported
#endif
#ifndef CONFIG_SAMA5D3XPLAINED_AT25_FTL
# error AT25 FTL support required (CONFIG_SAMA5D3XPLAINED_AT25_FTL)
# undef HAVE_AT25
#endif
#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1
# define CONFIG_SYSTEM_USBMSC_DEVMINOR1 0
#endif
#if CONFIG_SYSTEM_USBMSC_DEVMINOR1 != AT25_MINOR
# error Confusion in the assignment of minor device numbers
# undef HAVE_AT25
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_usbmsc_initialize
*
* Description:
* Perform architecture specific initialization as needed to establish
* the mass storage device that will be exported by the USB MSC device.
*
****************************************************************************/
int board_usbmsc_initialize(int port)
{
/* Initialize the AT25 MTD driver */
#ifdef HAVE_AT25
int ret = sam_at25_automount(AT25_MINOR);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: sam_at25_automount failed: %d\n", ret);
}
return ret;
#else
return -ENODEV;
#endif
}
#endif /* CONFIG_USBMSC */
@@ -0,0 +1,97 @@
/****************************************************************************
* boards/arm/sama5/jupiter-nano/src/sam_userleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* There is a blue status LED on board the Jupiter Nano. It is driven
* driven by pin PA6. The LED is connected to ground so bringing the LED high
* will illuminate the LED.
*
* ------------------------------ ------------------- ---------------------
* SAMA5D2 PIO SIGNAL USAGE
* ------------------------------ ------------------- ---------------------
* PA6 STATUS_LED Blue LED
* ------------------------------ ------------------- ---------------------
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "sam_pio.h"
#include "jupiter-nano.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
uint32_t board_userled_initialize(void)
{
/* Configure LED PIOs for output */
sam_configpio(PIO_LED_BLUE);
return BOARD_NLEDS;
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
uint32_t ledcfg;
if (led == BOARD_BLUE)
{
ledcfg = PIO_LED_BLUE;
}
else
{
return;
}
/* High illuminates */
sam_piowrite(ledcfg, ledon);
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint32_t ledset)
{
bool ledon;
/* High illuminates */
ledon = ((ledset &BOARD_BLUE_BIT) != 0);
sam_piowrite(PIO_LED_BLUE, !ledon);
}
@@ -10,15 +10,13 @@
# CONFIG_SAMA5_UART0 is not set
# CONFIG_SAMA5_UHPHS_RHPORT3 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="sama5d2-xult"
CONFIG_ARCH_BOARD_SAMA5D2_XULT=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_BOARD="jupiter-nano"
CONFIG_ARCH_BOARD_JUPITER_NANO=y
CONFIG_ARCH_CHIP="sama5"
CONFIG_ARCH_CHIP_ATSAMA5D27=y
CONFIG_ARCH_CHIP_SAMA5=y
CONFIG_ARCH_CHIP_SAMA5D2=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_LOWVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_AUDIO=y
@@ -78,7 +76,6 @@ CONFIG_RAM_VSTART=0x20000000
CONFIG_READLINE_CMD_HISTORY=y
CONFIG_READLINE_TABCOMPLETION=y
CONFIG_RR_INTERVAL=200
CONFIG_SAMA5D2XULT_498MHZ=y
CONFIG_SAMA5_BOOT_SDRAM=y
CONFIG_SAMA5_DDRCS_HEAP_END=0x2fa00000
CONFIG_SAMA5_DDRCS_RESERVE=y
@@ -44,6 +44,7 @@ CONFIG_FAT_LFN=y
CONFIG_FS_AUTOMOUNTER=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_EXCLUDE_VERSION=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_HIDKBD_POLLUSEC=80000