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Add some comments from Angus Gratton to a Kconfig file for future reference.

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Gregory Nutt
2016-12-14 08:19:35 -06:00
parent dd5e47a418
commit a560d70e7a
1 changed files with 12 additions and 1 deletions
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configs/esp32-core/Kconfig
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@@ -23,8 +23,19 @@ config ESP32CORE_RUN_IRAM
---help--- ---help---
The default configuration is set up run from IRAM. However, the The default configuration is set up run from IRAM. However, the
current (2016-11-14) OpenOCD for ESP32 does not support writing to current (2016-11-14) OpenOCD for ESP32 does not support writing to
FLASH. This option sets up the liner scripts to support execution FLASH. This option sets up the linker scripts to support execution
from IRAM. In this case, OpenOCD can be used to load directly into from IRAM. In this case, OpenOCD can be used to load directly into
IRAM. IRAM.
At this stage the nuttx image is small enough to be entirely memory-
resident. Once board support is more mature you can add flash cache
mapping code to run from SPI flash after initial boot. There are at
least two possible approaches you could take: You can add the flash
cache mapping code into nuttx directly, so it is self-contained -
early nuttx initialisation runs from IRAM and enables flash cache,
and then off you go. Or you can use the esp-idf software bootloader
and partition table scheme and have nuttx be an esp-idf "app" which
allows interoperability with the esp-idf system but makes you
reliant on the esp-idf design for these parts. Both are possible.
endif # ARCH_BOARD_ESP32CORE endif # ARCH_BOARD_ESP32CORE