diff --git a/Documentation/platforms/arm/stm32f7/boards/nucleo-f722/index.rst b/Documentation/platforms/arm/stm32f7/boards/nucleo-f722/index.rst new file mode 100644 index 00000000000..198538c59ef --- /dev/null +++ b/Documentation/platforms/arm/stm32f7/boards/nucleo-f722/index.rst @@ -0,0 +1,379 @@ +================ +ST Nucleo F722ZE +================ + +This README discusses issues unique to NuttX configurations for the STMicro +Nucleo-144 board. See ST document STM32 Nucleo-144 boards (UM1974): + +https://www.st.com/resource/en/user_manual/dm00244518.pdf + +Board Features +-------------- + +- Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software control +- Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to + provide a ST-Link for programming, debug similar to the + OpenOcd FTDI function - USB to JTAG front-end. +- Expansion I/F: ST Zio and Extended Arduino and Morpho Headers + +Hardware +======== + +GPIO - there are 144 I/O lines on the STM32F7xxZxT6 with various pins pined out +on the Nucleo 144. + +See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic +pinouts. + +Keep in mind that: + +- The I/O is 3.3 Volt not 5 Volt like on the Arduino products. +- The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder + Blobs (SB) that can alter the factory configuration. We will note SB + in effect but will assume the factory default settings. + +Our main concern is establishing a console and LED utilization for +debugging. Because so many pins can be multiplexed with so many functions, +the above mentioned graphic may be helpful in identifying a serial port. + +There are 5 choices that can be made from the menuconfig:: + + CONFIG_NUCLEO_CONSOLE_ARDUINO or CONFIG_NUCLEO_CONSOLE_MORPHO or + CONFIG_NUCLEO_CONSOLE_MORPHO_UART4 or CONFIG_NUCLEO_CONSOLE_VIRTUAL or + CONFIG_NUCLEO_CONSOLE_NONE + +The CONFIG_NUCLEO_CONSOLE_NONE makes no preset for the console. You should still +visit the U[S]ART selection and Device Drivers to disable any U[S]ART remaining. + +The CONFIG_NUCLEO_CONSOLE_ARDUINO configurations assume that you are using a +standard Arduino RS-232 shield with the serial interface with RX on pin D0 and +TX on pin D1 from USART6:: + + -------- --------------- + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ----- + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + -- ----- --------- ----- + +The CONFIG_NUCLEO_CONSOLE_MORPHO configurations uses Serial Port 8 (USART8) +with TX on PE1 and RX on PE0.:: + + Serial + ------ + SERIAL_RX PE_0 + SERIAL_TX PE_1 + +The CONFIG_NUCLEO_CONSOLE_MORPHO_UART4 configurations uses Serial Port 4 (UART4) +with TX on PA1 and RX on PA0. Zero Ohm resistor / solder short at +SB13 must be removed/open. (Disables Ethernet MII clocking.):: + + Serial + ------ + SERIAL_RX PA_1 CN11 30 + SERIAL_TX PA_0 CN11 28 + +The CONFIG_NUCLEO_CONSOLE_VIRTUAL configurations uses Serial Port 3 (USART3) +with TX on PD8 and RX on PD9.:: + + Serial + ------ + SERIAL_RX PD9 + SERIAL_TX PD8 + +These signals are internally connected to the on board ST-Link. + +Of course if your design has used those pins you can choose a completely +different U[S]ART to use as the console. In that Case, you will need to edit +the include/board.h to select different U[S]ART and / or pin selections. + +Buttons +------- + +B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173 +ON and SB180 OFF) + +LEDs +---- + +The Board provides a 3 user LEDs, LD1-LD3:: + + LED1 (Green) PB_0 (SB120 ON and SB119 OFF) + LED2 (Blue) PB_7 (SB139 ON) + LED3 (Red) PB_14 (SP118 ON) + +- When the I/O is HIGH value, the LEDs are on. +- When the I/O is LOW, the LEDs are off. + +These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS +related events as follows when the LEDs are available: + + =================== ======================= === ===== ==== + SYMBOL Meaning RED GREEN BLUE + =================== ======================= === ===== ==== + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + LED_IRQSENABLED Interrupts enabled OFF ON OFF + LED_STACKCREATED Idle stack created OFF ON ON + LED_INIRQ In an interrupt NC NC ON (momentary) + LED_SIGNAL In a signal handler NC ON OFF (momentary) + LED_ASSERTION An assertion failed ON NC ON (momentary) + LED_PANIC The system has crashed ON OFF OFF (flashing 2Hz) + LED_IDLE MCU is is sleep mode ON OFF OFF + =================== ======================= === ===== ==== + +OFF - means that the OS is still initializing. Initialization is very fast + so if you see this at all, it probably means that the system is + hanging up somewhere in the initialization phases. + +GREEN - This means that the OS completed initialization. + +BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is + illuminated and extinguished when the interrupt or signal handler + exits. + +VIOLET - If a recovered assertion occurs, the RED and blue LED will be + illuminated briefly while the assertion is handled. You will + probably never see this. + +Flashing RED - In the event of a fatal crash, all other LEDs will be + extinguished and RED LED will FLASH at a 2Hz rate. + + Thus if the GREEN LED is lit, NuttX has successfully booted and is, + apparently, running normally. If the RED LED is flashing at + approximately 2Hz, then a fatal error has been detected and the system has + halted. + +Serial Consoles +=============== + +USART6 (CONFIG_NUCLEO_CONSOLE_ARDUINO) +-------------------------------------- + + ======= ========== ===== + ARDUINO FUNCTION GPIO + ======= ========== ===== + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + ======= ========== ===== + +You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL + +:: + + Nucleo 144 FTDI TTL-232R-3V3 + ------------- ------------------- + TXD - D1-TXD - RXD - Pin 5 (Yellow) + RXD - D0-RXD - TXD - Pin 4 (Orange) + GND GND - GND Pin 1 (Black) + ------------- ------------------- + + *Note you will be reverse RX/TX + +Use make menuconfig to configure USART6 as the console:: + + CONFIG_STM32F7_USART6=y + CONFIG_USARTs_SERIALDRIVER=y + CONFIG_USARTS_SERIAL_CONSOLE=y + CONFIG_USART6_RXBUFSIZE=256 + CONFIG_USART6_TXBUFSIZE=256 + CONFIG_USART6_BAUD=115200 + CONFIG_USART6_BITS=8 + CONFIG_USART6_PARITY=0 + CONFIG_USART6_2STOP=0 + +USART8 (CONFIG_NUCLEO_CONSOLE_MORPHO) +------------------------------------- + +Pins and Connectors:: + + FUNC GPIO Connector + Pin NAME + ---- --- ------- ---- + TXD: PE1 CN11-61, PE1 + RXD: PE0 CN12-64, PE0 + CN10-33, D34 + ---- --- ------- ---- + +You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL:: + + Nucleo 144 FTDI TTL-232R-3V3 + ------------- ------------------- + TXD - CN11-61 - RXD - Pin 5 (Yellow) + RXD - CN12-64 - TXD - Pin 4 (Orange) + GND CN12-63 - GND Pin 1 (Black) + ------------- ------------------- + + *Note you will be reverse RX/TX + +Use make menuconfig to configure USART8 as the console:: + + CONFIG_STM32F7_UART8=y + CONFIG_UART8_SERIALDRIVER=y + CONFIG_UART8_SERIAL_CONSOLE=y + CONFIG_UART8_RXBUFSIZE=256 + CONFIG_UART8_TXBUFSIZE=256 + CONFIG_UART8_BAUD=115200 + CONFIG_UART8_BITS=8 + CONFIG_UART8_PARITY=0 + CONFIG_UART8_2STOP=0 + +Virtual COM Port (CONFIG_NUCLEO_CONSOLE_VIRTUAL) +------------------------------------------------ + +Yet another option is to use USART3 and the USB virtual COM port. This +option may be more convenient for long term development, but is painful +to use during board bring-up. + +Solder Bridges. This configuration requires:: + + PD8 USART3 TX SB5 ON and SB7 OFF (Default) + PD9 USART3 RX SB6 ON and SB4 OFF (Default) + +Configuring USART3 is the same as given above but add the S and #3. + +Question: What BAUD should be configure to interface with the Virtual +COM port? 115200 8N1? + +Default: + +As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the +virtual COM port is enabled. + +SPI +--- + +Since this board is so generic, having a quick way to set the SPI +configuration seams in order. So the board provides a quick test +that can be selected vi CONFIG_NUCLEO_SPI_TEST that will initialize +the selected buses (SPI1-SPI3) and send some text on the bus at +application initialization time board_app_initialize. + +SDIO +---- + +To test the SD performance one can use a SparkFun microSD Sniffer +from https://www.sparkfun.com/products/9419 or similar board +and connect it as follows:: + + VCC V3.3 CN11 16 + GND GND CN11-8 + CMD PD2 CN11-4 + CLK PC12 CN11-3 + DAT0 - PC8 CN12-2 + DAT1 - PC9 CN12-1 + DAT2 PC10 CN11-1 + CD PC11 CN11-2 + + +Configurations +============== + +f7xx-nsh +-------- + +Configures the NuttShell (nsh) located at apps/examples/nsh for the +Nucleo-144 boards. The Configuration enables the serial interfaces +on USART6. Support for builtin applications is enabled, but in the base +configuration no builtin applications are selected (see NOTES below). + +NOTES: + +1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. If this is the initial configuration then execute:: + + ./tools/configure.sh nucleo-144:nsh + + in nuttx/ in order to start configuration process. + Caution: Doing this step more than once will overwrite .config with + the contents of the nucleo-144/nsh/defconfig file. + + c. Execute 'make oldconfig' in nuttx/ in order to refresh the + configuration. + + d. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + e. Save the .config file to reuse it in the future starting at step d. + +2. By default, this configuration uses the ARM GNU toolchain + for Linux. That can easily be reconfigured, of course.:: + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : ARM GNU for Linux + +3. The serial console may be configured to use either USART3 (which would + correspond to the Virtual COM port) or with the console device + configured for USART6 to support an Arduino serial shield (see + instructions above under "Serial Consoles). You will need to check the + defconfig file to see how the console is set up and, perhaps, modify + the configuration accordingly. + + To select the Virtual COM port:: + + -CONFIG_NUCLEO_CONSOLE_ARDUINO + +CONFIG_NUCLEO_CONSOLE_VIRTUAL=y + -CONFIG_USART6_SERIAL_CONSOLE=y + +CONFIG_USART3_SERIAL_CONSOLE=y + + To select the Arduino serial shield:: + + -CONFIG_NUCLEO_CONSOLE_VIRTUAL=y + +CONFIG_NUCLEO_CONSOLE_ARDUINO + -CONFIG_USART3_SERIAL_CONSOLE=y + +CONFIG_USART6_SERIAL_CONSOLE=y + + Default values for other settings associated with the select USART should + be correct. + +f7xx-evalos: +------------ + +This configuration is designed to test the features of the board. + +- Configures the NuttShell (nsh) located at apps/examples/nsh for the + Nucleo-144 boards. The console is available on serial interface USART3, + which is accessible over the USB ST-Link interface. +- Configures nsh with advanced features such as autocompletion. +- Configures the on-board LEDs to work with the 'leds' example app. +- Configures the \'helloxx\' example app. +- Adds character device for i2c1 +- Tries to register mpu60x0 IMU to i2c1 + +NOTES: + +1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. If this is the initial configuration then execute:: + + ./tools/configure.sh nucleo-144:evalos + + in nuttx/ in order to start configuration process. + Caution: Doing this step more than once will overwrite .config with + the contents of the nucleo-144/evalos/defconfig file. + + c. Execute 'make oldconfig' in nuttx/ in order to refresh the + configuration. + + d. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + e. Save the .config file to reuse it in the future starting at step d. + +2. By default, this configuration uses the ARM GNU toolchain + for Linux. That can easily be reconfigured, of course.:: + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : ARM GNU for Linux diff --git a/Documentation/platforms/arm/stm32f7/boards/nucleo-f746/index.rst b/Documentation/platforms/arm/stm32f7/boards/nucleo-f746/index.rst new file mode 100644 index 00000000000..bcdc4d17e28 --- /dev/null +++ b/Documentation/platforms/arm/stm32f7/boards/nucleo-f746/index.rst @@ -0,0 +1,421 @@ +================ +ST Nucleo F746ZG +================ + +This README discusses issues unique to NuttX configurations for the STMicro +Nucleo-144 board. See ST document STM32 Nucleo-144 boards (UM1974): + +https://www.st.com/resource/en/user_manual/dm00244518.pdf + +Board Features +-------------- + +- Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software control +- Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to + provide a ST-Link for programming, debug similar to the + OpenOcd FTDI function - USB to JTAG front-end. +- Expansion I/F: ST Zio and Extended Arduino and Morpho Headers + +ST Nucleo F746ZG board from ST Micro is supported. See + +http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f746zg.html + +The Nucleo F746ZG order part number is NUCLEO-F746ZG. It is one member of +the STM32 Nucleo-144 board family. + +NUCLEO-F746ZG Features +---------------------- + +- Microprocessor: STM32F746ZGT6 Core: ARM 32-bit Cortex®-M7 CPU with FPU, + L1-cache: 4KB data cache and 4KB instruction cache, up to + 216 MHz, MPU, and DSP instructions. +- Memory: 1024 KB Flash 320KB of SRAM (including 64KB of data TCM RAM) + + 16KB of instruction TCM RAM + 4KB of backup SRAM +- ADC:3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in + triple interleaved mode +- DMA: 2 X 16-stream DMA controllers with FIFOs and burst support +- Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit low power), + two 32-bit timers, 2x watchdogs, SysTick +- GPIO: 114 I/O ports with interrupt capability +- LCD: LCD-TFT Controller with (DMA2D), Parallel interface +- I2C: 4 × I2C interfaces (SMBus/PMBus) +- U[S]ARTs: 4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, modem control) +- SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S + for audio class accuracy via internal audio PLL or external clock +- QSPI: Dual mode Quad-SPI +- SAIs: 2 Serial Audio Interfaces +- CAN: 2 X CAN interface +- SDMMC interface +- SPDIFRX interface +- USB: USB 2.0 full-speed device/host/OTG controller with on-chip PHY +- 10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, + MII/RMII +- Camera Interface: 8/14 Bit +- CRC calculation unit +- TRG: True random number generator +- RTC + +See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG for additional +information about this board. + +Hardware +======== + +GPIO - there are 144 I/O lines on the STM32F7xxZxT6 with various pins pined out +on the Nucleo 144. + +See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic +pinouts. + +Keep in mind that: + +- The I/O is 3.3 Volt not 5 Volt like on the Arduino products. +- The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder + Blobs (SB) that can alter the factory configuration. We will note SB + in effect but will assume the factory default settings. + +Our main concern is establishing a console and LED utilization for +debugging. Because so many pins can be multiplexed with so many functions, +the above mentioned graphic may be helpful in identifying a serial port. + +There are 5 choices that can be made from the menuconfig:: + + CONFIG_NUCLEO_CONSOLE_ARDUINO or CONFIG_NUCLEO_CONSOLE_MORPHO or + CONFIG_NUCLEO_CONSOLE_MORPHO_UART4 or CONFIG_NUCLEO_CONSOLE_VIRTUAL or + CONFIG_NUCLEO_CONSOLE_NONE + +The CONFIG_NUCLEO_CONSOLE_NONE makes no preset for the console. You should still +visit the U[S]ART selection and Device Drivers to disable any U[S]ART remaining. + +The CONFIG_NUCLEO_CONSOLE_ARDUINO configurations assume that you are using a +standard Arduino RS-232 shield with the serial interface with RX on pin D0 and +TX on pin D1 from USART6:: + + -------- --------------- + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ----- + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + -- ----- --------- ----- + +The CONFIG_NUCLEO_CONSOLE_MORPHO configurations uses Serial Port 8 (USART8) +with TX on PE1 and RX on PE0.:: + + Serial + ------ + SERIAL_RX PE_0 + SERIAL_TX PE_1 + +The CONFIG_NUCLEO_CONSOLE_MORPHO_UART4 configurations uses Serial Port 4 (UART4) +with TX on PA1 and RX on PA0. Zero Ohm resistor / solder short at +SB13 must be removed/open. (Disables Ethernet MII clocking.):: + + Serial + ------ + SERIAL_RX PA_1 CN11 30 + SERIAL_TX PA_0 CN11 28 + +The CONFIG_NUCLEO_CONSOLE_VIRTUAL configurations uses Serial Port 3 (USART3) +with TX on PD8 and RX on PD9.:: + + Serial + ------ + SERIAL_RX PD9 + SERIAL_TX PD8 + +These signals are internally connected to the on board ST-Link. + +Of course if your design has used those pins you can choose a completely +different U[S]ART to use as the console. In that Case, you will need to edit +the include/board.h to select different U[S]ART and / or pin selections. + +Buttons +------- + +B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173 +ON and SB180 OFF) + +LEDs +---- + +The Board provides a 3 user LEDs, LD1-LD3:: + + LED1 (Green) PB_0 (SB120 ON and SB119 OFF) + LED2 (Blue) PB_7 (SB139 ON) + LED3 (Red) PB_14 (SP118 ON) + +- When the I/O is HIGH value, the LEDs are on. +- When the I/O is LOW, the LEDs are off. + +These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS +related events as follows when the LEDs are available: + + =================== ======================= === ===== ==== + SYMBOL Meaning RED GREEN BLUE + =================== ======================= === ===== ==== + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + LED_IRQSENABLED Interrupts enabled OFF ON OFF + LED_STACKCREATED Idle stack created OFF ON ON + LED_INIRQ In an interrupt NC NC ON (momentary) + LED_SIGNAL In a signal handler NC ON OFF (momentary) + LED_ASSERTION An assertion failed ON NC ON (momentary) + LED_PANIC The system has crashed ON OFF OFF (flashing 2Hz) + LED_IDLE MCU is is sleep mode ON OFF OFF + =================== ======================= === ===== ==== + +OFF - means that the OS is still initializing. Initialization is very fast + so if you see this at all, it probably means that the system is + hanging up somewhere in the initialization phases. + +GREEN - This means that the OS completed initialization. + +BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is + illuminated and extinguished when the interrupt or signal handler + exits. + +VIOLET - If a recovered assertion occurs, the RED and blue LED will be + illuminated briefly while the assertion is handled. You will + probably never see this. + +Flashing RED - In the event of a fatal crash, all other LEDs will be + extinguished and RED LED will FLASH at a 2Hz rate. + + Thus if the GREEN LED is lit, NuttX has successfully booted and is, + apparently, running normally. If the RED LED is flashing at + approximately 2Hz, then a fatal error has been detected and the system has + halted. + +Serial Consoles +=============== + +USART6 (CONFIG_NUCLEO_CONSOLE_ARDUINO) +-------------------------------------- + + ======= ========== ===== + ARDUINO FUNCTION GPIO + ======= ========== ===== + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + ======= ========== ===== + +You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL + +:: + + Nucleo 144 FTDI TTL-232R-3V3 + ------------- ------------------- + TXD - D1-TXD - RXD - Pin 5 (Yellow) + RXD - D0-RXD - TXD - Pin 4 (Orange) + GND GND - GND Pin 1 (Black) + ------------- ------------------- + + *Note you will be reverse RX/TX + +Use make menuconfig to configure USART6 as the console:: + + CONFIG_STM32F7_USART6=y + CONFIG_USARTs_SERIALDRIVER=y + CONFIG_USARTS_SERIAL_CONSOLE=y + CONFIG_USART6_RXBUFSIZE=256 + CONFIG_USART6_TXBUFSIZE=256 + CONFIG_USART6_BAUD=115200 + CONFIG_USART6_BITS=8 + CONFIG_USART6_PARITY=0 + CONFIG_USART6_2STOP=0 + +USART8 (CONFIG_NUCLEO_CONSOLE_MORPHO) +------------------------------------- + +Pins and Connectors:: + + FUNC GPIO Connector + Pin NAME + ---- --- ------- ---- + TXD: PE1 CN11-61, PE1 + RXD: PE0 CN12-64, PE0 + CN10-33, D34 + ---- --- ------- ---- + +You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL:: + + Nucleo 144 FTDI TTL-232R-3V3 + ------------- ------------------- + TXD - CN11-61 - RXD - Pin 5 (Yellow) + RXD - CN12-64 - TXD - Pin 4 (Orange) + GND CN12-63 - GND Pin 1 (Black) + ------------- ------------------- + + *Note you will be reverse RX/TX + +Use make menuconfig to configure USART8 as the console:: + + CONFIG_STM32F7_UART8=y + CONFIG_UART8_SERIALDRIVER=y + CONFIG_UART8_SERIAL_CONSOLE=y + CONFIG_UART8_RXBUFSIZE=256 + CONFIG_UART8_TXBUFSIZE=256 + CONFIG_UART8_BAUD=115200 + CONFIG_UART8_BITS=8 + CONFIG_UART8_PARITY=0 + CONFIG_UART8_2STOP=0 + +Virtual COM Port (CONFIG_NUCLEO_CONSOLE_VIRTUAL) +------------------------------------------------ + +Yet another option is to use USART3 and the USB virtual COM port. This +option may be more convenient for long term development, but is painful +to use during board bring-up. + +Solder Bridges. This configuration requires:: + + PD8 USART3 TX SB5 ON and SB7 OFF (Default) + PD9 USART3 RX SB6 ON and SB4 OFF (Default) + +Configuring USART3 is the same as given above but add the S and #3. + +Question: What BAUD should be configure to interface with the Virtual +COM port? 115200 8N1? + +Default: + +As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the +virtual COM port is enabled. + +SPI +--- + +Since this board is so generic, having a quick way to set the SPI +configuration seams in order. So the board provides a quick test +that can be selected vi CONFIG_NUCLEO_SPI_TEST that will initialize +the selected buses (SPI1-SPI3) and send some text on the bus at +application initialization time board_app_initialize. + +SDIO +---- + +To test the SD performance one can use a SparkFun microSD Sniffer +from https://www.sparkfun.com/products/9419 or similar board +and connect it as follows:: + + VCC V3.3 CN11 16 + GND GND CN11-8 + CMD PD2 CN11-4 + CLK PC12 CN11-3 + DAT0 - PC8 CN12-2 + DAT1 - PC9 CN12-1 + DAT2 PC10 CN11-1 + CD PC11 CN11-2 + + +Configurations +============== + +f7xx-nsh +-------- + +Configures the NuttShell (nsh) located at apps/examples/nsh for the +Nucleo-144 boards. The Configuration enables the serial interfaces +on USART6. Support for builtin applications is enabled, but in the base +configuration no builtin applications are selected (see NOTES below). + +NOTES: + +1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. If this is the initial configuration then execute:: + + ./tools/configure.sh nucleo-144:nsh + + in nuttx/ in order to start configuration process. + Caution: Doing this step more than once will overwrite .config with + the contents of the nucleo-144/nsh/defconfig file. + + c. Execute 'make oldconfig' in nuttx/ in order to refresh the + configuration. + + d. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + e. Save the .config file to reuse it in the future starting at step d. + +2. By default, this configuration uses the ARM GNU toolchain + for Linux. That can easily be reconfigured, of course.:: + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : ARM GNU for Linux + +3. The serial console may be configured to use either USART3 (which would + correspond to the Virtual COM port) or with the console device + configured for USART6 to support an Arduino serial shield (see + instructions above under "Serial Consoles). You will need to check the + defconfig file to see how the console is set up and, perhaps, modify + the configuration accordingly. + + To select the Virtual COM port:: + + -CONFIG_NUCLEO_CONSOLE_ARDUINO + +CONFIG_NUCLEO_CONSOLE_VIRTUAL=y + -CONFIG_USART6_SERIAL_CONSOLE=y + +CONFIG_USART3_SERIAL_CONSOLE=y + + To select the Arduino serial shield:: + + -CONFIG_NUCLEO_CONSOLE_VIRTUAL=y + +CONFIG_NUCLEO_CONSOLE_ARDUINO + -CONFIG_USART3_SERIAL_CONSOLE=y + +CONFIG_USART6_SERIAL_CONSOLE=y + + Default values for other settings associated with the select USART should + be correct. + +f7xx-evalos: +------------ + +This configuration is designed to test the features of the board. + +- Configures the NuttShell (nsh) located at apps/examples/nsh for the + Nucleo-144 boards. The console is available on serial interface USART3, + which is accessible over the USB ST-Link interface. +- Configures nsh with advanced features such as autocompletion. +- Configures the on-board LEDs to work with the 'leds' example app. +- Configures the \'helloxx\' example app. +- Adds character device for i2c1 +- Tries to register mpu60x0 IMU to i2c1 + +NOTES: + +1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. If this is the initial configuration then execute:: + + ./tools/configure.sh nucleo-144:evalos + + in nuttx/ in order to start configuration process. + Caution: Doing this step more than once will overwrite .config with + the contents of the nucleo-144/evalos/defconfig file. + + c. Execute 'make oldconfig' in nuttx/ in order to refresh the + configuration. + + d. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + e. Save the .config file to reuse it in the future starting at step d. + +2. By default, this configuration uses the ARM GNU toolchain + for Linux. That can easily be reconfigured, of course.:: + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : ARM GNU for Linux diff --git a/Documentation/platforms/arm/stm32f7/boards/nucleo-f767/index.rst b/Documentation/platforms/arm/stm32f7/boards/nucleo-f767/index.rst new file mode 100644 index 00000000000..ceb02132a0b --- /dev/null +++ b/Documentation/platforms/arm/stm32f7/boards/nucleo-f767/index.rst @@ -0,0 +1,423 @@ +================ +ST Nucleo F767ZI +================ + +This README discusses issues unique to NuttX configurations for the STMicro +Nucleo-144 board. See ST document STM32 Nucleo-144 boards (UM1974): + +https://www.st.com/resource/en/user_manual/dm00244518.pdf + +Board Features +-------------- + +- Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software control +- Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to + provide a ST-Link for programming, debug similar to the + OpenOcd FTDI function - USB to JTAG front-end. +- Expansion I/F: ST Zio and Extended Arduino and Morpho Headers + +ST Nucleo F7467ZI board from ST Micro is supported. See + +http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f767zi.html + +The Nucleo F767ZI order part number is NUCLEO-F767ZI. It is one member of +the STM32 Nucleo-144 board family. + +NUCLEO-F767ZI Features +---------------------- + +- Microprocessor: STM32F767ZIT6 Core: ARM 32-bit Cortex®-M7 CPU with DPFPU, + L1-cache: 16KB data cache and 16KB instruction cache, up to + 216 MHz, MPU, and DSP instructions. +- Memory: 2048 KB Flash 512KB of SRAM (including 128KB of data TCM RAM) + + 16KB of instruction TCM RAM + 4KB of backup SRAM +- ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in + triple interleaved mode +- DMA: 2 X 16-stream DMA controllers with FIFOs and burst support +- Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit low power), + two 32-bit timers, 2x watchdogs, SysTick +- GPIO: 114 I/O ports with interrupt capability +- LCD: LCD-TFT Controller with (DMA2D), Parallel interface +- I2C: 4 × I2C interfaces (SMBus/PMBus) +- U[S]ARTs: 4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, modem control) +- SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S + for audio class accuracy via internal audio PLL or external clock +- QSPI: Dual mode Quad-SPI +- SAIs: 2 Serial Audio Interfaces +- CAN: 3 X CAN interface +- SDMMC interface +- SPDIFRX interface +- USB: USB 2.0 full/High-speed device/host/OTG controller with on-chip PHY +- 10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII +- Camera Interface: 8/14 Bit +- CRC calculation unit +- TRG: True random number generator +- RTC subsecond accuracy, hardware calendar + +For pinout and details Check NUCLEO-F767ZI page on developer.mbed.org: +https://os.mbed.com/platforms/ST-Nucleo-F767ZI/ + +Also https://developer.mbed.org/platforms/ST-Nucleo-F746ZG +may contain some related useful information. + +Hardware +======== + +GPIO - there are 144 I/O lines on the STM32F7xxZxT6 with various pins pined out +on the Nucleo 144. + +See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic +pinouts. + +Keep in mind that: + +- The I/O is 3.3 Volt not 5 Volt like on the Arduino products. +- The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder + Blobs (SB) that can alter the factory configuration. We will note SB + in effect but will assume the factory default settings. + +Our main concern is establishing a console and LED utilization for +debugging. Because so many pins can be multiplexed with so many functions, +the above mentioned graphic may be helpful in identifying a serial port. + +There are 5 choices that can be made from the menuconfig:: + + CONFIG_NUCLEO_CONSOLE_ARDUINO or CONFIG_NUCLEO_CONSOLE_MORPHO or + CONFIG_NUCLEO_CONSOLE_MORPHO_UART4 or CONFIG_NUCLEO_CONSOLE_VIRTUAL or + CONFIG_NUCLEO_CONSOLE_NONE + +The CONFIG_NUCLEO_CONSOLE_NONE makes no preset for the console. You should still +visit the U[S]ART selection and Device Drivers to disable any U[S]ART remaining. + +The CONFIG_NUCLEO_CONSOLE_ARDUINO configurations assume that you are using a +standard Arduino RS-232 shield with the serial interface with RX on pin D0 and +TX on pin D1 from USART6:: + + -------- --------------- + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ----- + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + -- ----- --------- ----- + +The CONFIG_NUCLEO_CONSOLE_MORPHO configurations uses Serial Port 8 (USART8) +with TX on PE1 and RX on PE0.:: + + Serial + ------ + SERIAL_RX PE_0 + SERIAL_TX PE_1 + +The CONFIG_NUCLEO_CONSOLE_MORPHO_UART4 configurations uses Serial Port 4 (UART4) +with TX on PA1 and RX on PA0. Zero Ohm resistor / solder short at +SB13 must be removed/open. (Disables Ethernet MII clocking.):: + + Serial + ------ + SERIAL_RX PA_1 CN11 30 + SERIAL_TX PA_0 CN11 28 + +The CONFIG_NUCLEO_CONSOLE_VIRTUAL configurations uses Serial Port 3 (USART3) +with TX on PD8 and RX on PD9.:: + + Serial + ------ + SERIAL_RX PD9 + SERIAL_TX PD8 + +These signals are internally connected to the on board ST-Link. + +Of course if your design has used those pins you can choose a completely +different U[S]ART to use as the console. In that Case, you will need to edit +the include/board.h to select different U[S]ART and / or pin selections. + +Buttons +------- + +B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173 +ON and SB180 OFF) + +LEDs +---- + +The Board provides a 3 user LEDs, LD1-LD3:: + + LED1 (Green) PB_0 (SB120 ON and SB119 OFF) + LED2 (Blue) PB_7 (SB139 ON) + LED3 (Red) PB_14 (SP118 ON) + +- When the I/O is HIGH value, the LEDs are on. +- When the I/O is LOW, the LEDs are off. + +These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is +defined. In that case, the usage by the board port is defined in +include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS +related events as follows when the LEDs are available: + + =================== ======================= === ===== ==== + SYMBOL Meaning RED GREEN BLUE + =================== ======================= === ===== ==== + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + LED_IRQSENABLED Interrupts enabled OFF ON OFF + LED_STACKCREATED Idle stack created OFF ON ON + LED_INIRQ In an interrupt NC NC ON (momentary) + LED_SIGNAL In a signal handler NC ON OFF (momentary) + LED_ASSERTION An assertion failed ON NC ON (momentary) + LED_PANIC The system has crashed ON OFF OFF (flashing 2Hz) + LED_IDLE MCU is is sleep mode ON OFF OFF + =================== ======================= === ===== ==== + +OFF - means that the OS is still initializing. Initialization is very fast + so if you see this at all, it probably means that the system is + hanging up somewhere in the initialization phases. + +GREEN - This means that the OS completed initialization. + +BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is + illuminated and extinguished when the interrupt or signal handler + exits. + +VIOLET - If a recovered assertion occurs, the RED and blue LED will be + illuminated briefly while the assertion is handled. You will + probably never see this. + +Flashing RED - In the event of a fatal crash, all other LEDs will be + extinguished and RED LED will FLASH at a 2Hz rate. + + Thus if the GREEN LED is lit, NuttX has successfully booted and is, + apparently, running normally. If the RED LED is flashing at + approximately 2Hz, then a fatal error has been detected and the system has + halted. + +Serial Consoles +=============== + +USART6 (CONFIG_NUCLEO_CONSOLE_ARDUINO) +-------------------------------------- + + ======= ========== ===== + ARDUINO FUNCTION GPIO + ======= ========== ===== + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + ======= ========== ===== + +You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL + +:: + + Nucleo 144 FTDI TTL-232R-3V3 + ------------- ------------------- + TXD - D1-TXD - RXD - Pin 5 (Yellow) + RXD - D0-RXD - TXD - Pin 4 (Orange) + GND GND - GND Pin 1 (Black) + ------------- ------------------- + + *Note you will be reverse RX/TX + +Use make menuconfig to configure USART6 as the console:: + + CONFIG_STM32F7_USART6=y + CONFIG_USARTs_SERIALDRIVER=y + CONFIG_USARTS_SERIAL_CONSOLE=y + CONFIG_USART6_RXBUFSIZE=256 + CONFIG_USART6_TXBUFSIZE=256 + CONFIG_USART6_BAUD=115200 + CONFIG_USART6_BITS=8 + CONFIG_USART6_PARITY=0 + CONFIG_USART6_2STOP=0 + +USART8 (CONFIG_NUCLEO_CONSOLE_MORPHO) +------------------------------------- + +Pins and Connectors:: + + FUNC GPIO Connector + Pin NAME + ---- --- ------- ---- + TXD: PE1 CN11-61, PE1 + RXD: PE0 CN12-64, PE0 + CN10-33, D34 + ---- --- ------- ---- + +You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL:: + + Nucleo 144 FTDI TTL-232R-3V3 + ------------- ------------------- + TXD - CN11-61 - RXD - Pin 5 (Yellow) + RXD - CN12-64 - TXD - Pin 4 (Orange) + GND CN12-63 - GND Pin 1 (Black) + ------------- ------------------- + + *Note you will be reverse RX/TX + +Use make menuconfig to configure USART8 as the console:: + + CONFIG_STM32F7_UART8=y + CONFIG_UART8_SERIALDRIVER=y + CONFIG_UART8_SERIAL_CONSOLE=y + CONFIG_UART8_RXBUFSIZE=256 + CONFIG_UART8_TXBUFSIZE=256 + CONFIG_UART8_BAUD=115200 + CONFIG_UART8_BITS=8 + CONFIG_UART8_PARITY=0 + CONFIG_UART8_2STOP=0 + +Virtual COM Port (CONFIG_NUCLEO_CONSOLE_VIRTUAL) +------------------------------------------------ + +Yet another option is to use USART3 and the USB virtual COM port. This +option may be more convenient for long term development, but is painful +to use during board bring-up. + +Solder Bridges. This configuration requires:: + + PD8 USART3 TX SB5 ON and SB7 OFF (Default) + PD9 USART3 RX SB6 ON and SB4 OFF (Default) + +Configuring USART3 is the same as given above but add the S and #3. + +Question: What BAUD should be configure to interface with the Virtual +COM port? 115200 8N1? + +Default: + +As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the +virtual COM port is enabled. + +SPI +--- + +Since this board is so generic, having a quick way to set the SPI +configuration seams in order. So the board provides a quick test +that can be selected vi CONFIG_NUCLEO_SPI_TEST that will initialize +the selected buses (SPI1-SPI3) and send some text on the bus at +application initialization time board_app_initialize. + +SDIO +---- + +To test the SD performance one can use a SparkFun microSD Sniffer +from https://www.sparkfun.com/products/9419 or similar board +and connect it as follows:: + + VCC V3.3 CN11 16 + GND GND CN11-8 + CMD PD2 CN11-4 + CLK PC12 CN11-3 + DAT0 - PC8 CN12-2 + DAT1 - PC9 CN12-1 + DAT2 PC10 CN11-1 + CD PC11 CN11-2 + + +Configurations +============== + +f7xx-nsh +-------- + +Configures the NuttShell (nsh) located at apps/examples/nsh for the +Nucleo-144 boards. The Configuration enables the serial interfaces +on USART6. Support for builtin applications is enabled, but in the base +configuration no builtin applications are selected (see NOTES below). + +NOTES: + +1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. If this is the initial configuration then execute:: + + ./tools/configure.sh nucleo-144:nsh + + in nuttx/ in order to start configuration process. + Caution: Doing this step more than once will overwrite .config with + the contents of the nucleo-144/nsh/defconfig file. + + c. Execute 'make oldconfig' in nuttx/ in order to refresh the + configuration. + + d. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + e. Save the .config file to reuse it in the future starting at step d. + +2. By default, this configuration uses the ARM GNU toolchain + for Linux. That can easily be reconfigured, of course.:: + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : ARM GNU for Linux + +3. The serial console may be configured to use either USART3 (which would + correspond to the Virtual COM port) or with the console device + configured for USART6 to support an Arduino serial shield (see + instructions above under "Serial Consoles). You will need to check the + defconfig file to see how the console is set up and, perhaps, modify + the configuration accordingly. + + To select the Virtual COM port:: + + -CONFIG_NUCLEO_CONSOLE_ARDUINO + +CONFIG_NUCLEO_CONSOLE_VIRTUAL=y + -CONFIG_USART6_SERIAL_CONSOLE=y + +CONFIG_USART3_SERIAL_CONSOLE=y + + To select the Arduino serial shield:: + + -CONFIG_NUCLEO_CONSOLE_VIRTUAL=y + +CONFIG_NUCLEO_CONSOLE_ARDUINO + -CONFIG_USART3_SERIAL_CONSOLE=y + +CONFIG_USART6_SERIAL_CONSOLE=y + + Default values for other settings associated with the select USART should + be correct. + +f7xx-evalos: +------------ + +This configuration is designed to test the features of the board. + +- Configures the NuttShell (nsh) located at apps/examples/nsh for the + Nucleo-144 boards. The console is available on serial interface USART3, + which is accessible over the USB ST-Link interface. +- Configures nsh with advanced features such as autocompletion. +- Configures the on-board LEDs to work with the 'leds' example app. +- Configures the \'helloxx\' example app. +- Adds character device for i2c1 +- Tries to register mpu60x0 IMU to i2c1 + +NOTES: + +1. This configuration uses the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. If this is the initial configuration then execute:: + + ./tools/configure.sh nucleo-144:evalos + + in nuttx/ in order to start configuration process. + Caution: Doing this step more than once will overwrite .config with + the contents of the nucleo-144/evalos/defconfig file. + + c. Execute 'make oldconfig' in nuttx/ in order to refresh the + configuration. + + d. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + e. Save the .config file to reuse it in the future starting at step d. + +2. By default, this configuration uses the ARM GNU toolchain + for Linux. That can easily be reconfigured, of course.:: + + CONFIG_HOST_LINUX=y : Builds under Linux + CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : ARM GNU for Linux diff --git a/Documentation/platforms/arm/stm32f7/boards/steval-eth001v1/index.rst b/Documentation/platforms/arm/stm32f7/boards/steval-eth001v1/index.rst new file mode 100644 index 00000000000..127a2882a94 --- /dev/null +++ b/Documentation/platforms/arm/stm32f7/boards/steval-eth001v1/index.rst @@ -0,0 +1,18 @@ +================== +ST STEVAL-ETH001V1 +================== + +This README discusses issues unique to NuttX configurations for the +STMicro STEVAL-ETH001V1 servo drive evaluation board. +The STEVAL-ETH001V1 board is based on the STM32F767ZI MCU (2Mbytes FLASH +and 512Kbytes of SRAM). + +The boards features: + +- Three-phase motor driver inverter based on STDRIVE101 gate driver and + STH270N8F7-2 power MOSFET +- NETX90 network controller +- Operating supply voltage up to 48 V with a max. overvoltage robustness of 60 V +- Motor brake dissipative energy circuit +- Digital actuation section for industrial loads +- RS485 interface for digital encoder and host interface diff --git a/Documentation/platforms/arm/stm32f7/boards/stm32f746-ws/index.rst b/Documentation/platforms/arm/stm32f7/boards/stm32f746-ws/index.rst new file mode 100644 index 00000000000..bba4ea50dd5 --- /dev/null +++ b/Documentation/platforms/arm/stm32f7/boards/stm32f746-ws/index.rst @@ -0,0 +1,3 @@ +============ +STM32F746-WS +============ diff --git a/Documentation/platforms/arm/stm32f7/boards/stm32f746g-disco/index.rst b/Documentation/platforms/arm/stm32f7/boards/stm32f746g-disco/index.rst new file mode 100644 index 00000000000..9112d734aaf --- /dev/null +++ b/Documentation/platforms/arm/stm32f7/boards/stm32f746g-disco/index.rst @@ -0,0 +1,302 @@ +=================== +ST STM32F746G-DISCO +=================== + +This README discusses issues unique to NuttX configurations for the +STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 +MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash +memory and 300Kb SRAM. The board features: + +- On-board ST-LINK/V2 for programming and debugging, +- Mbed-enabled (mbed.org) +- 4.3-inch 480x272 color LCD-TFT with capacitive touch screen +- Camera connector +- SAI audio codec +- Audio line in and line out jack +- Stereo speaker outputs +- Two ST MEMS microphones +- SPDIF RCA input connector +- Two pushbuttons (user and reset) +- 128-Mbit Quad-SPI Flash memory +- 128-Mbit SDRAM (64 Mbits accessible) +- Connector for microSD card +- RF-EEPROM daughterboard connector +- USB OTG HS with Micro-AB connectors +- USB OTG FS with Micro-AB connectors +- Ethernet connector compliant with IEEE-802.3-2002 + +Refer to the http://www.st.com website for further information about this +board (search keyword: stm32f746g-disco) + +Development Environment +======================= + +The Development environments for the STM32F746G-DISCO board are identical +to the environments for other STM32F boards. For full details on the +environment options and setup, see the README.txt file in the +boards/arm/stm32f7/stm32f746g-disco directory. + +LEDs and Buttons +================ + +LEDs +---- + +The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located +near the reset button, that can be controlled by software (LD2 is a power +indicator, LD3-6 indicate USB status, LD7 is controlled by the ST-Link). + +LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino +interface. One end of LD1 is grounded so a high output on PI1 will +illuminate the LED. + +This LED is not used by the board port unless CONFIG_ARCH_LEDS is defined. +In that case, the usage by the board port is defined in include/board.h +and src/stm32_leds.c. The LEDs are used to encode OS-related events as +follows: + + =================== ======================= ====== + SYMBOL Meaning LD1 + =================== ======================= ====== + LED_STARTED NuttX has been started OFF + LED_HEAPALLOCATE Heap has been allocated OFF + LED_IRQSENABLED Interrupts enabled OFF + LED_STACKCREATED Idle stack created ON + LED_INIRQ In an interrupt N/C + LED_SIGNAL In a signal handler N/C + LED_ASSERTION An assertion failed N/C + LED_PANIC The system has crashed FLASH + =================== ======================= ====== + + Thus is LD1 is statically on, NuttX has successfully booted and is, + apparently, running normally. If LD1 is flashing at approximately + 2Hz, then a fatal error has been detected and the system has halted. + +Buttons +------- + +Pushbutton B1, labelled "User", is connected to GPIO PI11. A high +value will be sensed when the button is depressed. + +Serial Console +============== + +The STM32F469G-DISCO uses USART1 connected to "Virtual COM", so when you +plug it on your computer it will be detected as a USB port (i.e. ttyACM0): + + ====== ========= ===== + V.COM FUNCTION GPIO + ====== ========= ===== + RXD USART1_RX PB7 + TXD USART1_TX PA9 + ====== ========= ===== + +All you need to do after flashing NuttX on this board is use a serial +console tool (minicom, picocom, screen, hyperterminal, teraterm, putty, +etc ) configured to 115200 8n1. + +Configurations +============== + +Common Configuration Information +-------------------------------- + +Each STM32F746G-DISCO configuration is maintained in a sub-directory and +can be selected as follow:: + + tools/configure.sh stm32f746g-disco: + +Where is one of the sub-directories listed below. + +NOTES: + +1. These configurations use the mconf-based configuration tool. To + change this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt + see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + +2. By default, these configurations use the USART1 for the serial + console. Pins are configured to that RX/TX are available at + pins D0 and D1 of the Arduion connectors. This should be compatible + with most RS-232 shields. + +3. All of these configurations are set up to build under Windows using the + "GNU Tools for ARM Embedded Processors" that is maintained by ARM + (unless stated otherwise in the description of the configuration). + + https://developer.arm.com/open-source/gnu-toolchain/gnu-rm + + As of this writing (2015-03-11), full support is difficult to find + for the Cortex-M7, but is supported by at least this release of + the ARM GNU tools: + + https://launchpadlibrarian.net/209776344/release.txt + + hat toolchain selection can easily be reconfigured using + 'make menuconfig'. Here are the relevant current settings: + + Build Setup:: + + CONFIG_HOST_WINDOWS=y : Window environment + CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows + + System Type -> Toolchain:: + + CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU ARM EABI toolchain + + NOTE: As of this writing, there are issues with using this tool at + the -Os level of optimization. This has not been proven to be a + compiler issue (as least not one that might not be fixed with a + well placed volatile qualifier). However, in any event, it is + recommend that you use not more that -O2 optimization. + +Configuration Directories +------------------------- + +nsh +--- + +Configures the NuttShell (NSH) located at apps/examples/nsh. The +Configuration enables the serial interfaces on USART1. Support for +built-in applications is enabled, but in the base configuration no +built-in applications are selected. + +netnsh +------ + +This configuration is similar to the nsh but a lot more hardware +peripherals are enabled, in particular Ethernet, as well as networking +support. It is similar to the stm32f769i-disco/netnsh +configuration. This configuration uses USART1 for the serial console. +USART1 is connected to the ST-link virtual com inside board.h to remove +the need of a extra serial connection to use this board. + +lgvl +---- + +STM32F746G-DISCO LittlevGL demo example. + +The LTDC is initialized during boot up. +This configuration uses USART1 for the serial console. +USART1 is connected to the ST-link virtual com inside board.h to remove +the need of a extra serial connection to use this board. +From the nsh command line execute the lvgldemo example:: + + nsh> lvgldemo + +The test will execute the calibration process and then run the +LittlevGL demo project. + +STM32F746G-DISCO LTDC Framebuffer demo example +============================================== + +Configure and build + +tools/configure.sh stm32f746g-disco:fb +make + +Configuration + +This configuration provides 1 LTDC with +16bpp pixel format and a resolution of 480x272. + +Loading + +st-flash write nuttx.bin 0x8000000 + +Executing + +The ltdc is initialized during boot up. Interaction with NSH is via the serial +console provided by ST-LINK USB at 115200 8N1 baud. +From the nsh comandline execute the fb example:: + + nsh> fb + +The test will put a pattern of concentric squares in the framebuffer and +terminate. + +STM32F746G-DISCO NX Terminal example +==================================== + +Configure and build + +tools/configure.sh stm32f746g-disco:nxterm +make + +Configuration + +This configuration provides 1 LTDC with +16bpp pixel format and a resolution of 480x272. + +Trickiest part of config is increasing max message size (CONFIG_MQ_MAXMSGSIZE=256). +NX server - client communication cannot be established with default value 8 bytes. + +Loading + +st-flash write nuttx.bin 0x8000000 + +or + +openocd -f interface/stlink.cfg -f target/stm32f7x.cfg +telnet localhost 4444 +> program nuttx verify reset + +Executing + +The ltdc is initialized during boot up. Interaction with NSH is via the serial +console provided by ST-LINK USB at 115200 8N1 baud. + +From the nsh comandline execute the example:: + + nsh> nxterm + +The test will show terminal window on the screen. + +STM32F746G-DISCO NX demo example +================================ + +Configure and build:: + + tools/configure.sh stm32f746g-disco:nxdemo + make + +Configuration + +This configuration provides 1 LTDC with +16bpp pixel format and a resolution of 480x272. + +Trickiest part of config is increasing max message size (CONFIG_MQ_MAXMSGSIZE=256). +NX server - client communication cannot be established with default value 8 bytes. + +Loading:: + + st-flash write nuttx.bin 0x8000000 + +or:: + + openocd -f interface/stlink.cfg -f target/stm32f7x.cfg + telnet localhost 4444 + > program nuttx verify reset + +Executing + +The ltdc is initialized during boot up. Interaction with NSH is via the serial +console provided by ST-LINK USB at 115200 8N1 baud. + +There are two graphics examples provided in this configuration: +- nxdemo +- nxhello + +Use help command to show list of examples available:: + + nsh> help + +From the nsh comandline execute the example:: + + nsh> nxdemo + +The test will draw animated lines, squares and circles on the device screen. diff --git a/boards/arm/stm32f7/stm32f769i-disco/README.txt b/Documentation/platforms/arm/stm32f7/boards/stm32f769i-disco/index.rst similarity index 57% rename from boards/arm/stm32f7/stm32f769i-disco/README.txt rename to Documentation/platforms/arm/stm32f7/boards/stm32f769i-disco/index.rst index 991b27462fb..f278989dbee 100644 --- a/boards/arm/stm32f7/stm32f769i-disco/README.txt +++ b/Documentation/platforms/arm/stm32f7/boards/stm32f769i-disco/index.rst @@ -1,5 +1,6 @@ -README -====== +=================== +ST STM32F769I-DISCO +=================== This README discusses issues unique to NuttX configurations for the STMicro STM32F769I-DISCO development board featuring the STM32F769NIH6 @@ -58,22 +59,24 @@ Development Environment LEDs and Buttons ================ - LEDs - ---- - The STM32F769I-DISCO board has numerous LEDs but only one, LD3 located - near the reset button, that can be controlled by software. +LEDs +---- - LD3 is controlled by PI1 which is also the SPI2_SCK at the Arduino - interface. One end of LD3 is grounded so a high output on PI1 will - illuminate the LED. +The STM32F769I-DISCO board has numerous LEDs but only one, LD3 located +near the reset button, that can be controlled by software. - This LED is not used by the board port unless CONFIG_ARCH_LEDS is defined. - In that case, the usage by the board port is defined in include/board.h - and src/stm32_leds.c. The LEDs are used to encode OS-related events as - follows: +LD3 is controlled by PI1 which is also the SPI2_SCK at the Arduino +interface. One end of LD3 is grounded so a high output on PI1 will +illuminate the LED. +This LED is not used by the board port unless CONFIG_ARCH_LEDS is defined. +In that case, the usage by the board port is defined in include/board.h +and src/stm32_leds.c. The LEDs are used to encode OS-related events as +follows: + + =================== ======================= ====== SYMBOL Meaning LD3 - ------------------- ----------------------- ------ + =================== ======================= ====== LED_STARTED NuttX has been started OFF LED_HEAPALLOCATE Heap has been allocated OFF LED_IRQSENABLED Interrupts enabled OFF @@ -82,47 +85,51 @@ LEDs and Buttons LED_SIGNAL In a signal handler N/C LED_ASSERTION An assertion failed N/C LED_PANIC The system has crashed FLASH + =================== ======================= ====== - Thus is LD3 is statically on, NuttX has successfully booted and is, - apparently, running normally. If LD3 is flashing at approximately - 2Hz, then a fatal error has been detected and the system has halted. +Thus is LD3 is statically on, NuttX has successfully booted and is, +apparently, running normally. If LD3 is flashing at approximately +2Hz, then a fatal error has been detected and the system has halted. - Buttons - ------- - Pushbutton B1, labelled "User", is connected to GPIO PI11. A high - value will be sensed when the button is depressed. +Buttons +------- + +Pushbutton B1, labelled "User", is connected to GPIO PI11. A high +value will be sensed when the button is depressed. Serial Console ============== - Use the serial interface the ST/LINK provides to the USB host. +Use the serial interface the ST/LINK provides to the USB host. Configurations ============== - Common Configuration Information - -------------------------------- - Each STM32F769I-DISCO configuration is maintained in a sub-directory and - can be selected as follow: +Common Configuration Information +-------------------------------- + +Each STM32F769I-DISCO configuration is maintained in a sub-directory and +can be selected as follow:: tools/configure.sh stm32f769i-disco: - Where is one of the sub-directories listed below. +Where is one of the sub-directories listed below. Configuration Directories ------------------------- - nsh: - --- - Configures the NuttShell (NSH) located at apps/examples/nsh. The - Configuration enables the serial interfaces on UART1. - Otherwise nothing is enabled, so that config is a starting point - for initial testing. - Support for builtin applications is enabled, but in the base - configuration no builtin applications are selected. +nsh +--- - 1. This config supports the PWM test (apps/examples/pwm) but this must - be manually enabled by selecting: +Configures the NuttShell (NSH) located at apps/examples/nsh. The +Configuration enables the serial interfaces on UART1. +Otherwise nothing is enabled, so that config is a starting point +for initial testing. +Support for builtin applications is enabled, but in the base +configuration no builtin applications are selected. + +1. This config supports the PWM test (apps/examples/pwm) but this must + be manually enabled by selecting:: CONFIG_PWM=y : Enable the generic PWM infrastructure CONFIG_EXAMPLES_PWM=y : Enable the PWM example app @@ -133,7 +140,8 @@ Configuration Directories CONFIG_STM32F7_TIM1_PWM=y CONFIG_STM32F7_TIM1_CHANNEL=4 - nsh-ehternet: - --- - Same as above but a lot more hardware peripherals enabled, - in particular ethernet, as well as networking stuff. +nsh-ehternet +------------ + +Same as above but a lot more hardware peripherals enabled, +in particular ethernet, as well as networking stuff. diff --git a/Documentation/platforms/arm/stm32f7/boards/stm32f777zit6-meadow/index.rst b/Documentation/platforms/arm/stm32f7/boards/stm32f777zit6-meadow/index.rst new file mode 100644 index 00000000000..6077bf1b614 --- /dev/null +++ b/Documentation/platforms/arm/stm32f7/boards/stm32f777zit6-meadow/index.rst @@ -0,0 +1,3 @@ +==================== +STM32f777ZIT6-MEADOW +==================== diff --git a/Documentation/platforms/arm/stm32f7/index.rst b/Documentation/platforms/arm/stm32f7/index.rst new file mode 100644 index 00000000000..513bce5b912 --- /dev/null +++ b/Documentation/platforms/arm/stm32f7/index.rst @@ -0,0 +1,434 @@ +========== +ST STM32F7 +========== + +Supported MCUs +============== + +TODO + +Peripheral Support +================== + +.. + Individual subsystems can be enabled: + + ========================= ========== + APB1 Peripheral + ========================= ========== + CONFIG_STM32F7_TIM2 TIM2 + CONFIG_STM32F7_TIM3 TIM3 + CONFIG_STM32F7_TIM4 TIM4 + CONFIG_STM32F7_TIM5 TIM5 + CONFIG_STM32F7_TIM6 TIM6 + CONFIG_STM32F7_TIM7 TIM7 + CONFIG_STM32F7_TIM12 TIM12 + CONFIG_STM32F7_TIM13 TIM13 + CONFIG_STM32F7_TIM14 TIM14 + CONFIG_STM32F7_LPTIM1 LPTIM1 + CONFIG_STM32F7_RTC RTC + CONFIG_STM32F7_BKP BKP Registers + CONFIG_STM32F7_WWDG WWDG + CONFIG_STM32F7_IWDG IWDG + CONFIG_STM32F7_SPI2 SPI2 + CONFIG_STM32F7_I2S2 I2S2 + CONFIG_STM32F7_SPI3 SPI3 + CONFIG_STM32F7_I2S3 I2S3 + CONFIG_STM32F7_SPDIFRX SPDIFRX + CONFIG_STM32F7_USART2 USART2 + CONFIG_STM32F7_USART3 USART3 + CONFIG_STM32F7_UART4 UART4 + CONFIG_STM32F7_UART5 UART5 + CONFIG_STM32F7_I2C1 I2C1 + CONFIG_STM32F7_I2C2 I2C2 + CONFIG_STM32F7_I2C3 I2C3 + CONFIG_STM32F7_I2C4 I2C4 + CONFIG_STM32F7_CAN1 CAN1 + CONFIG_STM32F7_CAN2 CAN2 + CONFIG_STM32F7_HDMICEC HDMI-CEC + CONFIG_STM32F7_PWR PWR + CONFIG_STM32F7_DAC DAC + CONFIG_STM32F7_UART7 UART7 + CONFIG_STM32F7_UART8 UART8 + ========================= ========== + + ========================= ========== + APB2 Peripheral + ========================= ========== + CONFIG_STM32F7_TIM1 TIM1 + CONFIG_STM32F7_TIM8 TIM8 + CONFIG_STM32F7_USART1 USART1 + CONFIG_STM32F7_USART6 USART6 + CONFIG_STM32F7_ADC ADC1 - ADC2 - ADC3 + CONFIG_STM32F7_SDMMC1 SDMMC1 + CONFIG_STM32F7_SPI1 SPI1 + CONFIG_STM32F7_SPI4 SPI4 + CONFIG_STM32F7_SYSCFG SYSCFG + CONFIG_STM32F7_EXTI EXTI + CONFIG_STM32F7_TIM9 TIM9 + CONFIG_STM32F7_TIM10 TIM10 + CONFIG_STM32F7_TIM11 TIM11 + CONFIG_STM32F7_SPI5 SPI5 + CONFIG_STM32F7_SPI6 SPI6 + CONFIG_STM32F7_SAI1 SAI1 + CONFIG_STM32F7_SAI2 SAI2 + CONFIG_STM32F7_LTDC LCD-TFT + ========================= ========== + + ========================= ========== + AHB1 Peripheral + ========================= ========== + CONFIG_STM32F7_CRC CRC + CONFIG_STM32F7_BKPSRAM BKPSRAM + CONFIG_STM32F7_DMA1 DMA1 + CONFIG_STM32F7_DMA2 DMA2 + CONFIG_STM32F7_ETHMAC Ethernet MAC + CONFIG_STM32F7_DMA2D Chrom-ART (DMA2D) + CONFIG_STM32F7_OTGHS USB OTG HS + ========================= ========== + + ========================= ========== + AHB2 Peripheral + ========================= ========== + CONFIG_STM32F7_OTGFS USB OTG FS + CONFIG_STM32F7_DCMI DCMI + CONFIG_STM32F7_CRYP CRYP + CONFIG_STM32F7_HASH HASH + CONFIG_STM32F7_RNG RNG + ========================= ========== + + ========================= ========== + AHB3 Peripheral + ========================= ========== + CONFIG_STM32F7_FMC FMC control registers + CONFIG_STM32F7_QUADSPI QuadSPI Control + ========================= ========== + +Porting STM32 F4 Drivers +======================== + +The STM32F746 is very similar to the STM32 F429 and many of the drivers +in the stm32/ directory could be ported here: ADC, BBSRAM, CAN, DAC, +DMA2D, FLASH, I2C, IWDG, LSE, LSI, LTDC, OTGFS, OTGHS, PM, Quadrature +Encoder, RNG, RTCC, SDMMC (was SDIO), Timer/counters, and WWDG. + +Many of these drivers would be ported very simply; many ports would just +be a matter of copying files and some seach-and-replacement. Like: + +1. Compare the two register definitions files; make sure that the STM32 + F4 peripheral is identical (or nearly identical) to the F7 + peripheral. If so then, + +2. Copy the register definition file from the stm32/chip directory to + the stm32f7/chip directory, making name changes as appropriate and + updating the driver for any minor register differences. + +3. Copy the corresponding C file (and possibly a matching .h file) from + the stm32/ directory to the stm32f7/ directory again with naming + changes and changes for any register differences. + +4. Update the Make.defs file to include the new C file in the build. + +For other files, particularly those that use DMA, the port will be +significantly more complex. That is because the STM32F7 has a D-Cache +and, as a result, we need to exercise much more care to maintain cache +coherency. There is a Wiki page discussing the issues of porting +drivers from the stm32/ to the stm32f7/ directories here: +https://cwiki.apache.org/confluence/display/NUTTX/Porting+Drivers+to+the+STM32+F7 + +Memory +------ + +CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):: + + CONFIG_RAM_SIZE=0x00010000 (64Kb) + +CONFIG_RAM_START - The start address of installed SRAM (SRAM1):: + + CONFIG_RAM_START=0x20010000 + CONFIG_RAM_SIZE=245760 + +This configurations use only SRAM1 for data storage. The heap includes +the remainder of SRAM1. If CONFIG_MM_REGIONS=2, then SRAM2 will be +included in the heap. + +DTCM SRAM is never included in the heap because it cannot be used for +DMA. A DTCM allocator is available, however, so that DTCM can be +managed with dtcm_malloc(), dtcm_free(), etc. + +In order to use FMC SRAM, the following additional things need to be +present in the NuttX configuration file: + +CONFIG_STM32F7_FMC_SRAM - Indicates that SRAM is available via the +FMC (as opposed to an LCD or FLASH). + +CONFIG_HEAP2_BASE - The base address of the SRAM in the FMC address space (hex) + +CONFIG_HEAP2_SIZE - The size of the SRAM in the FMC address space (decimal) + +CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt +stack. If defined, this symbol is the size of the interrupt +stack in bytes. If not defined, the user task stacks will be +used during interrupt handling. + +CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions + +Clock +----- + +CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock +configuration features.:: + + CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n + +CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation of delay loops + +TIMER +----- + +Timer devices may be used for different purposes. One special purpose is +to generate modulated outputs for such things as motor control. If CONFIG_STM32F7_TIMn +is defined (as above) then the following may also be defined to indicate that +the timer is intended to be used for pulsed output modulation, ADC conversion, +or DAC conversion. Note that ADC/DAC require two definition: Not only do you have +to assign the timer (n) for used by the ADC or DAC, but then you also have to +configure which ADC or DAC (m) it is assigned to.:: + + CONFIG_STM32F7_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 + CONFIG_STM32F7_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 + CONFIG_STM32F7_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 + CONFIG_STM32F7_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 + CONFIG_STM32F7_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 + +For each timer that is enabled for PWM usage, we need the following additional +configuration settings:: + + CONFIG_STM32F7_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} + +NOTE: The STM32 timers are each capable of generating different signals on +each of the four channels with different duty cycles. That capability is +not supported by this driver: Only one output channel per timer. + +JTAG +---- + +USART +----- + +CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART +m (m=4,5) for the console and ttys0 (default is the USART1). + +CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. +This specific the size of the receive buffer + +CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before +being sent. This specific the size of the transmit buffer + +CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be + +CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. + +CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity + +CONFIG_U[S]ARTn_2STOP - Two stop bits + +CAN +--- + +CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32F7_CAN1 or +CONFIG_STM32F7_CAN2 must also be defined) + +CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default Standard 11-bit IDs. + +CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. Default: 8 + +CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. Default: 4 + +CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback +mode for testing. The STM32 CAN driver does support loopback mode. + +CONFIG_STM32F7_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32F7_CAN1 is defined. + +CONFIG_STM32F7_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32F7_CAN2 is defined. + +CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6 + +CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7 + +CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an +dump of all CAN registers. + +SPI +--- + +CONFIG_STM32F7_SPI_INTERRUPTS - Select to enable interrupt driven SPI +support. Non-interrupt-driven, poll-waiting is recommended if the +interrupt rate would be to high in the interrupt driven case. + +CONFIG_STM32F7_SPIx_DMA - Use DMA to improve SPIx transfer performance. +Cannot be used with CONFIG_STM32F7_SPI_INTERRUPT. + +DMA +--- + +CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32F7_SDIO and CONFIG_STM32F7_DMA2. + +CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. Default: Medium + +CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: 4-bit transfer mode. + +USB +--- + +STM32 USB OTG FS Host Driver Support + +Pre-requisites:: + + CONFIG_USBDEV - Enable USB device support + CONFIG_USBHOST - Enable USB host support + CONFIG_STM32F7_OTGFS - Enable the STM32 USB OTG FS block + CONFIG_STM32F7_SYSCFG - Needed + CONFIG_SCHED_WORKQUEUE - Worker thread support is required + +Options:: + + CONFIG_STM32F7_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. + Default 128 (512 bytes) + CONFIG_STM32F7_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO + in 32-bit words. Default 96 (384 bytes) + CONFIG_STM32F7_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit + words. Default 96 (384 bytes) + CONFIG_STM32F7_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 + CONFIG_STM32F7_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever + want to do that? + CONFIG_STM32F7_USBHOST_REGDEBUG - Enable very low-level register access + debug. Depends on CONFIG_DEBUG_FEATURES. + CONFIG_STM32F7_USBHOST_PKTDUMP - Dump all incoming and outgoing USB + packets. Depends on CONFIG_DEBUG_FEATURES. + +FPU +=== + +FPU Configuration Options +------------------------- + +There are two version of the FPU support built into the STM32 port. + +1. Non-Lazy Floating Point Register Save + + In this configuration floating point register save and restore is + implemented on interrupt entry and return, respectively. In this + case, you may use floating point operations for interrupt handling + logic if necessary. This FPU behavior logic is enabled by default + with:: + + CONFIG_ARCH_FPU=y + +2. Lazy Floating Point Register Save. + + An alternative mplementation only saves and restores FPU registers only + on context switches. This means: (1) floating point registers are not + stored on each context switch and, hence, possibly better interrupt + performance. But, (2) since floating point registers are not saved, + you cannot use floating point operations within interrupt handlers. + + This logic can be enabled by simply adding the following to your .config + file:: + + CONFIG_ARCH_FPU=y + +SPI Test +======== + +The builtin SPI test facility can be enabled with the following settings:: + + +CONFIG_STM32F7_SPI=y + +CONFIG_STM32F7_SPI1=y + +CONFIG_STM32F7_SPI2=y + +CONFIG_STM32F7_SPI3=y + + +# CONFIG_STM32F7_SPI_INTERRUPTS is not set + +# CONFIG_STM32F7_SPI1_DMA is not set + +# CONFIG_STM32F7_SPI2_DMA is not set + +# CONFIG_STM32F7_SPI3_DMA is not set + # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set + + +CONFIG_NUCLEO_SPI_TEST=y + +CONFIG_NUCLEO_SPI_TEST_MESSAGE="Hello World" + +CONFIG_NUCLEO_SPI1_TEST=y + +CONFIG_NUCLEO_SPI1_TEST_FREQ=1000000 + +CONFIG_NUCLEO_SPI1_TEST_BITS=8 + +CONFIG_NUCLEO_SPI1_TEST_MODE3=y + + +CONFIG_NUCLEO_SPI2_TEST=y + +CONFIG_NUCLEO_SPI2_TEST_FREQ=12000000 + +CONFIG_NUCLEO_SPI2_TEST_BITS=8 + +CONFIG_NUCLEO_SPI2_TEST_MODE3=y + + +CONFIG_NUCLEO_SPI3_TEST=y + +CONFIG_NUCLEO_SPI3_TEST_FREQ=40000000 + +CONFIG_NUCLEO_SPI3_TEST_BITS=8 + +CONFIG_NUCLEO_SPI3_TEST_MODE3=y + + +CONFIG_BOARDCTL=y + +CONFIG_NSH_ARCHINIT=y + +Development Environment +======================= + +Either Linux or Cygwin on Windows can be used for the development environment. +The source has been built only using the GNU toolchain (see below). Other +toolchains will likely cause problems. + +All testing has been conducted using the GNU toolchain from ARM for Linux. +found here https://developer.arm.com/open-source/gnu-toolchain/gnu-rm/4.9/4.9-2015-q3-update/+download/gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2 + +If you change the default toolchain, then you may also have to modify the +PATH environment variable to include the path to the toolchain binaries. + +IDEs +==== + +NuttX is built using command-line make. It can be used with an IDE, but some +effort will be required to create the project. + +Makefile Build +-------------- + +Under Eclipse, it is pretty easy to set up an "empty makefile project" and +simply use the NuttX makefile to build the system. That is almost for free +under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty +makefile project in order to work with Windows (Google for "Eclipse Cygwin" - +there is a lot of help on the internet). + +Basic configuration & build steps +================================== + +A GNU GCC-based toolchain is assumed. The PATH environment variable should +be modified to point to the correct path to the Cortex-M7 GCC toolchain (if +different from the default in your PATH variable). + +- Configures nuttx creating .config file in the nuttx directory.:: + + $ tools/configure.sh nucleo-f746zg:nsh + +- Refreshes the .config file with the latest available configurations.:: + + $ make oldconfig + +- Select the features you want in the build.:: + + $ make menuconfig + +- Builds NuttX with the features you selected.:: + + $ make + +Supported Boards +================ + +.. toctree:: + :glob: + :maxdepth: 1 + + boards/*/* diff --git a/boards/arm/stm32f7/nucleo-144/README.txt b/boards/arm/stm32f7/nucleo-144/README.txt deleted file mode 100644 index 652d9b0e835..00000000000 --- a/boards/arm/stm32f7/nucleo-144/README.txt +++ /dev/null @@ -1,605 +0,0 @@ -README -====== - -This README discusses issues unique to NuttX configurations for the STMicro -Nucleo-144 board. See ST document STM32 Nucleo-144 boards (UM1974): - -https://www.st.com/resource/en/user_manual/dm00244518.pdf - -Contents -======== - - - Nucleo-144 Boards - - Nucleo F722ZE - - Nucleo F746ZG - - Nucleo F767ZI - - Development Environment - - IDEs - - Basic configuration & build steps - - Hardware - - Button - - LED - - U[S]ARTs and Serial Consoles - - SPI - - SDIO - MMC - - SPI Test - - Configurations - f7xx-nsh - f7xx-evalos - -Nucleo-144 Boards: -================= - -The Nucleo-144 is a standard board for use with several STM32 parts in the -LQFP144 package. Variants include - - STM32 Part Board Variant Name - ------------- ------------------ - STM32F207ZGT6 NUCLEO-F207ZG - STM32F303ZET6 NUCLEO-F303ZE - STM32F429ZIT6 NUCLEO-F429ZI - STM32F446ZET6 NUCLEO-F446ZE - STM32F722ZET6 NUCLEO-F722ZE - STM32F746ZGT6 NUCLEO-F746ZG - STM32F756ZGT6 NUCLEO-F756ZG - STM32F767ZIT6 NUCLEO-F767ZI - STM32L496ZGT6 NUCLEO-L496ZG - STM32L496ZGT6P NUCLEO-L496ZG-P - STM32L4A6ZGT6 NUCLEO-L4A6ZG - STM32L4R5ZIT6 NUCLEO-L4R5ZI - STM32L4R5ZIT6P NUCLEO-L4R5ZI-P - ------------- ------------------ - -This directory is intended to support all STM32F7 Nucleo-144 variants since -the boards are identical, differing only in the installed part. This common -board design provides uniformity in the documentation from ST and should -allow us to quickly change configurations by just cloning a configuration -and changing the CPU choice and board initialization. Unfortunately for -the developer, the CPU specific information must be extracted from the -common information in the documentation. - -The NUCLEO-L496ZG and NUCLEO-L496ZG-P boards are not supported by this -directory, but by boards/arm/stm32l4/nucleo-l496zg. Any other STM32L4 -Nucleo-144 boards are also not supported by this directory. - -Please read the User Manual UM1727: Getting started with STM32 Nucleo board -software development tools and take note of the Powering options for the -board (6.3 Power supply and power selection) and the Solder bridges based -hardware configuration changes that are configurable (6.11 Solder bridges). - -Common Board Features: ---------------------- - - Peripherals: 8 leds, 2 push button (3 LEDs, 1 button) under software - control - Debug: STLINK/V2-1 debugger/programmer Uses a STM32F103CB to - provide a ST-Link for programming, debug similar to the - OpenOcd FTDI function - USB to JTAG front-end. - - Expansion I/F: ST Zio and Extended Arduino and Morpho Headers - -Nucleo F746ZG -============= - -ST Nucleo F746ZG board from ST Micro is supported. See - -http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f746zg.html - -The Nucleo F746ZG order part number is NUCLEO-F746ZG. It is one member of -the STM32 Nucleo-144 board family. - -NUCLEO-F746ZG Features: ----------------------- - - Microprocessor: STM32F746ZGT6 Core: ARM 32-bit Cortex®-M7 CPU with FPU, - L1-cache: 4KB data cache and 4KB instruction cache, up to - 216 MHz, MPU, and DSP instructions. - Memory: 1024 KB Flash 320KB of SRAM (including 64KB of data TCM RAM) - + 16KB of instruction TCM RAM + 4KB of backup SRAM - ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in - triple interleaved mode - DMA: 2 X 16-stream DMA controllers with FIFOs and burst support - Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit low power), - two 32-bit timers, 2x watchdogs, SysTick - GPIO: 114 I/O ports with interrupt capability - LCD: LCD-TFT Controller with (DMA2D), Parallel interface - I2C: 4 × I2C interfaces (SMBus/PMBus) - U[S]ARTs: 4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, - modem control) - SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S - for audio class accuracy via internal audio PLL or external - clock - QSPI: Dual mode Quad-SPI - SAIs: 2 Serial Audio Interfaces - CAN: 2 X CAN interface - SDMMC interface - SPDIFRX interface - USB: USB 2.0 full-speed device/host/OTG controller with on-chip - PHY - 10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, - MII/RMII - Camera Interface: 8/14 Bit - CRC calculation unit - TRG: True random number generator - RTC - -See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG for additional -information about this board. - -Nucleo F767ZI -============= - -ST Nucleo F7467ZI board from ST Micro is supported. See - -http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f767zi.html - -The Nucleo F767ZI order part number is NUCLEO-F767ZI. It is one member of -the STM32 Nucleo-144 board family. - -NUCLEO-F767ZI Features: ----------------------- - - Microprocessor: STM32F767ZIT6 Core: ARM 32-bit Cortex®-M7 CPU with DPFPU, - L1-cache: 16KB data cache and 16KB instruction cache, up to - 216 MHz, MPU, and DSP instructions. - Memory: 2048 KB Flash 512KB of SRAM (including 128KB of data TCM RAM) - + 16KB of instruction TCM RAM + 4KB of backup SRAM - ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in - triple interleaved mode - DMA: 2 X 16-stream DMA controllers with FIFOs and burst support - Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit low power), - two 32-bit timers, 2x watchdogs, SysTick - GPIO: 114 I/O ports with interrupt capability - LCD: LCD-TFT Controller with (DMA2D), Parallel interface - I2C: 4 × I2C interfaces (SMBus/PMBus) - U[S]ARTs: 4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, - modem control) - SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S - for audio class accuracy via internal audio PLL or external - clock - QSPI: Dual mode Quad-SPI - SAIs: 2 Serial Audio Interfaces - CAN: 3 X CAN interface - SDMMC interface - SPDIFRX interface - USB: USB 2.0 full/High-speed device/host/OTG controller with on-chip - PHY - 10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, - MII/RMII - Camera Interface: 8/14 Bit - CRC calculation unit - TRG: True random number generator - RTC subsecond accuracy, hardware calendar - -For pinout and details Check NUCLEO-F767ZI page on developer.mbed.org: -https://os.mbed.com/platforms/ST-Nucleo-F767ZI/ - -Also https://developer.mbed.org/platforms/ST-Nucleo-F746ZG -may contain some related useful information. - -Development Environment -======================= - - Either Linux or Cygwin on Windows can be used for the development environment. - The source has been built only using the GNU toolchain (see below). Other - toolchains will likely cause problems. - - All testing has been conducted using the GNU toolchain from ARM for Linux. - found here https://developer.arm.com/open-source/gnu-toolchain/gnu-rm/4.9/4.9-2015-q3-update/+download/gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2 - - If you change the default toolchain, then you may also have to modify the - PATH environment variable to include the path to the toolchain binaries. - -IDEs -==== - - NuttX is built using command-line make. It can be used with an IDE, but some - effort will be required to create the project. - - Makefile Build - -------------- - Under Eclipse, it is pretty easy to set up an "empty makefile project" and - simply use the NuttX makefile to build the system. That is almost for free - under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty - makefile project in order to work with Windows (Google for "Eclipse Cygwin" - - there is a lot of help on the internet). - -Basic configuration & build steps -================================== - - A GNU GCC-based toolchain is assumed. The PATH environment variable should - be modified to point to the correct path to the Cortex-M7 GCC toolchain (if - different from the default in your PATH variable). - - - Configures nuttx creating .config file in the nuttx directory. - $ tools/configure.sh nucleo-f746zg:nsh - - Refreshes the .config file with the latest available configurations. - $ make oldconfig - - Select the features you want in the build. - $ make menuconfig - - Builds NuttX with the features you selected. - $ make - -Hardware -======== - - GPIO - there are 144 I/O lines on the STM32F7xxZxT6 with various pins pined out - on the Nucleo 144. - - See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic - pinouts. - - Keep in mind that: - 1) The I/O is 3.3 Volt not 5 Volt like on the Arduino products. - 2) The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder - Blobs (SB) that can alter the factory configuration. We will note SB - in effect but will assume the factory default settings. - - Our main concern is establishing a console and LED utilization for - debugging. Because so many pins can be multiplexed with so many functions, - the above mentioned graphic may be helpful in identifying a serial port. - - There are 5 choices that can be made from the menuconfig: - - CONFIG_NUCLEO_CONSOLE_ARDUINO or CONFIG_NUCLEO_CONSOLE_MORPHO or - CONFIG_NUCLEO_CONSOLE_MORPHO_UART4 or CONFIG_NUCLEO_CONSOLE_VIRTUAL or - CONFIG_NUCLEO_CONSOLE_NONE - - The CONFIG_NUCLEO_CONSOLE_NONE makes no preset for the console. You should still - visit the U[S]ART selection and Device Drivers to disable any U[S]ART remaining. - - The CONFIG_NUCLEO_CONSOLE_ARDUINO configurations assume that you are using a - standard Arduino RS-232 shield with the serial interface with RX on pin D0 and - TX on pin D1 from USART6: - - -------- --------------- - STM32F7 - ARDUIONO FUNCTION GPIO - -- ----- --------- ----- - DO RX USART6_RX PG9 - D1 TX USART6_TX PG14 - -- ----- --------- ----- - - The CONFIG_NUCLEO_CONSOLE_MORPHO configurations uses Serial Port 8 (USART8) - with TX on PE1 and RX on PE0. - - Serial - ------ - SERIAL_RX PE_0 - SERIAL_TX PE_1 - - The CONFIG_NUCLEO_CONSOLE_MORPHO_UART4 configurations uses Serial Port 4 (UART4) - with TX on PA1 and RX on PA0. Zero Ohm resistor / solder short at - SB13 must be removed/open. (Disables Ethernet MII clocking.) - - Serial - ------ - SERIAL_RX PA_1 CN11 30 - SERIAL_TX PA_0 CN11 28 - - The CONFIG_NUCLEO_CONSOLE_VIRTUAL configurations uses Serial Port 3 (USART3) - with TX on PD8 and RX on PD9. - - Serial - ------ - SERIAL_RX PD9 - SERIAL_TX PD8 - - These signals are internally connected to the on board ST-Link. - - Of course if your design has used those pins you can choose a completely - different U[S]ART to use as the console. In that Case, you will need to edit - the include/board.h to select different U[S]ART and / or pin selections. - - Buttons - ------- - B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173 - ON and SB180 OFF) - - LEDs - ---- - The Board provides a 3 user LEDs, LD1-LD3 - LED1 (Green) PB_0 (SB120 ON and SB119 OFF) - LED2 (Blue) PB_7 (SB139 ON) - LED3 (Red) PB_14 (SP118 ON) - - - When the I/O is HIGH value, the LEDs are on. - - When the I/O is LOW, the LEDs are off. - - These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is - defined. In that case, the usage by the board port is defined in - include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS - related events as follows when the LEDs are available: - - SYMBOL Meaning RED GREEN BLUE - ------------------- ----------------------- --- ----- ---- - - LED_STARTED NuttX has been started OFF OFF OFF - LED_HEAPALLOCATE Heap has been allocated OFF OFF ON - LED_IRQSENABLED Interrupts enabled OFF ON OFF - LED_STACKCREATED Idle stack created OFF ON ON - LED_INIRQ In an interrupt NC NC ON (momentary) - LED_SIGNAL In a signal handler NC ON OFF (momentary) - LED_ASSERTION An assertion failed ON NC ON (momentary) - LED_PANIC The system has crashed ON OFF OFF (flashing 2Hz) - LED_IDLE MCU is is sleep mode ON OFF OFF - -OFF - means that the OS is still initializing. Initialization is very fast - so if you see this at all, it probably means that the system is - hanging up somewhere in the initialization phases. - -GREEN - This means that the OS completed initialization. - -BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is - illuminated and extinguished when the interrupt or signal handler - exits. - -VIOLET - If a recovered assertion occurs, the RED and blue LED will be - illuminated briefly while the assertion is handled. You will - probably never see this. - -Flashing RED - In the event of a fatal crash, all other LEDs will be - extinguished and RED LED will FLASH at a 2Hz rate. - - Thus if the GREEN LED is lit, NuttX has successfully booted and is, - apparently, running normally. If the RED LED is flashing at - approximately 2Hz, then a fatal error has been detected and the system has - halted. - -Serial Consoles -=============== - - USART6 (CONFIG_NUCLEO_CONSOLE_ARDUINO) - ------ - STM32F7 - ARDUINO FUNCTION GPIO - -- ----- --------- ----- - DO RX USART6_RX PG9 - D1 TX USART6_TX PG14 - -- ----- --------- ----- - - You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL - - Nucleo 144 FTDI TTL-232R-3V3 - ------------- ------------------- - TXD - D1-TXD - RXD - Pin 5 (Yellow) - RXD - D0-RXD - TXD - Pin 4 (Orange) - GND GND - GND Pin 1 (Black) - ------------- ------------------- - - *Note you will be reverse RX/TX - - Use make menuconfig to configure USART6 as the console: - - CONFIG_STM32F7_USART6=y - CONFIG_USARTs_SERIALDRIVER=y - CONFIG_USARTS_SERIAL_CONSOLE=y - CONFIG_USART6_RXBUFSIZE=256 - CONFIG_USART6_TXBUFSIZE=256 - CONFIG_USART6_BAUD=115200 - CONFIG_USART6_BITS=8 - CONFIG_USART6_PARITY=0 - CONFIG_USART6_2STOP=0 - - USART8 (CONFIG_NUCLEO_CONSOLE_MORPHO) - ------ - - Pins and Connectors: - FUNC GPIO Connector - Pin NAME - ---- --- ------- ---- - TXD: PE1 CN11-61, PE1 - RXD: PE0 CN12-64, PE0 - CN10-33, D34 - ---- --- ------- ---- - - You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL - - Nucleo 144 FTDI TTL-232R-3V3 - ------------- ------------------- - TXD - CN11-61 - RXD - Pin 5 (Yellow) - RXD - CN12-64 - TXD - Pin 4 (Orange) - GND CN12-63 - GND Pin 1 (Black) - ------------- ------------------- - - *Note you will be reverse RX/TX - - Use make menuconfig to configure USART8 as the console: - - CONFIG_STM32F7_UART8=y - CONFIG_UART8_SERIALDRIVER=y - CONFIG_UART8_SERIAL_CONSOLE=y - CONFIG_UART8_RXBUFSIZE=256 - CONFIG_UART8_TXBUFSIZE=256 - CONFIG_UART8_BAUD=115200 - CONFIG_UART8_BITS=8 - CONFIG_UART8_PARITY=0 - CONFIG_UART8_2STOP=0 - - Virtual COM Port (CONFIG_NUCLEO_CONSOLE_VIRTUAL) - ---------------- - Yet another option is to use USART3 and the USB virtual COM port. This - option may be more convenient for long term development, but is painful - to use during board bring-up. - - Solder Bridges. This configuration requires: - - PD8 USART3 TX SB5 ON and SB7 OFF (Default) - PD9 USART3 RX SB6 ON and SB4 OFF (Default) - - Configuring USART3 is the same as given above but add the S and #3. - - Question: What BAUD should be configure to interface with the Virtual - COM port? 115200 8N1? - - Default - ------- - As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the - virtual COM port is enabled. - -SPI ---- - Since this board is so generic, having a quick way to set the SPI - configuration seams in order. So the board provides a quick test - that can be selected vi CONFIG_NUCLEO_SPI_TEST that will initialize - the selected buses (SPI1-SPI3) and send some text on the bus at - application initialization time board_app_initialize. - -SDIO ----- - To test the SD performance one can use a SparkFun microSD Sniffer - from https://www.sparkfun.com/products/9419 or similar board - and connect it as follows: - - VCC V3.3 CN11 16 - GND GND CN11-8 - CMD PD2 CN11-4 - CLK PC12 CN11-3 - DAT0 - PC8 CN12-2 - DAT1 - PC9 CN12-1 - DAT2 PC10 CN11-1 - CD PC11 CN11-2 - -SPI Test -======== - - The builtin SPI test facility can be enabled with the following settings: - - +CONFIG_STM32F7_SPI=y - +CONFIG_STM32F7_SPI1=y - +CONFIG_STM32F7_SPI2=y - +CONFIG_STM32F7_SPI3=y - - +# CONFIG_STM32F7_SPI_INTERRUPTS is not set - +# CONFIG_STM32F7_SPI1_DMA is not set - +# CONFIG_STM32F7_SPI2_DMA is not set - +# CONFIG_STM32F7_SPI3_DMA is not set - # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set - - +CONFIG_NUCLEO_SPI_TEST=y - +CONFIG_NUCLEO_SPI_TEST_MESSAGE="Hello World" - +CONFIG_NUCLEO_SPI1_TEST=y - +CONFIG_NUCLEO_SPI1_TEST_FREQ=1000000 - +CONFIG_NUCLEO_SPI1_TEST_BITS=8 - +CONFIG_NUCLEO_SPI1_TEST_MODE3=y - - +CONFIG_NUCLEO_SPI2_TEST=y - +CONFIG_NUCLEO_SPI2_TEST_FREQ=12000000 - +CONFIG_NUCLEO_SPI2_TEST_BITS=8 - +CONFIG_NUCLEO_SPI2_TEST_MODE3=y - - +CONFIG_NUCLEO_SPI3_TEST=y - +CONFIG_NUCLEO_SPI3_TEST_FREQ=40000000 - +CONFIG_NUCLEO_SPI3_TEST_BITS=8 - +CONFIG_NUCLEO_SPI3_TEST_MODE3=y - - +CONFIG_BOARDCTL=y - +CONFIG_NSH_ARCHINIT=y - -Configurations -============== - -f7xx-nsh: ---------- - - Configures the NuttShell (nsh) located at apps/examples/nsh for the - Nucleo-144 boards. The Configuration enables the serial interfaces - on USART6. Support for builtin applications is enabled, but in the base - configuration no builtin applications are selected (see NOTES below). - - NOTES: - - 1. This configuration uses the mconf-based configuration tool. To - change this configuration using that tool, you should: - - a. Build and install the kconfig-mconf tool. See nuttx/README.txt - see additional README.txt files in the NuttX tools repository. - - b. If this is the initial configuration then execute - - ./tools/configure.sh nucleo-144:nsh - - in nuttx/ in order to start configuration process. - Caution: Doing this step more than once will overwrite .config with - the contents of the nucleo-144/nsh/defconfig file. - - c. Execute 'make oldconfig' in nuttx/ in order to refresh the - configuration. - - d. Execute 'make menuconfig' in nuttx/ in order to start the - reconfiguration process. - - e. Save the .config file to reuse it in the future starting at step d. - - 2. By default, this configuration uses the ARM GNU toolchain - for Linux. That can easily be reconfigured, of course. - - CONFIG_HOST_LINUX=y : Builds under Linux - CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : ARM GNU for Linux - - 3. The serial console may be configured to use either USART3 (which would - correspond to the Virtual COM port) or with the console device - configured for USART6 to support an Arduino serial shield (see - instructions above under "Serial Consoles). You will need to check the - defconfig file to see how the console is set up and, perhaps, modify - the configuration accordingly. - - To select the Virtual COM port: - - -CONFIG_NUCLEO_CONSOLE_ARDUINO - +CONFIG_NUCLEO_CONSOLE_VIRTUAL=y - -CONFIG_USART6_SERIAL_CONSOLE=y - +CONFIG_USART3_SERIAL_CONSOLE=y - - To select the Arduino serial shield: - - -CONFIG_NUCLEO_CONSOLE_VIRTUAL=y - +CONFIG_NUCLEO_CONSOLE_ARDUINO - -CONFIG_USART3_SERIAL_CONSOLE=y - +CONFIG_USART6_SERIAL_CONSOLE=y - - Default values for other settings associated with the select USART should - be correct. - -f7xx-evalos: ------------- - - This configuration is designed to test the features of the board. - - Configures the NuttShell (nsh) located at apps/examples/nsh for the - Nucleo-144 boards. The console is available on serial interface USART3, - which is accessible over the USB ST-Link interface. - - Configures nsh with advanced features such as autocompletion. - - Configures the on-board LEDs to work with the 'leds' example app. - - Configures the 'helloxx' example app. - - Adds character device for i2c1 - - Tries to register mpu60x0 IMU to i2c1 - - NOTES: - - 1. This configuration uses the mconf-based configuration tool. To - change this configuration using that tool, you should: - - a. Build and install the kconfig-mconf tool. See nuttx/README.txt - see additional README.txt files in the NuttX tools repository. - - b. If this is the initial configuration then execute - - ./tools/configure.sh nucleo-144:evalos - - in nuttx/ in order to start configuration process. - Caution: Doing this step more than once will overwrite .config with - the contents of the nucleo-144/evalos/defconfig file. - - c. Execute 'make oldconfig' in nuttx/ in order to refresh the - configuration. - - d. Execute 'make menuconfig' in nuttx/ in order to start the - reconfiguration process. - - e. Save the .config file to reuse it in the future starting at step d. - - 2. By default, this configuration uses the ARM GNU toolchain - for Linux. That can easily be reconfigured, of course. - - CONFIG_HOST_LINUX=y : Builds under Linux - CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : ARM GNU for Linux diff --git a/boards/arm/stm32f7/steval-eth001v1/README.txt b/boards/arm/stm32f7/steval-eth001v1/README.txt deleted file mode 100644 index 01f76b40e55..00000000000 --- a/boards/arm/stm32f7/steval-eth001v1/README.txt +++ /dev/null @@ -1,18 +0,0 @@ -README -====== - - This README discusses issues unique to NuttX configurations for the - STMicro STEVAL-ETH001V1 servo drive evaluation board. - The STEVAL-ETH001V1 board is based on the STM32F767ZI MCU (2Mbytes FLASH - and 512Kbytes of SRAM). - - The boards features: - - - Three-phase motor driver inverter based on STDRIVE101 gate driver and - STH270N8F7-2 power MOSFET - - NETX90 network controller - - Operating supply voltage up to 48 V with a max. overvoltage robustness - of 60 V - - Motor brake dissipative energy circuit - - Digital actuation section for industrial loads - - RS485 interface for digital encoder and host interface diff --git a/boards/arm/stm32f7/stm32f746g-disco/README.txt b/boards/arm/stm32f7/stm32f746g-disco/README.txt deleted file mode 100644 index 91fcc2693b4..00000000000 --- a/boards/arm/stm32f7/stm32f746g-disco/README.txt +++ /dev/null @@ -1,537 +0,0 @@ -README -====== - -This README discusses issues unique to NuttX configurations for the -STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 -MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash -memory and 300Kb SRAM. The board features: - - - On-board ST-LINK/V2 for programming and debugging, - - Mbed-enabled (mbed.org) - - 4.3-inch 480x272 color LCD-TFT with capacitive touch screen - - Camera connector - - SAI audio codec - - Audio line in and line out jack - - Stereo speaker outputs - - Two ST MEMS microphones - - SPDIF RCA input connector - - Two pushbuttons (user and reset) - - 128-Mbit Quad-SPI Flash memory - - 128-Mbit SDRAM (64 Mbits accessible) - - Connector for microSD card - - RF-EEPROM daughterboard connector - - USB OTG HS with Micro-AB connectors - - USB OTG FS with Micro-AB connectors - - Ethernet connector compliant with IEEE-802.3-2002 - -Refer to the http://www.st.com website for further information about this -board (search keyword: stm32f746g-disco) - -Contents -======== - - - STATUS - - Development Environment - - LEDs and Buttons - - Serial Console - - Porting STM32 F4 Drivers - - FPU - - STM32F746G-DISCO-specific Configuration Options - - Configurations - -STATUS -====== - - 2015-07-19: The basic NSH configuration is functional using a serial - console on USART1 (Virtual COM, i.e. ttyACM0). Very few other drivers - are in place yet. - - 2015-07-20: STM32 F7 Ethernet appears to be functional, but has had - only light testing. - -Development Environment -======================= - - The Development environments for the STM32F746G-DISCO board are identical - to the environments for other STM32F boards. For full details on the - environment options and setup, see the README.txt file in the - boards/arm/stm32f7/stm32f746g-disco directory. - -LEDs and Buttons -================ - - LEDs - ---- - The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located - near the reset button, that can be controlled by software (LD2 is a power - indicator, LD3-6 indicate USB status, LD7 is controlled by the ST-Link). - - LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino - interface. One end of LD1 is grounded so a high output on PI1 will - illuminate the LED. - - This LED is not used by the board port unless CONFIG_ARCH_LEDS is defined. - In that case, the usage by the board port is defined in include/board.h - and src/stm32_leds.c. The LEDs are used to encode OS-related events as - follows: - - SYMBOL Meaning LD1 - ------------------- ----------------------- ------ - LED_STARTED NuttX has been started OFF - LED_HEAPALLOCATE Heap has been allocated OFF - LED_IRQSENABLED Interrupts enabled OFF - LED_STACKCREATED Idle stack created ON - LED_INIRQ In an interrupt N/C - LED_SIGNAL In a signal handler N/C - LED_ASSERTION An assertion failed N/C - LED_PANIC The system has crashed FLASH - - Thus is LD1 is statically on, NuttX has successfully booted and is, - apparently, running normally. If LD1 is flashing at approximately - 2Hz, then a fatal error has been detected and the system has halted. - - Buttons - ------- - Pushbutton B1, labelled "User", is connected to GPIO PI11. A high - value will be sensed when the button is depressed. - -Serial Console -============== - - The STM32F469G-DISCO uses USART1 connected to "Virtual COM", so when you - plug it on your computer it will be detected as a USB port (i.e. ttyACM0): - - -------- --------------- - STM32F7 - V.COM FUNCTION GPIO - ----- --------- ----- - RXD USART1_RX PB7 - TXD USART1_TX PA9 - ------ --------- ----- - - All you need to do after flashing NuttX on this board is use a serial - console tool (minicom, picocom, screen, hyperterminal, teraterm, putty, - etc ) configured to 115200 8n1. - -Porting STM32 F4 Drivers -======================== - - The STM32F746 is very similar to the STM32 F429 and many of the drivers - in the stm32/ directory could be ported here: ADC, BBSRAM, CAN, DAC, - DMA2D, FLASH, I2C, IWDG, LSE, LSI, LTDC, OTGFS, OTGHS, PM, Quadrature - Encoder, RNG, RTCC, SDMMC (was SDIO), Timer/counters, and WWDG. - - Many of these drivers would be ported very simply; many ports would just - be a matter of copying files and some seach-and-replacement. Like: - - 1. Compare the two register definitions files; make sure that the STM32 - F4 peripheral is identical (or nearly identical) to the F7 - peripheral. If so then, - 2. Copy the register definition file from the stm32/chip directory to - the stm32f7/chip directory, making name changes as appropriate and - updating the driver for any minor register differences. - 3. Copy the corresponding C file (and possibly a matching .h file) from - the stm32/ directory to the stm32f7/ directory again with naming - changes and changes for any register differences. - 4. Update the Make.defs file to include the new C file in the build. - - For other files, particularly those that use DMA, the port will be - significantly more complex. That is because the STM32F7 has a D-Cache - and, as a result, we need to exercise much more care to maintain cache - coherency. There is a Wiki page discussing the issues of porting - drivers from the stm32/ to the stm32f7/ directories here: - https://cwiki.apache.org/confluence/display/NUTTX/Porting+Drivers+to+the+STM32+F7 - -FPU -=== - -FPU Configuration Options -------------------------- - -There are two version of the FPU support built into the STM32 port. - -1. Non-Lazy Floating Point Register Save - - In this configuration floating point register save and restore is - implemented on interrupt entry and return, respectively. In this - case, you may use floating point operations for interrupt handling - logic if necessary. This FPU behavior logic is enabled by default - with: - - CONFIG_ARCH_FPU=y - -2. Lazy Floating Point Register Save. - - An alternative mplementation only saves and restores FPU registers only - on context switches. This means: (1) floating point registers are not - stored on each context switch and, hence, possibly better interrupt - performance. But, (2) since floating point registers are not saved, - you cannot use floating point operations within interrupt handlers. - - This logic can be enabled by simply adding the following to your .config - file: - - CONFIG_ARCH_FPU=y - -STM32F746G-DISCO-specific Configuration Options -=============================================== - - CONFIG_ARCH - Identifies the arch/ subdirectory. This should - be set to: - - CONFIG_ARCH=arm - - CONFIG_ARCH_family - For use in C code: - - CONFIG_ARCH_ARM=y - - CONFIG_ARCH_architecture - For use in C code: - - CONFIG_ARCH_CORTEXM7=y - - CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory - - CONFIG_ARCH_CHIP=stm32f7 - - CONFIG_ARCH_CHIP_name - For use in C code to identify the exact - chip: - - CONFIG_ARCH_CHIP_STM32F746=y - - CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock - configuration features. - - CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n - - CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and, - hence, the board that supports the particular chip or SoC. - - CONFIG_ARCH_BOARD=stm32f746g-disco (for the STM32F746G-DISCO development board) - - CONFIG_ARCH_BOARD_name - For use in C code - - CONFIG_ARCH_BOARD_STM32F746G_DISCO=y - - CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation - of delay loops - - CONFIG_ENDIAN_BIG - should not be defined. - - CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case): - - CONFIG_RAM_SIZE=0x00010000 (64Kb) - - CONFIG_RAM_START - The start address of installed SRAM (SRAM1) - - CONFIG_RAM_START=0x20010000 - CONFIG_RAM_SIZE=245760 - - This configurations use only SRAM1 for data storage. The heap includes - the remainder of SRAM1. If CONFIG_MM_REGIONS=2, then SRAM2 will be - included in the heap. - - DTCM SRAM is never included in the heap because it cannot be used for - DMA. A DTCM allocator is available, however, so that DTCM can be - managed with dtcm_malloc(), dtcm_free(), etc. - - In order to use FMC SRAM, the following additional things need to be - present in the NuttX configuration file: - - CONFIG_STM32F7_FMC_SRAM - Indicates that SRAM is available via the - FMC (as opposed to an LCD or FLASH). - - CONFIG_HEAP2_BASE - The base address of the SRAM in the FMC address space (hex) - - CONFIG_HEAP2_SIZE - The size of the SRAM in the FMC address space (decimal) - - CONFIG_ARCH_FPU - The STM32F746G-DISCO supports a floating point unit (FPU) - - CONFIG_ARCH_FPU=y - - CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that - have LEDs - - CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt - stack. If defined, this symbol is the size of the interrupt - stack in bytes. If not defined, the user task stacks will be - used during interrupt handling. - - CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions - - CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture. - - Individual subsystems can be enabled: - - APB1 - ---- - CONFIG_STM32F7_TIM2 TIM2 - CONFIG_STM32F7_TIM3 TIM3 - CONFIG_STM32F7_TIM4 TIM4 - CONFIG_STM32F7_TIM5 TIM5 - CONFIG_STM32F7_TIM6 TIM6 - CONFIG_STM32F7_TIM7 TIM7 - CONFIG_STM32F7_TIM12 TIM12 - CONFIG_STM32F7_TIM13 TIM13 - CONFIG_STM32F7_TIM14 TIM14 - CONFIG_STM32F7_LPTIM1 LPTIM1 - CONFIG_STM32F7_RTC RTC - CONFIG_STM32F7_BKP BKP Registers - CONFIG_STM32F7_WWDG WWDG - CONFIG_STM32F7_IWDG IWDG - CONFIG_STM32F7_SPI2 SPI2 - CONFIG_STM32F7_I2S2 I2S2 - CONFIG_STM32F7_SPI3 SPI3 - CONFIG_STM32F7_I2S3 I2S3 - CONFIG_STM32F7_SPDIFRX SPDIFRX - CONFIG_STM32F7_USART2 USART2 - CONFIG_STM32F7_USART3 USART3 - CONFIG_STM32F7_UART4 UART4 - CONFIG_STM32F7_UART5 UART5 - CONFIG_STM32F7_I2C1 I2C1 - CONFIG_STM32F7_I2C2 I2C2 - CONFIG_STM32F7_I2C3 I2C3 - CONFIG_STM32F7_I2C4 I2C4 - CONFIG_STM32F7_CAN1 CAN1 - CONFIG_STM32F7_CAN2 CAN2 - CONFIG_STM32F7_HDMICEC HDMI-CEC - CONFIG_STM32F7_PWR PWR - CONFIG_STM32F7_DAC DAC - CONFIG_STM32F7_UART7 UART7 - CONFIG_STM32F7_UART8 UART8 - - APB2 - ---- - CONFIG_STM32F7_TIM1 TIM1 - CONFIG_STM32F7_TIM8 TIM8 - CONFIG_STM32F7_USART1 USART1 - CONFIG_STM32F7_USART6 USART6 - CONFIG_STM32F7_ADC ADC1 - ADC2 - ADC3 - CONFIG_STM32F7_SDMMC1 SDMMC1 - CONFIG_STM32F7_SPI1 SPI1 - CONFIG_STM32F7_SPI4 SPI4 - CONFIG_STM32F7_SYSCFG SYSCFG - CONFIG_STM32F7_EXTI EXTI - CONFIG_STM32F7_TIM9 TIM9 - CONFIG_STM32F7_TIM10 TIM10 - CONFIG_STM32F7_TIM11 TIM11 - CONFIG_STM32F7_SPI5 SPI5 - CONFIG_STM32F7_SPI6 SPI6 - CONFIG_STM32F7_SAI1 SAI1 - CONFIG_STM32F7_SAI2 SAI2 - CONFIG_STM32F7_LTDC LCD-TFT - - AHB1 - ---- - CONFIG_STM32F7_CRC CRC - CONFIG_STM32F7_BKPSRAM BKPSRAM - CONFIG_STM32F7_DMA1 DMA1 - CONFIG_STM32F7_DMA2 DMA2 - CONFIG_STM32F7_ETHMAC Ethernet MAC - CONFIG_STM32F7_DMA2D Chrom-ART (DMA2D) - CONFIG_STM32F7_OTGHS USB OTG HS - - AHB2 - ---- - CONFIG_STM32F7_OTGFS USB OTG FS - CONFIG_STM32F7_DCMI DCMI - CONFIG_STM32F7_CRYP CRYP - CONFIG_STM32F7_HASH HASH - CONFIG_STM32F7_RNG RNG - - AHB3 - ---- - - CONFIG_STM32F7_FMC FMC control registers - CONFIG_STM32F7_QUADSPI QuadSPI Control - - Timer devices may be used for different purposes. One special purpose is - to generate modulated outputs for such things as motor control. If CONFIG_STM32F7_TIMn - is defined (as above) then the following may also be defined to indicate that - the timer is intended to be used for pulsed output modulation, ADC conversion, - or DAC conversion. Note that ADC/DAC require two definition: Not only do you have - to assign the timer (n) for used by the ADC or DAC, but then you also have to - configure which ADC or DAC (m) it is assigned to. - - CONFIG_STM32F7_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14 - CONFIG_STM32F7_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14 - CONFIG_STM32F7_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3 - CONFIG_STM32F7_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14 - CONFIG_STM32F7_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2 - - For each timer that is enabled for PWM usage, we need the following additional - configuration settings: - - CONFIG_STM32F7_TIMx_CHANNEL - Specifies the timer output channel {1,..,4} - - NOTE: The STM32 timers are each capable of generating different signals on - each of the four channels with different duty cycles. That capability is - not supported by this driver: Only one output channel per timer. - - STM32F746G-DISCO specific device driver settings - - CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART - m (m=4,5) for the console and ttys0 (default is the USART1). - CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received. - This specific the size of the receive buffer - CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before - being sent. This specific the size of the transmit buffer - CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be - CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8. - CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity - CONFIG_U[S]ARTn_2STOP - Two stop bits - - STM32F746G-DISCO CAN Configuration - - CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32F7_CAN1 or - CONFIG_STM32F7_CAN2 must also be defined) - CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default - Standard 11-bit IDs. - CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages. - Default: 8 - CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests. - Default: 4 - CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback - mode for testing. The STM32 CAN driver does support loopback mode. - CONFIG_STM32F7_CAN1_BAUD - CAN1 BAUD rate. Required if - CONFIG_STM32F7_CAN1 is defined. - CONFIG_STM32F7_CAN2_BAUD - CAN1 BAUD rate. Required if - CONFIG_STM32F7_CAN2 is defined. - CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1. - Default: 6 - CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2. - Default: 7 - CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an - dump of all CAN registers. - - STM32F746G-DISCO SPI Configuration - - CONFIG_STM32F7_SPI_INTERRUPTS - Select to enable interrupt driven SPI - support. Non-interrupt-driven, poll-waiting is recommended if the - interrupt rate would be to high in the interrupt driven case. - CONFIG_STM32F7_SPIx_DMA - Use DMA to improve SPIx transfer performance. - Cannot be used with CONFIG_STM32F7_SPI_INTERRUPT. - - STM32F746G-DISCO DMA Configuration - - CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32F7_SDIO - and CONFIG_STM32F7_DMA2. - CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority. - Default: Medium - CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default: - 4-bit transfer mode. - - STM32 USB OTG FS Host Driver Support - - Pre-requisites - - CONFIG_USBDEV - Enable USB device support - CONFIG_USBHOST - Enable USB host support - CONFIG_STM32F7_OTGFS - Enable the STM32 USB OTG FS block - CONFIG_STM32F7_SYSCFG - Needed - CONFIG_SCHED_WORKQUEUE - Worker thread support is required - - Options: - - CONFIG_STM32F7_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words. - Default 128 (512 bytes) - CONFIG_STM32F7_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO - in 32-bit words. Default 96 (384 bytes) - CONFIG_STM32F7_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit - words. Default 96 (384 bytes) - CONFIG_STM32F7_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128 - CONFIG_STM32F7_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever - want to do that? - CONFIG_STM32F7_USBHOST_REGDEBUG - Enable very low-level register access - debug. Depends on CONFIG_DEBUG_FEATURES. - CONFIG_STM32F7_USBHOST_PKTDUMP - Dump all incoming and outgoing USB - packets. Depends on CONFIG_DEBUG_FEATURES. - -Configurations -============== - - Common Configuration Information - -------------------------------- - Each STM32F746G-DISCO configuration is maintained in a sub-directory and - can be selected as follow: - - tools/configure.sh stm32f746g-disco: - - Where is one of the sub-directories listed below. - - NOTES: - - 1. These configurations use the mconf-based configuration tool. To - change this configuration using that tool, you should: - - a. Build and install the kconfig-mconf tool. See nuttx/README.txt - see additional README.txt files in the NuttX tools repository. - - b. Execute 'make menuconfig' in nuttx/ in order to start the - reconfiguration process. - - 2. By default, these configurations use the USART1 for the serial - console. Pins are configured to that RX/TX are available at - pins D0 and D1 of the Arduion connectors. This should be compatible - with most RS-232 shields. - - 3. All of these configurations are set up to build under Windows using the - "GNU Tools for ARM Embedded Processors" that is maintained by ARM - (unless stated otherwise in the description of the configuration). - - https://developer.arm.com/open-source/gnu-toolchain/gnu-rm - - As of this writing (2015-03-11), full support is difficult to find - for the Cortex-M7, but is supported by at least this release of - the ARM GNU tools: - - https://launchpadlibrarian.net/209776344/release.txt - - That toolchain selection can easily be reconfigured using - 'make menuconfig'. Here are the relevant current settings: - - Build Setup: - CONFIG_HOST_WINDOWS=y : Window environment - CONFIG_WINDOWS_CYGWIN=y : Cywin under Windows - - System Type -> Toolchain: - CONFIG_ARM_TOOLCHAIN_GNU_EABI=y : GNU ARM EABI toolchain - - NOTE: As of this writing, there are issues with using this tool at - the -Os level of optimization. This has not been proven to be a - compiler issue (as least not one that might not be fixed with a - well placed volatile qualifier). However, in any event, it is - recommend that you use not more that -O2 optimization. - -Configuration Directories -------------------------- - - nsh - --- - Configures the NuttShell (NSH) located at apps/examples/nsh. The - Configuration enables the serial interfaces on USART1. Support for - built-in applications is enabled, but in the base configuration no - built-in applications are selected. - - netnsh - ------ - This configuration is similar to the nsh but a lot more hardware - peripherals are enabled, in particular Ethernet, as well as networking - support. It is similar to the stm32f769i-disco/netnsh - configuration. This configuration uses USART1 for the serial console. - USART1 is connected to the ST-link virtual com inside board.h to remove - the need of a extra serial connection to use this board. - - lgvl - ---- - STM32F746G-DISCO LittlevGL demo example. - - The LTDC is initialized during boot up. - This configuration uses USART1 for the serial console. - USART1 is connected to the ST-link virtual com inside board.h to remove - the need of a extra serial connection to use this board. - From the nsh command line execute the lvgldemo example: - - nsh> lvgldemo - - The test will execute the calibration process and then run the - LittlevGL demo project. diff --git a/boards/arm/stm32f7/stm32f746g-disco/configs/fb/README.txt b/boards/arm/stm32f7/stm32f746g-disco/configs/fb/README.txt deleted file mode 100644 index 9db93b170e5..00000000000 --- a/boards/arm/stm32f7/stm32f746g-disco/configs/fb/README.txt +++ /dev/null @@ -1,33 +0,0 @@ -README.txt -========== - -STM32F746G-DISCO LTDC Framebuffer demo example - -Configure and build -------------------- - -tools/configure.sh stm32f746g-disco:fb -make - -Configuration ------------- - -This configuration provides 1 LTDC with -16bpp pixel format and a resolution of 480x272. - -Loading -------- - -st-flash write nuttx.bin 0x8000000 - -Executing ---------- - -The ltdc is initialized during boot up. Interaction with NSH is via the serial -console provided by ST-LINK USB at 115200 8N1 baud. -From the nsh comandline execute the fb example: - - nsh> fb - -The test will put a pattern of concentric squares in the framebuffer and -terminate. diff --git a/boards/arm/stm32f7/stm32f746g-disco/configs/nxdemo/README.txt b/boards/arm/stm32f7/stm32f746g-disco/configs/nxdemo/README.txt deleted file mode 100644 index 40175c8b156..00000000000 --- a/boards/arm/stm32f7/stm32f746g-disco/configs/nxdemo/README.txt +++ /dev/null @@ -1,50 +0,0 @@ -README.txt -========== - -STM32F746G-DISCO NX demo example - -Configure and build -------------------- - -tools/configure.sh stm32f746g-disco:nxdemo -make - -Configuration ------------- - -This configuration provides 1 LTDC with -16bpp pixel format and a resolution of 480x272. - -Trickiest part of config is increasing max message size (CONFIG_MQ_MAXMSGSIZE=256). -NX server - client communication cannot be established with default value 8 bytes. - -Loading -------- - -st-flash write nuttx.bin 0x8000000 - -or - -openocd -f interface/stlink.cfg -f target/stm32f7x.cfg -telnet localhost 4444 -> program nuttx verify reset - -Executing ---------- - -The ltdc is initialized during boot up. Interaction with NSH is via the serial -console provided by ST-LINK USB at 115200 8N1 baud. - -There are two graphics examples provided in this configuration: -- nxdemo -- nxhello - -Use help command to show list of examples available: - - nsh> help - -From the nsh comandline execute the example: - - nsh> nxdemo - -The test will draw animated lines, squares and circles on the device screen. diff --git a/boards/arm/stm32f7/stm32f746g-disco/configs/nxterm/README.txt b/boards/arm/stm32f7/stm32f746g-disco/configs/nxterm/README.txt deleted file mode 100644 index 3b10481a720..00000000000 --- a/boards/arm/stm32f7/stm32f746g-disco/configs/nxterm/README.txt +++ /dev/null @@ -1,42 +0,0 @@ -README.txt -========== - -STM32F746G-DISCO NX Terminal example - -Configure and build -------------------- - -tools/configure.sh stm32f746g-disco:nxterm -make - -Configuration ------------- - -This configuration provides 1 LTDC with -16bpp pixel format and a resolution of 480x272. - -Trickiest part of config is increasing max message size (CONFIG_MQ_MAXMSGSIZE=256). -NX server - client communication cannot be established with default value 8 bytes. - -Loading -------- - -st-flash write nuttx.bin 0x8000000 - -or - -openocd -f interface/stlink.cfg -f target/stm32f7x.cfg -telnet localhost 4444 -> program nuttx verify reset - -Executing ---------- - -The ltdc is initialized during boot up. Interaction with NSH is via the serial -console provided by ST-LINK USB at 115200 8N1 baud. - -From the nsh comandline execute the example: - - nsh> nxterm - -The test will show terminal window on the screen.