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arch/arm/src/imxrt: Add full support for the LPSPI in poll mode; includes a minor fix for LPI2C.
This commit is contained in:
Gregory Nutt
@@ -66,6 +66,10 @@ config IMXRT_LPI2C
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bool
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bool
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default n
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default n
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config IMXRT_LPSPI
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bool
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default n
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menu "i.MX RT Peripheral Selection"
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menu "i.MX RT Peripheral Selection"
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config IMXRT_EDMA
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config IMXRT_EDMA
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@@ -209,7 +213,7 @@ if IMXRT_LPI2C3
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endif # IMXRT_LPI2C3
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endif # IMXRT_LPI2C3
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config IMXRT_LPI2C4
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menuconfig IMXRT_LPI2C4
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bool "LPI2C4"
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bool "LPI2C4"
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default n
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default n
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select IMXRT_LPI2C
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select IMXRT_LPI2C
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@@ -231,6 +235,30 @@ if IMXRT_LPI2C4
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endif # IMXRT_LPI2C4
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endif # IMXRT_LPI2C4
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endmenu # LPI2C Peripherals
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endmenu # LPI2C Peripherals
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menu "LPSPI Peripherals"
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menuconfig IMXRT_LPSPI1
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bool "LPSPI1"
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default n
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select IMXRT_LPSPI
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config IMXRT_LPSPI2
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bool "LPSPI2"
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default n
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select IMXRT_LPSPI
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config IMXRT_LPSPI3
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bool "LPSPI3"
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default n
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select IMXRT_LPSPI
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config IMXRT_LPSPI4
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bool "LPSPI4"
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default n
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select IMXRT_LPSPI
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endmenu # LPSPI Peripherals
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config IMXRT_SEMC
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config IMXRT_SEMC
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bool "Smart External Memory Controller (SEMC)"
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bool "Smart External Memory Controller (SEMC)"
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default n
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default n
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@@ -138,3 +138,7 @@ endif
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ifeq ($(CONFIG_IMXRT_LPI2C),y)
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ifeq ($(CONFIG_IMXRT_LPI2C),y)
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CHIP_CSRCS += imxrt_lpi2c.c
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CHIP_CSRCS += imxrt_lpi2c.c
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endif
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endif
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ifeq ($(CONFIG_IMXRT_LPSPI),y)
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CHIP_CSRCS += imxrt_lpspi.c
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endif
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@@ -624,69 +624,72 @@
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#define GPIO_LPI2C3_SCL_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_07_INDEX))
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#define GPIO_LPI2C3_SCL_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_07_INDEX))
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#define GPIO_LPI2C3_SCL_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_22_INDEX) | \
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#define GPIO_LPI2C3_SCL_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_22_INDEX) | \
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GPIO_SION_ENABLE | IOMUX_OPENDRAIN | \
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GPIO_SION_ENABLE | IOMUX_OPENDRAIN | IOMUX_SPEED_MEDIUM | IOMUX_DRIVE_33OHM)
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IOMUX_SPEED_MEDIUM | IOMUX_DRIVE_33OHM)
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#define GPIO_LPI2C3_SCL_3 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_00_INDEX))
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#define GPIO_LPI2C3_SCL_3 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_00_INDEX))
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#define GPIO_LPI2C3_SDA_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_06_INDEX))
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#define GPIO_LPI2C3_SDA_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_06_INDEX))
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#define GPIO_LPI2C3_SDA_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_21_INDEX) | \
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#define GPIO_LPI2C3_SDA_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_21_INDEX) | \
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GPIO_SION_ENABLE | IOMUX_OPENDRAIN | \
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GPIO_SION_ENABLE | IOMUX_OPENDRAIN | IOMUX_SPEED_MEDIUM | IOMUX_DRIVE_33OHM)
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IOMUX_SPEED_MEDIUM | IOMUX_DRIVE_33OHM)
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#define GPIO_LPI2C3_SDA_3 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_01_INDEX))
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#define GPIO_LPI2C3_SDA_3 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_01_INDEX))
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#define GPIO_LPI2C4_SCL_1 (GPIO_PERIPH | GPIO_ALT0 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_12_INDEX))
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#define GPIO_LPI2C4_SCL_1 (GPIO_PERIPH | GPIO_ALT0 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_12_INDEX))
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#define GPIO_LPI2C4_SCL_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_12_INDEX))
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#define GPIO_LPI2C4_SCL_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_12_INDEX) | \
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GPIO_SION_ENABLE | IOMUX_OPENDRAIN | IOMUX_SPEED_MEDIUM | IOMUX_DRIVE_33OHM)
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#define GPIO_LPI2C4_SDA_1 (GPIO_PERIPH | GPIO_ALT0 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_13_INDEX))
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#define GPIO_LPI2C4_SDA_1 (GPIO_PERIPH | GPIO_ALT0 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_13_INDEX))
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#define GPIO_LPI2C4_SDA_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_11_INDEX))
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#define GPIO_LPI2C4_SDA_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_11_INDEX) | \
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GPIO_SION_ENABLE | IOMUX_OPENDRAIN | IOMUX_SPEED_MEDIUM | IOMUX_DRIVE_33OHM)
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/* Low Power Serial Peripheral Interface (LPSPI) */
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/* Low Power Serial Peripheral Interface (LPSPI) */
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#define GPIO_LPSPI1_PCS0_1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_30_INDEX))
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#define IOMUX_LPSPI (IOMUX_PULL_UP_100K | IOMUX_CMOS_OUTPUT | IOMUX_DRIVE_40OHM | \
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#define GPIO_LPSPI1_PCS0_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_01_INDEX))
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IOMUX_SLEW_FAST | IOMUX_SPEED_MEDIUM)
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#define GPIO_LPSPI1_PCS1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_31_INDEX))
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#define GPIO_LPSPI1_PCS2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_40_INDEX))
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#define GPIO_LPSPI1_PCS3 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_41_INDEX))
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#define GPIO_LPSPI1_SCK_1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_27_INDEX))
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#define GPIO_LPSPI1_SCK_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_00_INDEX))
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#define GPIO_LPSPI1_SDI_1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_29_INDEX))
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#define GPIO_LPSPI1_SDI_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_03_INDEX))
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#define GPIO_LPSPI1_SDO_1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_28_INDEX))
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#define GPIO_LPSPI1_SDO_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_02_INDEX))
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#define GPIO_LPSPI2_PCS0_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_01_INDEX))
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#define GPIO_LPSPI1_PCS0_1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_30_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_PCS0_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_06_INDEX))
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#define GPIO_LPSPI1_PCS0_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_01_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_PCS1 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_14_INDEX))
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#define GPIO_LPSPI1_PCS1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_31_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_PCS2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_10_INDEX))
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#define GPIO_LPSPI1_PCS2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_40_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_PCS3 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_11_INDEX))
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#define GPIO_LPSPI1_PCS3 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_41_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_SCK_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_00_INDEX))
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#define GPIO_LPSPI1_SCK_1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_27_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_SCK_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_07_INDEX))
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#define GPIO_LPSPI1_SCK_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_00_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_SDI_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_03_INDEX))
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#define GPIO_LPSPI1_SDI_1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_29_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_SDI_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_09_INDEX))
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#define GPIO_LPSPI1_SDI_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_03_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_SDO_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_02_INDEX))
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#define GPIO_LPSPI1_SDO_1 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_28_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI2_SDO_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_08_INDEX))
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#define GPIO_LPSPI1_SDO_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B0_02_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_PCS0_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_12_INDEX))
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#define GPIO_LPSPI2_PCS0_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_01_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_PCS0_2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_03_INDEX))
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#define GPIO_LPSPI2_PCS0_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_06_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_PCS1 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_04_INDEX))
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#define GPIO_LPSPI2_PCS1 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_14_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_PCS2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_05_INDEX))
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#define GPIO_LPSPI2_PCS2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_10_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_PCS3 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_06_INDEX))
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#define GPIO_LPSPI2_PCS3 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_11_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_SCK_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_15_INDEX))
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#define GPIO_LPSPI2_SCK_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_00_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_SCK_2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_00_INDEX))
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#define GPIO_LPSPI2_SCK_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_07_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_SDI_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_13_INDEX))
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#define GPIO_LPSPI2_SDI_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_03_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_SDI_2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_02_INDEX))
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#define GPIO_LPSPI2_SDI_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_09_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_SDO_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_14_INDEX))
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#define GPIO_LPSPI2_SDO_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_02_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI3_SDO_2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_01_INDEX))
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#define GPIO_LPSPI2_SDO_2 (GPIO_PERIPH | GPIO_ALT4 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_SD_B1_08_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS0_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_04_INDEX))
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#define GPIO_LPSPI3_PCS0_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_12_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS0_2 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_00_INDEX))
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#define GPIO_LPSPI3_PCS0_2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_03_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_03_INDEX))
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#define GPIO_LPSPI3_PCS1 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_04_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_02_INDEX))
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#define GPIO_LPSPI3_PCS2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_05_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS3 (GPIO_PERIPH | GPIO_ALT6 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_11_INDEX))
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#define GPIO_LPSPI3_PCS3 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_06_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_SCK_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_07_INDEX))
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#define GPIO_LPSPI3_SCK_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_15_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_SCK_2 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_03_INDEX))
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#define GPIO_LPSPI3_SCK_2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_00_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_SDI_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_05_INDEX))
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#define GPIO_LPSPI3_SDI_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_13_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_SDI_2 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_01_INDEX))
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#define GPIO_LPSPI3_SDI_2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_02_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_SDO_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_06_INDEX))
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#define GPIO_LPSPI3_SDO_1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B1_14_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_SDO_2 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_02_INDEX))
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#define GPIO_LPSPI3_SDO_2 (GPIO_PERIPH | GPIO_ALT7 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_AD_B0_01_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS0_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_04_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS0_2 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_00_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS1 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_03_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_02_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_PCS3 (GPIO_PERIPH | GPIO_ALT6 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_11_INDEX) | IOMUX_LPSPI)
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#define GPIO_LPSPI4_SCK_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_07_INDEX) | IOMUX_LPSPI)
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||||||
|
#define GPIO_LPSPI4_SCK_2 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_03_INDEX) | IOMUX_LPSPI)
|
||||||
|
#define GPIO_LPSPI4_SDI_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_05_INDEX) | IOMUX_LPSPI)
|
||||||
|
#define GPIO_LPSPI4_SDI_2 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_01_INDEX) | IOMUX_LPSPI)
|
||||||
|
#define GPIO_LPSPI4_SDO_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_06_INDEX) | IOMUX_LPSPI)
|
||||||
|
#define GPIO_LPSPI4_SDO_2 (GPIO_PERIPH | GPIO_ALT3 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B0_02_INDEX) | IOMUX_LPSPI)
|
||||||
|
|
||||||
/* Low Power Universal Asynchronous Receiver/Transmitter (LPUART) */
|
/* Low Power Universal Asynchronous Receiver/Transmitter (LPUART) */
|
||||||
|
|
||||||
@@ -727,9 +730,9 @@
|
|||||||
|
|
||||||
#define GPIO_LPUART5_CTS (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_28_INDEX))
|
#define GPIO_LPUART5_CTS (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_28_INDEX))
|
||||||
#define GPIO_LPUART5_RTS (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_27_INDEX))
|
#define GPIO_LPUART5_RTS (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_27_INDEX))
|
||||||
#define GPIO_LPUART5_RX_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_13_INDEX))
|
#define GPIO_LPUART5_RX_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_13_INDEX) | IOMUX_UART)
|
||||||
#define GPIO_LPUART5_RX_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_24_INDEX))
|
#define GPIO_LPUART5_RX_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_24_INDEX))
|
||||||
#define GPIO_LPUART5_TX_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_12_INDEX))
|
#define GPIO_LPUART5_TX_1 (GPIO_PERIPH | GPIO_ALT1 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_B1_12_INDEX) | IOMUX_UART)
|
||||||
#define GPIO_LPUART5_TX_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_23_INDEX))
|
#define GPIO_LPUART5_TX_2 (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_23_INDEX))
|
||||||
|
|
||||||
#define GPIO_LPUART6_CTS (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_30_INDEX))
|
#define GPIO_LPUART6_CTS (GPIO_PERIPH | GPIO_ALT2 | GPIO_PADMUX(IMXRT_PADMUX_GPIO_EMC_30_INDEX))
|
||||||
|
|||||||
@@ -187,7 +187,7 @@
|
|||||||
#define LPSPI_SR_REF (1 << 12) /* Bit 12: Receive Error Flag */
|
#define LPSPI_SR_REF (1 << 12) /* Bit 12: Receive Error Flag */
|
||||||
#define LPSPI_SR_DMF (1 << 13) /* Bit 13: Data Match Flag */
|
#define LPSPI_SR_DMF (1 << 13) /* Bit 13: Data Match Flag */
|
||||||
/* Bits 14-23: Reserved */
|
/* Bits 14-23: Reserved */
|
||||||
#define LPSPI_SR_REF (1 << 24) /* Bit 24: Module Busy Flag*/
|
#define LPSPI_SR_MBF (1 << 24) /* Bit 24: Module Busy Flag */
|
||||||
/* Bits 25-31: Reserved */
|
/* Bits 25-31: Reserved */
|
||||||
|
|
||||||
/* Interrupt Enable Register */
|
/* Interrupt Enable Register */
|
||||||
@@ -310,6 +310,7 @@
|
|||||||
/* Bits 24-31: Reserved */
|
/* Bits 24-31: Reserved */
|
||||||
|
|
||||||
/* Transmit Command Register */
|
/* Transmit Command Register */
|
||||||
|
|
||||||
#define LPSPI_TCR_FRAMESZ_SHIFT (0) /* Bits 0-11: Frame Size */
|
#define LPSPI_TCR_FRAMESZ_SHIFT (0) /* Bits 0-11: Frame Size */
|
||||||
#define LPSPI_TCR_FRAMESZ_MASK (0xfff << LPSPI_TCR_FRAMESZ_SHIFT)
|
#define LPSPI_TCR_FRAMESZ_MASK (0xfff << LPSPI_TCR_FRAMESZ_SHIFT)
|
||||||
# define LPSPI_TCR_FRAMESZ(n) ((uint32_t)(n) << LPSPI_TCR_FRAMESZ_SHIFT)
|
# define LPSPI_TCR_FRAMESZ(n) ((uint32_t)(n) << LPSPI_TCR_FRAMESZ_SHIFT)
|
||||||
|
|||||||
@@ -212,5 +212,21 @@ void imxrt_clockconfig(void)
|
|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI
|
||||||
|
/* Set LPSPI close source to PLL3 PFD0 */
|
||||||
|
|
||||||
|
reg = getreg32(IMXRT_CCM_CBCMR);
|
||||||
|
reg &= CCM_CBCMR_LPSPI_CLK_SEL_MASK;
|
||||||
|
reg |= CCM_CBCMR_LPSPI_CLK_SEL_PLL3_PFD0;
|
||||||
|
putreg32(reg, IMXRT_CCM_CBCMR);
|
||||||
|
|
||||||
|
/* Set LPSPI divider to 5 */
|
||||||
|
|
||||||
|
reg = getreg32(IMXRT_CCM_CBCMR);
|
||||||
|
reg &= CCM_CBCMR_LPSPI_PODF_MASK;
|
||||||
|
reg |= CCM_CBCMR_LPSPI_PODF(7);
|
||||||
|
putreg32(reg, IMXRT_CCM_CBCMR);
|
||||||
|
#endif
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -409,8 +409,8 @@ static const struct imxrt_lpi2c_config_s imxrt_lpi2c4_config =
|
|||||||
.busy_idle = CONFIG_LPI2C4_BUSYIDLE,
|
.busy_idle = CONFIG_LPI2C4_BUSYIDLE,
|
||||||
.filtscl = CONFIG_LPI2C4_FILTSCL,
|
.filtscl = CONFIG_LPI2C4_FILTSCL,
|
||||||
.filtsda = CONFIG_LPI2C4_FILTSDA,
|
.filtsda = CONFIG_LPI2C4_FILTSDA,
|
||||||
.scl_pin = GPIO_LPI2C3_SCL,
|
.scl_pin = GPIO_LPI2C4_SCL,
|
||||||
.sda_pin = GPIO_LPI2C3_SDA,
|
.sda_pin = GPIO_LPI2C4_SDA,
|
||||||
#ifndef CONFIG_I2C_SLAVE
|
#ifndef CONFIG_I2C_SLAVE
|
||||||
.mode = LPI2C_MASTER,
|
.mode = LPI2C_MASTER,
|
||||||
#else
|
#else
|
||||||
@@ -1211,7 +1211,7 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv)
|
|||||||
|
|
||||||
/* Continue with either sending or reading data */
|
/* Continue with either sending or reading data */
|
||||||
|
|
||||||
/* Check if there is more bytes to send */
|
/* Check if there is more butes to send */
|
||||||
|
|
||||||
if (((priv->flags & I2C_M_READ) == 0) && (status & LPI2C_MSR_TDF) != 0)
|
if (((priv->flags & I2C_M_READ) == 0) && (status & LPI2C_MSR_TDF) != 0)
|
||||||
{
|
{
|
||||||
@@ -1239,8 +1239,8 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv)
|
|||||||
{
|
{
|
||||||
imxrt_lpi2c_traceevent(priv, I2CEVENT_RCVBYTE, priv->dcnt);
|
imxrt_lpi2c_traceevent(priv, I2CEVENT_RCVBYTE, priv->dcnt);
|
||||||
|
|
||||||
/* No interrupts or context switches should occur in the following
|
/* No interrupts or contex switches should occur in the following
|
||||||
* sequence. Otherwise, additional bytes may be sent by the device.
|
* seuence. Otherwise, additional bytes may be sent by the device.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifdef CONFIG_I2C_POLLED
|
#ifdef CONFIG_I2C_POLLED
|
||||||
|
|||||||
@@ -46,10 +46,6 @@
|
|||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
#include "chip/imxrt_lpi2c.h"
|
#include "chip/imxrt_lpi2c.h"
|
||||||
|
|
||||||
/****************************************************************************
|
|
||||||
* Pre-processor Definitions
|
|
||||||
****************************************************************************/
|
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Public Function Prototypes
|
* Public Function Prototypes
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
@@ -67,7 +63,7 @@
|
|||||||
* Port number (for hardware that has multiple I2C interfaces)
|
* Port number (for hardware that has multiple I2C interfaces)
|
||||||
*
|
*
|
||||||
* Returned Value:
|
* Returned Value:
|
||||||
* Valid I2C device structure reference on succcess; a NULL on failure
|
* Valid I2C device structure reference on success; a NULL on failure
|
||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,187 @@
|
|||||||
|
/************************************************************************************
|
||||||
|
* arch/arm/src/imxrt/imxrt_lpspi.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||||
|
* Authors: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_IMXRT_IMXRT_LPSPI_H
|
||||||
|
#define __ARCH_ARM_SRC_IMXRT_IMXRT_LPSPI_H
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
|
#include <nuttx/spi/spi.h>
|
||||||
|
|
||||||
|
#include "chip.h"
|
||||||
|
#include "chip/imxrt_lpspi.h"
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
#undef EXTERN
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
#define EXTERN extern "C"
|
||||||
|
extern "C"
|
||||||
|
{
|
||||||
|
#else
|
||||||
|
#define EXTERN extern
|
||||||
|
#endif
|
||||||
|
|
||||||
|
struct spi_dev_s; /* Forward reference */
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: imxrt_lpspibus_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Initialize the selected SPI bus
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* bus number (for hardware that has mutiple SPI interfaces)
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Valid SPI device structure reference on succcess; a NULL on failure
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
FAR struct spi_dev_s *imxrt_lpspibus_initialize(int bus);
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: imxrt_lpspi1/2/...select and imxrt_lpspi1/2/...status
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* The external functions, imxrt_lpspi1/2/...select, imxrt_lpspi1/2/...status, and
|
||||||
|
* imxrt_lpspi1/2/...cmddata must be provided by board-specific logic. These are
|
||||||
|
* implementations of the select, status, and cmddata methods of the SPI interface
|
||||||
|
* defined by struct spi_ops_s (see include/nuttx/spi/spi.h). All other methods
|
||||||
|
* (including imxrt_lpspibus_initialize()) are provided by common IMXRT logic. To use this
|
||||||
|
* common SPI logic on your board:
|
||||||
|
*
|
||||||
|
* 1. Provide logic in imxrt_boardinitialize() to configure SPI chip select
|
||||||
|
* pins.
|
||||||
|
* 2. Provide imxrt_lpspi1/2/...select() and imxrt_lpspi1/2/...status() functions in your
|
||||||
|
* board-specific logic. These functions will perform chip selection and
|
||||||
|
* status operations using GPIOs in the way your board is configured.
|
||||||
|
* 3. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration file, then
|
||||||
|
* provide imxrt_lpspi1/2/...cmddata() functions in your board-specific logic.
|
||||||
|
* These functions will perform cmd/data selection operations using GPIOs in the
|
||||||
|
* way your board is configured.
|
||||||
|
* 4. Add a calls to imxrt_lpspibus_initialize() in your low level application
|
||||||
|
* initialization logic
|
||||||
|
* 5. The handle returned by imxrt_lpspibus_initialize() may then be used to bind the
|
||||||
|
* SPI driver to higher level logic (e.g., calling
|
||||||
|
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
|
||||||
|
* the SPI MMC/SD driver).
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI1
|
||||||
|
void imxrt_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
|
||||||
|
uint8_t imxrt_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid);
|
||||||
|
int imxrt_lpspi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI2
|
||||||
|
void imxrt_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
|
||||||
|
uint8_t imxrt_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid);
|
||||||
|
int imxrt_lpspi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI3
|
||||||
|
void imxrt_lpspi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
|
||||||
|
uint8_t imxrt_lpspi3status(FAR struct spi_dev_s *dev, uint32_t devid);
|
||||||
|
int imxrt_lpspi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI4
|
||||||
|
void imxrt_lpspi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected);
|
||||||
|
uint8_t imxrt_lpspi4status(FAR struct spi_dev_s *dev, uint32_t devid);
|
||||||
|
int imxrt_lpspi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: imxrt_lpspi1/2/...register
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* If the board supports a card detect callback to inform the SPI-based MMC/SD
|
||||||
|
* driver when an SD card is inserted or removed, then CONFIG_SPI_CALLBACK should
|
||||||
|
* be defined and the following function(s) must be implemented. These functions
|
||||||
|
* implements the registercallback method of the SPI interface (see
|
||||||
|
* include/nuttx/spi/spi.h for details)
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* dev - Device-specific state data
|
||||||
|
* callback - The function to call on the media change
|
||||||
|
* arg - A caller provided value to return with the callback
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* 0 on success; negated errno on failure.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_SPI_CALLBACK
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI1
|
||||||
|
int imxrt_lpspi1register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
|
||||||
|
FAR void *arg);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI2
|
||||||
|
int imxrt_lpspi2register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
|
||||||
|
FAR void *arg);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI3
|
||||||
|
int imxrt_lpspi3register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
|
||||||
|
FAR void *arg);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI4
|
||||||
|
int imxrt_lpspi4register(FAR struct spi_dev_s *dev, spi_mediachange_t callback,
|
||||||
|
FAR void *arg);
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#undef EXTERN
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */
|
||||||
|
#endif /* __ARCH_ARM_SRC_IMXRT_IMXRT_LPSPI_H */
|
||||||
|
|
||||||
@@ -194,6 +194,19 @@
|
|||||||
#define GPIO_LPI2C3_SDA GPIO_LPI2C3_SDA_2 /* GPIO_AD_B1_01 */
|
#define GPIO_LPI2C3_SDA GPIO_LPI2C3_SDA_2 /* GPIO_AD_B1_01 */
|
||||||
#define GPIO_LPI2C3_SCL GPIO_LPI2C3_SCL_2 /* GPIO_AD_B1_00 */
|
#define GPIO_LPI2C3_SCL GPIO_LPI2C3_SCL_2 /* GPIO_AD_B1_00 */
|
||||||
|
|
||||||
|
/* LPSPI
|
||||||
|
*
|
||||||
|
* Arduino Connector
|
||||||
|
*
|
||||||
|
* J24 D09 GPIO_AD_B0_02 LPSPI3_SDI
|
||||||
|
* J24 D14 GPIO_AD_B0_01 LPSPI3_SDO
|
||||||
|
* J24 D15 GPIO_AD_B0_00 LPSPI3_SCK
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define GPIO_LPSPI3_SCK GPIO_LPSPI3_SCK_2 /* GPIO_AD_B0_00 */
|
||||||
|
#define GPIO_LPSPI3_MISO GPIO_LPSPI3_SDI_2 /* GPIO_AD_B0_02 */
|
||||||
|
#define GPIO_LPSPI3_MOSI GPIO_LPSPI3_SDO_2 /* GPIO_AD_B0_01 */
|
||||||
|
|
||||||
/************************************************************************************
|
/************************************************************************************
|
||||||
* Public Types
|
* Public Types
|
||||||
************************************************************************************/
|
************************************************************************************/
|
||||||
|
|||||||
@@ -62,4 +62,12 @@ ifeq ($(CONFIG_IMXRT_ENET),y)
|
|||||||
CSRCS += imxrt_ethernet.c
|
CSRCS += imxrt_ethernet.c
|
||||||
endif
|
endif
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_IMXRT_LPSPI),y)
|
||||||
|
CSRCS += imxrt_spi.c
|
||||||
|
endif
|
||||||
|
|
||||||
|
ifeq ($(CONFIG_MMCSD),y)
|
||||||
|
CSRCS += imxrt_mmcsd.c
|
||||||
|
endif
|
||||||
|
|
||||||
include $(TOPDIR)/configs/Board.mk
|
include $(TOPDIR)/configs/Board.mk
|
||||||
|
|||||||
@@ -88,8 +88,8 @@
|
|||||||
* The IMXRT board has one external user button
|
* The IMXRT board has one external user button
|
||||||
*
|
*
|
||||||
* 1. SW8 (IRQ88) GPIO5-00
|
* 1. SW8 (IRQ88) GPIO5-00
|
||||||
*
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define IOMUX_SW8 (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
|
#define IOMUX_SW8 (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
|
||||||
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
|
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
|
||||||
_IOMUX_PULL_ENABLE)
|
_IOMUX_PULL_ENABLE)
|
||||||
@@ -121,6 +121,28 @@
|
|||||||
#define GPIO_ENET_RST (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
|
#define GPIO_ENET_RST (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
|
||||||
GPIO_PORT1 | GPIO_PIN9 | IOMUX_ENET_RST)
|
GPIO_PORT1 | GPIO_PIN9 | IOMUX_ENET_RST)
|
||||||
|
|
||||||
|
/* LPSPI1 CS: GPIO_SD_B0_01 */
|
||||||
|
|
||||||
|
#define IOMUX_LPSPI1_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
|
||||||
|
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
|
||||||
|
_IOMUX_PULL_ENABLE)
|
||||||
|
#define GPIO_LPSPI1_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
|
||||||
|
GPIO_PORT3 | GPIO_PIN13 | IOMUX_LPSPI1_CS)
|
||||||
|
|
||||||
|
#define IOMUX_MMCSD_EN (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
|
||||||
|
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
|
||||||
|
_IOMUX_PULL_ENABLE)
|
||||||
|
#define GPIO_MMCSD_EN (GPIO_OUTPUT | GPIO_OUTPUT_ZERO | \
|
||||||
|
GPIO_PORT3 | GPIO_PIN2 | IOMUX_MMCSD_EN)
|
||||||
|
|
||||||
|
/* LPSPI3 CS: GPIO_AD_B0_03 */
|
||||||
|
|
||||||
|
#define IOMUX_LPSPI3_CS (IOMUX_SLEW_FAST | IOMUX_DRIVE_50OHM | \
|
||||||
|
IOMUX_SPEED_MEDIUM | IOMUX_PULL_UP_100K | \
|
||||||
|
_IOMUX_PULL_ENABLE)
|
||||||
|
#define GPIO_LPSPI3_CS (GPIO_OUTPUT | GPIO_OUTPUT_ONE | \
|
||||||
|
GPIO_PORT1 | GPIO_PIN3 | IOMUX_LPSPI3_CS)
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Public Types
|
* Public Types
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
@@ -135,6 +157,17 @@
|
|||||||
* Public Functions
|
* Public Functions
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: imxrt_spidev_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Called to configure SPI chip select GPIO pins for the imxrt1050-evk
|
||||||
|
* board.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
void weak_function imxrt_spidev_initialize(void);
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Name: imxrt_bringup
|
* Name: imxrt_bringup
|
||||||
*
|
*
|
||||||
|
|||||||
@@ -46,18 +46,29 @@
|
|||||||
#include <syslog.h>
|
#include <syslog.h>
|
||||||
#include <nuttx/i2c/i2c_master.h>
|
#include <nuttx/i2c/i2c_master.h>
|
||||||
#include <imxrt_lpi2c.h>
|
#include <imxrt_lpi2c.h>
|
||||||
|
#include <imxrt_lpspi.h>
|
||||||
|
|
||||||
#include "imxrt1050-evk.h"
|
#include "imxrt1050-evk.h"
|
||||||
|
|
||||||
|
#include <arch/board/board.h> /* Must always be included last */
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Pre-processor Definitions
|
* Pre-processor Definitions
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* Checking needed by MMC/SDCard */
|
||||||
|
|
||||||
|
#ifdef CONFIG_NSH_MMCSDMINOR
|
||||||
|
# define MMCSD_MINOR CONFIG_NSH_MMCSDMINOR
|
||||||
|
#else
|
||||||
|
# define MMCSD_MINOR 0
|
||||||
|
#endif
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Private Functions
|
* Private Functions
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
#if defined(CONFIG_I2C_DRIVER)
|
#if defined(CONFIG_I2C_DRIVER) && defined(CONFIG_IMXRT_LPI2C)
|
||||||
static void imxrt_i2c_register(int bus)
|
static void imxrt_i2c_register(int bus)
|
||||||
{
|
{
|
||||||
FAR struct i2c_master_s *i2c;
|
FAR struct i2c_master_s *i2c;
|
||||||
@@ -114,16 +125,16 @@ int imxrt_bringup(void)
|
|||||||
#if defined(CONFIG_I2C_DRIVER) && defined(CONFIG_IMXRT_LPI2C1)
|
#if defined(CONFIG_I2C_DRIVER) && defined(CONFIG_IMXRT_LPI2C1)
|
||||||
imxrt_i2c_register(1);
|
imxrt_i2c_register(1);
|
||||||
#endif
|
#endif
|
||||||
#if defined(CONFIG_I2C_DRIVER) && defined(CONFIG_IMXRT_LPI2C2)
|
|
||||||
imxrt_i2c_register(2);
|
|
||||||
#endif
|
|
||||||
#if defined(CONFIG_I2C_DRIVER) && defined(CONFIG_IMXRT_LPI2C3)
|
|
||||||
imxrt_i2c_register(3);
|
|
||||||
#endif
|
|
||||||
#if defined(CONFIG_I2C_DRIVER) && defined(CONFIG_IMXRT_LPI2C4)
|
|
||||||
imxrt_i2c_register(4);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
#ifdef CONFIG_MMCSD
|
||||||
|
imxrt_spidev_initialize();
|
||||||
|
|
||||||
|
ret = imxrt_mmcsd_initialize(MMCSD_MINOR);
|
||||||
|
if (ret < 0)
|
||||||
|
{
|
||||||
|
syslog(LOG_ERR, "ERROR: Failed to initialize SD slot %d: %d\n", ret);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
UNUSED(ret);
|
UNUSED(ret);
|
||||||
return OK;
|
return OK;
|
||||||
|
|||||||
@@ -0,0 +1,130 @@
|
|||||||
|
/*****************************************************************************
|
||||||
|
* configs/imxrt/src/imxrt_mmcsd.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2018 Greg Nutt. All rights reserved.
|
||||||
|
* Author: ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* Included Files
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#include <debug.h>
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
#include <nuttx/mmcsd.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
|
||||||
|
#include <nuttx/spi/spi.h>
|
||||||
|
#include <arch/board/board.h>
|
||||||
|
|
||||||
|
#include "up_arch.h"
|
||||||
|
#include "chip.h"
|
||||||
|
#include "imxrt_lpspi.h"
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifndef CONFIG_IMXRT_LPSPI1
|
||||||
|
# error "SD driver requires CONFIG_IMXRT_LPSPI1 to be enabled"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_DISABLE_MOUNTPOINT
|
||||||
|
# error "SD driver requires CONFIG_DISABLE_MOUNTPOINT to be disabled"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* Private Definitions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static const int SD_SPI_PORT = CONFIG_NSH_MMCSDSPIPORTNO; /* SD is connected to SPI1 port */
|
||||||
|
static const int SD_SLOT_NO = 0; /* There is only one SD slot */
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* Private Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/* NOTE: We are using a SDCard adapter/module without Card Detect pin!
|
||||||
|
* Then we don't need to Card Detect callback here.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* Name: imxrt_spi1register
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Registers media change callback
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI1
|
||||||
|
int imxrt_lpspi1register(struct spi_dev_s *dev, spi_mediachange_t callback,
|
||||||
|
void *arg)
|
||||||
|
{
|
||||||
|
spiinfo("INFO: Registering spi1 device\n");
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*****************************************************************************
|
||||||
|
* Name: imxrt_mmcsd_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Initialize SPI-based SD card and card detect thread.
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
int imxrt_mmcsd_initialize(int minor)
|
||||||
|
{
|
||||||
|
struct spi_dev_s *spi;
|
||||||
|
int rv;
|
||||||
|
|
||||||
|
mcinfo("INFO: Initializing mmcsd card\n");
|
||||||
|
|
||||||
|
spi = imxrt_lpspibus_initialize(SD_SPI_PORT);
|
||||||
|
if (spi == NULL)
|
||||||
|
{
|
||||||
|
mcerr("ERROR: Failed to initialize SPI port %d\n", SD_SPI_PORT);
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
|
||||||
|
rv = mmcsd_spislotinitialize(minor, SD_SLOT_NO, spi);
|
||||||
|
if (rv < 0)
|
||||||
|
{
|
||||||
|
mcerr("ERROR: Failed to bind SPI port %d to SD slot %d\n",
|
||||||
|
SD_SPI_PORT, SD_SLOT_NO);
|
||||||
|
return rv;
|
||||||
|
}
|
||||||
|
|
||||||
|
spiinfo("INFO: mmcsd card has been initialized successfully\n");
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
@@ -0,0 +1,217 @@
|
|||||||
|
/************************************************************************************
|
||||||
|
* configs/imxrt1050-evk/src/imxrt_spi.c
|
||||||
|
*
|
||||||
|
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Ivan Ucherdzhiev <ivanucherdjiev@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include <errno.h>
|
||||||
|
#include <debug.h>
|
||||||
|
|
||||||
|
#include <nuttx/spi/spi.h>
|
||||||
|
#include <arch/board/board.h>
|
||||||
|
|
||||||
|
#include "up_arch.h"
|
||||||
|
|
||||||
|
#include "imxrt_config.h"
|
||||||
|
#include "imxrt_lpspi.h"
|
||||||
|
#include "imxrt_gpio.h"
|
||||||
|
#include "imxrt1050-evk.h"
|
||||||
|
|
||||||
|
#if defined(CONFIG_IMXRT_LPSPI1) || defined(CONFIG_IMXRT_LPSPI2) || \
|
||||||
|
defined(CONFIG_IMXRT_LPSPI3) || defined(CONFIG_IMXRT_LPSPI4)
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: imxrt_spidev_initialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Called to configure SPI chip select GPIO pins for the imxrt1050-evk board.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
void weak_function imxrt_spidev_initialize(void)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI1
|
||||||
|
(void)imxrt_config_gpio(GPIO_LPSPI1_CS); /* LPSPI1 chip select */
|
||||||
|
(void)imxrt_config_gpio(GPIO_MMCSD_EN);
|
||||||
|
#endif
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI3
|
||||||
|
(void)imxrt_config_gpio(GPIO_LPSPI3_CS); /* LPSPI3 chip select */
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: imxrt_lpspi1/2/3select and imxrt_lpspi1/2/3status
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* The external functions, imxrt_lpspi1/2/3select and imxrt_lpspi1/2/3status must be
|
||||||
|
* provided by board-specific logic. They are implementations of the select
|
||||||
|
* and status methods of the SPI interface defined by struct spi_ops_s (see
|
||||||
|
* include/nuttx/spi/spi.h). All other methods (including imxrt_lpspibus_initialize())
|
||||||
|
* are provided by common STM32 logic. To use this common SPI logic on your
|
||||||
|
* board:
|
||||||
|
*
|
||||||
|
* 1. Provide logic in imxrt_boardinitialize() to configure SPI chip select
|
||||||
|
* pins.
|
||||||
|
* 2. Provide imxrt_lpspi1/2/3select() and imxrt_lpspi1/2/3status() functions in your
|
||||||
|
* board-specific logic. These functions will perform chip selection and
|
||||||
|
* status operations using GPIOs in the way your board is configured.
|
||||||
|
* 3. Add a calls to imxrt_lpspibus_initialize() in your low level application
|
||||||
|
* initialization logic
|
||||||
|
* 4. The handle returned by imxrt_lpspibus_initialize() may then be used to bind the
|
||||||
|
* SPI driver to higher level logic (e.g., calling
|
||||||
|
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
|
||||||
|
* the SPI MMC/SD driver).
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI1
|
||||||
|
void imxrt_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
|
||||||
|
{
|
||||||
|
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||||
|
|
||||||
|
imxrt_gpio_write(GPIO_LPSPI1_CS, !selected);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t imxrt_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI2
|
||||||
|
void imxrt_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
|
||||||
|
{
|
||||||
|
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||||
|
|
||||||
|
imxrt_gpio_write(GPIO_LPSPI2_CS, !selected);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t imxrt_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI3
|
||||||
|
void imxrt_lpspi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
|
||||||
|
{
|
||||||
|
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||||
|
|
||||||
|
imxrt_gpio_write(GPIO_LPSPI3_CS, !selected);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t imxrt_lpspi3status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI4
|
||||||
|
void imxrt_lpspi4select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
|
||||||
|
{
|
||||||
|
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||||
|
|
||||||
|
imxrt_gpio_write(GPIO_LPSPI4_CS, !selected);
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t imxrt_lpspi4status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: imxrt_lpspi1cmddata
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
|
||||||
|
* or command (false). This function must be provided by platform-specific
|
||||||
|
* logic. This is an implementation of the cmddata method of the SPI
|
||||||
|
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
*
|
||||||
|
* spi - SPI device that controls the bus the device that requires the CMD/
|
||||||
|
* DATA selection.
|
||||||
|
* devid - If there are multiple devices on the bus, this selects which one
|
||||||
|
* to select cmd or data. NOTE: This design restricts, for example,
|
||||||
|
* one one SPI display per SPI bus.
|
||||||
|
* cmd - true: select command; false: select data
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* None
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
#ifdef CONFIG_SPI_CMDDATA
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI1
|
||||||
|
int imxrt_lpspi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||||
|
{
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI2
|
||||||
|
int imxrt_lpspi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||||
|
{
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI3
|
||||||
|
int imxrt_lpspi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||||
|
{
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_IMXRT_LPSPI4
|
||||||
|
int imxrt_lpspi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
|
||||||
|
{
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif /* CONFIG_SPI_CMDDATA */
|
||||||
|
|
||||||
|
#endif /* CONFIG_IMXRT_LPSPI1 || CONFIG_IMXRT_LPSPI2 */
|
||||||
Reference in New Issue
Block a user