PIC32MZ: Implement support for IO port interrupts

arch/mips/src/pic32mz/Kconfig

@@ -248,13 +248,56 @@ config PIC32MZ_CTMU
 
 endmenu
 
-config PIC32MZ_GPIOIRQ
+menuconfig PIC32MZ_GPIOIRQ
-	bool "GPIO Interrupt"
+	bool "GPIO Interrupt Support"
 	default n
-	depends on EXPERIMENTAL
 	---help---
 		Build in support for interrupts based on GPIO inputs from IOPorts
 
+if PIC32MZ_GPIOIRQ
+
+menuconfig PIC32MZ_GPIOIRQ_PORTA
+	bool "I/O PORTA Interrupt Support"
+	default n
+
+menuconfig PIC32MZ_GPIOIRQ_PORTB
+	bool "I/O PORTB Interrupt Support"
+	default n
+
+menuconfig PIC32MZ_GPIOIRQ_PORTC
+	bool "I/O PORTC Interrupt Support"
+	default n
+
+menuconfig PIC32MZ_GPIOIRQ_PORTD
+	bool "I/O PORTD Interrupt Support"
+	default n
+
+menuconfig PIC32MZ_GPIOIRQ_PORTE
+	bool "I/O PORTE Interrupt Support"
+	default n
+
+menuconfig PIC32MZ_GPIOIRQ_PORTF
+	bool "I/O PORTF Interrupt Support"
+	default n
+
+menuconfig PIC32MZ_GPIOIRQ_PORTG
+	bool "I/O PORTG Interrupt Support"
+	default n
+
+menuconfig PIC32MZ_GPIOIRQ_PORTH
+	bool "I/O PORTH Interrupt Support"
+	default n
+
+menuconfig PIC32MZ_GPIOIRQ_PORTJ
+	bool "I/O PORTJ Interrupt Support"
+	default n
+
+menuconfig PIC32MZ_GPIOIRQ_PORTK
+	bool "I/O PORTK Interrupt Support"
+	default n
+
+endif # PIC32MZ_GPIOIRQ
+
 config PIC32MZ_T1_SOSC
 	bool
 	default n

arch/mips/src/pic32mz/chip/pic32mz-ioport.h

@@ -51,16 +51,16 @@
  ********************************************************************************************/
 /* IOPort Peripheral Offsets ****************************************************************/
 
-#define PI32MZ_IOPORTA                 0
+#define PIC32MZ_IOPORTA                0
-#define PI32MZ_IOPORTB                 1
+#define PIC32MZ_IOPORTB                1
-#define PI32MZ_IOPORTC                 2
+#define PIC32MZ_IOPORTC                2
-#define PI32MZ_IOPORTD                 3
+#define PIC32MZ_IOPORTD                3
-#define PI32MZ_IOPORTE                 4
+#define PIC32MZ_IOPORTE                4
-#define PI32MZ_IOPORTF                 5
+#define PIC32MZ_IOPORTF                5
-#define PI32MZ_IOPORTG                 6
+#define PIC32MZ_IOPORTG                6
-#define PI32MZ_IOPORTH                 7
+#define PIC32MZ_IOPORTH                7
-#define PI32MZ_IOPORTJ                 8
+#define PIC32MZ_IOPORTJ                8
-#define PI32MZ_IOPORTK                 9
+#define PIC32MZ_IOPORTK                9
 
 #define PIC32MZ_IOPORTn_OFFSET(n)      ((n)<<8)
 #  define PIC32MZ_IOPORTA_OFFSET       0x0000
@@ -789,30 +789,37 @@
 /* Analog select register */
 
 #define IOPORT_ANSEL(n)                (1 << (n)) /* Bits 0-15: Analog select */
+#define IOPORT_ANSEL_ALL               0x0000ffff
 
 /* Tri-state register */
 
 #define IOPORT_TRIS(n)                 (1 << (n)) /* Bits 0-15: 1: Input 0: Output */
+#define IOPORT_TRIS_ALL                0x0000ffff
 
 /* Port register */
 
 #define IOPORT_PORT(n)                 (1 << (n)) /* Bits 0-15: Pin value */
+#define IOPORT_PORT_ALL                0x0000ffff
 
 /* Port data latch register */
 
 #define IOPORT_LAT(n)                  (1 << (n)) /* Bits 0-15: Port latch value */
+#define IOPORT_LAT_ALL                 0x0000ffff
 
 /* Open drain control register */
 
 #define IOPORT_ODC(n)                  (1 << (n)) /* Bits 0-15: 1: OD output enabled, 0: Disabled */
+#define IOPORT_ODC_ALL                 0x0000ffff
 
 /* Change Notice Pull-up register */
 
 #define IOPORT_CNPU(n)                 (1 << (n)) /* Bits 0:15: 1=Pull-up enabled */
+#define IOPORT_CNPU_ALL                0x0000ffff
 
 /* Change Notice Pull-down register */
 
 #define IOPORT_CNPD(n)                 (1 << (n)) /* Bits 0:15: 1=Pull-down enabled */
+#define IOPORT_CNPD_ALL                0x0000ffff
 
 /* Change Notice Control register */
 
@@ -822,10 +829,12 @@
 /* Change Notice Interrupt Enable register */
 
 #define IOPORT_CNEN(n)                 (1 << (n)) /* Bits 0-15: 1=Interrupt enabled */
+#define IOPORT_CNEN_ALL                0x0000ffff
 
-/* Change Notice Control register */
+/* Change Notice Status register */
 
-#define IOPORT_CNSTAT(n)               (1 << (n)  /* Bits 0-15: Change notice control pin n */
+#define IOPORT_CNSTAT(n)               (1 << (n)) /* Bits 0-15: Change notice control pin n */
+#define IOPORT_CNSTAT_ALL              0x0000ffff
 
 /********************************************************************************************
  * Public Types

arch/mips/src/pic32mz/pic32mz-config.h

@@ -48,6 +48,52 @@
 /************************************************************************************
  * Pre-processor Definitions
  ************************************************************************************/
+/* GPIO IRQs ************************************************************************/
+
+#ifndef PIC32MZ_GPIOIRQ
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTA
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTB
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTC
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTD
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTE
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTF
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTG
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTH
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTJ
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTK
+#endif
+
+#if CHIP_NPORTS < 1
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTA
+#endif
+#if CHIP_NPORTS < 2
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTB
+#endif
+#if CHIP_NPORTS < 3
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTC
+#endif
+#if CHIP_NPORTS < 4
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTD
+#endif
+#if CHIP_NPORTS < 5
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTE
+#endif
+#if CHIP_NPORTS < 6
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTF
+#endif
+#if CHIP_NPORTS < 7
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTG
+#endif
+#if CHIP_NPORTS < 8
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTH
+#endif
+#if CHIP_NPORTS < 9
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTJ
+#endif
+#if CHIP_NPORTS < 10
+#  undef CONFIG_PIC32MZ_GPIOIRQ_PORTK
+#endif
+
 /* UARTs ****************************************************************************/
 /* Don't enable UARTs not supported by the chip. */
 

arch/mips/src/pic32mz/pic32mz-gpio.c

@@ -61,12 +61,12 @@
 /****************************************************************************
  * Public Data
  ****************************************************************************/
+/* This table can be used to map a port number to a IOPORT base address.  For
+ * example, an index of zero would correspond to IOPORTA, one with IOPORTB,
+ * etc.
+ */
 
-/****************************************************************************
+const uintptr_t g_gpiobase[CHIP_NPORTS] =
- * Private Data
- ****************************************************************************/
-
-static const uintptr_t g_gpiobase[CHIP_NPORTS] =
 {
   PIC32MZ_IOPORTA_K1BASE
 #if CHIP_NPORTS > 1
@@ -106,37 +106,37 @@ static const uintptr_t g_gpiobase[CHIP_NPORTS] =
  * Name: Inline PIN set field extractors
  ****************************************************************************/
 
-static inline bool pic32mz_output(uint16_t pinset)
+static inline bool pic32mz_output(pinset_t pinset)
 {
   return ((pinset & GPIO_OUTPUT) != 0);
 }
 
-static inline bool pic32mz_opendrain(uint16_t pinset)
+static inline bool pic32mz_opendrain(pinset_t pinset)
 {
   return ((pinset & GPIO_MODE_MASK) == GPIO_OPENDRAN);
 }
 
-static inline bool pic32mz_outputhigh(uint16_t pinset)
+static inline bool pic32mz_outputhigh(pinset_t pinset)
 {
   return ((pinset & GPIO_VALUE_MASK) != 0);
 }
 
-static inline bool pic32mz_value(uint16_t pinset)
+static inline bool pic32mz_value(pinset_t pinset)
 {
   return ((pinset & GPIO_VALUE_MASK) != GPIO_VALUE_ZERO);
 }
 
-static inline unsigned int pic32mz_portno(uint16_t pinset)
+static inline unsigned int pic32mz_portno(pinset_t pinset)
 {
   return ((pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT);
 }
 
-static inline unsigned int pic32mz_pinno(uint16_t pinset)
+static inline unsigned int pic32mz_pinno(pinset_t pinset)
 {
   return ((pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT);
 }
 
-static inline unsigned int pic32mz_analog(uint16_t pinset)
+static inline unsigned int pic32mz_analog(pinset_t pinset)
 {
   return ((pinset & GPIO_ANALOG_MASK) != 0);
 }
@@ -157,7 +157,7 @@ static inline unsigned int pic32mz_analog(uint16_t pinset)
  *
  ****************************************************************************/
 
-int pic32mz_configgpio(uint16_t cfgset)
+int pic32mz_configgpio(pinset_t cfgset)
 {
   unsigned int port = pic32mz_portno(cfgset);
   unsigned int pin  = pic32mz_pinno(cfgset);
@@ -242,7 +242,7 @@ int pic32mz_configgpio(uint16_t cfgset)
  *
  ****************************************************************************/
 
-void pic32mz_gpiowrite(uint16_t pinset, bool value)
+void pic32mz_gpiowrite(pinset_t pinset, bool value)
 {
   unsigned int port = pic32mz_portno(pinset);
   unsigned int pin  = pic32mz_pinno(pinset);
@@ -277,7 +277,7 @@ void pic32mz_gpiowrite(uint16_t pinset, bool value)
  *
  ****************************************************************************/
 
-bool pic32mz_gpioread(uint16_t pinset)
+bool pic32mz_gpioread(pinset_t pinset)
 {
   unsigned int port = pic32mz_portno(pinset);
   unsigned int pin  = pic32mz_pinno(pinset);

arch/mips/src/pic32mz/pic32mz-gpio.h

@@ -42,6 +42,8 @@
 
 #include <nuttx/config.h>
 #include <nuttx/compiler.h>
+#include <nuttx/irq.h>
+#include <arch/pic32mz/irq.h>
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -66,15 +68,9 @@
 #  define GPIO_VALUE_ONE  (1 << 12)
 #  define GPIO_VALUE_ZERO (0)
 
-#define GPIO_PULLUP       (1 << 11) /* Bit 11: Change notification pull-up */
+#define GPIO_INTERRUPT    (1 << 11) /* Bit 11: Change notification enable */
-
+#define GPIO_PULLUP       (1 << 10) /* Bit 10: Change notification pull-up */
-#define GPIO_INT_SHIFT    (10)      /* Bits 10-11: Interrupt mode */
+#define GPIO_PULLDOWN     (1 << 9)  /* Bit 9:  Change notification pull-down */
-#define GPIO_INT_MASK     (3 << GPIO_INT_SHIFT)
-#  define GPIO_INT_NONE   (0 << GPIO_INT_SHIFT) /* Bit 00: No interrupt */
-#  define GPIO_INT        (1 << GPIO_INT_SHIFT) /* Bit 01: Change notification enable */
-#  define GPIO_PUINT      (3 << GPIO_INT_SHIFT) /* Bit 11: Pulled-up interrupt input */
-
-#define GPIO_PULLDOWN     (1 << 9) /* Bit 11: Change notification pull-down */
 
 #define GPIO_PORT_SHIFT   (5)       /* Bits 5-8: Port number */
 #define GPIO_PORT_MASK    (15 << GPIO_PORT_SHIFT)
@@ -114,6 +110,8 @@
 
 #ifndef __ASSEMBLY__
 
+typedef uint16_t pinset_t;
+
 /************************************************************************************
  * Public Data
  ************************************************************************************/
@@ -127,6 +125,13 @@ extern "C"
 #define EXTERN extern
 #endif
 
+/* This table can be used to map a port number to a IOPORT base address.  For
+ * example, an index of zero would correspond to IOPORTA, one with IOPORTB,
+ * etc.
+ */
+
+EXTERN const uintptr_t g_gpiobase[CHIP_NPORTS];
+
 /************************************************************************************
  * Public Function Prototypes
  ************************************************************************************/
@@ -143,7 +148,7 @@ extern "C"
  *
  ************************************************************************************/
 
-int pic32mz_configgpio(uint16_t cfgset);
+int pic32mz_configgpio(pinset_t cfgset);
 
 /************************************************************************************
  * Name: pic32mz_gpiowrite
@@ -207,7 +212,7 @@ void pic32mz_gpioirqinitialize(void);
  ************************************************************************************/
 
 #ifdef CONFIG_PIC32MZ_GPIOIRQ
-xcpt_t pic32mz_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler);
+xcpt_t pic32mz_gpioattach(uint32_t pinset, xcpt_t handler);
 #else
 #  define pic32mz_gpioattach(p,f) (NULL)
 #endif
@@ -221,7 +226,7 @@ xcpt_t pic32mz_gpioattach(uint32_t pinset, unsigned int cn, xcpt_t handler);
  ************************************************************************************/
 
 #ifdef CONFIG_PIC32MZ_GPIOIRQ
-void pic32mz_gpioirqenable(unsigned int cn);
+void pic32mz_gpioirqenable(pinset_t pinset);
 #else
 #  define pic32mz_gpioirqenable(irq)
 #endif
@@ -235,7 +240,7 @@ void pic32mz_gpioirqenable(unsigned int cn);
  ************************************************************************************/
 
 #ifdef CONFIG_PIC32MZ_GPIOIRQ
-void pic32mz_gpioirqdisable(unsigned int cn);
+void pic32mz_gpioirqdisable(pinset_t pinset);
 #else
 #  define pic32mz_gpioirqdisable(irq)
 #endif