diff --git a/arch/xtensa/src/common/xtensa_panic.S b/arch/xtensa/src/common/xtensa_panic.S
index d68567db2df..9ebd7c90714 100644
--- a/arch/xtensa/src/common/xtensa_panic.S
+++ b/arch/xtensa/src/common/xtensa_panic.S
@@ -130,6 +130,10 @@ _xtensa_panic:
 	s32i	a3, sp, (4 * REG_A3)
 	call0	_xtensa_context_save			/* Save full register state */
 
+	/* Dispatch the sycall as with other interrupts. */
+
+	mov		a12, sp							/* a12 = address of register save area */
+
 	/* Switch to an interrupt stack if we have one */
 
 #if CONFIG_ARCH_INTERRUPTSTACK > 15
@@ -152,6 +156,7 @@ _xtensa_panic:
 #endif
 
 	wsr		a0, PS
+	rsync
 
 	/* Call C panic handler:  Arg1 (A2) = Exception code; Arg 2 (A3) = start
 	 * of the register save area.
@@ -159,11 +164,11 @@ _xtensa_panic:
 
 #ifdef __XTENSA_CALL0_ABI__
 	rsr		a2, EXCSAVE_1
-	mov		a3, sp
+	mov		a3, a12
 	call0	xtensa_panic					/* Call xtensa_panic. Should not return */
 #else
 	rsr		a6, EXCSAVE_1
-	mov		a7, sp
+	mov		a7, a12
 	call4	xtensa_panic					/* Call xtensa_panic. Should not return */
 #endif