From a1598152d15a941c3d7eaecb4891c3b4970df456 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 17 Nov 2014 12:48:01 -0600 Subject: [PATCH] Update ChangeLog --- ChangeLog | 2 ++ arch/arm/src/sama5/sam_emacb.c | 12 ++++++------ configs/sama5d4-ek/README.txt | 17 +++++++++++++++-- 3 files changed, 23 insertions(+), 8 deletions(-) diff --git a/ChangeLog b/ChangeLog index b97b3de25b9..26089e4a551 100755 --- a/ChangeLog +++ b/ChangeLog @@ -9005,4 +9005,6 @@ when both Ethernet and SLIP are enabled (2014-11-16). * configs/sama5d4-ek/bridge: Add a simple test for the dual EMACs on the SAMA5D4 (2014-11-17). + * arch/arm/src/sama5/sam_emacb.c: Fix several typos that will prevent + EMAC1 from initializing properly (2014-11-17). diff --git a/arch/arm/src/sama5/sam_emacb.c b/arch/arm/src/sama5/sam_emacb.c index 3565a16e91b..c6d2ac588b3 100644 --- a/arch/arm/src/sama5/sam_emacb.c +++ b/arch/arm/src/sama5/sam_emacb.c @@ -266,7 +266,7 @@ # else # error EMAC PHY unrecognized # endif -#endif /* CONFIG_SAMA5_EMAC0 */ +#endif /* CONFIG_SAMA5_EMAC1 */ /* Common Configuration *****************************************************/ @@ -587,7 +587,7 @@ static struct emac_rxdesc_s g_emac1_rxdesc[CONFIG_SAMA5_EMAC1_NRXBUFFERS] static uint8_t g_emac1_txbuffer[CONFIG_SAMA5_EMAC1_NTXBUFFERS * EMAC_TX_UNITSIZE]; __attribute__((aligned(8))) -/* EMAC0 Receive Buffers */ +/* EMAC1 Receive Buffers */ static uint8_t g_emac1_rxbuffer[CONFIG_SAMA5_EMAC1_NRXBUFFERS * EMAC_RX_UNITSIZE] __attribute__((aligned(8))); @@ -641,8 +641,8 @@ static const struct sam_emacattr_s g_emac0_attr = .std = { .stdmask = (CONFIG_SAMA5_EMAC0_PHYSR_SPEED | CONFIG_SAMA5_EMAC0_PHYSR_MODE), - .speed100 = CONFIG_SAMA5_EMAC1_PHYSR_100MBPS, - .fduplex = CONFIG_SAMA5_EMAC1_PHYSR_FULLDUPLEX, + .speed100 = CONFIG_SAMA5_EMAC0_PHYSR_100MBPS, + .fduplex = CONFIG_SAMA5_EMAC0_PHYSR_FULLDUPLEX, }, #endif }, @@ -672,7 +672,7 @@ static const struct sam_emacattr_s g_emac1_attr = .base = SAM_EMAC1_VBASE, .handler = sam_emac1_interrupt, - .emac = 0, + .emac = 1, .irq = SAM_IRQ_EMAC1, /* PHY Configuration */ @@ -3279,7 +3279,7 @@ static inline void sam_ethgpioconfig(struct sam_emac_s *priv) } #endif -#if defined(CONFIG_SAMA5_EMAC0) +#if defined(CONFIG_SAMA5_EMAC1) /* Configure EMAC0 PIO pins */ if (priv->attr->emac == 1) diff --git a/configs/sama5d4-ek/README.txt b/configs/sama5d4-ek/README.txt index 2cde57bab65..ca164ed4672 100644 --- a/configs/sama5d4-ek/README.txt +++ b/configs/sama5d4-ek/README.txt @@ -3668,8 +3668,21 @@ Configurations the warning in the section "Information Common to All Configurations" for further information. - 3. This configuration executes from DRAM and must be loaded via some - bootloader. I use DRAMBOOT as described above. + 3. EMAC0 and EMAC1 connect KSZ8081RNB PHYs and are available at the + ETH0 and ETH1 connector, respectively. + + The ETH1 signals go through line drivers that are enabled via the + board LCD_ETH1_CONFIG signal. Jumper JP2 selects either the EMAC1 + or the LCD by controlling the the LCD_ETH1_CONFIG signal on the + board. + + - JP2 open, LCD_ETH1_CONFIG pulled high: + + LCD_ETH1_CONFIG=1: LCD 5v enable(LCD_DETECT#=0); ETH1 disable + + - JP2 closed, LCD_ETH1_CONFIG grounded: + + LCD_ETH1_CONFIG=0: LCD 5v disable; ETH1 enable STATUS: