diff --git a/arch/arm/include/stm32/chip.h b/arch/arm/include/stm32/chip.h index 3c89f294a82..fed90339cd3 100644 --- a/arch/arm/include/stm32/chip.h +++ b/arch/arm/include/stm32/chip.h @@ -110,6 +110,33 @@ # define STM32_NRNG 0 /* No random number generator (RNG) */ # define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ +#elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) +# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ +# undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ +# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ +# define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */ +# undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ +# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx families */ +# define STM32_NFSMC 1 /* FSMC */ +# define STM32_NATIM 2 /* Two advanced timers TIM1 and TIM8 */ +# define STM32_NGTIM 4 /* General timers TIM2,3,4,5 */ +# define STM32_NBTIM 2 /* Two basic timers TIM6 and TIM7 */ +# define STM32_NDMA 2 /* DMA1-2 */ +# define STM32_NSPI 3 /* SPI1-3 */ +# define STM32_NI2S 0 /* No I2S (?) */ +# define STM32_NUSART 5 /* USART1-5 */ +# define STM32_NI2C 2 /* I2C1-2 */ +# define STM32_NCAN 1 /* bxCAN1 */ +# define STM32_NSDIO 1 /* SDIO */ +# define STM32_NUSBOTG 0 /* No USB OTG FS/HS */ +# define STM32_NGPIO 80 /* GPIOA-E */ +# define STM32_NADC 3 /* ADC1-3 */ +# define STM32_NDAC 2 /* DAC1-2 */ +# define STM32_NCRC 1 /* CRC */ +# define STM32_NTHERNET 0 /* No ethernet */ +# define STM32_NRNG 0 /* No random number generator (RNG) */ +# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ + #elif defined(CONFIG_ARCH_CHIP_STM32F107VC) # define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ # undef CONFIG_STM32_LOWDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ diff --git a/arch/arm/src/stm32/chip.h b/arch/arm/src/stm32/chip.h index 0b7b7ab8acc..5a560edfe13 100644 --- a/arch/arm/src/stm32/chip.h +++ b/arch/arm/src/stm32/chip.h @@ -53,6 +53,8 @@ # include "chip/stm32f103ze_pinmap.h" # elif defined(CONFIG_ARCH_CHIP_STM32F103RET6) # include "chip/stm32f103re_pinmap.h" +# elif defined(CONFIG_ARCH_CHIP_STM32F103VCT6) +# include "chip/stm32f103vc_pinmap.h" # elif defined(CONFIG_ARCH_CHIP_STM32F107VC) # include "chip/stm32f107vc_pinmap.h" # else diff --git a/arch/arm/src/stm32/stm32_spi.c b/arch/arm/src/stm32/stm32_spi.c index abc641b49ca..efe04e39121 100644 --- a/arch/arm/src/stm32/stm32_spi.c +++ b/arch/arm/src/stm32/stm32_spi.c @@ -905,7 +905,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) spi_modifycr1(priv, setbits, clrbits); - /* Save the mode so that subsequent re-configuratins will be faster */ + /* Save the mode so that subsequent re-configurations will be faster */ #ifndef CONFIG_SPI_OWNBUS priv->mode = mode; @@ -1102,7 +1102,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, * dev - Device-specific state data * txbuffer - A pointer to the buffer of data to be sent * rxbuffer - A pointer to a buffer in which to receive data - * nwords - the length of data to be exchaned in units of words. + * nwords - the length of data to be exchanged in units of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's @@ -1169,7 +1169,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer, si * Name: spi_recvblock * * Description: - * Revice a block of data from SPI + * Receive a block of data from SPI * * Input Parameters: * dev - Device-specific state data @@ -1295,8 +1295,6 @@ FAR struct spi_dev_s *up_spiinitialize(int port) #ifdef CONFIG_STM32_SPI1 if (port == 1) { - uint32_t mapr; - /* Select SPI1 */ priv = &g_spi1dev;