Fix typo in configuration variables: MP25P should M25P

This commit is contained in:
Gregory Nutt
2013-05-01 12:04:39 -06:00
parent 1099eabe3d
commit 9ead6cadff
9 changed files with 49 additions and 49 deletions
+2 -2
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@@ -103,9 +103,9 @@ CONFIG_UART_PARITY=0
CONFIG_UART_2STOP=0 CONFIG_UART_2STOP=0
# #
# MP25x Configuration # M25Px Configuration
# #
CONFIG_MP25P_SPIMODE=3 CONFIG_M25P_SPIMODE=3
# #
# General build options # General build options
+1 -1
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@@ -51,7 +51,7 @@
# include <nuttx/mmcsd.h> # include <nuttx/mmcsd.h>
#endif #endif
#ifdef CONFIG_MTD_MP25P #ifdef CONFIG_MTD_M25P
# include <nuttx/mtd.h> # include <nuttx/mtd.h>
#endif #endif
+2 -2
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@@ -102,7 +102,7 @@ void weak_function stm32_spiinitialize(void)
{ {
#ifdef CONFIG_STM32_SPI3 #ifdef CONFIG_STM32_SPI3
#ifdef CONFIG_MTD_MP25P #ifdef CONFIG_MTD_M25P
(void)stm32_configgpio(GPIO_CS_FLASH); /* FLASH chip select */ (void)stm32_configgpio(GPIO_CS_FLASH); /* FLASH chip select */
stm32_gpiowrite(GPIO_CS_FLASH, 1); /* Ensure the CS is inactive */ stm32_gpiowrite(GPIO_CS_FLASH, 1); /* Ensure the CS is inactive */
#endif #endif
@@ -155,7 +155,7 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
{ {
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
#if defined(CONFIG_MTD_MP25P) #if defined(CONFIG_MTD_M25P)
if (devid == SPIDEV_FLASH) if (devid == SPIDEV_FLASH)
{ {
stm32_gpiowrite(GPIO_CS_FLASH, !selected); stm32_gpiowrite(GPIO_CS_FLASH, !selected);
+6 -6
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@@ -417,12 +417,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff
CONFIG_RAMMTD_SMART=y CONFIG_RAMMTD_SMART=y
# CONFIG_MTD_AT24XX is not set # CONFIG_MTD_AT24XX is not set
# CONFIG_MTD_AT45DB is not set # CONFIG_MTD_AT45DB is not set
CONFIG_MTD_MP25P=y CONFIG_MTD_M25P=y
CONFIG_MP25P_SPIMODE=0 CONFIG_M25P_SPIMODE=0
CONFIG_MP25P_MANUFACTURER=0x1C CONFIG_M25P_MANUFACTURER=0x1C
CONFIG_MP25P_MEMORY_TYPE=0x31 CONFIG_M25P_MEMORY_TYPE=0x31
CONFIG_MP25P_SUBSECTOR_ERASE=y CONFIG_M25P_SUBSECTOR_ERASE=y
CONFIG_MP25P_BYTEWRITE=y CONFIG_M25P_BYTEWRITE=y
CONFIG_MTD_SMART=y CONFIG_MTD_SMART=y
CONFIG_MTD_SMART_SECTOR_SIZE=512 CONFIG_MTD_SMART_SECTOR_SIZE=512
# CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_RAMTRON is not set
+1 -1
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@@ -214,7 +214,7 @@ CONFIG_RAMMTD_ERASESTATE=0xff
CONFIG_RAMMTD_FLASHSIM=y CONFIG_RAMMTD_FLASHSIM=y
# CONFIG_MTD_AT24XX is not set # CONFIG_MTD_AT24XX is not set
# CONFIG_MTD_AT45DB is not set # CONFIG_MTD_AT45DB is not set
# CONFIG_MTD_MP25P is not set # CONFIG_MTD_M25P is not set
# CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_RAMTRON is not set
# CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25 is not set
# CONFIG_MTD_SST39FV is not set # CONFIG_MTD_SST39FV is not set
+1 -1
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@@ -214,7 +214,7 @@ CONFIG_RAMMTD_ERASESTATE=0xff
CONFIG_RAMMTD_FLASHSIM=y CONFIG_RAMMTD_FLASHSIM=y
# CONFIG_MTD_AT24XX is not set # CONFIG_MTD_AT24XX is not set
# CONFIG_MTD_AT45DB is not set # CONFIG_MTD_AT45DB is not set
# CONFIG_MTD_MP25P is not set # CONFIG_MTD_M25P is not set
# CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_RAMTRON is not set
# CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25 is not set
# CONFIG_MTD_SST39FV is not set # CONFIG_MTD_SST39FV is not set
+12 -12
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@@ -114,34 +114,34 @@ config AT45DB_PWRSAVE
endif endif
config MTD_MP25P config MTD_M25P
bool "SPI-based M25P FLASH" bool "SPI-based M25P FLASH"
default n default n
select SPI select SPI
if MTD_MP25P if MTD_M25P
config MP25P_SPIMODE config M25P_SPIMODE
int "MP25P SPI mode" int "M25P SPI mode"
default 0 default 0
config MP25P_MANUFACTURER config M25P_MANUFACTURER
hex "MP25P manufacturers ID" hex "M25P manufacturers ID"
default 0x20 default 0x20
---help--- ---help---
Various manufacturers may have produced the parts. 0x20 is the manufacturer ID Various manufacturers may have produced the parts. 0x20 is the manufacturer ID
for the STMicro MP25x serial FLASH. If, for example, you are using the a Macronix for the STMicro MP25x serial FLASH. If, for example, you are using the a Macronix
International MX25 serial FLASH, the correct manufacturer ID would be 0xc2. International MX25 serial FLASH, the correct manufacturer ID would be 0xc2.
config MP25P_MEMORY_TYPE config M25P_MEMORY_TYPE
hex "MP25P memory type ID" hex "M25P memory type ID"
default 0x20 default 0x20
---help--- ---help---
The memory type for M25 "P" series is 0x20, but the driver also supports "F" series The memory type for M25 "P" series is 0x20, but the driver also supports "F" series
devices, such as the EON EN25F80 part which adds a 4K sector erase capability. The devices, such as the EON EN25F80 part which adds a 4K sector erase capability. The
ID for "F" series parts from EON is 0x31. ID for "F" series parts from EON is 0x31.
config MP25P_SUBSECTOR_ERASE config M25P_SUBSECTOR_ERASE
bool "Sub-Sector Erase" bool "Sub-Sector Erase"
default n default n
---help--- ---help---
@@ -149,11 +149,11 @@ config MP25P_SUBSECTOR_ERASE
size (4K vs 64K). This option enables support for sub-sector erase. size (4K vs 64K). This option enables support for sub-sector erase.
The SMART file system can take advantage of this option if it is enabled. The SMART file system can take advantage of this option if it is enabled.
config MP25P_BYTEWRITE config M25P_BYTEWRITE
bool "Enable ByteWrite ioctl support" bool "Enable ByteWrite ioctl support"
default n default n
---help--- ---help---
The MP25P series of devices allow writing to a page with less than a full-page The M25P series of devices allow writing to a page with less than a full-page
size of data. In this case, only the written bytes are updated without affecting size of data. In this case, only the written bytes are updated without affecting
the other bytes in the page. The SMART FS requires this option for proper operation. the other bytes in the page. The SMART FS requires this option for proper operation.
@@ -162,7 +162,7 @@ endif
config MTD_SMART config MTD_SMART
bool "Sector Mapped Allocation for Really Tiny (SMART) Flash support" bool "Sector Mapped Allocation for Really Tiny (SMART) Flash support"
default y default y
select MP25P_BYTEWRITE select M25P_BYTEWRITE
---help--- ---help---
The MP25x series of Flash devices are typically very small and have a very large The MP25x series of Flash devices are typically very small and have a very large
erase block size. This causes issues with the standard Flash Translation Layer erase block size. This causes issues with the standard Flash Translation Layer
+23 -23
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@@ -58,15 +58,15 @@
* Pre-processor Definitions * Pre-processor Definitions
************************************************************************************/ ************************************************************************************/
/* Configuration ********************************************************************/ /* Configuration ********************************************************************/
/* Per the data sheet, MP25P10 parts can be driven with either SPI mode 0 (CPOL=0 and /* Per the data sheet, M25P10 parts can be driven with either SPI mode 0 (CPOL=0 and
* CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices can * CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices can
* operated in mode 0 or 1. So you may need to specify CONFIG_MP25P_SPIMODE to * operated in mode 0 or 1. So you may need to specify CONFIG_M25P_SPIMODE to
* select the best mode for your device. If CONFIG_MP25P_SPIMODE is not defined, * select the best mode for your device. If CONFIG_M25P_SPIMODE is not defined,
* mode 0 will be used. * mode 0 will be used.
*/ */
#ifndef CONFIG_MP25P_SPIMODE #ifndef CONFIG_M25P_SPIMODE
# define CONFIG_MP25P_SPIMODE SPIDEV_MODE0 # define CONFIG_M25P_SPIMODE SPIDEV_MODE0
#endif #endif
/* Various manufacturers may have produced the parts. 0x20 is the manufacturer ID /* Various manufacturers may have produced the parts. 0x20 is the manufacturer ID
@@ -74,19 +74,19 @@
* International MX25 serial FLASH, the correct manufacturer ID would be 0xc2. * International MX25 serial FLASH, the correct manufacturer ID would be 0xc2.
*/ */
#ifndef CONFIG_MP25P_MANUFACTURER #ifndef CONFIG_M25P_MANUFACTURER
# define CONFIG_MP25P_MANUFACTURER 0x20 # define CONFIG_M25P_MANUFACTURER 0x20
#endif #endif
#ifndef CONFIG_MP25P_MEMORY_TYPE #ifndef CONFIG_M25P_MEMORY_TYPE
# define CONFIG_MP25P_MEMORY_TYPE 0x20 # define CONFIG_M25P_MEMORY_TYPE 0x20
#endif #endif
/* M25P Registers *******************************************************************/ /* M25P Registers *******************************************************************/
/* Indentification register values */ /* Indentification register values */
#define M25P_MANUFACTURER CONFIG_MP25P_MANUFACTURER #define M25P_MANUFACTURER CONFIG_M25P_MANUFACTURER
#define M25P_MEMORY_TYPE CONFIG_MP25P_MEMORY_TYPE #define M25P_MEMORY_TYPE CONFIG_M25P_MEMORY_TYPE
#define M25P_RES_ID 0x13 #define M25P_RES_ID 0x13
#define M25P_M25P1_CAPACITY 0x11 /* 1 M-bit */ #define M25P_M25P1_CAPACITY 0x11 /* 1 M-bit */
#define M25P_EN25F80_CAPACITY 0x14 /* 8 M-bit */ #define M25P_EN25F80_CAPACITY 0x14 /* 8 M-bit */
@@ -203,7 +203,7 @@ struct m25p_dev_s
uint8_t pageshift; /* 8 */ uint8_t pageshift; /* 8 */
uint16_t nsectors; /* 128 or 64 */ uint16_t nsectors; /* 128 or 64 */
uint32_t npages; /* 32,768 or 65,536 */ uint32_t npages; /* 32,768 or 65,536 */
#ifdef CONFIG_MP25P_SUBSECTOR_ERASE #ifdef CONFIG_M25P_SUBSECTOR_ERASE
uint8_t subsectorshift; /* 0, 12 or 13 (4K or 8K) */ uint8_t subsectorshift; /* 0, 12 or 13 (4K or 8K) */
#endif #endif
}; };
@@ -223,7 +223,7 @@ static inline void m25p_sectorerase(struct m25p_dev_s *priv, off_t offset);
static inline int m25p_bulkerase(struct m25p_dev_s *priv); static inline int m25p_bulkerase(struct m25p_dev_s *priv);
static inline void m25p_pagewrite(struct m25p_dev_s *priv, FAR const uint8_t *buffer, static inline void m25p_pagewrite(struct m25p_dev_s *priv, FAR const uint8_t *buffer,
off_t offset); off_t offset);
#ifdef CONFIG_MP25P_SUBSECTOR_ERASE #ifdef CONFIG_M25P_SUBSECTOR_ERASE
static inline void m25p_subsectorerase(struct m25p_dev_s *priv, off_t offset); static inline void m25p_subsectorerase(struct m25p_dev_s *priv, off_t offset);
#endif #endif
@@ -268,7 +268,7 @@ static void m25p_lock(FAR struct spi_dev_s *dev)
* state. * state.
*/ */
SPI_SETMODE(dev, CONFIG_MP25P_SPIMODE); SPI_SETMODE(dev, CONFIG_M25P_SPIMODE);
SPI_SETBITS(dev, 8); SPI_SETBITS(dev, 8);
(void)SPI_SETFREQUENCY(dev, 20000000); (void)SPI_SETFREQUENCY(dev, 20000000);
} }
@@ -320,7 +320,7 @@ static inline int m25p_readid(struct m25p_dev_s *priv)
{ {
/* Okay.. is it a FLASH capacity that we understand? */ /* Okay.. is it a FLASH capacity that we understand? */
#ifdef CONFIG_MP25P_SUBSECTOR_ERASE #ifdef CONFIG_M25P_SUBSECTOR_ERASE
priv->subsectorshift = 0; priv->subsectorshift = 0;
#endif #endif
@@ -342,7 +342,7 @@ static inline int m25p_readid(struct m25p_dev_s *priv)
priv->nsectors = M25P_EN25F80_NSECTORS; priv->nsectors = M25P_EN25F80_NSECTORS;
priv->pageshift = M25P_EN25F80_PAGE_SHIFT; priv->pageshift = M25P_EN25F80_PAGE_SHIFT;
priv->npages = M25P_EN25F80_NPAGES; priv->npages = M25P_EN25F80_NPAGES;
#ifdef CONFIG_MP25P_SUBSECTOR_ERASE #ifdef CONFIG_M25P_SUBSECTOR_ERASE
priv->subsectorshift = M25P_EN25F80_SUBSECT_SHIFT; priv->subsectorshift = M25P_EN25F80_SUBSECT_SHIFT;
#endif #endif
return OK; return OK;
@@ -525,7 +525,7 @@ static inline void m25p_sectorerase(struct m25p_dev_s *priv, off_t sector)
* Name: m25p_subsectorerase * Name: m25p_subsectorerase
************************************************************************************/ ************************************************************************************/
#ifdef CONFIG_MP25P_SUBSECTOR_ERASE #ifdef CONFIG_M25P_SUBSECTOR_ERASE
static inline void m25p_subsectorerase(struct m25p_dev_s *priv, off_t subsector) static inline void m25p_subsectorerase(struct m25p_dev_s *priv, off_t subsector)
{ {
off_t offset = subsector << priv->subsectorshift; off_t offset = subsector << priv->subsectorshift;
@@ -654,7 +654,7 @@ static inline void m25p_pagewrite(struct m25p_dev_s *priv, FAR const uint8_t *bu
* Name: m25p_bytewrite * Name: m25p_bytewrite
************************************************************************************/ ************************************************************************************/
#ifdef CONFIG_MP25P_BYTEWRITE #ifdef CONFIG_M25P_BYTEWRITE
static inline void m25p_bytewrite(struct m25p_dev_s *priv, FAR const uint8_t *buffer, static inline void m25p_bytewrite(struct m25p_dev_s *priv, FAR const uint8_t *buffer,
off_t offset, uint16_t count) off_t offset, uint16_t count)
{ {
@@ -847,7 +847,7 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
geo->blocksize = (1 << priv->pageshift); geo->blocksize = (1 << priv->pageshift);
geo->erasesize = (1 << priv->sectorshift); geo->erasesize = (1 << priv->sectorshift);
geo->neraseblocks = priv->nsectors; geo->neraseblocks = priv->nsectors;
#ifdef CONFIG_MP25P_SUBSECTOR_ERASE #ifdef CONFIG_M25P_SUBSECTOR_ERASE
geo->subsectorsize = (1 << priv->subsectorshift); geo->subsectorsize = (1 << priv->subsectorshift);
geo->nsubsectors = priv->nsectors * (1 << (priv->sectorshift - geo->nsubsectors = priv->nsectors * (1 << (priv->sectorshift -
priv->subsectorshift)); priv->subsectorshift));
@@ -874,18 +874,18 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
case MTDIOC_GETCAPS: case MTDIOC_GETCAPS:
{ {
ret = 0; ret = 0;
#ifdef CONFIG_MP25P_BYTEWRITE #ifdef CONFIG_M25P_BYTEWRITE
ret |= MTDIOC_CAPS_BYTEWRITE; ret |= MTDIOC_CAPS_BYTEWRITE;
#endif #endif
#ifdef CONFIG_MP25P_SUBSECTOR_ERASE #ifdef CONFIG_M25P_SUBSECTOR_ERASE
ret |= MTDIOC_CAPS_SECTERASE; ret |= MTDIOC_CAPS_SECTERASE;
#endif #endif
break; break;
} }
#endif /* CONFIG_FS_SMARTFS */ #endif /* CONFIG_FS_SMARTFS */
#ifdef CONFIG_MP25P_SUBSECTOR_ERASE #ifdef CONFIG_M25P_SUBSECTOR_ERASE
case MTDIOC_SECTERASE: case MTDIOC_SECTERASE:
{ {
m25p_subsectorerase(priv, (off_t) arg); m25p_subsectorerase(priv, (off_t) arg);
@@ -894,7 +894,7 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
} }
#endif #endif
#ifdef CONFIG_MP25P_BYTEWRITE #ifdef CONFIG_M25P_BYTEWRITE
case MTDIOC_BYTEWRITE: case MTDIOC_BYTEWRITE:
{ {
struct mtd_byte_write_s *bytewrite = (struct mtd_byte_write_s *) arg; struct mtd_byte_write_s *bytewrite = (struct mtd_byte_write_s *) arg;
+1 -1
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@@ -63,7 +63,7 @@
* support, then define MTD_SUBSECTOR_ERASE. * support, then define MTD_SUBSECTOR_ERASE.
*/ */
#if defined(CONFIG_MP25P_SUBSECTOR_ERASE) #if defined(CONFIG_M25P_SUBSECTOR_ERASE)
# define CONFIG_MTD_SUBSECTOR_ERASE 1 # define CONFIG_MTD_SUBSECTOR_ERASE 1
#endif #endif