mirror of
https://github.com/apache/nuttx.git
synced 2026-06-05 07:12:54 +08:00
Fix typo in configuration variables: MP25P should M25P
This commit is contained in:
@@ -103,9 +103,9 @@ CONFIG_UART_PARITY=0
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CONFIG_UART_2STOP=0
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CONFIG_UART_2STOP=0
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#
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#
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# MP25x Configuration
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# M25Px Configuration
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#
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#
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CONFIG_MP25P_SPIMODE=3
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CONFIG_M25P_SPIMODE=3
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#
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#
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# General build options
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# General build options
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@@ -51,7 +51,7 @@
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# include <nuttx/mmcsd.h>
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# include <nuttx/mmcsd.h>
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#endif
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#endif
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#ifdef CONFIG_MTD_MP25P
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#ifdef CONFIG_MTD_M25P
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# include <nuttx/mtd.h>
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# include <nuttx/mtd.h>
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#endif
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#endif
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@@ -102,7 +102,7 @@ void weak_function stm32_spiinitialize(void)
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{
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{
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#ifdef CONFIG_STM32_SPI3
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#ifdef CONFIG_STM32_SPI3
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#ifdef CONFIG_MTD_MP25P
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#ifdef CONFIG_MTD_M25P
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(void)stm32_configgpio(GPIO_CS_FLASH); /* FLASH chip select */
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(void)stm32_configgpio(GPIO_CS_FLASH); /* FLASH chip select */
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stm32_gpiowrite(GPIO_CS_FLASH, 1); /* Ensure the CS is inactive */
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stm32_gpiowrite(GPIO_CS_FLASH, 1); /* Ensure the CS is inactive */
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#endif
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#endif
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@@ -155,7 +155,7 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
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{
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{
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spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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#if defined(CONFIG_MTD_MP25P)
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#if defined(CONFIG_MTD_M25P)
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if (devid == SPIDEV_FLASH)
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if (devid == SPIDEV_FLASH)
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{
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{
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stm32_gpiowrite(GPIO_CS_FLASH, !selected);
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stm32_gpiowrite(GPIO_CS_FLASH, !selected);
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@@ -417,12 +417,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff
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CONFIG_RAMMTD_SMART=y
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CONFIG_RAMMTD_SMART=y
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# CONFIG_MTD_AT24XX is not set
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# CONFIG_MTD_AT24XX is not set
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# CONFIG_MTD_AT45DB is not set
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# CONFIG_MTD_AT45DB is not set
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CONFIG_MTD_MP25P=y
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CONFIG_MTD_M25P=y
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CONFIG_MP25P_SPIMODE=0
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CONFIG_M25P_SPIMODE=0
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CONFIG_MP25P_MANUFACTURER=0x1C
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CONFIG_M25P_MANUFACTURER=0x1C
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CONFIG_MP25P_MEMORY_TYPE=0x31
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CONFIG_M25P_MEMORY_TYPE=0x31
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CONFIG_MP25P_SUBSECTOR_ERASE=y
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CONFIG_M25P_SUBSECTOR_ERASE=y
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CONFIG_MP25P_BYTEWRITE=y
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CONFIG_M25P_BYTEWRITE=y
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CONFIG_MTD_SMART=y
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CONFIG_MTD_SMART=y
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CONFIG_MTD_SMART_SECTOR_SIZE=512
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CONFIG_MTD_SMART_SECTOR_SIZE=512
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# CONFIG_MTD_RAMTRON is not set
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# CONFIG_MTD_RAMTRON is not set
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@@ -214,7 +214,7 @@ CONFIG_RAMMTD_ERASESTATE=0xff
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CONFIG_RAMMTD_FLASHSIM=y
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CONFIG_RAMMTD_FLASHSIM=y
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# CONFIG_MTD_AT24XX is not set
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# CONFIG_MTD_AT24XX is not set
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# CONFIG_MTD_AT45DB is not set
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# CONFIG_MTD_AT45DB is not set
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# CONFIG_MTD_MP25P is not set
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# CONFIG_MTD_M25P is not set
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# CONFIG_MTD_RAMTRON is not set
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# CONFIG_MTD_RAMTRON is not set
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# CONFIG_MTD_SST25 is not set
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# CONFIG_MTD_SST25 is not set
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# CONFIG_MTD_SST39FV is not set
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# CONFIG_MTD_SST39FV is not set
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@@ -214,7 +214,7 @@ CONFIG_RAMMTD_ERASESTATE=0xff
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CONFIG_RAMMTD_FLASHSIM=y
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CONFIG_RAMMTD_FLASHSIM=y
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# CONFIG_MTD_AT24XX is not set
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# CONFIG_MTD_AT24XX is not set
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# CONFIG_MTD_AT45DB is not set
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# CONFIG_MTD_AT45DB is not set
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# CONFIG_MTD_MP25P is not set
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# CONFIG_MTD_M25P is not set
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# CONFIG_MTD_RAMTRON is not set
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# CONFIG_MTD_RAMTRON is not set
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# CONFIG_MTD_SST25 is not set
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# CONFIG_MTD_SST25 is not set
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# CONFIG_MTD_SST39FV is not set
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# CONFIG_MTD_SST39FV is not set
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+12
-12
@@ -114,34 +114,34 @@ config AT45DB_PWRSAVE
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endif
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endif
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config MTD_MP25P
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config MTD_M25P
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bool "SPI-based M25P FLASH"
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bool "SPI-based M25P FLASH"
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default n
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default n
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select SPI
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select SPI
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if MTD_MP25P
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if MTD_M25P
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config MP25P_SPIMODE
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config M25P_SPIMODE
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int "MP25P SPI mode"
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int "M25P SPI mode"
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default 0
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default 0
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config MP25P_MANUFACTURER
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config M25P_MANUFACTURER
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hex "MP25P manufacturers ID"
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hex "M25P manufacturers ID"
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default 0x20
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default 0x20
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---help---
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---help---
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Various manufacturers may have produced the parts. 0x20 is the manufacturer ID
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Various manufacturers may have produced the parts. 0x20 is the manufacturer ID
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for the STMicro MP25x serial FLASH. If, for example, you are using the a Macronix
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for the STMicro MP25x serial FLASH. If, for example, you are using the a Macronix
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International MX25 serial FLASH, the correct manufacturer ID would be 0xc2.
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International MX25 serial FLASH, the correct manufacturer ID would be 0xc2.
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config MP25P_MEMORY_TYPE
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config M25P_MEMORY_TYPE
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hex "MP25P memory type ID"
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hex "M25P memory type ID"
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default 0x20
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default 0x20
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---help---
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---help---
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The memory type for M25 "P" series is 0x20, but the driver also supports "F" series
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The memory type for M25 "P" series is 0x20, but the driver also supports "F" series
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devices, such as the EON EN25F80 part which adds a 4K sector erase capability. The
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devices, such as the EON EN25F80 part which adds a 4K sector erase capability. The
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ID for "F" series parts from EON is 0x31.
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ID for "F" series parts from EON is 0x31.
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config MP25P_SUBSECTOR_ERASE
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config M25P_SUBSECTOR_ERASE
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bool "Sub-Sector Erase"
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bool "Sub-Sector Erase"
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default n
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default n
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---help---
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---help---
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@@ -149,11 +149,11 @@ config MP25P_SUBSECTOR_ERASE
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size (4K vs 64K). This option enables support for sub-sector erase.
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size (4K vs 64K). This option enables support for sub-sector erase.
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The SMART file system can take advantage of this option if it is enabled.
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The SMART file system can take advantage of this option if it is enabled.
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config MP25P_BYTEWRITE
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config M25P_BYTEWRITE
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bool "Enable ByteWrite ioctl support"
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bool "Enable ByteWrite ioctl support"
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default n
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default n
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---help---
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---help---
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The MP25P series of devices allow writing to a page with less than a full-page
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The M25P series of devices allow writing to a page with less than a full-page
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size of data. In this case, only the written bytes are updated without affecting
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size of data. In this case, only the written bytes are updated without affecting
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the other bytes in the page. The SMART FS requires this option for proper operation.
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the other bytes in the page. The SMART FS requires this option for proper operation.
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@@ -162,7 +162,7 @@ endif
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config MTD_SMART
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config MTD_SMART
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bool "Sector Mapped Allocation for Really Tiny (SMART) Flash support"
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bool "Sector Mapped Allocation for Really Tiny (SMART) Flash support"
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default y
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default y
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select MP25P_BYTEWRITE
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select M25P_BYTEWRITE
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---help---
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---help---
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The MP25x series of Flash devices are typically very small and have a very large
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The MP25x series of Flash devices are typically very small and have a very large
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erase block size. This causes issues with the standard Flash Translation Layer
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erase block size. This causes issues with the standard Flash Translation Layer
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+23
-23
@@ -58,15 +58,15 @@
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* Pre-processor Definitions
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* Pre-processor Definitions
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************************************************************************************/
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************************************************************************************/
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/* Configuration ********************************************************************/
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/* Configuration ********************************************************************/
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/* Per the data sheet, MP25P10 parts can be driven with either SPI mode 0 (CPOL=0 and
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/* Per the data sheet, M25P10 parts can be driven with either SPI mode 0 (CPOL=0 and
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* CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices can
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* CPHA=0) or mode 3 (CPOL=1 and CPHA=1). But I have heard that other devices can
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* operated in mode 0 or 1. So you may need to specify CONFIG_MP25P_SPIMODE to
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* operated in mode 0 or 1. So you may need to specify CONFIG_M25P_SPIMODE to
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* select the best mode for your device. If CONFIG_MP25P_SPIMODE is not defined,
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* select the best mode for your device. If CONFIG_M25P_SPIMODE is not defined,
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* mode 0 will be used.
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* mode 0 will be used.
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*/
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*/
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#ifndef CONFIG_MP25P_SPIMODE
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#ifndef CONFIG_M25P_SPIMODE
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# define CONFIG_MP25P_SPIMODE SPIDEV_MODE0
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# define CONFIG_M25P_SPIMODE SPIDEV_MODE0
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#endif
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#endif
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/* Various manufacturers may have produced the parts. 0x20 is the manufacturer ID
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/* Various manufacturers may have produced the parts. 0x20 is the manufacturer ID
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@@ -74,19 +74,19 @@
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* International MX25 serial FLASH, the correct manufacturer ID would be 0xc2.
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* International MX25 serial FLASH, the correct manufacturer ID would be 0xc2.
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*/
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*/
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#ifndef CONFIG_MP25P_MANUFACTURER
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#ifndef CONFIG_M25P_MANUFACTURER
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# define CONFIG_MP25P_MANUFACTURER 0x20
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# define CONFIG_M25P_MANUFACTURER 0x20
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#endif
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#endif
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#ifndef CONFIG_MP25P_MEMORY_TYPE
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#ifndef CONFIG_M25P_MEMORY_TYPE
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# define CONFIG_MP25P_MEMORY_TYPE 0x20
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# define CONFIG_M25P_MEMORY_TYPE 0x20
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#endif
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#endif
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/* M25P Registers *******************************************************************/
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/* M25P Registers *******************************************************************/
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/* Indentification register values */
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/* Indentification register values */
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#define M25P_MANUFACTURER CONFIG_MP25P_MANUFACTURER
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#define M25P_MANUFACTURER CONFIG_M25P_MANUFACTURER
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#define M25P_MEMORY_TYPE CONFIG_MP25P_MEMORY_TYPE
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#define M25P_MEMORY_TYPE CONFIG_M25P_MEMORY_TYPE
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#define M25P_RES_ID 0x13
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#define M25P_RES_ID 0x13
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#define M25P_M25P1_CAPACITY 0x11 /* 1 M-bit */
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#define M25P_M25P1_CAPACITY 0x11 /* 1 M-bit */
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#define M25P_EN25F80_CAPACITY 0x14 /* 8 M-bit */
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#define M25P_EN25F80_CAPACITY 0x14 /* 8 M-bit */
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@@ -203,7 +203,7 @@ struct m25p_dev_s
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uint8_t pageshift; /* 8 */
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uint8_t pageshift; /* 8 */
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uint16_t nsectors; /* 128 or 64 */
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uint16_t nsectors; /* 128 or 64 */
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uint32_t npages; /* 32,768 or 65,536 */
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uint32_t npages; /* 32,768 or 65,536 */
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#ifdef CONFIG_MP25P_SUBSECTOR_ERASE
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#ifdef CONFIG_M25P_SUBSECTOR_ERASE
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uint8_t subsectorshift; /* 0, 12 or 13 (4K or 8K) */
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uint8_t subsectorshift; /* 0, 12 or 13 (4K or 8K) */
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#endif
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#endif
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};
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};
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@@ -223,7 +223,7 @@ static inline void m25p_sectorerase(struct m25p_dev_s *priv, off_t offset);
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static inline int m25p_bulkerase(struct m25p_dev_s *priv);
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static inline int m25p_bulkerase(struct m25p_dev_s *priv);
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static inline void m25p_pagewrite(struct m25p_dev_s *priv, FAR const uint8_t *buffer,
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static inline void m25p_pagewrite(struct m25p_dev_s *priv, FAR const uint8_t *buffer,
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off_t offset);
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off_t offset);
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#ifdef CONFIG_MP25P_SUBSECTOR_ERASE
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#ifdef CONFIG_M25P_SUBSECTOR_ERASE
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static inline void m25p_subsectorerase(struct m25p_dev_s *priv, off_t offset);
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static inline void m25p_subsectorerase(struct m25p_dev_s *priv, off_t offset);
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#endif
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#endif
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@@ -268,7 +268,7 @@ static void m25p_lock(FAR struct spi_dev_s *dev)
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* state.
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* state.
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*/
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*/
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SPI_SETMODE(dev, CONFIG_MP25P_SPIMODE);
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SPI_SETMODE(dev, CONFIG_M25P_SPIMODE);
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SPI_SETBITS(dev, 8);
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SPI_SETBITS(dev, 8);
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(void)SPI_SETFREQUENCY(dev, 20000000);
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(void)SPI_SETFREQUENCY(dev, 20000000);
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}
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}
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@@ -320,7 +320,7 @@ static inline int m25p_readid(struct m25p_dev_s *priv)
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{
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{
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/* Okay.. is it a FLASH capacity that we understand? */
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/* Okay.. is it a FLASH capacity that we understand? */
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#ifdef CONFIG_MP25P_SUBSECTOR_ERASE
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#ifdef CONFIG_M25P_SUBSECTOR_ERASE
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priv->subsectorshift = 0;
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priv->subsectorshift = 0;
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#endif
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#endif
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@@ -342,7 +342,7 @@ static inline int m25p_readid(struct m25p_dev_s *priv)
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priv->nsectors = M25P_EN25F80_NSECTORS;
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priv->nsectors = M25P_EN25F80_NSECTORS;
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priv->pageshift = M25P_EN25F80_PAGE_SHIFT;
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priv->pageshift = M25P_EN25F80_PAGE_SHIFT;
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priv->npages = M25P_EN25F80_NPAGES;
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priv->npages = M25P_EN25F80_NPAGES;
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#ifdef CONFIG_MP25P_SUBSECTOR_ERASE
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#ifdef CONFIG_M25P_SUBSECTOR_ERASE
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priv->subsectorshift = M25P_EN25F80_SUBSECT_SHIFT;
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priv->subsectorshift = M25P_EN25F80_SUBSECT_SHIFT;
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#endif
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#endif
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return OK;
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return OK;
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@@ -525,7 +525,7 @@ static inline void m25p_sectorerase(struct m25p_dev_s *priv, off_t sector)
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* Name: m25p_subsectorerase
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* Name: m25p_subsectorerase
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************************************************************************************/
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************************************************************************************/
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#ifdef CONFIG_MP25P_SUBSECTOR_ERASE
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#ifdef CONFIG_M25P_SUBSECTOR_ERASE
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static inline void m25p_subsectorerase(struct m25p_dev_s *priv, off_t subsector)
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static inline void m25p_subsectorerase(struct m25p_dev_s *priv, off_t subsector)
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{
|
{
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off_t offset = subsector << priv->subsectorshift;
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off_t offset = subsector << priv->subsectorshift;
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@@ -654,7 +654,7 @@ static inline void m25p_pagewrite(struct m25p_dev_s *priv, FAR const uint8_t *bu
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* Name: m25p_bytewrite
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* Name: m25p_bytewrite
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************************************************************************************/
|
************************************************************************************/
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|
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#ifdef CONFIG_MP25P_BYTEWRITE
|
#ifdef CONFIG_M25P_BYTEWRITE
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static inline void m25p_bytewrite(struct m25p_dev_s *priv, FAR const uint8_t *buffer,
|
static inline void m25p_bytewrite(struct m25p_dev_s *priv, FAR const uint8_t *buffer,
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off_t offset, uint16_t count)
|
off_t offset, uint16_t count)
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{
|
{
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@@ -847,7 +847,7 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
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geo->blocksize = (1 << priv->pageshift);
|
geo->blocksize = (1 << priv->pageshift);
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geo->erasesize = (1 << priv->sectorshift);
|
geo->erasesize = (1 << priv->sectorshift);
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geo->neraseblocks = priv->nsectors;
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geo->neraseblocks = priv->nsectors;
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#ifdef CONFIG_MP25P_SUBSECTOR_ERASE
|
#ifdef CONFIG_M25P_SUBSECTOR_ERASE
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geo->subsectorsize = (1 << priv->subsectorshift);
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geo->subsectorsize = (1 << priv->subsectorshift);
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geo->nsubsectors = priv->nsectors * (1 << (priv->sectorshift -
|
geo->nsubsectors = priv->nsectors * (1 << (priv->sectorshift -
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priv->subsectorshift));
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priv->subsectorshift));
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@@ -874,18 +874,18 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
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case MTDIOC_GETCAPS:
|
case MTDIOC_GETCAPS:
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{
|
{
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ret = 0;
|
ret = 0;
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#ifdef CONFIG_MP25P_BYTEWRITE
|
#ifdef CONFIG_M25P_BYTEWRITE
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ret |= MTDIOC_CAPS_BYTEWRITE;
|
ret |= MTDIOC_CAPS_BYTEWRITE;
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#endif
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#endif
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|
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#ifdef CONFIG_MP25P_SUBSECTOR_ERASE
|
#ifdef CONFIG_M25P_SUBSECTOR_ERASE
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ret |= MTDIOC_CAPS_SECTERASE;
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ret |= MTDIOC_CAPS_SECTERASE;
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#endif
|
#endif
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break;
|
break;
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}
|
}
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#endif /* CONFIG_FS_SMARTFS */
|
#endif /* CONFIG_FS_SMARTFS */
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|
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||||||
#ifdef CONFIG_MP25P_SUBSECTOR_ERASE
|
#ifdef CONFIG_M25P_SUBSECTOR_ERASE
|
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case MTDIOC_SECTERASE:
|
case MTDIOC_SECTERASE:
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{
|
{
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m25p_subsectorerase(priv, (off_t) arg);
|
m25p_subsectorerase(priv, (off_t) arg);
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@@ -894,7 +894,7 @@ static int m25p_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
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|||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_MP25P_BYTEWRITE
|
#ifdef CONFIG_M25P_BYTEWRITE
|
||||||
case MTDIOC_BYTEWRITE:
|
case MTDIOC_BYTEWRITE:
|
||||||
{
|
{
|
||||||
struct mtd_byte_write_s *bytewrite = (struct mtd_byte_write_s *) arg;
|
struct mtd_byte_write_s *bytewrite = (struct mtd_byte_write_s *) arg;
|
||||||
|
|||||||
+1
-1
@@ -63,7 +63,7 @@
|
|||||||
* support, then define MTD_SUBSECTOR_ERASE.
|
* support, then define MTD_SUBSECTOR_ERASE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#if defined(CONFIG_MP25P_SUBSECTOR_ERASE)
|
#if defined(CONFIG_M25P_SUBSECTOR_ERASE)
|
||||||
# define CONFIG_MTD_SUBSECTOR_ERASE 1
|
# define CONFIG_MTD_SUBSECTOR_ERASE 1
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
Reference in New Issue
Block a user