diff --git a/arch/arm/src/efm32/Make.defs b/arch/arm/src/efm32/Make.defs index 7bd07a049c2..85dff3e9723 100644 --- a/arch/arm/src/efm32/Make.defs +++ b/arch/arm/src/efm32/Make.defs @@ -86,6 +86,10 @@ CMN_CSRCS += up_copyarmstate.c endif endif +ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y) +CMN_CSRCS += arm_itm_syslog.c +endif + CHIP_ASRCS = ifeq ($(CONFIG_ARMV7M_CMNVECTOR),y) diff --git a/arch/arm/src/efm32/efm32_clockconfig.c b/arch/arm/src/efm32/efm32_clockconfig.c index 9edbb064199..db617192660 100644 --- a/arch/arm/src/efm32/efm32_clockconfig.c +++ b/arch/arm/src/efm32/efm32_clockconfig.c @@ -48,9 +48,11 @@ #include "up_arch.h" #include "chip.h" +#include "itm_syslog.h" #include "efm32_gpio.h" #include "chip/efm32_msc.h" #include "chip/efm32_cmu.h" +#include "chip/efm32_gpio.h" /**************************************************************************** * Pre-processor Definitions @@ -658,7 +660,7 @@ static inline uint32_t efm32_lfaclk_config(uint32_t lfaclksel, bool ulfrco, * * LFBCLK is the selected clock for the Low Energy B Peripherals. There * are four selectable sources for LFBCLK: LFRCO, LFXO, HFCORECLK/2 and - * ULFRCO. In addition, the LFBCLK can be disabled. From reset, the LFBCLK + * ULFRCO. In addition, the LFBCLK can be disabled. From reset, the LFBCLK * source is set to LFRCO. However, note that the LFRCO is disabled from * reset. The selection is configured using the LFB field in CMU_LFCLKSEL. * The HFCORECLK/2 setting allows the Low Energy B Peripherals to be used @@ -822,6 +824,48 @@ static inline void efm32_gpioclock(void) putreg32(regval, EFM32_CMU_HFPERCLKEN0); } +/**************************************************************************** + * Name: efm32_itm_syslog + * + * Description: + * Enable Serial wire output pin, configure debug clocking, and enable + * ITM syslog support. + * + ****************************************************************************/ + +#if defined(CONFIG_SYSLOG) || defined(CONFIG_ARMV7M_ITMSYSLOG) +static inline void efm32_itm_syslog(void) +{ + int regval; + + /* Enable Serial wire output pin + * + * Set location and enable output on the pin. All pin configuration + * information must be provided in the board.h header file. + */ + + regval = getreg32(EFM32_GPIO_ROUTE); + regval &= _GPIO_ROUTE_SWLOCATION_MASK; + regval |= GPIO_ROUTE_SWOPEN; + regval |= ((uint32_t)BOARD_SWOPORT_LOCATION << _GPIO_ROUTE_SWLOCATION_SHIFT); + putreg32(regval, EFM32_GPIO_ROUTE); + + /* Enable output on pin */ + + efm32_configgpio(BOARD_GPIO_SWOPORT); + + /* Enable debug clock AUXHFRCO */ + + efm32_enable_auxhfrco(); + + /* Then perform ARMv7-M ITM SYSLOG initialization */ + + itm_syslog_initialize(); +} +#else +# define efm32_itm_syslog() +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -863,4 +907,10 @@ void efm32_clockconfig(void) /* Enable clocking of the GPIO ports */ efm32_gpioclock(); + + /* Enable Serial wire output pin, configure debug clocking, and enable ITM + * syslog support. + */ + + efm32_itm_syslog(); } diff --git a/arch/arm/src/efm32/efm32_start.c b/arch/arm/src/efm32/efm32_start.c index 1cc28e53604..dd5f7b5de02 100644 --- a/arch/arm/src/efm32/efm32_start.c +++ b/arch/arm/src/efm32/efm32_start.c @@ -44,11 +44,14 @@ #include #include +#include + #include #include #include "up_arch.h" #include "up_internal.h" +#include "efm32_config.h" #include "efm32_lowputc.h" #include "efm32_clockconfig.h" #include "efm32_start.h" @@ -75,7 +78,13 @@ static void go_os_start(void *pv, unsigned int nbytes) ****************************************************************************/ #ifdef CONFIG_DEBUG -# define showprogress(c) up_lowputc(c) +# if defined(CONFIG_ARMV7M_ITMSYSLOG) +# define showprogress(c) (void)syslog_putc(c) +# elif defined(HAVE_UART_CONSOLE) || defined(HAVE_LEUART_CONSOLE) +# define showprogress(c) up_lowputc(c) +# else +# define showprogress(c) +# endif #else # define showprogress(c) #endif