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Revert "riscv/saveusercontext: Fix FPU state save"

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This reverts commit 669196910c.
This commit is contained in:
Masayuki Ishikawa
2023-06-19 22:47:29 +09:00
parent 103b7097b6
commit 9d84d79b29
1 changed files with 1 additions and 4 deletions
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arch/risc-v/src/common/riscv_saveusercontext.S
-3
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@@ -56,10 +56,7 @@ up_saveusercontext:
REGSTORE sp, REG_X2(a0) /* original SP */ REGSTORE sp, REG_X2(a0) /* original SP */
REGSTORE x1, REG_EPC(a0) REGSTORE x1, REG_EPC(a0)
#ifdef CONFIG_ARCH_FPU
addi a0, a0, INT_XCPT_SIZE /* Save FPU after integer regs */
riscv_savefpu a0 riscv_savefpu a0
#endif
li a0, 0 li a0, 0
jr ra jr ra