ARMv7-A: Fix some error in alignment to cache line boundaries in the cache operations

2026-06-04 14:53:47 +08:00 · 2013-09-21 15:47:00 -06:00
parent 0ad20e4918
commit 9cb23c5ccb
3 changed files with 6 additions and 2 deletions
@@ -5610,3 +5610,7 @@
 	  needed to be flushed to data cache; Fix another where a virual address
 	  was being used in a register where a physical address was required
 	  (2013-9-20).
+	* arch/arm/src/armv7-a/cp15_clean_dcache.S and cp15_flush_dcache.S:
+	  fix an error in the alignment of addresses to cache line boundaries
+	  (2013-9-21).
+