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SAMA5D4: XDMAC driver now compiles error/warning free (still untested)

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Gregory Nutt
2014-06-17 16:31:09 -06:00
parent 9abd83b24d
commit 9c0de33715
3 changed files with 164 additions and 205 deletions
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arch/arm/src/sama5/chip/sam_xdmac.h
+6 -3
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@@ -289,9 +289,12 @@
#define XDMAC_CHINT_ERRORS (0x00000070) #define XDMAC_CHINT_ERRORS (0x00000070)
#define XDMAC_CHINT_ALL (0x0000007f) #define XDMAC_CHINT_ALL (0x0000007f)
/* Channel Source Address Register (32-bit address) */ /* Channel Source Address (SA) Register (aligned 32-bit address) */
/* Channel Destination Address Register (32-bit address) */ /* Channel Destination Address (DA) Register (aligned 32-bit address) */
/* Channel Next Descriptor Address Register (32-bit address) */
/* Channel Next Descriptor Address (CNDA) Register (aligned 32-bit address) */
#define XDMACH_CNDA_NDAIF (1 << 0) /* Bit 0: Channel Next Descriptor Interface */
/* Channel Next Descriptor Control Register */ /* Channel Next Descriptor Control Register */
arch/arm/src/sama5/sam_dmac.c
+1 -1
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@@ -1426,7 +1426,7 @@ sam_allocdesc(struct sam_dmach_s *dmach, struct dma_linklist_s *prev,
* via AHB IF0. * via AHB IF0.
*/ */
prev->dscr = (uint32_t)desc; prev->dscr = (uint32_t)sam_physramaddr((uintptr_t)descr);
} }
/* In any event, this is the new tail of the list. The source /* In any event, this is the new tail of the list. The source
arch/arm/src/sama5/sam_xdmac.c
+157 -201
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