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armv7-a/gicv2: move IRQ to group1 and group0 as the FIQ

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Purpose: make the the os crash when busyloop with interrupt disable

Follow the arm gicv2 spec, if we want to use the IRQ and FIQ
simultaneously when not using the processor Security Externsions.
We should:
1. IRQ to Group 1 and FIQ to Group 0;
2. Set CICC_CTLR.FIQEn to 1;

Then in NuttX:
1. implement the arm_decodefiq and directly crash in it;
2. provide interface to change the IRQ to FIQ, e.g. change the
   watchdog IRQ to FIQ, so the watchdog can trigger even with the
   interrupt disabled (up_irq_save() called);

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
This commit is contained in:
zhangyuan21
2023-06-27 10:40:06 +08:00
committed by Masayuki Ishikawa
parent d4d49e9645
commit 9c0d2e1a3c
18 changed files with 211 additions and 72 deletions
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include/nuttx/arch.h
+2 -2
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@@ -1659,7 +1659,7 @@ int up_prioritize_irq(int irq, int priority);
*
****************************************************************************/
#ifdef CONFIG_ARCH_HAVE_TRUSTZONE
#if defined(CONFIG_ARCH_TRUSTZONE_SECURE) || defined(CONFIG_ARCH_HIPRI_INTERRUPT)
void up_secure_irq(int irq, bool secure);
#else
# define up_secure_irq(i, s)
@@ -1685,7 +1685,7 @@ void up_send_smp_call(cpu_set_t cpuset);
*
****************************************************************************/
#ifdef CONFIG_ARCH_HAVE_TRUSTZONE
#if defined(CONFIG_ARCH_TRUSTZONE_SECURE) || defined(CONFIG_ARCH_HIPRI_INTERRUPT)
void up_secure_irq_all(bool secure);
#else
# define up_secure_irq_all(s)