STM32 OTG FS fix from Petteri Aimonen; Finish off some UG-2864AMBAG01 test logic

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5322 42af7a65-404d-4744-a932-0658087f49c3

arch/arm/src/stm32/stm32_otgfsdev.c

@@ -3651,10 +3651,14 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
   regval  = stm32_getreg(regaddr);
   if ((regval & OTGFS_DOEPCTL_USBAEP) == 0)
     {
-      regval &= ~(OTGFS_DOEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK);
+      if (regval & OTGFS_DOEPCTL_NAKSTS)
+        {
+          regval |= OTGFS_DOEPCTL_CNAK;
+        }
+      
+      regval &= ~(OTGFS_DOEPCTL_MPSIZ_MASK | OTGFS_DOEPCTL_EPTYP_MASK);
       regval |= mpsiz;
       regval |= (eptype << OTGFS_DOEPCTL_EPTYP_SHIFT);
-      regval |= (eptype << OTGFS_DIEPCTL_TXFNUM_SHIFT);
       regval |= (OTGFS_DOEPCTL_SD0PID | OTGFS_DOEPCTL_USBAEP);
       stm32_putreg(regval, regaddr);
 
@@ -3743,6 +3747,11 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, uint8_t eptype,
   regval  = stm32_getreg(regaddr);
   if ((regval & OTGFS_DIEPCTL_USBAEP) == 0)
     {
+      if (regval & OTGFS_DIEPCTL_NAKSTS)
+        {
+          regval |= OTGFS_DIEPCTL_CNAK;
+        }
+      
       regval &= ~(OTGFS_DIEPCTL_MPSIZ_MASK | OTGFS_DIEPCTL_EPTYP_MASK | OTGFS_DIEPCTL_TXFNUM_MASK);
       regval |= mpsiz;
       regval |= (eptype << OTGFS_DIEPCTL_EPTYP_SHIFT);

configs/stm32f4discovery/README.txt

@@ -2,7 +2,7 @@ README
 ======
 
 This README discusses issues unique to NuttX configurations for the
-STMicro STM32F4 Discovery development board.
+STMicro STM32F4Discovery development board.
 
 Contents
 ========
@@ -20,6 +20,7 @@ Contents
   - FPU
   - FSMC SRAM
   - SSD1289
+  - UG-2864AMBAG01
   - STM32F4Discovery-specific Configuration Options
   - Configurations
 
@@ -564,7 +565,7 @@ by the "Lite" version of the Atollic toolchain.
 SSD1289
 =======
 
-I purchased an LCD display on eBay from china.  The LCD is 320x240 RGB565 and
+I purchased an LCD display on eBay from China.  The LCD is 320x240 RGB565 and
 is based on an SSD1289 LCD controller and an XPT2046 touch IC.  The pin out
 from the 2x16 connect on the LCD is labeled as follows:
 
@@ -702,6 +703,31 @@ The following summarize the bit banging oprations:
     WriteData(data);
   }
 
+UG-2864AMBAG01
+==============
+
+I purchased an OLED display on eBay.  The OLDE is 128x64 monochrome and
+is based on an UG-2864AMBAG01 OLED controller.  The OLED can run in either
+parallel or SPI mode.  I am using SPI mode.  In SPI mode, the OLED is
+write only so the driver keeps a 128*64/8 = 1KB framebuffer to remember
+the display contents:
+
+Here is how I have the OLED connected.  But you can change this with the
+settings in include/board.h and src/stm324fdiscovery-internal.h:
+
+  Connector CON10 J1:   STM32F4Discovery
+
+  1  3v3                P2 3V
+  3  RESET              P2 PB6 (Arbitrary selection)
+  5  CS                 P3 PB7 (Arbitrary selection)
+  7  A0                 P2 PB8 (Arbitrary selection)
+  9  LED+ (N/C)         -----
+  2  5V Vcc             P2 5V
+  4  DI                 P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1)
+  6  SCLK               P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1)
+  8  LED- (N/C)         ------
+  10 GND                P2 GND
+
 STM32F4Discovery-specific Configuration Options
 ===============================================
 
@@ -1318,6 +1344,43 @@ Where <subdir> is one of the following:
      b. Execute 'make menuconfig' in nuttx/ in order to start the
         reconfiguration process.
 
+  3. This configured can be re-configured to use the UG-2864AMBAG01
+     0.96 inch OLED by adding or changing the following items int
+     the configuration (using 'make menuconfig'):
+
+     +CONFIG_SPI_CMDDATA=y
+
+     -CONFIG_LCD_MAXCONTRAST=1
+     -CONFIG_LCD_MAXPOWER=255
+     +CONFIG_LCD_MAXCONTRAST=255
+     +CONFIG_LCD_MAXPOWER=1
+
+     -CONFIG_LCD_SSD1289=y
+     -CONFIG_SSD1289_PROFILE1=y
+     +CONFIG_LCD_UG2864AMBAG01=y
+     +CONFIG_UG2864AMBAG01_SPIMODE=3
+     +CONFIG_UG2864AMBAG01_FREQUENCY=3500000
+     +CONFIG_UG2864AMBAG01_NINTERFACES=1
+
+     -CONFIG_NX_DISABLE_1BPP=y
+     +CONFIG_NX_DISABLE_16BPP=y
+
+     -CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x0320
+     -CONFIG_EXAMPLES_NXLINES_LINEWIDTH=16
+     -CONFIG_EXAMPLES_NXLINES_LINECOLOR=0xffe0
+     -CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=4
+     -CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0xffe0
+     -CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0xf7bb
+     -CONFIG_EXAMPLES_NXLINES_BPP=16
+     +CONFIG_EXAMPLES_NXLINES_BGCOLOR=0x00
+     +CONFIG_EXAMPLES_NXLINES_LINEWIDTH=4
+     +CONFIG_EXAMPLES_NXLINES_LINECOLOR=0x01
+     +CONFIG_EXAMPLES_NXLINES_BORDERWIDTH=2
+     +CONFIG_EXAMPLES_NXLINES_BORDERCOLOR=0x01
+     +CONFIG_EXAMPLES_NXLINES_CIRCLECOLOR=0x00
+     +CONFIG_EXAMPLES_NXLINES_BPP=1
+     +CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y
+
   pm:
   --
     This is a configuration that is used to test STM32 power management, i.e.,

configs/stm32f4discovery/include/board.h

@@ -224,7 +224,7 @@
 
 #define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
 
-/* SPI */
+/* SPI - There is a MEMS device on SPI1 using these pins: */
 
 #define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
 #define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1

configs/stm32f4discovery/nxlines/defconfig

@@ -148,7 +148,7 @@ CONFIG_STM32_FSMC=y
 # CONFIG_STM32_I2C2 is not set
 # CONFIG_STM32_I2C3 is not set
 # CONFIG_STM32_IWDG is not set
-CONFIG_STM32_OTGFS=y
+# CONFIG_STM32_OTGFS is not set
 # CONFIG_STM32_OTGHS is not set
 CONFIG_STM32_PWR=y
 # CONFIG_STM32_RNG is not set

configs/stm32f4discovery/src/stm32f4discovery-internal.h

@@ -113,6 +113,31 @@
 #  define GPIO_OTGFS_OVER  (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5)
 #endif
 
+/* UG-2864AMBAG01 OLED Display:
+ *
+ * Connector CON10 J1:   STM32F4Discovery
+ *
+ * 1  3v3                P2 3V
+ * 3  RESET              P2 PB6 (Arbitrary selection)
+ * 5  CS                 P3 PB7 (Arbitrary selection)
+ * 7  A0                 P2 PB8 (Arbitrary selection)
+ * 9  LED+ (N/C)         -----
+ * 2  5V Vcc             P2 5V
+ * 4  DI                 P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1)
+ * 6  SCLK               P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1)
+ * 8  LED- (N/C)         ------
+ * 10 GND                P2 GND
+ */
+ 
+#ifdef CONFIG_LCD_UG2864AMBAG01
+#  define GPIO_OLED_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                           GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN6)
+#  define GPIO_OLED_CS    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                           GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7)
+#  define GPIO_OLED_A0    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+                           GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
+#endif
+
 /****************************************************************************************************
  * Public Types
  ****************************************************************************************************/

configs/stm32f4discovery/src/up_spi.c

@@ -42,6 +42,7 @@
 
 #include <stdint.h>
 #include <stdbool.h>
+#include <errno.h>
 #include <debug.h>
 
 #include <nuttx/spi.h>
@@ -95,7 +96,11 @@
 void weak_function stm32_spiinitialize(void)
 {
 #ifdef CONFIG_STM32_SPI1
-  stm32_configgpio(GPIO_CS_MEMS);
+  (void)stm32_configgpio(GPIO_CS_MEMS);
+#endif
+#ifdef CONFIG_LCD_UG2864AMBAG01
+  (void)stm32_configgpio(GPIO_OLED_CS);    /* OLED chip select */
+  (void)stm32_configgpio(GPIO_OLED_A0);    /* OLED Command/Data */
 #endif
 }
 
@@ -129,12 +134,21 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
 {
   spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
-  stm32_gpiowrite(GPIO_CS_MEMS, !selected);
+#ifdef CONFIG_LCD_UG2864AMBAG01
+  if (devid == SPIDEV_DISPLAY)
+    {
+      stm32_gpiowrite(GPIO_OLED_CS, !selected);
+    }
+  else
+#endif
+    {
+      stm32_gpiowrite(GPIO_CS_MEMS, !selected);
+    }
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  return SPI_STATUS_PRESENT;
+  return 0;
 }
 #endif
 
@@ -146,7 +160,7 @@ void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
 
 uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  return SPI_STATUS_PRESENT;
+  return 0;
 }
 #endif
 
@@ -158,8 +172,70 @@ void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
 
 uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 {
-  return SPI_STATUS_PRESENT;
+  return 0;
 }
 #endif
 
+/****************************************************************************
+ * Name: stm32_spi1cmddata
+ *
+ * Description:
+ *   Set or clear the SD1329 D/Cn bit to select data (true) or command
+ *   (false).  This function must be provided by platform-specific logic.
+ *   This is an implementation of the cmddata method of the SPI
+ *   interface defined by struct spi_ops_s (see include/nuttx/spi.h).
+ *
+ * Input Parameters:
+ *
+ *   spi - SPI device that controls the bus the device that requires the CMD/
+ *         DATA selection.
+ *   devid - If there are multiple devices on the bus, this selects which one
+ *         to select cmd or data.  NOTE:  This design restricts, for example,
+ *         one one SPI display per SPI bus.
+ *   cmd - true: select command; false: select data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+#ifdef CONFIG_STM32_SPI1
+int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+#ifdef CONFIG_LCD_UG2864AMBAG01
+  if (devid == SPIDEV_DISPLAY)
+    {
+      /* "This is the Data/Command control pad which determines whether the
+       *  data bits are data or a command.
+       *
+       *  A0 = “H”: the inputs at D0 to D7 are treated as display data.
+       *  A0 = “L”: the inputs at D0 to D7 are transferred to the command
+       *       registers."
+       */
+
+      (void)stm32_gpiowrite(GPIO_OLED_A0, !cmd);
+      return OK;
+    }
+#endif
+
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI2
+int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI3
+int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+#endif /* CONFIG_SPI_CMDDATA */
+
 #endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */

configs/stm32f4discovery/src/up_ug2864ambag01.c

@@ -40,23 +40,22 @@
 
 #include <nuttx/config.h>
 
-#include <stdio.h>
 #include <debug.h>
-#include <errno.h>
 
 #include <nuttx/spi.h>
 #include <nuttx/lcd/lcd.h>
 #include <nuttx/lcd/ug-2864ambag01.h>
 
+#include "stm32_gpio.h"
 #include "stm32f4discovery-internal.h"
 
+#ifdef CONFIG_LCD_UG2864AMBAG01
+
 /****************************************************************************
  * Pre-Processor Definitions
  ****************************************************************************/
 /* Configuration ************************************************************/
-/* This module is only built if CONFIG_NX_LCDDRIVER is selected.  In this
+/* The pin configurations here require that SPI1 is selected */
- * case, it would be an error if SSP1 is not also enabled.
- */
 
 #ifndef CONFIG_STM32_SPI1
 #  error "The OLED driver requires CONFIG_STM32_SPI1 in the configuration"
@@ -67,42 +66,32 @@
 #endif
 
 /* Pin Configuration ********************************************************/
-/* Connector CON10 J1:
+/* Connector CON10 J1:   STM32F4Discovery
  *
- * 1 3v3        2 5V Vcc
+ * 1  3v3                P2 3V
- * 3 RESET      4 DI
+ * 3  RESET              P2 PB6 (Arbitrary selection)
- * 5 CS         6 SCLK
+ * 5  CS                 P3 PB7 (Arbitrary selection)
- * 7 A0         8 LED- (N/C)
+ * 7  A0                 P2 PB8 (Arbitrary selection)
- * 9 LED+ (N/C) 9 GND
+ * 9  LED+ (N/C)         -----
+ * 2  5V Vcc             P2 5V
+ * 4  DI                 P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1)
+ * 6  SCLK               P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1)
+ * 8  LED- (N/C)         ------
+ * 10 GND                P2 GND
+ *
+ * Note that the OLED CS and A0 are managed in the up_spi.c file.
  */
 
-#define STM32_OLED_RESET
+/* Definitions in stm32f4discovery-internal.h */
-#define STM32_OLED_A0
 
 /* Debug ********************************************************************/
-/* Define the CONFIG_DEBUG_LCD to enable detailed debug output (stuff you
- * would never want to see unless you are debugging this file).
- *
- * Verbose debug must also be enabled
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_GRAPHICS
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
 
 #ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, arg...) vdbg(format, ##arg)
+#  define lcddbg(format, arg...)   dbg(format, ##arg)
-#  define oleddc_dumpgpio(m)     stm32_dumpgpio(STM32_OLED_POWER, m)
+#  define lcdvdbg(format, arg...)  vdbg(format, ##arg)
-#  define oledcs_dumpgpio(m)     stm32_dumpgpio(STM32_OLED_CS, m)
 #else
 #  define lcddbg(x...)
-#  define oleddc_dumpgpio(m)
+#  define lcdvdbg(x...)
-#  define oledcs_dumpgpio(m)
 #endif
 
 /****************************************************************************
@@ -122,42 +111,36 @@ FAR struct lcd_dev_s *up_nxdrvinit(unsigned int devno)
   FAR struct spi_dev_s *spi;
   FAR struct lcd_dev_s *dev;
 
-  /* Configure the OLED GPIOs. For the SPI interface, insert jumpers in J42,
+  /* Configure the OLED GPIOs. This initial configuration is RESET low,
-   * J43, J45 pin1-2 and J46 pin 1-2.
+   * putting the OLED into reset state.
    */
  
-  oledcs_dumpgpio("up_nxdrvinit: After OLED CS setup");
+  (void)stm32_configgpio(GPIO_OLED_RESET);
-  oleddc_dumpgpio("up_nxdrvinit: On entry");
-
-  (void)stm32_configgpio(STM32_OLED_RESET); /* OLED reset */
-  (void)stm32_configgpio(STM32_OLED_A0);    /* OLED Command/Data */
-
-  oleddc_dumpgpio("up_nxdrvinit: After OLED GPIO setup");
 
   /* Wait a bit then release the OLED from the reset state */
 
   up_mdelay(20);
-  stm32_gpiowrite(STM32_OLED_A0, true);
+  stm32_gpiowrite(GPIO_OLED_RESET, true);
 
-  /* Get the SSI port (configure as a Freescale SPI port) */
+  /* Get the SPI1 port interface */
 
   spi = up_spiinitialize(1);
   if (!spi)
     {
-      glldbg("Failed to initialize SSI port 1\n");
+      lcddbg("Failed to initialize SPI port 1\n");
     }
   else
     {
-      /* Bind the SSI port to the OLED */
+      /* Bind the SPI port to the OLED */
 
       dev = ug2864ambag01_initialize(spi, devno);
       if (!dev)
         {
-          glldbg("Failed to bind SSI port 1 to OLED %d: %d\n", devno);
+          lcddbg("Failed to bind SPI port 1 to OLED %d: %d\n", devno);
         }
      else
         {
-          gllvdbg("Bound SSI port 1 to OLED %d\n", devno);
+          lcdvdbg("Bound SPI port 1 to OLED %d\n", devno);
 
           /* And turn the OLED on */
 
@@ -168,39 +151,4 @@ FAR struct lcd_dev_s *up_nxdrvinit(unsigned int devno)
 
   return NULL;
 }
-
+#endif /* CONFIG_LCD_UG2864AMBAG01 */
-/****************************************************************************
- * Name:  stm32_ssp1cmddata
- *
- * Description:
- *   Set or clear the SD1329 D/Cn bit to select data (true) or command
- *   (false).  This function must be provided by platform-specific logic.
- *   This is an implementation of the cmddata method of the SPI
- *   interface defined by struct spi_ops_s (see include/nuttx/spi.h).
- *
- * Input Parameters:
- *
- *   spi - SPI device that controls the bus the device that requires the CMD/
- *         DATA selection.
- *   devid - If there are multiple devices on the bus, this selects which one
- *         to select cmd or data.  NOTE:  This design restricts, for example,
- *         one one SPI display per SPI bus.
- *   cmd - true: select command; false: select data
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-int stm32_ssp1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
-{
-  if (devid == SPIDEV_DISPLAY)
-    {
-      /* Set GPIO to 1 for data, 0 for command */
-
-      (void)stm32_gpiowrite(STM32_OLED_A0, !cmd);
-      return OK;
-    }
-
-  return -ENODEV;
-}

drivers/lcd/Kconfig

@@ -261,16 +261,6 @@ config UG2864AMBAG01_NINTERFACES
 		Specifies the number of physical UG-9664HSWAG01 devices that will be
 		supported.  NOTE:  At present, this must be undefined or defined to be 1.
 
-config UG2864AMBAG01_FRAMEBUFFER
-	bool "UG-2864AMBAG01 Framebuffer"
-	default y
-	---help---
-		If defined, accesses will be performed using an in-memory copy of the
-		OLED's GRAM.  This cost of this buffer is 128 * 64 / 8 = 1Kb.
-
-		If G2864AMBAG01_FRAMEBUFFER is not defined and the LCD is a LANDSCAPE
-		mode, then a 128 byte buffer is still required.
-
 endif
 
 config LCD_SSD1289

drivers/lcd/ug-2864ambag01.c

@@ -1,6 +1,7 @@
 /**************************************************************************************
  * drivers/lcd/ug-2864ambag01.c
- * Driver for Univision UG-2864AMBAG01 OLED display (wih SH1101A controller)
+ * Driver for Univision UG-2864AMBAG01 OLED display (wih SH1101A controller) in SPI
+ * mode
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -146,11 +147,6 @@
 #  define CONFIG_UG2864AMBAG01_NINTERFACES 1
 #endif
 
-#ifndef CONFIG_UG2864AMBAG01_FRAMEBUFFER
-#  warning "CONFIG_UG2864AMBAG01_FRAMEBUFFER is required"
-#  define CONFIG_UG2864AMBAG01_FRAMEBUFFER 1
-#endif
-
 #if defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_RPORTRAIT)
 #  warning "No support yet for portrait modes"
 #  define CONFIG_LCD_LANDSCAPE 1
@@ -206,19 +202,6 @@
 #define SH1101A_STATUS_ONOFF     (0x40)
 #define SH1101A_RDDATA(d)        (d)                    /* Read Display Data */
 
-/* Define the CONFIG_DEBUG_LCD to enable detailed debug output (stuff you would
- * never want to see unless you are debugging this file). Verbose debug must also be
- * enabled
- */
-
-#ifndef CONFIG_DEBUG
-#  undef CONFIG_DEBUG_VERBOSE
-#endif
-
-#ifndef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_LCD
-#endif
-
 /* Color Properties *******************************************************************/
 /* Display Resolution
  *
@@ -259,8 +242,8 @@
  * Row size:          128 columns x 8 rows-per-page / 8 bits-per-pixel
  */
 
-#define UG2864AMBAG01_FBSIZE       ((UG2864AMBAG01_XRES * UG2864AMBAG01_YRES) >> 3)
+#define UG2864AMBAG01_FBSIZE       (UG2864AMBAG01_XSTRIDE * UG2864AMBAG01_YRES)
-#define UG2864AMBAG01_ROWSIZE      (UG2864AMBAG01_XRES)
+#define UG2864AMBAG01_ROWSIZE      (UG2864AMBAG01_XSTRIDE)
 
 /* Bit helpers */
 
@@ -270,9 +253,11 @@
 /* Debug ******************************************************************************/
 
 #ifdef CONFIG_DEBUG_LCD
-#  define lcddbg(format, arg...)  vdbg(format, ##arg)
+#  define lcddbg(format, arg...)   dbg(format, ##arg)
+#  define lcdvdbg(format, arg...)  vdbg(format, ##arg)
 #else
 #  define lcddbg(x...)
+#  define lcdvdbg(x...)
 #endif
 
 /**************************************************************************************
@@ -292,20 +277,12 @@ struct ug2864ambag01_dev_s
   bool                   on;       /* true: display is on */
 
 
- /* If the SH1101A does not support reading from the display memory, then it will be
+ /* The SH1101A does not support reading from the display memory in SPI mode.
-  * necessary to keep a shadow copy of the framebuffer memory. At 128x64, this amounts
+  * Since there is 1 BPP and access is byte-by-byte, it is necessary to keep
-  * to 1KB.
+  * a shadow copy of the framebuffer memory. At 128x64, this amounts to 1KB.
-  *
-  * If the SH1101A is writable but the display is in a landscape mode then a small
-  * 128 / 8 = 16 byte buffer is still required in order to perform the 90 degree
-  * rotation.
   */
 
-#if CONFIG_UG2864AMBAG01_FRAMEBUFFER
   uint8_t fb[UG2864AMBAG01_FBSIZE];
-#elif defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE)
-  uint8_t buffer[UG2864AMBAG01_ROWSIZE];
-#endif
 };
 
 /**************************************************************************************
@@ -441,8 +418,8 @@ static struct ug2864ambag01_dev_s g_oleddev =
 #ifdef CONFIG_SPI_OWNBUS
 static inline void ug2864ambag01_configspi(FAR struct spi_dev_s *spi)
 {
-  lcddbg("Mode: %d Bits: 8 Frequency: %d\n",
+  lcdvdbg("Mode: %d Bits: 8 Frequency: %d\n",
-         CONFIG_UG2864AMBAG01_SPIMODE, CONFIG_UG2864AMBAG01_FREQUENCY);
+          CONFIG_UG2864AMBAG01_SPIMODE, CONFIG_UG2864AMBAG01_FREQUENCY);
 
   /* Configure SPI for the UG-2864AMBAG01.  But only if we own the SPI bus.  Otherwise,
    * don't bother because it might change.
@@ -543,7 +520,7 @@ static int ug2864ambag01_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_
   int pixlen;
   uint8_t i;
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -717,7 +694,7 @@ static int ug2864ambag01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buf
   int pixlen;
   uint8_t i;
 
-  gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
+  lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
   DEBUGASSERT(buffer);
 
   /* Clip the run to the display */
@@ -838,8 +815,8 @@ static int ug2864ambag01_getvideoinfo(FAR struct lcd_dev_s *dev,
                               FAR struct fb_videoinfo_s *vinfo)
 {
   DEBUGASSERT(dev && vinfo);
-  gvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
+  lcdvdbg("fmt: %d xres: %d yres: %d nplanes: %d\n",
-        g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
+          g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
   memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
   return OK;
 }
@@ -856,7 +833,7 @@ static int ug2864ambag01_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int pl
                               FAR struct lcd_planeinfo_s *pinfo)
 {
   DEBUGASSERT(pinfo && planeno == 0);
-  gvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
+  lcdvdbg("planeno: %d bpp: %d\n", planeno, g_planeinfo.bpp);
   memcpy(pinfo, &g_planeinfo, sizeof(struct lcd_planeinfo_s));
   return OK;
 }
@@ -875,7 +852,7 @@ static int ug2864ambag01_getpower(FAR struct lcd_dev_s *dev)
   FAR struct ug2864ambag01_dev_s *priv = (FAR struct ug2864ambag01_dev_s *)dev;
   DEBUGASSERT(priv);
 
-  gvdbg("power: %s\n", priv->on ? "ON" : "OFF");
+  lcdvdbg("power: %s\n", priv->on ? "ON" : "OFF");
   return priv->on ? CONFIG_LCD_MAXPOWER : 0;
 }
 
@@ -893,7 +870,7 @@ static int ug2864ambag01_setpower(struct lcd_dev_s *dev, int power)
   struct ug2864ambag01_dev_s *priv = (struct ug2864ambag01_dev_s *)dev;
   DEBUGASSERT(priv && (unsigned)power <= CONFIG_LCD_MAXPOWER && priv->spi);
 
-  gvdbg("power: %d [%d]\n", power, priv->on ? CONFIG_LCD_MAXPOWER : 0);
+  lcdvdbg("power: %d [%d]\n", power, priv->on ? CONFIG_LCD_MAXPOWER : 0);
 
   /* Lock and select device */
 
@@ -935,7 +912,7 @@ static int ug2864ambag01_getcontrast(struct lcd_dev_s *dev)
   struct ug2864ambag01_dev_s *priv = (struct ug2864ambag01_dev_s *)dev;
   DEBUGASSERT(priv);
 
-  gvdbg("contrast: %d\n", priv->contrast);
+  lcdvdbg("contrast: %d\n", priv->contrast);
   return priv->contrast;
 }
 
@@ -952,7 +929,7 @@ static int ug2864ambag01_setcontrast(struct lcd_dev_s *dev, unsigned int contras
   struct ug2864ambag01_dev_s *priv = (struct ug2864ambag01_dev_s *)dev;
   unsigned int scaled;
 
-  gvdbg("contrast: %d\n", contrast);
+  lcdvdbg("contrast: %d\n", contrast);
   DEBUGASSERT(priv);
 
   /* Verify the contrast value */
@@ -1025,7 +1002,7 @@ FAR struct lcd_dev_s *ug2864ambag01_initialize(FAR struct spi_dev_s *spi, unsign
 {
   FAR struct ug2864ambag01_dev_s  *priv = &g_oleddev;
 
-  gvdbg("Initializing\n");
+  lcdvdbg("Initializing\n");
   DEBUGASSERT(spi && devno == 0);
 
   /* Save the reference to the SPI device */
@@ -1117,9 +1094,7 @@ void ug2864ambag01_fill(FAR struct lcd_dev_s *dev, uint8_t color)
 
   /* Initialize the framebuffer */
 
-#ifdef CONFIG_UG2864AMBAG01_FRAMEBUFFER
   memset(priv->fb, color, UG2864AMBAG01_FBSIZE);
-#endif
 
   /* Lock and select device */
 

include/nuttx/lcd/ug-2864ambag01.h

@@ -1,6 +1,7 @@
 /**************************************************************************************
  * include/nuttx/lcd/ug-2864ambag01.h
- * Driver for Univision UG-2864AMBAG01 OLED display (wih SH1101A controller)
+ * Driver for Univision UG-2864AMBAG01 OLED display (wih SH1101A controller) in SPI
+ * mode
  *
  *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -53,8 +54,6 @@
 
 #include <nuttx/arch.h>
 
-#include "stm32_gpio.h"
-
 #ifdef CONFIG_LCD_UG2864AMBAG01
 
 /**************************************************************************************
@@ -67,12 +66,6 @@
  * CONFIG_UG2864AMBAG01_FREQUENCY - Define to use a different bus frequency
  * CONFIG_UG2864AMBAG01_NINTERFACES - Specifies the number of physical UG-2864AMBAG01
  *   devices that will be supported.
- * CONFIG_UG2864AMBAG01_FRAMEBUFFER - If defined, accesses will be performed using an
- *   in-memory copy of the OLEDs GDDRAM.  This cost of this buffer is 128 * 64 / 8 =
- *   1Kb.
- *
- *   If CONFIG_UG2864AMBAG01_FRAMEBUFFER is not defined and the LCD is a LANDSCAPE mode,
- *   then a 128 byte buffer is still required.
  *
  * Required LCD driver settings:
  *