From 9b55cc6bfe7af2a358a187529b0a186c28fbd47f Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 17 Jun 2016 06:40:04 -0600 Subject: [PATCH] Apply same STM32 patch to STM32 F7 --- arch/arm/src/stm32f7/stm32_gpio.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/arch/arm/src/stm32f7/stm32_gpio.c b/arch/arm/src/stm32f7/stm32_gpio.c index 0cd386725ff..17e8b4c1082 100644 --- a/arch/arm/src/stm32f7/stm32_gpio.c +++ b/arch/arm/src/stm32f7/stm32_gpio.c @@ -182,6 +182,7 @@ int stm32_configgpio(uint32_t cfgset) break; case GPIO_OUTPUT: /* General purpose output mode */ + stm32_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0); /* Set the initial output value */ pinmode = GPIO_MODER_OUTPUT; break; @@ -311,17 +312,9 @@ int stm32_configgpio(uint32_t cfgset) putreg32(regval, base + STM32_GPIO_OTYPER_OFFSET); - /* If it is an output... set the pin to the correct initial state. */ - - if (pinmode == GPIO_MODER_OUTPUT) - { - bool value = ((cfgset & GPIO_OUTPUT_SET) != 0); - stm32_gpiowrite(cfgset, value); - } - /* Otherwise, it is an input pin. Should it configured as an EXTI interrupt? */ - else if ((cfgset & GPIO_EXTI) != 0) + if (pinmode != GPIO_MODER_OUTPUT && (cfgset & GPIO_EXTI) != 0) { /* "In STM32 F1 the selection of the EXTI line source is performed through * the EXTIx bits in the AFIO_EXTICRx registers, while in F2 series this