Nucleo-F401RE update from Frank Bennett

This commit is contained in:
Gregory Nutt
2014-04-22 16:04:14 -06:00
parent 28b6e0a7f5
commit 9ad7704699
5 changed files with 128 additions and 28 deletions
+25 -8
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@@ -12,10 +12,13 @@ from ST Micro (http://www.st.com/web/catalog/mmc/FM141/SC1169/SS1577/LN1810/PF25
ADCs: 1 (at 12-bit resolution) ADCs: 1 (at 12-bit resolution)
Peripherals: 10 timers, 2 I2Cs, 2 SPI ports, 3 USARTs, 1 led Peripherals: 10 timers, 2 I2Cs, 2 SPI ports, 3 USARTs, 1 led
Other: Sleep, stop, and standby modes; serial wire debug and JTAG interfaces Other: Sleep, stop, and standby modes; serial wire debug and JTAG interfaces
Expansion I/F Ardino and Morpho Headers
It breaks out the Tx, Rx to connect to a FTDI TTL-232RG-VREG3V3-WE for the console and Uses a STM32F103 to provide a ST-Link for programming, debug similar to the OpenOcd
wires in the spark LEDs and serial flash to the same I/O as the sparkcore. It has a Jlink FTDI function - USB to JTAG front-end.
compatible Jtag connector on it.
Wireless WIFI + SD Card SDIO via a "CC3000 WiFi Arduino Shield" added card
RS232 console support via a "RS232 Arduino Shield" added card
Contents Contents
======== ========
@@ -27,9 +30,8 @@ Contents
- NuttX OABI "buildroot" Toolchain - NuttX OABI "buildroot" Toolchain
- NXFLAT Toolchain - NXFLAT Toolchain
- Hardware - Hardware
- Core Pin out
- LED
- Button - Button
- LED
- USARTS and Serial Consoles - USARTS and Serial Consoles
- LQFP64 - LQFP64
- DFU and JTAG - DFU and JTAG
@@ -202,8 +204,9 @@ NuttX EABI "buildroot" Toolchain
1. You must have already configured Nuttx in <some-dir>/nuttx. 1. You must have already configured Nuttx in <some-dir>/nuttx.
cd tools $ (cd tools; ./configure.sh nucleo-f401re/nsh)
./configure.sh stm32_tiny/<sub-dir> $ make qconfig
$ V=1 make context all 2>&1 | tee mout
2. Download the latest buildroot package into <some-dir> 2. Download the latest buildroot package into <some-dir>
@@ -287,7 +290,7 @@ NXFLAT Toolchain
DFU and JTAG DFU and JTAG
============ ============
Enbling Support for the DFU Bootloader Enabling Support for the DFU Bootloader
-------------------------------------- --------------------------------------
The linker files in these projects can be configured to indicate that you The linker files in these projects can be configured to indicate that you
will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU) will be loading code using STMicro built-in USB Device Firmware Upgrade (DFU)
@@ -342,6 +345,20 @@ DFU and JTAG
Hardware Hardware
======== ========
GPIO
----
SERIAL_TX=PA_2 USER_BUTTON=PC_13
SERIAL_RX=PA_3 LED1 =PA_5
A0=PA_0 D0=PA_3 D8 =PA_9
A1=PA_1 D1=PA_2 D9 =PC_7
A2=PA_4 D2=PA_10 WIFI_CS=D10=PB_6 SPI_CS
A3=PB_0 WIFI_INT=D3=PB_3 D11=PA_7 SPI_MOSI
A4=PC_1 SDCS=D4=PB_5 D12=PA_6 SPI_MISO
A5=PC_0 WIFI_EN=D5=PB_4 LED1=D13=PA_5 SPI_SCK
LED2=D6=PB_10 I2C1_SDA=D14=PB_9 Probe
D7=PA_8 I2C1_SCL=D15=PB_8 Probe
Buttons Buttons
------- -------
B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32 B1 USER: the user button is connected to the I/O PC13 (pin 2) of the STM32
+53 -6
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@@ -56,22 +56,70 @@
#define GPIO_WIFI_CS (GPIO_PORTB | GPIO_PIN6 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) #define GPIO_WIFI_CS (GPIO_PORTB | GPIO_PIN6 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz)
#if defined(CONFIG_CC3000_PROBES) #if defined(CONFIG_CC3000_PROBES)
# define GPIO_D0 (GPIO_PORTB | GPIO_PIN7 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) # define GPIO_D14 (GPIO_PORTB | GPIO_PIN9 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz)
# define GPIO_D1 (GPIO_PORTB | GPIO_PIN6 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) # define GPIO_D15 (GPIO_PORTB | GPIO_PIN8 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz)
#else #else
# define GPIO_D0 (GPIO_PORTA | GPIO_PIN3 | GPIO_INPUT | GPIO_PULLUP | GPIO_EXTI) # define GPIO_D0 (GPIO_PORTA | GPIO_PIN3 | GPIO_INPUT | GPIO_PULLUP | GPIO_EXTI)
# define GPIO_D1 (GPIO_PORTA | GPIO_PIN2 | GPIO_INPUT | GPIO_PULLUP | GPIO_EXTI) # define GPIO_D1 (GPIO_PORTA | GPIO_PIN2 | GPIO_INPUT | GPIO_PULLUP | GPIO_EXTI)
# define GPIO_D2 (GPIO_PORTA | GPIO_PIN10 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) # define GPIO_D2 (GPIO_PORTA | GPIO_PIN10 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz)
# define GPIO_D8 (GPIO_PORTA | GPIO_PIN9 | GPIO_OUTPUT_CLEAR | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz)
# define GPIO_A0 (GPIO_PORTA | GPIO_PIN0 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) # define GPIO_A0 (GPIO_PORTA | GPIO_PIN0 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz)
# define GPIO_A1 (GPIO_PORTA | GPIO_PIN1 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz) # define GPIO_A1 (GPIO_PORTA | GPIO_PIN1 | GPIO_OUTPUT_SET | GPIO_OUTPUT | GPIO_PULLUP | GPIO_SPEED_50MHz)
# define GPIO_A2 (GPIO_PORTA | GPIO_PIN4 | GPIO_INPUT | GPIO_PULLUP ) # define GPIO_A2 (GPIO_PORTA | GPIO_PIN4 | GPIO_INPUT | GPIO_PULLUP )
# define GPIO_A3 (GPIO_PORTB | GPIO_PIN0 | GPIO_INPUT | GPIO_PULLUP ) # define GPIO_A3 (GPIO_PORTB | GPIO_PIN0 | GPIO_INPUT | GPIO_PULLUP )
#endif #endif
#ifndef __ASSEMBLY__ /* External interrupts */
#define GPIO_EXTI_MPU_DRDY (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN15)
/* Data ready pins off */
#define GPIO_EXTI_MPU_DRDY_OFF (GPIO_INPUT|GPIO_PULLDOWN|GPIO_EXTI|GPIO_PORTD|GPIO_PIN15)
/* SPI1 off */
#define GPIO_SPI1_MOSI_OFF (GPIO_INPUT|GPIO_PULLDOWN|GPIO_PORTA|GPIO_PIN7)
#define GPIO_SPI1_MISO_OFF (GPIO_INPUT|GPIO_PULLDOWN|GPIO_PORTA|GPIO_PIN6)
#define GPIO_SPI1_SCK_OFF (GPIO_INPUT|GPIO_PULLDOWN|GPIO_PORTA|GPIO_PIN5)
/* SPI1 chip selects off */
#define GPIO_SPI_CS_WIFI_OFF \
(GPIO_INPUT|GPIO_PULLDOWN|GPIO_SPEED_2MHz|GPIO_PORTB|GPIO_PIN6)
#define GPIO_SPI_CS_SD_CARD_OFF \
(GPIO_INPUT|GPIO_PULLDOWN|GPIO_SPEED_2MHz|GPIO_PORTB|GPIO_PIN5)
#define GPIO_SPI_CS_FRAM \
(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN10)
#define GPIO_SPI_CS_MPU \
(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN2)
/* SPI chip selects */
#define GPIO_SPI_CS_WIFI \
(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN13)
#define GPIO_SPI_CS_SD_CARD \
(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN15)
/* Devices on the onboard bus.
*
* Note that these are unshifted addresses.
*/
#define NUCLEO_I2C_OBDEV_LED 0x55
#define NUCLEO_I2C_OBDEV_HMC5883 0x1e
/* User GPIOs
*
* GPIO0-1 are for probing WIFI status
*/
#define GPIO_GPIO0_INPUT (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTB|GPIO_PIN8)
#define GPIO_GPIO1_INPUT (GPIO_INPUT|GPIO_PULLUP|GPIO_PORTB|GPIO_PIN9)
#define GPIO_GPIO0_OUTPUT \
(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
#define GPIO_GPIO1_OUTPUT \
(GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_2MHz|GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
/************************************************************************************ /************************************************************************************
* Public Functions * Public Functions
@@ -109,5 +157,4 @@ void stm32_usbinitialize(void);
void board_led_initialize(void); void board_led_initialize(void);
#endif #endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_NUCLEO_F401RE_SRC_NUCLEO_F401RE_H */ #endif /* __CONFIGS_NUCLEO_F401RE_SRC_NUCLEO_F401RE_H */
+35
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@@ -92,6 +92,14 @@
void weak_function stm32_spiinitialize(void) void weak_function stm32_spiinitialize(void)
{ {
#ifdef CONFIG_STM32_SPI1 #ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_SPI_CS_WIFI);
stm32_configgpio(GPIO_SPI_CS_SD_CARD);
stm32_configgpio(GPIO_SPI_CS_MPU);
/* De-activate all peripherals, required for some peripheral state machines */
stm32_gpiowrite(GPIO_SPI_CS_MPU, 1);
stm32_configgpio(GPIO_EXTI_MPU_DRDY);
#endif #endif
#ifdef CONFIG_STM32_SPI2 #ifdef CONFIG_STM32_SPI2
@@ -134,6 +142,33 @@ void weak_function stm32_spiinitialize(void)
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{ {
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
switch (devid)
{
case SPIDEV_WIRELESS:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_WIFI, !selected);
stm32_gpiowrite(GPIO_SPI_CS_SD_CARD, true);
stm32_gpiowrite(GPIO_SPI_CS_MPU, true);
break;
case SPIDEV_MMCSD:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_WIFI, true);
stm32_gpiowrite(GPIO_SPI_CS_SD_CARD, !selected);
stm32_gpiowrite(GPIO_SPI_CS_MPU, true);
break;
case SPIDEV_EXTDEV:
/* Making sure the other peripherals are not selected */
stm32_gpiowrite(GPIO_SPI_CS_WIFI, true);
stm32_gpiowrite(GPIO_SPI_CS_SD_CARD, true);
stm32_gpiowrite(GPIO_SPI_CS_MPU, !selected);
break;
}
} }
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+4 -4
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@@ -284,10 +284,10 @@ int wireless_archinitialize(size_t max_rx_size)
DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0); DEBUGASSERT(CONFIG_CC3000_DEVMINOR == 0);
#ifdef CONFIG_CC3000_PROBES #ifdef CONFIG_CC3000_PROBES
stm32_configgpio(GPIO_D0); stm32_configgpio(GPIO_D7);
stm32_configgpio(GPIO_D1); stm32_configgpio(GPIO_D15);
stm32_gpiowrite(GPIO_D0, 1); stm32_gpiowrite(GPIO_D7, 1);
stm32_gpiowrite(GPIO_D1, 1); stm32_gpiowrite(GPIO_D15, 1);
#endif #endif
/* Get an instance of the SPI interface */ /* Get an instance of the SPI interface */
+2 -1
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@@ -360,7 +360,8 @@ enum spi_dev_e
SPIDEV_EXPANDER, /* Select SPI I/O expander device */ SPIDEV_EXPANDER, /* Select SPI I/O expander device */
SPIDEV_MUX, /* Select SPI multiplexer device */ SPIDEV_MUX, /* Select SPI multiplexer device */
SPIDEV_AUDIO_DATA, /* Select SPI audio codec device data port */ SPIDEV_AUDIO_DATA, /* Select SPI audio codec device data port */
SPIDEV_AUDIO_CTRL /* Select SPI audio codec device control port */ SPIDEV_AUDIO_CTRL, /* Select SPI audio codec device control port */
SPIDEV_EXTDEV /* Select SPI external device */
}; };
/* Certain SPI devices may required differnt clocking modes */ /* Certain SPI devices may required differnt clocking modes */