diff --git a/.github/actions/ci-container/action.yaml b/.github/actions/ci-container/action.yaml index d87f1a1ec50..d4fcefa9b85 100644 --- a/.github/actions/ci-container/action.yaml +++ b/.github/actions/ci-container/action.yaml @@ -18,7 +18,7 @@ inputs: required: true runs: using: 'docker' - image: 'docker.pkg.github.com/apache/incubator-nuttx/apache-nuttx-ci-linux' + image: 'ghcr.io/apache/incubator-nuttx/apache-nuttx-ci-linux' args: - "/bin/bash" - "-ce" diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 122d1dc8c48..81da491b320 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -127,12 +127,12 @@ jobs: - name: Docker Login uses: azure/docker-login@v1 with: - login-server: docker.pkg.github.com + login-server: ghcr.io username: ${GITHUB_ACTOR} password: ${{ secrets.GITHUB_TOKEN }} - name: Docker Pull - run: docker pull docker.pkg.github.com/apache/incubator-nuttx/apache-nuttx-ci-linux + run: docker pull ghcr.io/apache/incubator-nuttx/apache-nuttx-ci-linux - name: Export NuttX Repo SHA run: echo "nuttx_sha=`git -C sources/nuttx rev-parse HEAD`" >> $GITHUB_ENV - name: Run builds diff --git a/.github/workflows/docker_linux.yml b/.github/workflows/docker_linux.yml index 4db41fca55b..4b272b275ad 100644 --- a/.github/workflows/docker_linux.yml +++ b/.github/workflows/docker_linux.yml @@ -36,12 +36,12 @@ jobs: runs-on: ubuntu-latest env: DOCKER_BUILDKIT: 1 - IMAGE_TAG: docker.pkg.github.com/${{ github.repository }}/apache-nuttx-ci-linux + IMAGE_TAG: ghcr.io/${{ github.repository }}/apache-nuttx-ci-linux steps: - uses: actions/checkout@v2 - name: Log into registry - run: echo "${{ secrets.GITHUB_TOKEN }}" | docker login docker.pkg.github.com -u ${{ github.actor }} --password-stdin + run: echo "${{ secrets.GITHUB_TOKEN }}" | docker login ghcr.io -u ${{ github.actor }} --password-stdin - name: Build Linux image run: | diff --git a/AUTHORS b/AUTHORS index b4c62497180..c5feb21160f 100644 --- a/AUTHORS +++ b/AUTHORS @@ -6,10 +6,15 @@ ICLA Abdelatif Guettouche Adam Porter Alan Carvalho de Assis +Aleksandr Vyhovanec Alin Jerpelea +Anton D. Kachalov Anthony Merlino +Augusto Fraga Giachero Beat Kung +Bill Gatliff Chao An +Daniel P. Carvalho David S. Alessio David Sidrane Dong Heng @@ -40,8 +45,10 @@ Masayuki Ishikawa Mateusz Tomasz Szafoni (Mateusz Szafoni) Matias Nitsche Matous Pokorny +Matt Poppe Matthew Trescott Mattias Edlund +Max Holtzberg Michael Jung Michal Lyszczek Miguel Ángel Herranz Trillo (Miguel Herranz) @@ -83,10 +90,13 @@ DS Automotion GmbH Espressif Systems (Shanghai) Co. Ltd. Falker Atomação Agrícola Ltda Gregory Ellis Nutt +Hexagon AB Max Holtzberg RAF Research LLC Software Grant from Uniquix Technologia Ltda Sony +UVC Ingenieure +Verge Aero Zhu Yan Lin NOTE: diff --git a/Documentation/faq/index.rst b/Documentation/faq/index.rst index d111001ae73..93a0c047819 100644 --- a/Documentation/faq/index.rst +++ b/Documentation/faq/index.rst @@ -82,6 +82,53 @@ You need to enable these options in the menuconfig: [*] Support SIGINT (0x03) Serial parse SIGINT characters +Board Initialization +==================== + +How to start directly my application instead starting NSH? +---------------------------------------------------------- + +You can start you application directly instead of starting the default +NSH terminal. Lets support your application is called "hello", then you +will modify the ENTRYPOINT to call "hello_main" instead of "nsh_main": + + RTOS Features ---> + Tasks and Scheduling ---> + (hello_main) Application entry point + +Why after putting my application on ENTRYPOINT it stops to work? +---------------------------------------------------------------- + +When you replace the ENTRYPOINT from "nsh_main" to your application some +initialization flow are changed, for instace the NSH_ARCHINIT is not +executed anymore and so some drivers initialiation that are called from +it also stops to work. + +You can fix it enabling the Board Late Initialization that will replace the +NSH_ARCHINIT to call those drivers initialization. Just enable it: + + RTOS Features ---> + RTOS hooks ---> + [*] Custom board late initialization + +Also you need to disable the architecture-specific initialization: + + Application Configuration ---> + NSH Library ---> + [ ] Have architecture-specific initialization + +Why isn't /dev/ttySx created when using USB Console even when UART is enabled? +------------------------------------------------------------------------------ + +If you don't use serial console then /dev/ttyS0 will not be created, +even if you enable the UART peripheral at "System Type". + +You can fix it enabling the Serial Upper-Half Driver: + + Device Drivers ---> + Serial Driver Support ---> + [*] Enable standard "upper-half" serial driver + Network ======= diff --git a/Documentation/guides/image/interface.png b/Documentation/guides/image/interface.png new file mode 100644 index 00000000000..ce3001caeb7 Binary files /dev/null and b/Documentation/guides/image/interface.png differ diff --git a/Documentation/guides/image/menu.png b/Documentation/guides/image/menu.png new file mode 100644 index 00000000000..dab835e36b6 Binary files /dev/null and b/Documentation/guides/image/menu.png differ diff --git a/Documentation/guides/image/template.png b/Documentation/guides/image/template.png new file mode 100644 index 00000000000..3852feb0af5 Binary files /dev/null and b/Documentation/guides/image/template.png differ diff --git a/Documentation/guides/index.rst b/Documentation/guides/index.rst index 89ddc65f8d5..6fff019a87e 100644 --- a/Documentation/guides/index.rst +++ b/Documentation/guides/index.rst @@ -11,3 +11,4 @@ Guides drivers.rst tasktrace.rst cpp_cmake.rst + pysimcoder.rst diff --git a/Documentation/guides/pysimcoder.rst b/Documentation/guides/pysimcoder.rst new file mode 100644 index 00000000000..876968961ce --- /dev/null +++ b/Documentation/guides/pysimcoder.rst @@ -0,0 +1,158 @@ +.. include:: /substitutions.rst +.. _pysimcoder: + +pysimCoder integration with NuttX +================================= + +`PysimCoder `_ is as an open source +Rapid Control Application Development Tool which is able to transfer block diagrams into C code. +Combined with NuttX, it can be used in real time control application and as an alternative to +expensive licensed programs and prototyping platforms. Example of `DC motor control application +`_ with PID controller and blocks for encoder, +PWM, GPIO and sending data over TCP to real time plotter can be seen on `NuttX Channel +`_. + +This documentation describes the steps that are needed to run application generated by pysimCoder +on NuttX and also keeps the track of peripherals that are supported by pysimCoder for NuttX RTOS. + +Peripheral Support +------------------ + +The following list shows the peripherals and fuctionalities supported in pysimCoder for NuttX RTOS. + +========== ======================= +Peripheral Notes +========== ======================= +ADC +CAN Including SocketCAN +DAC +ENC +GPIO +PWM Multichannel support +UART Serial output +Sensors Basic support for DHTXX +TCP +UDP +========== ======================= + +Please note that the actual support for NuttX peripherals can be wider that what is mentioned here +in case this documentation was not updated when new fuctionalities were added to pysimCoder. + +NuttX Configuration +------------------- + +Several configuration options are neccessary to be set in order to succesfully compile pysimCoder +with NuttX. The list is the following: + +==================================== ===================================== +``CONFIG_ARCH_RAMVECTORS=y`` ``CONFIG_NSH_FILE_APPS=y`` +``CONFIG_BOARDCTL_APP_SYMTAB=y`` ``CONFIG_NSH_LINELEN=64`` +``CONFIG_BOARDCTL_OS_SYMTAB=y`` ``CONFIG_NSH_READLINE=y`` +``CONFIG_BUILTIN=y`` ``CONFIG_NSH_ROMFSETC=y`` +``CONFIG_CLOCK_MONOTONIC=y`` ``CONFIG_PSEUDOTERM=y`` +``CONFIG_ELF=y`` ``CONFIG_PTHREAD_CLEANUP=y`` +``CONFIG_FS_BINFS=y`` ``CONFIG_PTHREAD_MUTEX_TYPES=y`` +``CONFIG_FS_PROCFS=y`` ``CONFIG_PTHREAD_MUTEX_TYPES=y`` +``CONFIG_FS_PROCFS_REGISTER=y`` ``CONFIG_PTHREAD_STACK_MIN=1024`` +``CONFIG_FS_ROMFS=y`` ``CONFIG_RR_INTERVAL=10`` +``CONFIG_FS_TMPFS=y`` ``CONFIG_SCHED_WAITPID=y`` +``CONFIG_IDLETHREAD_STACKSIZE=2048`` ``CONFIG_SERIAL_TERMIOS=y`` +``CONFIG_LIBC_EXECFUNCS=y`` ``CONFIG_SYMTAB_ORDEREDBYNAME=y`` +``CONFIG_LIBC_STRERROR=y`` ``CONFIG_SYSTEM_NSH=y`` +``CONFIG_MAX_TASKS=16`` ``CONFIG_SYSTEM_NSH_STACKSIZE=4096`` +``CONFIG_NSH_BUILTIN_APPS=y`` ``CONFIG_USER_ENTRYPOINT="nsh_main"`` +``CONFIG_NSH_FILEIOSIZE=512`` +==================================== ===================================== + +In case you want to use Network and blocks like TCP or UDP, following configuration +options are required: + +============================== ================================== +``CONFIG_NET=y`` ``CONFIG_NET_ROUTE=y`` +``CONFIG_NETDB_DNSCLIENT=y`` ``CONFIG_NET_SOLINGER=y`` +``CONFIG_NETDEV_LATEINIT=y`` ``CONFIG_NET_STATISTICS=y`` +``CONFIG_NETDEV_STATISTICS=y`` ``CONFIG_NET_TCP=y`` +``CONFIG_NETINIT_DHCPC=y`` ``CONFIG_NET_TCPBACKLOG=y`` +``CONFIG_NETINIT_NOMAC=y`` ``CONFIG_NET_TCP_KEEPALIVE=y`` +``CONFIG_NETUTILS_FTPC=y`` ``CONFIG_NET_TCP_WRITE_BUFFERS=y`` +``CONFIG_NETUTILS_TELNETD=y`` ``CONFIG_NET_UDP=y`` +``CONFIG_NETUTILS_TFTPC=y`` ``CONFIG_SYSTEM_DHCPC_RENEW=y`` +``CONFIG_NET_ARP_SEND=y`` ``CONFIG_SYSTEM_NTPC=y`` +``CONFIG_NET_BROADCAST=y`` ``CONFIG_SYSTEM_PING6=y`` +``CONFIG_NET_IPv6=y`` ``CONFIG_SYSTEM_PING=y`` +``CONFIG_NET_LOOPBACK=y`` ``CONFIG_SYSTEM_TEE=y`` +``CONFIG_NET_PKT=y`` +============================== ================================== + +Board and application specific configuration like setting up peripherals or boot options might also be required, +please refer to board and platform documentation for those information. Once NuttX is configured it can be build +by simply running: + + .. code-block:: console + + $ make + +Then we need to export build NuttX which can be done by executing command + + .. code-block:: console + + $ make export + +This creates a zip file nuttx-export-xx.x.x.zip where xx.x.x is the version of NuttX. This file then have to be +moved to pysimCoder directory pysimCoder/CodeGen/nuttx, unzip there and then renamed just to nuttx-export. Then +enter the pysimCoder/CodeGen/nuttx/device directory and execute + + .. code-block:: console + + $ make + +This compiles pysimCoder files that controls functions of separate blocks. PysimCoder can be either installed +on the system (please refer to the `pysimCoder manual `_) +or script pysim-run.sh can be used to run pysimCoder without the installation. This script can be found in pysimCoder +root directory and is run by executing command + + .. code-block:: console + + $ ./pysim-run.sh + +Please note that PYSUPSICTRL variable has to be set/exported in order to succesfully compile NuttX application +designed with pysimCoder. + +Using pysimCoder to design NuttX application +-------------------------------------------- + +After running pysimCoder, separate blocks can be selected from the library menu on the left hand side. The menu contains +several libraries, NuttX specific blocks can be found in library "NuttX". It is also possible to use blocks from other +libraries like "input", "output", "math" and so on. Several blocks can have specific parameter options and various number +of inputs/outputs. Double left click on the block openes parameter settings while single right click on the block leads +to number of inputs/outputs setup. The pysimCoder interface can be seen in the picture below. + +.. figure:: image/interface.png + :align: center + :width: 100% + + pysimCoder interface: library menu can be seen on the left hand side + +The NuttX template Makefile nuttx.tmf has to be selected in order to generate code for NuttX target. +This can be done in the top menu by clicking on Block settings icon which is highlighted in the red circle. + +.. figure:: image/menu.png + :align: center + :width: 100% + + pysimCoder menu: red block settings, green generate C-code + +Block settings option open the following window (showed in the picture below) where you can set template Makefile and +also Python skript with parameters for the controllers. + +.. figure:: image/template.png + :align: center + :width: 100% + + pysimCoder Block settings menu + +C code can be generated by selecting Generate C-code icon (highlighted in the green cirle). Executeble files are then +generated and can be flashed into the target. The flashing procedure can be target specific, please refer to plaftorm´s +documentation. The generated application can be then run from NuttX command line by executing:: + + nsh> main diff --git a/Documentation/index.rst b/Documentation/index.rst index 59b88be51b3..56534c69471 100644 --- a/Documentation/index.rst +++ b/Documentation/index.rst @@ -22,6 +22,7 @@ Last Updated: |today| Home introduction/index.rst quickstart/index.rst + contributing/index.rst introduction/inviolables.rst platforms/index.rst components/index.rst @@ -29,7 +30,6 @@ Last Updated: |today| reference/index.rst faq/index.rst guides/index.rst - contributing/index.rst glossary.rst .. include:: substitutions.rst diff --git a/Documentation/platforms/arm/imxrt/boards/teensy-4.x/index.rst b/Documentation/platforms/arm/imxrt/boards/teensy-4.x/index.rst index d3dcb1b3c42..2f0fd8eceb4 100644 --- a/Documentation/platforms/arm/imxrt/boards/teensy-4.x/index.rst +++ b/Documentation/platforms/arm/imxrt/boards/teensy-4.x/index.rst @@ -118,6 +118,20 @@ focused on network-related testing. This configuration cannot be changed to Teensy 4.0 as this board does not have Ethernet capability. +pikron-bb +--------- + +This is a configuration that compiles the NuttX for use with +open source/hardware `Base Board for Teensy 4.1 +`_. +It includes CAN drivers, communication over serial port, Ethernet +support, support for 240 x 320 pixels LCD display and configuration +options for using NuttX with pysimCoder. NuttX also runs in +tickless mode with the resolution 10 usec. + +This configuration cannot be changed to Teensy 4.0 as base board +is not designed for that. + pwm-4.1 ------- diff --git a/Documentation/platforms/arm/imxrt/index.rst b/Documentation/platforms/arm/imxrt/index.rst index 95381f5ee6b..be6e4ea26ef 100644 --- a/Documentation/platforms/arm/imxrt/index.rst +++ b/Documentation/platforms/arm/imxrt/index.rst @@ -33,6 +33,21 @@ set as write-through but can be changed to write-back via Kconfig. While write-b performance than write-through, it is not supported for all peripherals in NuttX yet. Write-back data cache can not be selected while running Ethernet or serial port over USB. +Tickless OS +=========== + +With Tickless OS, the periodic, timer interrupt is eliminated and replaced with a one-shot, +interval timer, that becomes event driven instead of polled. This allows to run the MCU with +higher resolution without using more of the CPU bandwidth processing useless interrupts. + +Only tickless via an alarm is currently supported for i.MX RT MCU, which can be selected by +CONFIG_SCHED_TICKLESS_ALARM option. CONFIG_USEC_PER_TICK option determines the resolution +of time reported by :c:func:`clock_systime_ticks()` and the resolution of times that can be set +for certain delays including watchdog timers and delayed work. It is important that value set in +CONFIG_USEC_PER_TICK represents the frequency of GPT timer that runs the tickless mode. Clock +source of the timer is 16.6 MHz, which is then devided by the prescaler value from 1 to 4096. +Possible values for CONFIG_USEC_PER_TICK are 10 or 100 for example. + Peripheral Support ================== diff --git a/Documentation/platforms/risc-v/bl602/index.rst b/Documentation/platforms/risc-v/bl602/index.rst index 3e3b01738aa..d72c1ad3e55 100644 --- a/Documentation/platforms/risc-v/bl602/index.rst +++ b/Documentation/platforms/risc-v/bl602/index.rst @@ -2,11 +2,213 @@ Bouffalo Lab BL602 ================== -Toolchain -========= +BL602/BL604 is Wi-Fi + BLE combo chipset for ultra-low-cost and +low-power application. Wireless subsystem contains 2.4G radio, Wi-Fi +802.11b/g/n and BLE 5.0 baseband/MAC designs. Microcontroller subsystem +contains a low-power 32-bit RISC CPU, high-speed cache and memories. +Power Management Unit controls low-power modes. Moreover, variety of +security features are supported. -OpenOCD -------- +- 32-bit RISC CPU with FPU (floating point unit) -Peripheral Support -================== +- 276KB RAM + +- 128KB ROM + +- 1Kb eFuse + +- Embedded Flash (Optional) + +- Four DMA channels + +BL602 Toolchain +=============== + +Toolchain can be obtained from +`bl_iot_sdk/toolchain/riscv `__ + +In addition, SiFive’s toolchain can be downloaded from: + +https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz + +Building +======== + +nsh +--- + +First make sure the ``riscv-gnu-toolchain`` has been installed +correctly. + +Configure the NuttX project: ``./tools/configure.sh bl602evb:nsh``. Run +``make`` to build the project. + +.. code:: shell + + root@pc:~/nuttx$ tools/configure.sh bl602evb:nsh + + root@pc:~/nuttx$ make + +wifi +---- + +Configure the NuttX project: ``./tools/configure.sh bl602evb:wifi``. Run +``make`` to build the project. + +.. code:: shell + + root@pc:~/nuttx$ tools/configure.sh bl602evb:wifi + + root@pc:~/nuttx$ make + +Flashing +======== + +Dev Cube is a chip integrated development tool provided by Bouffalolab, +which includes three functions: IOT program download, MCU program +download and RF performance test. + +Dev Cube provides users with the function of downloading programs, and +supports the configuration of parameters such as clock and flash. Users +can decide whether to encrypt the program, add signatures, and replace +the information file, user resource file, partition table and other +functional configurations according to their own needs when the program +is started. + +Users can get the latest version of Dev Cube through `Bouffalo Lab +Dev `__. + +Config download +--------------- + +**Configuration parameters include:** + +- **Interface**: Select the communication interface for flashing, here + select Uart to download + +- **COM Port**: When select UART for downloading, select the COM port + number connected to the chip, and you can click the Refresh button to + refresh the COM port + +- **Uart Rate**: When select UART for downloading, fill in the baud + rate. The recommended download baud rate is 2MHz, + +- **Xtal**: Select the crystal oscillator frequency when downloading. + If the board does not have a soldered crystal oscillator, the + internal RC32M clock source should be selected here,default is 40M + +- **Chip Erase**: default setting is False + +**Configuration parameters include:** + +- **Factory Params**: Use the dts file in the device_tree folder of the + corresponding chip model in the Dev Cube directory. The default + selection is 40M. + +- **Partition Table**: Use the partition table in the partition folder + of the corresponding chip model in the Dev Cube directory, and 2M + files are selected by default for BL602 + + **For the nuttx, BL602 has a dedicated partition file. It is placed + in** ``nuttx/tools/bl602`` + +- **Boot2 Bin**: It is the first Flash program that runs after the + system is started. It is responsible for establishing the BLSP + security environment and guiding the main program to run. It uses the + Boot2 file in the builtin_imgs folder of the corresponding chip model + in the Dev Cube directory. + +- **Firmware Bin**: Bin file path generated by user compilation + +- **Media/Romfs**: Choose one of Media and Romfs. If you check media, + you should provide a file. If you check Romfs, a folder should be + provided. + +- **MFG Bin**: Select MFG file + +- **AES-Encrypt**: If you use the encryption function, you need to + select the AES-Encrypt option, and enter the Key and IV used for + encryption. Hexadecimal characters should be entered, and a Byte is + composed of two characters, so the Key and IV require 32 characters + to be input respectively. It should be noted that the last 8 + characters of the IV (ie 4Bytes) must be all 0 + +- **Single Download Config**: you can download a single file. Fill in + the starting address of the download, starting with 0x + +For details, please refer to `BLFlashEnv — BL602 IoT +SDK `__ + +Debuging with OpenOCD +===================== + +Download OpenOCD `RISC‑V +OpenOCD `__. + +Start OpenOCD: + +.. code:: shell + + root@pc:~$ openocd -f ~/bl_iot_sdk/tools/debug/if_bflb_link.cfg -f ~/bl_iot_sdk/tools/debug/tgt_602_xip.cfg + +Start GDB: + +.. code:: shell + + root@pc:~$ riscv64-unknown-elf-gdb ~/nuttx/nuttx -x ~/bl_iot_sdk/tools/debug/602.init + +Connect OpenOCD: + +.. code:: shell + + (gdb) target remote :3333 + + (gdb) c + +BL602 Peripheral Support +======================== + +- One SDIO 2.0 slave + +- One SPI master/slave + +- Two UART + +- One I2C master + +- Five PWM channels + +- 10-bit general DAC + +- 12-bit general ADC + +- Two general analog comparators (ACOMP) + +- PIR (Passive Infra-Red) detection + +- IR remote HW accelerator + +- 16 or 23 GPIOs + +========== ======= ===== +Peripheral Support NOTES +========== ======= ===== +GPIO Yes +UART Yes +SPI Yes +I2C Yes +DMA Yes +Wifi Yes +SPI FLASH Yes +Timers Yes +Watchdog Yes +RTC Yes +RNG No +AES No +eFuse Yes +ADC No +Bluetooth No +LED_PWM No +SHA No +RSA No +========== ======= ===== diff --git a/Documentation/platforms/risc-v/esp32c3/index.rst b/Documentation/platforms/risc-v/esp32c3/index.rst index 3a9c9ca13b8..0ad497a270f 100644 --- a/Documentation/platforms/risc-v/esp32c3/index.rst +++ b/Documentation/platforms/risc-v/esp32c3/index.rst @@ -113,15 +113,15 @@ Wifi Yes SPIFLASH Yes Timers Yes Watchdog Yes -RTC No +RTC Yes RNG Yes -AES No -eFuse No -ADC No -Bluetooth No -LED_PWM No -SHA No -RSA No +AES Yes +eFuse Yes +ADC Yes +Bluetooth Yes +LED_PWM Yes +SHA Yes +RSA Yes ========== ======= ===== diff --git a/Documentation/platforms/risc-v/mpfs/index.rst b/Documentation/platforms/risc-v/mpfs/index.rst index 3ab77a1a257..bb733219175 100644 --- a/Documentation/platforms/risc-v/mpfs/index.rst +++ b/Documentation/platforms/risc-v/mpfs/index.rst @@ -59,13 +59,13 @@ GPIO Yes MMUART Yes Uart mode only SPI Yes I2C Yes -Timers No +eMMC SD/SDIO Yes eMMC not fully tested +Timers No Watchdog No RTC No CAN No eNVM No -USB No -eMMC SD/SDIO No +USB No ============ ======= ===== diff --git a/Documentation/platforms/sim/index.rst b/Documentation/platforms/sim/index.rst new file mode 100644 index 00000000000..2eba6c02dce --- /dev/null +++ b/Documentation/platforms/sim/index.rst @@ -0,0 +1,11 @@ +========== +Simulators +========== + +The following Simulator/Emulators are supported: + +.. toctree:: + :maxdepth: 2 + :glob: + + */* diff --git a/Documentation/platforms/sim/sim/index.rst b/Documentation/platforms/sim/sim/index.rst new file mode 100644 index 00000000000..660859a932b --- /dev/null +++ b/Documentation/platforms/sim/sim/index.rst @@ -0,0 +1,56 @@ +=== +SIM +=== + +It is possible to run NuttX in a simulator called ``sim``, but some features +currently are supported only on Linux host (i.e.: Bluetooth, I2C, SPI, etc). + +Using ``sim`` you can test many of NuttX features without a supported board. +Examples of supported features: Audio, Bluetooth, ELF, I2C, SPI, LVGL, Flash +File System, NX Serves, NX Demos, NX Window Manager, ROMFS, Network: TCP, +UDP, IP,6LoWPAN, and many more. + +Toolchain +========= + +All you need is your machine ``gcc`` working. + +Compiling +========= + +All you need to do is select your desired board profile configuratioon +(see: nuttx/sim/sim/sim/configs for the listing) :: + + $ ./tools/configure.sh sim:nsh + + $ make + + +Running +======= + +When the compilation finishes it will create a ``nuttx`` binary, then run it:: + + $ ./nuttx + login: admin + password: Administrator + User Logged-in! + + NuttShell (NSH) NuttX-10.1.0 + MOTD: username=admin password=Administrator + nsh> ? + help usage: help [-v] [] + + . cd echo hexdump mkfatfs pwd source unset + [ cp exec kill mkrd readlink test usleep + ? cmp exit losetup mount rm time xd + basename dirname false ln mv rmdir true + break dd free ls poweroff set uname + cat df help mkdir ps sleep umount + + Builtin Apps: + sh hello nsh + nsh> uname -a + NuttX 10.1.0 508215581f Sep 3 2021 10:47:34 sim sim + nsh> + diff --git a/Documentation/platforms/xtensa/esp32/boards/esp32-devkitc/index.rst b/Documentation/platforms/xtensa/esp32/boards/esp32-devkitc/index.rst index cb7a113536f..48cb5ce4274 100644 --- a/Documentation/platforms/xtensa/esp32/boards/esp32-devkitc/index.rst +++ b/Documentation/platforms/xtensa/esp32/boards/esp32-devkitc/index.rst @@ -119,7 +119,44 @@ USB connection by means of CP2102 converter, at 115200 bps). wapi ---- -Enables WiFi support +Enables WiFi support. You can define your credentials this way:: + + $ make menuconfig + -> Application Configuration + -> Network Utilities + -> Network initialization (NETUTILS_NETINIT [=y]) + -> WAPI Configuration + +Or if you don't want to keep it saved in the firmware you can do it +at runtime:: + + nsh> wapi psk wlan0 mypasswd 1 + nsh> wapi essid wlan0 myssid 1 + nsh> renew wlan0 + +wifinsh +------- + +The ``wifinsh`` is similar to the ``wapi`` board example, but it will connect +automatically to your Access Point (Wi-Fi Router) and will run telnet daemon +in the board. Then you can connect to your board from your computer using the +telnet program. + +After configuring the ``esp32-devkit:wifinsh`` you need to define your creden- +tials in the menuconfig. You can define your credentials this way:: + + $ make menuconfig + -> Application Configuration + -> Network Utilities + -> Network initialization (NETUTILS_NETINIT [=y]) + -> WAPI Configuration + +Find your board IP using ``nsh> ifconfig`` and then from your computer:: + + $ telnet 192.168.x.y + +Where x and y are the last two numbers of the IP that your router gave to +your board. mqttc ----- @@ -129,14 +166,14 @@ This configuration tests the MQTT-C publisher example. From the host, start the broker and subscribe to the :code:`test` topic. Using `mosquitto` this should be:: - mosquitto& - mosquitto_sub -t test + $ mosquitto& + $ mosquitto_sub -t test From the NSH, connect to an access point:: - wapi psk wlan0 mypasswd 1 - wapi essid wlan0 myssid 1 - renew wlan0 + nsh> wapi psk wlan0 mypasswd 1 + nsh> wapi essid wlan0 myssid 1 + nsh> renew wlan0 Publish to the broker:: @@ -211,7 +248,7 @@ SPI2 is used and kept with the default IOMUX pins, i.e.:: Once booted the following command is used to mount a FAT file system:: - mount -t vfat /dev/mmcsd0 /mnt + nsh> mount -t vfat /dev/mmcsd0 /mnt module ------ @@ -232,8 +269,8 @@ through SPI1. By default a SmartFS file system is selected. Once booted you can use the following commands to mount the file system:: - mksmartfs /dev/smart0 - mount -t smartfs /dev/smart0 /mnt + nsh> mksmartfs /dev/smart0 + nsh> mount -t smartfs /dev/smart0 /mnt Note that mksmartfs is only needed the first time. diff --git a/Documentation/platforms/xtensa/esp32/boards/esp32-wrover-kit/index.rst b/Documentation/platforms/xtensa/esp32/boards/esp32-wrover-kit/index.rst index c072a9c35a4..1f1fca8b6d6 100644 --- a/Documentation/platforms/xtensa/esp32/boards/esp32-wrover-kit/index.rst +++ b/Documentation/platforms/xtensa/esp32/boards/esp32-wrover-kit/index.rst @@ -107,7 +107,7 @@ At the nsh, we can turn LEDs on and off with the following:: We can use the interrupt pin to send a signal when the interrupt fires:: - nsh> gpio -w 14 /dev/gpint3 + nsh> gpio -w 14 /dev/gpint0 The pin is configured to as a rising edge interrupt, so after issuing the above command, connect it to 3.3V. diff --git a/Documentation/platforms/xtensa/esp32/index.rst b/Documentation/platforms/xtensa/esp32/index.rst index 98465240ba8..d965ef0e4d8 100644 --- a/Documentation/platforms/xtensa/esp32/index.rst +++ b/Documentation/platforms/xtensa/esp32/index.rst @@ -25,7 +25,7 @@ for ESP32 by Espressif. For flashing firmware, you will need to install ``esptool.py`` by running:: - pip install esptool + $ pip install esptool Building from source -------------------- @@ -37,7 +37,7 @@ build the toolchain with crosstool-NG on Linux are as follows $ git clone https://github.com/espressif/crosstool-NG.git $ cd crosstool-NG - $ git checkout esp-2019r2 + $ git checkout esp-2021r1 $ git submodule update --init $ ./bootstrap && ./configure --enable-local && make @@ -49,15 +49,18 @@ build the toolchain with crosstool-NG on Linux are as follows $ export PATH="crosstool-NG/builds/xtensa-esp32-elf/bin:$PATH" -These steps are given in setup guide in -`ESP-IDF repository `_. +These steps are given in the setup guide in +`ESP-IDF documentation `_. Flashing ======== -Firmware for ESP32 is flashed via the USB/UART interface using the ``esptool.py`` tool. To flash your NuttX firmware simply run:: +Firmware for ESP32 is flashed via the USB/UART interface using the ``esptool.py`` tool. +It's a two step process where the first converts the ELF file into a ESP32-compatible binary +and the second flashes it to the board. These steps are included into the build system and you can +flash your NuttX firmware simply by running:: - make download ESPTOOL_PORT= + $ make download ESPTOOL_PORT= where ```` is typically ``/dev/ttyUSB0`` or similar. You can change the baudrate by passing ``ESPTOOL_BAUD``. @@ -288,10 +291,10 @@ WiFi A standard network interface will be configured and can be initialized such as:: - ifup wlan0 - wapi psk wlan0 mypasswd 1 - wapi essid wlan0 myssid 1 - renew wlan0 + nsh> ifup wlan0 + nsh> wapi psk wlan0 mypasswd 3 + nsh> wapi essid wlan0 myssid 1 + nsh> renew wlan0 In this case a connection to AP with SSID ``myssid`` is done, using ``mypasswd`` as password. IP address is obtained via DHCP using ``renew`` command. You can check @@ -299,373 +302,29 @@ the result by running ``ifconfig`` afterwards. .. tip:: Boards usually expose a ``wapi`` defconfig which enables WiFi +WiFi SoftAP +=========== + +It is possible to use ESP32 as an Access Point (SoftAP). Actually there are some +boards with a ``sta_softap`` which enables this support. + +If you are using this board config profile you can run these commands to be able +to connect your smartphone or laptop to your board:: + + nsh> ifup wlan1 + nsh> dhcpd_start wlan1 + nsh> wapi psk wlan0 mypasswd 1 + nsh> wapi essid wlan1 nuttxap 1 + +In this case, you are creating the access point ``nuttxapp`` in your board and to +connect to it on your smartphone you will be required to type the password ``mypasswd``. +The ``dhcpd_start`` is necessary to let your board to associate an IP to your smartphone. + Bluetooth ========= Bluetooth is not currently supported. -Debugging with OpenOCD -====================== - -First you in need some debug environment which would be a JTAG emulator -and the ESP32 OpenOCD software which is available here: -https://github.com/espressif/openocd-esp32 - -OpenOCD Documentation ---------------------- - -There is on overview of the use of OpenOCD `here `. -This document is also available in `ESP-IDF source tree `_ -in ``docs`` directory. - -OpenOCD Configuration File --------------------------- - -A template ESP32 OpenOCD configuration file is provided in -ESP-IDF ``docs`` directory (``esp32.cfg``). Since you are not using -FreeRTOS, you will need to uncomment the line:: - - set ESP32_RTOS none - -in the OpenOCD configuration file. You will also need to change -the source line from:: - - find interface/ftdi/tumpa.cfg - -to reflect the physical JTAG adapter connected. - -A copy of this OpenOCD configuration file available in the NuttX -source tree at ``nuttx/boards/xtensa/esp32/esp32-devkitc/scripts/esp32.cfg``. -It has these modifications: - - - The referenced "set ESP32_RTOS none" line has been uncommented - - The "find interface/ftdi/tumpa.cfg" was removed. This means that you will - need to specify the interface configuration file on the OpenOCD - command line. - -Another OpenOCD configuration file is available in the NuttX source tree at -``nuttx/boards/xtensa/esp32/esp32-devkitc/scripts/esp32-ft232h.cfg``. -It has been tested with: - - - `ESP32-DevKitC V4 `_ - - - Akizukidenshi's FT232HL, a FT232H based JTAG adapter - (http://akizukidenshi.com/catalog/g/gK-06503/) with JP3 and JP4 closed, - and connected to ESP32 as: - - +------------------+-------------+ - | ESP32-DevKitC V4 | FT232HL | - +=======+==========+=============+ - | J2 | J3 | J2 | - +-------+----------+-------------+ - | IO13 | | AD0 (TCK) | - +-------+----------+-------------+ - | IO12 | | AD1 (TDI) | - +-------+----------+-------------+ - | | IO15 | AD2 (TDO) | - +-------+----------+-------------+ - | IO14 | | AD3 (TMS) | - +-------+----------+-------------+ - | GND | | GND | - +-------+----------+-------------+ - -The following version of OpenOCD from ESP-IDF (macOS version):: - - % openocd --version - Open On-Chip Debugger v0.10.0-esp32-20191114 (2019-11-14-14:19) - Licensed under GNU GPL v2 - For bug reports, read - http://openocd.org/doc/doxygen/bugs.html - -General OpenOCD build instructions ----------------------------------- - -Installing OpenOCD. The sources for the ESP32-enabled variant of -OpenOCD are available from Espressifs GitHub. To download the source, -use the following commands: - -.. code-block:: console - - $ git clone https://github.com/espressif/openocd-esp32.git - $ cd openocd-esp32 - $ git submodule init - $ git submodule update - -Then look at the README and the docs/INSTALL.txt files in the -openocd-esp32 directory for further instructions. There area -separate README files for Linux/Cygwin, macOS, and Windows. Here -is what I ended up doing (under Linux): - -.. code-block:: console - - $ cd openocd-esp32 - $ ./bootstrap - $ ./configure - $ make - -If you do not do the install step, then you will have a localhost -version of the OpenOCD binary at ``openocd-esp32/src``. - -Starting the OpenOCD Server ---------------------------- - - - cd to openocd-esp32 directory - - copy the modified esp32.cfg script to this directory - -Then start OpenOCD by executing a command like the following. Here -I assume that: - - - You did not install OpenOCD; binaries are available at - openocd-esp32/src and interface scripts are in - openocd-esp32/tcl/interface - - I select the configuration for the Olimex ARM-USB-OCD - debugger. - -Then the command to start OpenOCD is: - -.. code-block:: console - - $ ./src/openocd -s ./tcl -f tcl/interface/ftdi/olimex-arm-usb-ocd.cfg -f ./esp32.cfg - -I then see:: - - Open On-Chip Debugger 0.10.0-dev-g3098897 (2016-11-14-12:19) - Licensed under GNU GPL v2 - For bug reports, read - http://openocd.org/doc/doxygen/bugs.html - adapter speed: 200 kHz - force hard breakpoints - Info : clock speed 200 kHz - Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) - Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) - Info : esp32.cpu0: Debug controller was reset (pwrstat=0x5F, after clear 0x0F). - Info : esp32.cpu0: Core was reset (pwrstat=0x5F, after clear 0x0F). - -Connecting a debugger to OpenOCD --------------------------------- - -OpenOCD should now be ready to accept gdb connections. If you have -compiled the ESP32 toolchain using Crosstool-NG, or if you have -downloaded a precompiled toolchain from the Espressif website, you -should already have xtensa-esp32-elf-gdb, a version of gdb that can -be used for this - -First, make sure the project you want to debug is compiled and -flashed into the ESP32’s SPI flash. Then, in a different console -than OpenOCD is running in, invoke gdb. For example, for the -template app, you would do this like such:: - -.. code-block:: console - - $ cd nuttx - $ xtensa-esp32-elf-gdb -ex 'target remote localhost:3333' nuttx - -This should give you a gdb prompt. - -Breakpoints ------------ - -You can set up to 2 hardware breakpoints, which can be anywhere in the -address space. Also 2 hardware watchpoints. - -The openocd esp32.cfg file currently forces gdb to use hardware -breakpoints, I believe because software breakpoints (or, at least, the -memory map for automatically choosing them) aren't implemented yet -(as of 2016-11-14). - -JTAG Emulator -------------- - -The documentation indicates that you need to use an external JTAG -like the TIAO USB Multi-protocol Adapter and the Flyswatter2. -The instructions at http://www.esp32.com/viewtopic.php?t=381 show -use of an FTDI C232HM-DDHSL-0 USB 2.0 high speed to MPSSE cable. - -The ESP32 DevkitC v4 board has no on board JTAG connector. It will -be necessary to make a cable or some other board to connect a JTAG -emulator. Refer to http://www.esp32.com/viewtopic.php?t=381 "How -to debug ESP32 with JTAG / OpenOCD / GDB 1st part connect the -hardware." - -Relevant pin-out: - -========= ============= -PIN LABEL JTAG FUNCTION -========= ============= -IO14 TMS -IO12 TDI -GND GND -IO13 TCK -x x -IO15 TDO -========= ============= - -You can find the mapping of JTAG signals to ESP32 GPIO numbers in -"ESP32 Pin List" document found -`here `_. - -I put the ESP32 on a prototyping board and used a standard JTAG 20-pin -connector with an older Olimex JTAG that I had. Here is how I wired -the 20-pin connector: - -===================== =============== -20-PIN JTAG CONNECTOR ESP32 PIN LABEL -===================== =============== - 1 VREF INPUT 3V3 - 3 nTRST OUTPUT N/C - 5 TDI OUTPUT IO12 - 7 TMS OUTPUT IO14 - 9 TCLK OUTPUT IO13 -11 RTCK INPUT N/C -13 TDO INPUT IO15 -15 RESET I/O N/C -17 DBGRQ OUTPUT N/C -19 5V OUTPUT N/C - 2 VCC INPUT 3V3 - 4 GND N/A GND - 6 GND N/A GND - 8 GND N/A GND -10 GND N/A GND -12 GND N/A GND -14 GND N/A GND -16 GND N/A GND -18 GND N/A GND -20 GND N/A GND -===================== =============== - -Executing and Debugging from FLASH and IRAM -=========================================== - -FLASH ------ - -OpenOCD currently doesn't have a FLASH driver for ESP32, so you can load -code into IRAM only via JTAG. FLASH-resident sections like .FLASH.rodata -will fail to load. The bootloader in ROM doesn't parse ELF, so any image -which is bootloaded from FLASH has to be converted into a custom image -format first. - -The tool esp-idf uses for flashing is a command line Python tool called -"esptool.py" which talks to a serial bootloader in ROM. A version is -supplied in the esp-idf codebase in components/esptool_py/esptool, the -"upstream" for that tool is here and now supports ESP32:: - - https://github.com/espressif/esptool/ - -To FLASH an ELF via the command line is a two step process, something like -this:: - - esptool.py --chip esp32 elf2image --flash_mode dio --flash_size 4MB -o nuttx.bin nuttx - esptool.py --chip esp32 --port COMx write_flash 0x1000 bootloader.bin 0x8000 partition_table.bin 0x10000 nuttx.bin - -The first step converts an ELF image into an ESP32-compatible binary -image format, and the second step flashes it (along with bootloader image and -partition table binary.) -The offset for the partition table may vary, depending on ESP-IDF -configuration, ``CONFIG_PARTITION_TABLE_OFFSET``, which is by default 0x8000 -as of writing this. - -To put the ESP32 into serial flashing mode, it needs to be reset with IO0 held -low. On the Core boards this can be accomplished by holding the button marked -"Boot" and pressing then releasing the button marked "EN". Actually, esptool.py -can enter bootloader mode automatically (via RTS/DTR control lines), but -unfortunately a timing interaction between the Windows CP2012 driver and the -hardware means this doesn't currently work on Windows. - -Secondary Boot Loader / Partition Table ---------------------------------------- - -See: - - - https://github.com/espressif/esp-idf/tree/master/components/bootloader - - https://github.com/espressif/esp-idf/tree/master/components/partition_table . - -The secondary boot loader by default programs a RTC watchdog timer. -As NuttX doesn't know the timer, it reboots every ~9 seconds. You can -disable the timer by tweaking sdkconfig CONFIG_BOOTLOADER_WDT_ENABLE -and rebuild the boot loader. - -Running from IRAM with OpenOCD ------------------------------- - -Running from IRAM is a good debug option. You should be able to load the -ELF directly via JTAG in this case, and you may not need the bootloader. - -NuttX supports a configuration option, CONFIG_ESP32_DEVKITC_RUN_IRAM, that may be -selected for execution from IRAM. This option simply selects the correct -linker script for IRAM execution. - -Skipping the Secondary Bootloader ---------------------------------- - -It is possible to skip the secondary bootloader and run out of IRAM using -only the primary bootloader if your application of small enough (< 128KiB code, -<180KiB data), then you can simplify initial bring-up by avoiding second stage -bootloader. Your application will be loaded into IRAM using first stage -bootloader present in ESP32 ROM. To achieve this, you need two things: - - 1. Have a linker script which places all code into IRAM and all data into - IRAM/DRAM - - 2. Use "esptool.py" utility to convert application .elf - file into binary format which can be loaded by first stage bootloader. - -Again you would need to link the ELF file and convert it to binary format suitable -for flashing into the board. The command should to convert ELF file to binary -image looks as follows:: - - esptool.py --chip esp32 elf2image --flash_mode "dio" --flash_freq "40m" --flash_size "2MB" -o nuttx.bin nuttx - -To flash binary image to your development board, use the same esptool.py utility:: - - esptool.py --chip esp32 --port /dev/ttyUSB0 --baud 921600 write_flash -z --flash_mode dio --flash_freq 40m --flash_size 2MB 0x1000 nuttx.bin - -The argument before app.bin (0x1000) indicates the offset in flash where binary -will be written. ROM bootloader expects to find an application (or second stage -bootloader) image at offset 0x1000, so we are writing the binary there. - -Sample OpenOCD Debug Steps --------------------------- - -I did the initial bring-up using the IRAM configuration and OpenOCD. Here -is a synopsis of my debug steps: - -boards/xtensa/esp32/esp32-devkitc/configs/nsh with:: - - CONFIG_DEBUG_ASSERTIONS=y - CONFIG_DEBUG_FEATURES=y - CONFIG_DEBUG_SYMBOLS=y - CONFIG_ESP32_DEVKITC_RUN_IRAM=y - -I also made this change configuration which will eliminate all attempts to -re-configure serial. It will just use the serial settings as they were left -by the bootloader:: - - CONFIG_SUPPRESS_UART_CONFIG=y - -Start OpenOCD:: - - cd ../openocde-esp32 - cp ../nuttx/boards/xtensa/esp32/esp32-devkitc/scripts/esp32.cfg . - sudo ./src/openocd -s ./tcl/ -f tcl/interface/ftdi/olimex-arm-usb-ocd.cfg -f ./esp32.cfg - -Start GDB and load code:: - - cd ../nuttx - xtensa-esp32-elf-gdb -ex 'target remote localhost:3333' nuttx - (gdb) load nuttx - (gdb) mon reg pc [value report by load for entry point] - (gdb) s - -Single stepping works fine for me as do breakpoints:: - - Breakpoint 1, up_timer_initialize () at chip/esp32_timerisr.c:172 - 72 { - (gdb) n - esp32.cpu0: Target halted, pc=0x400835BF - 187 g_tick_divisor = divisor; - (gdb) ... - Using QEMU ========== @@ -704,8 +363,6 @@ Things to Do 3. See SMP-related issues above -4. See OpenOCD for the ESP32 above - Supported Boards ================ diff --git a/Documentation/quickstart/install.rst b/Documentation/quickstart/install.rst index f08b0362eda..ea8c197ddb8 100644 --- a/Documentation/quickstart/install.rst +++ b/Documentation/quickstart/install.rst @@ -165,8 +165,8 @@ Apache NuttX is actively developed on GitHub. There are two main repositories, ` $ cd nuttx $ curl -L https://github.com/apache/incubator-nuttx/tarball/master -o nuttx.tar.gz $ curl -L https://github.com/apache/incubator-nuttx-apps/tarball/master -o apps.tar.gz - $ tar zxf nuttx.tar.gz - $ tar zxf apps.tar.gz + $ tar zxf nuttx.tar.gz --one-top-level=nuttx --strip-components 1 + $ tar zxf apps.tar.gz --one-top-level=apps --strip-components 1 There are also ``.zip`` archives available (useful for Windows users): just replace ``tarball`` with ``zipball``. @@ -174,13 +174,13 @@ Apache NuttX is actively developed on GitHub. There are two main repositories, ` .. tab:: Download stable release Go to `releases `_ and choose a version to download. The following - example uses version 9.1.0: + example uses version 10.1.0: .. code-block:: console $ mkdir nuttx $ cd nuttx - $ curl -L https://downloads.apache.org/incubator/nuttx/9.1.0/apache-nuttx-9.1.0-incubating.tar.gz -o nuttx.tar.gz - $ curl -L https://downloads.apache.org/incubator/nuttx/9.1.0/apache-nuttx-apps-9.1.0-incubating.tar.gz -o apps.tar.gz + $ curl -L https://www.apache.org/dyn/closer.lua/incubator/nuttx/10.1.0/apache-nuttx-10.1.0-incubating.tar.gz?action=download -o nuttx.tar.gz + $ curl -L https://www.apache.org/dyn/closer.lua/incubator/nuttx/10.1.0/apache-nuttx-apps-10.1.0-incubating.tar.gz?action=download -o apps.tar.gz $ tar zxf nuttx.tar.gz $ tar zxf apps.tar.gz diff --git a/Kconfig b/Kconfig index 271967974c8..b58deb80679 100644 --- a/Kconfig +++ b/Kconfig @@ -9,6 +9,39 @@ config APPSDIR string option env="APPSDIR" +menu "License Setup" +config ALLOW_BSD_COMPONENTS + bool "Use components that have BSD licenses" + default n + ---help--- + When this option is enabled the project will allow the use + of components that have BSD licenses. + + NOTE: Please check that the license for each enabled + component matches your project license. + + NOTE: If this option is not set the following components + are not included in the setup menu: + Crypto + AES cypher support + FS + NFS client file system + SPIFFS File System + Wireless + Bluetooth LE support + +config ALLOW_GPL_COMPONENTS + bool "Use components that have GPL/LGPL licenses" + default n + ---help--- + When this option is enabled the project will allow the use + of components that have GPL/LGPL licenses. + + NOTE: Please check that the license for each enabled + component matches your project license. + +endmenu # License Setup + menu "Build Setup" config EXPERIMENTAL @@ -1107,7 +1140,7 @@ comment "Driver Debug Options" config DEBUG_LCD bool "Low-level LCD Debug Features" default n - depends on LCD + depends on LCD || SLCD ---help--- Enable LCD driver debug features. @@ -1741,6 +1774,38 @@ config DEBUG_MOTOR_INFO Enable motor informational output to SYSLOG. endif # DEBUG_MOTOR + +config DEBUG_VIDEO + bool "Video Debug Features" + default n + depends on DRIVERS_VIDEO + ---help--- + Enable video debug features. + +if DEBUG_VIDEO + +config DEBUG_VIDEO_ERROR + bool "Video Error Output" + default n + depends on DEBUG_ERROR + ---help--- + Enable video error output to SYSLOG. + +config DEBUG_VIDEO_WARN + bool "Video Warnings Output" + default n + depends on DEBUG_WARN + ---help--- + Enable video warning output to SYSLOG. + +config DEBUG_VIDEO_INFO + bool "Video Informational Output" + default n + depends on DEBUG_INFO + ---help--- + Enable video informational output to SYSLOG. + +endif # DEBUG_VIDEO endif # DEBUG_FEATURES config ARCH_HAVE_STACKCHECK @@ -1759,14 +1824,16 @@ config STACK_COLORATION Only supported by a few architectures. config STACK_USAGE_SAFE_PERCENT - int "Stack usage safe precent" + int "Stack usage safe percent" default 0 range 0 100 depends on STACK_COLORATION ---help--- - Stack usage precent = up_check_tcbstack() * 100 / tcb->adj_stack_size, - this should lower then STACK_USAGE_SAFE_PERCENT. - Idle thread will timely check stack usage when this macro value > 0. + Stack usage percent = up_check_tcbstack() * 100 / tcb->adj_stack_size, + this should be lower than STACK_USAGE_SAFE_PERCENT. + + Idle thread will periodically check stack usage when this macro + value > 0. N.B. This feature should not be used in production code. diff --git a/LICENSE b/LICENSE index 44876b3deed..6762630fe88 100644 --- a/LICENSE +++ b/LICENSE @@ -854,6 +854,39 @@ arch/arm/src/armv8-m/arm_exception.S arch/arm/src/armv7-m/etm.h arch/arm/src/armv8-m/etm.h +arch/arm/src/efm32/efm32_flash.c +arch/arm/src/efm32/hardware/efm32_acmp.h +arch/arm/src/efm32/hardware/efm32_adc.h +arch/arm/src/efm32/hardware/efm32_aes.h +arch/arm/src/efm32/hardware/efm32_burtc.h +arch/arm/src/efm32/hardware/efm32_calibrate.h +arch/arm/src/efm32/hardware/efm32_cmu.h +arch/arm/src/efm32/hardware/efm32_dac.h +arch/arm/src/efm32/hardware/efm32_devinfo.h +arch/arm/src/efm32/hardware/efm32_dma.h +arch/arm/src/efm32/hardware/efm32_emu.h +arch/arm/src/efm32/hardware/efm32_flash.h +arch/arm/src/efm32/hardware/efm32gg_memorymap.h +arch/arm/src/efm32/hardware/efm32g_memorymap.h +arch/arm/src/efm32/hardware/efm32_gpio.h +arch/arm/src/efm32/hardware/efm32_i2c.h +arch/arm/src/efm32/hardware/efm32_lcd.h +arch/arm/src/efm32/hardware/efm32_lesense.h +arch/arm/src/efm32/hardware/efm32_letimer.h +arch/arm/src/efm32/hardware/efm32_leuart.h +arch/arm/src/efm32/hardware/efm32_memorymap.h +arch/arm/src/efm32/hardware/efm32_msc.h +arch/arm/src/efm32/hardware/efm32_pcnt.h +arch/arm/src/efm32/hardware/efm32_prs.h +arch/arm/src/efm32/hardware/efm32_rmu.h +arch/arm/src/efm32/hardware/efm32_romtable.h +arch/arm/src/efm32/hardware/efm32_rtc.h +arch/arm/src/efm32/hardware/efm32tg_memorymap.h +arch/arm/src/efm32/hardware/efm32_timer.h +arch/arm/src/efm32/hardware/efm32_usart.h +arch/arm/src/efm32/hardware/efm32_usb.h +arch/arm/src/efm32/hardware/efm32_vcmp.h +arch/arm/src/efm32/hardware/efm32_wdog.h ========================== Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com @@ -2142,3 +2175,286 @@ arch/arm/src/tiva/cc13xx/cc13x0_rom.h ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +fs/nfs +============ + Copyright (C) 2012 Gregory Nutt. All rights reserved. + Copyright (C) 2012 Jose Pablo Rojas Vargas. All rights reserved. + Author: Jose Pablo Rojas Vargas + Gregory Nutt + + Leveraged from OpenBSD: + + Copyright (c) 1989, 1993 + The Regents of the University of California. All rights reserved. + + This code is derived from software contributed to Berkeley by + Rick Macklem at The University of Guelph. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + 4. Neither the name of the University nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + SUCH DAMAGE. + +fs/spiffs +========= + Copyright (C) 2018 Gregory Nutt. All rights reserved. + Author: Gregory Nutt + + This is a port of version 0.3.7 of SPIFFS by Peter Andersion. That + version was originally released under the MIT license but is here re- + released under the NuttX BSD license. + + Copyright (c) 2013-2017 Peter Andersson (pelleplutt1976@gmail.com) + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + 3. Neither the name NuttX nor the names of its contributors may be + used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + +drivers/mtd/hamming.c +drivers/mtd/mtd_modeltab.c +drivers/mtd/mtd_nand.c +drivers/mtd/mtd_nandecc.c +drivers/mtd/mtd_nandmodel.c +drivers/mtd/mtd_nandscheme.c +drivers/mtd/mtd_onfi.c +include/nuttx/mtd/hamming.h +include/nuttx/mtd/nand.h +include/nuttx/mtd/nand_config.h +include/nuttx/mtd/nand_ecc.h +include/nuttx/mtd/nand_model.h +include/nuttx/mtd/nand_raw.h +include/nuttx/mtd/nand_scheme.h +include/nuttx/mtd/onfi.h +======================== + + Copyright (c) 2011, Atmel Corporation + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + 3. Neither the names NuttX nor Atmel nor the names of its contributors + may be used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + + + drivers/usbhost/hid_parser.c +============================= + Copyright (C) 2011 Gregory Nutt. All rights reserved. + + Adapted from the LUFA Library: + + Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) + dean [at] fourwalledcubicle [dot] com, www.lufa-lib.org + + Permission to use, copy, modify, distribute, and sell this + software and its documentation for any purpose is hereby granted + without fee, provided that the above copyright notice appear in + all copies and that both that the copyright notice and this + permission notice and warranty disclaimer appear in supporting + documentation, and that the name of the author not be used in + advertising or publicity pertaining to distribution of the + software without specific, written prior permission. + + The author disclaim all warranties with regard to this + software, including all implied warranties of merchantability + and fitness. In no event shall the author be liable for any + special, indirect or consequential damages or any damages + whatsoever resulting from loss of use, data or profits, whether + in an action of contract, negligence or other tortious action, + arising out of or in connection with the use or performance of + this software. + +libs/libc/machine/arm/armv8-m +============================= + Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + 3. The name of the company may not be used to endorse or promote + products derived from this software without specific prior written + permission. + + THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED + WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +libs/libc/math/__cos.c +libs/libc/math/__sin.c +libs/libc/math/lib_lgamma.c +libs/libc/math/lib_copysignf.c +====================== + Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. + + Developed at SunSoft, a Sun Microsystems, Inc. business. + Permission to use, copy, modify, and distribute this + software is freely granted, provided that this notice + is preserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the + distribution. + 3. Neither the name NuttX nor the names of its contributors may be + used to endorse or promote products derived from this software + without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + +drivers/wireless/bluetooth/bt_uart.c +drivers/wireless/bluetooth/bt_uart.h +wireless/bluetooth +=========================== + Copyright (c) 2016, Intel Corporation + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are + met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + 3. Neither the name of the copyright holder nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS + ; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +drivers/wireless/spirit/ +======================= + Copyright(c) 2015 STMicroelectronics + Author: VMA division - AMS + Version 3.2.2 08-July-2015 + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions + are met: + + 1. Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + 3. Neither the name of STMicroelectronics nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/README.md b/README.md index 7d4017555aa..65ef5abd623 100644 --- a/README.md +++ b/README.md @@ -2284,6 +2284,8 @@ Below is a guide to the available README files in the NuttX source tree: | | | `- ubw32/ | | | `- README.txt | | `-pic32mz/ + | | |- chipkit-wifire/ + | | | `- README.txt | | |- flipnclick-pic32mz/ | | | `- README.txt | | `- pic32mz-starterkit/ diff --git a/arch/Kconfig b/arch/Kconfig index f242466e4df..9171e8e9a9c 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -348,6 +348,10 @@ config ARCH_HAVE_BACKTRACE bool default n +config ARCH_HAVE_BOOTLOADER + bool + default n + config ARCH_FPU bool "FPU support" default y diff --git a/arch/arm/include/cxd56xx/cisif.h b/arch/arm/include/cxd56xx/cisif.h index b42fcb73a1d..9e600681de3 100644 --- a/arch/arm/include/cxd56xx/cisif.h +++ b/arch/arm/include/cxd56xx/cisif.h @@ -21,54 +21,6 @@ #ifndef __ARCH_ARM_INCLUDE_CXD56XX_CISIF_H #define __ARCH_ARM_INCLUDE_CXD56XX_CISIF_H -/**************************************************************************** - * Public Types - ****************************************************************************/ - -typedef void (*notify_callback_t)(uint8_t code, - uint32_t size, - uint32_t addr); -typedef void (*comp_callback_t)(uint8_t code, - uint32_t size, - uint32_t addr); - -struct cisif_init_yuv_param_s -{ - uint16_t hsize; - uint16_t vsize; - uint32_t notify_size; - notify_callback_t notify_func; -}; - -typedef struct cisif_init_yuv_param_s cisif_init_yuv_param_t; - -struct cisif_init_jpeg_param_s -{ - uint32_t notify_size; - notify_callback_t notify_func; -}; - -typedef struct cisif_init_jpeg_param_s cisif_init_jpeg_param_t; - -struct cisif_sarea_s -{ - uint8_t *strg_addr; - uint32_t strg_size; -}; - -typedef struct cisif_sarea_s cisif_sarea_t; - -struct cisif_param_s -{ - uint32_t format; - cisif_init_yuv_param_t yuv_param; - cisif_init_jpeg_param_t jpg_param; - cisif_sarea_t sarea; - comp_callback_t comp_func; -}; - -typedef struct cisif_param_s cisif_param_t; - #ifndef __ASSEMBLY__ #undef EXTERN @@ -84,11 +36,7 @@ extern "C" * Public Function Prototypes ****************************************************************************/ -int cxd56_cisifinit(void); -int cxd56_cisiffinalize(void); -int cxd56_cisifstartcapture(cisif_param_t *param, cisif_sarea_t *sarea); -int cxd56_cisifstopcapture(void); -int cxd56_cisifsetdmabuf(cisif_sarea_t *sarea); +int cxd56_cisif_initialize(void); #undef EXTERN #if defined(__cplusplus) diff --git a/arch/arm/src/Makefile b/arch/arm/src/Makefile index 77ca97af4ba..a3e66aa7d88 100644 --- a/arch/arm/src/Makefile +++ b/arch/arm/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_ARMV7A),y) # ARMv7-A ARCH_SUBDIR = armv7-a @@ -56,7 +56,7 @@ endif # Additional rules for system call wrapper ifeq ($(CONFIG_SCHED_INSTRUMENTATION_SYSCALL),y) - EXTRALINKCMDS += -Wl,@$(TOPDIR)/syscall/syscall_wraps.ldcmd + EXTRALINKCMDS += @$(TOPDIR)/syscall/syscall_wraps.ldcmd endif # The "head" object @@ -93,8 +93,8 @@ LDFLAGS += $(ARCHSCRIPT) $(EXTRALINKCMDS) # Override in Make.defs if linker is not 'ld' -LDSTARTGROUP ?= -Wl,--start-group -LDENDGROUP ?= -Wl,--end-group +LDSTARTGROUP ?= --start-group +LDENDGROUP ?= --end-group BOARDMAKE = $(if $(wildcard board$(DELIM)Makefile),y,) @@ -153,7 +153,7 @@ board$(DELIM)libboard$(LIBEXT): nuttx$(EXEEXT): $(HEAD_OBJ) board$(DELIM)libboard$(LIBEXT) $(Q) echo "LD: nuttx" - $(Q) $(LD) -Wl,--entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ + $(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ -o $(NUTTX) $(filter-out board/libboard$(LIBEXT), $^) $(EXTRA_OBJS) \ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP) ifneq ($(CONFIG_WINDOWS_NATIVE),y) @@ -193,8 +193,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -206,7 +204,7 @@ ifneq ($(EXTRADELFILE),) endif $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/arm/src/arm/Toolchain.defs b/arch/arm/src/arm/Toolchain.defs index 569b852cb1c..53355dc8a22 100644 --- a/arch/arm/src/arm/Toolchain.defs +++ b/arch/arm/src/arm/Toolchain.defs @@ -88,7 +88,7 @@ endif CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/arm/src/arm/arm_reprioritizertr.c b/arch/arm/src/arm/arm_reprioritizertr.c index 50970cce5a9..6d5cb0ca7bf 100644 --- a/arch/arm/src/arm/arm_reprioritizertr.c +++ b/arch/arm/src/arm/arm_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/arm/src/armv6-m/Toolchain.defs b/arch/arm/src/armv6-m/Toolchain.defs index e825c8a8b50..c83a63ac0b1 100644 --- a/arch/arm/src/armv6-m/Toolchain.defs +++ b/arch/arm/src/armv6-m/Toolchain.defs @@ -80,7 +80,7 @@ endif CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/arm/src/armv6-m/arm_ramvec_initialize.c b/arch/arm/src/armv6-m/arm_ramvec_initialize.c index 09be4b6b147..1abdffc9f40 100644 --- a/arch/arm/src/armv6-m/arm_ramvec_initialize.c +++ b/arch/arm/src/armv6-m/arm_ramvec_initialize.c @@ -71,7 +71,7 @@ */ up_vector_t g_ram_vectors[ARMV6M_VECTAB_SIZE] - __attribute__ ((section (".ram_vectors"), aligned (RAMVEC_ALIGN))); + locate_data(".ram_vectors") aligned_data(RAMVEC_ALIGN); /**************************************************************************** * Public Functions diff --git a/arch/arm/src/armv6-m/arm_reprioritizertr.c b/arch/arm/src/armv6-m/arm_reprioritizertr.c index e22faeedae6..c545a0030fb 100644 --- a/arch/arm/src/armv6-m/arm_reprioritizertr.c +++ b/arch/arm/src/armv6-m/arm_reprioritizertr.c @@ -50,8 +50,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -111,7 +110,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/arm/src/armv6-m/arm_vectors.c b/arch/arm/src/armv6-m/arm_vectors.c index b30cd346a5b..760c1fca89d 100644 --- a/arch/arm/src/armv6-m/arm_vectors.c +++ b/arch/arm/src/armv6-m/arm_vectors.c @@ -81,7 +81,7 @@ extern void exception_common(void); * Note that the [ ... ] desginated initialiser is a GCC extension. */ -unsigned _vectors[] __attribute__((section(".vectors"))) = +unsigned _vectors[] locate_data(".vectors") = { /* Initial stack */ diff --git a/arch/arm/src/armv6-m/ram_vectors.h b/arch/arm/src/armv6-m/ram_vectors.h index 9e190464921..9bf132b34c6 100644 --- a/arch/arm/src/armv6-m/ram_vectors.h +++ b/arch/arm/src/armv6-m/ram_vectors.h @@ -57,7 +57,7 @@ */ extern up_vector_t g_ram_vectors[ARMV6M_VECTAB_SIZE] - __attribute__ ((section (".ram_vectors"), aligned (128))); + locate_data(".ram_vectors") aligned_data(128); /**************************************************************************** * Public Function Prototypes diff --git a/arch/arm/src/armv7-a/Toolchain.defs b/arch/arm/src/armv7-a/Toolchain.defs index 6ddb94a0d20..0a0cf6c2a7c 100644 --- a/arch/arm/src/armv7-a/Toolchain.defs +++ b/arch/arm/src/armv7-a/Toolchain.defs @@ -106,7 +106,7 @@ endif CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/arm/src/armv7-a/arm_cpupause.c b/arch/arm/src/armv7-a/arm_cpupause.c index fbb6c38dd16..c479039d425 100644 --- a/arch/arm/src/armv7-a/arm_cpupause.c +++ b/arch/arm/src/armv7-a/arm_cpupause.c @@ -130,7 +130,7 @@ int up_cpu_paused(int cpu) arm_savestate(tcb->xcp.regs); - /* Release the g_cpu_puased spinlock to synchronize with the + /* Release the g_cpu_paused spinlock to synchronize with the * requesting CPU. */ diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c index 1bcac9d50f1..015931ab852 100644 --- a/arch/arm/src/armv7-a/arm_cpustart.c +++ b/arch/arm/src/armv7-a/arm_cpustart.c @@ -123,14 +123,14 @@ int arm_start_handler(int irq, FAR void *context, FAR void *arg) * Name: up_cpu_start * * Description: - * In an SMP configution, only one CPU is initially active (CPU 0). System - * initialization occurs on that single thread. At the completion of the - * initialization of the OS, just before beginning normal multitasking, + * In an SMP configuration, only one CPU is initially active (CPU 0). + * System initialization occurs on that single thread. At the completion of + * the initialization of the OS, just before beginning normal multitasking, * the additional CPUs would be started by calling this function. * - * Each CPU is provided the entry point to is IDLE task when started. A + * Each CPU is provided the entry point to its IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or + * CPU's g_assignedtasks[cpu] list. No stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each @@ -138,8 +138,8 @@ int arm_start_handler(int irq, FAR void *context, FAR void *arg) * * Input Parameters: * cpu - The index of the CPU being started. This will be a numeric - * value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU - * 0 is already active) + * value in the range of one to (CONFIG_SMP_NCPUS-1). + * (CPU 0 is already active) * * Returned Value: * Zero on success; a negated errno value on failure. diff --git a/arch/arm/src/armv7-a/arm_reprioritizertr.c b/arch/arm/src/armv7-a/arm_reprioritizertr.c index 1cd6ff38d0a..12831e3b627 100644 --- a/arch/arm/src/armv7-a/arm_reprioritizertr.c +++ b/arch/arm/src/armv7-a/arm_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/arm/src/armv7-a/arm_testset.S b/arch/arm/src/armv7-a/arm_testset.S index 2cc4284a908..822c5d7c489 100644 --- a/arch/arm/src/armv7-a/arm_testset.S +++ b/arch/arm/src/armv7-a/arm_testset.S @@ -60,14 +60,14 @@ * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ diff --git a/arch/arm/src/armv7-m/Kconfig b/arch/arm/src/armv7-m/Kconfig index 7bd500187f9..61d89f7eeb7 100644 --- a/arch/arm/src/armv7-m/Kconfig +++ b/arch/arm/src/armv7-m/Kconfig @@ -63,7 +63,7 @@ config ARMV7M_USEBASEPRI WARNING: If CONFIG_ARCH_HIPRI_INTERRUPT is selected, then you MUST select CONFIG_ARMV7M_USEBASEPRI. The Kconfig dependencies here will permit to select an invalid configuration because it - cannot enforce that requirement. If you create this invalild + cannot enforce that requirement. If you create this invalid configuration, you will encounter some problems that may be very difficult to debug. diff --git a/arch/arm/src/armv7-m/Toolchain.defs b/arch/arm/src/armv7-m/Toolchain.defs index 663e34bb5fd..b99ff3b66e7 100644 --- a/arch/arm/src/armv7-m/Toolchain.defs +++ b/arch/arm/src/armv7-m/Toolchain.defs @@ -80,8 +80,6 @@ endif ifeq ($(CONFIG_ARCH_CORTEXM4),y) TOOLCHAIN_ARM7EM := y TOOLCHAIN_MCPU := -mcpu=cortex-m4 - TOOLCHAIN_MTUNE := -mtune=cortex-m4 - TOOLCHAIN_MARCH := -march=armv7e-m ifeq ($(CONFIG_ARCH_FPU),y) TOOLCHAIN_MFLOAT := -mfpu=fpv4-sp-d16 -mfloat-abi=hard else @@ -90,8 +88,6 @@ ifeq ($(CONFIG_ARCH_CORTEXM4),y) else ifeq ($(CONFIG_ARCH_CORTEXM7),y) TOOLCHAIN_ARM7EM := y TOOLCHAIN_MCPU := -mcpu=cortex-m7 - TOOLCHAIN_MTUNE := -mtune=cortex-m7 - TOOLCHAIN_MARCH := -march=armv7e-m ifeq ($(CONFIG_ARCH_FPU),y) ifeq ($(CONFIG_ARCH_DPFPU),y) TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16 -mfloat-abi=hard @@ -104,8 +100,6 @@ else ifeq ($(CONFIG_ARCH_CORTEXM7),y) else # ifeq ($(CONFIG_ARCH_CORTEXM3),y) TOOLCHAIN_ARM7EM := n TOOLCHAIN_MCPU := -mcpu=cortex-m3 - TOOLCHAIN_MTUNE := -mtune=cortex-m3 - TOOLCHAIN_MARCH := -march=armv7-m TOOLCHAIN_MFLOAT := -mfloat-abi=soft endif @@ -142,7 +136,7 @@ else CPP = $(CROSSDEV)gcc -E -P -x c endif -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/arm/src/armv7-m/arm_ramvec_initialize.c b/arch/arm/src/armv7-m/arm_ramvec_initialize.c index 1cf59620568..d4ba3fcb7f1 100644 --- a/arch/arm/src/armv7-m/arm_ramvec_initialize.c +++ b/arch/arm/src/armv7-m/arm_ramvec_initialize.c @@ -95,12 +95,12 @@ * * REVISIT: Can this alignment requirement vary from core-to-core? Yes, it * depends on the number of vectors supported by the MCU. The safest thing - * to do is to put the vector table at the beginning of RAM in order toforce + * to do is to put the vector table at the beginning of RAM in order to force * the highest alignment possible. */ up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE] - __attribute__ ((section (".ram_vectors"), aligned (RAMVEC_ALIGN))); + locate_data(".ram_vectors") aligned_data(RAMVEC_ALIGN); /**************************************************************************** * Public Functions diff --git a/arch/arm/src/armv7-m/arm_reprioritizertr.c b/arch/arm/src/armv7-m/arm_reprioritizertr.c index a3373553f9e..4dbe8f27b3c 100644 --- a/arch/arm/src/armv7-m/arm_reprioritizertr.c +++ b/arch/arm/src/armv7-m/arm_reprioritizertr.c @@ -50,8 +50,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -111,7 +110,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/arm/src/armv7-m/arm_stackcheck.c b/arch/arm/src/armv7-m/arm_stackcheck.c index 613c742df00..99e25c7a555 100644 --- a/arch/arm/src/armv7-m/arm_stackcheck.c +++ b/arch/arm/src/armv7-m/arm_stackcheck.c @@ -55,12 +55,9 @@ * Private Functions ****************************************************************************/ -void __cyg_profile_func_enter(void *func, void *caller) - __attribute__((naked, no_instrument_function)); -void __cyg_profile_func_exit(void *func, void *caller) - __attribute__((naked, no_instrument_function)); -void __stack_overflow_trap(void) - __attribute__((naked, no_instrument_function)); +void __cyg_profile_func_enter(void *func, void *caller) naked_function; +void __cyg_profile_func_exit(void *func, void *caller) naked_function; +void __stack_overflow_trap(void) naked_function; /**************************************************************************** * Name: __stack_overflow_trap diff --git a/arch/arm/src/armv7-m/arm_vectors.c b/arch/arm/src/armv7-m/arm_vectors.c index 248285a5f78..36bdfb8075e 100644 --- a/arch/arm/src/armv7-m/arm_vectors.c +++ b/arch/arm/src/armv7-m/arm_vectors.c @@ -76,7 +76,7 @@ extern void exception_common(void); * Note that the [ ... ] designated initializer is a GCC extension. */ -unsigned _vectors[] __attribute__((section(".vectors"))) = +unsigned _vectors[] locate_data(".vectors") = { /* Initial stack */ diff --git a/arch/arm/src/armv7-m/gnu/arm_testset.S b/arch/arm/src/armv7-m/gnu/arm_testset.S index 226004b60d6..36e039d0ba6 100644 --- a/arch/arm/src/armv7-m/gnu/arm_testset.S +++ b/arch/arm/src/armv7-m/gnu/arm_testset.S @@ -62,14 +62,14 @@ * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ diff --git a/arch/arm/src/armv7-m/iar/arm_testset.S b/arch/arm/src/armv7-m/iar/arm_testset.S index 16763b5a4bb..8ad50f93746 100644 --- a/arch/arm/src/armv7-m/iar/arm_testset.S +++ b/arch/arm/src/armv7-m/iar/arm_testset.S @@ -62,11 +62,11 @@ * lock - The address of spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ diff --git a/arch/arm/src/armv7-m/ram_vectors.h b/arch/arm/src/armv7-m/ram_vectors.h index b329d1eafc1..9ed7ae63bcb 100644 --- a/arch/arm/src/armv7-m/ram_vectors.h +++ b/arch/arm/src/armv7-m/ram_vectors.h @@ -57,12 +57,12 @@ * * REVISIT: Can this alignment requirement vary from core-to-core? Yes, it * depends on the number of vectors supported by the MCU. The safest thing - * to do is to put the vector table at the beginning of RAM in order toforce + * to do is to put the vector table at the beginning of RAM in order to force * the highest alignment possible. */ extern up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE] - __attribute__ ((section (".ram_vectors"), aligned (128))); + locate_data(".ram_vectors") aligned_data(128); /**************************************************************************** * Public Function Prototypes diff --git a/arch/arm/src/armv7-r/Toolchain.defs b/arch/arm/src/armv7-r/Toolchain.defs index 4eaf1d52b18..4bbc2651bb7 100644 --- a/arch/arm/src/armv7-r/Toolchain.defs +++ b/arch/arm/src/armv7-r/Toolchain.defs @@ -88,7 +88,7 @@ endif CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/arm/src/armv7-r/arm_reprioritizertr.c b/arch/arm/src/armv7-r/arm_reprioritizertr.c index f664dcd26fa..44c41b6b1de 100644 --- a/arch/arm/src/armv7-r/arm_reprioritizertr.c +++ b/arch/arm/src/armv7-r/arm_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/arm/src/armv7-r/arm_testset.S b/arch/arm/src/armv7-r/arm_testset.S index 79807bf7614..d8b1aeaad6f 100644 --- a/arch/arm/src/armv7-r/arm_testset.S +++ b/arch/arm/src/armv7-r/arm_testset.S @@ -60,14 +60,14 @@ * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ diff --git a/arch/arm/src/armv8-m/Kconfig b/arch/arm/src/armv8-m/Kconfig index 8627da1aed2..51b968a7a21 100644 --- a/arch/arm/src/armv8-m/Kconfig +++ b/arch/arm/src/armv8-m/Kconfig @@ -62,7 +62,7 @@ config ARMV8M_USEBASEPRI WARNING: If CONFIG_ARCH_HIPRI_INTERRUPT is selected, then you MUST select CONFIG_ARMV8M_USEBASEPRI. The Kconfig dependencies here will permit to select an invalid configuration because it - cannot enforce that requirement. If you create this invalild + cannot enforce that requirement. If you create this invalid configuration, you will encounter some problems that may be very difficult to debug. diff --git a/arch/arm/src/armv8-m/Toolchain.defs b/arch/arm/src/armv8-m/Toolchain.defs index da50b153fbe..93cdd2f3c07 100644 --- a/arch/arm/src/armv8-m/Toolchain.defs +++ b/arch/arm/src/armv8-m/Toolchain.defs @@ -78,11 +78,9 @@ endif # Parametrization for ARCHCPUFLAGS ifeq ($(CONFIG_ARCH_CORTEXM23),y) TOOLCHAIN_MCPU := -mcpu=cortex-m23 - TOOLCHAIN_MARCH := -march=armv8-m.main TOOLCHAIN_MFLOAT := -mfloat-abi=soft else ifeq ($(CONFIG_ARCH_CORTEXM33),y) TOOLCHAIN_MCPU := -mcpu=cortex-m33 - TOOLCHAIN_MARCH := -march=armv8-m.main+dsp ifeq ($(CONFIG_ARCH_FPU),y) TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16 -mfloat-abi=hard else @@ -90,7 +88,6 @@ else ifeq ($(CONFIG_ARCH_CORTEXM33),y) endif else ifeq ($(CONFIG_ARCH_CORTEXM35P),y) TOOLCHAIN_MCPU := -mcpu=cortex-m35p - TOOLCHAIN_MARCH := -march=armv8-m.main+dsp ifeq ($(CONFIG_ARCH_FPU),y) TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16 -mfloat-abi=hard else @@ -138,7 +135,7 @@ endif CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/arm/src/armv8-m/arm_mpu.c b/arch/arm/src/armv8-m/arm_mpu.c index 9aa5c77d9da..29bb63df1e6 100644 --- a/arch/arm/src/armv8-m/arm_mpu.c +++ b/arch/arm/src/armv8-m/arm_mpu.c @@ -44,30 +44,6 @@ * Private Data ****************************************************************************/ -/* These sets represent the set of disabled memory sub-regions. A bit set - * corresponds to a disabled sub-region; the LS bit corresponds to the first - * region. - * - * The g_ms_regionmask array is indexed by the number of subregions at the - * end of the region: 0 means no sub-regions are available(0xff) and 8 means - * all subregions are available (0x00). - */ - -static const uint8_t g_ms_regionmask[9] = -{ - 0xff, 0xfe, 0xfc, 0xf8, 0xf0, 0xe0, 0xc0, 0x80, 0x00 -}; - -/* The g_ls_regionmask array is indexed by the number of subregions at the - * beginning of the region: 0 means no sub-regions need be disabled (0x00) - * and 8 means all subregions must be disabled (0xff). - */ - -static const uint8_t g_ls_regionmask[9] = -{ - 0x00, 0x01, 0x03, 0x07, 0x0f, 0x1f, 0x3f, 0x7f, 0xff -}; - /* The next available region number */ static uint8_t g_region; @@ -76,111 +52,6 @@ static uint8_t g_region; * Private Functions ****************************************************************************/ -/**************************************************************************** - * Name: mpu_subregion_ms - * - * Description: - * Given (1) the size of the memory to be mapped and (2) the log2 size - * of the mapping to use, determine the minimal sub-region set at the - * to be disabled at the higher end of the region. - * - * Assumption: - * l2size has the same properties as the return value from - * mpu_log2regionceil() - * - ****************************************************************************/ - -static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size) -{ - unsigned int nsrs; - uint32_t asize; - uint32_t mask; - - /* Examples with l2size = 12: - * - * Shifted Adjusted Number Sub-Region - * Size Mask Size Shift Sub-Regions Bitset - * 0x1000 0x01ff 0x1000 9 8 0x00 - * 0x0c00 0x01ff 0x0c00 9 6 0xc0 - * 0x0c40 0x01ff 0x0e00 9 7 0x80 - */ - - if (l2size < 32) - { - mask = ((1 << l2size) - 1) >> 3; /* Shifted mask */ - } - - /* The 4Gb region size is a special case */ - - else - { - /* NOTE: There is no way to represent a 4Gb region size in the 32-bit - * input. - */ - - mask = 0x1fffffff; /* Shifted mask */ - } - - asize = (size + mask) & ~mask; /* Adjusted size */ - nsrs = asize >> (l2size - 3); /* Number of subregions */ - return g_ms_regionmask[nsrs]; -} - -/**************************************************************************** - * Name: mpu_subregion_ls - * - * Description: - * Given (1) the offset to the beginning of data in the region and (2) the - * log2 size of the mapping to use, determine the minimal sub-region set - * to span that memory region sub-region set at the to be disabled at the - * lower end of the region - * - * Assumption: - * l2size has the same properties as the return value from - * mpu_log2regionceil() - * - ****************************************************************************/ - -static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size) -{ - unsigned int nsrs; - uint32_t aoffset; - uint32_t mask; - - /* Examples with l2size = 12: - * - * Shifted Adjusted Number Sub-Region - * Offset Mask Offset Shift Sub-Regions Bitset - * 0x0000 0x01ff 0x0000 9 8 0x00 - * 0x0400 0x01ff 0x0400 9 6 0x03 - * 0x02c0 0x01ff 0x0200 9 7 0x01 - */ - - if (l2size < 32) - { - mask = ((1 << l2size)-1) >> 3; /* Shifted mask */ - } - - /* The 4Gb region size is a special case */ - - else - { - /* NOTE: There is no way to represent a 4Gb region size in the 32-bit - * input. - */ - - mask = 0x1fffffff; /* Shifted mask */ - } - - aoffset = offset & ~mask; /* Adjusted offset */ - nsrs = aoffset >> (l2size - 3); /* Number of subregions */ - return g_ls_regionmask[nsrs]; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - /**************************************************************************** * Name: mpu_allocregion * @@ -201,106 +72,9 @@ unsigned int mpu_allocregion(void) } /**************************************************************************** - * Name: mpu_log2regionceil - * - * Description: - * Determine the smallest value of l2size (log base 2 size) such that the - * following is true: - * - * size <= (1 << l2size) - * + * Public Functions ****************************************************************************/ -uint8_t mpu_log2regionceil(size_t size) -{ - uint8_t l2size; - - /* The minimum permitted region size is 32 bytes (log2(32) = 5. */ - - for (l2size = 5; l2size < 32 && size > (1 << l2size); l2size++); - return l2size; -} - -/**************************************************************************** - * Name: mpu_log2regionfloor - * - * Description: - * Determine the largest value of l2size (log base 2 size) such that the - * following is true: - * - * size >= (1 << l2size) - * - ****************************************************************************/ - -uint8_t mpu_log2regionfloor(size_t size) -{ - uint8_t l2size = mpu_log2regionceil(size); - - if (l2size > 4 && size < (1 << l2size)) - { - l2size--; - } - - return l2size; -} - -/**************************************************************************** - * Name: mpu_subregion - * - * Description: - * Given the size of the (1) memory to be mapped and (2) the log2 size - * of the mapping to use, determine the minimal sub-region set to span - * that memory region. - * - * Assumption: - * l2size has the same properties as the return value from - * mpu_log2regionceil() - * - ****************************************************************************/ - -uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size) -{ - uint32_t mask; - size_t offset; - uint32_t ret; - - /* Eight subregions are supported. The representation is as an 8-bit - * value with the LS bit corresponding to subregion 0. A bit is set - * to disable the sub-region. - * - * l2size: Log2 of the actual region size is <= (1 << l2size); - */ - - DEBUGASSERT(l2size > 4 && size <= (1 << l2size)); - - /* For region sizes of 32, 64, and 128 bytes, the effect of setting - * one or more bits of the SRD field to 1 is UNPREDICTABLE. - */ - - if (l2size < 8) - { - return 0; - } - - /* Calculate the offset of the base address into the aligned region. */ - - mask = (1 << l2size) - 1; - offset = base & mask; - - /* Calculate the mask need to handle disabled subregions at the end of the - * region - */ - - ret = mpu_subregion_ms(size + offset, l2size); - - /* Then OR in the mask need to handle disabled subregions at the beginning - * of the region. - */ - - ret |= mpu_subregion_ls(offset, l2size); - return ret; -} - /**************************************************************************** * Name: mpu_control * @@ -313,6 +87,15 @@ void mpu_control(bool enable, bool hfnmiena, bool privdefena) { uint32_t regval = 0; + putreg32((MPU_MAIR_STRONGLY_ORDER << 0) | + (MPU_MAIR_DEVICE << 8) | + (MPU_MAIR_NONCACHEABLE << 16) | + (MPU_MAIR_WRITE_THROUGH << 24), + MPU_MAIR0); + + putreg32((MPU_MAIR_WRITE_BACK << 0), + MPU_MAIR1); + if (enable) { regval |= MPU_CTRL_ENABLE; /* Enable the MPU */ @@ -340,13 +123,10 @@ void mpu_control(bool enable, bool hfnmiena, bool privdefena) ****************************************************************************/ void mpu_configure_region(uintptr_t base, size_t size, - uint32_t flags) + uint32_t flags1, uint32_t flags2) { unsigned int region = mpu_allocregion(); - uint32_t regval; - uint8_t l2size; - uint8_t subregions; - uintptr_t alignedbase; + uintptr_t limit; /* Ensure the base address alignment * @@ -356,34 +136,15 @@ void mpu_configure_region(uintptr_t base, size_t size, * aligns with the size of the selected region." */ - alignedbase = base & MPU_RBAR_ADDR_MASK; - l2size = mpu_log2regionceil(size + base - alignedbase); - alignedbase &= ~((1 << l2size) - 1); - l2size = mpu_log2regionceil(size + base - alignedbase); - - DEBUGASSERT(alignedbase + (1 << l2size) >= base + size); - DEBUGASSERT(l2size == 5 || - alignedbase + (1 << (l2size - 1)) < base + size); - DEBUGASSERT((alignedbase & MPU_RBAR_ADDR_MASK) == alignedbase); - DEBUGASSERT((alignedbase & ((1 << l2size) - 1)) == 0); + limit = (base + size) & MPU_RLAR_LIMIT_MASK; + base &= MPU_RBAR_BASE_MASK; /* Select the region */ putreg32(region, MPU_RNR); - /* Select the region base address */ + /* Set the region base, limit and attribute */ - putreg32(alignedbase | region | MPU_RBAR_VALID, MPU_RBAR); - - /* Select the region size and the sub-region map */ - - subregions = mpu_subregion(base, size, l2size); - - /* The configure the region */ - - regval = MPU_RASR_ENABLE | /* Enable region */ - MPU_RASR_SIZE_LOG2((uint32_t)l2size) | /* Region size */ - ((uint32_t)subregions << MPU_RASR_SRD_SHIFT) | /* Sub-regions */ - flags; - putreg32(regval, MPU_RASR); + putreg32(base | flags1, MPU_RBAR); + putreg32(limit | flags2 | MPU_RLAR_ENABLE, MPU_RLAR); } diff --git a/arch/arm/src/armv8-m/arm_ramvec_initialize.c b/arch/arm/src/armv8-m/arm_ramvec_initialize.c index 1174f8462a4..9d00e9f13fc 100644 --- a/arch/arm/src/armv8-m/arm_ramvec_initialize.c +++ b/arch/arm/src/armv8-m/arm_ramvec_initialize.c @@ -94,12 +94,12 @@ * * REVISIT: Can this alignment requirement vary from core-to-core? Yes, it * depends on the number of vectors supported by the MCU. The safest thing - * to do is to put the vector table at the beginning of RAM in order toforce + * to do is to put the vector table at the beginning of RAM in order to force * the highest alignment possible. */ up_vector_t g_ram_vectors[ARMV8M_VECTAB_SIZE] - __attribute__ ((section (".ram_vectors"), aligned (RAMVEC_ALIGN))); + locate_data(".ram_vectors") aligned_data(RAMVEC_ALIGN); /**************************************************************************** * Public Functions diff --git a/arch/arm/src/armv8-m/arm_reprioritizertr.c b/arch/arm/src/armv8-m/arm_reprioritizertr.c index 13c3f0264e7..e7f0a2219e7 100644 --- a/arch/arm/src/armv8-m/arm_reprioritizertr.c +++ b/arch/arm/src/armv8-m/arm_reprioritizertr.c @@ -50,8 +50,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -111,7 +110,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/arm/src/armv8-m/arm_stackcheck.c b/arch/arm/src/armv8-m/arm_stackcheck.c index 00df6344337..0f18be17ace 100644 --- a/arch/arm/src/armv8-m/arm_stackcheck.c +++ b/arch/arm/src/armv8-m/arm_stackcheck.c @@ -55,12 +55,9 @@ * Private Functions ****************************************************************************/ -void __cyg_profile_func_enter(void *func, void *caller) - __attribute__((naked, no_instrument_function)); -void __cyg_profile_func_exit(void *func, void *caller) - __attribute__((naked, no_instrument_function)); -void __stack_overflow_trap(void) - __attribute__((naked, no_instrument_function)); +void __cyg_profile_func_enter(void *func, void *caller) naked_function; +void __cyg_profile_func_exit(void *func, void *caller) naked_function; +void __stack_overflow_trap(void) naked_function; /**************************************************************************** * Name: __stack_overflow_trap diff --git a/arch/arm/src/armv8-m/arm_testset.S b/arch/arm/src/armv8-m/arm_testset.S index 79ec82a4ca3..45e2c273f8a 100644 --- a/arch/arm/src/armv8-m/arm_testset.S +++ b/arch/arm/src/armv8-m/arm_testset.S @@ -62,14 +62,14 @@ * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ diff --git a/arch/arm/src/armv8-m/arm_vectors.c b/arch/arm/src/armv8-m/arm_vectors.c index a2fbb1d968d..4ca24420ee8 100644 --- a/arch/arm/src/armv8-m/arm_vectors.c +++ b/arch/arm/src/armv8-m/arm_vectors.c @@ -76,7 +76,7 @@ extern void exception_common(void); * Note that the [ ... ] designated initializer is a GCC extension. */ -unsigned _vectors[] __attribute__((section(".vectors"))) = +unsigned _vectors[] locate_data(".vectors") = { /* Initial stack */ diff --git a/arch/arm/src/armv8-m/dwt.h b/arch/arm/src/armv8-m/dwt.h index 7804eab5659..584e543a6c3 100644 --- a/arch/arm/src/armv8-m/dwt.h +++ b/arch/arm/src/armv8-m/dwt.h @@ -85,17 +85,50 @@ #define DWT_FOLDCNT (DWT_BASE + 0x0018) /* Folded-instruction Count Register */ #define DWT_PCSR (DWT_BASE + 0x001c) /* Program Counter Sample Register */ #define DWT_COMP0 (DWT_BASE + 0x0020) /* Comparator Register 0 */ -#define DWT_MASK0 (DWT_BASE + 0x0024) /* Mask Register 0 */ #define DWT_FUNCTION0 (DWT_BASE + 0x0028) /* Function Register 0 */ +#define DWT_MASK0 (DWT_BASE + 0x002c) /* Mask Register 0 */ #define DWT_COMP1 (DWT_BASE + 0x0030) /* Comparator Register 1 */ -#define DWT_MASK1 (DWT_BASE + 0x0034) /* Mask Register 1 */ #define DWT_FUNCTION1 (DWT_BASE + 0x0038) /* Function Register 1 */ +#define DWT_MASK1 (DWT_BASE + 0x003c) /* Mask Register 1 */ #define DWT_COMP2 (DWT_BASE + 0x0040) /* Comparator Register 2 */ -#define DWT_MASK2 (DWT_BASE + 0x0044) /* Mask Register 2 */ #define DWT_FUNCTION2 (DWT_BASE + 0x0048) /* Function Register 2 */ +#define DWT_MASK2 (DWT_BASE + 0x004c) /* Mask Register 2 */ #define DWT_COMP3 (DWT_BASE + 0x0050) /* Comparator Register 3 */ -#define DWT_MASK3 (DWT_BASE + 0x0054) /* Mask Register 3 */ #define DWT_FUNCTION3 (DWT_BASE + 0x0058) /* Function Register 3 */ +#define DWT_MASK3 (DWT_BASE + 0x005c) /* Mask Register 3 */ +#define DWT_COMP4 (DWT_BASE + 0x0060) /* Comparator Register 4 */ +#define DWT_FUNCTION4 (DWT_BASE + 0x0068) /* Function Register 4 */ +#define DWT_MASK4 (DWT_BASE + 0x006c) /* Mask Register 4 */ +#define DWT_COMP5 (DWT_BASE + 0x0070) /* Comparator Register 5 */ +#define DWT_FUNCTION5 (DWT_BASE + 0x0078) /* Function Register 5 */ +#define DWT_MASK5 (DWT_BASE + 0x007c) /* Mask Register 5 */ +#define DWT_COMP6 (DWT_BASE + 0x0080) /* Comparator Register 6 */ +#define DWT_FUNCTION6 (DWT_BASE + 0x0088) /* Function Register 6 */ +#define DWT_MASK6 (DWT_BASE + 0x008c) /* Mask Register 6 */ +#define DWT_COMP7 (DWT_BASE + 0x0090) /* Comparator Register 7 */ +#define DWT_FUNCTION7 (DWT_BASE + 0x0098) /* Function Register 7 */ +#define DWT_MASK7 (DWT_BASE + 0x009c) /* Mask Register 7 */ +#define DWT_COMP8 (DWT_BASE + 0x00a0) /* Comparator Register 8 */ +#define DWT_FUNCTION8 (DWT_BASE + 0x00a8) /* Function Register 8 */ +#define DWT_MASK8 (DWT_BASE + 0x00ac) /* Mask Register 8 */ +#define DWT_COMP9 (DWT_BASE + 0x00b0) /* Comparator Register 9 */ +#define DWT_FUNCTION9 (DWT_BASE + 0x00b8) /* Function Register 9 */ +#define DWT_MASK9 (DWT_BASE + 0x00bc) /* Mask Register 9 */ +#define DWT_COMP10 (DWT_BASE + 0x00c0) /* Comparator Register 10 */ +#define DWT_FUNCTION10 (DWT_BASE + 0x00c8) /* Function Register 10 */ +#define DWT_MASK10 (DWT_BASE + 0x00cc) /* Mask Register 10 */ +#define DWT_COMP11 (DWT_BASE + 0x00d0) /* Comparator Register 11 */ +#define DWT_FUNCTION11 (DWT_BASE + 0x00d8) /* Function Register 11 */ +#define DWT_MASK11 (DWT_BASE + 0x00dc) /* Mask Register 11 */ +#define DWT_COMP12 (DWT_BASE + 0x00e0) /* Comparator Register 12 */ +#define DWT_FUNCTION12 (DWT_BASE + 0x00e8) /* Function Register 12 */ +#define DWT_MASK12 (DWT_BASE + 0x00ec) /* Mask Register 12 */ +#define DWT_COMP13 (DWT_BASE + 0x00f0) /* Comparator Register 13 */ +#define DWT_FUNCTION13 (DWT_BASE + 0x00f8) /* Function Register 13 */ +#define DWT_MASK13 (DWT_BASE + 0x00fc) /* Mask Register 13 */ +#define DWT_COMP14 (DWT_BASE + 0x0100) /* Comparator Register 14 */ +#define DWT_FUNCTION14 (DWT_BASE + 0x0108) /* Function Register 14 */ +#define DWT_MASK14 (DWT_BASE + 0x010c) /* Mask Register 14 */ /* DWT Register Bit Field Definitions ***************************************/ @@ -111,6 +144,8 @@ #define DWT_CTRL_NOCYCCNT_MASK (0x1ul << DWT_CTRL_NOCYCCNT_SHIFT) #define DWT_CTRL_NOPRFCNT_SHIFT 24 #define DWT_CTRL_NOPRFCNT_MASK (0x1ul << DWT_CTRL_NOPRFCNT_SHIFT) +#define DWT_CTRL_CYCDISS_SHIFT 23 +#define DWT_CTRL_CYCDISS_MASK (0x1ul << DWT_CTRL_CYCDISS_SHIFT) #define DWT_CTRL_CYCEVTENA_SHIFT 22 #define DWT_CTRL_CYCEVTENA_MASK (0x1ul << DWT_CTRL_CYCEVTENA_SHIFT) #define DWT_CTRL_FOLDEVTENA_SHIFT 21 diff --git a/arch/arm/src/armv8-m/exc_return.h b/arch/arm/src/armv8-m/exc_return.h index 61f8a48d85e..9bb3976c865 100644 --- a/arch/arm/src/armv8-m/exc_return.h +++ b/arch/arm/src/armv8-m/exc_return.h @@ -90,11 +90,11 @@ /* EXC_RETURN_BASE: Bits that are always set in an EXC_RETURN value. */ -#if !defined(CONFIG_ARCH_TRUSTZONE_NONSECURE) +#ifdef CONFIG_ARCH_TRUSTZONE_NONSECURE +#define EXC_RETURN_BASE (0xffffff80) +#else #define EXC_RETURN_BASE (0xffffff80 | EXC_RETURN_EXC_SECURE | \ EXC_RETURN_SECURE_STACK) -#else -#define EXC_RETURN_BASE (0xffffff80) #endif /* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state @@ -129,6 +129,30 @@ EXC_RETURN_DEF_STACKING) #endif +#if defined(CONFIG_ARCH_FPU) +#define EXC_INTEGRITY_SIGNATURE (0xfefa125a) +#else +#define EXC_INTEGRITY_SIGNATURE (0xfefa125b) +#endif + +/* FUNC_RETURN_EXC_SECURE: Exception Secure. The security domain the + * function was taken to. If this bit is clear non-secure, else secure. + */ + +#define FUNC_RETURN_EXC_SECURE (1 << 0) + +/* FUNC_RETURN_BASE: Bits that are always set in a FUNC_RETURN value. */ + +#define FUNC_RETURN_BASE (0xfefffffe) + +/* FUNC_RETURN_SECURE: Return to the secure state. */ + +#define FUNC_RETURN_SECURE (FUNC_RETURN_BASE | FUNC_RETURN_EXC_SECURE) + +/* FUNC_RETURN_NONSECURE: Return to the non-secure state. */ + +#define FUNC_RETURN_NONSECURE (FUNC_RETURN_BASE) + /**************************************************************************** * Inline Functions ****************************************************************************/ diff --git a/arch/arm/src/armv8-m/fpb.h b/arch/arm/src/armv8-m/fpb.h index 6a01bb4f849..7caa1fcb6e6 100644 --- a/arch/arm/src/armv8-m/fpb.h +++ b/arch/arm/src/armv8-m/fpb.h @@ -29,7 +29,7 @@ /* FPB Register Base Address ************************************************/ -#define FPB_BASE 0xe0002000 +#define FPB_BASE 0xe0002000 /* FPB Register Offsets *****************************************************/ @@ -70,7 +70,7 @@ */ #define FPB_CTRL_NUM_CODE2_SHIFT 12 -#define FPB_CTRL_NUM_CODE2_MASK 0x00003000 +#define FPB_CTRL_NUM_CODE2_MASK 0x00007000 /* NUM_LIT * @@ -127,6 +127,15 @@ #define FPB_REMAP_REMAP_SHIFT 5 #define FPB_REMAP_REMAP_MASK 0x1fffffe0 +/* REMAP + * + * Remap supported field. + */ + +#define FPB_REMAP_RMPSPT_SHIFT 29 +#define FPB_REMAP_RMPSPT_MASK 0x20000000 +# define FPB_REMAP_RMPSPT 0x20000000 + /* FPB_COMP0 - FPB_COMP7 */ /* REPLACE diff --git a/arch/arm/src/armv8-m/mpu.h b/arch/arm/src/armv8-m/mpu.h index e5bda5f5fae..4e793dedce0 100644 --- a/arch/arm/src/armv8-m/mpu.h +++ b/arch/arm/src/armv8-m/mpu.h @@ -41,20 +41,48 @@ * Pre-processor Definitions ****************************************************************************/ +/* MPU Register Bases */ + +#define MPU_BASE 0xe000ed90 +#define MPU_BASE_NS 0xe002ed90 + +/* MPU Register Offsets */ + +#define MPU_TYPE_OFFSET 0x0000 /* MPU Type Register */ +#define MPU_CTRL_OFFSET 0x0004 /* MPU Control Register */ +#define MPU_RNR_OFFSET 0x0008 /* MPU Region Number Register */ +#define MPU_RBAR_OFFSET 0x000c /* MPU Region Base Address Register */ +#define MPU_RLAR_OFFSET 0x0010 /* MPU Region Limit Address Register */ + +#define MPU_RBAR_A1_OFFSET 0x0014 /* MPU alias registers */ +#define MPU_RLAR_A1_OFFSET 0x0018 +#define MPU_RBAR_A2_OFFSET 0x001c +#define MPU_RLAR_A2_OFFSET 0x0020 +#define MPU_RBAR_A3_OFFSET 0x0024 +#define MPU_RLAR_A3_OFFSET 0x0028 + +#define MPU_MAIR_OFFSET(n) (0x0040 + 4 * ((n) >> 2)) +#define MPU_MAIR0_OFFSET 0x0040 /* MPU Memory Attribute Indirection Register 0 */ +#define MPU_MAIR1_OFFSET 0x0044 /* MPU Memory Attribute Indirection Register 1 */ + /* MPU Register Addresses */ -#define MPU_TYPE 0xe000ed90 /* MPU Type Register */ -#define MPU_CTRL 0xe000ed94 /* MPU Control Register */ -#define MPU_RNR 0xe000ed98 /* MPU Region Number Register */ -#define MPU_RBAR 0xe000ed9c /* MPU Region Base Address Register */ -#define MPU_RASR 0xe000eda0 /* MPU Region Attribute and Size Register */ +#define MPU_TYPE (MPU_BASE + MPU_TYPE_OFFSET) +#define MPU_CTRL (MPU_BASE + MPU_CTRL_OFFSET) +#define MPU_RNR (MPU_BASE + MPU_RNR_OFFSET) +#define MPU_RBAR (MPU_BASE + MPU_RBAR_OFFSET) +#define MPU_RLAR (MPU_BASE + MPU_RLAR_OFFSET) -#define MPU_RBAR_A1 0xe000eda4 /* MPU alias registers */ -#define MPU_RASR_A1 0xe000eda8 -#define MPU_RBAR_A2 0xe000edac -#define MPU_RASR_A2 0xe000edb0 -#define MPU_RBAR_A3 0xe000edb4 -#define MPU_RASR_A3 0xe000edb8 +#define MPU_RBAR_A1 (MPU_BASE + MPU_RBAR_A1_OFFSET) +#define MPU_RLAR_A1 (MPU_BASE + MPU_RLAR_A1_OFFSET) +#define MPU_RBAR_A2 (MPU_BASE + MPU_RBAR_A2_OFFSET) +#define MPU_RLAR_A2 (MPU_BASE + MPU_RLAR_A2_OFFSET) +#define MPU_RBAR_A3 (MPU_BASE + MPU_RBAR_A3_OFFSET) +#define MPU_RLAR_A3 (MPU_BASE + MPU_RLAR_A3_OFFSET) + +#define MPU_MAIR(n) (MPU_BASE + MPU_MAIR_OFFSET(n)) +#define MPU_MAIR0 (MPU_BASE + MPU_MAIR0_OFFSET) +#define MPU_MAIR1 (MPU_BASE + MPU_MAIR1_OFFSET) /* MPU Type Register Bit Definitions */ @@ -86,51 +114,62 @@ /* MPU Region Base Address Register Bit Definitions */ -#define MPU_RBAR_REGION_SHIFT (0) /* Bits 0-3: MPU region */ -#define MPU_RBAR_REGION_MASK (15 << MPU_RBAR_REGION_SHIFT) -#define MPU_RBAR_VALID (1 << 4) /* Bit 4: MPU Region Number valid */ -#define MPU_RBAR_ADDR_MASK 0xffffffe0 /* Bits N-31: Region base addrese */ +#define MPU_RBAR_XN (1 << 0) /* Bit 0: Execute never */ +#define MPU_RBAR_AP_SHIFT (1) /* Bits 1-2: Access permission */ +#define MPU_RBAR_AP_MASK (3 << MPU_RBAR_AP_SHIFT) +# define MPU_RBAR_AP_RWNO (0 << MPU_RBAR_AP_SHIFT) /* P:RW U:None */ +# define MPU_RBAR_AP_RWRW (1 << MPU_RBAR_AP_SHIFT) /* P:RW U:RW */ +# define MPU_RBAR_AP_RONO (2 << MPU_RBAR_AP_SHIFT) /* P:RO U:None */ +# define MPU_RBAR_AP_RORO (3 << MPU_RBAR_AP_SHIFT) /* P:RO U:RO */ +#define MPU_RBAR_SH_SHIFT (3) /* Bits 3-4: Shareability */ +#define MPU_RBAR_SH_MASK (3 << MPU_RBAR_SH_SHIFT) +# define MPU_RBAR_SH_NO (0 << MPU_RBAR_SH_SHIFT) /* Non-shareable */ +# define MPU_RBAR_SH_OUTER (2 << MPU_RBAR_SH_SHIFT) /* Outer shareable */ +# define MPU_RBAR_SH_INNER (3 << MPU_RBAR_SH_SHIFT) /* Inner shareable */ +#define MPU_RBAR_BASE_MASK 0xffffffe0 /* Bits 5-31: Region base addrese */ -/* MPU Region Attributes and Size Register Bit Definitions */ +/* MPU Region Region Limit Address Register Bit Definitions */ -#define MPU_RASR_ENABLE (1 << 0) /* Bit 0: Region enable */ -#define MPU_RASR_SIZE_SHIFT (1) /* Bits 1-5: Size of the MPU protection region */ -#define MPU_RASR_SIZE_MASK (31 << MPU_RASR_SIZE_SHIFT) -# define MPU_RASR_SIZE_LOG2(n) ((n-1) << MPU_RASR_SIZE_SHIFT) -#define MPU_RASR_SRD_SHIFT (8) /* Bits 8-15: Subregion disable */ -#define MPU_RASR_SRD_MASK (0xff << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_0 (0x01 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_1 (0x02 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_2 (0x04 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_3 (0x08 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_4 (0x10 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_5 (0x20 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_6 (0x40 << MPU_RASR_SRD_SHIFT) -# define MPU_RASR_SRD_7 (0x80 << MPU_RASR_SRD_SHIFT) -#define MPU_RASR_ATTR_SHIFT (16) /* Bits 16-31: MPU Region Attribute field */ -#define MPU_RASR_ATTR_MASK (0xffff << MPU_RASR_ATTR_SHIFT) -# define MPU_RASR_B (1 << 16) /* Bit 16: Bufferable */ -# define MPU_RASR_C (1 << 17) /* Bit 17: Cacheable */ -# define MPU_RASR_S (1 << 18) /* Bit 18: Shareable */ -# define MPU_RASR_TEX_SHIFT (19) /* Bits 19-21: TEX Address Permission */ -# define MPU_RASR_TEX_MASK (7 << MPU_RASR_TEX_SHIFT) -# define MPU_RASR_TEX_SO (0 << MPU_RASR_TEX_SHIFT) /* Strongly Ordered */ -# define MPU_RASR_TEX_NOR (1 << MPU_RASR_TEX_SHIFT) /* Normal */ -# define MPU_RASR_TEX_DEV (2 << MPU_RASR_TEX_SHIFT) /* Device */ -# define MPU_RASR_TEX_BB(bb) ((4|(bb)) << MPU_RASR_TEX_SHIFT) -# define MPU_RASR_CP_NC (0) /* Non-cacheable */ -# define MPU_RASR_CP_WBRA (1) /* Write back, write and Read- Allocate */ -# define MPU_RASR_CP_WT (2) /* Write through, no Write-Allocate */ -# define MPU_RASR_CP_WB (4) /* Write back, no Write-Allocate */ -# define MPU_RASR_AP_SHIFT (24) /* Bits 24-26: Access permission */ -# define MPU_RASR_AP_MASK (7 << MPU_RASR_AP_SHIFT) -# define MPU_RASR_AP_NONO (0 << MPU_RASR_AP_SHIFT) /* P:None U:None */ -# define MPU_RASR_AP_RWNO (1 << MPU_RASR_AP_SHIFT) /* P:RW U:None */ -# define MPU_RASR_AP_RWRO (2 << MPU_RASR_AP_SHIFT) /* P:RW U:RO */ -# define MPU_RASR_AP_RWRW (3 << MPU_RASR_AP_SHIFT) /* P:RW U:RW */ -# define MPU_RASR_AP_RONO (5 << MPU_RASR_AP_SHIFT) /* P:RO U:None */ -# define MPU_RASR_AP_RORO (6 << MPU_RASR_AP_SHIFT) /* P:RO U:RO */ -# define MPU_RASR_XN (1 << 28) /* Bit 28: Instruction access disable */ +#define MPU_RLAR_ENABLE (1 << 0) /* Bit 0: Region enable */ +#define MPU_RLAR_INDX_SHIFT (1) /* Bits 1-3: Attribute index */ +#define MPU_RLAR_INDX_MASK (7 << MPU_RLAR_INDX_SHIFT) +#define MPU_RLAR_STRONGLY_ORDER (0 << MPU_RLAR_INDX_SHIFT) +#define MPU_RLAR_DEVICE (1 << MPU_RLAR_INDX_SHIFT) +#define MPU_RLAR_NONCACHEABLE (2 << MPU_RLAR_INDX_SHIFT) +#define MPU_RLAR_WRITE_THROUGH (3 << MPU_RLAR_INDX_SHIFT) +#define MPU_RLAR_WRITE_BACK (4 << MPU_RLAR_INDX_SHIFT) +#define MPU_RLAR_PXN (1 << 4) /* Bit 4: Privileged execute never */ +#define MPU_RLAR_LIMIT_MASK 0xffffffe0 /* Bits 5-31: Region limit address */ + +/* MPU Memory Attribute Indirection Register Bit Definitions */ + +#define MPU_MAIR_INNER_WA (1 << 0) /* Bit 0: Inner write allocation */ +#define MPU_MAIR_INNER_RA (1 << 1) /* Bit 1: Inner read allocation */ +#define MPU_MAIR_INNER_WB (1 << 2) /* Bit 2: Inner write back */ +#define MPU_MAIR_INNER_NT (1 << 3) /* Bit 3: Inner non-transient */ +#define MPU_MAIR_INNER_NC (4 << 0) /* Bit 0-3: Inner non-cacheable */ +#define MPU_MAIR_INNER_NGNRNE (0 << 2) /* Bit 2-3: Inner nGnRnE */ +#define MPU_MAIR_INNER_NGNRE (1 << 2) /* Bit 2-3: Inner nGnRE */ +#define MPU_MAIR_INNER_NGRE (2 << 2) /* Bit 2-3: Inner nGRE */ +#define MPU_MAIR_INNER_GRE (3 << 2) /* Bit 2-3: Inner GRE */ + +#define MPU_MAIR_OUTER_WA (1 << 4) /* Bit 4: Outer write allocation */ +#define MPU_MAIR_OUTER_RA (1 << 5) /* Bit 5: Outer read allocation */ +#define MPU_MAIR_OUTER_WB (1 << 6) /* Bit 6: Outer write back */ +#define MPU_MAIR_OUTER_NT (1 << 7) /* Bit 7: Outer non-transient */ +#define MPU_MAIR_OUTER_DEVICE (0 << 4) /* Bit 4-7: Outer device */ +#define MPU_MAIR_OUTER_NC (4 << 4) /* Bit 4-7: Outer non-cacheable */ + +#define MPU_MAIR_STRONGLY_ORDER (MPU_MAIR_OUTER_DEVICE | MPU_MAIR_INNER_NGNRNE) +#define MPU_MAIR_DEVICE (MPU_MAIR_OUTER_DEVICE | MPU_MAIR_INNER_NGNRE) +#define MPU_MAIR_NONCACHEABLE (MPU_MAIR_OUTER_NC | MPU_MAIR_INNER_NC) +#define MPU_MAIR_WRITE_THROUGH (MPU_MAIR_OUTER_NT | MPU_MAIR_OUTER_RA | \ + MPU_MAIR_OUTER_WA | MPU_MAIR_INNER_NT | \ + MPU_MAIR_INNER_RA | MPU_MAIR_INNER_WA) +#define MPU_MAIR_WRITE_BACK (MPU_MAIR_OUTER_NT | MPU_MAIR_OUTER_WB | \ + MPU_MAIR_OUTER_RA | MPU_MAIR_OUTER_WA | \ + MPU_MAIR_INNER_NT | MPU_MAIR_INNER_WB | \ + MPU_MAIR_INNER_RA | MPU_MAIR_INNER_WA) #ifdef CONFIG_ARM_MPU @@ -148,58 +187,6 @@ extern "C" #define EXTERN extern #endif -/**************************************************************************** - * Name: mpu_allocregion - * - * Description: - * Allocate the next region - * - ****************************************************************************/ - -unsigned int mpu_allocregion(void); - -/**************************************************************************** - * Name: mpu_log2regionceil - * - * Description: - * Determine the smallest value of l2size (log base 2 size) such that the - * following is true: - * - * size <= (1 << l2size) - * - ****************************************************************************/ - -uint8_t mpu_log2regionceil(size_t size); - -/**************************************************************************** - * Name: mpu_log2regionfloor - * - * Description: - * Determine the largest value of l2size (log base 2 size) such that the - * following is true: - * - * size >= (1 << l2size) - * - ****************************************************************************/ - -uint8_t mpu_log2regionfloor(size_t size); - -/**************************************************************************** - * Name: mpu_subregion - * - * Description: - * Given (1) the offset to the beginning of valid data, (2) the size of the - * memory to be mapped and (2) the log2 size of the mapping to use, - * determine the minimal sub-region set to span that memory region. - * - * Assumption: - * l2size has the same properties as the return value from - * mpu_log2regionceil() - * - ****************************************************************************/ - -uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size); - /**************************************************************************** * Name: mpu_control * @@ -219,7 +206,7 @@ void mpu_control(bool enable, bool hfnmiena, bool privdefena); ****************************************************************************/ void mpu_configure_region(uintptr_t base, size_t size, - uint32_t flags); + uint32_t flags1, uint32_t flags2); /**************************************************************************** * Inline Functions @@ -260,12 +247,9 @@ void mpu_configure_region(uintptr_t base, size_t size, { \ /* The configure the region */ \ mpu_configure_region(base, size, \ - MPU_RASR_TEX_SO | /* Ordered */ \ - /* Not Cacheable */ \ - /* Not Bufferable */ \ - MPU_RASR_S | /* Shareable */ \ - MPU_RASR_AP_RWNO /* P:RW U:None */ \ - /* Instruction access */); \ + MPU_RBAR_AP_RWNO, \ + MPU_RLAR_STRONGLY_ORDER | \ + MPU_RLAR_PXN); \ } while (0) /**************************************************************************** @@ -281,12 +265,8 @@ void mpu_configure_region(uintptr_t base, size_t size, { \ /* The configure the region */ \ mpu_configure_region(base, size, \ - MPU_RASR_TEX_SO | /* Ordered */ \ - MPU_RASR_C | /* Cacheable */ \ - /* Not Bufferable */ \ - /* Not Shareable */ \ - MPU_RASR_AP_RORO /* P:RO U:RO */ \ - /* Instruction access */); \ + MPU_RBAR_AP_RORO, \ + MPU_RLAR_WRITE_BACK); \ } while (0) /**************************************************************************** @@ -302,12 +282,8 @@ void mpu_configure_region(uintptr_t base, size_t size, { \ /* The configure the region */ \ mpu_configure_region(base, size, \ - MPU_RASR_TEX_SO | /* Ordered */ \ - MPU_RASR_C | /* Cacheable */ \ - /* Not Bufferable */ \ - /* Not Shareable */ \ - MPU_RASR_AP_RONO /* P:RO U:None */ \ - /* Instruction access */); \ + MPU_RBAR_AP_RONO, \ + MPU_RLAR_WRITE_BACK); \ } while (0) /**************************************************************************** @@ -323,12 +299,10 @@ void mpu_configure_region(uintptr_t base, size_t size, { \ /* The configure the region */ \ mpu_configure_region(base, size, \ - MPU_RASR_TEX_SO | /* Ordered */ \ - MPU_RASR_C | /* Cacheable */ \ - /* Not Bufferable */ \ - MPU_RASR_S | /* Shareable */ \ - MPU_RASR_AP_RWRW /* P:RW U:RW */ \ - /* Instruction access */); \ + MPU_RBAR_XN | \ + MPU_RBAR_AP_RWRW, \ + MPU_RLAR_NONCACHEABLE | \ + MPU_RLAR_PXN); \ } while (0) /**************************************************************************** @@ -343,13 +317,10 @@ void mpu_configure_region(uintptr_t base, size_t size, do \ { \ /* The configure the region */ \ - mpu_configure_region(base, size,\ - MPU_RASR_TEX_SO | /* Ordered */ \ - MPU_RASR_C | /* Cacheable */ \ - /* Not Bufferable */ \ - MPU_RASR_S | /* Shareable */ \ - MPU_RASR_AP_RWNO /* P:RW U:None */ \ - /* Instruction access */); \ + mpu_configure_region(base, size, \ + MPU_RBAR_AP_RWNO, \ + MPU_RLAR_NONCACHEABLE | \ + MPU_RLAR_PXN); \ } while (0) /**************************************************************************** @@ -365,12 +336,11 @@ void mpu_configure_region(uintptr_t base, size_t size, { \ /* The configure the region */ \ mpu_configure_region(base, size, \ - MPU_RASR_TEX_SO | /* Ordered */ \ - MPU_RASR_C | /* Cacheable */ \ - MPU_RASR_B | /* Bufferable */ \ - MPU_RASR_S | /* Shareable */ \ - MPU_RASR_AP_RWRW /* P:RW U:RW */ \ - /* Instruction access */); \ + MPU_RBAR_XN | \ + MPU_RBAR_AP_RWRW | \ + MPU_RBAR_SH_OUTER, \ + MPU_RLAR_WRITE_BACK | \ + MPU_RLAR_PXN); \ } while (0) /**************************************************************************** @@ -386,12 +356,10 @@ void mpu_configure_region(uintptr_t base, size_t size, { \ /* The configure the region */ \ mpu_configure_region(base, size, \ - MPU_RASR_TEX_SO | /* Ordered */ \ - MPU_RASR_C | /* Cacheable */ \ - MPU_RASR_B | /* Bufferable */ \ - MPU_RASR_S | /* Shareable */ \ - MPU_RASR_AP_RWNO /* P:RW U:None */ \ - /* Instruction access */); \ + MPU_RBAR_AP_RWNO | \ + MPU_RBAR_SH_OUTER, \ + MPU_RLAR_WRITE_BACK | \ + MPU_RLAR_PXN); \ } while (0) /**************************************************************************** @@ -407,12 +375,9 @@ void mpu_configure_region(uintptr_t base, size_t size, { \ /* Then configure the region */ \ mpu_configure_region(base, size, \ - MPU_RASR_TEX_DEV | /* Device */ \ - /* Not Cacheable */ \ - MPU_RASR_B | /* Bufferable */ \ - MPU_RASR_S | /* Shareable */ \ - MPU_RASR_AP_RWNO | /* P:RW U:None */ \ - MPU_RASR_XN /* No Instruction access */); \ + MPU_RBAR_AP_RWNO, \ + MPU_RLAR_DEVICE | \ + MPU_RLAR_PXN); \ } while (0) /**************************************************************************** @@ -428,12 +393,10 @@ void mpu_configure_region(uintptr_t base, size_t size, { \ /* Then configure the region */ \ mpu_configure_region(base, size, \ - MPU_RASR_TEX_DEV | /* Device */ \ - /* Not Cacheable */ \ - MPU_RASR_B | /* Bufferable */ \ - MPU_RASR_S | /* Shareable */ \ - MPU_RASR_AP_RWRW | /* P:RW U:RW */ \ - MPU_RASR_XN /* No Instruction access */); \ + MPU_RBAR_XN | \ + MPU_RBAR_AP_RWRW, \ + MPU_RLAR_DEVICE | \ + MPU_RLAR_PXN); \ } while (0) #undef EXTERN diff --git a/arch/arm/src/armv8-m/nvic.h b/arch/arm/src/armv8-m/nvic.h index bd8109a91bc..1b37241ce16 100644 --- a/arch/arm/src/armv8-m/nvic.h +++ b/arch/arm/src/armv8-m/nvic.h @@ -43,7 +43,8 @@ #define NVIC_IRQ_MEMFAULT (4) /* Vector 4: Memory management (MPU) */ #define NVIC_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */ #define NVIC_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */ - /* Vectors 7-10: Reserved */ +#define NVIC_IRQ_SECUREFAULT (7) /* Vector 7: Secure fault */ + /* Vectors 8-10: Reserved */ #define NVIC_IRQ_SVCALL (11) /* Vector 11: SVC call */ #define NVIC_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */ /* Vector 13: Reserved */ @@ -59,10 +60,14 @@ /* NVIC base address ********************************************************/ #define ARMV8M_NVIC_BASE 0xe000e000 +#define ARMV8M_NVIC_BASE_NS 0xe002e000 /* NVIC register offsets ****************************************************/ #define NVIC_ICTR_OFFSET 0x0004 /* Interrupt controller type register */ +#define NVIC_ACTLR_OFFSET 0x0008 /* Auxiliary Control Register */ +#define NVIC_CPPWR_OFFSET 0x000c /* Coprocessor Power Control Register */ + #define NVIC_SYSTICK_CTRL_OFFSET 0x0010 /* SysTick control and status register */ #define NVIC_SYSTICK_RELOAD_OFFSET 0x0014 /* SysTick reload value register */ #define NVIC_SYSTICK_CURRENT_OFFSET 0x0018 /* SysTick current value register */ @@ -192,6 +197,7 @@ /* System Control Block (SCB) */ +#define NVIC_REVIDR_OFFSET 0x0cfc /* Revision ID Register */ #define NVIC_CPUID_BASE_OFFSET 0x0d00 /* CPUID base register */ #define NVIC_INTCTRL_OFFSET 0x0d04 /* Interrupt control state register */ #define NVIC_VECTAB_OFFSET 0x0d08 /* Vector table offset register */ @@ -222,38 +228,61 @@ #define NVIC_ISAR2_OFFSET 0x0d68 /* ISA feature register 2 */ #define NVIC_ISAR3_OFFSET 0x0d6c /* ISA feature register 3 */ #define NVIC_ISAR4_OFFSET 0x0d70 /* ISA feature register 4 */ -#define NVIC_CLIDR_OFFSET 0x0d78 /* Cache Level ID register (Cortex-M7) */ -#define NVIC_CTR_OFFSET 0x0d7c /* Cache Type register (Cortex-M7) */ -#define NVIC_CCSIDR_OFFSET 0x0d80 /* Cache Size ID Register (Cortex-M7) */ -#define NVIC_CSSELR_OFFSET 0x0d84 /* Cache Size Selection Register (Cortex-M7) */ +#define NVIC_ISAR5_OFFSET 0x0d74 /* ISA feature register 5 */ +#define NVIC_CLIDR_OFFSET 0x0d78 /* Cache Level ID register */ +#define NVIC_CTR_OFFSET 0x0d7c /* Cache Type register */ +#define NVIC_CCSIDR_OFFSET 0x0d80 /* Cache Size ID Register */ +#define NVIC_CSSELR_OFFSET 0x0d84 /* Cache Size Selection Register */ #define NVIC_CPACR_OFFSET 0x0d88 /* Coprocessor Access Control Register */ +#define NVIC_NSACR_OFFSET 0x0d8c /* Non-secure Access Control Register */ + +/* Debug Control Block */ + #define NVIC_DHCSR_OFFSET 0x0df0 /* Debug Halting Control and Status Register */ #define NVIC_DCRSR_OFFSET 0x0df4 /* Debug Core Register Selector Register */ #define NVIC_DCRDR_OFFSET 0x0df8 /* Debug Core Register Data Register */ #define NVIC_DEMCR_OFFSET 0x0dfc /* Debug Exception and Monitor Control Register */ +#define NVIC_DSCEMCR_OFFSET 0x0e00 /* Debug Set Clear Exception and Monitor Control Register */ +#define NVIC_DAUTHCTRL_OFFSET 0x0e04 /* Debug Authentication Control Register */ +#define NVIC_DSCSR_OFFSET 0x0e08 /* Debug Security Control and Status Register */ + +/* Software Interrupt Generation */ + #define NVIC_STIR_OFFSET 0x0f00 /* Software trigger interrupt register */ + +/* Reliability, Availability and Serviceability Extension */ + +#define NVIC_RFSR_OFFSET 0x0f04 /* RAS Fault Status Register */ + +/* Floating-Point Extension */ + #define NVIC_FPCCR_OFFSET 0x0f34 /* Floating-point Context Control Register */ #define NVIC_FPCAR_OFFSET 0x0f38 /* Floating-point Context Address Register */ #define NVIC_FPDSCR_OFFSET 0x0f3c /* Floating-point Default Status Control Register */ #define NVIC_MVFR0_OFFSET 0x0f40 /* Media and VFP Feature Register 0 */ #define NVIC_MVFR1_OFFSET 0x0f44 /* Media and VFP Feature Register 1 */ #define NVIC_MVFR2_OFFSET 0x0f48 /* Media and VFP Feature Register 2 */ -#define NVIC_ICIALLU_OFFSET 0x0f50 /* I-Cache Invalidate All to PoU (Cortex-M7) */ -#define NVIC_ICIMVAU_OFFSET 0x0f58 /* I-Cache Invalidate by MVA to PoU (Cortex-M7) */ -#define NVIC_DCIMVAC_OFFSET 0x0f5c /* D-Cache Invalidate by MVA to PoC (Cortex-M7) */ -#define NVIC_DCISW_OFFSET 0x0f60 /* D-Cache Invalidate by Set-way (Cortex-M7) */ -#define NVIC_DCCMVAU_OFFSET 0x0f64 /* D-Cache Clean by MVA to PoU (Cortex-M7) */ -#define NVIC_DCCMVAC_OFFSET 0x0f68 /* D-Cache Clean by MVA to PoC (Cortex-M7) */ -#define NVIC_DCCSW_OFFSET 0x0f6c /* D-Cache Clean by Set-way (Cortex-M7) */ -#define NVIC_DCCIMVAC_OFFSET 0x0f70 /* D-Cache Clean and Invalidate by MVA to PoC (Cortex-M7) */ -#define NVIC_DCCISW_OFFSET 0x0f74 /* D-Cache Clean and Invalidate by Set-way (Cortex-M7) */ -#define NVIC_BPIALL_OFFSET 0x0f78 /* Branch predictor invalidate all (Cortex-M7) */ + +/* Cache Maintenance Operations */ + +#define NVIC_ICIALLU_OFFSET 0x0f50 /* I-Cache Invalidate All to PoU */ +#define NVIC_ICIMVAU_OFFSET 0x0f58 /* I-Cache Invalidate by MVA to PoU */ +#define NVIC_DCIMVAC_OFFSET 0x0f5c /* D-Cache Invalidate by MVA to PoC */ +#define NVIC_DCISW_OFFSET 0x0f60 /* D-Cache Invalidate by Set-way */ +#define NVIC_DCCMVAU_OFFSET 0x0f64 /* D-Cache Clean by MVA to PoU */ +#define NVIC_DCCMVAC_OFFSET 0x0f68 /* D-Cache Clean by MVA to PoC */ +#define NVIC_DCCSW_OFFSET 0x0f6c /* D-Cache Clean by Set-way */ +#define NVIC_DCCIMVAC_OFFSET 0x0f70 /* D-Cache Clean and Invalidate by MVA to PoC */ +#define NVIC_DCCISW_OFFSET 0x0f74 /* D-Cache Clean and Invalidate by Set-way */ +#define NVIC_BPIALL_OFFSET 0x0f78 /* Branch predictor invalidate all */ + #define NVIC_ITCMCR_OFFSET 0x0f90 /* Instruction Tightly-Coupled Memory Control Register */ #define NVIC_DTCMCR_OFFSET 0x0f94 /* Data Tightly-Coupled Memory Control Registers */ #define NVIC_AHBPCR_OFFSET 0x0f98 /* AHBP Control Register */ #define NVIC_CACR_OFFSET 0x0f9c /* L1 Cache Control Register */ #define NVIC_AHBSCR_OFFSET 0x0fa0 /* AHB Slave Control Register */ #define NVIC_ABFSR_OFFSET 0x0fa8 /* Auxiliary Bus Fault Status */ + #define NVIC_PID4_OFFSET 0x0fd0 /* Peripheral identification register (PID4) */ #define NVIC_PID5_OFFSET 0x0fd4 /* Peripheral identification register (PID5) */ #define NVIC_PID6_OFFSET 0x0fd8 /* Peripheral identification register (PID6) */ @@ -270,6 +299,9 @@ /* NVIC register addresses **************************************************/ #define NVIC_ICTR (ARMV8M_NVIC_BASE + NVIC_ICTR_OFFSET) +#define NVIC_ACTLR (ARMV8M_NVIC_BASE + NVIC_ACTLR_OFFSET) +#define NVIC_CPPWR (ARMV8M_NVIC_BASE + NVIC_CPPWR_OFFSET) + #define NVIC_SYSTICK_CTRL (ARMV8M_NVIC_BASE + NVIC_SYSTICK_CTRL_OFFSET) #define NVIC_SYSTICK_RELOAD (ARMV8M_NVIC_BASE + NVIC_SYSTICK_RELOAD_OFFSET) #define NVIC_SYSTICK_CURRENT (ARMV8M_NVIC_BASE + NVIC_SYSTICK_CURRENT_OFFSET) @@ -396,6 +428,7 @@ #define NVIC_IRQ228_231_PRIORITY (ARMV8M_NVIC_BASE + NVIC_IRQ228_231_PRIORITY_OFFSET) #define NVIC_IRQ232_235_PRIORITY (ARMV8M_NVIC_BASE + NVIC_IRQ232_235_PRIORITY_OFFSET) +#define NVIC_REVIDR (ARMV8M_NVIC_BASE + NVIC_REVIDR_OFFSET) #define NVIC_CPUID_BASE (ARMV8M_NVIC_BASE + NVIC_CPUID_BASE_OFFSET) #define NVIC_INTCTRL (ARMV8M_NVIC_BASE + NVIC_INTCTRL_OFFSET) #define NVIC_VECTAB (ARMV8M_NVIC_BASE + NVIC_VECTAB_OFFSET) @@ -426,22 +459,33 @@ #define NVIC_ISAR2 (ARMV8M_NVIC_BASE + NVIC_ISAR2_OFFSET) #define NVIC_ISAR3 (ARMV8M_NVIC_BASE + NVIC_ISAR3_OFFSET) #define NVIC_ISAR4 (ARMV8M_NVIC_BASE + NVIC_ISAR4_OFFSET) +#define NVIC_ISAR5 (ARMV8M_NVIC_BASE + NVIC_ISAR5_OFFSET) #define NVIC_CLIDR (ARMV8M_NVIC_BASE + NVIC_CLIDR_OFFSET) #define NVIC_CTR (ARMV8M_NVIC_BASE + NVIC_CTR_OFFSET) #define NVIC_CCSIDR (ARMV8M_NVIC_BASE + NVIC_CCSIDR_OFFSET) #define NVIC_CSSELR (ARMV8M_NVIC_BASE + NVIC_CSSELR_OFFSET) #define NVIC_CPACR (ARMV8M_NVIC_BASE + NVIC_CPACR_OFFSET) +#define NVIC_NSACR (ARMV8M_NVIC_BASE + NVIC_NSACR_OFFSET) + #define NVIC_DHCSR (ARMV8M_NVIC_BASE + NVIC_DHCSR_OFFSET) #define NVIC_DCRSR (ARMV8M_NVIC_BASE + NVIC_DCRSR_OFFSET) #define NVIC_DCRDR (ARMV8M_NVIC_BASE + NVIC_DCRDR_OFFSET) #define NVIC_DEMCR (ARMV8M_NVIC_BASE + NVIC_DEMCR_OFFSET) +#define NVIC_DSCEMCR (ARMV8M_NVIC_BASE + NVIC_DSCEMCR_OFFSET) +#define NVIC_DAUTHCTRL (ARMV8M_NVIC_BASE + NVIC_DAUTHCTRL_OFFSET) +#define NVIC_DSCSR (ARMV8M_NVIC_BASE + NVIC_DSCSR_OFFSET) + #define NVIC_STIR (ARMV8M_NVIC_BASE + NVIC_STIR_OFFSET) + +#define NVIC_RFSR (ARMV8M_NVIC_BASE + NVIC_RFSR_OFFSET) + #define NVIC_FPCCR (ARMV8M_NVIC_BASE + NVIC_FPCCR_OFFSET) #define NVIC_FPCAR (ARMV8M_NVIC_BASE + NVIC_FPCAR_OFFSET) #define NVIC_FPDSCR (ARMV8M_NVIC_BASE + NVIC_FPDSCR_OFFSET) #define NVIC_MVFR0 (ARMV8M_NVIC_BASE + NVIC_MVFR0_OFFSET) #define NVIC_MVFR1 (ARMV8M_NVIC_BASE + NVIC_MVFR1_OFFSET) #define NVIC_MVFR2 (ARMV8M_NVIC_BASE + NVIC_MVFR2_OFFSET) + #define NVIC_ICIALLU (ARMV8M_NVIC_BASE + NVIC_ICIALLU_OFFSET) #define NVIC_ICIMVAU (ARMV8M_NVIC_BASE + NVIC_ICIMVAU_OFFSET) #define NVIC_DCIMVAC (ARMV8M_NVIC_BASE + NVIC_DCIMVAC_OFFSET) @@ -452,12 +496,14 @@ #define NVIC_DCCIMVAC (ARMV8M_NVIC_BASE + NVIC_DCCIMVAC_OFFSET) #define NVIC_DCCISW (ARMV8M_NVIC_BASE + NVIC_DCCISW_OFFSET) #define NVIC_BPIALL (ARMV8M_NVIC_BASE + NVIC_BPIALL_OFFSET) + #define NVIC_ITCMCR (ARMV8M_NVIC_BASE + NVIC_ITCMCR_OFFSET) #define NVIC_DTCMCR (ARMV8M_NVIC_BASE + NVIC_DTCMCR_OFFSET) #define NVIC_AHBPCR (ARMV8M_NVIC_BASE + NVIC_AHBPCR_OFFSET) #define NVIC_CACR (ARMV8M_NVIC_BASE + NVIC_CACR_OFFSET) #define NVIC_AHBSCR (ARMV8M_NVIC_BASE + NVIC_AHBSCR_OFFSET) #define NVIC_ABFSR (ARMV8M_NVIC_BASE + NVIC_ABFSR_OFFSET) + #define NVIC_PID4 (ARMV8M_NVIC_BASE + NVIC_PID4_OFFSET) #define NVIC_PID5 (ARMV8M_NVIC_BASE + NVIC_PID5_OFFSET) #define NVIC_PID6 (ARMV8M_NVIC_BASE + NVIC_PID6_OFFSET) @@ -478,6 +524,11 @@ #define NVIC_ICTR_INTLINESNUM_SHIFT 0 /* Bits 0-3: Number of interrupt inputs / 32 - 1 */ #define NVIC_ICTR_INTLINESNUM_MASK (15 << NVIC_ICTR_INTLINESNUM_SHIFT) +/* Coprocessor Power Control Register (CPPWR) */ + +#define NVIC_CPPWR_SU(n) (1 << 2 * (n)) /* Low power mode */ +#define NVIC_CPPWR_SUS(n) (2 << 2 * (n)) /* Only accessible from the Secure state */ + /* SysTick control and status register (SYSTICK_CTRL) */ #define NVIC_SYSTICK_CTRL_ENABLE (1 << 0) /* Bit 0: Enable */ @@ -505,10 +556,12 @@ /* Interrupt control state register (INTCTRL) */ #define NVIC_INTCTRL_NMIPENDSET (1 << 31) /* Bit 31: Set pending NMI bit */ +#define NVIC_INTCTRL_NMIPENDCLR (1 << 30) /* Bit 30: Clear pending NMI bit */ #define NVIC_INTCTRL_PENDSVSET (1 << 28) /* Bit 28: Set pending PendSV bit */ #define NVIC_INTCTRL_PENDSVCLR (1 << 27) /* Bit 27: Clear pending PendSV bit */ #define NVIC_INTCTRL_PENDSTSET (1 << 26) /* Bit 26: Set pending SysTick bit */ #define NVIC_INTCTRL_PENDSTCLR (1 << 25) /* Bit 25: Clear pending SysTick bit */ +#define NVIC_INTCTRL_STTNS (1 << 24) /* Bit 24: SysTick Targets Non-secure */ #define NVIC_INTCTRL_ISPREEMPOT (1 << 23) /* Bit 23: Pending active next cycle */ #define NVIC_INTCTRL_ISRPENDING (1 << 22) /* Bit 22: Interrupt pending flag */ #define NVIC_INTCTRL_VECTPENDING_SHIFT 12 /* Bits 21-12: Pending ISR number field */ @@ -522,7 +575,7 @@ /* Bit 0: Reserved */ #define NVIC_SYSCON_SLEEPONEXIT (1 << 1) /* Bit 1: Sleep-on-exit (returning from Handler to Thread mode) */ #define NVIC_SYSCON_SLEEPDEEP (1 << 2) /* Bit 2: Use deep sleep in low power mode */ - /* Bit 3: Reserved */ +#define NVIC_SYSCON_SLEEPDEEPS (1 << 3) /* Bit 3: Sleep deep secure */ #define NVIC_SYSCON_SEVONPEND (1 << 4) /* Bit 4: Send Event on Pending bit */ /* Bits 5-31: Reserved */ @@ -534,10 +587,12 @@ #define NVIC_CFGCON_DIV0TRP (1 << 4) /* Bit 4: Enables fault on divide-by-zero */ #define NVIC_CFGCON_BFHFNMIGN (1 << 8) /* Bit 8: Disables data bus faults */ #define NVIC_CFGCON_STKALIGN (1 << 9) /* Bit 9: Indicates stack alignment on exception */ - /* Cortex-M7: */ +#define NVIC_CFGCON_STKOFHFNMIGN (1 << 10) /* Bit 10: Stack overflow in HardFault and NMI ignore */ #define NVIC_CFGCON_DC (1 << 16) /* Bit 16: Data cache enable */ #define NVIC_CFGCON_IC (1 << 17) /* Bit 17: Instruction cache enable */ #define NVIC_CFGCON_BP (1 << 18) /* Bit 18: Branch prediction enable */ +#define NVIC_CFGCON_LOB (1 << 19) /* Bit 19: Loop and branch info cache enable */ +#define NVIC_CFGCON_TRD (1 << 20) /* Bit 20: Thread reentrancy disabled */ /* System handler 4-7 priority register */ @@ -577,9 +632,15 @@ #define NVIC_AIRCR_VECTRESET (1 << 0) /* Bit 0: VECTRESET */ #define NVIC_AIRCR_VECTCLRACTIVE (1 << 1) /* Bit 1: Reserved for debug use */ #define NVIC_AIRCR_SYSRESETREQ (1 << 2) /* Bit 2: System reset */ - /* Bits 2-7: Reserved */ -#define NVIC_AIRCR_PRIGROUP_SHIFT (8) /* Bits 8-14: PRIGROUP */ +#define NVIC_AIRCR_SYSRESETREQS (1 << 3) /* Bit 3: System reset request secure only */ +#define NVIC_AIRCR_DIT (1 << 4) /* Bit 4: Data Independent Timing */ +#define NVIC_AIRCR_IESB (1 << 5) /* Bit 5: Implicit ESB Enable */ + /* Bits 6-7: Reserved */ +#define NVIC_AIRCR_PRIGROUP_SHIFT (8) /* Bits 8-10: PRIGROUP */ #define NVIC_AIRCR_PRIGROUP_MASK (7 << NVIC_AIRCR_PRIGROUP_SHIFT) + /* Bits 11-12: Reserved */ +#define NVIC_AIRCR_BFHFNMINS (1 << 13) /* Bit 13: BusFault, HardFault, and NMI Non-secure enable */ +#define NVIC_AIRCR_PRIS (1 << 14) /* Bit 14: Prioritize Secure exceptions */ #define NVIC_AIRCR_ENDIANNESS (1 << 15) /* Bit 15: 1=Big endian */ #define NVIC_AIRCR_VECTKEY_SHIFT (16) /* Bits 16-31: VECTKEY */ #define NVIC_AIRCR_VECTKEY_MASK (0xffff << NVIC_AIRCR_VECTKEY_SHIFT) @@ -592,7 +653,10 @@ #define NVIC_SYSHCON_MEMFAULTACT (1 << 0) /* Bit 0: MemManage is active */ #define NVIC_SYSHCON_BUSFAULTACT (1 << 1) /* Bit 1: BusFault is active */ +#define NVIC_SYSHCON_HARDFAULTACT (1 << 2) /* Bit 2: HardFault is active */ #define NVIC_SYSHCON_USGFAULTACT (1 << 3) /* Bit 3: UsageFault is active */ +#define NVIC_SYSHCON_SECUREFAULTACT (1 << 4) /* Bit 4: SecureFault is active */ +#define NVIC_SYSHCON_NMIACT (1 << 5) /* Bit 5: NMI is active */ #define NVIC_SYSHCON_SVCALLACT (1 << 7) /* Bit 7: SVCall is active */ #define NVIC_SYSHCON_MONITORACT (1 << 8) /* Bit 8: Monitor is active */ #define NVIC_SYSHCON_PENDSVACT (1 << 10) /* Bit 10: PendSV is active */ @@ -604,13 +668,19 @@ #define NVIC_SYSHCON_MEMFAULTENA (1 << 16) /* Bit 16: MemFault enabled */ #define NVIC_SYSHCON_BUSFAULTENA (1 << 17) /* Bit 17: BusFault enabled */ #define NVIC_SYSHCON_USGFAULTENA (1 << 18) /* Bit 18: UsageFault enabled */ +#define NVIC_SYSHCON_SECUREFAULTENA (1 << 19) /* Bit 10: SecureFault enabled */ +#define NVIC_SYSHCON_SECUREFAULTPENDED (1 << 20) /* Bit 10: SecureFault is pended */ +#define NVIC_SYSHCON_HARDFAULTPENDED (1 << 20) /* Bit 10: HardFault is pended */ -/* Cache Level ID register (Cortex-M7) */ +/* Cache Level ID register */ #define NVIC_CLIDR_L1CT_SHIFT (0) /* Bits 0-2: Level 1 cache type */ #define NVIC_CLIDR_L1CT_MASK (7 << NVIC_CLIDR_L1CT_SHIFT) -# define NVIC_CLIDR_L1CT_ICACHE (1 << NVIC_CLIDR_LOC_SHIFT) -# define NVIC_CLIDR_L1CT_DCACHE (2 << NVIC_CLIDR_LOC_SHIFT) +# define NVIC_CLIDR_L1CT_ICACHE (1 << NVIC_CLIDR_L1CT_SHIFT) +# define NVIC_CLIDR_L1CT_DCACHE (2 << NVIC_CLIDR_L1CT_SHIFT) +# define NVIC_CLIDR_L1CT_UNIFIED (4 << NVIC_CLIDR_L1CT_SHIFT) +#define NVIC_CLIDR_LOUIS_SHIFT (21) /* Bits 21-23: Level of Unification Inner Shareable */ +#define NVIC_CLIDR_LOUIS_MASK (7 << NVIC_CLIDR_LOC_SHIFT) #define NVIC_CLIDR_LOC_SHIFT (24) /* Bits 24-26: Level of Coherency */ #define NVIC_CLIDR_LOC_MASK (7 << NVIC_CLIDR_LOC_SHIFT) # define NVIC_CLIDR_LOC_IMPLEMENTED (1 << NVIC_CLIDR_LOC_SHIFT) @@ -619,8 +689,14 @@ #define NVIC_CLIDR_LOUU_MASK (7 << NVIC_CLIDR_LOUU_SHIFT) # define NVIC_CLIDR_LOUU_IMPLEMENTED (1 << NVIC_CLIDR_LOUU_SHIFT) # define NVIC_CLIDR_LOUU_UNIMPLEMENTED (0 << NVIC_CLIDR_LOUU_SHIFT) +#define NVIC_CLIDR_ICB_SHIFT (30) /* Bits 31-30: Inner cache boundary */ +#define NVIC_CLIDR_ICB_MASK (3 << NVIC_CLIDR_ICB_SHIFT) +# define NVIC_CLIDR_ICB_UNKOWN (0 << NVIC_CLIDR_ICB_SHIFT) +# define NVIC_CLIDR_ICB_L1 (1 << NVIC_CLIDR_ICB_SHIFT) +# define NVIC_CLIDR_ICB_L2 (2 << NVIC_CLIDR_ICB_SHIFT) +# define NVIC_CLIDR_ICB_L3 (3 << NVIC_CLIDR_ICB_SHIFT) -/* Cache Type register (Cortex-M7) */ +/* Cache Type register */ #define NVIC_CTR_IMINLINE_SHIFT (0) /* Bits 0-3: ImInLine */ #define NVIC_CTR_IMINLINE_MASK (15 << NVIC_CTR_IMINLINE_SHIFT) @@ -628,12 +704,12 @@ #define NVIC_CTR_DMINLINE_MASK (15 << NVIC_CTR_DMINLINE_SHIFT) #define NVIC_CTR_ERG_SHIFT (20) /* Bits 20-23: ERG */ #define NVIC_CTR_ERG_MASK (15 << NVIC_CTR_ERG_SHIFT) -#define NVIC_CTR_CWG_SHIFT (24) /* Bits 24-27: ERG */ +#define NVIC_CTR_CWG_SHIFT (24) /* Bits 24-27: CWG */ #define NVIC_CTR_CWG_MASK (15 << NVIC_CTR_CWG_SHIFT) #define NVIC_CTR_FORMAT_SHIFT (29) /* Bits 29-31: Format */ #define NVIC_CTR_FORMAT_MASK (7 << NVIC_CTR_FORMAT_SHIFT) -/* Cache Size ID Register (Cortex-M7) */ +/* Cache Size ID Register */ #define NVIC_CCSIDR_LINESIZE_SHIFT (0) /* Bits 0-2: Number of words in each cache line */ #define NVIC_CCSIDR_LINESIZE_MASK (7 << NVIC_CCSIDR_LINESIZE_SHIFT) @@ -646,7 +722,7 @@ #define NVIC_CCSIDR_WB_SHIFT (1 << 30) /* Bits 30: Write-Back support */ #define NVIC_CCSIDR_WT_SHIFT (1 << 31) /* Bits 31: Write-Through support */ -/* Cache Size Selection Register (Cortex-M7) */ +/* Cache Size Selection Register */ #define NVIC_CSSELR_IND (1 << 0) /* Bit 0: Selects either instruction or data cache */ # define NVIC_CSSELR_IND_ICACHE (0 << 0) /* 0=Instruction Cache */ @@ -664,6 +740,13 @@ # define NVIC_CPACR_CP_PRIV(n) (1 << NVIC_CPACR_CP_SHIFT(n)) # define NVIC_CPACR_CP_FULL(n) (3 << NVIC_CPACR_CP_SHIFT(n)) +/* Non-secure Access Control Register (NSACR) */ + +#define NVIC_NSACR_CP_SHIFT(n) (n) +#define NVIC_NSACR_CP_MASK(n) (1 << NVIC_CPACR_CP_SHIFT(n)) +# define NVIC_NSACR_CP_SECURE(n) (0 << NVIC_CPACR_CP_SHIFT(n)) +# define NVIC_NSACR_CP_FULL(n) (1 << NVIC_CPACR_CP_SHIFT(n)) + /* Debug Exception and Monitor Control Register (DEMCR) */ #define NVIC_DEMCR_VCCORERESET (1 << 0) /* Bit 0: Reset Vector Catch */ @@ -674,12 +757,23 @@ #define NVIC_DEMCR_VCBUSERR (1 << 8) /* Bit 8: Debug Trap on normal Bus error */ #define NVIC_DEMCR_VCINTERR (1 << 9) /* Bit 9: Debug Trap on interrupt/exception service errors */ #define NVIC_DEMCR_VCHARDERR (1 << 10) /* Bit 10: Debug trap on Hard Fault */ +#define NVIC_DEMCR_VCSFERR (1 << 11) /* Bit 11: Debug trap on Secure Fault */ #define NVIC_DEMCR_MONEN (1 << 16) /* Bit 16: Enable the debug monitor */ #define NVIC_DEMCR_MONPEND (1 << 17) /* Bit 17: Pend the monitor to activate when priority permits */ #define NVIC_DEMCR_MONSTEP (1 << 18) /* Bit 18: Steps the core */ #define NVIC_DEMCR_MONREQ (1 << 19) /* Bit 19: Monitor wake-up mode */ +#define NVIC_DEMCR_SDME (1 << 20) /* Bit 20: Enable the security debug monitor */ +#define NVIC_DEMCR_UMON_EN (1 << 21) /* Bit 21: Unprivileged monitor enable */ +#define NVIC_DEMCR_MONPRKEY (1 << 23) /* Bit 23: Monitor pend req key */ #define NVIC_DEMCR_TRCENA (1 << 24) /* Bit 24: Enable trace and debug blocks */ +/* Debug Set Clear Exception and Monitor Control Register (DSCEMCR) */ + +#define NVIC_DSCEMCR_SET_MON_PEND (1 << 1) /* Bit 1: Set monitor pend */ +#define NVIC_DSCEMCR_SET_MON_REQ (1 << 3) /* Bit 3: Set monitor request */ +#define NVIC_DSCEMCR_CLR_MON_PEND (1 << 17) /* Bit 17: Clear monitor pend */ +#define NVIC_DSCEMCR_CLR_MON_REQ (1 << 19) /* Bit 19: Clear monitor request */ + /* Floating-Point Context Control Register (FPCCR) */ #define NVIC_FPCCR_LSPACT (1 << 0) /* Bit 0: Lazy state preservation active */ @@ -702,9 +796,9 @@ /* Instruction Tightly-Coupled Memory Control Register (ITCMCR) */ -/* Data Tightly-Coupled Memory Control Registers (DTCMCR */ +/* Data Tightly-Coupled Memory Control Registers (DTCMCR) */ -#define NVIC_TCMCR_EN (1 << 0) /* Bit 9: TCM enable */ +#define NVIC_TCMCR_EN (1 << 0) /* Bit 0: TCM enable */ #define NVIC_TCMCR_RMW (1 << 1) /* Bit 1: Read-Modify-Write (RMW) enable */ #define NVIC_TCMCR_RETEN (1 << 2) /* Bit 2: Retry phase enable */ #define NVIC_TCMCR_SZ_SHIFT (3) /* Bits 3-6: Size of the TCM */ @@ -724,7 +818,7 @@ # define NVIC_TCMCR_SZ_8MB (14 << NVIC_TCMCR_SZ_SHIFT) # define NVIC_TCMCR_SZ_16MB (15 << NVIC_TCMCR_SZ_SHIFT) -/* AHBP Control Register (AHBPCR, Cortex-M7) */ +/* AHBP Control Register (AHBPCR) */ #define NVIC_AHBPCR_EN (1 << 0) /* Bit 0: AHBP enable */ #define NVIC_AHBPCR_SZ_SHIFT (1) /* Bits 1-3: AHBP size */ @@ -735,7 +829,7 @@ # define NVIC_AHBPCR_SZ_256MB (3 << NVIC_AHBPCR_SZ_SHIFT) # define NVIC_AHBPCR_SZ_512MB (4 << NVIC_AHBPCR_SZ_SHIFT) -/* L1 Cache Control Register (CACR, Cortex-M7) */ +/* L1 Cache Control Register (CACR) */ #define NVIC_CACR_SIWT (1 << 0) /* Bit 0: Shared cacheable-is-WT for data cache */ #define NVIC_CACR_ECCDIS (1 << 1) /* Bit 1: Enables ECC in the instruction and data cache */ diff --git a/arch/arm/src/armv8-m/psr.h b/arch/arm/src/armv8-m/psr.h index 260011ec010..fa509700b97 100644 --- a/arch/arm/src/armv8-m/psr.h +++ b/arch/arm/src/armv8-m/psr.h @@ -31,6 +31,9 @@ /* Application Program Status Register (APSR) */ +#define ARMV8M_APSR_GE_SHIFT 16 /* Bits 16-19: Greater than or equal flags */ +#define ARMV8M_APSR_GE_MASK (0xf << ARMV8M_APSR_GE_SHIFT) + #define ARMV8M_APSR_Q (1 << 27) /* Bit 27: Sticky saturation flag */ #define ARMV8M_APSR_V (1 << 28) /* Bit 28: Overflow flag */ #define ARMV8M_APSR_C (1 << 29) /* Bit 29: Carry/borrow flag */ @@ -45,17 +48,28 @@ /* Execution PSR Register (EPSR) */ #define ARMV8M_EPSR_ICIIT1_SHIFT 10 /* Bits 15-10: Interrupt-Continuable-Instruction/If-Then bits */ -#define ARMV8M_EPSR_ICIIT1_MASK (3 << ARMV8M_EPSR_ICIIT1_SHIFT) +#define ARMV8M_EPSR_ICIIT1_MASK (0x3f << ARMV8M_EPSR_ICIIT1_SHIFT) +#define ARMV8M_EPSR_B (1 << 21) /* Bit 21: Branch target identification active */ #define ARMV8M_EPSR_T (1 << 24) /* Bit 24: T-bit */ #define ARMV8M_EPSR_ICIIT2_SHIFT 25 /* Bits 26-25: Interrupt-Continuable-Instruction/If-Then bits */ #define ARMV8M_EPSR_ICIIT2_MASK (3 << ARMV8M_EPSR_ICIIT2_SHIFT) +/* Return PSR Register (RETPSR) */ + +#define ARMV8M_RETPSR_SPREALIGN (1 << 9) /* Bit 9: Stack-pointer re-align */ +#define ARMV8M_RETPSR_SFPA (1 << 20) /* Bit 20: Secure Floating-point active */ + /* Save xPSR bits */ #define ARMV8M_XPSR_ISR_SHIFT ARMV8M_IPSR_ISR_SHIFT #define ARMV8M_XPSR_ISR_MASK ARMV8M_IPSR_ISR_MASK -#define ARMV8M_XPSR_ICIIT1_SHIFT ARMV8M_EPSR_ICIIT1_SHIFT/ +#define ARMV8M_XPSR_SPREALIGN ARMV8M_RETPSR_SPREALIGN +#define ARMV8M_XPSR_ICIIT1_SHIFT ARMV8M_EPSR_ICIIT1_SHIFT #define ARMV8M_XPSR_ICIIT1_MASK ARMV8M_EPSR_ICIIT1_MASK +#define ARMV8M_XPSR_GE_SHIFT ARMV8M_APSR_GE_SHIFT +#define ARMV8M_XPSR_GE_MASK ARMV8M_APSR_GE_MASK +#define ARMV8M_XPSR_SFPA ARMV8M_RETPSR_SFPA +#define ARMV8M_XPSR_B ARMV8M_EPSR_B #define ARMV8M_XPSR_T ARMV8M_EPSR_T #define ARMV8M_XPSR_ICIIT2_SHIFT ARMV8M_EPSR_ICIIT2_SHIFT #define ARMV8M_XPSR_ICIIT2_MASK ARMV8M_EPSR_ICIIT2_MASK @@ -65,6 +79,40 @@ #define ARMV8M_XPSR_Z ARMV8M_APSR_Z #define ARMV8M_XPSR_N ARMV8M_APSR_N +/* Floating-point Status and Control Register (FPSCR) */ + +#define ARMV8M_FPSCR_IOC (1 << 0) /* Bit 0: Invalid Operation */ +#define ARMV8M_FPSCR_DZC (1 << 1) /* Bit 1: Divide by Zero */ +#define ARMV8M_FPSCR_OFC (1 << 2) /* Bit 2: Overflow */ +#define ARMV8M_FPSCR_UFC (1 << 3) /* Bit 3: Underflow */ +#define ARMV8M_FPSCR_IXC (1 << 4) /* Bit 4: Inexact */ +#define ARMV8M_FPSCR_IDC (1 << 7) /* Bit 7: Input Denormal */ + +#define ARMV8M_FPSCR_LTPSIZE_SHIFT 16 /* Bits 16-18: Vector element size */ +#define ARMV8M_FPSCR_LTPSIZE_8BIT (0x0 << ARMV8M_FPSCR_RM_SHIFT) +#define ARMV8M_FPSCR_LTPSIZE_16BIT (0x1 << ARMV8M_FPSCR_RM_SHIFT) +#define ARMV8M_FPSCR_LTPSIZE_32BIT (0x2 << ARMV8M_FPSCR_RM_SHIFT) +#define ARMV8M_FPSCR_LTPSIZE_DONE (0x3 << ARMV8M_FPSCR_RM_SHIFT) +#define ARMV8M_FPSCR_LTPSIZE_MASK (0x7 << ARMV8M_FPSCR_RM_SHIFT) + +#define ARMV8M_FPSCR_FZ16 (1 << 19) /* Bit 19: Flush-to-zero mode(half-precision) */ + +#define ARMV8M_FPSCR_RM_SHIFT 22 /* Bits 22-23: Round mode */ +#define ARMV8M_FPSCR_RM_NEAR (0x0 << ARMV8M_FPSCR_RM_SHIFT) +#define ARMV8M_FPSCR_RM_PLUS (0x1 << ARMV8M_FPSCR_RM_SHIFT) +#define ARMV8M_FPSCR_RM_MINUS (0x2 << ARMV8M_FPSCR_RM_SHIFT) +#define ARMV8M_FPSCR_RM_ZERO (0x3 << ARMV8M_FPSCR_RM_SHIFT) +#define ARMV8M_FPSCR_RM_MASK (0x3 << ARMV8M_FPSCR_RM_SHIFT) + +#define ARMV8M_FPSCR_FZ (1 << 24) /* Bit 24: Flush-to-zero mode */ +#define ARMV8M_FPSCR_DN (1 << 25) /* Bit 25: Default NaN mode */ +#define ARMV8M_FPSCR_AHP (1 << 26) /* Bit 26: Alternative half-precision */ +#define ARMV8M_FPSCR_Q (1 << 27) /* Bit 27: Sticky saturation flag */ +#define ARMV8M_FPSCR_V (1 << 28) /* Bit 28: Overflow flag */ +#define ARMV8M_FPSCR_C (1 << 29) /* Bit 29: Carry/borrow flag */ +#define ARMV8M_FPSCR_Z (1 << 30) /* Bit 30: Zero flag */ +#define ARMV8M_FPSCR_N (1 << 31) /* Bit 31: Negative, less than flag */ + /**************************************************************************** * Inline Functions ****************************************************************************/ diff --git a/arch/arm/src/armv8-m/ram_vectors.h b/arch/arm/src/armv8-m/ram_vectors.h index b305638790b..cd611407736 100644 --- a/arch/arm/src/armv8-m/ram_vectors.h +++ b/arch/arm/src/armv8-m/ram_vectors.h @@ -57,12 +57,12 @@ * * REVISIT: Can this alignment requirement vary from core-to-core? Yes, it * depends on the number of vectors supported by the MCU. The safest thing - * to do is to put the vector table at the beginning of RAM in order toforce + * to do is to put the vector table at the beginning of RAM in order to force * the highest alignment possible. */ extern up_vector_t g_ram_vectors[ARMV8M_VECTAB_SIZE] - __attribute__ ((section (".ram_vectors"), aligned (128))); + locate_data(".ram_vectors") aligned_data(128); /**************************************************************************** * Public Function Prototypes diff --git a/arch/arm/src/c5471/Make.defs b/arch/arm/src/c5471/Make.defs index 6b07a0c5aee..4e5cf8ec8ed 100644 --- a/arch/arm/src/c5471/Make.defs +++ b/arch/arm/src/c5471/Make.defs @@ -28,7 +28,7 @@ CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c arm_interruptcontext CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c CMN_CSRCS += arm_stackframe.c arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c -CMN_CSRCS += arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_usestack.c arm_vfork.c arm_puts.c ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CMN_CSRCS += arm_idle.c diff --git a/arch/arm/src/common/arm_internal.h b/arch/arm/src/common/arm_internal.h index 6a9c01de51c..068ca0b3031 100644 --- a/arch/arm/src/common/arm_internal.h +++ b/arch/arm/src/common/arm_internal.h @@ -253,7 +253,7 @@ EXTERN uint32_t _ebss; /* End+1 of .bss */ #ifdef CONFIG_ARCH_RAMFUNCS -# define __ramfunc__ __attribute__ ((section(".ramfunc"),long_call,noinline)) +# define __ramfunc__ locate_code(".ramfunc") farcall_function noinline_function /* Functions declared in the .ramfunc section will be packaged together * by the linker script and stored in FLASH. During boot-up, the start diff --git a/arch/arm/src/common/arm_pthread_exit.c b/arch/arm/src/common/arm_pthread_exit.c index ba7eb825d2b..22e2fbdf258 100644 --- a/arch/arm/src/common/arm_pthread_exit.c +++ b/arch/arm/src/common/arm_pthread_exit.c @@ -57,6 +57,10 @@ void up_pthread_exit(pthread_exitroutine_t exit, FAR void *exit_value) /* Let sys_call2() do all of the work */ sys_call2(SYS_pthread_exit, (uintptr_t)exit, (uintptr_t)exit_value); + + /* Suppress "'noreturn' function does return" warning */ + + while (1); } #endif /* !CONFIG_BUILD_FLAT && __KERNEL__ && !CONFIG_DISABLE_PTHREAD */ diff --git a/arch/arm/src/common/arm_switchcontext.c b/arch/arm/src/common/arm_switchcontext.c new file mode 100644 index 00000000000..a7944f2d004 --- /dev/null +++ b/arch/arm/src/common/arm_switchcontext.c @@ -0,0 +1,48 @@ +/**************************************************************************** + * arch/arm/src/common/arm_switchcontext.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "svcall.h" +#include "syscall.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_switchcontext + * + * Description: + * Save the current thread context and restore the specified context. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs) +{ + sys_call2(SYS_switch_context, (uintptr_t)saveregs, (uintptr_t)restoreregs); +} diff --git a/arch/arm/src/cxd56xx/Kconfig b/arch/arm/src/cxd56xx/Kconfig index c168c3e5a66..ef9b7e10976 100644 --- a/arch/arm/src/cxd56xx/Kconfig +++ b/arch/arm/src/cxd56xx/Kconfig @@ -1389,7 +1389,6 @@ config CXD56_TESTSET_WITH_HWSEM bool "Use custom testset based on hardware semaphore" default n if CXD56_USE_SYSBUS default y if !CXD56_USE_SYSBUS - ---help--- endif diff --git a/arch/arm/src/cxd56xx/Make.defs b/arch/arm/src/cxd56xx/Make.defs index ab4119eef2c..351477cdd32 100644 --- a/arch/arm/src/cxd56xx/Make.defs +++ b/arch/arm/src/cxd56xx/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += vfork.S ifneq ($(CONFIG_CXD56_TESTSET),y) @@ -32,7 +32,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c -CMN_CSRCS += arm_svcall.c arm_vfork.c +CMN_CSRCS += arm_svcall.c arm_vfork.c arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) CMN_ASRCS += arm_lazyexception.S diff --git a/arch/arm/src/cxd56xx/cxd56_adc.c b/arch/arm/src/cxd56xx/cxd56_adc.c index d75d614061b..1e2fb2988ab 100644 --- a/arch/arm/src/cxd56xx/cxd56_adc.c +++ b/arch/arm/src/cxd56xx/cxd56_adc.c @@ -929,6 +929,14 @@ static int cxd56_adc_ioctl(FAR struct file *filep, int cmd, } break; + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = 1; + } + break; + default: { if (adc_validcheck(cmd)) diff --git a/arch/arm/src/cxd56xx/cxd56_adc.h b/arch/arm/src/cxd56xx/cxd56_adc.h index 9a0dd5f912e..fee912e5230 100644 --- a/arch/arm/src/cxd56xx/cxd56_adc.h +++ b/arch/arm/src/cxd56xx/cxd56_adc.h @@ -39,7 +39,7 @@ extern "C" #endif /**************************************************************************** - * Public Function Protoypes + * Public Function Prototypes ****************************************************************************/ /**************************************************************************** diff --git a/arch/arm/src/cxd56xx/cxd56_cisif.c b/arch/arm/src/cxd56xx/cxd56_cisif.c index 1e0951991f4..b3f8cbd83b1 100644 --- a/arch/arm/src/cxd56xx/cxd56_cisif.c +++ b/arch/arm/src/cxd56xx/cxd56_cisif.c @@ -35,8 +35,7 @@ #include #include -#include - +#include #include "arm_arch.h" #include "cxd56_clock.h" @@ -52,10 +51,22 @@ /* #define CISIF_DBG_CONTI_CAP */ -#define YUV_VSIZE_MIN (64) -#define YUV_HSIZE_MIN (96) -#define YUV_VSIZE_MAX (360) -#define YUV_HSIZE_MAX (480) +#define YUV_VSIZE_STEP (1) +#define YUV_HSIZE_STEP (1) +#define YUV_VSIZE_MIN (64) +#define YUV_HSIZE_MIN (96) +#define YUV_VSIZE_MAX (360) +#define YUV_HSIZE_MAX (480) + +#define JPG_VSIZE_STEP (1) +#define JPG_HSIZE_STEP (1) +#define JPG_VSIZE_MIN (64) +#define JPG_HSIZE_MIN (96) +#define JPG_VSIZE_MAX (1944) +#define JPG_HSIZE_MAX (2592) + +#define CISIF_FMT_MIN (1) +#define CISIF_FMT_MAX (3) #define JPG_INT_ALL (JPG_ERR_STATUS_INT | \ JPG_MEM_OVF_INT | \ @@ -108,6 +119,40 @@ typedef enum state_e state_t; typedef void (*intc_func_table)(uint8_t code); +typedef void (*notify_callback_t)(uint8_t code, + uint32_t size, + uint32_t addr); +typedef void (*comp_callback_t)(uint8_t code, + uint32_t size, + uint32_t addr); + +struct cisif_yuv_param_s +{ + uint16_t hsize; + uint16_t vsize; + uint32_t notify_size; + notify_callback_t notify_func; +}; + +typedef struct cisif_yuv_param_s cisif_yuv_param_t; + +struct cisif_jpg_param_s +{ + uint32_t notify_size; + notify_callback_t notify_func; +}; + +typedef struct cisif_jpg_param_s cisif_jpg_param_t; + +struct cisif_param_s +{ + uint32_t format; + cisif_yuv_param_t yuv_param; + cisif_jpg_param_t jpg_param; +}; + +typedef struct cisif_param_s cisif_param_t; + /**************************************************************************** * Private Data ****************************************************************************/ @@ -115,9 +160,8 @@ typedef void (*intc_func_table)(uint8_t code); static state_t g_state = STATE_STANDBY; static uint32_t g_storage_addr = 0; -notify_callback_t g_jpg_notify_callback_func; -notify_callback_t g_ycc_notify_callback_func; -comp_callback_t g_comp_callback_func; +static notify_callback_t g_jpg_notify_callback_func; +static notify_callback_t g_ycc_notify_callback_func; static bool g_jpgint_receive; static bool g_errint_receive; @@ -129,6 +173,8 @@ static uint32_t g_cisif_time_start; static uint32_t g_cisif_time_stop; #endif +static imgdata_capture_t g_cxd56_cisif_complete_capture; + /**************************************************************************** * Private Function Prototypes ****************************************************************************/ @@ -145,15 +191,32 @@ static void cisif_reg_write(uint16_t reg, uint32_t val); static uint32_t cisif_reg_read(uint16_t reg); static int cisif_check_param(cisif_param_t *p); -static int cisif_set_yuv_param(cisif_param_t *p); -static int cisif_set_jpg_param(cisif_param_t *p); +static int cisif_set_yuv_param(cisif_yuv_param_t *p); +static int cisif_set_jpg_param(cisif_jpg_param_t *p); -static int cisif_check_sarea(void *s); -static int cisif_set_yuv_sarea(void *s); -static int cisif_set_jpg_sarea(void *s); -static int cisif_set_intlev_sarea(void *s, uint32_t yuv_size); +static int cisif_set_yuv_sarea(uint8_t *addr, uint32_t size); +static int cisif_set_jpg_sarea(uint8_t *addr, uint32_t size); +static int cisif_set_intlev_sarea(uint8_t *addr, + uint32_t total_size, + uint32_t yuv_size); +static int cisif_intc_handler(int irq, FAR void *context, FAR void *arg); -int cisif_intc_handler(int irq, FAR void *context, FAR void *arg); +/* video image data operations */ + +static int cxd56_cisif_init(void); +static int cxd56_cisif_uninit(void); +static int cxd56_cisif_validate_frame_setting + (uint8_t nr_datafmt, + FAR imgdata_format_t *datafmt, + FAR imgdata_interval_t *interval); +static int cxd56_cisif_start_capture + (uint8_t nr_datafmt, + FAR imgdata_format_t *datafmt, + FAR imgdata_interval_t *interval, + imgdata_capture_t callback); +static int cxd56_cisif_stop_capture(void); +static int cxd56_cisif_validate_buf(uint8_t *addr, uint32_t size); +static int cxd56_cisif_set_buf(uint8_t *addr, uint32_t size); const intc_func_table g_intcomp_func[] = { @@ -188,6 +251,17 @@ const intc_func_table g_intcomp_func[] = cisif_jpg_err_int, /* JPG_ERR_STATUS_INT */ }; +const struct imgdata_ops_s g_cxd56_cisif_ops = + { + .init = cxd56_cisif_init, + .uninit = cxd56_cisif_uninit, + .validate_buf = cxd56_cisif_validate_buf, + .set_buf = cxd56_cisif_set_buf, + .validate_frame_setting = cxd56_cisif_validate_frame_setting, + .start_capture = cxd56_cisif_start_capture, + .stop_capture = cxd56_cisif_stop_capture, + }; + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -290,7 +364,7 @@ static void cisif_callback_for_intlev(uint8_t code) /* Notify and get next addr */ - g_comp_callback_func(0, size, g_storage_addr); + g_cxd56_cisif_complete_capture(0, size); g_jpgint_receive = false; @@ -332,7 +406,7 @@ static void cisif_ycc_axi_trdn_int(uint8_t code) else { size = cisif_reg_read(CISIF_YCC_DSTRG_CONT); - g_comp_callback_func(0, size, g_storage_addr); + g_cxd56_cisif_complete_capture(0, size); cisif_reg_write(CISIF_YCC_DREAD_CONT, 0); } } @@ -382,7 +456,7 @@ static void cisif_jpg_axi_trdn_int(uint8_t code) else { size = cisif_reg_read(CISIF_JPG_DSTRG_CONT); - g_comp_callback_func(0, size, g_storage_addr); + g_cxd56_cisif_complete_capture(0, size); cisif_reg_write(CISIF_JPG_DREAD_CONT, 0); } } @@ -414,7 +488,7 @@ static void cisif_ycc_err_int(uint8_t code) #endif size = cisif_reg_read(CISIF_YCC_DSTRG_CONT); - g_comp_callback_func(code, size, g_storage_addr); + g_cxd56_cisif_complete_capture(code, size); cisif_reg_write(CISIF_YCC_DREAD_CONT, 0); g_errint_receive = true; } @@ -426,16 +500,13 @@ static void cisif_ycc_err_int(uint8_t code) static void cisif_jpg_err_int(uint8_t code) { uint32_t size; - uint32_t addr; #ifdef CISIF_INTR_TRACE cisif_trace_time_stop("cisif_jpg_err_int"); #endif - addr = g_storage_addr; - size = cisif_reg_read(CISIF_JPG_DSTRG_CONT); - g_comp_callback_func(code, size, addr); + g_cxd56_cisif_complete_capture(code, size); cisif_reg_write(CISIF_JPG_DREAD_CONT, 0); g_errint_receive = true; } @@ -444,7 +515,7 @@ static void cisif_jpg_err_int(uint8_t code) * cisif_intc_handler ****************************************************************************/ -int cisif_intc_handler(int irq, FAR void *context, FAR void *arg) +static int cisif_intc_handler(int irq, FAR void *context, FAR void *arg) { uint32_t value; uint32_t enable; @@ -488,6 +559,19 @@ static uint32_t cisif_reg_read(uint16_t reg) return getreg32(CXD56_CISIF_BASE + reg); } +static bool is_uncompressed(uint32_t fmt) +{ + bool ret = false; + + if ((fmt == IMGDATA_PIX_FMT_UYVY) || + (fmt == IMGDATA_PIX_FMT_RGB565)) + { + ret = true; + } + + return ret; +} + /**************************************************************************** * cisif_check_param ****************************************************************************/ @@ -499,23 +583,19 @@ static int cisif_check_param(cisif_param_t *p) return -EINVAL; } - if (p->comp_func == NULL) - { - return -EINVAL; - } - switch (p->format) { - case V4L2_PIX_FMT_UYVY: - case V4L2_PIX_FMT_JPEG: - case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: + case IMGDATA_PIX_FMT_UYVY: + case IMGDATA_PIX_FMT_RGB565: + case IMGDATA_PIX_FMT_JPEG: + case IMGDATA_PIX_FMT_JPEG_WITH_SUBIMG: break; default: return -EINVAL; } - if (p->format != V4L2_PIX_FMT_JPEG) + if (p->format != IMGDATA_PIX_FMT_JPEG) { if (p->yuv_param.hsize < YUV_HSIZE_MIN || p->yuv_param.hsize > YUV_HSIZE_MAX || @@ -534,7 +614,7 @@ static int cisif_check_param(cisif_param_t *p) } } - if (p->format != V4L2_PIX_FMT_UYVY) + if (!is_uncompressed(p->format)) { if (p->jpg_param.notify_func != NULL) { @@ -548,47 +628,26 @@ static int cisif_check_param(cisif_param_t *p) return OK; } -/**************************************************************************** - * cisif_check_sarea - ****************************************************************************/ - -static int cisif_check_sarea(void *s) -{ - if (s == NULL) - { - return -EINVAL; - } - - cisif_sarea_t *ss = (cisif_sarea_t *)s; - if (ILLEGAL_BUFADDR_ALIGNMENT(ss->strg_addr) || - ss->strg_size == 0) - { - return -EINVAL; - } - - return OK; -} - /**************************************************************************** * cisif_set_yuvparam ****************************************************************************/ -static int cisif_set_yuv_param(cisif_param_t *p) +static int cisif_set_yuv_param(cisif_yuv_param_t *p) { uint32_t act_size = 0; - act_size = (p->yuv_param.vsize & 0x1ff) << 16; - act_size |= p->yuv_param.hsize & 0x1ff; + act_size = (p->vsize & 0x1ff) << 16; + act_size |= p->hsize & 0x1ff; cisif_reg_write(CISIF_ACT_SIZE, act_size); cisif_reg_write(CISIF_CIS_SIZE, act_size); /* must align 32 bytes */ - cisif_reg_write(CISIF_YCC_NSTRG_SIZE, (p->yuv_param.notify_size - & 0xffffffe0)); + cisif_reg_write(CISIF_YCC_NSTRG_SIZE, + (p->notify_size & 0xffffffe0)); - g_ycc_notify_callback_func = p->yuv_param.notify_func; + g_ycc_notify_callback_func = p->notify_func; return OK; } @@ -597,14 +656,12 @@ static int cisif_set_yuv_param(cisif_param_t *p) * cisif_set_yuvsarea ****************************************************************************/ -static int cisif_set_yuv_sarea(void *s) +static int cisif_set_yuv_sarea(uint8_t *addr, uint32_t size) { - cisif_sarea_t *ss = (cisif_sarea_t *)s; - /* must align 32 bytes */ - cisif_reg_write(CISIF_YCC_DAREA_SIZE, (ss->strg_size & 0xffffffe0)); - cisif_reg_write(CISIF_YCC_START_ADDR, CXD56_PHYSADDR(ss->strg_addr)); + cisif_reg_write(CISIF_YCC_DAREA_SIZE, (size & 0xffffffe0)); + cisif_reg_write(CISIF_YCC_START_ADDR, CXD56_PHYSADDR(addr)); return OK; } @@ -613,14 +670,14 @@ static int cisif_set_yuv_sarea(void *s) * cisif_set_jpg_param ****************************************************************************/ -static int cisif_set_jpg_param(cisif_param_t *p) +static int cisif_set_jpg_param(cisif_jpg_param_t *p) { /* must align 32 bytes */ - cisif_reg_write(CISIF_JPG_NSTRG_SIZE, (p->jpg_param.notify_size + cisif_reg_write(CISIF_JPG_NSTRG_SIZE, (p->notify_size & 0xffffffe0)); - g_jpg_notify_callback_func = p->jpg_param.notify_func; + g_jpg_notify_callback_func = p->notify_func; return OK; } @@ -629,14 +686,12 @@ static int cisif_set_jpg_param(cisif_param_t *p) * cisif_set_jpg_sarea ****************************************************************************/ -static int cisif_set_jpg_sarea(void *s) +static int cisif_set_jpg_sarea(uint8_t *addr, uint32_t size) { - cisif_sarea_t *ss = (cisif_sarea_t *)s; - /* must align 32 bytes */ - cisif_reg_write(CISIF_JPG_DAREA_SIZE, (ss->strg_size & 0xffffffe0)); - cisif_reg_write(CISIF_JPG_START_ADDR, CXD56_PHYSADDR(ss->strg_addr)); + cisif_reg_write(CISIF_JPG_DAREA_SIZE, (size & 0xffffffe0)); + cisif_reg_write(CISIF_JPG_START_ADDR, CXD56_PHYSADDR(addr)); return OK; } @@ -645,41 +700,73 @@ static int cisif_set_jpg_sarea(void *s) * cisif_set_jpg_sarea ****************************************************************************/ -static int cisif_set_intlev_sarea(void *s, uint32_t yuv_size) +static int cisif_set_intlev_sarea(uint8_t *addr, + uint32_t total_size, + uint32_t yuv_size) { - cisif_sarea_t *sarea = (cisif_sarea_t *)s; - cisif_sarea_t sarea_int; - - if (sarea->strg_size < yuv_size) + if (total_size < yuv_size) { return -EINVAL; } /* Set for YUV */ - sarea_int.strg_addr = sarea->strg_addr; - sarea_int.strg_size = yuv_size; - cisif_set_yuv_sarea(&sarea_int); + cisif_set_yuv_sarea(addr, yuv_size); /* Set for JPEG */ - sarea_int.strg_addr = sarea->strg_addr + yuv_size; - sarea_int.strg_size = sarea->strg_size - yuv_size; - - cisif_set_jpg_sarea(&sarea_int); + cisif_set_jpg_sarea(addr + yuv_size, total_size - yuv_size); return OK; } /**************************************************************************** - * Public Functions + * cisif_chk_jpgfrmsize ****************************************************************************/ +static int cisif_chk_jpgfrmsize(int w, int h) +{ + if ((w < JPG_HSIZE_MIN) || + (w > JPG_HSIZE_MAX)) + { + return -EINVAL; + } + + if ((h < JPG_VSIZE_MIN) || + (h > JPG_VSIZE_MAX)) + { + return -EINVAL; + } + + return OK; +} + /**************************************************************************** - * cxd56_cisifinit + * cisif_chk_yuvfrmsize ****************************************************************************/ -int cxd56_cisifinit(void) +static int cisif_chk_yuvfrmsize(int w, int h) +{ + if ((w < YUV_HSIZE_MIN) || + (w > YUV_HSIZE_MAX)) + { + return -EINVAL; + } + + if ((h < YUV_VSIZE_MIN) || + (h > YUV_VSIZE_MAX)) + { + return -EINVAL; + } + + return OK; +} + +/**************************************************************************** + * cxd56_cisif_init + ****************************************************************************/ + +static int cxd56_cisif_init(void) { if (g_state != STATE_STANDBY) { @@ -708,15 +795,14 @@ int cxd56_cisifinit(void) #endif g_state = STATE_READY; - return OK; } /**************************************************************************** - * cxd56_cisiffinalize + * cxd56_cisif_uninit ****************************************************************************/ -int cxd56_cisiffinalize(void) +static int cxd56_cisif_uninit(void) { if (g_state != STATE_READY) { @@ -741,19 +827,28 @@ int cxd56_cisiffinalize(void) cxd56_img_cisif_clock_disable(); g_state = STATE_STANDBY; - return OK; } /**************************************************************************** - * cxd56_cisifstartcapturing + * cxd56_cisif_start_capture ****************************************************************************/ -int cxd56_cisifstartcapture( - cisif_param_t *param, - cisif_sarea_t *sarea) +static int cxd56_cisif_start_capture + (uint8_t nr_fmt, + FAR imgdata_format_t *fmt, + FAR imgdata_interval_t *interval, + imgdata_capture_t callback) { - uint32_t cisif_mode; + cisif_param_t param = + { + 0 + }; + + cisif_yuv_param_t *yuv = ¶m.yuv_param; + cisif_jpg_param_t *jpg = ¶m.jpg_param; + + uint32_t mode; uint32_t interrupts = VS_INT; int ret; @@ -762,7 +857,22 @@ int cxd56_cisifstartcapture( return -EPERM; } - ret = cisif_check_param(param); + param.format = fmt[IMGDATA_FMT_MAIN].pixelformat; + if (param.format != IMGDATA_PIX_FMT_JPEG) + { + if (is_uncompressed(param.format)) + { + yuv->hsize = fmt[IMGDATA_FMT_MAIN].width; + yuv->vsize = fmt[IMGDATA_FMT_MAIN].height; + } + else + { + yuv->hsize = fmt[IMGDATA_FMT_SUB].width; + yuv->vsize = fmt[IMGDATA_FMT_SUB].height; + } + } + + ret = cisif_check_param(¶m); if (ret != OK) { return ret; @@ -770,39 +880,29 @@ int cxd56_cisifstartcapture( cisif_reg_write(CISIF_INTR_DISABLE, ALL_CLEAR_INT); - ret = cisif_check_sarea(sarea); - if (ret != OK) + switch (param.format) { - return ret; - } + case IMGDATA_PIX_FMT_UYVY: + case IMGDATA_PIX_FMT_RGB565: - switch (param->format) - { - case V4L2_PIX_FMT_UYVY: - cisif_set_yuv_param(param); - cisif_set_yuv_sarea(sarea); + cisif_set_yuv_param(yuv); - cisif_mode = MODE_YUV_TRS_EN; + mode = MODE_YUV_TRS_EN; interrupts |= YCC_INT_ALL; break; - case V4L2_PIX_FMT_JPEG: - cisif_set_jpg_param(param); - cisif_set_jpg_sarea(sarea); + case IMGDATA_PIX_FMT_JPEG: + cisif_set_jpg_param(jpg); - cisif_mode = MODE_JPG_TRS_EN; + mode = MODE_JPG_TRS_EN; interrupts |= JPG_INT_ALL; break; - case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: - cisif_set_yuv_param(param); - cisif_set_jpg_param(param); + case IMGDATA_PIX_FMT_JPEG_WITH_SUBIMG: + cisif_set_yuv_param(yuv); + cisif_set_jpg_param(jpg); - cisif_set_intlev_sarea(sarea, - YUV_SIZE(param->yuv_param.vsize, - param->yuv_param.hsize)); - - cisif_mode = MODE_INTLEV_TRS_EN; + mode = MODE_INTLEV_TRS_EN; interrupts |= YCC_INT_ALL | JPG_INT_ALL; g_jpgint_receive = false; break; @@ -811,8 +911,7 @@ int cxd56_cisifstartcapture( return -EINVAL; } - g_comp_callback_func = param->comp_func; - g_storage_addr = (uint32_t)sarea->strg_addr; + g_cxd56_cisif_complete_capture = callback; g_state = STATE_CAPTURE; @@ -826,17 +925,16 @@ int cxd56_cisifstartcapture( interrupts |= JPG_NSTORAGE_INT; } - cisif_reg_write(CISIF_MODE, cisif_mode); + cisif_reg_write(CISIF_MODE, mode); cisif_reg_write(CISIF_INTR_CLEAR, interrupts); cisif_reg_write(CISIF_INTR_ENABLE, interrupts); cisif_reg_write(CISIF_DIN_ENABLE, 1); - cisif_reg_write(CISIF_EXE_CMD, 1); return OK; } -int cxd56_cisifstopcapture(void) +static int cxd56_cisif_stop_capture(void) { g_state = STATE_READY; cisif_reg_write(CISIF_DIN_ENABLE, 0); @@ -846,42 +944,54 @@ int cxd56_cisifstopcapture(void) return OK; } -int cxd56_cisifsetdmabuf(cisif_sarea_t *sarea) +static int cxd56_cisif_validate_buf(uint8_t *addr, uint32_t size) +{ + if (ILLEGAL_BUFADDR_ALIGNMENT(addr) || + size == 0) + { + return -EINVAL; + } + + return OK; +} + +static int cxd56_cisif_set_buf(uint8_t *addr, uint32_t size) { int ret; - uint32_t cisif_mode; - uint32_t yuv_regsize; - uint32_t yuv_hsize; - uint32_t yuv_vsize; + uint32_t mode; + uint32_t regval; + uint16_t w; + uint16_t h; - ret = cisif_check_sarea(sarea); + ret = cxd56_cisif_validate_buf(addr, size); if (ret != OK) { return ret; } - cisif_mode = cisif_reg_read(CISIF_MODE); + mode = cisif_reg_read(CISIF_MODE); - switch (cisif_mode) + switch (mode) { case MODE_YUV_TRS_EN: - ret = cisif_set_yuv_sarea(sarea); + ret = cisif_set_yuv_sarea(addr, size); break; case MODE_JPG_TRS_EN: - ret = cisif_set_jpg_sarea(sarea); + ret = cisif_set_jpg_sarea(addr, size); break; default: /* MODE_INTLEV_TRS_EN */ /* Get YUV frame size information */ - yuv_regsize = cisif_reg_read(CISIF_ACT_SIZE); - yuv_vsize = (yuv_regsize >> 16) & 0x1ff; - yuv_hsize = yuv_regsize & 0x01ff; + regval = cisif_reg_read(CISIF_ACT_SIZE); + h = (regval >> 16) & 0x1ff; + w = regval & 0x01ff; - ret = cisif_set_intlev_sarea(sarea, - YUV_SIZE(yuv_vsize, yuv_hsize)); + ret = cisif_set_intlev_sarea(addr, + size, + YUV_SIZE(w, h)); break; } @@ -891,7 +1001,83 @@ int cxd56_cisifsetdmabuf(cisif_sarea_t *sarea) } cisif_reg_write(CISIF_EXE_CMD, 1); - g_storage_addr = (uint32_t)sarea->strg_addr; + g_storage_addr = (uint32_t)addr; return ret; } + +static int cxd56_cisif_validate_frame_setting + (uint8_t nr_datafmt, + FAR imgdata_format_t *datafmt, + FAR imgdata_interval_t *interval) +{ + int ret = OK; + + if ((nr_datafmt < CISIF_FMT_MIN) || (nr_datafmt > CISIF_FMT_MAX)) + { + return -EINVAL; + } + + switch (datafmt[IMGDATA_FMT_MAIN].pixelformat) + { + case IMGDATA_PIX_FMT_UYVY: /* YUV 4:2:2 */ + case IMGDATA_PIX_FMT_RGB565: /* RGB565 */ + + ret = cisif_chk_yuvfrmsize(datafmt[IMGDATA_FMT_MAIN].width, + datafmt[IMGDATA_FMT_MAIN].height); + break; + + case IMGDATA_PIX_FMT_JPEG: /* JPEG */ + + ret = cisif_chk_jpgfrmsize(datafmt[IMGDATA_FMT_MAIN].width, + datafmt[IMGDATA_FMT_MAIN].height); + break; + + case IMGDATA_PIX_FMT_JPEG_WITH_SUBIMG: /* JPEG + YUV 4:2:2 */ + + if ((nr_datafmt == 2) && + !is_uncompressed(datafmt[IMGDATA_FMT_SUB].pixelformat)) + { + /* Unsupported pixel format */ + + return -EINVAL; + } + + ret = cisif_chk_jpgfrmsize(datafmt[IMGDATA_FMT_MAIN].width, + datafmt[IMGDATA_FMT_MAIN].height); + if (ret != OK) + { + return ret; + } + + if (nr_datafmt == 2) + { + ret = cisif_chk_yuvfrmsize + (datafmt[IMGDATA_FMT_SUB].width, + datafmt[IMGDATA_FMT_SUB].height); + } + + break; + + default: /* Unsupported pixel format */ + + return -EINVAL; + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * cxd56_cisif_initialize + ****************************************************************************/ + +int cxd56_cisif_initialize(void) +{ + imgdata_register(&g_cxd56_cisif_ops); + return OK; +} + diff --git a/arch/arm/src/cxd56xx/cxd56_clock.c b/arch/arm/src/cxd56xx/cxd56_clock.c index 7a05641f636..98472cb85c3 100644 --- a/arch/arm/src/cxd56xx/cxd56_clock.c +++ b/arch/arm/src/cxd56xx/cxd56_clock.c @@ -77,10 +77,6 @@ #define APDID_HPADC 12 #define APDID_LPADC 13 -/* Compiler hint shortcut */ - -#define __unused __attribute__((unused)) - #define ALIGNUP(v, a) (((v) + ((a) - 1)) & ~((a) - 1)) #define TILESIZESHIT 17 #define TILESIZE (1 << TILESIZESHIT) @@ -133,11 +129,11 @@ static void cxd56_img_clock_enable(void); static void cxd56_img_clock_disable(void); static void cxd56_scu_clock_ctrl(uint32_t block, uint32_t intr, int on); static void cxd56_scu_peri_clock_enable(FAR const struct scu_peripheral *p) - __unused; + unused_code; static void cxd56_scu_peri_clock_disable(FAR const struct scu_peripheral *p) - __unused; + unused_code; static void cxd56_scu_peri_clock_gating(FAR const struct scu_peripheral *p, - int enable) __unused; + int enable) unused_code; /**************************************************************************** * Public Data diff --git a/arch/arm/src/cxd56xx/cxd56_cpupause.c b/arch/arm/src/cxd56xx/cxd56_cpupause.c index 46aadaa0426..3bd3be92675 100644 --- a/arch/arm/src/cxd56xx/cxd56_cpupause.c +++ b/arch/arm/src/cxd56xx/cxd56_cpupause.c @@ -295,12 +295,12 @@ int arm_pause_handler(int irq, void *c, FAR void *arg) /* NOTE: Normally, we do not call up_cpu_paused() here because * the above enter_critical_setion() would call up_cpu_paused() * inside because the caller holds a crtical section. - * Howerver, cxd56's remote IRQ control logic also uses this handler + * However, cxd56's remote IRQ control logic also uses this handler * and a caller might not take a critical section to avoid a deadlock * during up_enable_irq() and up_disable_irq(). This is allowed * because IRQ control logic does not interact wtih the scheduler. * This means that if the request was not handled above, we need - * to call up_cpu_puased() here again. + * to call up_cpu_paused() here again. */ if (up_cpu_pausereq(cpu)) diff --git a/arch/arm/src/cxd56xx/cxd56_cpustart.c b/arch/arm/src/cxd56xx/cxd56_cpustart.c index 266a7ede8dd..bbdea2c4ddd 100644 --- a/arch/arm/src/cxd56xx/cxd56_cpustart.c +++ b/arch/arm/src/cxd56xx/cxd56_cpustart.c @@ -137,14 +137,14 @@ static void appdsp_boot(void) * Name: up_cpu_start * * Description: - * In an SMP configution, only one CPU is initially active (CPU 0). System - * initialization occurs on that single thread. At the completion of the - * initialization of the OS, just before beginning normal multitasking, + * In an SMP configuration, only one CPU is initially active (CPU 0). + * System initialization occurs on that single thread. At the completion of + * the initialization of the OS, just before beginning normal multitasking, * the additional CPUs would be started by calling this function. * - * Each CPU is provided the entry point to is IDLE task when started. A + * Each CPU is provided the entry point to its IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or + * CPU's g_assignedtasks[cpu] list. No stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each @@ -152,8 +152,8 @@ static void appdsp_boot(void) * * Input Parameters: * cpu - The index of the CPU being started. This will be a numeric - * value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU - * 0 is already active) + * value in the range of one to (CONFIG_SMP_NCPUS-1). + * (CPU 0 is already active) * * Returned Value: * Zero on success; a negated errno value on failure. diff --git a/arch/arm/src/cxd56xx/cxd56_emmc.h b/arch/arm/src/cxd56xx/cxd56_emmc.h index f71bfa5412b..91f3211e439 100644 --- a/arch/arm/src/cxd56xx/cxd56_emmc.h +++ b/arch/arm/src/cxd56xx/cxd56_emmc.h @@ -39,7 +39,7 @@ extern "C" #endif /**************************************************************************** - * Public Function Protoypes + * Public Function Prototypes ****************************************************************************/ int cxd56_emmcinitialize(void); diff --git a/arch/arm/src/cxd56xx/cxd56_farapi.c b/arch/arm/src/cxd56xx/cxd56_farapi.c index bf7cf986c07..aaddaa83c1e 100644 --- a/arch/arm/src/cxd56xx/cxd56_farapi.c +++ b/arch/arm/src/cxd56xx/cxd56_farapi.c @@ -182,7 +182,7 @@ static int cxd56_farapidonehandler(int cpuid, int protoid, * Public Functions ****************************************************************************/ -__attribute__((used)) +unused_code void farapi_main(int id, void *arg, struct modulelist_s *mlist) { struct farmsg_s msg; diff --git a/arch/arm/src/cxd56xx/cxd56_gnss_api.h b/arch/arm/src/cxd56xx/cxd56_gnss_api.h index 9fe707732d2..be8d7f409ff 100644 --- a/arch/arm/src/cxd56xx/cxd56_gnss_api.h +++ b/arch/arm/src/cxd56xx/cxd56_gnss_api.h @@ -54,7 +54,7 @@ #define CXD56_GNSS_OPMOD_1PSS 5 /**************************************************************************** - * Public Function Protoypes + * Public Function Prototypes ****************************************************************************/ /* Start a positioning diff --git a/arch/arm/src/cxd56xx/cxd56_scufifo.c b/arch/arm/src/cxd56xx/cxd56_scufifo.c index 90e86919cf1..e792abfc82a 100644 --- a/arch/arm/src/cxd56xx/cxd56_scufifo.c +++ b/arch/arm/src/cxd56xx/cxd56_scufifo.c @@ -43,8 +43,6 @@ #define FIFOMEMSIZE 40960 -#define __unused __attribute__((unused)) - /**************************************************************************** * Private Types ****************************************************************************/ diff --git a/arch/arm/src/cxd56xx/cxd56_serial.c b/arch/arm/src/cxd56xx/cxd56_serial.c index 5ece1db4ccb..859fabb4e33 100644 --- a/arch/arm/src/cxd56xx/cxd56_serial.c +++ b/arch/arm/src/cxd56xx/cxd56_serial.c @@ -992,7 +992,7 @@ static void up_txint(FAR struct uart_dev_s *dev, bool enable) FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->priv; irqstate_t flags; - flags = enter_critical_section(); + flags = spin_lock_irqsave(&priv->lock); if (enable) { #ifndef CONFIG_SUPPRESS_SERIAL_INTS @@ -1003,7 +1003,9 @@ static void up_txint(FAR struct uart_dev_s *dev, bool enable) * interrupts disabled (note this may recurse). */ + spin_unlock_irqrestore(&priv->lock, flags); uart_xmitchars(dev); + flags = spin_lock_irqsave(&priv->lock); #endif } else @@ -1012,7 +1014,7 @@ static void up_txint(FAR struct uart_dev_s *dev, bool enable) up_serialout(priv, CXD56_UART_IMSC, priv->ier); } - leave_critical_section(flags); + spin_unlock_irqrestore(&priv->lock, flags); } /**************************************************************************** diff --git a/arch/arm/src/cxd56xx/cxd56_sfc.c b/arch/arm/src/cxd56xx/cxd56_sfc.c index ec80a7c2160..3ed01c8b777 100644 --- a/arch/arm/src/cxd56xx/cxd56_sfc.c +++ b/arch/arm/src/cxd56xx/cxd56_sfc.c @@ -102,7 +102,7 @@ static ssize_t cxd56_bread(FAR struct mtd_dev_s *dev, off_t startblock, { int ret; - finfo("bread: %" PRIxOFF "(%u blocks)\n", + finfo("bread: %" PRIxOFF " (%u blocks)\n", startblock << PAGE_SHIFT, nblocks); ret = fw_fm_rawread(startblock << PAGE_SHIFT, buffer, @@ -143,7 +143,7 @@ static ssize_t cxd56_read(FAR struct mtd_dev_s *dev, off_t offset, { int ret; - finfo("read: %" PRIxOFF "(%u bytes)\n", offset, nbytes); + finfo("read: %" PRIxOFF " (%u bytes)\n", offset, nbytes); ret = fw_fm_rawread(offset, buffer, nbytes); if (ret < 0) diff --git a/arch/arm/src/cxd56xx/cxd56_sph.h b/arch/arm/src/cxd56xx/cxd56_sph.h index c05ecacd32a..1eb82fcd602 100644 --- a/arch/arm/src/cxd56xx/cxd56_sph.h +++ b/arch/arm/src/cxd56xx/cxd56_sph.h @@ -48,7 +48,7 @@ extern "C" #endif /**************************************************************************** - * Public Function Protoypes + * Public Function Prototypes ****************************************************************************/ int cxd56_sphinitialize(FAR const char *devname); diff --git a/arch/arm/src/cxd56xx/cxd56_spi.c b/arch/arm/src/cxd56xx/cxd56_spi.c index f8fbd12abe7..110a92e1f26 100644 --- a/arch/arm/src/cxd56xx/cxd56_spi.c +++ b/arch/arm/src/cxd56xx/cxd56_spi.c @@ -57,14 +57,6 @@ #ifdef CONFIG_CXD56_SPI -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#ifndef __unused -#define __unused __attribute__((unused)) -#endif - /**************************************************************************** * Private Types ****************************************************************************/ @@ -110,9 +102,9 @@ static inline void spi_putreg(FAR struct cxd56_spidev_s *priv, /* DMA support */ #ifdef CONFIG_CXD56_DMAC -static void __unused spi_dmaexchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, - FAR void *rxbuffer, size_t nwords); +static void unused_code spi_dmaexchange(FAR struct spi_dev_s *dev, + FAR const void *txbuffer, + FAR void *rxbuffer, size_t nwords); static void spi_dmatrxwait(FAR struct cxd56_spidev_s *priv); static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t status, void *data); static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t status, void *data); @@ -134,10 +126,10 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode); static void spi_setbits(FAR struct spi_dev_s *dev, int nbits); static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t wd); -static void __unused spi_exchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, - FAR void *rxbuffer, - size_t nwords); +static void unused_code spi_exchange(FAR struct spi_dev_s *dev, + FAR const void *txbuffer, + FAR void *rxbuffer, + size_t nwords); #ifndef CONFIG_SPI_EXCHANGE static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords); diff --git a/arch/arm/src/cxd56xx/cxd56_testset.c b/arch/arm/src/cxd56xx/cxd56_testset.c index ecc6580d7ab..672c98e4e27 100644 --- a/arch/arm/src/cxd56xx/cxd56_testset.c +++ b/arch/arm/src/cxd56xx/cxd56_testset.c @@ -76,18 +76,18 @@ spinlock_t up_testset2(volatile FAR spinlock_t *lock) * Name: up_testset * * Description: - * Perform and atomic test and set operation on the provided spinlock. + * Perform an atomic test and set operation on the provided spinlock. * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ diff --git a/arch/arm/src/cxd56xx/cxd56_udmac.c b/arch/arm/src/cxd56xx/cxd56_udmac.c index fa9c7440f22..0d59c5790bc 100644 --- a/arch/arm/src/cxd56xx/cxd56_udmac.c +++ b/arch/arm/src/cxd56xx/cxd56_udmac.c @@ -114,7 +114,7 @@ static struct dma_channel_s g_dmach[CXD56_DMA_NCHANNELS]; #endif static struct dma_descriptor_s g_descriptors[CXD56_DMA_NCHANNELS] - __attribute__((aligned(DESC_TABLE_ALIGN))); + aligned_data(DESC_TABLE_ALIGN); /**************************************************************************** * Public Data diff --git a/arch/arm/src/cxd56xx/cxd56_usbdev.c b/arch/arm/src/cxd56xx/cxd56_usbdev.c index fb23f3dfbcd..bbcedd471fb 100644 --- a/arch/arm/src/cxd56xx/cxd56_usbdev.c +++ b/arch/arm/src/cxd56xx/cxd56_usbdev.c @@ -96,10 +96,6 @@ (PHY_STAGSELECT | PHY_HSFALLCNTRL | PHY_IHSTX(0xc) | PHY_INHSRFRED | \ PHY_INHSIPLUS | PHY_INHSDRVSLEW| PHY_INLFSFBCAP) -#ifndef __aligned -# define __aligned(x) __attribute__((aligned(x))) -#endif - /* Debug ********************************************************************/ /* Trace error codes */ @@ -556,9 +552,9 @@ static struct cxd56_usbdev_s g_usbdev; /* DMA Descriptors for each endpoints */ -static struct cxd56_setup_desc_s __aligned(4) g_ep0setup; -static struct cxd56_data_desc_s __aligned(4) g_ep0in; -static struct cxd56_data_desc_s __aligned(4) g_ep0out; +static struct cxd56_setup_desc_s aligned_data(4) g_ep0setup; +static struct cxd56_data_desc_s aligned_data(4) g_ep0in; +static struct cxd56_data_desc_s aligned_data(4) g_ep0out; /* Summarizes information about all CXD56 endpoints */ diff --git a/arch/arm/src/dm320/Make.defs b/arch/arm/src/dm320/Make.defs index a4783975989..489834cec9f 100644 --- a/arch/arm/src/dm320/Make.defs +++ b/arch/arm/src/dm320/Make.defs @@ -29,7 +29,7 @@ CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c -CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_puts.c ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CMN_CSRCS += arm_idle.c diff --git a/arch/arm/src/efm32/Kconfig b/arch/arm/src/efm32/Kconfig index 42247b60922..cb091a25670 100644 --- a/arch/arm/src/efm32/Kconfig +++ b/arch/arm/src/efm32/Kconfig @@ -129,17 +129,17 @@ config EFM32_DMA select ARCH_DMA config EFM32_RMU - bool "Reset Management Unit (RMU) " + bool "Reset Management Unit (RMU)" default n config EFM32_FLASHPROG - bool "Enable Erase/Write flash function (MSC) " + bool "Enable Erase/Write flash function (MSC)" default n select ARCH_HAVE_PROGMEM select ARCH_HAVE_RAMFUNCS config EFM32_RMU_DEBUG - bool "Reset Management Unit (RMU) DEBUG " + bool "Reset Management Unit (RMU) DEBUG" default n depends on EFM32_RMU && DEBUG_FEATURES diff --git a/arch/arm/src/efm32/Make.defs b/arch/arm/src/efm32/Make.defs index 670d1a9132f..55e6d6ed357 100644 --- a/arch/arm/src/efm32/Make.defs +++ b/arch/arm/src/efm32/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c @@ -29,6 +29,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) CMN_ASRCS += arm_lazyexception.S diff --git a/arch/arm/src/efm32/efm32_adc.c b/arch/arm/src/efm32/efm32_adc.c index 4b15a281e15..43b936fa2b4 100644 --- a/arch/arm/src/efm32/efm32_adc.c +++ b/arch/arm/src/efm32/efm32_adc.c @@ -39,6 +39,7 @@ #include #include #include +#include #include "arm_internal.h" #include "arm_arch.h" @@ -1174,7 +1175,28 @@ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable) static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) { - return -ENOTTY; + FAR struct efm32_dev_s *priv = (FAR struct efm32_dev_s *)dev->ad_priv; + int ret = -ENOTTY; + + switch (cmd) + { + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->nchannels; + } + break; + + default: + { + aerr("ERROR: Unknown cmd: %d\n", cmd); + ret = -ENOTTY; + } + break; + } + + return ret; } /**************************************************************************** diff --git a/arch/arm/src/efm32/efm32_dma.c b/arch/arm/src/efm32/efm32_dma.c index c3a8494e1c5..447317f1fc1 100644 --- a/arch/arm/src/efm32/efm32_dma.c +++ b/arch/arm/src/efm32/efm32_dma.c @@ -113,10 +113,10 @@ static struct dma_channel_s g_dmach[EFM32_DMA_NCHANNELS]; #ifdef CONFIG_EFM32_DMA_ALTDSEC static struct dma_descriptor_s g_descriptors[DESC_TABLE_SIZE + EFM32_DMA_NCHANNELS] - __attribute__((aligned(DESC_TABLE_ALIGN))); + aligned_data(DESC_TABLE_ALIGN); #else static struct dma_descriptor_s g_descriptors[EFM32_DMA_NCHANNELS] - __attribute__((aligned(DESC_TABLE_ALIGN))); + aligned_data(DESC_TABLE_ALIGN); #endif /**************************************************************************** diff --git a/arch/arm/src/efm32/efm32_i2c.c b/arch/arm/src/efm32/efm32_i2c.c index d5cc6738adb..543943a9df5 100644 --- a/arch/arm/src/efm32/efm32_i2c.c +++ b/arch/arm/src/efm32/efm32_i2c.c @@ -1,39 +1,20 @@ /**************************************************************************** * arch/arm/src/efm32/efm32_i2c.c - * EFM32 I2C Hardware Layer - Device Driver * - * Copyright (C) 2015 Pierre-noel Bouteville . All rights reserved. - * Authors: Pierre-noel Bouteville + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/eoss3/Make.defs b/arch/arm/src/eoss3/Make.defs index 61492fe065d..d17309d51bb 100644 --- a/arch/arm/src/eoss3/Make.defs +++ b/arch/arm/src/eoss3/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c @@ -29,6 +29,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) CMN_ASRCS += arm_lazyexception.S diff --git a/arch/arm/src/eoss3/eoss3_serial.c b/arch/arm/src/eoss3/eoss3_serial.c index d5030c8923f..737cd3ec129 100644 --- a/arch/arm/src/eoss3/eoss3_serial.c +++ b/arch/arm/src/eoss3/eoss3_serial.c @@ -478,8 +478,8 @@ static void eoss3_send(struct uart_dev_s *dev, int ch) * Name: eoss3_txint * * Description: - * Normally would turn on and off the tx empty interrupt instead we are - * enableing a kernel worker because there is no interrupt. This worker + * Normally would turn on and off the tx empty interrupt; instead, we are + * enabling a kernel worker because there is no interrupt. This worker * will requeue and dequeue itself as needed. * ****************************************************************************/ diff --git a/arch/arm/src/eoss3/eoss3_start.c b/arch/arm/src/eoss3/eoss3_start.c index 263c4c672f3..a288c6ace24 100644 --- a/arch/arm/src/eoss3/eoss3_start.c +++ b/arch/arm/src/eoss3/eoss3_start.c @@ -98,7 +98,7 @@ static inline void eoss3_fpuconfig(void); #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/imx1/Make.defs b/arch/arm/src/imx1/Make.defs index d639c4df1ff..c9e10f950f4 100644 --- a/arch/arm/src/imx1/Make.defs +++ b/arch/arm/src/imx1/Make.defs @@ -28,7 +28,7 @@ CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c -CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_puts.c ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CMN_CSRCS += arm_idle.c diff --git a/arch/arm/src/imx6/imx_enet.c b/arch/arm/src/imx6/imx_enet.c index 37427dfa39c..cdbb256c9b6 100644 --- a/arch/arm/src/imx6/imx_enet.c +++ b/arch/arm/src/imx6/imx_enet.c @@ -306,7 +306,7 @@ static struct imx_driver_s g_enet[CONFIG_IMX_ENET_NETHIFS]; */ static uint8_t g_desc_pool[NENET_NBUFFERS * sizeof(struct enet_desc_s)] - __attribute__((aligned(ENET_ALIGN))); + aligned_data(ENET_ALIGN); /* The DMA buffers. Again, A unaligned uint8_t is used to allocate the * memory; 16 is added to assure that we can meet the descriptor alignment @@ -314,7 +314,7 @@ static uint8_t g_desc_pool[NENET_NBUFFERS * sizeof(struct enet_desc_s)] */ static uint8_t g_buffer_pool[NENET_NBUFFERS * IMX_BUF_SIZE] - __attribute__((aligned(ENET_ALIGN))); + aligned_data(ENET_ALIGN); /**************************************************************************** * Private Function Prototypes diff --git a/arch/arm/src/imxrt/Kconfig b/arch/arm/src/imxrt/Kconfig index e1165ea4e7b..5371be09527 100644 --- a/arch/arm/src/imxrt/Kconfig +++ b/arch/arm/src/imxrt/Kconfig @@ -1909,6 +1909,31 @@ config IMXRT_DATA_RISING_EDGE endmenu # LCD Configuration +menu "Timer Configuration" + +if SCHED_TICKLESS + +config IMXRT_TICKLESS_TIMER + int "Tickless hardware timer" + default 1 + range 1 2 + ---help--- + If the Tickless OS feature is enabled, then one clock must be + assigned to provided the GPT timer needed by the OS. + +config IMXRT_TICKLESS_CHANNEL + int "Tickless timer channel" + default 1 + range 1 3 + ---help--- + If the Tickless OS feature is enabled, the one clock must be + assigned to provided the free-running timer needed by the OS + and one channel on that clock is needed to handle intervals. + +endif # SCHED_TICKLESS + +endmenu # Timer Configuration + if IMXRT_USBOTG && USBHOST menu "USB host controller driver (HCD) options" diff --git a/arch/arm/src/imxrt/Make.defs b/arch/arm/src/imxrt/Make.defs index ae9026135ad..70c1bc2a97a 100644 --- a/arch/arm/src/imxrt/Make.defs +++ b/arch/arm/src/imxrt/Make.defs @@ -20,7 +20,7 @@ # Common ARM and Cortex-M7 files -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c @@ -31,6 +31,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_systemreset.c +CMN_CSRCS += arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARMV7M_STACKCHECK),y) CMN_CSRCS += arm_stackcheck.c @@ -86,6 +87,8 @@ endif ifneq ($(CONFIG_SCHED_TICKLESS),y) CHIP_CSRCS += imxrt_timerisr.c +else +CHIP_CSRCS += imxrt_tickless.c endif ifeq ($(CONFIG_IMXRT_GPIO_IRQ),y) diff --git a/arch/arm/src/imxrt/hardware/imxrt_flexcan.h b/arch/arm/src/imxrt/hardware/imxrt_flexcan.h index 153058711ed..ae93284598a 100644 --- a/arch/arm/src/imxrt/hardware/imxrt_flexcan.h +++ b/arch/arm/src/imxrt/hardware/imxrt_flexcan.h @@ -418,11 +418,11 @@ /* CAN FD CRC register */ -#define CAN_FDCRC_FD_TXCRC_SHIFT (0) /* Bits 0-20: Extended Tranmitted CRC value */ +#define CAN_FDCRC_FD_TXCRC_SHIFT (0) /* Bits 0-20: Extended Transmitted CRC value */ #define CAN_FDCRC_FD_TXCRC_MASK (0x1fffff << CAN_FDCRC_FD_TXCRC_SHIFT) #define CAN_FDCRC_FD_TXCRC(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCRC_FD_TXCRC_SHIFT)) & CAN_FDCRC_FD_TXCRC_MASK) /* Bits 21-23: Reserved */ -#define CAN_FDCRC_FD_MBCRC_SHIFT (24) /* Bits 24-30: Extended Tranmitted CRC value */ +#define CAN_FDCRC_FD_MBCRC_SHIFT (24) /* Bits 24-30: Extended Transmitted CRC value */ #define CAN_FDCRC_FD_MBCRC_MASK (0x7f << CAN_FDCRC_FD_MBCRC_SHIFT) #define CAN_FDCRC_FD_MBCRC(x) (((uint32_t)(((uint32_t)(x)) << CAN_FDCRC_FD_MBCRC_SHIFT)) & CAN_FDCRC_FD_MBCRC_MASK) /* Bit 31: Reserved */ diff --git a/arch/arm/src/imxrt/imxrt_adc.c b/arch/arm/src/imxrt/imxrt_adc.c index b4927a7f7c7..4dece9d3f50 100644 --- a/arch/arm/src/imxrt/imxrt_adc.c +++ b/arch/arm/src/imxrt/imxrt_adc.c @@ -37,6 +37,7 @@ #include #include #include +#include #include "arm_internal.h" #include "arm_arch.h" @@ -458,11 +459,30 @@ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable) static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) { - /* No ioctl commands supported */ - /* TODO: ANIOC_TRIGGER, for SW triggered conversion */ - return -ENOTTY; + FAR struct imxrt_dev_s *priv = (FAR struct imxrt_dev_s *)dev->ad_priv; + int ret = -ENOTTY; + + switch (cmd) + { + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->nchannels; + } + break; + + default: + { + aerr("ERROR: Unknown cmd: %d\n", cmd); + ret = -ENOTTY; + } + break; + } + + return ret; } /**************************************************************************** diff --git a/arch/arm/src/imxrt/imxrt_edma.c b/arch/arm/src/imxrt/imxrt_edma.c index 60fa10947cd..26dd9a6581f 100644 --- a/arch/arm/src/imxrt/imxrt_edma.c +++ b/arch/arm/src/imxrt/imxrt_edma.c @@ -171,7 +171,7 @@ static sq_queue_t g_tcd_free; /* This is a pool of pre-allocated TCDs */ static struct imxrt_edmatcd_s g_tcd_pool[CONFIG_IMXRT_EDMA_NTCD] - __attribute__((aligned(EDMA_ALIGN))); + aligned_data(EDMA_ALIGN); #endif /**************************************************************************** diff --git a/arch/arm/src/imxrt/imxrt_ehci.c b/arch/arm/src/imxrt/imxrt_ehci.c index d5c031c060f..ff83ee17813 100644 --- a/arch/arm/src/imxrt/imxrt_ehci.c +++ b/arch/arm/src/imxrt/imxrt_ehci.c @@ -582,17 +582,17 @@ static const uint8_t g_ehci_speed[4] = /* The head of the asynchronous queue */ -static struct imxrt_qh_s g_asynchead __attribute__ ((aligned(32))); +static struct imxrt_qh_s g_asynchead aligned_data(32); #ifndef CONFIG_USBHOST_INT_DISABLE /* The head of the periodic queue */ -static struct imxrt_qh_s g_intrhead __attribute__ ((aligned(32))); +static struct imxrt_qh_s g_intrhead aligned_data(32); /* The frame list */ #ifdef CONFIG_IMXRT_EHCI_PREALLOCATE -static uint32_t g_framelist[FRAME_LIST_SIZE] __attribute__ ((aligned(4096))); +static uint32_t g_framelist[FRAME_LIST_SIZE] aligned_data(4096); #else static uint32_t *g_framelist; #endif @@ -606,12 +606,12 @@ static uint32_t *g_framelist; /* Queue Head (QH) pool */ static struct imxrt_qh_s g_qhpool[CONFIG_IMXRT_EHCI_NQHS] - __attribute__ ((aligned(32))); + aligned_data(32); /* Queue Element Transfer Descriptor (qTD) pool */ static struct imxrt_qtd_s g_qtdpool[CONFIG_IMXRT_EHCI_NQTDS] - __attribute__ ((aligned(32))); + aligned_data(32); #else /* Pools of dynamically data structures. These will all be linked into the diff --git a/arch/arm/src/imxrt/imxrt_enc.c b/arch/arm/src/imxrt/imxrt_enc.c index 85168444c90..f5b0a21a021 100644 --- a/arch/arm/src/imxrt/imxrt_enc.c +++ b/arch/arm/src/imxrt/imxrt_enc.c @@ -336,11 +336,12 @@ static int imxrt_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, static const struct qe_ops_s g_qecallbacks = { - .setup = imxrt_setup, - .shutdown = imxrt_shutdown, - .position = imxrt_position, - .reset = imxrt_reset, - .ioctl = imxrt_ioctl, + .setup = imxrt_setup, + .shutdown = imxrt_shutdown, + .position = imxrt_position, + .setposmax = NULL, /* not supported yet */ + .reset = imxrt_reset, + .ioctl = imxrt_ioctl, }; /* Per-timer state structures */ diff --git a/arch/arm/src/imxrt/imxrt_enet.c b/arch/arm/src/imxrt/imxrt_enet.c index d1042d32186..1598c425c69 100644 --- a/arch/arm/src/imxrt/imxrt_enet.c +++ b/arch/arm/src/imxrt/imxrt_enet.c @@ -288,7 +288,7 @@ static struct imxrt_driver_s g_enet[CONFIG_IMXRT_ENET_NETHIFS]; */ static uint8_t g_desc_pool[NENET_NBUFFERS * sizeof(struct enet_desc_s)] - __attribute__((aligned(ENET_ALIGN))); + aligned_data(ENET_ALIGN); /* The DMA buffers. Again, A unaligned uint8_t is used to allocate the * memory; 16 is added to assure that we can meet the descriptor alignment @@ -296,7 +296,7 @@ static uint8_t g_desc_pool[NENET_NBUFFERS * sizeof(struct enet_desc_s)] */ static uint8_t g_buffer_pool[NENET_NBUFFERS * IMXRT_BUF_SIZE] - __attribute__((aligned(ENET_ALIGN))); + aligned_data(ENET_ALIGN); /**************************************************************************** * Private Function Prototypes @@ -1838,7 +1838,7 @@ static int imxrt_ioctl(struct net_driver_s *dev, int cmd, unsigned long arg) static int imxrt_phyintenable(struct imxrt_driver_s *priv) { #if defined(CONFIG_ETH0_PHY_KSZ8051) || defined(CONFIG_ETH0_PHY_KSZ8061) || \ - defined(CONFIG_ETH0_PHY_KSZ8081) + defined(CONFIG_ETH0_PHY_KSZ8081) || defined(CONFIG_ETH0_PHY_DP83825I) uint16_t phyval; int ret; diff --git a/arch/arm/src/imxrt/imxrt_flexcan.c b/arch/arm/src/imxrt/imxrt_flexcan.c index b2ef5dacda7..d44da84d03f 100644 --- a/arch/arm/src/imxrt/imxrt_flexcan.c +++ b/arch/arm/src/imxrt/imxrt_flexcan.c @@ -354,7 +354,7 @@ static inline uint32_t arm_lsb(unsigned int value) * classical can timings * * Returned Value: - * return 1 on succes, return 0 on failure + * return 1 on success, return 0 on failure * ****************************************************************************/ @@ -470,9 +470,6 @@ static void imxrt_setfreeze(uint32_t base, uint32_t freeze); static uint32_t imxrt_waitmcr_change(uint32_t base, uint32_t mask, uint32_t target_state); -static uint32_t imxrt_waitesr2_change(uint32_t base, - uint32_t mask, - uint32_t target_state); static struct mb_s *flexcan_get_mb(FAR struct imxrt_driver_s *priv, uint32_t mbi); @@ -531,10 +528,10 @@ static void imxrt_reset(struct imxrt_driver_s *priv); static bool imxrt_txringfull(FAR struct imxrt_driver_s *priv) { - uint32_t mbi = RXMBCOUNT; + uint32_t mbi = RXMBCOUNT + 1; struct mb_s *mb; - while (mbi < TXMBCOUNT) + while (mbi < TOTALMBCOUNT) { mb = flexcan_get_mb(priv, mbi); if (mb->cs.code != CAN_TXMB_DATAORREMOTE) @@ -583,18 +580,13 @@ static int imxrt_transmit(FAR struct imxrt_driver_s *priv) int32_t timeout; #endif - if ((getreg32(priv->base + IMXRT_CAN_ESR2_OFFSET) & - (CAN_ESR2_IMB | CAN_ESR2_VPS)) == - (CAN_ESR2_IMB | CAN_ESR2_VPS)) - { - mbi = ((getreg32(priv->base + IMXRT_CAN_ESR2_OFFSET) & - CAN_ESR2_LPTM_MASK) >> CAN_ESR2_LPTM_SHIFT); - } - + mbi = RXMBCOUNT + 1; mb_bit = 1 << mbi; while (mbi < TOTALMBCOUNT) { + /* Check whether message buffer is not currently transmitting */ + struct mb_s *mb = flexcan_get_mb(priv, mbi); if (mb->cs.code != CAN_TXMB_DATAORREMOTE) { @@ -771,11 +763,14 @@ static int imxrt_txpoll(struct net_driver_s *dev) { FAR struct imxrt_driver_s *priv = (FAR struct imxrt_driver_s *)dev->d_private; + irqstate_t flags; /* If the polling resulted in data that should be sent out on the network, * the field d_len is set to a value > 0. */ + flags = spin_lock_irqsave(NULL); + if (priv->dev.d_len > 0) { if (!devif_loopback(&priv->dev)) @@ -790,15 +785,16 @@ static int imxrt_txpoll(struct net_driver_s *dev) * not, return a non-zero value to terminate the poll. */ - if (!((getreg32(priv->base + IMXRT_CAN_ESR2_OFFSET) & - (CAN_ESR2_IMB | CAN_ESR2_VPS)) == - (CAN_ESR2_IMB | CAN_ESR2_VPS)) || (imxrt_txringfull(priv))) - { - return -EBUSY; - } + if (imxrt_txringfull(priv)) + { + spin_unlock_irqrestore(NULL, flags); + return -EBUSY; + } } } + spin_unlock_irqrestore(NULL, flags); + /* If zero is returned, the polling will continue until all connections * have been examined. */ @@ -1268,26 +1264,6 @@ static uint32_t imxrt_waitfreezeack_change(uint32_t base, return imxrt_waitmcr_change(base, CAN_MCR_FRZACK, target_state); } -static uint32_t imxrt_waitesr2_change(uint32_t base, uint32_t mask, - uint32_t target_state) -{ - const uint32_t timeout = 1000; - uint32_t wait_ack; - - for (wait_ack = 0; wait_ack < timeout; wait_ack++) - { - uint32_t state = (getreg32(base + IMXRT_CAN_ESR2_OFFSET) & mask); - if (state == target_state) - { - return true; - } - - up_udelay(10); - } - - return false; -} - static struct mb_s *flexcan_get_mb(FAR struct imxrt_driver_s *priv, uint32_t mbi) { @@ -1401,9 +1377,7 @@ static void imxrt_txavail_work(FAR void *arg) * packet. */ - if (imxrt_waitesr2_change(priv->base, - (CAN_ESR2_IMB | CAN_ESR2_VPS), - (CAN_ESR2_IMB | CAN_ESR2_VPS))) + if (!imxrt_txringfull(priv)) { /* No, there is space for another transfer. Poll the network for * new XMIT data. @@ -1479,7 +1453,7 @@ static int imxrt_ioctl(struct net_driver_s *dev, int cmd, { FAR struct imxrt_driver_s *priv = (FAR struct imxrt_driver_s *)dev->d_private; - + struct flexcan_timeseg data_timing; int ret; switch (cmd) @@ -1525,7 +1499,6 @@ static int imxrt_ioctl(struct net_driver_s *dev, int cmd, if (priv->canfd_capable) { - struct flexcan_timeseg data_timing; data_timing.bitrate = req->data_bitrate * 1000; data_timing.samplep = req->data_samplep; diff --git a/arch/arm/src/imxrt/imxrt_flexpwm.c b/arch/arm/src/imxrt/imxrt_flexpwm.c index 9864c6f1851..64913cbdc61 100644 --- a/arch/arm/src/imxrt/imxrt_flexpwm.c +++ b/arch/arm/src/imxrt/imxrt_flexpwm.c @@ -90,7 +90,7 @@ struct imxrt_flexpwm_s FAR struct imxrt_flexpwm_module_s *modules; uint8_t modules_num; /* Number of modules */ uint32_t frequency; /* PWM frequency */ - uint32_t base; /* Base addres of peripheral register */ + uint32_t base; /* Base address of peripheral register */ }; /* PWM driver methods */ @@ -616,10 +616,6 @@ static int pwm_change_freq(FAR struct pwm_lowerhalf_s *dev, putreg16(regval, priv->base + IMXRT_FLEXPWM_SM0VAL5_OFFSET + MODULE_OFFSET * shift); - regval = getreg16(priv->base + IMXRT_FLEXPWM_MCTRL_OFFSET); - regval |= MCTRL_LDOK(1 << shift); - putreg16(regval, priv->base + IMXRT_FLEXPWM_MCTRL_OFFSET); - return OK; } @@ -683,10 +679,6 @@ static int pwm_set_output(FAR struct pwm_lowerhalf_s *dev, uint8_t channel, putreg16(regval, priv->base + IMXRT_FLEXPWM_OUTEN_OFFSET); } - regval = getreg16(priv->base + IMXRT_FLEXPWM_MCTRL_OFFSET); - regval |= MCTRL_LDOK(1 << shift); - putreg16(regval, priv->base + IMXRT_FLEXPWM_MCTRL_OFFSET); - return OK; } @@ -887,6 +879,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, { FAR struct imxrt_flexpwm_s *priv = (FAR struct imxrt_flexpwm_s *)dev; int ret = OK; + uint8_t ldok_map = 0; /* Change frequency only if it is needed */ @@ -894,9 +887,23 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, { for (int i = 0; i < PWM_NCHANNELS; i++) { +#ifdef CONFIG_PWM_MULTICHAN + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + /* Configure the module freq only if is set to be used */ + if (info->channels[i].channel != 0) + { + ret = pwm_change_freq(dev, info, i); + } +#else ret = pwm_change_freq(dev, info, i); +#endif } /* Save current frequency */ @@ -910,17 +917,41 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, #ifdef CONFIG_PWM_MULTICHAN for (int i = 0; ret == OK && i < PWM_NCHANNELS; i++) { + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + /* Enable PWM output for each channel */ - ret = pwm_set_output(dev, info->channels[i].channel, - info->channels[i].duty); + if (info->channels[i].channel != 0) + { + ret = pwm_set_output(dev, info->channels[i].channel, + info->channels[i].duty); + + /* Remember the channel number in bitmap */ + + ldok_map |= 1 << (info->channels[i].channel - 1); + } } #else /* Enable PWM output just for first channel */ ret = pwm_set_output(dev, priv->modules[0].module, info->duty); + + /* Remember the channel number in bitmap */ + + ldok_map = 1 << (priv->modules[0].module - 1); #endif /* CONFIG_PWM_MULTICHAN */ + /* Set Load Okay bits */ + + uint16_t regval = getreg16(priv->base + IMXRT_FLEXPWM_MCTRL_OFFSET); + regval |= MCTRL_LDOK(ldok_map); + putreg16(regval, priv->base + IMXRT_FLEXPWM_MCTRL_OFFSET); + return ret; } diff --git a/arch/arm/src/imxrt/imxrt_lpi2c.c b/arch/arm/src/imxrt/imxrt_lpi2c.c index 534a92feed1..76fa24cc44d 100644 --- a/arch/arm/src/imxrt/imxrt_lpi2c.c +++ b/arch/arm/src/imxrt/imxrt_lpi2c.c @@ -1296,7 +1296,7 @@ static int imxrt_lpi2c_isr_process(struct imxrt_lpi2c_priv_s *priv) { imxrt_lpi2c_traceevent(priv, I2CEVENT_RCVBYTE, priv->dcnt); - /* No interrupts or contex switches should occur in the following + /* No interrupts or context switches should occur in the following * sequence. Otherwise, additional bytes may be sent by the device. */ diff --git a/arch/arm/src/imxrt/imxrt_start.c b/arch/arm/src/imxrt/imxrt_start.c index 24faa07b5d1..f6f6a59c10e 100644 --- a/arch/arm/src/imxrt/imxrt_start.c +++ b/arch/arm/src/imxrt/imxrt_start.c @@ -81,7 +81,7 @@ static inline void imxrt_fpuconfig(void); #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/imxrt/imxrt_tickless.c b/arch/arm/src/imxrt/imxrt_tickless.c new file mode 100644 index 00000000000..67bcc21f911 --- /dev/null +++ b/arch/arm/src/imxrt/imxrt_tickless.c @@ -0,0 +1,603 @@ +/**************************************************************************** + * arch/arm/src/imxrt/imxrt_tickless.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Tickless OS Support. + * + * When CONFIG_SCHED_TICKLESS is enabled, all support for timer interrupts + * is suppressed and the platform specific code is expected to provide the + * following custom functions. + * + * void up_timer_initialize(void): Initializes the timer facilities. + * Called early in the initialization sequence (by up_initialize()). + * int up_timer_gettime(FAR struct timespec *ts): Returns the current + * time from the platform specific time source. + * int up_timer_cancel(void): Cancels the interval timer. + * int up_timer_start(FAR const struct timespec *ts): Start (or re-starts) + * the interval timer. + * + * The RTOS will provide the following interfaces for use by the platform- + * specific interval timer implementation: + * + * void nxsched_timer_expiration(void): Called by the platform-specific + * logic when the interval timer expires. + * + * NOTE + * Only alarm option selected by CONFIG_SCHED_TICKLESS_ALARM is currently + * suported for iMXRT. + * + ****************************************************************************/ + +/**************************************************************************** + * iMXRT Timer Usage + * + * This implementation uses one timer: A free running timer to provide + * the current time and a capture/compare channel for timed-events. + * + * This timer can be either General Purpose Timer (GPT) 1 or 2, which can + * be set by CONFIG_IMXRT_TICKLESS_TIMER. CONFIG_IMXRT_TICKLESS_CHANNEL + * selects which channel generates the interrupt for compare value. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "arm_arch.h" +#include "imxrt_periphclks.h" +#include "hardware/imxrt_gpt.h" +#include "imxrt_irq.h" + +#ifdef CONFIG_SCHED_TICKLESS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Only alarm option is currently supported */ + +#ifndef CONFIG_SCHED_TICKLESS_ALARM +# error Interval timer support is not supported yet, please select alarm +#endif + +/* The Peripheral Clock (ipg_clk) is selected as the GPT clock source. + * + * REVISIT: Here we assume that the Peripheral Clock is 16.6 MHz. That is: + * + * PRECLK_CLOCK_ROOT = IPG_CLOCK_ROOT / IMXRT_PERCLK_PODF_DIVIDER + * where IPG_CLOCK_ROOT = 150 MHz and IMXRT_PERCLK_PODF_DIVIDER = 9 + * + * Those clocks are set in imxrt_clockconfig.c, but makros are defined in + * board level section (file board.h) so clock settings may actually vary + * when using different boards. + * + * So, Peripheral Clock Frequency = 16.6 MHz + */ + +#define GPT_CLOCK 16600000 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct imxrt_tickless_s +{ + uint8_t timer; /* The timer/counter in use */ + uint8_t out_compare; /* Number of output compare channel */ + uint32_t frequency; /* Frequency of the timer */ + uint32_t overflow; /* Timer counter overflow */ + uint32_t irq; /* Interrupt number */ + volatile bool pending; /* True: pending task */ + uint32_t base; /* Base address of the timer */ +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct imxrt_tickless_s g_tickless; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: imxrt_get_counter + * + * Description: + * Get counter value and add it to overflow value + * + * Input Parameters: + * None + * + * Returned Value: + * Counter value + * + ****************************************************************************/ + +static uint64_t imxrt_get_counter(void) +{ + return getreg32(g_tickless.base + IMXRT_GPT_CNT_OFFSET) | \ + ((uint64_t)g_tickless.overflow << 32); +} + +/**************************************************************************** + * Name: imxrt_interval_handler + * + * Description: + * Called when the timer counter matches the compare register + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void imxrt_interval_handler(void) +{ + struct timespec tv; + uint32_t regval; + + /* Disable the compare interrupt for now */ + + regval = getreg32(g_tickless.base + IMXRT_GPT_IR_OFFSET); + regval &= ~(1 << (g_tickless.out_compare - 1)); + putreg32(regval, g_tickless.base + IMXRT_GPT_IR_OFFSET); + + /* And clear it */ + + putreg32((1 << (g_tickless.out_compare - 1)), + g_tickless.base + IMXRT_GPT_SR_OFFSET); + + g_tickless.pending = false; + + up_timer_gettime(&tv); + nxsched_alarm_expiration(&tv); +} + +/**************************************************************************** + * Name: imxrt_timing_handler + * + * Description: + * Timer interrupt callback. When the freerun timer counter overflows, + * this interrupt will occur. We will just increment an overflow count. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void imxrt_timing_handler(void) +{ + g_tickless.overflow++; + + /* Clear interrupt bit */ + + putreg32(GPT_SR_ROV, g_tickless.base + IMXRT_GPT_SR_OFFSET); +} + +/**************************************************************************** + * Name: imxrt_tickless_handler + * + * Description: + * Generic interrupt handler for this timer. It checks the source of the + * interrupt and fires the appropriate handler. + * + * Input Parameters: + * irq - Number of the IRQ that generated the interrupt + * context - Interrupt register state save info (architecture-specific) + * + * Returned Value: + * OK on success + * + ****************************************************************************/ + +static int imxrt_tickless_handler(int irq, void *context, void *arg) +{ + uint32_t interrupt_flags; + interrupt_flags = getreg32(g_tickless.base + IMXRT_GPT_SR_OFFSET); + + /* The free-run timer has reached its maximum value */ + + if (interrupt_flags & GPT_SR_ROV) + { + imxrt_timing_handler(); + } + + /* Compare interrupt was generated */ + + if (interrupt_flags & (1 << (g_tickless.out_compare - 1))) + { + imxrt_interval_handler(); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_timer_initialize + * + * Description: + * Initializes all platform-specific timer facilities. This function is + * called early in the initialization sequence by up_initialize(). + * On return, the current up-time should be available from + * up_timer_gettime() and the interval timer is ready for use (but not + * actively timing. + * + * Provided by platform-specific code and called from the architecture- + * specific logic. + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + * Assumptions: + * Called early in the initialization sequence before any special + * concurrency protections are required. + * + ****************************************************************************/ + +void up_timer_initialize(void) +{ + uint32_t regval; + int prescaler; + + switch (CONFIG_IMXRT_TICKLESS_TIMER) + { + case 1: + g_tickless.base = IMXRT_GPT1_BASE; + g_tickless.irq = IMXRT_IRQ_GPT1; + imxrt_clockall_gpt_bus(); + imxrt_clockall_gpt_serial(); + break; + case 2: + g_tickless.base = IMXRT_GPT2_BASE; + g_tickless.irq = IMXRT_IRQ_GPT2; + imxrt_clockall_gpt2_bus(); + imxrt_clockall_gpt2_serial(); + break; + default: + tmrerr("ERROR: Timer number invalid or not configured: %d\n", + CONFIG_IMXRT_TICKLESS_TIMER); + break; + } + + /* Get the TC frequency that corresponds to the requested resolution */ + + up_disable_irq(g_tickless.irq); + + g_tickless.frequency = USEC_PER_SEC / (uint32_t)CONFIG_USEC_PER_TICK; + g_tickless.timer = CONFIG_IMXRT_TICKLESS_TIMER; + g_tickless.out_compare = CONFIG_IMXRT_TICKLESS_CHANNEL; + g_tickless.pending = false; + g_tickless.overflow = 0; + + tmrinfo("timer=%d channel=%d frequency=%lu Hz\n", + g_tickless.timer, g_tickless.out_compare, g_tickless.frequency); + + /* Set clock source of the timer and enable free-run mode */ + + regval = getreg32(g_tickless.base + IMXRT_GPT_CR_OFFSET); + regval |= GPT_CR_CLKSRC_IPG | GPT_CR_FRR; + putreg32(regval, g_tickless.base + IMXRT_GPT_CR_OFFSET); + + /* Set the prescaler register */ + + prescaler = GPT_CLOCK / g_tickless.frequency; + + /* We need to decrement value for '1', but only, if that will not to + * cause underflow. + */ + + if (prescaler > 0) + { + prescaler--; + } + + /* Check for overflow as well. */ + + if (prescaler > 0xfff) + { + prescaler = 0xfff; + } + + /* Set the prescaler value */ + + putreg32(prescaler, g_tickless.base + IMXRT_GPT_PR_OFFSET); + + /* Atache the interrupt handler */ + + if (irq_attach(g_tickless.irq, imxrt_tickless_handler, NULL)) + { + /* We could not attach the ISR to the interrupt */ + + tmrerr("ERROR: Failed to attach GPT timer IRQ\n"); + } + + up_enable_irq(g_tickless.irq); + + /* Initialize interval to zero */ + + putreg32(0, g_tickless.base + IMXRT_GPT_OCR1_OFFSET + \ + (4 * (g_tickless.out_compare - 1))); + + /* Initialize the counter and enable interrupts */ + + regval = getreg32(g_tickless.base + IMXRT_GPT_IR_OFFSET); + regval |= GPT_IR_ROVIE | (1 << (g_tickless.out_compare -1)); + putreg32(regval, g_tickless.base + IMXRT_GPT_IR_OFFSET); + + regval = getreg32(g_tickless.base + IMXRT_GPT_CR_OFFSET); + regval |= GPT_CR_ENMOD; + putreg32(regval, g_tickless.base + IMXRT_GPT_CR_OFFSET); + + /* Eneable the timer */ + + regval = getreg32(g_tickless.base + IMXRT_GPT_CR_OFFSET); + regval |= GPT_CR_EN; + putreg32(regval, g_tickless.base + IMXRT_GPT_CR_OFFSET); +} + +/**************************************************************************** + * Name: up_timer_gettime + * + * Description: + * Return the elapsed time since power-up (or, more correctly, since + * up_timer_initialize() was called). This function is functionally + * equivalent to: + * + * int clock_gettime(clockid_t clockid, FAR struct timespec *ts); + * + * when clockid is CLOCK_MONOTONIC. + * + * This function provides the basis for reporting the current time and + * also is used to eliminate error build-up from small errors in interval + * time calculations. + * + * Provided by platform-specific code and called from the RTOS base code. + * + * Input Parameters: + * ts - Provides the location in which to return the up-time. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure. + * + * Assumptions: + * Called from the normal tasking context. The implementation must + * provide whatever mutual exclusion is necessary for correct operation. + * This can include disabling interrupts in order to assure atomic register + * operations. + * + ****************************************************************************/ + +int up_timer_gettime(FAR struct timespec *ts) +{ + uint64_t usec; + uint32_t counter; + uint32_t verify; + uint32_t overflow; + uint32_t sec; + int pending; + irqstate_t flags; + + /* Temporarily disable the overflow counter */ + + flags = enter_critical_section(); + + overflow = g_tickless.overflow; + counter = getreg32(g_tickless.base + IMXRT_GPT_CNT_OFFSET); + pending = getreg32(g_tickless.base + IMXRT_GPT_SR_OFFSET) & GPT_SR_ROV; + verify = getreg32(g_tickless.base + IMXRT_GPT_CNT_OFFSET); + + /* If an interrupt was pending before we re-enabled interrupts, + * then the overflow needs to be incremented. + */ + + if (pending) + { + /* Clear the rollover interrupt */ + + putreg32(GPT_SR_ROV, g_tickless.base + IMXRT_GPT_SR_OFFSET); + + /* Increment the overflow count and use the value of the + * guaranteed to be AFTER the overflow occurred. + */ + + overflow++; + counter = verify; + + /* Update tickless overflow counter. */ + + g_tickless.overflow = overflow; + } + + leave_critical_section(flags); + + /* Convert the whole thing to units of microseconds. + * + * frequency = ticks / second + * seconds = ticks * frequency + * usecs = (ticks * USEC_PER_SEC) / frequency; + */ + + usec = ((((uint64_t)overflow << 32) + (uint64_t)counter) * \ + USEC_PER_SEC) / g_tickless.frequency; + + /* And return the value of the timer */ + + sec = (uint32_t)(usec / USEC_PER_SEC); + ts->tv_sec = sec; + ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC; + + return OK; +} + +/**************************************************************************** + * Name: up_alarm_start + * + * Description: + * Start the alarm. nxsched_alarm_expiration() will be called when the + * alarm occurs (unless up_alaram_cancel is called to stop it). + * + * Provided by platform-specific code and called from the RTOS base code. + * + * Input Parameters: + * ts - The time in the future at the alarm is expected to occur. When + * the alarm occurs the timer logic will call + * nxsched_alarm_expiration(). + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure. + * + * Assumptions: + * May be called from interrupt level handling or from the normal tasking + * level. Interrupts may need to be disabled internally to assure + * non-reentrancy. + * + ****************************************************************************/ + +int up_alarm_start(FAR const struct timespec *ts) +{ + size_t offset = 1; + uint64_t tm = ((uint64_t)ts->tv_sec * NSEC_PER_SEC + ts->tv_nsec) / + NSEC_PER_TICK; + irqstate_t flags; + uint32_t regval; + + flags = enter_critical_section(); + + /* Set compare value for output compare channel */ + + putreg32(tm, g_tickless.base + IMXRT_GPT_OCR1_OFFSET + \ + (4 * (g_tickless.out_compare - 1))); + + /* Clear interrupt bits */ + + putreg32((1 << (g_tickless.out_compare - 1)) | GPT_SR_ROV, + g_tickless.base + IMXRT_GPT_SR_OFFSET); + + /* Enable interrupts */ + + regval = getreg32(g_tickless.base + IMXRT_GPT_IR_OFFSET); + regval |= GPT_IR_ROVIE | (1 << (g_tickless.out_compare - 1)); + putreg32(regval, g_tickless.base + IMXRT_GPT_IR_OFFSET); + + g_tickless.pending = true; + + /* If we have already passed this time, there is a chance we didn't set the + * compare register in time and we've missed the interrupt. If we don't + * catch this case, we won't interrupt until a full loop of the clock. + * + * Since we can't make assumptions about the clock speed and tick rate, + * we simply keep adding an offset to the current time, until we can leave + * certain that the interrupt is going to fire as soon as we leave the + * critical section. + */ + + while (tm <= imxrt_get_counter()) + { + tm = imxrt_get_counter() + offset++; + putreg32(tm, g_tickless.base + IMXRT_GPT_OCR1_OFFSET + \ + (4 * (g_tickless.out_compare - 1))); + } + + leave_critical_section(flags); + return OK; +} + +/**************************************************************************** + * Name: up_alarm_cancel + * + * Description: + * Cancel the alarm and return the time of cancellation of the alarm. + * These two steps need to be as nearly atomic as possible. + * nxsched_alarm_expiration() will not be called unless the alarm is + * restarted with up_alarm_start(). + * + * If, as a race condition, the alarm has already expired when this + * function is called, then time returned is the current time. + * + * NOTE: This function may execute at a high rate with no timer running (as + * when pre-emption is enabled and disabled). + * + * Provided by platform-specific code and called from the RTOS base code. + * + * Input Parameters: + * ts - Location to return the expiration time. The current time should + * returned if the alarm is not active. ts may be NULL in which + * case the time is not returned. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_alarm_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + * Assumptions: + * May be called from interrupt level handling or from the normal tasking + * level. Interrupts may need to be disabled internally to assure + * non-reentrancy. + * + ****************************************************************************/ + +int up_alarm_cancel(FAR struct timespec *ts) +{ + uint64_t nsecs = (((uint64_t)g_tickless.overflow << 32) | \ + getreg32(g_tickless.base + IMXRT_GPT_CNT_OFFSET)) * \ + NSEC_PER_TICK; + uint32_t regval; + + ts->tv_sec = nsecs / NSEC_PER_SEC; + ts->tv_nsec = nsecs - ts->tv_sec * NSEC_PER_SEC; + + /* Disable the compare interrupt */ + + regval = getreg32(g_tickless.base + IMXRT_GPT_IR_OFFSET); + regval &= ~(1 << (g_tickless.out_compare - 1)); + putreg32(regval, g_tickless.base + IMXRT_GPT_IR_OFFSET); + + return 0; +} + +#endif /* CONFIG_SCHED_TICKLESS */ diff --git a/arch/arm/src/imxrt/imxrt_usbdev.c b/arch/arm/src/imxrt/imxrt_usbdev.c index 185303adaa4..69f6f000b32 100644 --- a/arch/arm/src/imxrt/imxrt_usbdev.c +++ b/arch/arm/src/imxrt/imxrt_usbdev.c @@ -503,10 +503,10 @@ static int imxrt_pullup(struct usbdev_s *dev, bool enable); static struct imxrt_usbdev_s g_usbdev; static struct imxrt_dqh_s g_qh[IMXRT_NPHYSENDPOINTS] - __attribute__((aligned(2048))); + aligned_data(2048); static struct imxrt_dtd_s g_td[IMXRT_NPHYSENDPOINTS] - __attribute__((aligned(32))); + aligned_data(32); static const struct usbdev_epops_s g_epops = { diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig index cbda473db51..03e18e28152 100644 --- a/arch/arm/src/kinetis/Kconfig +++ b/arch/arm/src/kinetis/Kconfig @@ -1398,6 +1398,62 @@ config KINETIS_SERIAL_RXDMA_BUFFER_SIZE endmenu # Kinetis UART Configuration +menu "Kinetis LPUART Configuration" +if KINETIS_SERIALDRIVER || OTHER_SERIALDRIVER + +comment "LP Uart Driver Configuration" + +config KINETIS_LPUART0_RXDMA + bool "LPUART0 Rx DMA" + default n + depends on KINETIS_LPUART0 && KINETIS_EDMA + ---help--- + In high data rate usage, Rx DMA may eliminate Rx overrun errors + +config KINETIS_LPUART1_RXDMA + bool "LPUART1 Rx DMA" + default n + depends on KINETIS_LPUART1 && KINETIS_EDMA + ---help--- + In high data rate usage, Rx DMA may eliminate Rx overrun errors + +config KINETIS_LPUART2_RXDMA + bool "LPUART2 Rx DMA" + default n + depends on KINETIS_LPUART2 && KINETIS_EDMA + ---help--- + In high data rate usage, Rx DMA may eliminate Rx overrun errors + +config KINETIS_LPUART3_RXDMA + bool "LPUART3 Rx DMA" + default n + depends on KINETIS_LPUART3 && KINETIS_EDMA + ---help--- + In high data rate usage, Rx DMA may eliminate Rx overrun errors + +config KINETIS_LPUART4_RXDMA + bool "LPUART4 Rx DMA" + default n + depends on KINETIS_LPUART4 && KINETIS_EDMA + ---help--- + In high data rate usage, Rx DMA may eliminate Rx overrun errors + +config KINETIS_LPUART_RXDMA_BUFFER_SIZE + int "Rx DMA buffer size" + default 32 + depends on KINETIS_LPUART0_RXDMA || KINETIS_LPUART1_RXDMA || KINETIS_LPUART2_RXDMA || KINETIS_LPUART3_RXDMA || KINETIS_LPUART4_RXDMA + ---help--- + The DMA buffer size when using RX DMA to emulate a FIFO. + + When streaming data, the generic serial layer will be called + every time the FIFO receives half this number of bytes. + + Value given here will be rounded up to next multiple of 32 bytes. + +endif # KINETIS_SERIALDRIVER || OTHER_SERIALDRIVER + +endmenu # Kinetis LPUART Configuration + config KINETIS_MERGE_TTY bool "Kinetis Merge TTY names for LPUARTS" default n diff --git a/arch/arm/src/kinetis/Make.defs b/arch/arm/src/kinetis/Make.defs index 6fd81e4a006..e799856c7b4 100644 --- a/arch/arm/src/kinetis/Make.defs +++ b/arch/arm/src/kinetis/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -28,7 +28,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasestack.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_releasepending.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_unblocktask.c arm_usestack.c CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_svcall.c arm_vfork.c -CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c +CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARMV7M_STACKCHECK),y) CMN_CSRCS += arm_stackcheck.c diff --git a/arch/arm/src/kinetis/kinetis_cfmconfig.c b/arch/arm/src/kinetis/kinetis_cfmconfig.c index 0bac66e5da7..402b42b339c 100644 --- a/arch/arm/src/kinetis/kinetis_cfmconfig.c +++ b/arch/arm/src/kinetis/kinetis_cfmconfig.c @@ -37,7 +37,7 @@ * Public Data ****************************************************************************/ -__attribute__ ((section(".cfmconfig"))) +locate_data(".cfmconfig") const uint8_t __flashconfigbytes[16] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, diff --git a/arch/arm/src/kinetis/kinetis_edma.c b/arch/arm/src/kinetis/kinetis_edma.c index f0b14bee923..5612fbef8ae 100644 --- a/arch/arm/src/kinetis/kinetis_edma.c +++ b/arch/arm/src/kinetis/kinetis_edma.c @@ -174,7 +174,7 @@ static sq_queue_t g_tcd_free; /* This is a pool of pre-allocated TCDs */ static struct kinetis_edmatcd_s g_tcd_pool[CONFIG_KINETIS_EDMA_NTCD] - __attribute__((aligned(EDMA_ALIGN))); + aligned_data(EDMA_ALIGN); #endif /**************************************************************************** diff --git a/arch/arm/src/kinetis/kinetis_flexcan.c b/arch/arm/src/kinetis/kinetis_flexcan.c index 9aacc05a87c..4ecb5c9f06c 100644 --- a/arch/arm/src/kinetis/kinetis_flexcan.c +++ b/arch/arm/src/kinetis/kinetis_flexcan.c @@ -385,7 +385,7 @@ static inline uint32_t arm_lsb(unsigned int value) * classical can timings * * Returned Value: - * return 1 on succes, return 0 on failure + * return 1 on success, return 0 on failure * ****************************************************************************/ diff --git a/arch/arm/src/kinetis/kinetis_lpserial.c b/arch/arm/src/kinetis/kinetis_lpserial.c index 42e4cc3e003..35af49ab22f 100644 --- a/arch/arm/src/kinetis/kinetis_lpserial.c +++ b/arch/arm/src/kinetis/kinetis_lpserial.c @@ -47,10 +47,14 @@ #include "arm_arch.h" #include "arm_internal.h" -#include "kinetis.h" +#include "kinetis_config.h" +#include "chip.h" #include "hardware/kinetis_lpuart.h" #include "hardware/kinetis_pinmux.h" - +#include "hardware/kinetis_dmamux.h" +#include "kinetis.h" +#include "kinetis_lpuart.h" +#include "kinetis_edma.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -69,6 +73,10 @@ #if defined(HAVE_LPUART_DEVICE) && defined(USE_SERIALDRIVER) +/* Assume DMA is not used on the console UART */ + +#undef SERIAL_HAVE_CONSOLE_DMA + /* Which LPUART with be tty0/console and which tty1? The console will always * be ttyS0. If there is no console then will use the lowest numbered * LPUART. @@ -80,22 +88,37 @@ # define CONSOLE_DEV g_lpuart0port /* LPUART0 is console */ # define TTYS0_DEV g_lpuart0port /* LPUART0 is ttyS0 */ # define LPUART0_ASSIGNED 1 +# if defined(CONFIG_KINETIS_LPUART0_RXDMA) +# define SERIAL_HAVE_CONSOLE_DMA 1 +# endif #elif defined(CONFIG_LPUART1_SERIAL_CONSOLE) # define CONSOLE_DEV g_lpuart1port /* LPUART1 is console */ # define TTYS0_DEV g_lpuart1port /* LPUART1 is ttyS0 */ # define LPUART1_ASSIGNED 1 +# if defined(CONFIG_KINETIS_LPUART1_RXDMA) +# define SERIAL_HAVE_CONSOLE_DMA 1 +# endif #elif defined(CONFIG_LPUART2_SERIAL_CONSOLE) # define CONSOLE_DEV g_lpuart2port /* LPUART2 is console */ # define TTYS0_DEV g_lpuart2port /* LPUART2 is ttyS0 */ # define LPUART2_ASSIGNED 1 +# if defined(CONFIG_KINETIS_LPUART2_RXDMA) +# define SERIAL_HAVE_CONSOLE_DMA 1 +# endif #elif defined(CONFIG_LPUART3_SERIAL_CONSOLE) # define CONSOLE_DEV g_lpuart3port /* LPUART3 is console */ # define TTYS0_DEV g_lpuart3port /* LPUART3 is ttyS0 */ # define LPUART3_ASSIGNED 1 +# if defined(CONFIG_KINETIS_LPUART3_RXDMA) +# define SERIAL_HAVE_CONSOLE_DMA 1 +# endif #elif defined(CONFIG_LPUART4_SERIAL_CONSOLE) # define CONSOLE_DEV g_lpuart4port /* LPUART4 is console */ # define TTYS0_DEV g_lpuart4port /* LPUART4 is ttyS0 */ # define LPUART4_ASSIGNED 1 +# if defined(CONFIG_KINETIS_LPUART4_RXDMA) +# define SERIAL_HAVE_CONSOLE_DMA 1 +# endif #else # undef CONSOLE_DEV /* No console */ # if defined(CONFIG_KINETIS_LPUART0) @@ -182,6 +205,37 @@ # define LPUART4_ASSIGNED 1 #endif +#ifdef LPSERIAL_HAVE_DMA + +/* The DMA buffer size when using RX DMA to emulate a FIFO. + * + * When streaming data, the generic serial layer will be called every time + * the FIFO receives half this number of bytes. + * + * This buffer size should be an even multiple of the Cortex-M7 D-Cache line + * size, ARMV7M_DCACHE_LINESIZE, so that it can be individually invalidated. + * + * Should there be a Cortex-M7 without a D-Cache, ARMV7M_DCACHE_LINESIZE + * would be zero! + */ + +# if !defined(ARMV7M_DCACHE_LINESIZE) || ARMV7M_DCACHE_LINESIZE == 0 +# undef ARMV7M_DCACHE_LINESIZE +# define ARMV7M_DCACHE_LINESIZE 32 +# endif + +# if !defined(CONFIG_KINETIS_LPUART_RXDMA_BUFFER_SIZE) || \ + (CONFIG_KINETIS_LPUART_RXDMA_BUFFER_SIZE < ARMV7M_DCACHE_LINESIZE) +# undef CONFIG_KINETIS_LPUART_RXDMA_BUFFER_SIZE +# define CONFIG_KINETIS_LPUART_RXDMA_BUFFER_SIZE ARMV7M_DCACHE_LINESIZE +# endif + +# define RXDMA_BUFFER_MASK ((uint32_t)(ARMV7M_DCACHE_LINESIZE - 1)) +# define RXDMA_BUFFER_SIZE ((CONFIG_KINETIS_LPUART_RXDMA_BUFFER_SIZE \ + + RXDMA_BUFFER_MASK) & ~RXDMA_BUFFER_MASK) + +#endif /* LPSERIAL_HAVE_DMA */ + #define LPUART_CTRL_ERROR_INTS (LPUART_CTRL_ORIE | LPUART_CTRL_FEIE | \ LPUART_CTRL_NEIE | LPUART_CTRL_PEIE) @@ -230,6 +284,12 @@ struct kinetis_dev_s #ifdef CONFIG_SERIAL_OFLOWCONTROL uint32_t cts_gpio; /* UART CTS GPIO pin configuration */ #endif +#ifdef LPSERIAL_HAVE_DMA + const uint8_t rxdma_reqsrc; + DMACH_HANDLE rxdma; /* currently-open receive DMA stream */ + uint32_t rxdmanext; /* Next byte in the DMA buffer to be read */ + char *const rxfifo; /* Receive DMA buffer */ +#endif }; /**************************************************************************** @@ -242,9 +302,11 @@ static int kinetis_attach(struct uart_dev_s *dev); static void kinetis_detach(struct uart_dev_s *dev); static int kinetis_interrupt(int irq, void *context, void *arg); static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg); -static int kinetis_receive(struct uart_dev_s *dev, unsigned int *status); static void kinetis_rxint(struct uart_dev_s *dev, bool enable); +#if !defined(LPSERIAL_HAVE_ALL_DMA) +static int kinetis_receive(struct uart_dev_s *dev, unsigned int *status); static bool kinetis_rxavailable(struct uart_dev_s *dev); +#endif #ifdef CONFIG_SERIAL_IFLOWCONTROL static bool kinetis_rxflowcontrol(struct uart_dev_s *dev, unsigned int nbuffered, bool upper); @@ -253,10 +315,22 @@ static void kinetis_send(struct uart_dev_s *dev, int ch); static void kinetis_txint(struct uart_dev_s *dev, bool enable); static bool kinetis_txready(struct uart_dev_s *dev); +#ifdef LPSERIAL_HAVE_DMA +static int kinetis_dma_nextrx(struct kinetis_dev_s *priv); +static int kinetis_dma_setup(struct uart_dev_s *dev); +static void kinetis_dma_shutdown(struct uart_dev_s *dev); +static int kinetis_dma_receive(struct uart_dev_s *dev, + unsigned int *status); +static bool kinetis_dma_rxavailable(struct uart_dev_s *dev); +static uint32_t get_and_clear_uart_status(struct kinetis_dev_s *priv); +static void kinetis_dma_rxcallback(DMACH_HANDLE handle, void *arg, bool done, + int result); +#endif + /**************************************************************************** * Private Data ****************************************************************************/ - +#if !defined(LPSERIAL_HAVE_ALL_DMA) static const struct uart_ops_s g_lpuart_ops = { .setup = kinetis_setup, @@ -275,28 +349,70 @@ static const struct uart_ops_s g_lpuart_ops = .txready = kinetis_txready, .txempty = kinetis_txready, }; +#endif + +#ifdef LPSERIAL_HAVE_DMA +static const struct uart_ops_s g_lpuart_dma_ops = +{ + .setup = kinetis_dma_setup, + .shutdown = kinetis_dma_shutdown, + .attach = kinetis_attach, + .detach = kinetis_detach, + .ioctl = kinetis_ioctl, + .receive = kinetis_dma_receive, + .rxint = kinetis_rxint, + .rxavailable = kinetis_dma_rxavailable, +#ifdef CONFIG_SERIAL_IFLOWCONTROL + .rxflowcontrol = kinetis_rxflowcontrol, +#endif + .send = kinetis_send, + .txint = kinetis_txint, + .txready = kinetis_txready, + .txempty = kinetis_txready, +}; +#endif /* I/O buffers */ #ifdef CONFIG_KINETIS_LPUART0 static char g_lpuart0rxbuffer[CONFIG_LPUART0_RXBUFSIZE]; static char g_lpuart0txbuffer[CONFIG_LPUART0_TXBUFSIZE]; +# ifdef CONFIG_KINETIS_LPUART0_RXDMA +static char g_lpuart0rxfifo[RXDMA_BUFFER_SIZE] + aligned_data(ARMV7M_DCACHE_LINESIZE); +# endif #endif #ifdef CONFIG_KINETIS_LPUART1 static char g_lpuart1rxbuffer[CONFIG_LPUART1_RXBUFSIZE]; static char g_lpuart1txbuffer[CONFIG_LPUART1_TXBUFSIZE]; +# ifdef CONFIG_KINETIS_LPUART1_RXDMA +static char g_lpuart1rxfifo[RXDMA_BUFFER_SIZE] + aligned_data(ARMV7M_DCACHE_LINESIZE); +# endif #endif #ifdef CONFIG_KINETIS_LPUART2 static char g_lpuart2rxbuffer[CONFIG_LPUART2_RXBUFSIZE]; static char g_lpuart2txbuffer[CONFIG_LPUART2_TXBUFSIZE]; +# ifdef CONFIG_KINETIS_LPUART2_RXDMA +static char g_lpuart2rxfifo[RXDMA_BUFFER_SIZE] + aligned_data(ARMV7M_DCACHE_LINESIZE); +# endif #endif #ifdef CONFIG_KINETIS_LPUART3 static char g_lpuart3rxbuffer[CONFIG_LPUART3_RXBUFSIZE]; static char g_lpuart3txbuffer[CONFIG_LPUART3_TXBUFSIZE]; +# ifdef CONFIG_KINETIS_LPUART3_RXDMA +static char g_lpuart3rxfifo[RXDMA_BUFFER_SIZE] + aligned_data(ARMV7M_DCACHE_LINESIZE); +# endif #endif #ifdef CONFIG_KINETIS_LPUART4 static char g_lpuart4rxbuffer[CONFIG_LPUART4_RXBUFSIZE]; static char g_lpuart4txbuffer[CONFIG_LPUART4_TXBUFSIZE]; +# ifdef CONFIG_KINETIS_LPUART4_RXDMA +static char g_lpuart4rxfifo[RXDMA_BUFFER_SIZE] + aligned_data(ARMV7M_DCACHE_LINESIZE); +# endif #endif /* This describes the state of the Kinetis LPUART0 port. */ @@ -319,6 +435,10 @@ static struct kinetis_dev_s g_lpuart0priv = .iflow = true, .rts_gpio = PIN_LPUART0_RTS, #endif +#ifdef CONFIG_KINETIS_LPUART0_RXDMA + .rxdma_reqsrc = KINETIS_DMA_REQUEST_SRC_LPUART0_RX, + .rxfifo = g_lpuart0rxfifo, +#endif }; static uart_dev_t g_lpuart0port = @@ -333,7 +453,11 @@ static uart_dev_t g_lpuart0port = .size = CONFIG_LPUART0_TXBUFSIZE, .buffer = g_lpuart0txbuffer, }, - .ops = &g_lpuart_ops, +#ifdef CONFIG_KINETIS_LPUART0_RXDMA + .ops = &g_lpuart_dma_ops, +#else + .ops = &g_lpuart_ops, +#endif .priv = &g_lpuart0priv, }; #endif @@ -358,6 +482,10 @@ static struct kinetis_dev_s g_lpuart1priv = .iflow = true, .rts_gpio = PIN_LPUART1_RTS, #endif +#ifdef CONFIG_KINETIS_LPUART1_RXDMA + .rxdma_reqsrc = KINETIS_DMA_REQUEST_SRC_LPUART1_RX, + .rxfifo = g_lpuart1rxfifo, +#endif }; static uart_dev_t g_lpuart1port = @@ -372,7 +500,11 @@ static uart_dev_t g_lpuart1port = .size = CONFIG_LPUART1_TXBUFSIZE, .buffer = g_lpuart1txbuffer, }, - .ops = &g_lpuart_ops, +#ifdef CONFIG_KINETIS_LPUART1_RXDMA + .ops = &g_lpuart_dma_ops, +#else + .ops = &g_lpuart_ops, +#endif .priv = &g_lpuart1priv, }; #endif @@ -397,6 +529,10 @@ static struct kinetis_dev_s g_lpuart2priv = .iflow = true, .rts_gpio = PIN_LPUART2_RTS, #endif +#ifdef CONFIG_KINETIS_LPUART2_RXDMA + .rxdma_reqsrc = KINETIS_DMA_REQUEST_SRC_LPUART2_RX, + .rxfifo = g_lpuart2rxfifo, +#endif }; static uart_dev_t g_lpuart2port = @@ -411,7 +547,11 @@ static uart_dev_t g_lpuart2port = .size = CONFIG_LPUART2_TXBUFSIZE, .buffer = g_lpuart2txbuffer, }, - .ops = &g_lpuart_ops, +#ifdef CONFIG_KINETIS_LPUART2_RXDMA + .ops = &g_lpuart_dma_ops, +#else + .ops = &g_lpuart_ops, +#endif .priv = &g_lpuart2priv, }; #endif @@ -436,6 +576,10 @@ static struct kinetis_dev_s g_lpuart3priv = .iflow = true, .rts_gpio = PIN_LPUART3_RTS, #endif +#ifdef CONFIG_KINETIS_LPUART3_RXDMA + .rxdma_reqsrc = KINETIS_DMA_REQUEST_SRC_LPUART3_RX, + .rxfifo = g_lpuart3rxfifo, +#endif }; static uart_dev_t g_lpuart3port = @@ -450,7 +594,11 @@ static uart_dev_t g_lpuart3port = .size = CONFIG_LPUART3_TXBUFSIZE, .buffer = g_lpuart3txbuffer, }, - .ops = &g_lpuart_ops, +#ifdef CONFIG_KINETIS_LPUART3_RXDMA + .ops = &g_lpuart_dma_ops, +#else + .ops = &g_lpuart_ops, +#endif .priv = &g_lpuart3priv, }; #endif @@ -475,6 +623,10 @@ static struct kinetis_dev_s g_lpuart4priv = .iflow = true, .rts_gpio = PIN_LPUART4_RTS, #endif +#ifdef CONFIG_KINETIS_LPUART4_RXDMA + .rxdma_reqsrc = KINETIS_DMA_REQUEST_SRC_LPUART4_RX, + .rxfifo = g_lpuart4rxfifo, +#endif }; static uart_dev_t g_lpuart4port = @@ -489,7 +641,11 @@ static uart_dev_t g_lpuart4port = .size = CONFIG_LPUART4_TXBUFSIZE, .buffer = g_lpuart4txbuffer, }, - .ops = &g_lpuart_ops, +#ifdef CONFIG_KINETIS_LPUART4_RXDMA + .ops = &g_lpuart_dma_ops, +#else + .ops = &g_lpuart_ops, +#endif .priv = &g_lpuart4priv, }; #endif @@ -577,6 +733,38 @@ static void kinetis_disableuartint(struct kinetis_dev_s *priv, uint32_t *ie) } #endif +/**************************************************************************** + * Name: get_and_clear_uart_status + * + * Description: + * Clears the error flags of the uart if an error occurred in s1 and + * returns the status + * + * Input Parameters: + * u_dev_s + * + * Returns Value: + * Uart status s1 + * + ****************************************************************************/ + +#ifdef LPSERIAL_HAVE_DMA +static uint32_t get_and_clear_uart_status(struct kinetis_dev_s *priv) +{ + uint32_t regval; + + regval = kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET); + regval &= LPUART_STAT_ERRORS; + + if (regval != 0) + { + kinetis_serialout(priv, KINETIS_LPUART_STAT_OFFSET, regval); + } + + return regval; +} +#endif + /**************************************************************************** * Name: kinetis_setup * @@ -614,6 +802,83 @@ static int kinetis_setup(struct uart_dev_s *dev) return OK; } +/**************************************************************************** + * Name: kinetis_dma_setup + * + * Description: + * Configure the UART baud, bits, parity, etc. This method is called the + * first time that the serial port is opened. + * + ****************************************************************************/ + +#ifdef LPSERIAL_HAVE_DMA +static int kinetis_dma_setup(struct uart_dev_s *dev) +{ + struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv; + int result; + uint32_t regval; + DMACH_HANDLE rxdma = NULL; + + /* Do the basic UART setup first, unless we are the console */ + + if (!dev->isconsole) + { + result = kinetis_setup(dev); + if (result != OK) + { + return result; + } + } + + /* Acquire the DMA channel. */ + + rxdma = kinetis_dmach_alloc(priv->rxdma_reqsrc | DMAMUX_CHCFG_ENBL, 0); + if (rxdma == NULL) + { + return -EBUSY; + } + + /* Configure for circular DMA reception into the RX FIFO */ + + struct kinetis_edma_xfrconfig_s config; + config.saddr = priv->uartbase + KINETIS_LPUART_DATA_OFFSET; + config.daddr = (uint32_t) priv->rxfifo; + config.soff = 0; + config.doff = 1; + config.iter = RXDMA_BUFFER_SIZE; + config.flags = EDMA_CONFIG_LINKTYPE_LINKNONE | EDMA_CONFIG_LOOPDEST; + config.ssize = EDMA_8BIT; + config.dsize = EDMA_8BIT; + config.ttype = EDMA_PERIPH2MEM; + config.nbytes = 1; +#ifdef CONFIG_KINETIS_EDMA_ELINK + config.linkch = NULL; +#endif + kinetis_dmach_xfrsetup(rxdma, &config); + + /* Reset our DMA shadow pointer to match the address just programmed + * above. + */ + + priv->rxdmanext = 0; + + /* Enable receive DMA for the UART */ + + regval = kinetis_serialin(priv, KINETIS_LPUART_BAUD_OFFSET); + regval |= LPUART_BAUD_RDMAE; + kinetis_serialout(priv, KINETIS_LPUART_BAUD_OFFSET, regval); + + /* Start the DMA channel, and arrange for callbacks at the half and + * full points in the FIFO. This ensures that we have half a FIFO + * worth of time to claim bytes before they are overwritten. + */ + + kinetis_dmach_start(rxdma, kinetis_dma_rxcallback, (void *)dev); + priv->rxdma = rxdma; + return OK; +} +#endif + /**************************************************************************** * Name: kinetis_shutdown * @@ -636,6 +901,37 @@ static void kinetis_shutdown(struct uart_dev_s *dev) kinetis_lpuartreset(priv->uartbase); } +/**************************************************************************** + * Name: kinetis_dma_shutdown + * + * Description: + * Disable the UART. This method is called when the serial + * port is closed + * + ****************************************************************************/ + +#ifdef LPSERIAL_HAVE_DMA +static void kinetis_dma_shutdown(struct uart_dev_s *dev) +{ + struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv; + DMACH_HANDLE rxdma = priv->rxdma; + + /* Perform the normal UART shutdown */ + + kinetis_shutdown(dev); + + /* Stop the DMA channel */ + + kinetis_dmach_stop(rxdma); + + /* Release the DMA channel */ + + kinetis_dmach_free(rxdma); + + priv->rxdma = NULL; +} +#endif + /**************************************************************************** * Name: kinetis_attach * @@ -807,7 +1103,7 @@ static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg) defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT) struct inode *inode; struct uart_dev_s *dev; - uint8_t regval; + uint32_t regval; #endif #if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_KINETIS_SERIALBRK_BSDCOMPAT) struct kinetis_dev_s *priv; @@ -906,6 +1202,8 @@ static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg) # endif CS8; + cfsetispeed(termiosp, priv->baud); + /* TODO: CCTS_IFLOW, CCTS_OFLOW */ } break; @@ -1043,6 +1341,46 @@ static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg) break; #endif /* CONFIG_KINETIS_UART_BREAKS */ +#ifdef CONFIG_KINETIS_UART_INVERT + case TIOCSINVERT: + { + uint32_t stat; + uint32_t ctrl; + irqstate_t flags; + + flags = enter_critical_section(); + + stat = kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET); + ctrl = kinetis_serialin(priv, KINETIS_LPUART_CTRL_OFFSET); + + /* {R|T}XINV bit fields can written any time */ + + if (arg & SER_INVERT_ENABLED_RX) + { + stat |= LPUART_STAT_RXINV; + } + else + { + stat &= ~LPUART_STAT_RXINV; + } + + if (arg & SER_INVERT_ENABLED_TX) + { + ctrl |= LPUART_CTRL_TXINV; + } + else + { + ctrl &= ~LPUART_CTRL_TXINV; + } + + kinetis_serialout(priv, KINETIS_LPUART_STAT_OFFSET, stat); + kinetis_serialout(priv, KINETIS_LPUART_CTRL_OFFSET, ctrl); + + leave_critical_section(flags); + } + break; +#endif + default: ret = -ENOTTY; break; @@ -1060,7 +1398,7 @@ static int kinetis_ioctl(struct file *filep, int cmd, unsigned long arg) * return 'status'. * ****************************************************************************/ - +#if !defined(LPSERIAL_HAVE_ALL_DMA) static int kinetis_receive(struct uart_dev_s *dev, unsigned int *status) { struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv; @@ -1101,6 +1439,66 @@ static int kinetis_receive(struct uart_dev_s *dev, unsigned int *status) return data; } +#endif + +/**************************************************************************** + * Name: kinetis_dma_receive + * + * Description: + * Called (usually) from the interrupt level to receive one + * character from the UART. Error bits associated with the + * receipt are provided in the return 'status'. + * + ****************************************************************************/ + +#ifdef LPSERIAL_HAVE_DMA +static int kinetis_dma_receive(struct uart_dev_s *dev, unsigned int *status) +{ + struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv; + int c = 0; + uint32_t stat; + + /* Clear uart errors and return status information */ + + stat = get_and_clear_uart_status(priv); + if (status) + { + *status = stat; + } + + if (kinetis_dma_nextrx(priv) != priv->rxdmanext) + { + /* Invalidate the DMA buffer */ + + up_invalidate_dcache((uintptr_t)priv->rxfifo, + (uintptr_t)priv->rxfifo + RXDMA_BUFFER_SIZE); + + /* Now read from the DMA buffer */ + + c = priv->rxfifo[priv->rxdmanext]; + priv->rxdmanext++; + if (priv->rxdmanext == RXDMA_BUFFER_SIZE) + { + /* HACK: Skip the first byte since it is duplicate of last one. */ + + if (kinetis_dma_nextrx(priv) != 0) + { + priv->rxdmanext = 1; + } + else + { + /* Try to catch race conditions that will spin on the whole + * buffer again. + */ + + priv->rxdmanext = 0; + } + } + } + + return c; +} +#endif /**************************************************************************** * Name: kinetis_rxint @@ -1137,13 +1535,34 @@ static void kinetis_rxint(struct uart_dev_s *dev, bool enable) } /**************************************************************************** - * Name: kinetis_rxavailable + * Name: kinetis_dma_rxavailable * * Description: * Return true if the receive register is not empty * ****************************************************************************/ +#ifdef LPSERIAL_HAVE_DMA +static bool kinetis_dma_rxavailable(struct uart_dev_s *dev) +{ + struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv; + + /* Compare our receive pointer to the current DMA pointer, if they + * do not match, then there are bytes to be received. + */ + + return (kinetis_dma_nextrx(priv) != priv->rxdmanext); +} +#endif + +/**************************************************************************** + * Name: kinetis_rxavailable + * + * Description: + * Return true if the receive register is not empty + * + ****************************************************************************/ +#if !defined(LPSERIAL_HAVE_ALL_DMA) static bool kinetis_rxavailable(struct uart_dev_s *dev) { struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev->priv; @@ -1153,6 +1572,7 @@ static bool kinetis_rxavailable(struct uart_dev_s *dev) return (kinetis_serialin(priv, KINETIS_LPUART_STAT_OFFSET) & LPUART_STAT_RDRF) != 0; } +#endif /**************************************************************************** * Name: kinetis_rxflowcontrol @@ -1227,6 +1647,26 @@ static bool kinetis_rxflowcontrol(struct uart_dev_s *dev, } #endif +/**************************************************************************** + * Name: kinetis_dma_nextrx + * + * Description: + * Returns the index into the RX FIFO where the DMA will place the next + * byte that it receives. + * + ****************************************************************************/ + +#ifdef LPSERIAL_HAVE_DMA +static int kinetis_dma_nextrx(struct kinetis_dev_s *priv) +{ + size_t dmaresidual; + + dmaresidual = kinetis_dmach_getcount(priv->rxdma); + + return (RXDMA_BUFFER_SIZE - (int)dmaresidual) % RXDMA_BUFFER_SIZE; +} +#endif + /**************************************************************************** * Name: kinetis_send * @@ -1299,6 +1739,28 @@ static bool kinetis_txready(struct uart_dev_s *dev) LPUART_STAT_TDRE) != 0; } +/**************************************************************************** + * Name: kinetis_dma_rxcallback + * + * Description: + * This function checks the current DMA state and calls the generic + * serial stack when bytes appear to be available. + * + ****************************************************************************/ + +#ifdef LPSERIAL_HAVE_DMA +static void kinetis_dma_rxcallback(DMACH_HANDLE handle, void *arg, bool done, + int result) +{ + struct uart_dev_s *dev = (struct uart_dev_s *)arg; + + if (kinetis_dma_rxavailable(dev)) + { + uart_recvchars(dev); + } +} +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -1368,6 +1830,11 @@ unsigned int kinetis_lpuart_serialinit(unsigned int first) #ifdef HAVE_LPUART_CONSOLE uart_register("/dev/console", &CONSOLE_DEV); +# ifdef SERIAL_HAVE_CONSOLE_DMA + /* If we need to re-initialise the console to enable DMA do that here. */ + + kinetis_dma_setup(&CONSOLE_DEV); +# endif #endif #if !defined(CONFIG_KINETIS_MERGE_TTY) /* Register all LPUARTs as LPn devices */ @@ -1411,6 +1878,68 @@ unsigned int kinetis_lpuart_serialinit(unsigned int first) return first; } +/**************************************************************************** + * Name: kinetis_serial_dma_poll + * + * Description: + * Checks receive DMA buffers for received bytes that have not accumulated + * to the point where the DMA half/full interrupt has triggered. + * + * This function should be called from a timer or other periodic context. + * + ****************************************************************************/ + +#ifdef LPSERIAL_HAVE_DMA +void kinetis_lpserial_dma_poll(void) +{ + irqstate_t flags; + + flags = enter_critical_section(); + +#ifdef CONFIG_KINETIS_LPUART0_RXDMA + if (g_lpuart0priv.rxdma != NULL) + { + kinetis_dma_rxcallback(g_lpuart0priv.rxdma, (void *)&g_lpuart0port, + false, 0); + } +#endif + +#ifdef CONFIG_KINETIS_LPUART1_RXDMA + if (g_lpuart1priv.rxdma != NULL) + { + kinetis_dma_rxcallback(g_lpuart1priv.rxdma, (void *)&g_lpuart1port, + false, 0); + } +#endif + +#ifdef CONFIG_KINETIS_LPUART2_RXDMA + if (g_lpuart2priv.rxdma != NULL) + { + kinetis_dma_rxcallback(g_lpuart2priv.rxdma, (void *)&g_lpuart2port, + false, 0); + } +#endif + +#ifdef CONFIG_KINETIS_LPUART3_RXDMA + if (g_lpuart3priv.rxdma != NULL) + { + kinetis_dma_rxcallback(g_lpuart3priv.rxdma, (void *)&g_lpuart3port, + false, 0); + } +#endif + +#ifdef CONFIG_KINETIS_LPUART4_RXDMA + if (g_lpuart4priv.rxdma != NULL) + { + kinetis_dma_rxcallback(g_lpuart4priv.rxdma, (void *)&g_lpuart4port, + false, 0); + } +#endif + + leave_critical_section(flags); +} +#endif + /**************************************************************************** * Name: up_putc * diff --git a/arch/arm/src/kinetis/kinetis_lpuart.h b/arch/arm/src/kinetis/kinetis_lpuart.h new file mode 100644 index 00000000000..6a24ca3138a --- /dev/null +++ b/arch/arm/src/kinetis/kinetis_lpuart.h @@ -0,0 +1,101 @@ +/**************************************************************************** + * arch/arm/src/kinetis/kinetis_lpuart.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_LPUART_H +#define __ARCH_ARM_SRC_KINETIS_KINETIS_LPUART_H + +#if defined(HAVE_UART_DEVICE) && defined(USE_SERIALDRIVER) + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Is DMA available on any (enabled) LPUART? */ + +#undef LPSERIAL_HAVE_DMA +#if defined(CONFIG_KINETIS_LPUART0_RXDMA) || defined(CONFIG_KINETIS_LPUART1_RXDMA) || \ + defined(CONFIG_KINETIS_LPUART2_RXDMA) || defined(CONFIG_KINETIS_LPUART3_RXDMA) || \ + defined(CONFIG_KINETIS_LPUART4_RXDMA) +# define LPSERIAL_HAVE_DMA 1 + +/* Is DMA available on All (enabled) LPUART? */ + +#define LPSERIAL_HAVE_ALL_DMA 1 +# if (defined(CONFIG_KINETIS_LPUART0) && !defined(CONFIG_KINETIS_LPUART0_RXDMA)) || \ + (defined(CONFIG_KINETIS_LPUART1) && !defined(CONFIG_KINETIS_LPUART1_RXDMA)) || \ + (defined(CONFIG_KINETIS_LPUART2) && !defined(CONFIG_KINETIS_LPUART2_RXDMA)) || \ + (defined(CONFIG_KINETIS_LPUART3) && !defined(CONFIG_KINETIS_LPUART3_RXDMA)) || \ + (defined(CONFIG_KINETIS_LPUART4) && !defined(CONFIG_KINETIS_LPUART4_RXDMA)) +# undef LPSERIAL_HAVE_ALL_DMA +# endif +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: kinetis_serial_dma_poll + * + * Description: + * Must be called periodically if any Kinetis LPUART is configured for DMA. + * The DMA callback is triggered for each fifo size/2 bytes, but this can + * result in some bytes being transferred but not collected if the incoming + * data is not a whole multiple of half the FIFO size. + * + * May be safely called from either interrupt or thread context. + * + ****************************************************************************/ + +#ifdef LPSERIAL_HAVE_DMA +void kinetis_lpserial_dma_poll(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* HAVE_UART_DEVICE && USE_SERIALDRIVER) */ +#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_UART_H */ diff --git a/arch/arm/src/kinetis/kinetis_serial.c b/arch/arm/src/kinetis/kinetis_serial.c index 3047b1fb6ea..b116c0a0537 100644 --- a/arch/arm/src/kinetis/kinetis_serial.c +++ b/arch/arm/src/kinetis/kinetis_serial.c @@ -409,7 +409,7 @@ static char g_uart0rxbuffer[CONFIG_UART0_RXBUFSIZE]; static char g_uart0txbuffer[CONFIG_UART0_TXBUFSIZE]; # ifdef CONFIG_KINETIS_UART0_RXDMA static char g_uart0rxfifo[RXDMA_BUFFER_SIZE] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); # endif #endif @@ -418,7 +418,7 @@ static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE]; static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE]; # ifdef CONFIG_KINETIS_UART1_RXDMA static char g_uart1rxfifo[RXDMA_BUFFER_SIZE] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); # endif #endif @@ -427,7 +427,7 @@ static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE]; static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE]; # ifdef CONFIG_KINETIS_UART2_RXDMA static char g_uart2rxfifo[RXDMA_BUFFER_SIZE] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); # endif #endif @@ -436,7 +436,7 @@ static char g_uart3rxbuffer[CONFIG_UART3_RXBUFSIZE]; static char g_uart3txbuffer[CONFIG_UART3_TXBUFSIZE]; # ifdef CONFIG_KINETIS_UART3_RXDMA static char g_uart3rxfifo[RXDMA_BUFFER_SIZE] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); # endif #endif @@ -445,7 +445,7 @@ static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE]; static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE]; # ifdef CONFIG_KINETIS_UART4_RXDMA static char g_uart4rxfifo[RXDMA_BUFFER_SIZE] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); # endif #endif @@ -454,7 +454,7 @@ static char g_uart5rxbuffer[CONFIG_UART5_RXBUFSIZE]; static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE]; # ifdef CONFIG_KINETIS_UART5_RXDMA static char g_uart5rxfifo[RXDMA_BUFFER_SIZE] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); # endif #endif @@ -1252,22 +1252,6 @@ static int up_interrupts(int irq, void *context, FAR void *arg) uart_xmitchars(dev); handled = true; } - -#if defined(SERIAL_HAVE_DMA) && !defined(CONFIG_KINETIS_UARTFIFOS) - /* Check if the receiver has detected IDLE. If so - * then flush any partail data in the SW rx fifo. - */ - - if ((s1 & UART_S1_IDLE) != 0) - { - up_serialin(priv, KINETIS_UART_D_OFFSET); - up_dma_rxcallback(priv->rxdma, dev , false, 0); - - /* Exit ASAP */ - - handled = false; - } -#endif } return OK; @@ -1689,9 +1673,6 @@ static void up_rxint(struct uart_dev_s *dev, bool enable) #ifndef CONFIG_SUPPRESS_SERIAL_INTS priv->ie |= UART_C2_RIE; -#if defined(SERIAL_HAVE_DMA) && !defined(CONFIG_KINETIS_UARTFIFOS) - priv->ie |= UART_C2_RIE | UART_C2_ILIE; -#endif up_setuartint(priv); #endif } @@ -2087,6 +2068,70 @@ unsigned int kinetis_uart_serialinit(unsigned int first) return first; } +/**************************************************************************** + * Name: kinetis_serial_dma_poll + * + * Description: + * Checks receive DMA buffers for received bytes that have not accumulated + * to the point where the DMA half/full interrupt has triggered. + * + * This function should be called from a timer or other periodic context. + * + ****************************************************************************/ + +#ifdef SERIAL_HAVE_DMA +void kinetis_serial_dma_poll(void) +{ + irqstate_t flags; + + flags = enter_critical_section(); + +#ifdef CONFIG_KINETIS_UART0_RXDMA + if (g_uart0priv.rxdma != NULL) + { + up_dma_rxcallback(g_uart0priv.rxdma, (void *)&g_uart0port, false, 0); + } +#endif + +#ifdef CONFIG_KINETIS_UART1_RXDMA + if (g_uart1priv.rxdma != NULL) + { + up_dma_rxcallback(g_uart1priv.rxdma, (void *)&g_uart1port, false, 0); + } +#endif + +#ifdef CONFIG_KINETIS_UART2_RXDMA + if (g_uart2priv.rxdma != NULL) + { + up_dma_rxcallback(g_uart2priv.rxdma, (void *)&g_uart2port, false, 0); + } +#endif + +#ifdef CONFIG_KINETIS_UART3_RXDMA + if (g_uart3priv.rxdma != NULL) + { + up_dma_rxcallback(g_uart3priv.rxdma, (void *)&g_uart3port, false, 0); + } +#endif + +#ifdef CONFIG_KINETIS_UART4_RXDMA + if (g_uart4priv.rxdma != NULL) + { + up_dma_rxcallback(g_uart4priv.rxdma, (void *)&g_uart4port, false, 0); + } +#endif + +#ifdef CONFIG_KINETIS_UART5_RXDMA + if (g_uart5priv.rxdma != NULL) + { + up_dma_rxcallback(g_uart5priv.rxdma, (void *)&g_uart5port, false, 0); + } +#endif + + leave_critical_section(flags); +} +#endif + /**************************************************************************** * Name: up_putc * diff --git a/arch/arm/src/kinetis/kinetis_spi.c b/arch/arm/src/kinetis/kinetis_spi.c index 094ecdf491d..09742695821 100644 --- a/arch/arm/src/kinetis/kinetis_spi.c +++ b/arch/arm/src/kinetis/kinetis_spi.c @@ -1160,7 +1160,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, int ret; size_t adjust; ssize_t nbytes; - static uint8_t rxdummy[4] __attribute__((aligned(4))); + static uint8_t rxdummy[4] aligned_data(4); static const uint16_t txdummy = 0xffff; FAR struct kinetis_spidev_s *priv = (FAR struct kinetis_spidev_s *)dev; diff --git a/arch/arm/src/kinetis/kinetis_start.c b/arch/arm/src/kinetis/kinetis_start.c index 65b62265084..8fa57d415b5 100644 --- a/arch/arm/src/kinetis/kinetis_start.c +++ b/arch/arm/src/kinetis/kinetis_start.c @@ -95,7 +95,7 @@ const uintptr_t g_idle_topstack = HEAP_BASE; #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/kinetis/kinetis_uart.h b/arch/arm/src/kinetis/kinetis_uart.h index 39b9aa9d7ec..f4d396b7001 100644 --- a/arch/arm/src/kinetis/kinetis_uart.h +++ b/arch/arm/src/kinetis/kinetis_uart.h @@ -52,5 +52,51 @@ # endif #endif +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: kinetis_serial_dma_poll + * + * Description: + * Must be called periodically if any Kinetis UART is configured for DMA. + * The DMA callback is triggered for each fifo size/2 bytes, but this can + * result in some bytes being transferred but not collected if the incoming + * data is not a whole multiple of half the FIFO size. + * + * May be safely called from either interrupt or thread context. + * + ****************************************************************************/ + +#ifdef SERIAL_HAVE_DMA +void kinetis_serial_dma_poll(void); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ #endif /* HAVE_UART_DEVICE && USE_SERIALDRIVER) */ #endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_UART_H */ diff --git a/arch/arm/src/kinetis/kinetis_usbdev.c b/arch/arm/src/kinetis/kinetis_usbdev.c index 8c592829c9b..75a692658ab 100644 --- a/arch/arm/src/kinetis/kinetis_usbdev.c +++ b/arch/arm/src/kinetis/kinetis_usbdev.c @@ -674,7 +674,7 @@ static const struct usbdev_ops_s g_devops = */ static volatile struct usbotg_bdtentry_s g_bdt[4*KHCI_NENDPOINTS] - __attribute__ ((aligned(512))); + aligned_data(512); /**************************************************************************** * Private Private Functions diff --git a/arch/arm/src/kinetis/kinetis_usbhshost.c b/arch/arm/src/kinetis/kinetis_usbhshost.c index ccfd71e0058..bd83e8e1aa5 100644 --- a/arch/arm/src/kinetis/kinetis_usbhshost.c +++ b/arch/arm/src/kinetis/kinetis_usbhshost.c @@ -609,17 +609,17 @@ static const uint8_t g_ehci_speed[4] = /* The head of the asynchronous queue */ -static struct kinetis_qh_s g_asynchead __attribute__ ((aligned(32))); +static struct kinetis_qh_s g_asynchead aligned_data(32); #ifndef CONFIG_USBHOST_INT_DISABLE /* The head of the periodic queue */ -static struct kinetis_qh_s g_intrhead __attribute__ ((aligned(32))); +static struct kinetis_qh_s g_intrhead aligned_data(32); /* The frame list */ #ifdef CONFIG_KINETIS_EHCI_PREALLOCATE -static uint32_t g_framelist[FRAME_LIST_SIZE] __attribute__ ((aligned(4096))); +static uint32_t g_framelist[FRAME_LIST_SIZE] aligned_data(4096); #else static uint32_t *g_framelist; #endif @@ -633,12 +633,12 @@ static uint32_t *g_framelist; /* Queue Head (QH) pool */ static struct kinetis_qh_s g_qhpool[CONFIG_KINETIS_EHCI_NQHS] - __attribute__ ((aligned(32))); + aligned_data(32); /* Queue Element Transfer Descriptor (qTD) pool */ static struct kinetis_qtd_s g_qtdpool[CONFIG_KINETIS_EHCI_NQTDS] - __attribute__ ((aligned(32))); + aligned_data(32); #else /* Pools of dynamically data structures. These will all be linked into the diff --git a/arch/arm/src/kl/Make.defs b/arch/arm/src/kl/Make.defs index 2f7691745ab..9a88724b36f 100644 --- a/arch/arm/src/kl/Make.defs +++ b/arch/arm/src/kl/Make.defs @@ -19,7 +19,7 @@ ############################################################################ CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S -CMN_ASRCS += arm_switchcontext.S vfork.S +CMN_ASRCS += vfork.S CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c @@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c +CMN_CSRCS += arm_switchcontext.c ifeq ($(CONFIG_BUILD_PROTECTED),y) CMN_CSRCS += arm_task_start.c arm_pthread_start.c diff --git a/arch/arm/src/kl/kl_cfmconfig.c b/arch/arm/src/kl/kl_cfmconfig.c index 5fc1f30f509..5890b358caa 100644 --- a/arch/arm/src/kl/kl_cfmconfig.c +++ b/arch/arm/src/kl/kl_cfmconfig.c @@ -32,7 +32,7 @@ * Public Data ****************************************************************************/ -const uint8_t _cfmconfig[16] __attribute__((section(".cfmconfig"))) = +const uint8_t _cfmconfig[16] locate_data(".cfmconfig") = { 0xff, /* NV_BACKKEY3: KEY=0xff */ 0xff, /* NV_BACKKEY2: KEY=0xff */ diff --git a/arch/arm/src/lc823450/Make.defs b/arch/arm/src/lc823450/Make.defs index 4f37e68a7cb..f0ba8bda40b 100644 --- a/arch/arm/src/lc823450/Make.defs +++ b/arch/arm/src/lc823450/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c @@ -28,7 +28,8 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c -CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c +CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_switchcontext.c +CMN_CSRCS += arm_puts.c # CMN_CSRCS += up_dwt.c diff --git a/arch/arm/src/lc823450/lc823450_adc.c b/arch/arm/src/lc823450/lc823450_adc.c index 6dded5b8e47..c350c074759 100644 --- a/arch/arm/src/lc823450/lc823450_adc.c +++ b/arch/arm/src/lc823450/lc823450_adc.c @@ -456,35 +456,46 @@ static int lc823450_adc_ioctl(FAR struct adc_dev_s *dev, int cmd, switch (cmd) { case ANIOC_TRIGGER: /* Software trigger */ + { + lc823450_adc_standby(0); - lc823450_adc_standby(0); + lc823450_adc_start(priv); - lc823450_adc_start(priv); + /* Get ADC data */ - /* Get ADC data */ + for (ch = 0; ch < CONFIG_LC823450_ADC_NCHANNELS; ch++) + { + val = getreg32(LC823450_ADC0DT(ch)); - for (ch = 0; ch < CONFIG_LC823450_ADC_NCHANNELS; ch++) - { - val = getreg32(LC823450_ADC0DT(ch)); + /* Give the ADC data to the ADC driver framework. + * adc_receive accepts 3 parameters: + * + * 1) The first is the ADC device instance for this ADC block. + * 2) The second is the channel number for the data, and + * 3) The third is the converted data for the channel. + */ - /* Give the ADC data to the ADC driver framework. - * adc_receive accepts 3 parameters: - * - * 1) The first is the ADC device instance for this ADC block. - * 2) The second is the channel number for the data, and - * 3) The third is the converted data for the channel. - */ + priv->cb->au_receive(dev, priv->chanlist[ch], val); + DEBUGASSERT(ret == OK); + } - priv->cb->au_receive(dev, priv->chanlist[ch], val); - DEBUGASSERT(ret == OK); - } - - lc823450_adc_standby(1); + lc823450_adc_standby(1); + } break; - default: - ret = -ENOTTY; - break; + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = CONFIG_LC823450_ADC_NCHANNELS; + } + break; + + default: + { + ret = -ENOTTY; + } + break; } lc823450_adc_sem_post(priv); diff --git a/arch/arm/src/lc823450/lc823450_cpustart.c b/arch/arm/src/lc823450/lc823450_cpustart.c index 043ceaeb9db..cfc8db0768d 100644 --- a/arch/arm/src/lc823450/lc823450_cpustart.c +++ b/arch/arm/src/lc823450/lc823450_cpustart.c @@ -127,14 +127,14 @@ static void cpu1_boot(void) * Name: up_cpu_start * * Description: - * In an SMP configution, only one CPU is initially active (CPU 0). System - * initialization occurs on that single thread. At the completion of the - * initialization of the OS, just before beginning normal multitasking, + * In an SMP configuration, only one CPU is initially active (CPU 0). + * System initialization occurs on that single thread. At the completion of + * the initialization of the OS, just before beginning normal multitasking, * the additional CPUs would be started by calling this function. * - * Each CPU is provided the entry point to is IDLE task when started. A + * Each CPU is provided the entry point to its IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or + * CPU's g_assignedtasks[cpu] list. No stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each @@ -142,8 +142,8 @@ static void cpu1_boot(void) * * Input Parameters: * cpu - The index of the CPU being started. This will be a numeric - * value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU - * 0 is already active) + * value in the range of one to (CONFIG_SMP_NCPUS-1). + * (CPU 0 is already active) * * Returned Value: * Zero on success; a negated errno value on failure. diff --git a/arch/arm/src/lc823450/lc823450_testset.c b/arch/arm/src/lc823450/lc823450_testset.c index 25351e4cea6..d234b54290c 100644 --- a/arch/arm/src/lc823450/lc823450_testset.c +++ b/arch/arm/src/lc823450/lc823450_testset.c @@ -52,14 +52,14 @@ * LC823450 does not support ldrex/strex. Instead, MUTEX is provided. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ diff --git a/arch/arm/src/lpc17xx_40xx/Kconfig b/arch/arm/src/lpc17xx_40xx/Kconfig index e41961a4f35..952df3aa20d 100644 --- a/arch/arm/src/lpc17xx_40xx/Kconfig +++ b/arch/arm/src/lpc17xx_40xx/Kconfig @@ -416,7 +416,7 @@ config LPC17_40_EEPROM depends on ARCH_FAMILY_LPC177X || ARCH_FAMILY_LPC178X || ARCH_FAMILY_LPC407X || ARCH_FAMILY_LPC408X config LPC17_40_PROGMEM - bool PROGMEM + bool "PROGMEM" default n select ARCH_HAVE_PROGMEM ---help--- diff --git a/arch/arm/src/lpc17xx_40xx/Make.defs b/arch/arm/src/lpc17xx_40xx/Make.defs index 20883e70d8b..41236ba6648 100644 --- a/arch/arm/src/lpc17xx_40xx/Make.defs +++ b/arch/arm/src/lpc17xx_40xx/Make.defs @@ -20,7 +20,7 @@ # Common ARM and Cortex-M3 files -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -30,8 +30,8 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_trigger_irq.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c -CMN_CSRCS += arm_svcall.c arm_checkstack.c arm_vfork.c -CMN_CSRCS += arm_systemreset.c +CMN_CSRCS += arm_svcall.c arm_checkstack.c arm_vfork.c arm_switchcontext.c +CMN_CSRCS += arm_systemreset.c arm_puts.c ifeq ($(CONFIG_ARMV7M_STACKCHECK),y) CMN_CSRCS += arm_stackcheck.c diff --git a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_wdt.h b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_wdt.h index 6c6d1b2297a..1e2d2eda583 100644 --- a/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_wdt.h +++ b/arch/arm/src/lpc17xx_40xx/hardware/lpc17_40_wdt.h @@ -89,7 +89,7 @@ /* Watchdog feed sequence register */ -#define WDT_FEED_KEY_1 (0xAA) /* Watchdog feed key 1 */ +#define WDT_FEED_KEY_1 (0xaa) /* Watchdog feed key 1 */ #define WDT_FEED_KEY_2 (0x55) /* Watchdog feed key 2 */ #define WDT_FEED_MASK (0xff) /* Bits 0-7: Feed value should be 0xaa * followed by 0x55 */ diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c index 7e9ed99da7b..edb8a09ad30 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c @@ -516,12 +516,6 @@ struct i2c_master_s *lpc17_40_i2cbus_initialize(int port) { struct lpc17_40_i2cdev_s *priv; - if (port > 1) - { - i2cerr("ERROR: LPC I2C Only supports ports 0 and 1\n"); - return NULL; - } - irqstate_t flags; uint32_t regval; @@ -615,6 +609,7 @@ struct i2c_master_s *lpc17_40_i2cbus_initialize(int port) else #endif { + i2cerr("ERROR: LPC I2C Only supports ports 0, 1 and 2\n"); return NULL; } diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_start.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_start.c index 50bea3f4fc8..1928eb37fba 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_start.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_start.c @@ -184,7 +184,7 @@ static inline void lpc17_40_fpuconfig(void) #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/lpc17xx_40xx/lpc17_40_usbdev.c b/arch/arm/src/lpc17xx_40xx/lpc17_40_usbdev.c index 77a23a974a6..1cb1f068f2b 100644 --- a/arch/arm/src/lpc17xx_40xx/lpc17_40_usbdev.c +++ b/arch/arm/src/lpc17xx_40xx/lpc17_40_usbdev.c @@ -509,7 +509,7 @@ static const struct usbdev_ops_s g_devops = #ifdef CONFIG_LPC17_40_USBDEV_DMA static uint32_t -g_udca[LPC17_40_NPHYSENDPOINTS] __attribute__ ((aligned (128))); +g_udca[LPC17_40_NPHYSENDPOINTS] aligned_data(128); static struct lpc17_40_dmadesc_s g_usbddesc[CONFIG_LPC17_40_USBDEV_NDMADESCRIPTORS]; #endif diff --git a/arch/arm/src/lpc214x/Make.defs b/arch/arm/src/lpc214x/Make.defs index fa0121b0e92..c6a81dae104 100644 --- a/arch/arm/src/lpc214x/Make.defs +++ b/arch/arm/src/lpc214x/Make.defs @@ -30,7 +30,7 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c arm_usestack.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c -CMN_CSRCS += arm_lowputs.c arm_vfork.c +CMN_CSRCS += arm_lowputs.c arm_vfork.c arm_puts.c ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CMN_CSRCS += arm_idle.c diff --git a/arch/arm/src/lpc2378/Make.defs b/arch/arm/src/lpc2378/Make.defs index 7095b313868..de00ebe924f 100644 --- a/arch/arm/src/lpc2378/Make.defs +++ b/arch/arm/src/lpc2378/Make.defs @@ -49,7 +49,7 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c CMN_CSRCS += arm_usestack.c arm_lowputs.c arm_vfork.c -CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c +CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_puts.c ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CMN_CSRCS += arm_idle.c diff --git a/arch/arm/src/lpc31xx/Make.defs b/arch/arm/src/lpc31xx/Make.defs index 4189e221743..dd9f7905054 100644 --- a/arch/arm/src/lpc31xx/Make.defs +++ b/arch/arm/src/lpc31xx/Make.defs @@ -30,7 +30,7 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c -CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_puts.c ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CMN_CSRCS += arm_idle.c diff --git a/arch/arm/src/lpc31xx/lpc31_ehci.c b/arch/arm/src/lpc31xx/lpc31_ehci.c index baef7c690be..4990137a548 100644 --- a/arch/arm/src/lpc31xx/lpc31_ehci.c +++ b/arch/arm/src/lpc31xx/lpc31_ehci.c @@ -585,17 +585,17 @@ static const uint8_t g_ehci_speed[4] = /* The head of the asynchronous queue */ -static struct lpc31_qh_s g_asynchead __attribute__ ((aligned(32))); +static struct lpc31_qh_s g_asynchead aligned_data(32); #ifndef CONFIG_USBHOST_INT_DISABLE /* The head of the periodic queue */ -static struct lpc31_qh_s g_intrhead __attribute__ ((aligned(32))); +static struct lpc31_qh_s g_intrhead aligned_data(32); /* The frame list */ #ifdef CONFIG_LPC31_EHCI_PREALLOCATE -static uint32_t g_framelist[FRAME_LIST_SIZE] __attribute__ ((aligned(4096))); +static uint32_t g_framelist[FRAME_LIST_SIZE] aligned_data(4096); #else static uint32_t *g_framelist; #endif @@ -609,12 +609,12 @@ static uint32_t *g_framelist; /* Queue Head (QH) pool */ static struct lpc31_qh_s g_qhpool[CONFIG_LPC31_EHCI_NQHS] - __attribute__ ((aligned(32))); + aligned_data(32); /* Queue Element Transfer Descriptor (qTD) pool */ static struct lpc31_qtd_s g_qtdpool[CONFIG_LPC31_EHCI_NQTDS] - __attribute__ ((aligned(32))); + aligned_data(32); #else /* Pools of dynamically data structures. These will all be linked into the diff --git a/arch/arm/src/lpc31xx/lpc31_usbdev.c b/arch/arm/src/lpc31xx/lpc31_usbdev.c index eb60a7ff664..2593e4567df 100644 --- a/arch/arm/src/lpc31xx/lpc31_usbdev.c +++ b/arch/arm/src/lpc31xx/lpc31_usbdev.c @@ -450,9 +450,9 @@ static int lpc31_pullup(struct usbdev_s *dev, bool enable); static struct lpc31_usbdev_s g_usbdev; static struct -lpc31_dqh_s __attribute__((aligned(2048))) g_qh[LPC31_NPHYSENDPOINTS]; +lpc31_dqh_s aligned_data(2048) g_qh[LPC31_NPHYSENDPOINTS]; static struct -lpc31_dtd_s __attribute__((aligned(32))) g_td[LPC31_NPHYSENDPOINTS]; +lpc31_dtd_s aligned_data(32) g_td[LPC31_NPHYSENDPOINTS]; static const struct usbdev_epops_s g_epops = { diff --git a/arch/arm/src/lpc43xx/Make.defs b/arch/arm/src/lpc43xx/Make.defs index c42b7774d06..8db0e728ada 100644 --- a/arch/arm/src/lpc43xx/Make.defs +++ b/arch/arm/src/lpc43xx/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -28,7 +28,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c -CMN_CSRCS += arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) CMN_ASRCS += arm_lazyexception.S diff --git a/arch/arm/src/lpc43xx/lpc43_ehci.c b/arch/arm/src/lpc43xx/lpc43_ehci.c index 60ef8580877..afbef8ee177 100644 --- a/arch/arm/src/lpc43xx/lpc43_ehci.c +++ b/arch/arm/src/lpc43xx/lpc43_ehci.c @@ -575,17 +575,17 @@ static const uint8_t g_ehci_speed[4] = /* The head of the asynchronous queue */ -static struct lpc43_qh_s g_asynchead __attribute__ ((aligned(32))); +static struct lpc43_qh_s g_asynchead aligned_data(32); #ifndef CONFIG_USBHOST_INT_DISABLE /* The head of the periodic queue */ -static struct lpc43_qh_s g_intrhead __attribute__ ((aligned(32))); +static struct lpc43_qh_s g_intrhead aligned_data(32); /* The frame list */ #ifdef CONFIG_LPC43_EHCI_PREALLOCATE -static uint32_t g_framelist[FRAME_LIST_SIZE] __attribute__ ((aligned(4096))); +static uint32_t g_framelist[FRAME_LIST_SIZE] aligned_data(4096); #else static uint32_t *g_framelist; #endif @@ -599,12 +599,12 @@ static uint32_t *g_framelist; /* Queue Head (QH) pool */ static struct lpc43_qh_s g_qhpool[CONFIG_LPC43_EHCI_NQHS] - __attribute__ ((aligned(32))); + aligned_data(32); /* Queue Element Transfer Descriptor (qTD) pool */ static struct lpc43_qtd_s g_qtdpool[CONFIG_LPC43_EHCI_NQTDS] - __attribute__ ((aligned(32))); + aligned_data(32); #else /* Pools of dynamically data structures. These will all be linked into the diff --git a/arch/arm/src/lpc43xx/lpc43_usb0dev.c b/arch/arm/src/lpc43xx/lpc43_usb0dev.c index 76381228dd2..daa1ce1beb3 100644 --- a/arch/arm/src/lpc43xx/lpc43_usb0dev.c +++ b/arch/arm/src/lpc43xx/lpc43_usb0dev.c @@ -452,9 +452,9 @@ static int lpc43_pullup(struct usbdev_s *dev, bool enable); static struct lpc43_usbdev_s g_usbdev; static struct -lpc43_dqh_s __attribute__((aligned(2048))) g_qh[LPC43_NPHYSENDPOINTS]; +lpc43_dqh_s aligned_data(2048) g_qh[LPC43_NPHYSENDPOINTS]; static struct -lpc43_dtd_s __attribute__((aligned(32))) g_td[LPC43_NPHYSENDPOINTS]; +lpc43_dtd_s aligned_data(32) g_td[LPC43_NPHYSENDPOINTS]; static const struct usbdev_epops_s g_epops = { diff --git a/arch/arm/src/lpc54xx/Make.defs b/arch/arm/src/lpc54xx/Make.defs index 2f89791d6a8..154243f2de8 100644 --- a/arch/arm/src/lpc54xx/Make.defs +++ b/arch/arm/src/lpc54xx/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -28,7 +28,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c -CMN_CSRCS += arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) CMN_ASRCS += arm_lazyexception.S diff --git a/arch/arm/src/lpc54xx/lpc54_usb0_ohci.c b/arch/arm/src/lpc54xx/lpc54_usb0_ohci.c index f9ec61deaf2..821f8d37811 100644 --- a/arch/arm/src/lpc54xx/lpc54_usb0_ohci.c +++ b/arch/arm/src/lpc54xx/lpc54_usb0_ohci.c @@ -521,21 +521,21 @@ static struct usbhost_connection_s g_usbconn = /* Aligned static memory allocations */ static uint8_t g_hcca[LPC54_HCCA_SIZE] \ - __attribute__ ((aligned(LPC54_ALIGN_SIZE))); + aligned_data(LPC54_ALIGN_SIZE); static uint8_t g_tdtail_alloc[LPC54_TD_SIZE] \ - __attribute__ ((aligned(LPC54_ALIGN_SIZE))); + aligned_data(LPC54_ALIGN_SIZE); static uint8_t g_edctrl_alloc[LPC54_ED_SIZE] \ - __attribute__ ((aligned(LPC54_ALIGN_SIZE))); + aligned_data(LPC54_ALIGN_SIZE); static uint8_t g_edfree_alloc[LPC54_EDFREE_SIZE] \ - __attribute__ ((aligned(LPC54_ALIGN_SIZE))); + aligned_data(LPC54_ALIGN_SIZE); static uint8_t g_tdfree_alloc[LPC54_TDFREE_SIZE] \ - __attribute__ ((aligned(LPC54_ALIGN_SIZE))); + aligned_data(LPC54_ALIGN_SIZE); static uint8_t g_tbfree_alloc[LPC54_TBFREE_SIZE] \ - __attribute__ ((aligned(LPC54_ALIGN_SIZE))); + aligned_data(LPC54_ALIGN_SIZE); #if LPC54_IOBUFFERS > 0 static uint8_t g_iobuffers[LPC54_IOBUF_ALLOC] \ - __attribute__ ((aligned(LPC54_ALIGN_SIZE))); + aligned_data(LPC54_ALIGN_SIZE); #endif /* This is a free list of EDs and TD buffers */ diff --git a/arch/arm/src/max326xx/Kconfig b/arch/arm/src/max326xx/Kconfig index feae4d2fa39..5286f3c5f02 100644 --- a/arch/arm/src/max326xx/Kconfig +++ b/arch/arm/src/max326xx/Kconfig @@ -226,7 +226,7 @@ config MAX326XX_WDOG depends on MAX326XX_HAVE_WDOG config MAX326XX_WWDOG0 - bool "Windowed Watchdog Timer (WDT0) " + bool "Windowed Watchdog Timer (WDT0)" default n depends on MAX326XX_HAVE_WWDOG diff --git a/arch/arm/src/max326xx/Make.defs b/arch/arm/src/max326xx/Make.defs index b4f7e63c93a..1b3545a7645 100644 --- a/arch/arm/src/max326xx/Make.defs +++ b/arch/arm/src/max326xx/Make.defs @@ -20,7 +20,7 @@ # Common ARMv7-M Source Files -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c @@ -30,7 +30,8 @@ CMN_CSRCS += arm_mdelay.c arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c -CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c arm_switchcontext.c +CMN_CSRCS += arm_puts.c ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) CMN_ASRCS += arm_lazyexception.S diff --git a/arch/arm/src/moxart/Make.defs b/arch/arm/src/moxart/Make.defs index 54ea75c45f2..b6c67e11e07 100644 --- a/arch/arm/src/moxart/Make.defs +++ b/arch/arm/src/moxart/Make.defs @@ -47,6 +47,7 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_syscall.c arm_unblocktask.c CMN_CSRCS += arm_undefinedinsn.c arm_usestack.c arm_vfork.c arm_etherstub.c +CMN_CSRCS += arm_puts.c CHIP_ASRCS = moxart_lowputc.S diff --git a/arch/arm/src/nrf52/Make.defs b/arch/arm/src/nrf52/Make.defs index b5091bc5c21..603819d2206 100644 --- a/arch/arm/src/nrf52/Make.defs +++ b/arch/arm/src/nrf52/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c @@ -29,6 +29,7 @@ CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_udelay.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_systemreset.c +CMN_CSRCS += arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_NRF52_SYSTIMER_SYSTICK),y) CMN_CSRCS += arm_systick.c nrf52_systick.c @@ -172,7 +173,7 @@ chip/$(NRFXLIB_UNPACK): $(NRFXLIB_TGZ) context:: chip/$(NRFXLIB_UNPACK) -clean_context:: +distclean:: $(call DELFILE, chip/$(NRFXLIB_TGZ)) $(call DELDIR, chip/$(NRFXLIB_UNPACK)) diff --git a/arch/arm/src/nrf52/hardware/nrf52_rtc.h b/arch/arm/src/nrf52/hardware/nrf52_rtc.h index 6412f179cef..b9f2cb12472 100644 --- a/arch/arm/src/nrf52/hardware/nrf52_rtc.h +++ b/arch/arm/src/nrf52/hardware/nrf52_rtc.h @@ -103,6 +103,6 @@ /* CC Register */ -#define RTC_CC_MASK (0x00ffffff) /* Bits 0-23: Comapre register */ +#define RTC_CC_MASK (0x00ffffff) /* Bits 0-23: Compare register */ #endif /* __ARCH_ARM_SRC_NRF52_HARDWARE_NRF52_RTC_H */ diff --git a/arch/arm/src/nrf52/nrf52_adc.c b/arch/arm/src/nrf52/nrf52_adc.c index 47c2136b3e8..73c38036c15 100644 --- a/arch/arm/src/nrf52/nrf52_adc.c +++ b/arch/arm/src/nrf52/nrf52_adc.c @@ -879,16 +879,23 @@ static int nrf52_adc_ioctl(FAR struct adc_dev_s *dev, int cmd, /* Trigger first sample */ nrf52_adc_putreg(priv, NRF52_SAADC_TASKS_SAMPLE_OFFSET, 1); - - break; } + break; + + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->chan_len; + } + break; default: { aerr("ERROR: Unknown cmd: %d\n", cmd); ret = -ENOTTY; - break; } + break; } return ret; diff --git a/arch/arm/src/nrf52/nrf52_clockconfig.c b/arch/arm/src/nrf52/nrf52_clockconfig.c index 678179f55bc..0e4af50f88d 100644 --- a/arch/arm/src/nrf52/nrf52_clockconfig.c +++ b/arch/arm/src/nrf52/nrf52_clockconfig.c @@ -55,7 +55,7 @@ void nrf52_clockconfig(void) { #ifdef CONFIG_NRF52_HFCLK_XTAL - /* Initilize HFCLK crystal oscillator */ + /* Initialize HFCLK crystal oscillator */ putreg32(0x0, NRF52_CLOCK_EVENTS_HFCLKSTARTED); putreg32(0x1, NRF52_CLOCK_TASKS_HFCLKSTART); diff --git a/arch/arm/src/nrf52/nrf52_pwm.c b/arch/arm/src/nrf52/nrf52_pwm.c index 982fcbaea77..31dfdcded99 100644 --- a/arch/arm/src/nrf52/nrf52_pwm.c +++ b/arch/arm/src/nrf52/nrf52_pwm.c @@ -574,6 +574,13 @@ static int nrf52_pwm_start(FAR struct pwm_lowerhalf_s *dev, #ifdef CONFIG_PWM_MULTICHAN for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++) { + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + /* Set output if channel configured */ if (info->channels[i].channel != 0) diff --git a/arch/arm/src/nrf52/nrf52_radio.c b/arch/arm/src/nrf52/nrf52_radio.c index e7ee9c04358..28ec00208e5 100644 --- a/arch/arm/src/nrf52/nrf52_radio.c +++ b/arch/arm/src/nrf52/nrf52_radio.c @@ -323,7 +323,7 @@ static int nrf52_radio_rssi_get(FAR struct nrf52_radio_dev_s *dev, * Name: nrf52_radio_addr_set * * Description: - * Set radio logical adress + * Set radio logical address * ****************************************************************************/ @@ -347,7 +347,7 @@ static int nrf52_radio_addr_set(FAR struct nrf52_radio_dev_s *dev, uint8_t i, goto errout; } - /* Get data specific for given logical adress */ + /* Get data specific for given logical address */ if (i == 0) { @@ -360,7 +360,7 @@ static int nrf52_radio_addr_set(FAR struct nrf52_radio_dev_s *dev, uint8_t i, } else if (i < 4) { - /* Logical addres 1-3 - BASE1 and PREFIX0 */ + /* Logical address 1-3 - BASE1 and PREFIX0 */ basereg = NRF52_RADIO_BASE1_OFFSET; prefixreg = NRF52_RADIO_PREFIX0_OFFSET; @@ -369,7 +369,7 @@ static int nrf52_radio_addr_set(FAR struct nrf52_radio_dev_s *dev, uint8_t i, } else { - /* Logical addres 1-3 - BASE1 and PREFIX1 */ + /* Logical address 1-3 - BASE1 and PREFIX1 */ basereg = NRF52_RADIO_BASE1_OFFSET; prefixreg = NRF52_RADIO_PREFIX1_OFFSET; diff --git a/arch/arm/src/nrf52/nrf52_start.c b/arch/arm/src/nrf52/nrf52_start.c index caf54a59579..ea5a7396302 100644 --- a/arch/arm/src/nrf52/nrf52_start.c +++ b/arch/arm/src/nrf52/nrf52_start.c @@ -69,7 +69,7 @@ #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/nrf52/nrf52_tim.c b/arch/arm/src/nrf52/nrf52_tim.c index 181bd56489a..8d60758acd1 100644 --- a/arch/arm/src/nrf52/nrf52_tim.c +++ b/arch/arm/src/nrf52/nrf52_tim.c @@ -218,7 +218,7 @@ static void nrf52_tim_putreg(FAR struct nrf52_tim_dev_s *dev, * Name: nrf52_tim_irq2reg * * Description: - * Get the vaule of the interrupt register corresponding to the given + * Get the value of the interrupt register corresponding to the given * interrupt source * ****************************************************************************/ diff --git a/arch/arm/src/nuc1xx/Make.defs b/arch/arm/src/nuc1xx/Make.defs index cd19f8ec884..ab53a2ec802 100644 --- a/arch/arm/src/nuc1xx/Make.defs +++ b/arch/arm/src/nuc1xx/Make.defs @@ -19,7 +19,7 @@ ############################################################################ CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S -CMN_ASRCS += arm_switchcontext.S vfork.S +CMN_ASRCS += vfork.S CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c @@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c +CMN_CSRCS += arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_BUILD_PROTECTED),y) CMN_CSRCS += arm_task_start.c arm_pthread_start.c diff --git a/arch/arm/src/rp2040/Make.defs b/arch/arm/src/rp2040/Make.defs index a2d21c75d8b..9ad39297094 100644 --- a/arch/arm/src/rp2040/Make.defs +++ b/arch/arm/src/rp2040/Make.defs @@ -19,7 +19,7 @@ ############################################################################ CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S -CMN_ASRCS += arm_switchcontext.S vfork.S +CMN_ASRCS += vfork.S CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c @@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c +CMN_CSRCS += arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARCH_RAMVECTORS),y) CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c diff --git a/arch/arm/src/rp2040/rp2040_cpustart.c b/arch/arm/src/rp2040/rp2040_cpustart.c index 08c16c2d726..af6f5b5420b 100644 --- a/arch/arm/src/rp2040/rp2040_cpustart.c +++ b/arch/arm/src/rp2040/rp2040_cpustart.c @@ -171,14 +171,14 @@ static void core1_boot(void) * Name: up_cpu_start * * Description: - * In an SMP configution, only one CPU is initially active (CPU 0). System - * initialization occurs on that single thread. At the completion of the - * initialization of the OS, just before beginning normal multitasking, + * In an SMP configuration, only one CPU is initially active (CPU 0). + * System initialization occurs on that single thread. At the completion of + * the initialization of the OS, just before beginning normal multitasking, * the additional CPUs would be started by calling this function. * - * Each CPU is provided the entry point to is IDLE task when started. A + * Each CPU is provided the entry point to its IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or + * CPU's g_assignedtasks[cpu] list. No stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each @@ -186,8 +186,8 @@ static void core1_boot(void) * * Input Parameters: * cpu - The index of the CPU being started. This will be a numeric - * value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU - * 0 is already active) + * value in the range of one to (CONFIG_SMP_NCPUS-1). + * (CPU 0 is already active) * * Returned Value: * Zero on success; a negated errno value on failure. diff --git a/arch/arm/src/rp2040/rp2040_spi.c b/arch/arm/src/rp2040/rp2040_spi.c index 273bb87a4e1..29012c08c56 100644 --- a/arch/arm/src/rp2040/rp2040_spi.c +++ b/arch/arm/src/rp2040/rp2040_spi.c @@ -57,10 +57,6 @@ * Pre-processor Definitions ****************************************************************************/ -#ifndef __unused -#define __unused __attribute__((unused)) -#endif - /* 8 frame FIFOs for both transmit and receive */ #define RP2040_SPI_FIFOSZ 8 @@ -110,9 +106,9 @@ static inline void spi_putreg(FAR struct rp2040_spidev_s *priv, /* DMA support */ #ifdef CONFIG_RP2040_SPI_DMA -static void __unused spi_dmaexchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, - FAR void *rxbuffer, size_t nwords); +static void unused_code spi_dmaexchange(FAR struct spi_dev_s *dev, + FAR const void *txbuffer, + FAR void *rxbuffer, size_t nwords); static void spi_dmatxcallback(DMA_HANDLE handle, uint8_t status, void *data); static void spi_dmarxcallback(DMA_HANDLE handle, uint8_t status, void *data); static void spi_dmatxsetup(FAR struct rp2040_spidev_s *priv, @@ -136,10 +132,10 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode); static void spi_setbits(FAR struct spi_dev_s *dev, int nbits); static uint32_t spi_send(FAR struct spi_dev_s *dev, uint32_t wd); -static void __unused spi_exchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, - FAR void *rxbuffer, - size_t nwords); +static void unused_code spi_exchange(FAR struct spi_dev_s *dev, + FAR const void *txbuffer, + FAR void *rxbuffer, + size_t nwords); #ifndef CONFIG_SPI_EXCHANGE static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords); diff --git a/arch/arm/src/rp2040/rp2040_testset.c b/arch/arm/src/rp2040/rp2040_testset.c index df693bf38c8..37fd5b80bd4 100644 --- a/arch/arm/src/rp2040/rp2040_testset.c +++ b/arch/arm/src/rp2040/rp2040_testset.c @@ -49,14 +49,14 @@ * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ diff --git a/arch/arm/src/rtl8720c/Make.defs b/arch/arm/src/rtl8720c/Make.defs index ce08554a2b3..3fec03905f6 100644 --- a/arch/arm/src/rtl8720c/Make.defs +++ b/arch/arm/src/rtl8720c/Make.defs @@ -32,7 +32,7 @@ CMN_ASRCS += arm_exception.S # CMN_ASRCS += arm_fetchadd.S arm_fpu.S arm_setjmp.S CMN_ASRCS += arm_fullcontextrestore.S arm_saveusercontext.S -CMN_ASRCS += arm_switchcontext.S arm_testset.S vfork.S +CMN_ASRCS += arm_testset.S vfork.S CMN_UASRCS += arm_signal_handler.S @@ -42,6 +42,7 @@ CMN_CSRCS += arm_itm_syslog.c arm_memfault.c arm_mpu.c arm_ramvec_attach.c CMN_CSRCS += arm_ramvec_initialize.c arm_releasepending.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_signal_dispatch.c CMN_CSRCS += arm_stackcheck.c arm_svcall.c arm_systick.c arm_unblocktask.c +CMN_CSRCS += arm_switchcontext.c # arch/arm/src/rtl8720c # diff --git a/arch/arm/src/rtl8720c/ameba_heap.c b/arch/arm/src/rtl8720c/ameba_heap.c index f4ae9714c5b..7875351a6b5 100644 --- a/arch/arm/src/rtl8720c/ameba_heap.c +++ b/arch/arm/src/rtl8720c/ameba_heap.c @@ -59,7 +59,7 @@ extern uint32_t __sram_end__; * address. */ -const uintptr_t __attribute__((weak)) g_idle_topstack = +const uintptr_t weak_data g_idle_topstack = ((uintptr_t)&__stack); /**************************************************************************** diff --git a/arch/arm/src/rtl8720c/ameba_start.c b/arch/arm/src/rtl8720c/ameba_start.c index 813becd5aed..3cafd0240a4 100644 --- a/arch/arm/src/rtl8720c/ameba_start.c +++ b/arch/arm/src/rtl8720c/ameba_start.c @@ -42,7 +42,7 @@ const hal_irq_api_t sys_irq_api = /* We need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__((no_instrument_function)); +void __start(void) noinstrument_function; #endif void __start(void) { diff --git a/arch/arm/src/rtl8720c/ameba_vectors.c b/arch/arm/src/rtl8720c/ameba_vectors.c index 88561f2f266..d7d548dfb24 100644 --- a/arch/arm/src/rtl8720c/ameba_vectors.c +++ b/arch/arm/src/rtl8720c/ameba_vectors.c @@ -63,8 +63,8 @@ extern void exception_common(void); * Note that the [ ... ] designated initialiser is a GCC extension. */ -unsigned _vectors[] __attribute__((section(".vectors"))) \ - __attribute__((aligned(0x100))) = +unsigned _vectors[] locate_data(".vectors") \ + aligned_data(0x100) = { /* Initial stack */ diff --git a/arch/arm/src/rtl8720c/amebaz_depend.c b/arch/arm/src/rtl8720c/amebaz_depend.c index a40c088a242..50a4514f5a0 100644 --- a/arch/arm/src/rtl8720c/amebaz_depend.c +++ b/arch/arm/src/rtl8720c/amebaz_depend.c @@ -50,7 +50,7 @@ int __wrap_printf(const char *fmt, ...) static int uxcriticalnesting = 0; -/* Critical Opration Start */ +/* Critical Operation Start */ void save_and_cli(void) { @@ -88,7 +88,7 @@ void rtw_exit_critical_from_isr(void **plock, unsigned long *pirql) restore_flags(); } -/* Critical Opration End */ +/* Critical Operation End */ /* arpa/inet.h Wrapper Start */ diff --git a/arch/arm/src/s32k1xx/Kconfig b/arch/arm/src/s32k1xx/Kconfig index 6ce1ea92581..ded70be28d8 100644 --- a/arch/arm/src/s32k1xx/Kconfig +++ b/arch/arm/src/s32k1xx/Kconfig @@ -272,12 +272,12 @@ config S32K1XX_FTM7 select S32K1XX_FTM depends on S32K1XX_HAVE_FTM7 -menuconfig S32K1XX_LPI2C0 +config S32K1XX_LPI2C0 bool "LPI2C0" default n select S32K1XX_LPI2C -menuconfig S32K1XX_LPI2C1 +config S32K1XX_LPI2C1 bool "LPI2C1" default n select S32K1XX_LPI2C @@ -329,7 +329,7 @@ config S32K1XX_RTC default n config S32K1XX_PROGMEM - bool PROGMEM + bool "PROGMEM" default n select ARCH_HAVE_PROGMEM depends on (ARCH_CHIP_S32K11X || (ARCH_CHIP_S32K14X && !ARCH_CHIP_S32K148) ) @@ -342,7 +342,7 @@ config S32K1XX_EEEPROM default n ---help--- Enables Emulated EEPROM function which uses the FlexRAM and FlexNVM - memory to emulate non-volatile memory. The EEEPROM wil be registered + memory to emulate non-volatile memory. The EEEPROM will be registered as a ramdisk block device endmenu # S32K1XX Peripheral Selection @@ -627,7 +627,7 @@ config S32K1XX_LPSPI_DWORD endmenu # LPSPI Configuration -menu "LPI2C0 Configuration" +menu "LPI2C0 Master Configuration" depends on S32K1XX_LPI2C0 config LPI2C0_BUSYIDLE @@ -642,9 +642,26 @@ config LPI2C0_FILTSDA int "I2C master digital glitch filters for SDA input in clock cycles" default 0 -endmenu # LPI2C0 Configuration +endmenu # LPI2C0 Master Configuration -menu "LPI2C1 Configuration" +menu "LPI2C0 Slave Configuration" + depends on S32K1XX_LPI2C0 + +config LPI2C0_SLAVE_ADDRESS + int "7-bit I2C address in decimal" + default 8 + range 8 119 + +config LPI2C0_SLAVE_BUS + bool "Separate I2C slave bus" + default n + ---help--- + When selected, the LPI2C slave will use separate SDA/SCL pins from + the LPI2C master. These pins need to be defined in the board.h. + +endmenu # LPI2C0 Slave Configuration + +menu "LPI2C1 Master Configuration" depends on S32K1XX_LPI2C1 config LPI2C1_BUSYIDLE @@ -659,7 +676,24 @@ config LPI2C1_FILTSDA int "I2C master digital glitch filters for SDA input in clock cycles" default 0 -endmenu # LPI2C1 Configuration +endmenu # LPI2C1 Master Configuration + +menu "LPI2C1 Slave Configuration" + depends on S32K1XX_LPI2C1 + +config LPI2C1_SLAVE_ADDRESS + int "7-bit I2C address in decimal" + default 9 + range 8 119 + +config LPI2C1_SLAVE_BUS + bool "Separate I2C slave bus" + default n + ---help--- + When selected, the LPI2C slave will use separate SDA/SCL pins from + the LPI2C master. These pins need to be defined in the board.h. + +endmenu # LPI2C1 Slave Configuration menu "Ethernet Configuration" depends on S32K1XX_ENET diff --git a/arch/arm/src/s32k1xx/Make.defs b/arch/arm/src/s32k1xx/Make.defs index f2cf13047b5..1362f465391 100644 --- a/arch/arm/src/s32k1xx/Make.defs +++ b/arch/arm/src/s32k1xx/Make.defs @@ -67,6 +67,7 @@ endif ifeq ($(CONFIG_S32K1XX_LPI2C),y) CHIP_CSRCS += s32k1xx_lpi2c.c +CHIP_CSRCS += s32k1xx_lpi2c_slave.c endif ifeq ($(CONFIG_S32K1XX_LPSPI),y) @@ -93,6 +94,14 @@ ifeq ($(CONFIG_S32K1XX_EEEPROM),y) CHIP_CSRCS += s32k1xx_eeeprom.c endif +ifneq ($(CONFIG_ARCH_CUSTOM_PMINIT),y) +CHIP_CSRCS += s32k1xx_pminitialize.c +endif + +ifeq ($(CONFIG_RESET_CAUSE_PROC_FS), y) +CHIP_CSRCS += s32k1xx_resetcause.c +endif + # Source files specific to the ARM CPU family and to the S32K1xx chip family ifeq ($(CONFIG_ARCH_CHIP_S32K11X),y) diff --git a/arch/arm/src/s32k1xx/hardware/s32k118_pinmux.h b/arch/arm/src/s32k1xx/hardware/s32k118_pinmux.h index 5de49b7db7b..ebc6f3a1bb2 100644 --- a/arch/arm/src/s32k1xx/hardware/s32k118_pinmux.h +++ b/arch/arm/src/s32k1xx/hardware/s32k118_pinmux.h @@ -182,7 +182,7 @@ #define PIN_LPSPI0_PCS2 (PIN_ALT2 | PIN_PORTE | PIN6) #define PIN_LPSPI0_SCK_1 (PIN_ALT2 | PIN_PORTE | PIN0) #define PIN_LPSPI0_SCK_2 (PIN_ALT3 | PIN_PORTB | PIN2) -#define PIN_LPSPI0_SCK (PIN_ALT4 | PIN_PORTD | PIN15) +#define PIN_LPSPI0_SCK_3 (PIN_ALT4 | PIN_PORTD | PIN15) #define PIN_LPSPI0_SIN_1 (PIN_ALT2 | PIN_PORTE | PIN1) #define PIN_LPSPI0_SIN_2 (PIN_ALT3 | PIN_PORTB | PIN3) #define PIN_LPSPI0_SIN_3 (PIN_ALT4 | PIN_PORTD | PIN16) diff --git a/arch/arm/src/s32k1xx/hardware/s32k1xx_flexio.h b/arch/arm/src/s32k1xx/hardware/s32k1xx_flexio.h new file mode 100644 index 00000000000..84674615285 --- /dev/null +++ b/arch/arm/src/s32k1xx/hardware/s32k1xx_flexio.h @@ -0,0 +1,430 @@ +/**************************************************************************** + * arch/arm/src/s32k1xx/hardware/s32k1xx_flexio.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K1XX_FLEXIO_H +#define __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K1XX_FLEXIO_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "hardware/s32k1xx_memorymap.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* FlexIO Register Offsets **************************************************/ + +#define S32K1XX_FLEXIO_VERID_OFFSET (0x0000) /* Version ID Register (VERID) */ +#define S32K1XX_FLEXIO_PARAM_OFFSET (0x0004) /* Parameter Register (PARAM) */ +#define S32K1XX_FLEXIO_CTRL_OFFSET (0x0008) /* FlexIO Control Register (CTRL) */ +#define S32K1XX_FLEXIO_PIN_OFFSET (0x000c) /* Pin State Register (PIN) */ +#define S32K1XX_FLEXIO_SHIFTSTAT_OFFSET (0x0010) /* Shifter Status Register (SHIFTSTAT) */ +#define S32K1XX_FLEXIO_SHIFTERR_OFFSET (0x0014) /* Shifter Error Register (SHIFTERR) */ +#define S32K1XX_FLEXIO_TIMSTAT_OFFSET (0x0018) /* Timer Status Register (TIMSTAT) */ +#define S32K1XX_FLEXIO_SHIFTSIEN_OFFSET (0x0020) /* Shifter Status Interrupt Enable (SHIFTSIEN) */ +#define S32K1XX_FLEXIO_SHIFTEIEN_OFFSET (0x0024) /* Shifter Error Interrupt Enable (SHIFTEIEN) */ +#define S32K1XX_FLEXIO_TIMIEN_OFFSET (0x0028) /* Timer Interrupt Enable Register (TIMIEN) */ +#define S32K1XX_FLEXIO_SHIFTSDEN_OFFSET (0x0030) /* Shifter Status DMA Enable (SHIFTSDEN) */ +#define S32K1XX_FLEXIO_SHIFTCTL0_OFFSET (0x0080) /* Shifter Control 0 Register (SHIFTCTL0) */ +#define S32K1XX_FLEXIO_SHIFTCTL1_OFFSET (0x0084) /* Shifter Control 1 Register (SHIFTCTL1) */ +#define S32K1XX_FLEXIO_SHIFTCTL2_OFFSET (0x0088) /* Shifter Control 2 Register (SHIFTCTL2) */ +#define S32K1XX_FLEXIO_SHIFTCTL3_OFFSET (0x008c) /* Shifter Control 3 Register (SHIFTCTL3) */ +#define S32K1XX_FLEXIO_SHIFTCFG0_OFFSET (0x0100) /* Shifter Configuration 0 Register (SHIFTCFG0) */ +#define S32K1XX_FLEXIO_SHIFTCFG1_OFFSET (0x0104) /* Shifter Configuration 1 Register (SHIFTCFG1) */ +#define S32K1XX_FLEXIO_SHIFTCFG2_OFFSET (0x0108) /* Shifter Configuration 2 Register (SHIFTCFG2) */ +#define S32K1XX_FLEXIO_SHIFTCFG3_OFFSET (0x010c) /* Shifter Configuration 3 Register (SHIFTCFG3) */ +#define S32K1XX_FLEXIO_SHIFTBUF0_OFFSET (0x0200) /* Shifter Buffer 0 Register (SHIFTBUF0) */ +#define S32K1XX_FLEXIO_SHIFTBUF1_OFFSET (0x0204) /* Shifter Buffer 1 Register (SHIFTBUF1) */ +#define S32K1XX_FLEXIO_SHIFTBUF2_OFFSET (0x0208) /* Shifter Buffer 2 Register (SHIFTBUF2) */ +#define S32K1XX_FLEXIO_SHIFTBUF3_OFFSET (0x020c) /* Shifter Buffer 3 Register (SHIFTBUF3) */ +#define S32K1XX_FLEXIO_SHIFTBUFBIS0_OFFSET (0x0280) /* Shifter Buffer 0 Bit Swapped Register (SHIFTBUFBIS0) */ +#define S32K1XX_FLEXIO_SHIFTBUFBIS1_OFFSET (0x0284) /* Shifter Buffer 1 Bit Swapped Register (SHIFTBUFBIS1) */ +#define S32K1XX_FLEXIO_SHIFTBUFBIS2_OFFSET (0x0288) /* Shifter Buffer 2 Bit Swapped Register (SHIFTBUFBIS2) */ +#define S32K1XX_FLEXIO_SHIFTBUFBIS3_OFFSET (0x028c) /* Shifter Buffer 3 Bit Swapped Register (SHIFTBUFBIS3) */ +#define S32K1XX_FLEXIO_SHIFTBUFBYS0_OFFSET (0x0300) /* Shifter Buffer 0 Byte Swapped Register (SHIFTBUFBYS0) */ +#define S32K1XX_FLEXIO_SHIFTBUFBYS1_OFFSET (0x0304) /* Shifter Buffer 1 Byte Swapped Register (SHIFTBUFBYS1) */ +#define S32K1XX_FLEXIO_SHIFTBUFBYS2_OFFSET (0x0308) /* Shifter Buffer 2 Byte Swapped Register (SHIFTBUFBYS2) */ +#define S32K1XX_FLEXIO_SHIFTBUFBYS3_OFFSET (0x030c) /* Shifter Buffer 3 Byte Swapped Register (SHIFTBUFBYS3) */ +#define S32K1XX_FLEXIO_SHIFTBUFBBS0_OFFSET (0x0380) /* Shifter Buffer 0 Bit Byte Swapped Register (SHIFTBUFBBS0) */ +#define S32K1XX_FLEXIO_SHIFTBUFBBS1_OFFSET (0x0384) /* Shifter Buffer 1 Bit Byte Swapped Register (SHIFTBUFBBS1) */ +#define S32K1XX_FLEXIO_SHIFTBUFBBS2_OFFSET (0x0388) /* Shifter Buffer 2 Bit Byte Swapped Register (SHIFTBUFBBS2) */ +#define S32K1XX_FLEXIO_SHIFTBUFBBS3_OFFSET (0x038c) /* Shifter Buffer 3 Bit Byte Swapped Register (SHIFTBUFBBS3) */ +#define S32K1XX_FLEXIO_TIMCTL0_OFFSET (0x0400) /* Timer Control 0 Register (TIMCTL0) */ +#define S32K1XX_FLEXIO_TIMCTL1_OFFSET (0x0404) /* Timer Control 1 Register (TIMCTL1) */ +#define S32K1XX_FLEXIO_TIMCTL2_OFFSET (0x0408) /* Timer Control 2 Register (TIMCTL2) */ +#define S32K1XX_FLEXIO_TIMCTL3_OFFSET (0x040c) /* Timer Control 3 Register (TIMCTL3) */ +#define S32K1XX_FLEXIO_TIMCFG0_OFFSET (0x0480) /* Timer Configuration 0 Register (TIMCFG0) */ +#define S32K1XX_FLEXIO_TIMCFG1_OFFSET (0x0484) /* Timer Configuration 1 Register (TIMCFG1) */ +#define S32K1XX_FLEXIO_TIMCFG2_OFFSET (0x0488) /* Timer Configuration 2 Register (TIMCFG2) */ +#define S32K1XX_FLEXIO_TIMCFG3_OFFSET (0x048c) /* Timer Configuration 3 Register (TIMCFG3) */ +#define S32K1XX_FLEXIO_TIMCMP0_OFFSET (0x0500) /* Timer Compare 0 Register (TIMCMP0) */ +#define S32K1XX_FLEXIO_TIMCMP1_OFFSET (0x0504) /* Timer Compare 1 Register (TIMCMP1) */ +#define S32K1XX_FLEXIO_TIMCMP2_OFFSET (0x0508) /* Timer Compare 2 Register (TIMCMP2) */ +#define S32K1XX_FLEXIO_TIMCMP3_OFFSET (0x050c) /* Timer Compare 3 Register (TIMCMP3) */ + +#define S32K1XX_FLEXIO_SHIFTCTL_OFFSET(n) (0x0080 + ((n) << 2)) /* Shifter Control n Register (SHIFTCTLn) */ +#define S32K1XX_FLEXIO_SHIFTCFG_OFFSET(n) (0x0100 + ((n) << 2)) /* Shifter Configuration n Register (SHIFTCFGn) */ +#define S32K1XX_FLEXIO_SHIFTBUF_OFFSET(n) (0x0200 + ((n) << 2)) /* Shifter Buffer n Register (SHIFTBUFn) */ +#define S32K1XX_FLEXIO_SHIFTBUFBIS_OFFSET(n) (0x0280 + ((n) << 2)) /* Shifter Buffer n Bit Swapped Register (SHIFTBUFBISn) */ +#define S32K1XX_FLEXIO_SHIFTBUFBYS_OFFSET(n) (0x0300 + ((n) << 2)) /* Shifter Buffer n Byte Swapped Register (SHIFTBUFBYSn) */ +#define S32K1XX_FLEXIO_SHIFTBUFBBS_OFFSET(n) (0x0380 + ((n) << 2)) /* Shifter Buffer n Bit Byte Swapped Register (SHIFTBUFBBSn) */ +#define S32K1XX_FLEXIO_TIMCTL_OFFSET(n) (0x0400 + ((n) << 2)) /* Timer Control n Register (TIMCTLn) */ +#define S32K1XX_FLEXIO_TIMCFG_OFFSET(n) (0x0480 + ((n) << 2)) /* Timer Configuration n Register (TIMCFGn) */ +#define S32K1XX_FLEXIO_TIMCMP_OFFSET(n) (0x0500 + ((n) << 2)) /* Timer Compare n Register (TIMCMPn) */ + +/* FlexIO Register Addresses ************************************************/ + +#define S32K1XX_FLEXIO_VERID (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_VERID_OFFSET) +#define S32K1XX_FLEXIO_PARAM (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_PARAM_OFFSET) +#define S32K1XX_FLEXIO_CTRL (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_CTRL_OFFSET) +#define S32K1XX_FLEXIO_PIN (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_PIN_OFFSET) +#define S32K1XX_FLEXIO_SHIFTSTAT (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTSTAT_OFFSET) +#define S32K1XX_FLEXIO_SHIFTERR (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTERR_OFFSET) +#define S32K1XX_FLEXIO_TIMSTAT (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMSTAT_OFFSET) +#define S32K1XX_FLEXIO_SHIFTSIEN (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTSIEN_OFFSET) +#define S32K1XX_FLEXIO_SHIFTEIEN (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTEIEN_OFFSET) +#define S32K1XX_FLEXIO_TIMIEN (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMIEN_OFFSET) +#define S32K1XX_FLEXIO_SHIFTSDEN (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTSDEN_OFFSET) +#define S32K1XX_FLEXIO_SHIFTCTL0 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCTL0_OFFSET) +#define S32K1XX_FLEXIO_SHIFTCTL1 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCTL1_OFFSET) +#define S32K1XX_FLEXIO_SHIFTCTL2 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCTL2_OFFSET) +#define S32K1XX_FLEXIO_SHIFTCTL3 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCTL3_OFFSET) +#define S32K1XX_FLEXIO_SHIFTCFG0 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCFG0_OFFSET) +#define S32K1XX_FLEXIO_SHIFTCFG1 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCFG1_OFFSET) +#define S32K1XX_FLEXIO_SHIFTCFG2 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCFG2_OFFSET) +#define S32K1XX_FLEXIO_SHIFTCFG3 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCFG3_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUF0 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUF0_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUF1 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUF1_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUF2 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUF2_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUF3 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUF3_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBIS0 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBIS0_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBIS1 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBIS1_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBIS2 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBIS2_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBIS3 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBIS3_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBYS0 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBYS0_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBYS1 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBYS1_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBYS2 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBYS2_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBYS3 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBYS3_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBBS0 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBBS0_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBBS1 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBBS1_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBBS2 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBBS2_OFFSET) +#define S32K1XX_FLEXIO_SHIFTBUFBBS3 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBBS3_OFFSET) +#define S32K1XX_FLEXIO_TIMCTL0 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCTL0_OFFSET) +#define S32K1XX_FLEXIO_TIMCTL1 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCTL1_OFFSET) +#define S32K1XX_FLEXIO_TIMCTL2 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCTL2_OFFSET) +#define S32K1XX_FLEXIO_TIMCTL3 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCTL3_OFFSET) +#define S32K1XX_FLEXIO_TIMCFG0 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCFG0_OFFSET) +#define S32K1XX_FLEXIO_TIMCFG1 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCFG1_OFFSET) +#define S32K1XX_FLEXIO_TIMCFG2 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCFG2_OFFSET) +#define S32K1XX_FLEXIO_TIMCFG3 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCFG3_OFFSET) +#define S32K1XX_FLEXIO_TIMCMP0 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCMP0_OFFSET) +#define S32K1XX_FLEXIO_TIMCMP1 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCMP1_OFFSET) +#define S32K1XX_FLEXIO_TIMCMP2 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCMP2_OFFSET) +#define S32K1XX_FLEXIO_TIMCMP3 (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCMP3_OFFSET) + +#define S32K1XX_FLEXIO_SHIFTCTL(n) (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCTL_OFFSET(n)) +#define S32K1XX_FLEXIO_SHIFTCFG(n) (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTCFG_OFFSET(n)) +#define S32K1XX_FLEXIO_SHIFTBUF(n) (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUF_OFFSET(n)) +#define S32K1XX_FLEXIO_SHIFTBUFBIS(n) (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBIS_OFFSET(n)) +#define S32K1XX_FLEXIO_SHIFTBUFBYS(n) (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBYS_OFFSET(n)) +#define S32K1XX_FLEXIO_SHIFTBUFBBS(n) (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_SHIFTBUFBBS_OFFSET(n)) +#define S32K1XX_FLEXIO_TIMCTL(n) (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCTL(n)) +#define S32K1XX_FLEXIO_TIMCFG(n) (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCFG(n)) +#define S32K1XX_FLEXIO_TIMCMP(n) (S32K1XX_FLEXIO_BASE + S32K1XX_FLEXIO_TIMCMP(n)) + +/* FlexIO Register Bit Definitions ******************************************/ + +/* Version ID Register (VERID) */ + +#define FLEXIO_VERID_FEATURE_SHIFT (0) /* Bits 0-15: Feature Specification Number (FEATURE) */ +#define FLEXIO_VERID_FEATURE_MASK (0xffff << FLEXIO_VERID_FEATURE_SHIFT) +#define FLEXIO_VERID_MINOR_SHIFT (16) /* Bits 16-23: Minor Version Number (MINOR) */ +#define FLEXIO_VERID_MINOR_MASK (0xff << FLEXIO_VERID_MINOR_SHIFT) +#define FLEXIO_VERID_MAJOR_SHIFT (24) /* Bits 24-31: Major Version Number (MAJOR) */ +#define FLEXIO_VERID_MAJOR_MASK (0xff << FLEXIO_VERID_MAJOR_SHIFT) + +/* Parameter Register (PARAM) */ + +#define FLEXIO_PARAM_SHIFTER_SHIFT (0) /* Bits 0-7: Shifter Number (SHIFTER) */ +#define FLEXIO_PARAM_SHIFTER_MASK (0xff << FLEXIO_PARAM_SHIFTER_SHIFT) +#define FLEXIO_PARAM_TIMER_SHIFT (8) /* Bits 8-15: Timer Number (TIMER) */ +#define FLEXIO_PARAM_TIMER_MASK (0xff << FLEXIO_PARAM_TIMER_SHIFT) +#define FLEXIO_PARAM_PIN_SHIFT (16) /* Bits 16-23: Pin Number (PIN) */ +#define FLEXIO_PARAM_PIN_MASK (0xff << FLEXIO_PARAM_PIN_SHIFT) +#define FLEXIO_PARAM_TRIGGER_SHIFT (24) /* Bits 24-31: Trigger Number (TRIGGER) */ +#define FLEXIO_PARAM_TRIGGER_MASK (0xff << FLEXIO_PARAM_TRIGGER_SHIFT) + +/* FlexIO Control Register (CTRL) */ + +#define FLEXIO_CTRL_FLEXEN (1 << 0) /* Bit 0: FlexIO Enable (FLEXEN) */ +# define FLEXIO_CTRL_FLEXEN_DIS (0 << 0) /* FlexIO module is disabled */ +# define FLEXIO_CTRL_FLEXEN_ENA (1 << 0) /* FlexIO module is enabled */ +#define FLEXIO_CTRL_SWRST (1 << 1) /* Bit 1: Software Reset (SWRST) */ +# define FLEXIO_CTRL_SWRST_DIS (0 << 1) /* Software reset is disabled */ +# define FLEXIO_CTRL_SWRST_ENA (1 << 1) /* Software reset is enabled */ +#define FLEXIO_CTRL_FASTACC (1 << 2) /* Bit 2: Fast Access (FASTACC) */ +# define FLEXIO_CTRL_FASTACC_NORMAL (0 << 2) /* Configures for normal register accesses to FlexIO */ +# define FLEXIO_CTRL_FASTACC_FAST (1 << 2) /* Configures for fast register accesses to FlexIO */ + /* Bits 3-29: Reserved */ +#define FLEXIO_CTRL_DBGE (1 << 30) /* Bit 30: Debug Enable (DBGE) */ +# define FLEXIO_CTRL_DBGE_DIS (0 << 30) /* FlexIO is disabled in debug modes */ +# define FLEXIO_CTRL_DBGE_ENA (1 << 30) /* FlexIO is enabled in debug modes */ +#define FLEXIO_CTRL_DOZEN (1 << 31) /* Bit 31: Doze Enable (DOZEN) */ +# define FLEXIO_CTRL_DOZEN_ENA (0 << 31) /* FlexIO enabled in Doze modes */ +# define FLEXIO_CTRL_DOZEN_DIS (1 << 31) /* FlexIO disabled in Doze modes */ + +/* Pin State Register (PIN) */ + +#define FLEXIO_PIN_PDI_SHIFT (0) /* Bits 0-7: Pin Data Input (PDI) */ +#define FLEXIO_PIN_PDI_MASK (0xff << FLEXIO_PIN_PDI_SHIFT) + /* Bits 8-31: Reserved */ + +/* Shifter Status Register (SHIFTSTAT) */ + +#define FLEXIO_SHIFTSTAT_SSF_SHIFT (0) /* Bits 0-3: Shifter Status Flag (SSF) */ +#define FLEXIO_SHIFTSTAT_SSF_MASK (0x0f << FLEXIO_SHIFTSTAT_SSF_SHIFT) + /* Bits 4-31: Reserved */ + +/* Shifter Error Register (SHIFTERR) */ + +#define FLEXIO_SHIFTERR_SEF_SHIFT (0) /* Bits 0-3: Shifter Error Flags (SEF) */ +#define FLEXIO_SHIFTERR_SEF_MASK (0x0f << FLEXIO_SHIFTERR_SEF_SHIFT) + /* Bits 4-31: Reserved */ + +/* Timer Status Register (TIMSTAT) */ + +#define FLEXIO_TIMSTAT_TSF_SHIFT (0) /* Bits 0-3: Timer Status Flags (TSF) */ +#define FLEXIO_TIMSTAT_TSF_MASK (0x0f << FLEXIO_TIMSTAT_TSF_SHIFT) + /* Bits 4-31: Reserved */ + +/* Shifter Status Interrupt Enable (SHIFTSIEN) */ + +#define FLEXIO_SHIFTSIEN_SSIE_SHIFT (0) /* Bits 0-3: Shifter Status Interrupt Enable (SSIE) */ +#define FLEXIO_SHIFTSIEN_SSIE_MASK (0x0f << FLEXIO_SHIFTSIEN_SSIE_SHIFT) + /* Bits 4-31: Reserved */ + +/* Shifter Error Interrupt Enable (SHIFTEIEN) */ + +#define FLEXIO_SHIFTEIEN_SEIE_SHIFT (0) /* Bits 0-3: Shifter Error Interrupt Enable (SEIE) */ +#define FLEXIO_SHIFTEIEN_SEIE_MASK (0x0f << FLEXIO_SHIFTEIEN_SEIE_SHIFT) + /* Bits 4-31: Reserved */ + +/* Timer Interrupt Enable Register (TIMIEN) */ + +#define FLEXIO_TIMIEN_TEIE_SHIFT (0) /* Bits 0-3: Timer Status Interrupt Enable (TEIE) */ +#define FLEXIO_TIMIEN_TEIE_MASK (0x0f << FLEXIO_TIMIEN_TEIE_SHIFT) + /* Bits 4-31: Reserved */ + +/* Shifter Status DMA Enable (SHIFTSDEN) */ + +#define FLEXIO_SHIFTSDEN_SSDE_SHIFT (0) /* Bits 0-3: Shifter Status DMA Enable (SSDE) */ +#define FLEXIO_SHIFTSDEN_SSDE_MASK (0x0f << FLEXIO_SHIFTSDEN_SSDE_SHIFT) + /* Bits 4-31: Reserved */ + +/* Shifter Control n Register (SHIFTCTLn) */ + +#define FLEXIO_SHIFTCTL_SMOD_SHIFT (0) /* Bits 0-2: Shifter Mode (SMOD) */ +#define FLEXIO_SHIFTCTL_SMOD_MASK (0x07 << FLEXIO_SHIFTCTL_SMOD_SHIFT) +# define FLEXIO_SHIFTCTL_SMOD_DIS (0x00 << FLEXIO_SHIFTCTL_SMOD_SHIFT) /* Disabled */ +# define FLEXIO_SHIFTCTL_SMOD_RX (0x01 << FLEXIO_SHIFTCTL_SMOD_SHIFT) /* Receive mode */ +# define FLEXIO_SHIFTCTL_SMOD_TX (0x02 << FLEXIO_SHIFTCTL_SMOD_SHIFT) /* Transmit mode */ +# define FLEXIO_SHIFTCTL_SMOD_STORE (0x04 << FLEXIO_SHIFTCTL_SMOD_SHIFT) /* Match Store mode */ +# define FLEXIO_SHIFTCTL_SMOD_CONT (0x05 << FLEXIO_SHIFTCTL_SMOD_SHIFT) /* Match Continuous mode */ + + /* Bits 3-6: Reserved */ +#define FLEXIO_SHIFTCTL_PINPOL (1 << 7) /* Bit 7: Shifter Pin Polarity (PINPOL) */ +# define FLEXIO_SHIFTCTL_PINPOL_HI (0 << 7) /* Pin is active high */ +# define FLEXIO_SHIFTCTL_PINPOL_LO (1 << 7) /* Pin is active low */ +#define FLEXIO_SHIFTCTL_PINSEL_SHIFT (8) /* Bits 8-10: Shifter Pin Select (PINSEL) */ +#define FLEXIO_SHIFTCTL_PINSEL_MASK (0x07 << FLEXIO_SHIFTCTL_PINSEL_SHIFT) +# define FLEXIO_SHIFTCTL_PINSEL(n) (((n) << FLEXIO_SHIFTCTL_PINSEL_SHIFT) & FLEXIO_SHIFTCTL_PINSEL_MASK) + /* Bits 11-15: Reserved */ +#define FLEXIO_SHIFTCTL_PINCFG_SHIFT (16) /* Bits 16-17: Shifter Pin Configuration (PINCFG) */ +#define FLEXIO_SHIFTCTL_PINCFG_MASK (0x03 << FLEXIO_SHIFTCTL_PINCFG_SHIFT) +# define FLEXIO_SHIFTCTL_PINCFG_DIS (0x00 << FLEXIO_SHIFTCTL_PINCFG_SHIFT) /* Shifter pin output disabled */ +# define FLEXIO_SHIFTCTL_PINCFG_OD (0x01 << FLEXIO_SHIFTCTL_PINCFG_SHIFT) /* Shifter pin open drain or bidirectional output enable */ +# define FLEXIO_SHIFTCTL_PINCFG_BID (0x02 << FLEXIO_SHIFTCTL_PINCFG_SHIFT) /* Shifter pin bidirectional output data */ +# define FLEXIO_SHIFTCTL_PINCFG_OUT (0x03 << FLEXIO_SHIFTCTL_PINCFG_SHIFT) /* Shifter pin output */ + + /* Bits 18-22: Reserved */ +#define FLEXIO_SHIFTCTL_TIMPOL (1 << 23) /* Bit 23: Timer Polarity (TIMPOL) */ +# define FLEXIO_SHIFTCTL_TIMPOL_PE (0 << 23) /* Shift on posedge of Shift clock */ +# define FLEXIO_SHIFTCTL_TIMPOL_NE (1 << 23) /* Shift on negedge of Shift clock */ +#define FLEXIO_SHIFTCTL_TIMSEL_SHIFT (24) /* Bit 24-25: Timer Select (TIMSEL) */ +#define FLEXIO_SHIFTCTL_TIMSEL_MASK (0x03 << FLEXIO_SHIFTCTL_TIMSEL_SHIFT) +# define FLEXIO_SHIFTCTL_TIMSEL(n) (((n) << FLEXIO_SHIFTCTL_TIMSEL_SHIFT) & FLEXIO_SHIFTCTL_TIMSEL_MASK) + /* Bits 26-31: Reserved */ + +/* Shifter Configuration n Register (SHIFTCFGn) */ + +#define FLEXIO_SHIFTCFG_SSTART_SHIFT (0) /* Bits 0-1: Shifter Start bit (SSTART) */ +#define FLEXIO_SHIFTCFG_SSTART_MASK (0x03 << FLEXIO_SHIFTCFG_SSTART_SHIFT) +# define FLEXIO_SHIFTCFG_SSTART_DIS (0x00 << FLEXIO_SHIFTCFG_SSTART_SHIFT) /* Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable */ +# define FLEXIO_SHIFTCFG_SSTART_DIS_SH (0x01 << FLEXIO_SHIFTCFG_SSTART_SHIFT) /* Start bit disabled for transmitter/receiver/match store, transmitter loads data on first shift */ +# define FLEXIO_SHIFTCFG_SSTART_ZERO (0x02 << FLEXIO_SHIFTCFG_SSTART_SHIFT) /* Transmitter outputs start bit value 0 before loading data on first shift, receiver/match store sets error flag if start bit is not 0 */ +# define FLEXIO_SHIFTCFG_SSTART_ONE (0x03 << FLEXIO_SHIFTCFG_SSTART_SHIFT) /* Transmitter outputs start bit value 1 before loading data on first shift, receiver/match store sets error flag if start bit is not 1 */ + + /* Bits 2-3: Reserved */ +#define FLEXIO_SHIFTCFG_SSTOP_SHIFT (4) /* Bits 4-5: Shifter Stop bit (SSTOP) */ +#define FLEXIO_SHIFTCFG_SSTOP_MASK (0x03 << FLEXIO_SHIFTCFG_SSTOP_SHIFT) +# define FLEXIO_SHIFTCFG_SSTOP_DIS (0x00 << FLEXIO_SHIFTCFG_SSTOP_SHIFT) /* Stop bit disabled for transmitter/receiver/match store */ +# define FLEXIO_SHIFTCFG_SSTOP_ZERO (0x02 << FLEXIO_SHIFTCFG_SSTOP_SHIFT) /* Transmitter outputs stop bit value 0 on store, receiver/match store sets error flag if stop bit is not 0 */ +# define FLEXIO_SHIFTCFG_SSTOP_ONE (0x03 << FLEXIO_SHIFTCFG_SSTOP_SHIFT) /* Transmitter outputs stop bit value 1 on store, receiver/match store sets error flag if stop bit is not 1 */ + + /* Bits 6-7: Reserved */ +#define FLEXIO_SHIFTCFG_INSRC (1 << 8) /* Bit 8: Input Source (INSRC) */ +# define FLEXIO_SHIFTCFG_INSRC_PIN (0 << 8) /* Pin */ +# define FLEXIO_SHIFTCFG_INSRC_SHIFTER (1 << 8) /* Shifter N+1 Output */ + /* Bits 9-31: Reserved */ + +/* Shifter Buffer n Register (SHIFTBUFn) */ + +#define FLEXIO_SHIFTBUF_SHIFT (0) /* Bits 0-31: Shift Buffer (SHIFTBUF) */ +#define FLEXIO_SHIFTBUF_MASK (0xffffffff << FLEXIO_SHIFTBUF_SHIFT) + +/* Shifter Buffer n Bit Swapped Register (SHIFTBUFBISn) */ + +#define FLEXIO_SHIFTBUFBIS_SHIFT (0) /* Bits 0-31: Shift Buffer (bit swapped) (SHIFTBUFBIS) */ +#define FLEXIO_SHIFTBUFBIS_MASK (0xffffffff << FLEXIO_SHIFTBUFBIS_SHIFT) + +/* Shifter Buffer n Byte Swapped Register (SHIFTBUFBYSn) */ + +#define FLEXIO_SHIFTBUFBYS_SHIFT (0) /* Bits 0-31: Shift Buffer (byte swapped) (SHIFTBUFBYS) */ +#define FLEXIO_SHIFTBUFBYS_MASK (0xffffffff << FLEXIO_SHIFTBUFBYS_SHIFT) + +/* Shifter Buffer n Bit & Byte Swapped Register (SHIFTBUFBBSn) */ + +#define FLEXIO_SHIFTBUFBBS_SHIFT (0) /* Bits 0-31: Shift Buffer (bit and byte swapped) (SHIFTBUFBBS) */ +#define FLEXIO_SHIFTBUFBBS_MASK (0xffffffff << FLEXIO_SHIFTBUFBBS_SHIFT) + +/* Timer Control n Register (TIMCTLn) */ + +#define FLEXIO_TIMCTL_TIMOD_SHIFT (0) /* Bits 0-1: Timer Mode (TIMOD) */ +#define FLEXIO_TIMCTL_TIMOD_MASK (0x03 << FLEXIO_TIMCTL_TIMOD_SHIFT) +# define FLEXIO_TIMCTL_TIMOD_DIS (0x00 << FLEXIO_TIMCTL_TIMOD_SHIFT) /* Timer Disabled */ +# define FLEXIO_TIMCTL_TIMOD_8BBAUD (0x01 << FLEXIO_TIMCTL_TIMOD_SHIFT) /* Dual 8-bit counters baud mode */ +# define FLEXIO_TIMCTL_TIMOD_8BPWMHI (0x02 << FLEXIO_TIMCTL_TIMOD_SHIFT) /* Dual 8-bit counters PWM high mode */ +# define FLEXIO_TIMCTL_TIMOD_16BCNT (0x03 << FLEXIO_TIMCTL_TIMOD_SHIFT) /* Single 16-bit counter mode */ + + /* Bits 2-6: Reserved */ +#define FLEXIO_TIMCTL_PINPOL (1 << 7) /* Bit 7: Timer Pin Polarity (PINPOL) */ +# define FLEXIO_TIMCTL_PINPOL_HI (0 << 7) /* Pin is active high */ +# define FLEXIO_TIMCTL_PINPOL_LO (1 << 7) /* Pin is active low */ +#define FLEXIO_TIMCTL_PINSEL_SHIFT (8) /* Bits 8-10: Timer Pin Select (PINSEL) */ +#define FLEXIO_TIMCTL_PINSEL_MASK (0x07 << FLEXIO_TIMCTL_PINSEL_SHIFT) +# define FLEXIO_TIMCTL_PINSEL(n) (((n) << FLEXIO_TIMCTL_PINSEL_SHIFT) & FLEXIO_TIMCTL_PINSEL_MASK) + /* Bits 11-15: Reserved */ +#define FLEXIO_TIMCTL_PINCFG_SHIFT (16) /* Bits 16-17: Timer Pin Configuration (PINCFG) */ +#define FLEXIO_TIMCTL_PINCFG_MASK (0x03 << FLEXIO_TIMCTL_PINCFG_SHIFT) +# define FLEXIO_TIMCTL_PINCFG_DIS (0x00 << FLEXIO_TIMCTL_PINCFG_SHIFT) /* Timer pin output disabled */ +# define FLEXIO_TIMCTL_PINCFG_OD (0x01 << FLEXIO_TIMCTL_PINCFG_SHIFT) /* Timer pin open drain or bidirectional output enable */ +# define FLEXIO_TIMCTL_PINCFG_BID (0x02 << FLEXIO_TIMCTL_PINCFG_SHIFT) /* Timer pin bidirectional output data */ +# define FLEXIO_TIMCTL_PINCFG_OUT (0x03 << FLEXIO_TIMCTL_PINCFG_SHIFT) /* Timer pin output */ + + /* Bits 18-21: Reserved */ +#define FLEXIO_TIMCTL_TRGSRC (1 << 22) /* Bit 22: Trigger Source (TRGSRC) */ +# define FLEXIO_TIMCTL_TRGSRC_EXT (0 << 22) /* External trigger selected */ +# define FLEXIO_TIMCTL_TRGSRC_INT (1 << 22) /* Internal trigger selected */ +#define FLEXIO_TIMCTL_TRGPOL (1 << 23) /* Bit 23: Trigger Polarity (TRGPOL) */ +# define FLEXIO_TIMCTL_TRGPOL_HI (0 << 23) /* Trigger active high */ +# define FLEXIO_TIMCTL_TRGPOL_LO (1 << 23) /* Trigger active low */ +#define FLEXIO_TIMCTL_TRGSEL_SHIFT (24) /* Bits 24-27: Trigger Select (TRGSEL) */ +#define FLEXIO_TIMCTL_TRGSEL_MASK (0x0f << FLEXIO_TIMCTL_TRGSEL_SHIFT) +# define FLEXIO_TIMCTL_TRGSEL_EXT(n) (((n) << FLEXIO_TIMCTL_TRGSEL_SHIFT) & FLEXIO_TIMCTL_TRGSEL_MASK) /* External trigger n input */ +# define FLEXIO_TIMCTL_TRGSEL_PIN(n) (((2*(n)) << FLEXIO_TIMCTL_TRGSEL_SHIFT) & FLEXIO_TIMCTL_TRGSEL_MASK) /* Pin n input */ +# define FLEXIO_TIMCTL_TRGSEL_SHIFTER(n) (((4*(n)+1) << FLEXIO_TIMCTL_TRGSEL_SHIFT) & FLEXIO_TIMCTL_TRGSEL_MASK) /* Shifter n status flag */ +# define FLEXIO_TIMCTL_TRGSEL_TIMER(n) (((4*(n)+3) << FLEXIO_TIMCTL_TRGSEL_SHIFT) & FLEXIO_TIMCTL_TRGSEL_MASK) /* Timer n trigger output */ + + /* Bits 28-31: Reserved */ + +/* Timer Configuration n Register (TIMCFGn) */ + + /* Bit 0: Reserved */ +#define FLEXIO_TIMCFG_TSTART (1 << 1) /* Bit 1: Timer Start Bit (TSTART) */ +# define FLEXIO_TIMCFG_TSTART_DIS (0 << 1) /* Start bit disabled */ +# define FLEXIO_TIMCFG_TSTART_ENA (1 << 1) /* Start bit enabled */ + /* Bits 2-3: Reserved */ +#define FLEXIO_TIMCFG_TSTOP_SHIFT (4) /* Bits 4-5: Timer Stop Bit (TSTOP) */ +#define FLEXIO_TIMCFG_TSTOP_MASK (0x03 << FLEXIO_TIMCFG_TSTOP_SHIFT) +# define FLEXIO_TIMCFG_TSTOP_DIS (0x00 << FLEXIO_TIMCFG_TSTOP_SHIFT) /* Stop bit disabled */ +# define FLEXIO_TIMCFG_TSTOP_TIMCMP (0x01 << FLEXIO_TIMCFG_TSTOP_SHIFT) /* Stop bit is enabled on timer compare */ +# define FLEXIO_TIMCFG_TSTOP_TIMDIS (0x02 << FLEXIO_TIMCFG_TSTOP_SHIFT) /* Stop bit is enabled on timer disable */ +# define FLEXIO_TIMCFG_TSTOP_BOTH (0x03 << FLEXIO_TIMCFG_TSTOP_SHIFT) /* Stop bit is enabled on timer compare and timer disable */ + + /* Bits 6-7: Reserved */ +#define FLEXIO_TIMCFG_TIMENA_SHIFT (8) /* Bits 8-10: Timer Enable (TIMENA) */ +#define FLEXIO_TIMCFG_TIMENA_MASK (0x07 << FLEXIO_TIMCFG_TIMENA_SHIFT) +# define FLEXIO_TIMCFG_TIMENA_ALWAYS (0x00 << FLEXIO_TIMCFG_TIMENA_SHIFT) /* Timer always enabled */ +# define FLEXIO_TIMCFG_TIMENA_TIMENA (0x01 << FLEXIO_TIMCFG_TIMENA_SHIFT) /* Timer enabled on Timer N-1 enable */ +# define FLEXIO_TIMCFG_TIMENA_TRGHI (0x02 << FLEXIO_TIMCFG_TIMENA_SHIFT) /* Timer enabled on Trigger high */ +# define FLEXIO_TIMCFG_TIMENA_TRGHIPIN (0x03 << FLEXIO_TIMCFG_TIMENA_SHIFT) /* Timer enabled on Trigger high and Pin high */ +# define FLEXIO_TIMCFG_TIMENA_PINRIS (0x04 << FLEXIO_TIMCFG_TIMENA_SHIFT) /* Timer enabled on Pin rising edge */ +# define FLEXIO_TIMCFG_TIMENA_PINTRG (0x05 << FLEXIO_TIMCFG_TIMENA_SHIFT) /* Timer enabled on Pin rising edge and Trigger high */ +# define FLEXIO_TIMCFG_TIMENA_TRGRIS (0x06 << FLEXIO_TIMCFG_TIMENA_SHIFT) /* Timer enabled on Trigger rising edge */ +# define FLEXIO_TIMCFG_TIMENA_TRGBOTH (0x07 << FLEXIO_TIMCFG_TIMENA_SHIFT) /* Timer enabled on Trigger rising or falling edge */ + + /* Bit 11: Reserved */ +#define FLEXIO_TIMCFG_TIMDIS_SHIFT (12) /* Bits 12-14: Timer Disable (TIMDIS) */ +#define FLEXIO_TIMCFG_TIMDIS_MASK (0x07 << FLEXIO_TIMCFG_TIMDIS_SHIFT) +# define FLEXIO_TIMCFG_TIMDIS_NEVER (0x00 << FLEXIO_TIMCFG_TIMDIS_SHIFT) /* Timer never disabled */ +# define FLEXIO_TIMCFG_TIMDIS_TIMDIS (0x01 << FLEXIO_TIMCFG_TIMDIS_SHIFT) /* Timer disabled on Timer N-1 disable */ +# define FLEXIO_TIMCFG_TIMDIS_TIMCMP (0x02 << FLEXIO_TIMCFG_TIMDIS_SHIFT) /* Timer disabled on Timer compare (upper 8-bits match and decrement) */ +# define FLEXIO_TIMCFG_TIMDIS_CMPTRGLO (0x03 << FLEXIO_TIMCFG_TIMDIS_SHIFT) /* Timer disabled on Timer compare (upper 8-bits match and decrement) and Trigger Low */ +# define FLEXIO_TIMCFG_TIMDIS_PIN (0x04 << FLEXIO_TIMCFG_TIMDIS_SHIFT) /* Timer disabled on Pin rising or falling edge */ +# define FLEXIO_TIMCFG_TIMDIS_PINTRGHI (0x05 << FLEXIO_TIMCFG_TIMDIS_SHIFT) /* Timer disabled on Pin rising or falling edge provided Trigger is high */ +# define FLEXIO_TIMCFG_TIMDIS_TRG (0x06 << FLEXIO_TIMCFG_TIMDIS_SHIFT) /* Timer disabled on Trigger falling edge */ + + /* Bit 15: Reserved */ +#define FLEXIO_TIMCFG_TIMRST_SHIFT (16) /* Bits 16-18: Timer Reset (TIMRST) */ +#define FLEXIO_TIMCFG_TIMRST_MASK (0x07 << FLEXIO_TIMCFG_TIMRST_SHIFT) +# define FLEXIO_TIMCFG_TIMRST_NEVER (0x00 << FLEXIO_TIMCFG_TIMRST_SHIFT) /* Timer never reset */ +# define FLEXIO_TIMCFG_TIMRST_PINOUT (0x02 << FLEXIO_TIMCFG_TIMRST_SHIFT) /* Timer reset on Timer Pin equal to Timer Output */ +# define FLEXIO_TIMCFG_TIMRST_TRGOUT (0x03 << FLEXIO_TIMCFG_TIMRST_SHIFT) /* Timer reset on Timer Trigger equal to Timer Output */ +# define FLEXIO_TIMCFG_TIMRST_PINRIS (0x04 << FLEXIO_TIMCFG_TIMRST_SHIFT) /* Timer reset on Timer Pin rising edge */ +# define FLEXIO_TIMCFG_TIMRST_TRGRIS (0x06 << FLEXIO_TIMCFG_TIMRST_SHIFT) /* Timer reset on Trigger rising edge */ +# define FLEXIO_TIMCFG_TIMRST_TRGBOTH (0x07 << FLEXIO_TIMCFG_TIMRST_SHIFT) /* Timer reset on Trigger rising or falling edge */ + + /* Bit 19: Reserved */ +#define FLEXIO_TIMCFG_TIMDEC_SHIFT (20) /* Bits 20-21: Timer Decrement (TIMDEC) */ +#define FLEXIO_TIMCFG_TIMDEC_MASK (0x03 << FLEXIO_TIMCFG_TIMDEC_SHIFT) +# define FLEXIO_TIMCFG_TIMDEC_CLKTIMOUT (0x00 << FLEXIO_TIMCFG_TIMDEC_SHIFT) /* Decrement counter on FlexIO clock, Shift clock equals Timer output */ +# define FLEXIO_TIMCFG_TIMDEC_TRGINBOTHTIMOUT (0x01 << FLEXIO_TIMCFG_TIMDEC_SHIFT) /* Decrement counter on Trigger input (both edges), Shift clock equals Timer output */ +# define FLEXIO_TIMCFG_TIMDEC_PINBOTHPIN (0x02 << FLEXIO_TIMCFG_TIMDEC_SHIFT) /* Decrement counter on Pin input (both edges), Shift clock equals Pin input */ +# define FLEXIO_TIMCFG_TIMDEC_TRGINBOTHTRGIN (0x03 << FLEXIO_TIMCFG_TIMDEC_SHIFT) /* Decrement counter on Trigger input (both edges), Shift clock equals Trigger input */ + + /* Bit 23: Reserved */ +#define FLEXIO_TIMCFG_TIMOUT_SHIFT (24) /* Bits 24-25: Timer Output (TIMOUT) */ +#define FLEXIO_TIMCFG_TIMOUT_MASK (0x03 << FLEXIO_TIMCFG_TIMOUT_SHIFT) +# define FLEXIO_TIMCFG_TIMOUT_ONE (0x00 << FLEXIO_TIMCFG_TIMOUT_SHIFT) /* Timer output is logic one when enabled and is not affected by timer reset */ +# define FLEXIO_TIMCFG_TIMOUT_ZERO (0x01 << FLEXIO_TIMCFG_TIMOUT_SHIFT) /* Timer output is logic zero when enabled and is not affected by timer reset */ +# define FLEXIO_TIMCFG_TIMOUT_ONERST (0x02 << FLEXIO_TIMCFG_TIMOUT_SHIFT) /* Timer output is logic one when enabled and on timer reset */ +# define FLEXIO_TIMCFG_TIMOUT_ZERORST (0x03 << FLEXIO_TIMCFG_TIMOUT_SHIFT) /* Timer output is logic zero when enabled and on timer reset */ + + /* Bits 26-31: Reserved */ + +/* Timer Compare n Register (TIMCMPn) */ + +#define FLEXIO_TIMCMP_CMP_SHIFT (0) /* Bits 0-15: Timer Compare Value (CMP) */ +#define FLEXIO_TIMCMP_CMP_MASK (0xffff << FLEXIO_TIMCMP_CMP_SHIFT) + /* Bits 16-31: Reserved */ + +#endif /* __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K1XX_FLEXIO_H */ diff --git a/arch/arm/src/s32k1xx/hardware/s32k1xx_pmc.h b/arch/arm/src/s32k1xx/hardware/s32k1xx_pmc.h index d3e20430c85..4c17c1adf2c 100644 --- a/arch/arm/src/s32k1xx/hardware/s32k1xx_pmc.h +++ b/arch/arm/src/s32k1xx/hardware/s32k1xx_pmc.h @@ -63,6 +63,7 @@ /* Regulator Status and Control Register */ +#define PMC_REGSC_BIASEN (1 << 0) /* Bit 0: Bias Enable Bit */ #define PMC_REGSC_CLKBIASDIS (1 << 1) /* Bit 1: Clock Bias Disable Bit */ #define PMC_REGSC_REGFPM (1 << 2) /* Bit 2: Regulator in Full Performance Mode Status Bit */ #define PMC_REGSC_LPOSTAT (1 << 6) /* Bit 6: LPO Status Bit */ diff --git a/arch/arm/src/s32k1xx/hardware/s32k1xx_smc.h b/arch/arm/src/s32k1xx/hardware/s32k1xx_smc.h index 5da2137a15c..0d3c7b21ecf 100644 --- a/arch/arm/src/s32k1xx/hardware/s32k1xx_smc.h +++ b/arch/arm/src/s32k1xx/hardware/s32k1xx_smc.h @@ -54,13 +54,12 @@ /* SMC Version ID Register */ -#define SMC_VERID_FEATURE_SHIFT (0) /* Bits 0-15: Feature Identification Number */ +#define SMC_VERID_FEATURE_SHIFT (0) /* Bits 0-15: Feature Identification Number */ #define SMC_VERID_FEATURE_MASK (0xffff << SMC_VERID_FEATURE_SHIFT) # define SMC_VERID_FEATURE_STD (1 << SMC_VERID_FEATURE_SHIFT) /* Standard feature set */ - -#define SMC_VERID_MINOR_SHIFT (16) /* Bits 16-23: Minor Version Number */ +#define SMC_VERID_MINOR_SHIFT (16) /* Bits 16-23: Minor Version Number */ #define SMC_VERID_MINOR_MASK (0xff << SMC_VERID_MINOR_SHIFT) -#define SMC_VERID_MAJOR_SHIFT (24) /* Bits 24-31: Major Version Number */ +#define SMC_VERID_MAJOR_SHIFT (24) /* Bits 24-31: Major Version Number */ #define SMC_VERID_MAJOR_MASK (0xff << SMC_VERID_MAJOR_SHIFT) /* SMC Parameter Register */ @@ -72,8 +71,10 @@ /* SMC Power Mode Protection register */ -#define SMC_PMPROT_AVLP (1 << 5) /* Bit 5: Allow Very-Low-Power Modes */ -#define SMC_PMPROT_AHSRUN (1 << 7) /* Bit 7: Allow High Speed Run mode */ +#define SMC_PMPROT_AVLP_SHIFT (5) /* Bit 5: Allow Very-Low-Power Modes */ +#define SMC_PMPROT_AVLP (1 << SMC_PMPROT_AVLP_SHIFT) +#define SMC_PMPROT_AHSRUN_SHIFT (7) /* Bit 7: Allow High Speed Run mode */ +#define SMC_PMPROT_AHSRUN (1 << SMC_PMPROT_AHSRUN_SHIFT) /* SMC Power Mode Control register */ diff --git a/arch/arm/src/s32k1xx/s32k11x/Make.defs b/arch/arm/src/s32k1xx/s32k11x/Make.defs index 6777edacd5b..3fead9fc101 100644 --- a/arch/arm/src/s32k1xx/s32k11x/Make.defs +++ b/arch/arm/src/s32k1xx/s32k11x/Make.defs @@ -21,13 +21,13 @@ # Source files specific to the Cortex-M0+ CMN_ASRCS += arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S -CMN_ASRCS += arm_switchcontext.S vfork.S +CMN_ASRCS += vfork.S CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS += arm_initialstate.c arm_releasepending.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c CMN_CSRCS += arm_unblocktask.c arm_doirq.c arm_hardfault.c arm_svcall.c -CMN_CSRCS += arm_vectors.c +CMN_CSRCS += arm_vectors.c arm_switchcontext.c ifeq ($(CONFIG_BUILD_PROTECTED),y) CMN_CSRCS += arm_signal_dispatch.c diff --git a/arch/arm/src/s32k1xx/s32k14x/Make.defs b/arch/arm/src/s32k1xx/s32k14x/Make.defs index c36764c085c..b057de647af 100644 --- a/arch/arm/src/s32k1xx/s32k14x/Make.defs +++ b/arch/arm/src/s32k1xx/s32k14x/Make.defs @@ -20,14 +20,14 @@ # Source files specific to the Cortex-M4F -CMN_ASRCS += arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS += arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_initialstate.c arm_memfault.c CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c -CMN_CSRCS += arm_systemreset.c +CMN_CSRCS += arm_systemreset.c arm_switchcontext.c ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) CMN_ASRCS += arm_lazyexception.S diff --git a/arch/arm/src/s32k1xx/s32k1xx_clockconfig.c b/arch/arm/src/s32k1xx/s32k1xx_clockconfig.c index 04e806ee25c..880ee19edbc 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_clockconfig.c +++ b/arch/arm/src/s32k1xx/s32k1xx_clockconfig.c @@ -63,6 +63,7 @@ #include #include +#include #include "arm_arch.h" #include "arm_internal.h" @@ -73,6 +74,7 @@ #include "hardware/s32k1xx_pmc.h" #include "s32k1xx_periphclocks.h" #include "s32k1xx_clockconfig.h" +#include "s32k1xx_start.h" #include /* Include last. May have dependencies */ @@ -120,19 +122,33 @@ #define SCG_SPLL_REF_MIN 8000000 #define SCG_SPLL_REF_MAX 32000000 +/* Power management definitions */ + +#if defined(CONFIG_PM) +#ifndef PM_IDLE_DOMAIN +# define PM_IDLE_DOMAIN 0 /* Revisit */ +#endif +#endif + +#ifndef OK +#define OK 0 +#endif + +/**************************************************************************** + * Private Function Declarations + ****************************************************************************/ + +#ifdef CONFIG_PM +static void up_pm_notify(struct pm_callback_s *cb, int dowmin, + enum pm_state_e pmstate); +static int up_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + /**************************************************************************** * Private Types ****************************************************************************/ -enum scg_system_clock_mode_e -{ - SCG_SYSTEM_CLOCK_MODE_CURRENT = 0, /* Current mode. */ - SCG_SYSTEM_CLOCK_MODE_RUN = 1, /* Run mode. */ - SCG_SYSTEM_CLOCK_MODE_VLPR = 2, /* Very Low Power Run mode. */ - SCG_SYSTEM_CLOCK_MODE_HSRUN = 3, /* High Speed Run mode. */ - SCG_SYSTEM_CLOCK_MODE_NONE /* MAX value. */ -}; - /**************************************************************************** * Private Data ****************************************************************************/ @@ -212,6 +228,14 @@ static uint32_t g_rtc_clkin; /* RTC CLKIN clock */ static uint32_t g_tclkfreq[NUMBER_OF_TCLK_INPUTS]; /* TCLKx clocks */ #endif +#ifdef CONFIG_PM +static struct pm_callback_s g_clock_pmcb = +{ + .notify = up_pm_notify, + .prepare = up_pm_prepare, +}; +#endif + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -236,59 +260,6 @@ static inline uint32_t s32k1xx_get_scgclk_source(void) SCG_CSR_SCS_SHIFT); } -/**************************************************************************** - * Name: s32k1xx_get_runmode - * - * Description: - * Get the current running mode. - * - * Input Parameters: - * None - * - * Returned Value: - * The current running mode. - * - ****************************************************************************/ - -static enum scg_system_clock_mode_e s32k1xx_get_runmode(void) -{ - enum scg_system_clock_mode_e mode; - - /* Get the current running mode */ - - switch (getreg32(S32K1XX_SMC_PMSTAT) & SMC_PMSTAT_PMSTAT_MASK) - { - /* Run mode */ - - case SMC_PMSTAT_PMSTAT_RUN: - mode = SCG_SYSTEM_CLOCK_MODE_RUN; - break; - - /* Very low power run mode */ - - case SMC_PMSTAT_PMSTAT_VLPR: - mode = SCG_SYSTEM_CLOCK_MODE_VLPR; - break; - - /* High speed run mode */ - - case SMC_PMSTAT_PMSTAT_HSRUN: - mode = SCG_SYSTEM_CLOCK_MODE_HSRUN; - break; - - /* This should never happen - core has to be in some run mode to - * execute code - */ - - case SMC_PMSTAT_PMSTAT_VLPS: - default: - mode = SCG_SYSTEM_CLOCK_MODE_NONE; - break; - } - - return mode; -} - /**************************************************************************** * Name: s32k1xx_get_soscfreq * @@ -783,7 +754,7 @@ static int s32k1xx_firc_config(bool enable, } /**************************************************************************** - * Name: s32k11_firc_clocksource + * Name: s32k1xx_firc_clocksource * * Description: * Configure to the FIRC clock source. @@ -797,7 +768,7 @@ static int s32k1xx_firc_config(bool enable, * ****************************************************************************/ -static int s32k11_firc_clocksource(void) +static int s32k1xx_firc_clocksource(void) { struct scg_system_clock_config_s firccfg; int ret = OK; @@ -944,6 +915,61 @@ static int s32k1xx_sirc_config(bool enable, return ret; } +#if defined(CONFIG_VLPR_STANDBY) || defined(CONFIG_VLPR_SLEEP) + +/**************************************************************************** + * Name: s32k1xx_sirc_clocksource + * + * Description: + * Configure to the SIRC clock source. + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) is returned a success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +static int s32k1xx_sirc_clocksource(void) +{ + struct scg_system_clock_config_s sirccfg; + int ret = OK; + + /* If the current system clock source is not SIRC: + * 1. Enable SIRC (if it's not enabled) + * 2. Switch to SIRC. + */ + + if (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SIRC) + { + /* If SIRC is not on, then SIRC is configured with the default + * configuration + */ + + if (s32k1xx_get_sircfreq() == 0) + { + ret = s32k1xx_sirc_config(true, NULL); + } + + /* SIRC is enabled, transition the system clock source to SIRC. */ + + if (ret == OK) + { + sirccfg.src = SCG_SYSTEM_CLOCK_SRC_SIRC; + sirccfg.divcore = g_tmp_sysclk[TMP_SIRC_CLK][TMP_SYS_DIV]; + sirccfg.divbus = g_tmp_sysclk[TMP_SIRC_CLK][TMP_BUS_DIV]; + sirccfg.divslow = g_tmp_sysclk[TMP_SIRC_CLK][TMP_SLOW_DIV]; + ret = s32k1xx_transition_systemclock(&sirccfg); + } + } + + return ret; +} + +#endif + /**************************************************************************** * Name: s32k1xx_sosc_config * @@ -1394,9 +1420,10 @@ static int s32k1xx_scg_config(const struct scg_config_s *scgcfg) DEBUGASSERT(scgcfg != NULL); - /* Configure a temporary system clock source: FIRC */ + /* Configure a temporary system clock source: FIRC if enabled */ + + ret = s32k1xx_firc_clocksource(); - ret = s32k11_firc_clocksource(); if (ret == OK) { /* Configure clock sources from SCG */ @@ -1654,6 +1681,10 @@ static void s32k1xx_pmc_config(const struct pmc_config_s *pmccfg) regval |= PMC_REGSC_LPODIS; } + /* Enable Biasing (needed for VLPR mode, no effect in RUN mode) */ + + regval |= PMC_REGSC_BIASEN; + putreg8(regval, S32K1XX_PMC_REGSC); /* Write trimming value. */ @@ -1662,10 +1693,843 @@ static void s32k1xx_pmc_config(const struct pmc_config_s *pmccfg) } } +/**************************************************************************** + * Name: s32k1xx_allow_vlprmode + * + * Description: + * allow the very low power run mode. + * + * Input Parameters: + * allow - true if allowed, false otherwise. + * + * Returned Value: + * none. + * + ****************************************************************************/ + +void s32k1xx_allow_vlprmode(bool allow) +{ + uint32_t regval; + + /* get the SMC_PMPROT register */ + + regval = getreg32(S32K1XX_SMC_PMPROT); + + /* mask the AVLP bit */ + + regval &= ~SMC_PMPROT_AVLP; + + /* set the new bit */ + + regval |= (allow << SMC_PMPROT_AVLP_SHIFT); + + /* set the registervalue */ + + putreg32(regval, S32K1XX_SMC_PMPROT); +} + +/**************************************************************************** + * Name: up_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + * Input Parameters: + * + * cb - Returned to the driver. The driver version of the callback + * structure may include additional, driver-specific state data at + * the end of the structure. + * + * pmstate - Identifies the new PM state + * + * Returned Value: + * None - The driver already agreed to transition to the low power + * consumption state when when it returned OK to the prepare() call. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void up_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + int return_value; + + /* check if the transition is from the IDLE domain to the NORMAL domain */ + + if (pm_querystate(PM_IDLE_DOMAIN) == PM_IDLE && + pmstate == PM_NORMAL) + { + /* return */ + + return; + } + + /* check what the new power state is */ + + switch (pmstate) + { + /* if it needs to be set to RUN mode */ + + case(PM_NORMAL): + { + /* Logic for PM_NORMAL goes here */ + + /* change the microcontroller to RUN mode */ + + /* and wait until in RUN mode */ + + return_value = (int)s32k1xx_set_runmode(SCG_SYSTEM_CLOCK_MODE_RUN); + + /* check for debug assertion */ + + DEBUGASSERT(return_value != (int)SCG_SYSTEM_CLOCK_MODE_NONE); + + /* enable all clock sources again if needed */ + + /* these could be the FIRC, PPL, and SOSC */ + + /* check if the FIRC was enabled and + * it is not the system clock source + */ + + if (g_initial_clkconfig.scg.firc.initialize && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SIRC)) + { + /* enable FIRC */ + + return_value = s32k1xx_firc_config(true, + &g_initial_clkconfig.scg.firc); + DEBUGASSERT(!return_value); + } + + /* check if the FIRC needs to be disabled and if it is enabled */ + + else if ((!(g_initial_clkconfig.scg.firc.initialize)) && + (s32k1xx_get_srcfreq(SCG_SYSTEM_CLOCK_SRC_FIRC))) + { + /* disable FIRC */ + + return_value = s32k1xx_firc_config(false, + &g_initial_clkconfig.scg.firc); + DEBUGASSERT(!return_value); + } + + /* check if the SOSC was enabled and + * it is not the system clock source + */ + + if (g_initial_clkconfig.scg.sosc.initialize && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_OSC) && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_PLL)) + { + /* enable SOSC */ + + return_value = + s32k1xx_sosc_config(true, &g_initial_clkconfig.scg.sosc); + DEBUGASSERT(!return_value); + } + + /* check if the SOSC needs to be disabled and if it is enabled */ + + else if ((!(g_initial_clkconfig.scg.sosc.initialize)) && + (s32k1xx_get_srcfreq(SCG_SYSTEM_CLOCK_SRC_SYS_OSC))) + { + /* disable SOSC */ + + return_value = + s32k1xx_sosc_config(false, &g_initial_clkconfig.scg.sosc); + DEBUGASSERT(!return_value); + } + + /* check if the SPLL was enabled and + * it is not the system clock source + */ + + if (g_initial_clkconfig.scg.spll.initialize && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_OSC) && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_PLL)) + { + /* enable SPLL */ + + return_value = s32k1xx_spll_config(true, + &g_initial_clkconfig.scg.spll); + DEBUGASSERT(!return_value); + } + + /* check if the SPLL needs to be disabled and if it is enabled */ + + else if ((!(g_initial_clkconfig.scg.spll.initialize)) && + (s32k1xx_get_srcfreq(SCG_SYSTEM_CLOCK_SRC_SYS_PLL))) + { + /* disable SPLL */ + + return_value = s32k1xx_spll_config(false, + &g_initial_clkconfig.scg.spll); + DEBUGASSERT(!return_value); + } + + /* check if the RCCR clock source is enabled */ + + if (s32k1xx_get_srcfreq(g_initial_clkconfig.scg.clockmode.rccr.src) + != 0) + { + /* change the system clock back to the configured clock */ + + /* and wait until clock changed */ + + if (s32k1xx_transition_systemclock( + &g_initial_clkconfig.scg.clockmode.rccr)) + { + /* error */ + + DEBUGASSERT(false); + } + } + + /* if it is 0 */ + + else + { + /* error */ + + DEBUGASSERT(false); + } + + /* calculate the new clock ticks */ + + up_timer_initialize(); + } + break; + + case(PM_IDLE): + { + /* Logic for PM_IDLE goes here */ + } + break; + + /* if it needs to be set to VLPR mode */ + + case(PM_STANDBY): + { + /* Logic for PM_STANDBY goes here */ + +#ifdef CONFIG_RUN_STANDBY + + /* change the microcontroller to RUN mode */ + + /* and wait until in RUN mode */ + + return_value = + (int)s32k1xx_set_runmode(SCG_SYSTEM_CLOCK_MODE_RUN); + DEBUGASSERT(return_value != (int)SCG_SYSTEM_CLOCK_MODE_NONE); + + /* enable all clock sources again if needed */ + + /* these could be the FIRC, PPL, and SOSC */ + + /* check if the FIRC was enabled and + * it is not the system clock source + */ + + if (g_initial_clkconfig.scg.firc.initialize && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SIRC)) + { + /* enable FIRC */ + + return_value = s32k1xx_firc_config(true, + &g_initial_clkconfig.scg.firc); + DEBUGASSERT(!return_value); + } + + /* check if the FIRC needs to be disabled and if it is enabled */ + + else if ((!(g_initial_clkconfig.scg.firc.initialize)) && + (s32k1xx_get_srcfreq(SCG_SYSTEM_CLOCK_SRC_FIRC))) + { + /* disable FIRC */ + + return_value = s32k1xx_firc_config(false, + &g_initial_clkconfig.scg.firc); + DEBUGASSERT(!return_value); + } + + /* check if the SOSC was enabled and + * it is not the system clock source + */ + + if (g_initial_clkconfig.scg.sosc.initialize && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_OSC) && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_PLL)) + { + /* enable SOSC */ + + return_value = + s32k1xx_sosc_config(true, &g_initial_clkconfig.scg.sosc); + DEBUGASSERT(!return_value); + } + + /* check if the SOSC needs to be disabled and if it is enabled */ + + else if ((!(g_initial_clkconfig.scg.sosc.initialize)) && + (s32k1xx_get_srcfreq(SCG_SYSTEM_CLOCK_SRC_SYS_OSC))) + { + /* disable SOSC */ + + return_value = + s32k1xx_sosc_config(false, &g_initial_clkconfig.scg.sosc); + DEBUGASSERT(!return_value); + } + + /* check if the SPLL was enabled and + * it is not the system clock source + */ + + if (g_initial_clkconfig.scg.spll.initialize && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_OSC) && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_PLL)) + { + /* enable SPLL */ + + return_value = s32k1xx_spll_config(true, + &g_initial_clkconfig.scg.spll); + DEBUGASSERT(!return_value); + } + + /* check if the SPLL needs to be disabled and if it is enabled */ + + else if ((!(g_initial_clkconfig.scg.spll.initialize)) && + (s32k1xx_get_srcfreq(SCG_SYSTEM_CLOCK_SRC_SYS_PLL))) + { + /* disable SPLL */ + + return_value = s32k1xx_spll_config(false, + &g_initial_clkconfig.scg.spll); + DEBUGASSERT(!return_value); + } + + /* check if the RCCR clock source is enabled */ + + if (s32k1xx_get_srcfreq(g_initial_clkconfig.scg.clockmode.rccr.src) + != 0) + { + /* change the system clock back to the configured clock */ + + /* and wait until clock changed */ + + if (s32k1xx_transition_systemclock( + &g_initial_clkconfig.scg.clockmode.rccr)) + { + /* error */ + + DEBUGASSERT(false); + } + } + + /* if it is 0 */ + + else + { + /* error */ + + DEBUGASSERT(false); + } + +#endif /* CONFIG_RUN_STANDBY */ + +#ifdef CONFIG_VLPR_STANDBY + + /* set the system clock to the SIRC 8MHz freq */ + + /* this freq will change to the predefined vccr settings + * when the mode change occures + */ + + /* and wait until system clock changed */ + + return_value = s32k1xx_sirc_clocksource(); + DEBUGASSERT(!return_value); + + /* disable the other clock sources if not already disabled */ + + /* these are the FIRC, PPL, and SOSC */ + + /* check if the SPLL is enabled */ + + if (s32k1xx_get_spllfreq() != 0) + { + /* disable SPLL */ + + return_value = s32k1xx_spll_config(false, + &g_initial_clkconfig.scg.spll); + DEBUGASSERT(!return_value); + } + + /* check if the SOSC is enabled */ + + if (s32k1xx_get_soscfreq() != 0) + { + /* disable SOSC */ + + return_value = + s32k1xx_sosc_config(false, &g_initial_clkconfig.scg.sosc); + DEBUGASSERT(!return_value); + } + + /* check if the FIRC is enabled */ + + if (s32k1xx_get_fircfreq() != 0) + { + /* disable FIRC */ + + return_value = s32k1xx_firc_config(false, + &g_initial_clkconfig.scg.firc); + DEBUGASSERT(!return_value); + } + + #ifdef CONFIG_ARCH_CHIP_S32K11X + /* TODO make sure CMU is gated? (only for S32k11x) */ + + #error Make sure CMU is gated + #endif + + /* change the microcontroller to VLPR mode */ + + /* and wait until it is in that runmode */ + + return_value = + (int)s32k1xx_set_runmode(SCG_SYSTEM_CLOCK_MODE_VLPR); + DEBUGASSERT(return_value != (int)SCG_SYSTEM_CLOCK_MODE_NONE); + +#endif /* CONFIG_VLPR_STANDBY */ + + /* calculate the new clock ticks */ + + up_timer_initialize(); + } + break; + + case(PM_SLEEP): + { + /* Logic for PM_SLEEP goes here */ + +#ifdef CONFIG_RUN_SLEEP + + /* change the microcontroller to RUN mode */ + + /* and wait until in RUN mode */ + + return_value = (int)s32k1xx_set_runmode(SCG_SYSTEM_CLOCK_MODE_RUN); + DEBUGASSERT(return_value != (int)SCG_SYSTEM_CLOCK_MODE_NONE); + + /* enable all clock sources again if needed */ + + /* these could be the FIRC, PPL, and SOSC */ + + /* check if the FIRC was enabled + * and it is not the system clock source + */ + + if (g_initial_clkconfig.scg.firc.initialize && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SIRC)) + { + /* enable FIRC */ + + return_value = s32k1xx_firc_config(true, + &g_initial_clkconfig.scg.firc); + DEBUGASSERT(!return_value); + } + + /* check if the FIRC needs to be disabled and if it is enabled */ + + else if ((!(g_initial_clkconfig.scg.firc.initialize)) && + (s32k1xx_get_srcfreq(SCG_SYSTEM_CLOCK_SRC_FIRC))) + { + /* disable FIRC */ + + return_value = s32k1xx_firc_config(false, + &g_initial_clkconfig.scg.firc); + DEBUGASSERT(!return_value); + } + + /* check if the SOSC was enabled + * and it is not the system clock source + */ + + if (g_initial_clkconfig.scg.sosc.initialize && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_OSC) && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_PLL)) + { + /* enable SOSC */ + + return_value = + s32k1xx_sosc_config(true, &g_initial_clkconfig.scg.sosc); + DEBUGASSERT(!return_value); + } + + /* check if the SOSC needs to be disabled and if it is enabled */ + + else if ((!(g_initial_clkconfig.scg.sosc.initialize)) && + (s32k1xx_get_srcfreq(SCG_SYSTEM_CLOCK_SRC_SYS_OSC))) + { + /* disable SOSC */ + + return_value = + s32k1xx_sosc_config(false, &g_initial_clkconfig.scg.sosc); + DEBUGASSERT(!return_value); + } + + /* check if the SPLL was enabled + * and it is not the system clock source + */ + + if (g_initial_clkconfig.scg.spll.initialize && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_OSC) && + (s32k1xx_get_scgclk_source() != SCG_SYSTEM_CLOCK_SRC_SYS_PLL)) + { + /* enable SPLL */ + + return_value = s32k1xx_spll_config(true, + &g_initial_clkconfig.scg.spll); + DEBUGASSERT(!return_value); + } + + /* check if the SPLL needs to be disabled and if it is enabled */ + + else if ((!(g_initial_clkconfig.scg.spll.initialize)) && + (s32k1xx_get_srcfreq(SCG_SYSTEM_CLOCK_SRC_SYS_PLL))) + { + /* disable SPLL */ + + return_value = s32k1xx_spll_config(false, + &g_initial_clkconfig.scg.spll); + DEBUGASSERT(!return_value); + } + + /* check if the RCCR clock source is enabled */ + + if (s32k1xx_get_srcfreq(g_initial_clkconfig.scg.clockmode.rccr.src) + != 0) + { + /* change the system clock back to the configured clock */ + + /* and wait until clock changed */ + + if (s32k1xx_transition_systemclock( + &g_initial_clkconfig.scg.clockmode.rccr)) + { + /* error */ + + DEBUGASSERT(false); + } + } + + /* if it is 0 */ + + else + { + /* error */ + + DEBUGASSERT(false); + } + +#endif /* CONFIG_RUN_SLEEP */ + +#ifdef CONFIG_VLPR_SLEEP + + /* set the system clock to the SIRC 8MHz freq */ + + /* this freq will change to the predefined vccr settings + * when the mode change occures + */ + + /* and wait until system clock changed */ + + return_value = s32k1xx_sirc_clocksource(); + DEBUGASSERT(!return_value); + + /* disable the other clock sources if not already disabled */ + + /* these are the FIRC, PPL, and SOSC */ + + /* check if the SPLL is enabled */ + + if (s32k1xx_get_spllfreq() != 0) + { + /* disable SPLL */ + + return_value = + s32k1xx_spll_config(false, &g_initial_clkconfig.scg.spll); + DEBUGASSERT(!return_value); + } + + /* check if the SOSC is enabled */ + + if (s32k1xx_get_soscfreq() != 0) + { + /* disable SOSC */ + + return_value = + s32k1xx_sosc_config(false, &g_initial_clkconfig.scg.sosc); + DEBUGASSERT(!return_value); + } + + /* check if the FIRC is enabled */ + + if (s32k1xx_get_fircfreq() != 0) + { + /* disable FIRC */ + + return_value = + s32k1xx_firc_config(false, &g_initial_clkconfig.scg.firc); + DEBUGASSERT(!return_value); + } + + #ifdef CONFIG_ARCH_CHIP_S32K11X + /* TODO make sure CMU is gated? (only for S32k11x) */ + + #error Make sure CMU is gated + #endif + /* change the microcontroller to VLPR mode */ + + /* and wait until it is in that runmode */ + + return_value = + (int)s32k1xx_set_runmode(SCG_SYSTEM_CLOCK_MODE_VLPR); + DEBUGASSERT(return_value != (int)SCG_SYSTEM_CLOCK_MODE_NONE); + +#endif /* CONFIG_VLPR_SLEEP */ + + /* calculate the new clock ticks */ + + up_timer_initialize(); + } + break; + + default: + + /* Should not get here */ + + break; + } +} +#endif + +/**************************************************************************** + * Name: up_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + * Input Parameters: + * + * cb - Returned to the driver. The driver version of the callback + * structure may include additional, driver-specific state data at + * the end of the structure. + * + * pmstate - Identifies the new PM state + * + * Returned Value: + * Zero - (OK) means the event was successfully processed and that the + * driver is prepared for the PM state change. + * + * Non-zero - means that the driver is not prepared to perform the tasks + * needed achieve this power setting and will cause the state + * change to be aborted. NOTE: The prepare() method will also + * be called when reverting from lower back to higher power + * consumption modes (say because another driver refused a + * lower power state change). Drivers are not permitted to + * return non-zero values when reverting back to higher power + * consumption modes! + * + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int up_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* Logic to prepare for a reduced power state goes here. */ + + return OK; +} +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ +/**************************************************************************** + * Name: s32k1xx_get_runmode + * + * Description: + * Get the current running mode. + * + * Input Parameters: + * None + * + * Returned Value: + * The current running mode. + * + ****************************************************************************/ + +enum scg_system_clock_mode_e s32k1xx_get_runmode(void) +{ + enum scg_system_clock_mode_e mode; + + /* Get the current running mode */ + + switch (getreg32(S32K1XX_SMC_PMSTAT) & SMC_PMSTAT_PMSTAT_MASK) + { + /* Run mode */ + + case SMC_PMSTAT_PMSTAT_RUN: + mode = SCG_SYSTEM_CLOCK_MODE_RUN; + break; + + /* Very low power run mode */ + + case SMC_PMSTAT_PMSTAT_VLPR: + mode = SCG_SYSTEM_CLOCK_MODE_VLPR; + break; + + /* High speed run mode */ + + case SMC_PMSTAT_PMSTAT_HSRUN: + mode = SCG_SYSTEM_CLOCK_MODE_HSRUN; + break; + + /* This should never happen - core has to be in some run mode to + * execute code + */ + + case SMC_PMSTAT_PMSTAT_VLPS: + default: + mode = SCG_SYSTEM_CLOCK_MODE_NONE; + break; + } + + return mode; +} + +/**************************************************************************** + * Name: s32k1xx_set_runmode + * + * Description: + * Set the running mode. + * + * Input Parameters: + * next_run_mode - The next running mode. + * + * Returned Value: + * The current running mode. + * + ****************************************************************************/ + +enum scg_system_clock_mode_e s32k1xx_set_runmode(enum scg_system_clock_mode_e + next_run_mode) +{ + enum scg_system_clock_mode_e mode; + + /* get the current run mode */ + + mode = s32k1xx_get_runmode(); + uint32_t regval; + + /* check if the current runmode is not the same as the next runmode */ + + if (mode != next_run_mode) + { + /* check what the next mode is */ + + switch (next_run_mode) + { + /* in case of the RUN mode */ + + /* it will use the clock configuration from S32K1XX_SCG_RCCR */ + + case SCG_SYSTEM_CLOCK_MODE_RUN: + + /* check if in VLPR mode */ + + if (mode == SCG_SYSTEM_CLOCK_MODE_VLPR) + { + /* get the SMC_PMCTRL register */ + + regval = getreg32(S32K1XX_SMC_PMCTRL); + + /* mask the RUNM bits */ + + regval &= ~SMC_PMCTRL_RUNM_MASK; + + /* change the mode to RUN mode */ + + regval |= SMC_PMCTRL_RUNM_RUN; + + /* write the register */ + + putreg32(regval, S32K1XX_SMC_PMCTRL); + + /* wait until it is in RUN mode */ + + while (s32k1xx_get_runmode() != SCG_SYSTEM_CLOCK_MODE_RUN); + } + + break; + + /* in case of the VLPR mode */ + + /* it will use the clock configuration from S32K1XX_SCG_VCCR */ + + case SCG_SYSTEM_CLOCK_MODE_VLPR: + + /* check if in RUN mode and VLPR mode is allowed */ + + if ((mode == SCG_SYSTEM_CLOCK_MODE_RUN) && + (getreg32(S32K1XX_SMC_PMPROT) & SMC_PMPROT_AVLP)) + { + /* get the SMC_PMCTRL register */ + + regval = getreg32(S32K1XX_SMC_PMCTRL); + + /* mask the RUNM bits */ + + regval &= ~SMC_PMCTRL_RUNM_MASK; + + /* change the mode to VLPR mode */ + + regval |= SMC_PMCTRL_RUNM_VLPR; + + /* write the register */ + + putreg32(regval, S32K1XX_SMC_PMCTRL); + + /* wait until it is in VLPR mode */ + + while (s32k1xx_get_runmode() != SCG_SYSTEM_CLOCK_MODE_VLPR); + } + break; + + /* others are not implemented */ + + default: + break; + } + + /* get the current run mode */ + + mode = s32k1xx_get_runmode(); + } + + /* return the mode */ + + return mode; +} + /**************************************************************************** * Name: s32k1xx_clockconfig * @@ -1690,11 +2554,22 @@ int s32k1xx_clockconfig(const struct clock_configuration_s *clkcfg) DEBUGASSERT(clkcfg != NULL); +#ifdef CONFIG_PM + /* Register to receive power management callbacks */ + + ret = pm_register(&g_clock_pmcb); + DEBUGASSERT(ret == OK); +#endif + /* Set SCG configuration */ ret = s32k1xx_scg_config(&clkcfg->scg); if (ret >= 0) { + /* Allow the VLPR mode */ + + s32k1xx_allow_vlprmode(true); + /* Set PCC configuration */ s32k1xx_periphclocks(clkcfg->pcc.count, clkcfg->pcc.pclks); diff --git a/arch/arm/src/s32k1xx/s32k1xx_clockconfig.h b/arch/arm/src/s32k1xx/s32k1xx_clockconfig.h index 05fdf2e8bd9..9ed9d8e338d 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_clockconfig.h +++ b/arch/arm/src/s32k1xx/s32k1xx_clockconfig.h @@ -440,6 +440,15 @@ struct clock_configuration_s struct pmc_config_s pmc; /* PMC Clock configuration */ }; +enum scg_system_clock_mode_e +{ + SCG_SYSTEM_CLOCK_MODE_CURRENT = 0, /* Current mode. */ + SCG_SYSTEM_CLOCK_MODE_RUN = 1, /* Run mode. */ + SCG_SYSTEM_CLOCK_MODE_VLPR = 2, /* Very Low Power Run mode. */ + SCG_SYSTEM_CLOCK_MODE_HSRUN = 3, /* High Speed Run mode. */ + SCG_SYSTEM_CLOCK_MODE_NONE /* MAX value. */ +}; + /**************************************************************************** * Inline Functions ****************************************************************************/ @@ -463,6 +472,39 @@ extern "C" * Public Function Prototypes ****************************************************************************/ +/**************************************************************************** + * Name: s32k1xx_get_runmode + * + * Description: + * Get the current running mode. + * + * Input Parameters: + * None + * + * Returned Value: + * The current running mode. + * + ****************************************************************************/ + +enum scg_system_clock_mode_e s32k1xx_get_runmode(void); + +/**************************************************************************** + * Name: s32k1xx_set_runmode + * + * Description: + * Set the running mode. + * + * Input Parameters: + * next_run_mode - The next running mode. + * + * Returned Value: + * The current running mode. + * + ****************************************************************************/ + +enum scg_system_clock_mode_e s32k1xx_set_runmode(enum scg_system_clock_mode_e + next_run_mode); + /**************************************************************************** * Name: s32k1xx_clockconfig * diff --git a/arch/arm/src/s32k1xx/s32k1xx_edma.c b/arch/arm/src/s32k1xx/s32k1xx_edma.c index 90d32dd081c..d429557c578 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_edma.c +++ b/arch/arm/src/s32k1xx/s32k1xx_edma.c @@ -171,7 +171,7 @@ static sq_queue_t g_tcd_free; /* This is a pool of pre-allocated TCDs */ static struct s32k1xx_edmatcd_s g_tcd_pool[CONFIG_S32K1XX_EDMA_NTCD] - __attribute__((aligned(EDMA_ALIGN))); + aligned_data(EDMA_ALIGN); #endif /**************************************************************************** diff --git a/arch/arm/src/s32k1xx/s32k1xx_enet.c b/arch/arm/src/s32k1xx/s32k1xx_enet.c index 5313c835a34..99eb5ee0231 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_enet.c +++ b/arch/arm/src/s32k1xx/s32k1xx_enet.c @@ -282,7 +282,7 @@ static struct s32k1xx_driver_s g_enet[CONFIG_S32K1XX_ENET_NETHIFS]; */ static uint8_t g_desc_pool[NENET_NBUFFERS * sizeof(struct enet_desc_s)] - __attribute__((aligned(ENET_ALIGN))); + aligned_data(ENET_ALIGN); /* The DMA buffers. Again, A unaligned uint8_t is used to allocate the * memory; 16 is added to assure that we can meet the descriptor alignment @@ -290,7 +290,7 @@ static uint8_t g_desc_pool[NENET_NBUFFERS * sizeof(struct enet_desc_s)] */ static uint8_t g_buffer_pool[NENET_NBUFFERS * S32K1XX_BUF_SIZE] - __attribute__((aligned(ENET_ALIGN))); + aligned_data(ENET_ALIGN); /**************************************************************************** * Private Function Prototypes diff --git a/arch/arm/src/s32k1xx/s32k1xx_flashcfg.c b/arch/arm/src/s32k1xx/s32k1xx_flashcfg.c index a77f4d8e7d3..3d4dd332e91 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_flashcfg.c +++ b/arch/arm/src/s32k1xx/s32k1xx_flashcfg.c @@ -34,7 +34,7 @@ /* Configured FLASH configuration bytes. NOTE: Little endian assumed. */ -const uint8_t g_flashcfg[16] __attribute__((section(".flashcfg"))) = +const uint8_t g_flashcfg[16] locate_data(".flashcfg") = { (uint8_t)(CONFIG_S32K1XX_FLASHCFG_BACKDOOR1 & 0xff), /* 0x0400 */ (uint8_t)((CONFIG_S32K1XX_FLASHCFG_BACKDOOR1 >> 8) & 0xff), /* 0x0401 */ diff --git a/arch/arm/src/s32k1xx/s32k1xx_flexcan.c b/arch/arm/src/s32k1xx/s32k1xx_flexcan.c index 5e8a894e0b9..870355a5740 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_flexcan.c +++ b/arch/arm/src/s32k1xx/s32k1xx_flexcan.c @@ -386,7 +386,7 @@ static inline uint32_t arm_lsb(unsigned int value) * classical can timings * * Returned Value: - * return 1 on succes, return 0 on failure + * return 1 on success, return 0 on failure * ****************************************************************************/ diff --git a/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c b/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c index 2095d6d821e..690f5d481d3 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c +++ b/arch/arm/src/s32k1xx/s32k1xx_lpi2c.c @@ -105,22 +105,11 @@ # define CONFIG_I2C_NTRACE 32 #endif -#ifdef CONFIG_I2C_SLAVE -# error I2C slave logic is not supported yet for S32K1XX -#endif - #define LPI2C_MASTER 1 #define LPI2C_SLAVE 2 -#define MKI2C_OUTPUT(p) (((p) & GPIO_PADMUX_MASK) | \ - IOMUX_OPENDRAIN | IOMUX_DRIVE_33OHM | \ - IOMUX_SLEW_SLOW | (5 << GPIO_ALT_SHIFT) | \ - IOMUX_PULL_NONE | GPIO_OUTPUT_ONE) - -#define MKI2C_INPUT(p) (((p) & GPIO_PADMUX_MASK) | \ - IOMUX_DRIVE_HIZ | IOMUX_SLEW_SLOW | \ - IOMUX_CMOS_INPUT | (5 << GPIO_ALT_SHIFT) | \ - IOMUX_PULL_NONE) +#define MKI2C_OUTPUT(p) (((p) & (~_PIN_MODE_MASK)) | GPIO_OUTPUT | GPIO_OUTPUT_ONE) +#define MKI2C_INPUT(p) (((p) & (~_PIN_MODE_MASK)) | GPIO_INPUT) /**************************************************************************** * Private Types @@ -142,10 +131,10 @@ enum s32k1xx_trace_e I2CEVENT_NONE = 0, /* No events have occurred with this status */ I2CEVENT_SENDADDR, /* Start/Master bit set and address sent, param = msgc */ I2CEVENT_SENDBYTE, /* Send byte, param = dcnt */ - I2CEVENT_RCVBYTE, /* Read more dta, param = dcnt */ + I2CEVENT_RCVBYTE, /* Read more data, param = dcnt */ I2CEVENT_NOSTART, /* BTF on last byte with no restart, param = msgc */ I2CEVENT_STARTRESTART, /* Last byte sent, re-starting, param = msgc */ - I2CEVENT_STOP, /* Last byte sten, send stop, param = 0 */ + I2CEVENT_STOP, /* Last byte sent, send stop, param = 0 */ I2CEVENT_ERROR /* Error occurred, param = 0 */ }; @@ -160,7 +149,7 @@ struct s32k1xx_trace_s clock_t time; /* First of event or first status */ }; -/* I2C Device hardware configuration */ +/* I2C device hardware configuration */ struct s32k1xx_lpi2c_config_s { @@ -270,7 +259,7 @@ static inline void static inline uint32_t s32k1xx_lpi2c_getstatus(FAR struct s32k1xx_lpi2c_priv_s *priv); -static int s32k1xx_lpi2c_isr_process(struct s32k1xx_lpi2c_priv_s * priv); +static int s32k1xx_lpi2c_isr_process(struct s32k1xx_lpi2c_priv_s *priv); #ifndef CONFIG_I2C_POLLED static int s32k1xx_lpi2c_isr(int irq, void *context, FAR void *arg); @@ -308,9 +297,9 @@ static const char *g_trace_names[] = static const struct i2c_ops_s s32k1xx_lpi2c_ops = { - .transfer = s32k1xx_lpi2c_transfer + .transfer = s32k1xx_lpi2c_transfer, #ifdef CONFIG_I2C_RESET - , .reset = s32k1xx_lpi2c_reset + .reset = s32k1xx_lpi2c_reset, #endif }; @@ -325,11 +314,7 @@ static const struct s32k1xx_lpi2c_config_s s32k1xx_lpi2c0_config = .filtsda = CONFIG_LPI2C0_FILTSDA, .scl_pin = PIN_LPI2C0_SCL, .sda_pin = PIN_LPI2C0_SDA, -#ifndef CONFIG_I2C_SLAVE .mode = LPI2C_MASTER, -#else - .mode = LPI2C_SLAVE, -#endif #ifndef CONFIG_I2C_POLLED .irq = S32K1XX_IRQ_LPI2C0M, #endif @@ -346,9 +331,9 @@ static struct s32k1xx_lpi2c_priv_s s32k1xx_lpi2c0_priv = .ptr = NULL, .dcnt = 0, .flags = 0, - .status = 0 + .status = 0, }; -#endif +#endif /* CONFIG_S32K1XX_LPI2C0 */ #ifdef CONFIG_S32K1XX_LPI2C1 static const struct s32k1xx_lpi2c_config_s s32k1xx_lpi2c1_config = @@ -359,11 +344,7 @@ static const struct s32k1xx_lpi2c_config_s s32k1xx_lpi2c1_config = .filtsda = CONFIG_LPI2C1_FILTSDA, .scl_pin = PIN_LPI2C1_SCL, .sda_pin = PIN_LPI2C1_SDA, -#ifndef CONFIG_I2C_SLAVE .mode = LPI2C_MASTER, -#else - .mode = LPI2C_SLAVE, -#endif #ifndef CONFIG_I2C_POLLED .irq = S32K1XX_IRQ_LPI2C1M, #endif @@ -380,9 +361,9 @@ static struct s32k1xx_lpi2c_priv_s s32k1xx_lpi2c1_priv = .ptr = NULL, .dcnt = 0, .flags = 0, - .status = 0 + .status = 0, }; -#endif +#endif /* CONFIG_S32K1XX_LPI2C1 */ /**************************************************************************** * Private Functions @@ -592,12 +573,14 @@ static inline int s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_MIER_OFFSET, 0); } +#if 0 /* Enable Interrupts when slave mode */ else { s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_SIER_OFFSET, 0); } +#endif leave_critical_section(flags); return ret; @@ -1199,7 +1182,7 @@ static int s32k1xx_lpi2c_isr_process(struct s32k1xx_lpi2c_priv_s *priv) s32k1xx_lpi2c_tracenew(priv, status); - /* After an error we can get an SDF */ + /* After an error we can get a STOP Detect Flag */ if (priv->intstate == INTSTATE_DONE && (status & LPI2C_MSR_SDF) != 0) { @@ -1272,9 +1255,9 @@ static int s32k1xx_lpi2c_isr_process(struct s32k1xx_lpi2c_priv_s *priv) { if (priv->msgc > 0 && priv->msgv != NULL) { - priv->ptr = priv->msgv->buffer; - priv->dcnt = priv->msgv->length; - priv->flags = priv->msgv->flags; + priv->ptr = priv->msgv->buffer; + priv->dcnt = priv->msgv->length; + priv->flags = priv->msgv->flags; if ((priv->msgv->flags & I2C_M_NOSTART) == 0) { @@ -1431,9 +1414,9 @@ static int s32k1xx_lpi2c_isr(int irq, void *context, FAR void *arg) static int s32k1xx_lpi2c_init(FAR struct s32k1xx_lpi2c_priv_s *priv) { - /* Power-up and configure GPIOs . + /* Power-up and configure pins. * - * NOTE: Clocking to the LPSPI peripheral must be provided by + * NOTE: Clocking to the LPI2C peripheral must be provided by * board-specific logic as part of the clock configuration logic. */ @@ -1447,7 +1430,7 @@ static int s32k1xx_lpi2c_init(FAR struct s32k1xx_lpi2c_priv_s *priv) s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_MCR_OFFSET, LPI2C_MCR_RST); s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_MCR_OFFSET, 0); - /* Disable doze mode (Set DOZEN bit in 1 to disable) */ + /* Disable doze mode (Set DOZEN bit to 1 to disable) */ s32k1xx_lpi2c_putreg(priv, S32K1XX_LPI2C_MCR_OFFSET, LPI2C_MCR_DOZEN); @@ -1585,7 +1568,7 @@ static int s32k1xx_lpi2c_transfer(FAR struct i2c_master_s *dev, priv->status = 0; - /* Wait for an ISR, if there was a timeout, fetch latest status to get + /* Wait for ISR. If there was a timeout, fetch latest status to get * the BUSY flag. */ @@ -1820,7 +1803,7 @@ FAR struct i2c_master_s *s32k1xx_i2cbus_initialize(int port) } /* Initialize private data for the first time, increment reference count, - * power-up hardware and configure GPIOs. + * power-up hardware and configure pins. */ flags = enter_critical_section(); diff --git a/arch/arm/src/s32k1xx/s32k1xx_lpi2c_slave.c b/arch/arm/src/s32k1xx/s32k1xx_lpi2c_slave.c new file mode 100644 index 00000000000..18a839dbe68 --- /dev/null +++ b/arch/arm/src/s32k1xx/s32k1xx_lpi2c_slave.c @@ -0,0 +1,931 @@ +/**************************************************************************** + * arch/arm/src/s32k1xx/s32k1xx_lpi2c_slave.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "arm_arch.h" + +#include "s32k1xx_pin.h" +#include "hardware/s32k1xx_pinmux.h" +#include "s32k1xx_lpi2c.h" +#include "s32k1xx_lpi2c_slave.h" +#include "s32k1xx_periphclocks.h" + +#include + +/* At least one I2C peripheral must be enabled, as well as the I2C slave */ + +#if defined(CONFIG_S32K1XX_LPI2C) && defined(CONFIG_I2C_SLAVE) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_ARCH_CHIP_S32K11X +#warning LPI2C slave logic does not support S32K11X (yet) +#endif + +#ifdef CONFIG_I2C_POLLED +#warning LPI2C slave logic does not support polling (yet) +#endif + +#ifdef CONFIG_I2C_TRACE +#warning LPI2C slave logic does not support I2C trace debugging (yet) +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* I2C slave device hardware configuration */ + +struct s32k1xx_lpi2c_slave_config_s +{ + uint32_t base; /* LPI2C base address */ + bool slave_bus; /* Separate I2C slave bus? */ + uint32_t scl_pin; /* GPIO configuration for SCL as SCL */ + uint32_t sda_pin; /* GPIO configuration for SDA as SDA */ + uint32_t irq; /* Event IRQ */ +}; + +/* I2C slave device private data */ + +struct s32k1xx_lpi2c_slave_priv_s +{ + const struct i2c_slaveops_s *ops; /* I2C slave operations */ + const struct s32k1xx_lpi2c_slave_config_s *config; /* LPI2C slave configuration */ + + int slave_addr; /* I2C address of the slave */ + int addr_nbits; /* 7- or 10-bit addressing */ + + uint8_t *read_buffer; /* Read buffer (master wants to write, slave will read data) */ + int read_buflen; /* Read buffer size */ + int read_bufindex; /* Read buffer index */ + + const uint8_t *write_buffer; /* Write buffer (master wants to read, slave will write data) */ + int write_buflen; /* Write buffer size */ + int write_bufindex; /* Write buffer index */ + + int (*callback)(FAR void *arg); /* Callback function when data has been received */ + void *callback_arg; /* Argument of callback function */ + + int refs; /* Reference count */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static inline uint32_t s32k1xx_lpi2c_slave_getreg( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv, uint16_t offset); +static inline void s32k1xx_lpi2c_slave_putreg( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv, uint16_t offset, + uint32_t value); +static inline void s32k1xx_lpi2c_slave_modifyreg( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv, uint16_t offset, + uint32_t clearbits, uint32_t setbits); + +static int s32k1xx_lpi2c_slave_isr_process( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv); +static int s32k1xx_lpi2c_slave_isr(int irq, void *context, FAR void *arg); + +static int s32k1xx_lpi2c_slave_init( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv); +static int s32k1xx_lpi2c_slave_deinit( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv); + +static int s32k1xx_lpi2c_setownaddress(FAR struct i2c_slave_s *dev, int addr, + int nbits); +static int s32k1xx_lpi2c_write(FAR struct i2c_slave_s *dev, + FAR const uint8_t *buffer, int buflen); +static int s32k1xx_lpi2c_read(FAR struct i2c_slave_s *dev, + FAR uint8_t *buffer, int buflen); +static int s32k1xx_lpi2c_registercallback(FAR struct i2c_slave_s *dev, + int (*callback)(FAR void *arg), + FAR void *arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* I2C slave interface */ + +static const struct i2c_slaveops_s s32k1xx_lpi2c_slaveops = +{ + .setownaddress = s32k1xx_lpi2c_setownaddress, + .write = s32k1xx_lpi2c_write, + .read = s32k1xx_lpi2c_read, + .registercallback = s32k1xx_lpi2c_registercallback, +}; + +/* I2C device structures */ + +#ifdef CONFIG_S32K1XX_LPI2C0 +static const struct s32k1xx_lpi2c_slave_config_s s32k1xx_lpi2c0s_config = +{ + .base = S32K1XX_LPI2C0_BASE, + +#ifdef CONFIG_LPI2C0_SLAVE_BUS + .slave_bus = true, + .scl_pin = PIN_LPI2C0_SCLS, + .sda_pin = PIN_LPI2C0_SDAS, +#else + .slave_bus = false, + .scl_pin = PIN_LPI2C0_SCL, + .sda_pin = PIN_LPI2C0_SDA, +#endif + + .irq = S32K1XX_IRQ_LPI2C0S, +}; + +static struct s32k1xx_lpi2c_slave_priv_s s32k1xx_lpi2c0s_priv = +{ + .ops = &s32k1xx_lpi2c_slaveops, + .config = &s32k1xx_lpi2c0s_config, + .slave_addr = CONFIG_LPI2C0_SLAVE_ADDRESS, + .addr_nbits = 7, + .read_buffer = NULL, + .read_buflen = 0, + .read_bufindex = 0, + .write_buffer = NULL, + .write_buflen = 0, + .write_bufindex = 0, + .callback = NULL, + .callback_arg = NULL, + .refs = 0, +}; +#endif /* CONFIG_S32K1XX_LPI2C0 */ + +#ifdef CONFIG_S32K1XX_LPI2C1 +static const struct s32k1xx_lpi2c_slave_config_s s32k1xx_lpi2c1s_config = +{ + .base = S32K1XX_LPI2C1_BASE, + +#ifdef CONFIG_LPI2C1_SLAVE_BUS + .slave_bus = true, + .scl_pin = PIN_LPI2C1S_SCL, + .sda_pin = PIN_LPI2C1S_SDA, +#else + .slave_bus = false, + .scl_pin = PIN_LPI2C1_SCL, + .sda_pin = PIN_LPI2C1_SDA, +#endif + + .irq = S32K1XX_IRQ_LPI2C1S, +}; + +static struct s32k1xx_lpi2c_slave_priv_s s32k1xx_lpi2c1s_priv = +{ + .ops = &s32k1xx_lpi2c_slaveops, + .config = &s32k1xx_lpi2c1s_config, + .slave_addr = CONFIG_LPI2C1_SLAVE_ADDRESS, + .addr_nbits = 7, + .read_buffer = NULL, + .read_buflen = 0, + .read_bufindex = 0, + .write_buffer = NULL, + .write_buflen = 0, + .write_bufindex = 0, + .callback = NULL, + .callback_arg = NULL, + .refs = 0, +}; +#endif /* CONFIG_S32K1XX_LPI2C1 */ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_lpi2c_slave_getreg + * + * Description: + * Get a 32-bit register value by offset + * + * Input Parameters: + * priv - I2C slave device private data + * offset - Register offset with respect to the base address of the I2C + * peripheral + * + * Returned Value: + * The 32-bit value retrieved from the register + * + ****************************************************************************/ + +static inline uint32_t s32k1xx_lpi2c_slave_getreg( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv, uint16_t offset) +{ + return getreg32(priv->config->base + offset); +} + +/**************************************************************************** + * Name: s32k1xx_lpi2c_slave_putreg + * + * Description: + * Put a 32-bit register value by offset + * + * Input Parameters: + * priv - I2C slave device private data + * offset - Register offset with respect to the base address of the I2C + * peripheral + * value - The 32-bit value that should be put into the register + * + ****************************************************************************/ + +static inline void s32k1xx_lpi2c_slave_putreg( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv, uint16_t offset, + uint32_t value) +{ + putreg32(value, priv->config->base + offset); +} + +/**************************************************************************** + * Name: s32k1xx_lpi2c_slave_modifyreg + * + * Description: + * Modify a 32-bit register value by offset + * + * Input Parameters: + * priv - I2C slave device private data + * offset - Register offset with respect to the base address of the I2C + * peripheral + * clearbits - Bitmask with the bits that should be cleared (put to 0) + * setbits - Bitmask with the bits that should be set (put to 1) + * + ****************************************************************************/ + +static inline void s32k1xx_lpi2c_slave_modifyreg( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv, uint16_t offset, + uint32_t clearbits, uint32_t setbits) +{ + modifyreg32(priv->config->base + offset, clearbits, setbits); +} + +/**************************************************************************** + * Name: s32k1xx_lpi2c_slave_isr_process + * + * Description: + * Process LPI2C slave interrupts. Check for relevant flags and read or + * write data to buffers. After a block of data has been received a + * callback function (if any) may be invoked, which might install a new + * write buffer to transmit data when requested. + * + * Input Parameters: + * priv - I2C slave device private data + * + * Returned Value: + * OK when successful, or a negated errno when there is an error. + * + ****************************************************************************/ + +static int s32k1xx_lpi2c_slave_isr_process( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv) +{ + uint32_t status = s32k1xx_lpi2c_slave_getreg(priv, + S32K1XX_LPI2C_SSR_OFFSET); + + /* Slave Address Valid Flag */ + + if (status & LPI2C_SSR_AVF) + { + /* A new transfer was initiated by a bus master. The transfer request + * was addressed to this particular device. It needs to be checked if + * the master wants to read or write. + */ + + uint16_t address = (uint16_t) (s32k1xx_lpi2c_slave_getreg(priv, + S32K1XX_LPI2C_SASR_OFFSET) & LPI2C_SASR_RADDR_MASK); + + if (address & I2CS_READBIT) + { + /* Master wants to read, so the slave needs to write/transmit. + * The Transmit Data Interrupt will only be enabled now, see + * erratum 10792. Also reset the buffer index back to zero to + * start sending again from the beginning. + */ + + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_SIER_OFFSET, 0, + LPI2C_SIER_TDIE); + + priv->write_bufindex = 0; + } + else + { + /* Master wants to write, so the slave needs to read. The Receive + * Data Interrupt remains enabled, so just reset the buffer index. + */ + + priv->read_bufindex = 0; + } + } + + /* Slave Transmits Data Flag (master wants to read) */ + + if (status & LPI2C_SSR_TDF) + { + /* Make sure that interrupts are enabled for this event */ + + if (s32k1xx_lpi2c_slave_getreg(priv, + S32K1XX_LPI2C_SIER_OFFSET) & LPI2C_SIER_TDIE) + { + if (priv->write_buflen > priv->write_bufindex) + { + /* Transmit data from buffer */ + + s32k1xx_lpi2c_slave_putreg(priv, S32K1XX_LPI2C_STDR_OFFSET, + (uint32_t) priv->write_buffer[priv->write_bufindex]); + priv->write_bufindex++; + } + else + { + /* Beyond the buffer length. Transmit dummy data... */ + + s32k1xx_lpi2c_slave_putreg(priv, S32K1XX_LPI2C_STDR_OFFSET, 0); + } + } + } + + /* Slave Receives Data (master wants to write) */ + + if (status & LPI2C_SSR_RDF) + { + /* Make sure that interrupts are enabled for this event */ + + if (s32k1xx_lpi2c_slave_getreg(priv, + S32K1XX_LPI2C_SIER_OFFSET) & LPI2C_SIER_RDIE) + { + if (priv->read_buflen > priv->read_bufindex) + { + /* Read data into buffer */ + + priv->read_buffer[priv->read_bufindex] = + (uint8_t) s32k1xx_lpi2c_slave_getreg(priv, + S32K1XX_LPI2C_SRDR_OFFSET); + priv->read_bufindex++; + } + else + { + /* Dummy read, throw away the data */ + + s32k1xx_lpi2c_slave_getreg(priv, S32K1XX_LPI2C_SRDR_OFFSET); + } + } + } + + /* Stop or Repeated Start (current transfer is over) */ + + if (s32k1xx_lpi2c_slave_getreg(priv, S32K1XX_LPI2C_SSR_OFFSET) & \ + (LPI2C_SSR_SDF | LPI2C_SSR_RSF)) + { + /* Clear Stop Detect / Repeated Start Flags */ + + s32k1xx_lpi2c_slave_putreg(priv, S32K1XX_LPI2C_SSR_OFFSET, + LPI2C_SSR_SDF | LPI2C_SSR_RSF); + + /* Disable the Transmit Data Interrupt again, see erratum 10792 */ + + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_SIER_OFFSET, + LPI2C_SIER_TDIE, 0); + + /* Execute the registered callback function if data was received */ + + if ((priv->read_bufindex > 0) && (priv->callback != NULL)) + { + priv->callback(priv->callback_arg); + } + } + + /* Slave Bit Error (abort current transfer) */ + + if (s32k1xx_lpi2c_slave_getreg(priv, S32K1XX_LPI2C_SSR_OFFSET) & \ + LPI2C_SSR_BEF) + { + /* Clear Bit Error Flag */ + + s32k1xx_lpi2c_slave_putreg(priv, S32K1XX_LPI2C_SSR_OFFSET, + LPI2C_SSR_BEF); + + /* Disable the Transmit Data Interrupt again, see erratum 10792 */ + + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_SIER_OFFSET, + LPI2C_SIER_TDIE, 0); + } + + return OK; +} + +/**************************************************************************** + * Name: s32k1xx_lpi2c_slave_isr + * + * Description: + * Interrupt Service Routine for LPI2C slave devices. Retrieves the + * private data from the argument, further processing is done by + * s32k1xx_lpi2c_slave_isr_process(). + * + * Input Parameters: + * irq - Number of the IRQ that generated the interrupt + * context - Interrupt register state save info (architecture-specific) + * arg - I2C slave device private data + * + * Returned Value: + * OK when successful, or a negated errno when there is an error. + * + ****************************************************************************/ + +static int s32k1xx_lpi2c_slave_isr(int irq, void *context, FAR void *arg) +{ + struct s32k1xx_lpi2c_slave_priv_s *priv = + (struct s32k1xx_lpi2c_slave_priv_s *)arg; + + DEBUGASSERT(priv != NULL); + + return s32k1xx_lpi2c_slave_isr_process(priv); +} + +/**************************************************************************** + * Name: s32k1xx_lpi2c_slave_init + * + * Description: + * Initialize the LPI2C slave device. Enable and configure the peripheral + * and enable the interrupts and attach handlers. + * + * Input Parameters: + * priv - I2C slave device private data + * + * Returned Value: + * OK when successful, or a negated errno when there is an error. + * + ****************************************************************************/ + +static int s32k1xx_lpi2c_slave_init( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv) +{ + int ret; + + /* Reset LPI2C slave mode logic before configuring it */ + + s32k1xx_lpi2c_slave_putreg(priv, S32K1XX_LPI2C_SCR_OFFSET, LPI2C_SCR_RST); + s32k1xx_lpi2c_slave_putreg(priv, S32K1XX_LPI2C_SCR_OFFSET, 0); + + /* Configure pins and power up peripheral. + * + * NOTE: Clocking to the LPI2C peripheral must be provided by + * board-specific logic as part of the clock configuration logic. + */ + + ret = s32k1xx_pinconfig(priv->config->scl_pin); + if (ret != OK) + { + return ret; + } + + ret = s32k1xx_pinconfig(priv->config->sda_pin); + if (ret != OK) + { + return ret; + } + + /* Choose between a combined or separated LPI2C master and slave. When a + * separate slave bus is selected, the LPI2C slave will use different pins + * than the LPI2C master. These pins should be defined in board.h + */ + + if (priv->config->slave_bus) + { + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_MCFGR1_OFFSET, + LPI2C_MCFGR1_PINCFG_MASK, LPI2C_MCFGR1_PINCFG4); + } + else + { + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_MCFGR1_OFFSET, + LPI2C_MCFGR1_PINCFG_MASK, LPI2C_MCFGR1_PINCFG0); + } + + /* Configure slave address + * + * TO DO: Allow 10-bit addressing + */ + + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_SAMR_OFFSET, 0, + LPI2C_SAMR_ADDR0(priv->slave_addr)); + + /* Enable clock stretching */ + + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_SCFGR1_OFFSET, 0, + LPI2C_SCFGR1_ADRSTALL | LPI2C_SCFGR1_RXSTALL | LPI2C_SCFGR1_TXSTALL); + + /* Configure LPI2C slave interrupts */ + + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_SIER_OFFSET, 0, + LPI2C_SIER_RDIE | LPI2C_SIER_AVIE | LPI2C_SIER_RSIE | LPI2C_SIER_SDIE | \ + LPI2C_SIER_BEIE); + + /* Attach ISR and enable interrupt */ + + ret = irq_attach(priv->config->irq, s32k1xx_lpi2c_slave_isr, priv); + if (ret != OK) + { + return ret; + } + + up_enable_irq(priv->config->irq); + + /* Enable I2C slave */ + + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_SCR_OFFSET, 0, + LPI2C_SCR_SEN); + + return OK; +} + +/**************************************************************************** + * Name: s32k1xx_lpi2c_slave_deinit + * + * Description: + * Deinitialize the LPI2C slave device. Disable and reset the peripheral + * and disable the interrupts and attached handlers. + * + * Input Parameters: + * priv - I2C slave device private data + * + * Returned Value: + * OK when successful, or a negated errno when there is an error. + * + ****************************************************************************/ + +static int s32k1xx_lpi2c_slave_deinit( + FAR struct s32k1xx_lpi2c_slave_priv_s *priv) +{ + int ret; + + /* Disable LPI2C slave */ + + s32k1xx_lpi2c_slave_modifyreg(priv, S32K1XX_LPI2C_SCR_OFFSET, + LPI2C_SCR_SEN, 0); + + /* Reset LPI2C slave */ + + s32k1xx_lpi2c_slave_putreg(priv, S32K1XX_LPI2C_SCR_OFFSET, LPI2C_SCR_RST); + s32k1xx_lpi2c_slave_putreg(priv, S32K1XX_LPI2C_SCR_OFFSET, 0); + + /* Disable and detach interrupts */ + + up_disable_irq(priv->config->irq); + ret = irq_detach(priv->config->irq); + if (ret != OK) + { + return ret; + } + + /* NOTE that clocking is left enabled */ + + return OK; +} + +/**************************************************************************** + * Device Driver Operations + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_lpi2c_setownaddress + * + * Description: + * Set our own I2C address. + * + * One may register a callback to be notified about reception. During the + * slave mode reception, the methods READ and WRITE must be used to + * to handle reads and writes from a master. + * + * Input Parameters: + * dev - I2C slave device-specific state data + * address - Our own slave address + * nbits - The number of address bits provided (7 or 10) + * + * Returned Value: + * OK when successful, or a negated errno when there is an error. + * + ****************************************************************************/ + +static int s32k1xx_lpi2c_setownaddress(FAR struct i2c_slave_s *dev, int addr, + int nbits) +{ + FAR struct s32k1xx_lpi2c_slave_priv_s *priv; + irqstate_t flags; + + DEBUGASSERT(dev); + priv = (FAR struct s32k1xx_lpi2c_slave_priv_s *)dev; + + flags = enter_critical_section(); + + /* Deinit slave before we change its configuration */ + + int ret = s32k1xx_lpi2c_slave_deinit(priv); + if (ret != OK) + { + leave_critical_section(flags); + return ret; + } + + /* Modify configuration */ + + switch (nbits) + { + case 7: + { + priv->slave_addr = (addr & 0x7f); + priv->addr_nbits = 7; + } + break; + + case 10: + { + priv->slave_addr = (addr & 0x03ff); + priv->addr_nbits = 10; + } + break; + + default: + { + leave_critical_section(flags); + return ERROR; + } + break; + } + + /* Reinitialize slave with the changed config */ + + s32k1xx_lpi2c_slave_init(priv); + + leave_critical_section(flags); + + return OK; +} + +/**************************************************************************** + * Name: s32k1xx_lpi2c_write + * + * Description: + * Send a block of data on I2C when a bus master wants to read data from + * this particular device. + * + * Input Parameters: + * dev - I2C slave device-specific state data + * buffer - A pointer to the read-only buffer of data to be written to the + * device + * buflen - The number of bytes to send from the buffer + * + * Returned Value: + * OK when successful, or a negated errno when there is an error. + * + ****************************************************************************/ + +static int s32k1xx_lpi2c_write(FAR struct i2c_slave_s *dev, + FAR const uint8_t *buffer, int buflen) +{ + FAR struct s32k1xx_lpi2c_slave_priv_s *priv; + irqstate_t flags; + + DEBUGASSERT(dev); + priv = (FAR struct s32k1xx_lpi2c_slave_priv_s *)dev; + + flags = enter_critical_section(); + + /* Update the registered buffer and length */ + + priv->write_buffer = buffer; + priv->write_buflen = buflen; + + leave_critical_section(flags); + + return OK; +} + +/**************************************************************************** + * Name: s32k1xx_lpi2c_read + * + * Description: + * Receive a block of data from I2C when a bus master writes data addressed + * to this particular device. + * + * Input Parameters: + * dev - I2C slave device-specific state data + * buffer - A pointer to a buffer of data to receive the data from the + * device + * buflen - The maximum size of the buffer + * + * Returned Value: + * OK when successful, or a negated errno when there is an error. + * + ****************************************************************************/ + +static int s32k1xx_lpi2c_read(FAR struct i2c_slave_s *dev, + FAR uint8_t *buffer, int buflen) +{ + FAR struct s32k1xx_lpi2c_slave_priv_s *priv; + irqstate_t flags; + + DEBUGASSERT(dev); + priv = (FAR struct s32k1xx_lpi2c_slave_priv_s *)dev; + + flags = enter_critical_section(); + + /* Update the registered buffer and length */ + + priv->read_buffer = buffer; + priv->read_buflen = buflen; + + leave_critical_section(flags); + + return OK; +} + +/**************************************************************************** + * Name: s32k1xx_lpi2c_registercallback + * + * Description: + * Register a callback function that will be invoked when something is + * received on I2C. + * + * Input Parameters: + * dev - I2C slave device-specific state data + * callback - The function to be called when something has been received. + * arg - User provided argument to be used with the callback + * + * Returned Value: + * OK when successful, or a negated errno when there is an error. + * + ****************************************************************************/ + +static int s32k1xx_lpi2c_registercallback(FAR struct i2c_slave_s *dev, + int (*callback)(FAR void *arg), FAR void *arg) +{ + FAR struct s32k1xx_lpi2c_slave_priv_s *priv; + irqstate_t flags; + + DEBUGASSERT(dev); + priv = (FAR struct s32k1xx_lpi2c_slave_priv_s *)dev; + + flags = enter_critical_section(); + + /* Update the registered callback and argument */ + + priv->callback = callback; + priv->callback_arg = arg; + + leave_critical_section(flags); + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_i2cbus_slave_initialize + * + * Description: + * Initialize the I2C slave device and increase the reference counter. + * If the device has already been initialized only the reference counter + * will be increased. + * + * Input Parameters: + * port - Port number (for hardware that has multiple I2C interfaces). + * + * Returned Value: + * A valid I2C device structure reference on success; a NULL on failure. + * + ****************************************************************************/ + +FAR struct i2c_slave_s *s32k1xx_i2cbus_slave_initialize(int port) +{ + struct s32k1xx_lpi2c_slave_priv_s *priv; + irqstate_t flags; + + /* Get I2C private structure */ + + switch (port) + { +#ifdef CONFIG_S32K1XX_LPI2C0 + case 0: + priv = (struct s32k1xx_lpi2c_slave_priv_s *)&s32k1xx_lpi2c0s_priv; + break; +#endif + +#ifdef CONFIG_S32K1XX_LPI2C1 + case 1: + priv = (struct s32k1xx_lpi2c_slave_priv_s *)&s32k1xx_lpi2c1s_priv; + break; +#endif + + default: + return NULL; + } + + flags = enter_critical_section(); + + if ((volatile int) priv->refs == 0) + { + /* Initialize private data for the first time, increment reference + * count, power-up hardware and configure pins. + */ + + s32k1xx_lpi2c_slave_init(priv); + } + + priv->refs++; + + leave_critical_section(flags); + + return (struct i2c_slave_s *)priv; +} + +/**************************************************************************** + * Name: s32k1xx_i2cbus_slave_uninitialize + * + * Description: + * Decrease the reference counter of the I2C slave device. When there are + * no more references left the I2C slave device is unitialized. + * + * Input Parameters: + * dev - Device structure as returned by s32k1xx_i2cbus_slave_initialize(). + * + * Returned Value: + * OK on success, ERROR when there is an internal reference count mismatch + * or dev points to an invalid hardware device. + * + ****************************************************************************/ + +int s32k1xx_i2cbus_slave_uninitialize(FAR struct i2c_slave_s *dev) +{ + FAR struct s32k1xx_lpi2c_slave_priv_s *priv = + (struct s32k1xx_lpi2c_slave_priv_s *)dev; + irqstate_t flags; + + DEBUGASSERT(dev); + + /* Check reference count for underflow, then decrement */ + + flags = enter_critical_section(); + + if (priv->refs == 0) + { + leave_critical_section(flags); + return ERROR; + } + + priv->refs--; + + if (priv->refs > 0) + { + leave_critical_section(flags); + return OK; + } + + leave_critical_section(flags); + + /* Disable power and other HW resources (pins) */ + + s32k1xx_lpi2c_slave_deinit(priv); + + return OK; +} + +#endif /* CONFIG_S32K1XX_LPI2C && CONFIG_I2C_SLAVE */ diff --git a/arch/arm/src/s32k1xx/s32k1xx_lpi2c_slave.h b/arch/arm/src/s32k1xx/s32k1xx_lpi2c_slave.h new file mode 100644 index 00000000000..d7839b1998b --- /dev/null +++ b/arch/arm/src/s32k1xx/s32k1xx_lpi2c_slave.h @@ -0,0 +1,90 @@ +/**************************************************************************** + * arch/arm/src/s32k1xx/s32k1xx_lpi2c_slave.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_S32K1XX_S32K1XX_LPI2C_SLAVE_H +#define __ARCH_ARM_SRC_S32K1XX_S32K1XX_LPI2C_SLAVE_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_i2cbus_slave_initialize + * + * Description: + * Initialize the I2C slave device and increase the reference counter. + * If the device has already been initialized only the reference counter + * will be increased. + * + * Input Parameters: + * port - Port number (for hardware that has multiple I2C interfaces). + * + * Returned Value: + * A valid I2C device structure reference on success; a NULL on failure. + * + ****************************************************************************/ + +FAR struct i2c_slave_s *s32k1xx_i2cbus_slave_initialize(int port); + +/**************************************************************************** + * Name: s32k1xx_i2cbus_slave_uninitialize + * + * Description: + * Decrease the reference counter of the I2C slave device. When there are + * no more references left the I2C slave device is unitialized. + * + * Input Parameters: + * dev - Device structure as returned by s32k1xx_i2cbus_slave_initialize(). + * + * Returned Value: + * OK on success, ERROR when there is an internal reference count mismatch + * or dev points to an invalid hardware device. + * + ****************************************************************************/ + +int s32k1xx_i2cbus_slave_uninitialize(FAR struct i2c_slave_s *dev); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_S32K1XX_S32K1XX_LPI2C_SLAVE_H */ diff --git a/arch/arm/src/s32k1xx/s32k1xx_lpspi.c b/arch/arm/src/s32k1xx/s32k1xx_lpspi.c index 2f9000461da..60ea04d78e7 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_lpspi.c +++ b/arch/arm/src/s32k1xx/s32k1xx_lpspi.c @@ -100,6 +100,25 @@ # error "Cannot enable both interrupt mode and DMA mode for SPI" #endif +/* Power management definitions */ + +#if defined(CONFIG_PM) && !defined(CONFIG_S32K1XX_PM_SPI_ACTIVITY) +# define CONFIG_S32K1XX_PM_SPI_ACTIVITY 10 +#endif + +#if defined(CONFIG_PM) +#ifndef PM_IDLE_DOMAIN +# define PM_IDLE_DOMAIN 0 /* Revisit */ +#endif +#endif + +#if defined(CONFIG_PM_SPI0_STANDBY) || defined(CONFIG_PM_SPI0_SLEEP) +# define CONFIG_PM_SPI0 +#endif +#if defined(CONFIG_PM_SPI1_STANDBY) || defined(CONFIG_PM_SPI1_SLEEP) +# define CONFIG_PM_SPI1 +#endif + /**************************************************************************** * Private Types ****************************************************************************/ @@ -177,6 +196,13 @@ static void s32k1xx_lpspi_recvblock(FAR struct spi_dev_s *dev, size_t nwords); #endif +#ifdef CONFIG_PM +static void up_pm_notify(struct pm_callback_s *cb, int dowmin, + enum pm_state_e pmstate); +static int up_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate); +#endif + /* Initialization */ static void @@ -324,6 +350,14 @@ static struct s32k1xx_lpspidev_s g_lpspi2dev = }; #endif +#ifdef CONFIG_PM +static struct pm_callback_s g_spi1_pmcb = +{ + .notify = up_pm_notify, + .prepare = up_pm_prepare, +}; +#endif + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -896,6 +930,8 @@ static int s32k1xx_lpspi_lock(FAR struct spi_dev_s *dev, bool lock) FAR struct s32k1xx_lpspidev_s *priv = (FAR struct s32k1xx_lpspidev_s *)dev; int ret; + /* It could be that this needs to be disabled for low level debugging */ + if (lock) { ret = nxsem_wait_uninterruptible(&priv->exclsem); @@ -1376,6 +1412,12 @@ static void s32k1xx_lpspi_exchange_nodma(FAR struct spi_dev_s *dev, spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords); +#if defined(CONFIG_PM) && CONFIG_S32K1XX_PM_SPI_ACTIVITY > 0 + /* Report serial activity to the power management logic */ + + pm_activity(PM_IDLE_DOMAIN, CONFIG_S32K1XX_PM_SPI_ACTIVITY); +#endif + /* bit mode? */ framesize = s32k1xx_lpspi_9to16bitmode(priv); @@ -1742,6 +1784,388 @@ static void s32k1xx_lpspi_bus_initialize(struct s32k1xx_lpspidev_s *priv) s32k1xx_lpspi_modifyreg32(priv, S32K1XX_LPSPI_CR_OFFSET, 0, LPSPI_CR_MEN); } +/**************************************************************************** + * Name: up_pm_notify + * + * Description: + * Notify the driver of new power state. This callback is called after + * all drivers have had the opportunity to prepare for the new power state. + * + * Input Parameters: + * + * cb - Returned to the driver. The driver version of the callback + * structure may include additional, driver-specific state data at + * the end of the structure. + * + * pmstate - Identifies the new PM state + * + * Returned Value: + * None - The driver already agreed to transition to the low power + * consumption state when when it returned OK to the prepare() call. + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static void up_pm_notify(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ +# ifdef CONFIG_PM_SPI0 + + FAR struct s32k1xx_lpspidev_s *priv0 = NULL; + + /* make the priv1ate struct for lpspi bus 0 */ + + priv0 = &g_lpspi0dev; + +# endif +# ifdef CONFIG_PM_SPI1 + + FAR struct s32k1xx_lpspidev_s *priv1 = NULL; + + /* make the priv1ate struct for lpspi bus 1 */ + + priv1 = &g_lpspi1dev; + +# endif + + unsigned int count = 0; /* the amount of peripheral clocks to change */ + + peripheral_clock_source_t clock_source; + + /* check if the transition is from the IDLE domain to the NORMAL domain */ + + /* or the mode is already done */ + + if (((pm_querystate(PM_IDLE_DOMAIN) == PM_IDLE) && + (pmstate == PM_NORMAL)) || + (((pm_querystate(PM_IDLE_DOMAIN) == pmstate)))) + { + /* return */ + + return; + } + + /* check which PM it is */ + + switch (pmstate) + { + /* in case it needs to change to the RUN mode */ + + case PM_NORMAL: + { + /* Logic for PM_NORMAL goes here */ + + /* set the right clock source to go back to RUN mode */ + + clock_source = CLK_SRC_SPLL_DIV2; + +# ifdef CONFIG_PM_SPI0 + + /* add 1 to count to do it for SPI0 */ + + count++; +# endif + +# ifdef CONFIG_PM_SPI1 + + /* add 1 to count to do it for SPI1 */ + + count++; +# endif + } + break; + + default: + { + /* don't do anything, just return OK */ + } + break; + } + + /* check if the LPSPI needs to change */ + + if (count) + { + /* make the peripheral clock config struct */ + + const struct peripheral_clock_config_s clock_config[] = + { +# ifdef CONFIG_PM_SPI0 + + { + .clkname = LPSPI0_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, +# endif +# ifdef CONFIG_PM_SPI1 + + { + .clkname = LPSPI1_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + } +# endif + }; + +# ifdef CONFIG_PM_SPI0 + + /* disable LPSP0 */ + + s32k1xx_lpspi_modifyreg32(priv0, S32K1XX_LPSPI_CR_OFFSET, 0, + !LPSPI_CR_MEN); + +# endif +# ifdef CONFIG_PM_SPI1 + + /* disable LPSPI */ + + s32k1xx_lpspi_modifyreg32(priv1, S32K1XX_LPSPI_CR_OFFSET, 0, + !LPSPI_CR_MEN); + +# endif + + /* change the clock config for the new mode */ + + s32k1xx_periphclocks(count, clock_config); + +# ifdef CONFIG_PM_SPI0 + + /* Enable LPSP0 */ + + s32k1xx_lpspi_modifyreg32(priv0, S32K1XX_LPSPI_CR_OFFSET, 0, + LPSPI_CR_MEN); + +# endif +# ifdef CONFIG_PM_SPI1 + + /* Enable LPSPI */ + + s32k1xx_lpspi_modifyreg32(priv1, S32K1XX_LPSPI_CR_OFFSET, 0, + LPSPI_CR_MEN); +# endif + + /* get the clock freq */ + } + + /* return */ + + return; +} +#endif + +/**************************************************************************** + * Name: up_pm_prepare + * + * Description: + * Request the driver to prepare for a new power state. This is a warning + * that the system is about to enter into a new power state. The driver + * should begin whatever operations that may be required to enter power + * state. The driver may abort the state change mode by returning a + * non-zero value from the callback function. + * + * Input Parameters: + * + * cb - Returned to the driver. The driver version of the callback + * structure may include additional, driver-specific state data at + * the end of the structure. + * + * pmstate - Identifies the new PM state + * + * Returned Value: + * Zero - (OK) means the event was successfully processed and that the + * driver is prepared for the PM state change. + * + * Non-zero - means that the driver is not prepared to perform the tasks + * needed achieve this power setting and will cause the state + * change to be aborted. NOTE: The prepare() method will also + * be called when reverting from lower back to higher power + * consumption modes (say because another driver refused a + * lower power state change). Drivers are not permitted to + * return non-zero values when reverting back to higher power + * consumption modes! + * + * + ****************************************************************************/ + +#ifdef CONFIG_PM +static int up_pm_prepare(struct pm_callback_s *cb, int domain, + enum pm_state_e pmstate) +{ + /* Logic to prepare for a reduced power state goes here. */ + +# ifdef CONFIG_PM_SPI0 + FAR struct s32k1xx_lpspidev_s *priv0 = NULL; + + /* make the private struct for lpspi bus 0 */ + + priv0 = &g_lpspi0dev; +# endif +# ifdef CONFIG_PM_SPI1 + FAR struct s32k1xx_lpspidev_s *priv1 = NULL; + + /* make the private struct for lpspi bus 1 */ + + priv1 = &g_lpspi1dev; +# endif + + unsigned int count = 0; /* the amount of peripheral clocks to change */ + + peripheral_clock_source_t clock_source; + + /* check if the transition to the mode is already done */ + + if (pm_querystate(PM_IDLE_DOMAIN) == pmstate) + { + /* return */ + + return OK; + } + + /* check which PM it is */ + + switch (pmstate) + { + /* in case it needs to prepare for VLPR mode */ + + case PM_STANDBY: + { + /* Logic for PM_STANDBY goes here */ + + /* set the right clock source */ + + clock_source = CLK_SRC_SIRC_DIV2; + +# ifdef CONFIG_PM_SPI0_STANDBY + + /* increase count to change the SPI0 */ + + count++; + +# endif +# ifdef CONFIG_PM_SPI1_STANDBY + + /* increase count to change the SPI1 */ + + count++; + +# endif + } + break; + + /* in case it needs to prepare for VLPR mode */ + + case PM_SLEEP: + { + /* Logic for PM_STANDBY goes here */ + + /* set the right clock source */ + + clock_source = CLK_SRC_SIRC_DIV2; + +# ifdef CONFIG_PM_SPI0_SLEEP + + /* increase count to change the SPI0 */ + + count++; + +# endif +# ifdef CONFIG_PM_SPI1_SLEEP + + /* increase count to change the SPI1 */ + + count++; + +# endif + } + break; + + default: + { + /* don't do anything, just return OK */ + } + break; + } + + /* check if you need to change something */ + + if (count) + { + /* make the peripheral clock config struct */ + + const struct peripheral_clock_config_s clock_config[] = + { +# ifdef CONFIG_PM_SPI0 + { + .clkname = LPSPI0_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }, +# endif +# ifdef CONFIG_PM_SPI1 + { + .clkname = LPSPI1_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + } +# endif + }; + +# ifdef CONFIG_PM_SPI0 + + /* disable LPSPI0 */ + + s32k1xx_lpspi_modifyreg32(priv0, S32K1XX_LPSPI_CR_OFFSET, 0, + !LPSPI_CR_MEN); + +# endif +# ifdef CONFIG_PM_SPI1 + + /* disable LPSPI1 */ + + s32k1xx_lpspi_modifyreg32(priv1, S32K1XX_LPSPI_CR_OFFSET, 0, + !LPSPI_CR_MEN); + +# endif + + /* change the clock config for the new mode */ + + s32k1xx_periphclocks(count, clock_config); + +# ifdef CONFIG_PM_SPI0 + + /* Enable LPSPI */ + + s32k1xx_lpspi_modifyreg32(priv0, S32K1XX_LPSPI_CR_OFFSET, 0, + LPSPI_CR_MEN); + +# endif +# ifdef CONFIG_PM_SPI1 + + /* Enable LPSPI */ + + s32k1xx_lpspi_modifyreg32(priv1, S32K1XX_LPSPI_CR_OFFSET, 0, + LPSPI_CR_MEN); + +# endif + } + + /* get the clock freq */ + + /* return OK */ + + return OK; +} +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -1794,6 +2218,17 @@ FAR struct spi_dev_s *s32k1xx_lpspibus_initialize(int bus) #ifdef CONFIG_S32K1XX_LPSPI1 if (bus == 1) { + #ifdef CONFIG_PM + #if defined(CONFIG_PM_SPI_STANDBY) || defined(CONFIG_PM_SPI_SLEEP) + int ret; + + /* Register to receive power management callbacks */ + + ret = pm_register(&g_spi1_pmcb); + DEBUGASSERT(ret == OK); + UNUSED(ret); + #endif + #endif /* Select SPI1 */ priv = &g_lpspi1dev; diff --git a/arch/arm/src/s32k1xx/s32k1xx_periphclocks.c b/arch/arm/src/s32k1xx/s32k1xx_periphclocks.c index c05b61896d2..c5c0d1581e5 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_periphclocks.c +++ b/arch/arm/src/s32k1xx/s32k1xx_periphclocks.c @@ -106,29 +106,6 @@ static uint32_t *s32k1xx_get_pclkctrl(enum clock_names_e clkname) return NULL; } -/**************************************************************************** - * Name: s32k1xx_pclk_disable - * - * Description: - * This function enables/disables the clock for a given peripheral. - * - * Input Parameters: - * clkname - The name of the peripheral clock to be disabled - * enable - true: Enable the peripheral clock. - * - * Returned Value: - * None - * - ****************************************************************************/ - -static void s32k1xx_pclk_disable(enum clock_names_e clkname) -{ - uint32_t *ctrlp = s32k1xx_get_pclkctrl(clkname); - DEBUGASSERT(ctrlp != NULL); - - *ctrlp &= ~PCC_CGC; -} - /**************************************************************************** * Name: s32k1xx_set_pclkctrl * @@ -279,7 +256,7 @@ void s32k1xx_periphclocks(unsigned int count, { /* Disable the peripheral clock */ - s32k1xx_pclk_disable(pclks->clkname); + s32k1xx_pclk_enable(pclks->clkname, false); /* Set peripheral clock control */ @@ -398,3 +375,39 @@ int s32k1xx_get_pclkfreq(enum clock_names_e clkname, uint32_t *frequency) return ret; } + +/**************************************************************************** + * Name: s32k1xx_pclk_enable + * + * Description: + * This function enables/disables the clock for a given peripheral. + * + * Input Parameters: + * clkname - The name of the peripheral clock to be disabled + * enable - true: Enable the peripheral clock. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void s32k1xx_pclk_enable(enum clock_names_e clkname, bool enable) +{ + uint32_t *ctrlp = s32k1xx_get_pclkctrl(clkname); + DEBUGASSERT(ctrlp != NULL); + + /* check if it needs to be enabled */ + + if (enable) + { + /* enable it */ + + *ctrlp |= PCC_CGC; + } + else + { + /* disable it */ + + *ctrlp &= ~PCC_CGC; + } +} diff --git a/arch/arm/src/s32k1xx/s32k1xx_periphclocks.h b/arch/arm/src/s32k1xx/s32k1xx_periphclocks.h index 028a99a6109..604414e161d 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_periphclocks.h +++ b/arch/arm/src/s32k1xx/s32k1xx_periphclocks.h @@ -267,6 +267,23 @@ void s32k1xx_periphclocks(unsigned int count, int s32k1xx_get_pclkfreq(enum clock_names_e clkname, uint32_t *frequency); +/**************************************************************************** + * Name: s32k1xx_pclk_enable + * + * Description: + * This function enables/disables the clock for a given peripheral. + * + * Input Parameters: + * clkname - The name of the peripheral clock to be disabled + * enable - true: Enable the peripheral clock. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void s32k1xx_pclk_enable(enum clock_names_e clkname, bool enable); + #undef EXTERN #if defined(__cplusplus) } diff --git a/arch/arm/src/s32k1xx/s32k1xx_pminitialize.c b/arch/arm/src/s32k1xx/s32k1xx_pminitialize.c new file mode 100644 index 00000000000..096d6bbc20a --- /dev/null +++ b/arch/arm/src/s32k1xx/s32k1xx_pminitialize.c @@ -0,0 +1,62 @@ +/**************************************************************************** + * arch/arm/src/s32k1xx/s32k1xx_pminitialize.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include "arm_internal.h" + +#ifdef CONFIG_PM + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_pminitialize + * + * Description: + * This function is called by MCU-specific logic at power-on reset in + * order to provide one-time initialization the power management subsystem. + * This function must be called *very* early in the initialization sequence + * *before* any other device drivers are initialized (since they may + * attempt to register with the power management subsystem). + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void arm_pminitialize(void) +{ + /* Then initialize the NuttX power management subsystem proper */ + + pm_initialize(); +} + +#endif /* CONFIG_PM */ diff --git a/arch/arm/src/s32k1xx/s32k1xx_resetcause.c b/arch/arm/src/s32k1xx/s32k1xx_resetcause.c new file mode 100644 index 00000000000..f29e5d9af1b --- /dev/null +++ b/arch/arm/src/s32k1xx/s32k1xx_resetcause.c @@ -0,0 +1,334 @@ +/**************************************************************************** + * arch/arm/src/s32k1xx/s32k1xx_resetcause.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "arm_arch.h" + +#include "hardware/s32k1xx_rcm.h" + +#include "s32k1xx_resetcause.h" + +#include "arm_internal.h" + +#include /* Include last: has dependencies */ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Determines the size of an intermediate buffer that must be large enough + * to handle the longest line generated by this logic. + */ +#define RESETCAUSE_LINELEN 6 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes one open "file" */ + +struct resetcause_file_s +{ + struct procfs_file_s base; /* Base open file structure */ + unsigned int linesize; /* Number of valid characters in line[] */ + char line[RESETCAUSE_LINELEN]; /* Pre-allocated buffer for formatted lines */ + unsigned int resetcause; /* Variable representing the MCU specific reset cause */ +}; + +static unsigned int g_reset_cause = 0; + +#if defined(CONFIG_RESET_CAUSE_PROC_FS) && defined(CONFIG_FS_PROCFS) + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* File system methods */ + +static int resetcause_open(FAR struct file *filep, + FAR const char *relpath, int oflags, mode_t mode); +static int resetcause_close(FAR struct file *filep); +static ssize_t resetcause_read(FAR struct file *filep, FAR char *buffer, + size_t buflen); + +static int resetcause_dup(FAR const struct file *oldp, + FAR struct file *newp); + +static int resetcause_stat(FAR const char *relpath, + FAR struct stat *buf); + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +const struct procfs_operations resetcause_operations = +{ + resetcause_open, /* open */ + resetcause_close, /* close */ + resetcause_read, /* read */ + NULL, /* write */ + + resetcause_dup, /* dup */ + + NULL, /* opendir */ + NULL, /* closedir */ + NULL, /* readdir */ + NULL, /* rewinddir */ + + resetcause_stat /* stat */ +}; + +static const struct procfs_entry_s g_resetcause_procfs = +{ + "resetcause", &resetcause_operations +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: resetcause_open + ****************************************************************************/ + +static int resetcause_open(FAR struct file *filep, FAR const char *relpath, + int oflags, mode_t mode) +{ + FAR struct resetcause_file_s *attr; + + finfo("Open '%s'\n", relpath); + + /* PROCFS is read-only. Any attempt to open with any kind of write + * access is not permitted. + * + * REVISIT: Write-able proc files could be quite useful. + */ + + if ((oflags & O_WRONLY) != 0 || (oflags & O_RDONLY) == 0) + { + ferr("ERROR: Only O_RDONLY supported\n"); + return -EACCES; + } + + /* "resetcause" is the only acceptable value for the relpath */ + + if (strcmp(relpath, "resetcause") != 0) + { + ferr("ERROR: relpath is '%s'\n", relpath); + return -ENOENT; + } + + /* Allocate a container to hold the file attributes */ + + attr = kmm_zalloc(sizeof(struct resetcause_file_s)); + if (!attr) + { + ferr("ERROR: Failed to allocate file attributes\n"); + return -ENOMEM; + } + + /* Save the attributes as the open-specific state in filep->f_priv */ + + filep->f_priv = (FAR void *)attr; + return OK; +} + +/**************************************************************************** + * Name: resetcause_close + ****************************************************************************/ + +static int resetcause_close(FAR struct file *filep) +{ + FAR struct resetcause_file_s *attr; + + /* Recover our private data from the struct file instance */ + + attr = (FAR struct resetcause_file_s *)filep->f_priv; + DEBUGASSERT(attr); + + /* Release the file attributes structure */ + + kmm_free(attr); + filep->f_priv = NULL; + return OK; +} + +/**************************************************************************** + * Name: resetcause_read + ****************************************************************************/ + +static ssize_t resetcause_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + FAR struct resetcause_file_s *attr; + size_t linesize; + off_t offset; + ssize_t ret; + + finfo("buffer=%p buflen=%d\n", buffer, (int)buflen); + + /* Recover our private data from the struct file instance */ + + attr = (FAR struct resetcause_file_s *)filep->f_priv; + DEBUGASSERT(attr); + + /* Get the resetcause value and store it */ + + attr->resetcause = g_reset_cause; + + /* Convert the resetcause to a string */ + + linesize = snprintf(attr->line, RESETCAUSE_LINELEN, + "0x%x", attr->resetcause); + + /* Save the linesize in case we are re-entered with f_pos > 0 */ + + attr->linesize = linesize; + + /* Transfer the system reset cause to user receive buffer */ + + offset = filep->f_pos; + + ret = procfs_memcpy(attr->line, attr->linesize, buffer, buflen, &offset); + + return ret; +} + +/**************************************************************************** + * Name: resetcause_dup + * + * Description: + * Duplicate open file data in the new file structure. + * + ****************************************************************************/ + +static int resetcause_dup(FAR const struct file *oldp, FAR struct file *newp) +{ + FAR struct resetcause_file_s *oldattr; + FAR struct resetcause_file_s *newattr; + + finfo("Dup %p->%p\n", oldp, newp); + + /* Recover our private data from the old struct file instance */ + + oldattr = (FAR struct resetcause_file_s *)oldp->f_priv; + DEBUGASSERT(oldattr); + + /* Allocate a new container to hold the task and attribute selection */ + + newattr = kmm_malloc(sizeof(struct resetcause_file_s)); + if (!newattr) + { + ferr("ERROR: Failed to allocate file attributes\n"); + return -ENOMEM; + } + + /* The copy the file attributes from the old attributes to the new */ + + memcpy(newattr, oldattr, sizeof(struct resetcause_file_s)); + + /* Save the new attributes in the new file structure */ + + newp->f_priv = (FAR void *)newattr; + return OK; +} + +/**************************************************************************** + * Name: resetcause_stat + * + * Description: Return information about a file or directory + * + ****************************************************************************/ + +static int resetcause_stat(FAR const char *relpath, FAR struct stat *buf) +{ + /* "resetcause" is the only acceptable value for the relpath */ + + if (strcmp(relpath, "resetcause") != 0) + { + ferr("ERROR: relpath is '%s'\n", relpath); + return -ENOENT; + } + + /* "resetcause" is the name for a read-only file */ + + memset(buf, 0, sizeof(struct stat)); + buf->st_mode = S_IFREG | S_IROTH | S_IRGRP | S_IRUSR; + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_resetcause_init + * + * Description: This function initializes the resetcause + * It will get the resetcause and store it + * + ****************************************************************************/ + +void s32k1xx_resetcause_init(void) +{ + uint32_t reset_cause_register = 0; + + /* get the reset cause */ + + reset_cause_register = getreg32(S32K1XX_RCM_SRS); + + /* save it in the global variable */ + + g_reset_cause = (unsigned int) reset_cause_register; +} + +/**************************************************************************** + * Name: s32k1xx_resetcause_initialize_procfs + * + * Description: This function registrates the reset cause as a proc fs + * Returns 0 if OK, error number otherwise + * + ****************************************************************************/ + +int s32k1xx_resetcause_initialize_procfs(void) +{ + return procfs_register(&g_resetcause_procfs); +} + +#endif /* CONFIG_RESET_CAUSE_PROC_FS && CONFIG_FS_PROCFS */ diff --git a/arch/arm/src/armv8-m/arm_switchcontext.S b/arch/arm/src/s32k1xx/s32k1xx_resetcause.h similarity index 62% rename from arch/arm/src/armv8-m/arm_switchcontext.S rename to arch/arm/src/s32k1xx/s32k1xx_resetcause.h index ae812f9a48e..8e20e25a9a3 100644 --- a/arch/arm/src/armv8-m/arm_switchcontext.S +++ b/arch/arm/src/s32k1xx/s32k1xx_resetcause.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/armv8-m/arm_switchcontext.S + * arch/arm/src/s32k1xx/s32k1xx_resetcause.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,64 +18,46 @@ * ****************************************************************************/ +#ifndef __ARCH_ARM_SRC_S32K1XX_RESETCAUSE_H +#define __ARCH_ARM_SRC_S32K1XX_RESETCAUSE_H + /**************************************************************************** * Included Files ****************************************************************************/ #include -#include +#include -#include "nvic.h" -#include "svcall.h" +#include +#include +#include /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** - * Public Symbols - ****************************************************************************/ - - .syntax unified - .thumb - .file "arm_switchcontext.S" - -/**************************************************************************** - * Macros + * Public Function Prototypes ****************************************************************************/ /**************************************************************************** - * Public Functions + * Name: s32k1xx_resetcause_init + * + * Description: This function initializes the resetcause + * It will get the resetcause and store it + * ****************************************************************************/ +void s32k1xx_resetcause_init(void); + /**************************************************************************** - * Name: arm_switchcontext + * Name: s32k1xx_resetcause_initialize_procfs * - * Description: - * Save the current thread context and restore the specified context. - * Full prototype is: - * - * void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); - * - * Returned Value: - * None + * Description: This function registrates the reset cause as a proc fs + * Returns 0 if OK, error number otherwise * ****************************************************************************/ - .thumb_func - .globl arm_switchcontext - .type arm_switchcontext, function -arm_switchcontext: +int s32k1xx_resetcause_initialize_procfs(void); - /* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */ - - mov r2, r1 /* R2: restoreregs */ - mov r1, r0 /* R1: saveregs */ - mov r0, #SYS_switch_context /* R0: context switch */ - svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */ - - /* We will get here only after the rerturn from the context switch */ - - bx lr - .size arm_switchcontext, .-arm_switchcontext - .end +#endif /* __ARCH_ARM_SRC_S32K1XX_RESETCAUSE_H */ diff --git a/arch/arm/src/s32k1xx/s32k1xx_serial.c b/arch/arm/src/s32k1xx/s32k1xx_serial.c index 6f8c37933aa..63724a611d5 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_serial.c +++ b/arch/arm/src/s32k1xx/s32k1xx_serial.c @@ -57,6 +57,8 @@ #include "s32k1xx_pin.h" #include "s32k1xx_lowputc.h" +#include "s32k1xx_periphclocks.h" + #ifdef USE_SERIALDRIVER /**************************************************************************** @@ -132,9 +134,20 @@ #endif #if defined(CONFIG_PM) +#ifndef PM_IDLE_DOMAIN # define PM_IDLE_DOMAIN 0 /* Revisit */ #endif +#endif +#if defined(CONFIG_PM_SERIAL0_STANDBY) || defined(CONFIG_PM_SERIAL0_SLEEP) +# define CONFIG_PM_SERIAL0 +#endif +#if defined(CONFIG_PM_SERIAL1_STANDBY) || defined(CONFIG_PM_SERIAL1_SLEEP) +# define CONFIG_PM_SERIAL1 +#endif +#if defined(CONFIG_PM_SERIAL2_STANDBY) || defined(CONFIG_PM_SERIAL2_SLEEP) +# define CONFIG_PM_SERIAL2 +#endif /**************************************************************************** * Private Types ****************************************************************************/ @@ -508,8 +521,14 @@ static int s32k1xx_setup(struct uart_dev_s *dev) config.invrts = priv->inviflow; /* Inversion of outbound flow control */ #endif + /* configure the LPUART */ + ret = s32k1xx_lpuart_configure(priv->uartbase, &config); + /* get the current interrupt bits and place them in ie */ + + /* (used to use the interrupts) */ + priv->ie = s32k1xx_serialin(priv, S32K1XX_LPUART_CTRL_OFFSET) & \ LPUART_ALL_INTS; return ret; @@ -536,7 +555,13 @@ static void s32k1xx_shutdown(struct uart_dev_s *dev) /* Disable the UART */ + /* set the reset bit */ + s32k1xx_serialout(priv, S32K1XX_LPUART_GLOBAL_OFFSET, LPUART_GLOBAL_RST); + + /* clear the reset bit again */ + + s32k1xx_serialout(priv, S32K1XX_LPUART_GLOBAL_OFFSET, 0); } /**************************************************************************** @@ -1114,38 +1139,205 @@ static bool s32k1xx_txempty(struct uart_dev_s *dev) static void up_pm_notify(struct pm_callback_s *cb, int domain, enum pm_state_e pmstate) { - switch (pmstate) + unsigned int count = 0; /* the amount of peripheral clocks to change */ + + peripheral_clock_source_t clock_source; + + #ifdef CONFIG_PM_SERIAL0 + struct s32k1xx_uart_s *priv0 = g_uart0port.priv; + #endif + #ifdef CONFIG_PM_SERIAL1 + struct s32k1xx_uart_s *priv1 = g_uart1port.priv; + #endif + #ifdef CONFIG_PM_SERIAL2 + struct s32k1xx_uart_s *priv2 = g_uart2port.priv; + #endif + + uint32_t ret_reg = 0; + + /* check if the transition is from the IDLE domain to the NORMAL domain */ + + /* or the mode is already done */ + + if (((pm_querystate(PM_IDLE_DOMAIN) == PM_IDLE) && + (pmstate == PM_NORMAL)) || + (((pm_querystate(PM_IDLE_DOMAIN) == pmstate)))) { - case(PM_NORMAL): - { - /* Logic for PM_NORMAL goes here */ - } - break; + /* return */ - case(PM_IDLE): - { - /* Logic for PM_IDLE goes here */ - } - break; - - case(PM_STANDBY): - { - /* Logic for PM_STANDBY goes here */ - } - break; - - case(PM_SLEEP): - { - /* Logic for PM_SLEEP goes here */ - } - break; - - default: - - /* Should not get here */ - - break; + return; } + + /* check which PM it is */ + + switch (pmstate) + { + /* in case it needs to change to the RUN mode */ + + case PM_NORMAL: + { + /* Logic for PM_NORMAL goes here */ + + /* set the right clock source to go back to RUN mode */ + + clock_source = CLK_SRC_SPLL_DIV2; + + count = 1; + } + break; + default: + { + /* don't do anything, just return OK */ + } + break; + } + + /* check if something needs to change */ + + if (count) + { + #ifdef CONFIG_PM_SERIAL0 + + /* make the peripheral clock config struct */ + + const struct peripheral_clock_config_s clock_config0 = + { + .clkname = LPUART0_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }; + + /* read the FIFO register */ + + ret_reg = getreg32(priv0->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* make the value */ + + ret_reg |= (LPUART_FIFO_RXFLUSH + LPUART_FIFO_TXFLUSH); + + /* write the new value */ + + putreg32(ret_reg, priv0->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart0port); + + /* change the clock config for the new mode */ + + s32k1xx_periphclocks(count, &clock_config0); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart0port); + + /* set up the LPUART1 again for the new mode */ + + s32k1xx_setup(&g_uart0port); + + /* enable the interrupts */ + + s32k1xx_rxint(&g_uart0port, true); + s32k1xx_txint(&g_uart0port, true); + + #endif + #ifdef CONFIG_PM_SERIAL1 + + /* make the peripheral clock config struct */ + + const struct peripheral_clock_config_s clock_config1 = + { + .clkname = LPUART1_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }; + + /* read the FIFO register */ + + ret_reg = getreg32(priv1->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* make the value */ + + ret_reg |= (LPUART_FIFO_RXFLUSH + LPUART_FIFO_TXFLUSH); + + /* write the new value */ + + putreg32(ret_reg, priv1->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart1port); + + /* change the clock config for the new mode */ + + s32k1xx_periphclocks(count, &clock_config1); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart1port); + + /* set up the LPUART1 again for the new mode */ + + s32k1xx_setup(&g_uart1port); + + /* enable the interrupts */ + + s32k1xx_rxint(&g_uart1port, true); + s32k1xx_txint(&g_uart1port, true); + + #endif + #ifdef CONFIG_PM_SERIAL2 + + /* make the peripheral clock config struct */ + + const struct peripheral_clock_config_s clock_config2 = + { + .clkname = LPUART2_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }; + + /* read the FIFO register */ + + ret_reg = getreg32(priv2->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* make the value */ + + ret_reg |= (LPUART_FIFO_RXFLUSH + LPUART_FIFO_TXFLUSH); + + /* write the new value */ + + putreg32(ret_reg, priv2->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart2port); + + /* change the clock config for the new mode */ + + s32k1xx_periphclocks(count, &clock_config2); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart2port); + + /* set up the LPUART1 again for the new mode */ + + s32k1xx_setup(&g_uart2port); + + /* enable the interrupts */ + + s32k1xx_rxint(&g_uart2port, true); + s32k1xx_txint(&g_uart2port, true); + + #endif + } } #endif @@ -1189,6 +1381,209 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain, { /* Logic to prepare for a reduced power state goes here. */ + unsigned int count = 1; /* the amount of peripheral clocks to change */ + + peripheral_clock_source_t clock_source; + + #ifdef CONFIG_PM_SERIAL0 + struct s32k1xx_uart_s *priv0 = (struct s32k1xx_uart_s *)g_uart0port.priv; + #endif + #ifdef CONFIG_PM_SERIAL1 + struct s32k1xx_uart_s *priv1 = (struct s32k1xx_uart_s *)g_uart1port.priv; + #endif + #ifdef CONFIG_PM_SERIAL2 + struct s32k1xx_uart_s *priv2 = (struct s32k1xx_uart_s *)g_uart2port.priv; + #endif + + uint32_t ret_reg = 0; + + /* check if the transition to the mode is already done */ + + if (pm_querystate(PM_IDLE_DOMAIN) == pmstate) + { + /* return */ + + return OK; + } + + /* check which PM it is */ + + switch (pmstate) + { + /* in case it needs to prepare for VLPR mode */ + + case PM_STANDBY: + { + /* Logic for PM_STANDBY goes here */ + + /* set the right clock source */ + + clock_source = CLK_SRC_SIRC_DIV2; + } + break; + + /* in case it needs to prepare for sleep mode */ + + case PM_SLEEP: + { + /* Logic for PM_SLEEP goes here */ + + /* set the right clock source */ + + clock_source = CLK_SRC_SIRC_DIV2; + } + break; + default: + { + /* don't do anything, just return OK */ + + return OK; + } + break; + } + + #ifdef CONFIG_PM_SERIAL0 + + /* make the peripheral clock config struct */ + + const struct peripheral_clock_config_s clock_config0 = + { + .clkname = LPUART0_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }; + + /* read the FIFO register */ + + ret_reg = getreg32(priv0->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* make the value */ + + ret_reg |= (LPUART_FIFO_RXFLUSH + LPUART_FIFO_TXFLUSH); + + /* write the new value */ + + putreg32(ret_reg, priv0->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart0port); + + /* change the clock config for the new mode */ + + s32k1xx_periphclocks(count, &clock_config0); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart0port); + + /* set up the LPUART1 again for the new mode */ + + s32k1xx_setup(&g_uart0port); + + /* enable the interrupts */ + + s32k1xx_rxint(&g_uart0port, true); + s32k1xx_txint(&g_uart0port, true); + + #endif + #ifdef CONFIG_PM_SERIAL1 + + /* make the peripheral clock config struct */ + + const struct peripheral_clock_config_s clock_config1 = + { + .clkname = LPUART1_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }; + + /* read the FIFO register */ + + ret_reg = getreg32(priv1->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* make the value */ + + ret_reg |= (LPUART_FIFO_RXFLUSH + LPUART_FIFO_TXFLUSH); + + /* write the new value */ + + putreg32(ret_reg, priv1->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart1port); + + /* change the clock config for the new mode */ + + s32k1xx_periphclocks(count, &clock_config1); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart1port); + + /* set up the LPUART1 again for the new mode */ + + s32k1xx_setup(&g_uart1port); + + /* enable the interrupts */ + + s32k1xx_rxint(&g_uart1port, true); + s32k1xx_txint(&g_uart1port, true); + + #endif + #ifdef CONFIG_PM_SERIAL2 + + /* make the peripheral clock config struct */ + + const struct peripheral_clock_config_s clock_config2 = + { + .clkname = LPUART2_CLK, + .clkgate = true, + .clksrc = clock_source, + .frac = MULTIPLY_BY_ONE, + .divider = 1, + }; + + /* read the FIFO register */ + + ret_reg = getreg32(priv2->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* make the value */ + + ret_reg |= (LPUART_FIFO_RXFLUSH + LPUART_FIFO_TXFLUSH); + + /* write the new value */ + + putreg32(ret_reg, priv2->uartbase + S32K1XX_LPUART_FIFO_OFFSET); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart2port); + + /* change the clock config for the new mode */ + + s32k1xx_periphclocks(count, &clock_config2); + + /* shutdown the LPUART1 (soft reset) */ + + s32k1xx_shutdown(&g_uart2port); + + /* set up the LPUART1 again for the new mode */ + + s32k1xx_setup(&g_uart2port); + + /* enable the interrupts */ + + s32k1xx_rxint(&g_uart2port, true); + s32k1xx_txint(&g_uart2port, true); + + #endif + return OK; } #endif @@ -1236,6 +1631,8 @@ void s32k1xx_earlyserialinit(void) void arm_serialinit(void) { #ifdef CONFIG_PM + #if defined(CONFIG_PM_SERIAL_STANDBY) || defined(CONFIG_PM_SERIAL_SLEEP) + int ret; /* Register to receive power management callbacks */ @@ -1243,6 +1640,7 @@ void arm_serialinit(void) ret = pm_register(&g_serial_pmcb); DEBUGASSERT(ret == OK); UNUSED(ret); + #endif #endif #ifdef CONSOLE_DEV diff --git a/arch/arm/src/sam34/Make.defs b/arch/arm/src/sam34/Make.defs index 8f321eee4fc..55c8012a30c 100644 --- a/arch/arm/src/sam34/Make.defs +++ b/arch/arm/src/sam34/Make.defs @@ -22,7 +22,7 @@ # Common ARM and Cortex-M3 files -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -32,7 +32,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c -CMN_CSRCS += arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c ifneq ($(CONFIG_SMP),y) ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) diff --git a/arch/arm/src/sam34/sam4cm_cpustart.c b/arch/arm/src/sam34/sam4cm_cpustart.c index a653dfc13c9..81d23360895 100644 --- a/arch/arm/src/sam34/sam4cm_cpustart.c +++ b/arch/arm/src/sam34/sam4cm_cpustart.c @@ -130,14 +130,14 @@ static void cpu1_boot(void) * Name: up_cpu_start * * Description: - * In an SMP configution, only one CPU is initially active (CPU 0). System - * initialization occurs on that single thread. At the completion of the - * initialization of the OS, just before beginning normal multitasking, + * In an SMP configuration, only one CPU is initially active (CPU 0). + * System initialization occurs on that single thread. At the completion of + * the initialization of the OS, just before beginning normal multitasking, * the additional CPUs would be started by calling this function. * - * Each CPU is provided the entry point to is IDLE task when started. A + * Each CPU is provided the entry point to its IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or + * CPU's g_assignedtasks[cpu] list. No stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each @@ -145,8 +145,8 @@ static void cpu1_boot(void) * * Input Parameters: * cpu - The index of the CPU being started. This will be a numeric - * value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU - * 0 is already active) + * value in the range of one to (CONFIG_SMP_NCPUS-1). + * (CPU 0 is already active) * * Returned Value: * Zero on success; a negated errno value on failure. diff --git a/arch/arm/src/sam34/sam_emac.c b/arch/arm/src/sam34/sam_emac.c index 0a3eab015b2..85a3737a6d6 100644 --- a/arch/arm/src/sam34/sam_emac.c +++ b/arch/arm/src/sam34/sam_emac.c @@ -303,12 +303,12 @@ static uint8_t g_pktbuf[MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE]; /* TX descriptors list */ static struct emac_txdesc_s g_txdesc[CONFIG_SAM34_EMAC_NTXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* RX descriptors list */ static struct emac_rxdesc_s g_rxdesc[CONFIG_SAM34_EMAC_NRXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* Transmit Buffers * @@ -317,13 +317,13 @@ static struct emac_rxdesc_s g_rxdesc[CONFIG_SAM34_EMAC_NRXBUFFERS] * lsb bits of the address shall be set to 0 */ -static uint8_t g_txbuffer[CONFIG_SAM34_EMAC_NTXBUFFERS * EMAC_TX_UNITSIZE]; - __attribute__((aligned(8))) +static uint8_t g_txbuffer[CONFIG_SAM34_EMAC_NTXBUFFERS * EMAC_TX_UNITSIZE] + aligned_data(8); /* Receive Buffers */ static uint8_t g_rxbuffer[CONFIG_SAM34_EMAC_NRXBUFFERS * EMAC_RX_UNITSIZE] - __attribute__((aligned(8))); + aligned_data(8); #endif diff --git a/arch/arm/src/sam34/sam_start.c b/arch/arm/src/sam34/sam_start.c index 1dd739b9179..9486b0cb1d5 100644 --- a/arch/arm/src/sam34/sam_start.c +++ b/arch/arm/src/sam34/sam_start.c @@ -79,7 +79,7 @@ static inline void sam_fpuconfig(void); #ifdef CONFIG_ARMV7M_STACKCHECK /* We need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/sama5/hardware/sam_sdmmc.h b/arch/arm/src/sama5/hardware/sam_sdmmc.h index ceec0139b28..18a6f8b6849 100644 --- a/arch/arm/src/sama5/hardware/sam_sdmmc.h +++ b/arch/arm/src/sama5/hardware/sam_sdmmc.h @@ -49,8 +49,8 @@ #define SAMA5_SDMMC_PRSSTAT_OFFSET 0x0024 /* Present State Register */ #define SAMA5_SDMMC_PROCTL_OFFSET 0x0028 /* Protocol Control Register */ #define SAMA5_SDMMC_PWRCTL_OFFSET 0x0029 /* Power Control Control Register */ -#define SAMA5_SDMMC_SYSCTL_OFFSET 0x002c /* System Control Register, or Clock Control Register/Timout Control Register */ -#define SAMA5_SDMMC_TCR_OFFSET 0x002e /* Timout Control Register (8 bit) */ +#define SAMA5_SDMMC_SYSCTL_OFFSET 0x002c /* System Control Register, or Clock Control Register/Timeout Control Register */ +#define SAMA5_SDMMC_TCR_OFFSET 0x002e /* Timeout Control Register (8 bit) */ #define SAMA5_SDMMC_SRR_OFFSET 0x002f /* Software Reset Register (8 bit) */ #define SAMA5_SDMMC_IRQSTAT_OFFSET 0x0030 /* Interrupt Status Register */ #define SAMA5_SDMMC_IRQSTATEN_OFFSET 0x0034 /* Interrupt Status Enable Register */ diff --git a/arch/arm/src/sama5/sam_adc.c b/arch/arm/src/sama5/sam_adc.c index c49cc7be3e9..4012db65c7c 100644 --- a/arch/arm/src/sama5/sam_adc.c +++ b/arch/arm/src/sama5/sam_adc.c @@ -1258,10 +1258,20 @@ static int sam_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg) break; #endif + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = SAMA5_NCHANNELS; + } + break; + /* Unsupported or invalid command */ default: - ret = -ENOTTY; + { + ret = -ENOTTY; + } break; } diff --git a/arch/arm/src/sama5/sam_ehci.c b/arch/arm/src/sama5/sam_ehci.c index f2f19cb7a45..d7541854b21 100644 --- a/arch/arm/src/sama5/sam_ehci.c +++ b/arch/arm/src/sama5/sam_ehci.c @@ -454,17 +454,17 @@ static const uint8_t g_ehci_speed[4] = /* The head of the asynchronous queue */ -static struct sam_qh_s g_asynchead __attribute__ ((aligned(32))); +static struct sam_qh_s g_asynchead aligned_data(32); #ifndef CONFIG_USBHOST_INT_DISABLE /* The head of the periodic queue */ -static struct sam_qh_s g_intrhead __attribute__ ((aligned(32))); +static struct sam_qh_s g_intrhead aligned_data(32); /* The frame list */ #ifdef CONFIG_SAMA5_EHCI_PREALLOCATE -static uint32_t g_framelist[FRAME_LIST_SIZE] __attribute__ ((aligned(4096))); +static uint32_t g_framelist[FRAME_LIST_SIZE] aligned_data(4096); #else static uint32_t *g_framelist; #endif @@ -478,12 +478,12 @@ static uint32_t *g_framelist; /* Queue Head (QH) pool */ static struct sam_qh_s g_qhpool[CONFIG_SAMA5_EHCI_NQHS] - __attribute__ ((aligned(32))); + aligned_data(32); /* Queue Element Transfer Descriptor (qTD) pool */ static struct sam_qtd_s g_qtdpool[CONFIG_SAMA5_EHCI_NQTDS] - __attribute__ ((aligned(32))); + aligned_data(32); #else /* Pools of dynamically data structures. These will all be linked into the diff --git a/arch/arm/src/sama5/sam_emaca.c b/arch/arm/src/sama5/sam_emaca.c index b1da50a685a..4f27ab797dc 100644 --- a/arch/arm/src/sama5/sam_emaca.c +++ b/arch/arm/src/sama5/sam_emaca.c @@ -334,12 +334,12 @@ static uint8_t g_pktbuf[MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE]; /* TX descriptors list */ static struct emac_txdesc_s g_txdesc[CONFIG_SAMA5_EMAC_NTXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* RX descriptors list */ static struct emac_rxdesc_s g_rxdesc[CONFIG_SAMA5_EMAC_NRXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* Transmit Buffers * @@ -348,13 +348,13 @@ static struct emac_rxdesc_s g_rxdesc[CONFIG_SAMA5_EMAC_NRXBUFFERS] * lsb bits of the address shall be set to 0 */ -static uint8_t g_txbuffer[CONFIG_SAMA5_EMAC_NTXBUFFERS * EMAC_TX_UNITSIZE]; - __attribute__((aligned(8))) +static uint8_t g_txbuffer[CONFIG_SAMA5_EMAC_NTXBUFFERS * EMAC_TX_UNITSIZE] + aligned_data(8); /* Receive Buffers */ static uint8_t g_rxbuffer[CONFIG_SAMA5_EMAC_NRXBUFFERS * EMAC_RX_UNITSIZE] - __attribute__((aligned(8))); + aligned_data(8); #endif diff --git a/arch/arm/src/sama5/sam_emacb.c b/arch/arm/src/sama5/sam_emacb.c index 0ac2d0a2881..c68c496f2e3 100644 --- a/arch/arm/src/sama5/sam_emacb.c +++ b/arch/arm/src/sama5/sam_emacb.c @@ -546,12 +546,12 @@ static int sam_emac_configure(struct sam_emac_s *priv); /* EMAC0 TX descriptors list */ static struct emac_txdesc_s g_emac0_txdesc[CONFIG_SAMA5_EMAC0_NTXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* EMAC0 RX descriptors list */ static struct emac_rxdesc_s g_emac0_rxdesc[CONFIG_SAMA5_EMAC0_NRXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* EMAC0 Transmit Buffers * @@ -562,13 +562,13 @@ static struct emac_rxdesc_s g_emac0_rxdesc[CONFIG_SAMA5_EMAC0_NRXBUFFERS] static uint8_t g_emac0_txbuffer[CONFIG_SAMA5_EMAC0_NTXBUFFERS * EMAC_TX_UNITSIZE] -__attribute__((aligned(8))); +aligned_data(8); /* EMAC0 Receive Buffers */ static uint8_t g_emac0_rxbuffer[CONFIG_SAMA5_EMAC0_NRXBUFFERS * EMAC_RX_UNITSIZE] -__attribute__((aligned(8))); +aligned_data(8); #endif @@ -576,12 +576,12 @@ __attribute__((aligned(8))); /* EMAC1 TX descriptors list */ static struct emac_txdesc_s g_emac1_txdesc[CONFIG_SAMA5_EMAC1_NTXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* EMAC1 RX descriptors list */ static struct emac_rxdesc_s g_emac1_rxdesc[CONFIG_SAMA5_EMAC1_NRXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* EMAC1 Transmit Buffers * @@ -592,13 +592,13 @@ static struct emac_rxdesc_s g_emac1_rxdesc[CONFIG_SAMA5_EMAC1_NRXBUFFERS] static uint8_t g_emac1_txbuffer[CONFIG_SAMA5_EMAC1_NTXBUFFERS * EMAC_TX_UNITSIZE] -__attribute__((aligned(8))); +aligned_data(8); /* EMAC1 Receive Buffers */ static uint8_t g_emac1_rxbuffer[CONFIG_SAMA5_EMAC1_NRXBUFFERS * EMAC_RX_UNITSIZE] -__attribute__((aligned(8))); +aligned_data(8); #endif #endif diff --git a/arch/arm/src/sama5/sam_gmac.c b/arch/arm/src/sama5/sam_gmac.c index 42808812677..67be33f0c74 100644 --- a/arch/arm/src/sama5/sam_gmac.c +++ b/arch/arm/src/sama5/sam_gmac.c @@ -260,12 +260,12 @@ static uint8_t g_pktbuf[MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE]; /* TX descriptors list */ static struct gmac_txdesc_s g_txdesc[CONFIG_SAMA5_GMAC_NTXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* RX descriptors list */ static struct gmac_rxdesc_s g_rxdesc[CONFIG_SAMA5_GMAC_NRXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* Transmit Buffers * @@ -275,12 +275,12 @@ static struct gmac_rxdesc_s g_rxdesc[CONFIG_SAMA5_GMAC_NRXBUFFERS] */ static uint8_t g_txbuffer[CONFIG_SAMA5_GMAC_NTXBUFFERS * GMAC_TX_UNITSIZE] - __attribute__((aligned(8))); + aligned_data(8); /* Receive Buffers */ static uint8_t g_rxbuffer[CONFIG_SAMA5_GMAC_NRXBUFFERS * GMAC_RX_UNITSIZE] - __attribute__((aligned(8))); + aligned_data(8); #endif /**************************************************************************** @@ -725,7 +725,7 @@ static int sam_transmit(struct sam_gmac_s *priv) up_clean_dcache((uint32_t)txdesc, (uint32_t)txdesc + sizeof(struct gmac_txdesc_s)); - /* Setup/Copy data to transmition buffer */ + /* Setup/Copy data to transmission buffer */ if (dev->d_len > 0) { diff --git a/arch/arm/src/sama5/sam_ohci.c b/arch/arm/src/sama5/sam_ohci.c index 791e608758e..a5102735bc4 100644 --- a/arch/arm/src/sama5/sam_ohci.c +++ b/arch/arm/src/sama5/sam_ohci.c @@ -487,7 +487,7 @@ static struct sam_list_s *g_tbfree; /* List of unused transfer buffers */ /* This must be aligned to a 256-byte boundary */ static struct ohci_hcca_s g_hcca - __attribute__ ((aligned (256))); + aligned_data(256); /* Pools of free descriptors and buffers. These will all be linked * into the free lists declared above. These must be aligned to 8-byte @@ -495,11 +495,11 @@ static struct ohci_hcca_s g_hcca */ static struct sam_ed_s g_edalloc[SAMA5_OHCI_NEDS] - __attribute__ ((aligned (SAMA5_DMA_ALIGN))); + aligned_data(SAMA5_DMA_ALIGN); static struct sam_gtd_s g_tdalloc[SAMA5_OHCI_NTDS] - __attribute__ ((aligned (SAMA5_DMA_ALIGN))); + aligned_data(SAMA5_DMA_ALIGN); static uint8_t g_bufalloc[SAM_BUFALLOC] - __attribute__ ((aligned (SAMA5_DMA_ALIGN))); + aligned_data(SAMA5_DMA_ALIGN); /**************************************************************************** * Private Functions diff --git a/arch/arm/src/sama5/sam_udphs.c b/arch/arm/src/sama5/sam_udphs.c index 0cb544e8672..22d14639da6 100644 --- a/arch/arm/src/sama5/sam_udphs.c +++ b/arch/arm/src/sama5/sam_udphs.c @@ -563,7 +563,7 @@ static const struct usb_epdesc_s g_ep0desc = /* This is a properly aligned pool of preallocated DMA transfer descriptors */ static struct sam_dtd_s g_dtdpool[CONFIG_SAMA5_UDPHS_NDTDS] - __attribute__ ((aligned(16))); + aligned_data(16); #endif #endif diff --git a/arch/arm/src/samd2l2/Make.defs b/arch/arm/src/samd2l2/Make.defs index 9e30a0eb0ad..0d5558f0a2a 100644 --- a/arch/arm/src/samd2l2/Make.defs +++ b/arch/arm/src/samd2l2/Make.defs @@ -19,7 +19,7 @@ ############################################################################ CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S -CMN_ASRCS += arm_switchcontext.S vfork.S +CMN_ASRCS += vfork.S CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c @@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c +CMN_CSRCS += arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_BUILD_PROTECTED),y) CMN_CSRCS += arm_task_start.c arm_pthread_start.c diff --git a/arch/arm/src/samd2l2/sam_adc.c b/arch/arm/src/samd2l2/sam_adc.c index e7fea862c4c..1243a04ec55 100644 --- a/arch/arm/src/samd2l2/sam_adc.c +++ b/arch/arm/src/samd2l2/sam_adc.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -387,35 +388,51 @@ static int sam_adc_ioctl(FAR struct adc_dev_s *dev, struct sam_adc_param_s *params = (struct sam_adc_param_s *)arg; switch (cmd) - { - case SAMD_ADC_IOCTL_START: - sam_adc_setup(dev); - sam_adc_rxint(dev, true); - break; - - case SAMD_ADC_IOCTL_STOP: - sam_adc_rxint(dev, false); - sam_adc_shutdown(dev); - break; - - case SAMD_ADC_IOCTL_SET_PARAMS: - if ((getreg8(SAM_ADC_CTRLA) & ADC_CTRLA_ENABLE) != 0) + { + case SAMD_ADC_IOCTL_START: { - ret = -EBUSY; + sam_adc_setup(dev); + sam_adc_rxint(dev, true); break; } - priv->averaging = params->averaging; - priv->prescaler = params->prescaler; - priv->samplen = params->samplen; - break; + case SAMD_ADC_IOCTL_STOP: + { + sam_adc_rxint(dev, false); + sam_adc_shutdown(dev); + break; + } - case SAMD_ADC_IOCTL_GET_PARAMS: - params->averaging = priv->averaging; - params->prescaler = priv->prescaler; - params->samplen = priv->samplen; - break; - } + case SAMD_ADC_IOCTL_SET_PARAMS: + { + if ((getreg8(SAM_ADC_CTRLA) & ADC_CTRLA_ENABLE) != 0) + { + ret = -EBUSY; + break; + } + + priv->averaging = params->averaging; + priv->prescaler = params->prescaler; + priv->samplen = params->samplen; + break; + } + + case SAMD_ADC_IOCTL_GET_PARAMS: + { + params->averaging = priv->averaging; + params->prescaler = priv->prescaler; + params->samplen = priv->samplen; + break; + } + + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->num_channels; + } + break; + } return ret; } diff --git a/arch/arm/src/samd2l2/sam_dmac.c b/arch/arm/src/samd2l2/sam_dmac.c index 6569135f57b..1fec09bf255 100644 --- a/arch/arm/src/samd2l2/sam_dmac.c +++ b/arch/arm/src/samd2l2/sam_dmac.c @@ -143,9 +143,9 @@ static struct sam_dmach_s g_dmach[SAMD2L2_NDMACHAN]; */ static struct dma_desc_s g_base_desc[SAMD2L2_NDMACHAN] - __attribute__ ((section(".lpram"), aligned(16))); + locate_data(".lpram"), aligned(16); static struct dma_desc_s g_writeback_desc[SAMD2L2_NDMACHAN] - __attribute__ ((section(".lpram"), aligned(16))); + locate_data(".lpram"), aligned(16); #if CONFIG_SAMD2L2_DMAC_NDESC > 0 /* Additional DMA descriptors for (optional) multi-block transfer support. @@ -153,7 +153,7 @@ static struct dma_desc_s g_writeback_desc[SAMD2L2_NDMACHAN] */ static struct dma_desc_s g_dma_desc[CONFIG_SAMD2L2_DMAC_NDESC] - __attribute__ ((section(".lpram"), aligned(16))); + locate_data(".lpram"), aligned(16); #endif /**************************************************************************** diff --git a/arch/arm/src/samd2l2/sam_usb.c b/arch/arm/src/samd2l2/sam_usb.c index d7802b82c70..a1ce8dab511 100644 --- a/arch/arm/src/samd2l2/sam_usb.c +++ b/arch/arm/src/samd2l2/sam_usb.c @@ -1,40 +1,20 @@ /**************************************************************************** * arch/arm/src/samd2l2/sam_usb.c * - * Copyright (C) 2015 Filament - www.filament.com - * Copyright (C) 2015 Offcode Ltd. All rights reserved. - * Author: Janne Rosberg + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * This driver is derived from the SAM34 UDP driver: - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/samd2l2/sam_usb.h b/arch/arm/src/samd2l2/sam_usb.h index 9b45144170b..c6e791643db 100644 --- a/arch/arm/src/samd2l2/sam_usb.h +++ b/arch/arm/src/samd2l2/sam_usb.h @@ -1,40 +1,20 @@ /**************************************************************************** * arch/arm/src/samd2l2/sam_usb.h * - * Copyright (C) 2015 Filament - www.filament.com - * Copyright (C) 2015 Offcode Ltd. All rights reserved. - * Author: Janne Rosberg + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * This driver is derived from the SAM34 UDP driver: - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/samd5e5/Make.defs b/arch/arm/src/samd5e5/Make.defs index 70371810f39..f55e157dfff 100644 --- a/arch/arm/src/samd5e5/Make.defs +++ b/arch/arm/src/samd5e5/Make.defs @@ -22,7 +22,7 @@ # Common ARM and Cortex-M4 files -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c @@ -32,7 +32,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_trigger_irq.c CMN_CSRCS += arm_unblocktask.c arm_udelay.c arm_usestack.c arm_doirq.c -CMN_CSRCS += arm_hardfault.c arm_vfork.c +CMN_CSRCS += arm_hardfault.c arm_vfork.c arm_switchcontext.c arm_puts.c # Configuration-dependent common files diff --git a/arch/arm/src/samd5e5/sam_dmac.c b/arch/arm/src/samd5e5/sam_dmac.c index 8f156a3de74..63d6f57da87 100644 --- a/arch/arm/src/samd5e5/sam_dmac.c +++ b/arch/arm/src/samd5e5/sam_dmac.c @@ -142,9 +142,9 @@ static struct sam_dmach_s g_dmach[SAMD5E5_NDMACHAN]; */ static struct dma_desc_s g_base_desc[SAMD5E5_NDMACHAN] - __attribute__ ((section(".lpram"), aligned(16))); + locate_data(".lpram"), aligned(16); static struct dma_desc_s g_writeback_desc[SAMD5E5_NDMACHAN] - __attribute__ ((section(".lpram"), aligned(16))); + locate_data(".lpram"), aligned(16); #if CONFIG_SAMD5E5_DMAC_NDESC > 0 /* Additional DMA descriptors for (optional) multi-block transfer support. @@ -152,7 +152,7 @@ static struct dma_desc_s g_writeback_desc[SAMD5E5_NDMACHAN] */ static struct dma_desc_s g_dma_desc[CONFIG_SAMD5E5_DMAC_NDESC] - __attribute__ ((section(".lpram"), aligned(16))); + locate_data(".lpram"), aligned(16); #endif /**************************************************************************** diff --git a/arch/arm/src/samd5e5/sam_gmac.c b/arch/arm/src/samd5e5/sam_gmac.c index b9231674001..4e4c0a0a456 100644 --- a/arch/arm/src/samd5e5/sam_gmac.c +++ b/arch/arm/src/samd5e5/sam_gmac.c @@ -257,12 +257,12 @@ static uint8_t g_pktbuf[MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE]; /* TX descriptors list */ static struct gmac_txdesc_s g_txdesc[CONFIG_SAMD5E5_GMAC_NTXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* RX descriptors list */ static struct gmac_rxdesc_s g_rxdesc[CONFIG_SAMD5E5_GMAC_NRXBUFFERS] - __attribute__((aligned(8))); + aligned_data(8); /* Transmit Buffers * @@ -272,12 +272,12 @@ static struct gmac_rxdesc_s g_rxdesc[CONFIG_SAMD5E5_GMAC_NRXBUFFERS] */ static uint8_t g_txbuffer[CONFIG_SAMD5E5_GMAC_NTXBUFFERS * GMAC_TX_UNITSIZE] - __attribute__((aligned(8))); + aligned_data(8); /* Receive Buffers */ static uint8_t g_rxbuffer[CONFIG_SAMD5E5_GMAC_NRXBUFFERS * GMAC_RX_UNITSIZE] - __attribute__((aligned(8))); + aligned_data(8); #endif /**************************************************************************** diff --git a/arch/arm/src/samd5e5/sam_start.c b/arch/arm/src/samd5e5/sam_start.c index 499935513f0..e81a11dc4c1 100644 --- a/arch/arm/src/samd5e5/sam_start.c +++ b/arch/arm/src/samd5e5/sam_start.c @@ -81,7 +81,7 @@ static inline void sam_fpu_configure(void); #ifdef CONFIG_ARMV7M_STACKCHECK /* We need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/samd5e5/sam_usb.c b/arch/arm/src/samd5e5/sam_usb.c index b74579b3a1c..2736304bbc8 100644 --- a/arch/arm/src/samd5e5/sam_usb.c +++ b/arch/arm/src/samd5e5/sam_usb.c @@ -1,43 +1,20 @@ /**************************************************************************** * arch/arm/src/samd5e5/sam_usb.c * - * Copyright (C) 2015 Filament - www.filament.com - * Copyright (C) 2015 Offcode Ltd. All rights reserved. - * Author: Janne Rosberg + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt (SAMD5E5 port) + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright 2020 Falker Automacao Agricola LTDA. - * Author: Leomar Mateus Radke - * Author: Ricardo Wartchow - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -393,11 +370,11 @@ struct sam_usbdev_s /* The endpoint list */ - __attribute__((__aligned__(4))) struct sam_ep_s eplist[SAM_USB_NENDPOINTS]; + aligned_data(4) struct sam_ep_s eplist[SAM_USB_NENDPOINTS]; /* Endpoint descriptors 2 banks for each endpoint */ - __attribute__((__aligned__(4))) + aligned_data(4) struct usbdev_epdesc_s ep_descriptors[SAM_USB_NENDPOINTS * SAM_USB_NBANKS()]; @@ -409,7 +386,7 @@ struct sam_usbdev_s * used and the class driver provides the buffering. */ - __attribute__((__aligned__(4))) uint8_t ep0out[SAM_EP0_MAXPACKET]; + aligned_data(4) uint8_t ep0out[SAM_EP0_MAXPACKET]; }; #endif @@ -699,19 +676,19 @@ struct sam_usbhost_s /* The pipe list */ - __attribute__((__aligned__(4))) + aligned_data(4) struct sam_pipe_s pipelist[SAM_USB_NENDPOINTS]; /* Pipe descriptors 2 banks for each pipe */ - __attribute__((__aligned__(4))) + aligned_data(4) struct usbhost_pipedesc_s pipe_descriptors[SAM_USB_NENDPOINTS * SAM_USB_NBANKS()]; /* CTRL */ usbhost_ep_t ep0; /* Root hub port EP0 description */ - __attribute__((__aligned__(4))) uint8_t ctrl_buffer[64]; + aligned_data(4) uint8_t ctrl_buffer[64]; }; #endif diff --git a/arch/arm/src/samd5e5/sam_usb.h b/arch/arm/src/samd5e5/sam_usb.h index b9bb1f42a64..fa7eb14e5bd 100644 --- a/arch/arm/src/samd5e5/sam_usb.h +++ b/arch/arm/src/samd5e5/sam_usb.h @@ -1,39 +1,20 @@ /**************************************************************************** * arch/arm/src/samd5e5/sam_usb.h * - * Copyright (C) 2015 Filament - www.filament.com - * Copyright (C) 2015 Offcode Ltd. All rights reserved. - * Author: Janne Rosberg + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt (port to SAMD5E5) + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/samd5e5/sam_wdt.c b/arch/arm/src/samd5e5/sam_wdt.c index 86e2e69bffc..46d5d0cf66c 100644 --- a/arch/arm/src/samd5e5/sam_wdt.c +++ b/arch/arm/src/samd5e5/sam_wdt.c @@ -416,7 +416,7 @@ static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, putreg8(timeout_period, SAM_WDT_CONFIG); priv->reload = timeout_period; - wdinfo("fwdt=%d reload=%d timout=%d\n", + wdinfo("fwdt=%d reload=%d timeout=%d\n", WDT_FCLK, timeout_period, priv->timeout); leave_critical_section(flags); diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs index 7be09383c91..c41cef14031 100644 --- a/arch/arm/src/samv7/Make.defs +++ b/arch/arm/src/samv7/Make.defs @@ -23,7 +23,7 @@ # Common ARM and Cortex-M7 files -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -33,7 +33,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c -CMN_CSRCS += arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c # Configuration-dependent common files diff --git a/arch/arm/src/samv7/sam_emac.c b/arch/arm/src/samv7/sam_emac.c index a70bf042069..38522235a47 100644 --- a/arch/arm/src/samv7/sam_emac.c +++ b/arch/arm/src/samv7/sam_emac.c @@ -665,26 +665,26 @@ static int sam_emac_configure(struct sam_emac_s *priv); /* EMAC0 TX descriptors list */ static struct emac_txdesc_s g_emac0_tx0desc[CONFIG_SAMV7_EMAC0_NTXBUFFERS] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); #if EMAC0_TX_DPADSIZE > 0 static uint8_t g_emac0_txdpad[EMAC0_TX_DPADSIZE] __atrribute__((used)); #endif static struct emac_txdesc_s g_emac0_tx1desc[DUMMY_NBUFFERS] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); /* EMAC0 RX descriptors list */ static struct emac_rxdesc_s g_emac0_rx0desc[CONFIG_SAMV7_EMAC0_NRXBUFFERS] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); #if EMAC0_RX_DPADSIZE > 0 static uint8_t g_emac0_rxdpad[EMAC0_RX_DPADSIZE] __atrribute__((used)); #endif static struct emac_rxdesc_s g_emac0_rx1desc[DUMMY_NBUFFERS] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); /* EMAC0 Transmit Buffers * @@ -694,15 +694,15 @@ static struct emac_rxdesc_s g_emac0_rx1desc[DUMMY_NBUFFERS] */ static uint8_t g_emac0_tx0buffer[EMAC0_TX_BUFSIZE] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); static uint8_t g_emac0_tx1buffer[DUMMY_NBUFFERS * DUMMY_BUFSIZE] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); /* EMAC0 Receive Buffers */ static uint8_t g_emac0_rx0buffer[EMAC0_RX_BUFSIZE] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); #endif @@ -710,26 +710,26 @@ static uint8_t g_emac0_rx0buffer[EMAC0_RX_BUFSIZE] /* EMAC1 TX descriptors list */ static struct emac_txdesc_s g_emac1_tx1desc[CONFIG_SAMV7_EMAC1_NTXBUFFERS] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); #if EMAC1_TX_DPADSIZE > 0 static uint8_t g_emac1_txdpad[EMAC1_TX_DPADSIZE] __atrribute__((used)); #endif static struct emac_txdesc_s g_emac1_tx1desc[DUMMY_NBUFFERS] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); /* EMAC1 RX descriptors list */ static struct emac_rxdesc_s g_emac1_rx1desc[CONFIG_SAMV7_EMAC1_NRXBUFFERS] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); #if EMAC1_RX_DPADSIZE > 0 static uint8_t g_emac1_rxdpad[EMAC1_RX_DPADSIZE] __atrribute__((used)); #endif static struct emac_rxdesc_s g_emac1_rx1desc[DUMMY_NBUFFERS] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); /* EMAC1 Transmit Buffers * @@ -739,18 +739,18 @@ static struct emac_rxdesc_s g_emac1_rx1desc[DUMMY_NBUFFERS] */ static uint8_t g_emac1_tx1buffer[EMAC1_TX_BUFSIZE] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); static uint8_t g_emac1_tx1buffer[DUMMY_NBUFFERS * DUMMY_BUFSIZE] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); /* EMAC1 Receive Buffers */ static uint8_t g_emac1_rxbuffer[EMAC1_RX_BUFSIZE] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); static uint8_t g_emac1_rx1buffer[DUMMY_NBUFFERS * DUMMY_BUFSIZE] - __attribute__((aligned(EMAC_ALIGN))); + aligned_data(EMAC_ALIGN); #endif #endif diff --git a/arch/arm/src/samv7/sam_mcan.c b/arch/arm/src/samv7/sam_mcan.c index ae455c65201..ead4a511c81 100644 --- a/arch/arm/src/samv7/sam_mcan.c +++ b/arch/arm/src/samv7/sam_mcan.c @@ -991,7 +991,7 @@ static const struct can_ops_s g_mcanops = static uint32_t g_mcan0_msgram[MCAN0_MSGRAM_WORDS] #ifdef CONFIG_ARMV7M_DCACHE - __attribute__((aligned(MCAN_ALIGN))); + aligned_data(MCAN_ALIGN); #else ; #endif @@ -1071,7 +1071,7 @@ static struct can_dev_s g_mcan0dev; static uint32_t g_mcan1_msgram[MCAN1_MSGRAM_WORDS] #ifdef CONFIG_ARMV7M_DCACHE - __attribute__((aligned(MCAN_ALIGN))); + aligned_data(MCAN_ALIGN); #else ; #endif diff --git a/arch/arm/src/samv7/sam_start.c b/arch/arm/src/samv7/sam_start.c index a256ac539c5..fae64399b5e 100644 --- a/arch/arm/src/samv7/sam_start.c +++ b/arch/arm/src/samv7/sam_start.c @@ -94,7 +94,7 @@ static inline void sam_fpuconfig(void); #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c index 70367a8b621..6ce48aa690f 100644 --- a/arch/arm/src/samv7/sam_usbdevhs.c +++ b/arch/arm/src/samv7/sam_usbdevhs.c @@ -632,7 +632,7 @@ static const struct usb_epdesc_s g_ep0desc = /* This is a properly aligned pool of preallocated DMA transfer descriptors */ static struct sam_dtd_s g_dtdpool[CONFIG_SAMV7_USBDEVHS_NDTDS] - __attribute__ ((aligned(16))); + aligned_data(16); #endif #endif diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 64da99a6411..fb022b2e851 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -1300,6 +1300,7 @@ config STM32_STM32L15XX select STM32_HAVE_IP_DBGMCU_V2 select STM32_HAVE_IP_TIMERS_V1 select STM32_HAVE_IP_ADC_V1 + select STM32_HAVE_IP_DAC_V1 select STM32_HAVE_IP_DMA_V1 select STM32_HAVE_IP_I2C_V1 @@ -1320,6 +1321,7 @@ config STM32_STM32F10XX select STM32_HAVE_IP_DBGMCU_V1 select STM32_HAVE_IP_TIMERS_V1 select STM32_HAVE_IP_ADC_V1_BASIC + select STM32_HAVE_IP_DAC_V1 select STM32_HAVE_IP_DMA_V1 select STM32_HAVE_IP_I2C_V1 @@ -1472,6 +1474,7 @@ config STM32_STM32F20XX select STM32_HAVE_IP_DBGMCU_V2 select STM32_HAVE_IP_TIMERS_V1 select STM32_HAVE_IP_ADC_V1 + select STM32_HAVE_IP_DAC_V1 select STM32_HAVE_IP_DMA_V2 select STM32_HAVE_IP_I2C_V1 @@ -1503,6 +1506,7 @@ config STM32_STM32F30XX select STM32_HAVE_IP_DBGMCU_V2 select STM32_HAVE_IP_TIMERS_V2 select STM32_HAVE_IP_ADC_V2 + select STM32_HAVE_IP_DAC_V1 select STM32_HAVE_IP_DMA_V1 select STM32_HAVE_IP_I2C_V2 @@ -1554,6 +1558,7 @@ config STM32_STM32F33XX select STM32_HAVE_IP_TIMERS_V2 select STM32_HAVE_IP_ADC_V2 select STM32_HAVE_IP_COMP_V1 + select STM32_HAVE_IP_DAC_V1 select STM32_HAVE_IP_DMA_V1 select STM32_HAVE_IP_I2C_V2 @@ -1584,6 +1589,7 @@ config STM32_STM32F37XX select STM32_HAVE_USART3 select STM32_HAVE_IP_TIMERS_V1 select STM32_HAVE_IP_ADC_V1_BASIC + select STM32_HAVE_IP_DAC_V1 select STM32_HAVE_IP_DMA_V1 select STM32_HAVE_IP_I2C_V2 @@ -1601,6 +1607,7 @@ config STM32_STM32F4XXX select STM32_HAVE_IP_DBGMCU_V2 select STM32_HAVE_IP_TIMERS_V1 select STM32_HAVE_IP_ADC_V1 + select STM32_HAVE_IP_DAC_V1 select STM32_HAVE_IP_DMA_V2 select STM32_HAVE_IP_I2C_V1 @@ -1934,6 +1941,7 @@ config STM32_STM32G4XXX select STM32_HAVE_IP_DBGMCU_V3 select STM32_HAVE_IP_ADC_V2 select STM32_HAVE_IP_COMP_V2 + select STM32_HAVE_IP_DAC_V2 select STM32_HAVE_IP_DMA_V1 select STM32_HAVE_IP_I2C_V2 select STM32_HAVE_IP_TIMERS_V3 @@ -1992,7 +2000,7 @@ config STM32_STM32G43XX select STM32_HAVE_CORDIC select STM32_HAVE_CRS select STM32_HAVE_DAC1 - select STM32_HAVE_DAC2 + select STM32_HAVE_DAC3 select STM32_HAVE_FMAC select STM32_HAVE_FDCAN1 select STM32_HAVE_I2C2 @@ -2626,6 +2634,14 @@ config STM32_HAVE_IP_COMP_V2 bool default n +config STM32_HAVE_IP_DAC_V1 + bool + default n + +config STM32_HAVE_IP_DAC_V2 + bool + default n + # These are the peripheral selections proper config STM32_ADC1 @@ -2736,6 +2752,7 @@ config STM32_CORDIC bool "CORDIC Accelerator" default n depends on STM32_HAVE_CORDIC + select MATH_CORDIC_USE_Q31 config STM32_BKP bool "BKP" @@ -2849,12 +2866,36 @@ config STM32_DAC3 depends on STM32_HAVE_DAC3 select STM32_DAC +if STM32_DAC3 + +config STM32_DAC3CH1 + bool "DAC3CH1 Internal" + default n + +config STM32_DAC3CH2 + bool "DAC3CH2 Internal" + default n + +endif #STM32_DAC3 + config STM32_DAC4 bool "DAC4" default n depends on STM32_HAVE_DAC4 select STM32_DAC +if STM32_DAC4 + +config STM32_DAC4CH1 + bool "DAC4CH1 Internal" + default n + +config STM32_DAC4CH2 + bool "DAC4CH2 Internal" + default n + +endif #STM32_DAC4 + config STM32_DCMI bool "DCMI" default n @@ -8226,9 +8267,9 @@ config STM32_ADC_MAX_SAMPLES The maximum number of samples which can be handled without overrun depends on various factors. This is the user's responsibility to correctly select this value. - Since the interfece to update the sampling time is available + Since the interface to update the sampling time is available for all supported devices, the user can change the default - vaules in the board initialization logic and avoid ADC overrun. + values in the board initialization logic and avoid ADC overrun. config STM32_ADC_NO_STARTUP_CONV bool "Do not start conversion when opening ADC device" @@ -8940,7 +8981,24 @@ config STM32_SDADC3_DMA endmenu menu "DAC Configuration" - depends on STM32_DAC1 || STM32_DAC2 + depends on STM32_DAC1 || STM32_DAC2 || STM32_DAC3 || STM32_DAC4 + +config STM32_DAC1CH1_MODE + int "DAC1CH1 channel mode" + depends on STM32_DAC1CH1 && STM32_HAVE_IP_DAC_V2 + default 0 + range 0 7 + ---help--- + – DAC channel in Normal mode + 0: DAC channel is connected to external pin with Buffer enabled + 1: DAC channel is connected to external pin and to on chip peripherals with buffer enabled + 2: DAC channel2 is connected to external pin with buffer disabled + 3: DAC channel is connected to on chip peripherals with Buffer disabled + - DAC channel in Sample and hold mode + 4: DAC channel is connected to external pin with Buffer enabled + 5: DAC channel is connected to external pin and to on chip peripherals with Buffer enabled + 6: DAC channel is connected to external pin and to on chip peripherals with Buffer disabled + 7: DAC channel is connected to on chip peripherals with Buffer disabled config STM32_DAC1CH1_DMA bool "DAC1CH1 DMA" @@ -8986,6 +9044,23 @@ config STM32_DAC1CH1_TIMER_FREQUENCY endif +config STM32_DAC1CH2_MODE + int "DAC1CH2 channel mode" + depends on STM32_DAC1CH2 && STM32_HAVE_IP_DAC_V2 + default 0 + range 0 7 + ---help--- + – DAC channel in Normal mode + 0: DAC channel is connected to external pin with Buffer enabled + 1: DAC channel is connected to external pin and to on chip peripherals with buffer enabled + 2: DAC channel2 is connected to external pin with buffer disabled + 3: DAC channel is connected to on chip peripherals with Buffer disabled + - DAC channel in Sample and hold mode + 4: DAC channel is connected to external pin with Buffer enabled + 5: DAC channel is connected to external pin and to on chip peripherals with Buffer enabled + 6: DAC channel is connected to external pin and to on chip peripherals with Buffer disabled + 7: DAC channel is connected to on chip peripherals with Buffer disabled + config STM32_DAC1CH2_DMA bool "DAC1CH2 DMA" depends on STM32_DAC1CH2 @@ -9030,6 +9105,23 @@ config STM32_DAC1CH2_TIMER_FREQUENCY endif +config STM32_DAC2CH1_MODE + int "DAC2CH1 channel mode" + depends on STM32_DAC2CH1 && STM32_HAVE_IP_DAC_V2 + default 0 + range 0 7 + ---help--- + – DAC channel in Normal mode + 0: DAC channel is connected to external pin with Buffer enabled + 1: DAC channel is connected to external pin and to on chip peripherals with buffer enabled + 2: DAC channel2 is connected to external pin with buffer disabled + 3: DAC channel is connected to on chip peripherals with Buffer disabled + - DAC channel in Sample and hold mode + 4: DAC channel is connected to external pin with Buffer enabled + 5: DAC channel is connected to external pin and to on chip peripherals with Buffer enabled + 6: DAC channel is connected to external pin and to on chip peripherals with Buffer disabled + 7: DAC channel is connected to on chip peripherals with Buffer disabled + config STM32_DAC2CH1_DMA bool "DAC2CH1 DMA" depends on STM32_DAC2CH1 @@ -9071,6 +9163,122 @@ config STM32_DAC2CH1_TIMER_FREQUENCY endif +config STM32_DAC3CH1_MODE + int "DAC3CH1 channel mode" + depends on STM32_DAC3CH1 && STM32_HAVE_IP_DAC_V2 + default 0 + range 0 7 + ---help--- + – DAC channel in Normal mode + 0: DAC channel is connected to external pin with Buffer enabled + 1: DAC channel is connected to external pin and to on chip peripherals with buffer enabled + 2: DAC channel is connected to external pin with buffer disabled + 3: DAC channel is connected to on chip peripherals with Buffer disabled + - DAC channel in Sample and hold mode + 4: DAC channel is connected to external pin with Buffer enabled + 5: DAC channel is connected to external pin and to on chip peripherals with Buffer enabled + 6: DAC channel is connected to external pin and to on chip peripherals with Buffer disabled + 7: DAC channel is connected to on chip peripherals with Buffer disabled + +config STM32_DAC3CH1_DMA + bool "DAC3CH1 DMA" + depends on STM32_DAC3CH1 + default n + ---help--- + If DMA is selected, then a timer and output frequency must also be + provided to support the DMA transfer. The DMA transfer could be + supported by an EXTI trigger, but this feature is not currently + supported by the driver. + +if STM32_DAC3CH1_DMA + +config STM32_DAC3CH1_DMA_BUFFER_SIZE + int "DAC3CH1 DMA buffer size" + default 256 + +config STM32_DAC3CH1_DMA_EXTERNAL + bool "DAC3CH1 DMA External Trigger" + default n + +if STM32_HRTIM_DAC + +config STM32_DAC3CH1_HRTIM_TRG3 + bool "DAC3CH1 HRTIM Trigger 3" + default n + +endif # STM32_HRTIM_DAC + +config STM32_DAC3CH1_TIMER + int "DAC3CH1 timer" + depends on !STM32_DAC3CH1_DMA_EXTERNAL + default 0 + range 2 8 + +config STM32_DAC3CH1_TIMER_FREQUENCY + int "DAC3CH1 timer frequency" + depends on !STM32_DAC3CH1_DMA_EXTERNAL + default 0 + +endif + +config STM32_DAC3CH2_MODE + int "DAC3CH2 channel mode" + depends on STM32_DAC3CH2 && STM32_HAVE_IP_DAC_V2 + default 0 + range 0 7 + ---help--- + – DAC channel in Normal mode + 0: DAC channel is connected to external pin with Buffer enabled + 1: DAC channel is connected to external pin and to on chip peripherals with buffer enabled + 2: DAC channel2 is connected to external pin with buffer disabled + 3: DAC channel is connected to on chip peripherals with Buffer disabled + - DAC channel in Sample and hold mode + 4: DAC channel is connected to external pin with Buffer enabled + 5: DAC channel is connected to external pin and to on chip peripherals with Buffer enabled + 6: DAC channel is connected to external pin and to on chip peripherals with Buffer disabled + 7: DAC channel is connected to on chip peripherals with Buffer disabled + +config STM32_DAC3CH2_DMA + bool "DAC3CH2 DMA" + depends on STM32_DAC3CH2 + default n + ---help--- + If DMA is selected, then a timer and output frequency must also be + provided to support the DMA transfer. The DMA transfer could be + supported by an EXTI trigger, but this feature is not currently + supported by the driver. + +if STM32_DAC3CH2_DMA + +config STM32_DAC3CH2_DMA_BUFFER_SIZE + int "DAC3CH2 DMA buffer size" + default 256 + +config STM32_DAC3CH2_DMA_EXTERNAL + bool "DAC3CH1 DMA External Trigger" + default n + +if STM32_HRTIM_DAC + +config STM32_DAC3CH2_HRTIM_TRG3 + bool "DAC3CH2 HRTIM Trigger 3" + default n + +endif # STM32_HRTIM_DAC + +config STM32_DAC3CH2_TIMER + int "DAC3CH2 timer" + depends on !STM32_DAC3CH2_DMA_EXTERNAL + default 0 + range 2 8 + +config STM32_DAC3CH2_TIMER_FREQUENCY + int "DAC3CH2 timer frequency" + depends on !STM32_DAC3CH2_DMA_EXTERNAL + default 0 + +endif + endmenu config STM32_USART @@ -9688,7 +9896,7 @@ endif # STM32_UART7_HCIUART choice prompt "UART8 Driver Configuration" default STM32_UART8_SERIALDRIVER - depends on STM32_UART7 + depends on STM32_UART8 config STM32_UART8_SERIALDRIVER bool "Standard serial driver" @@ -10145,7 +10353,7 @@ config STM32_I2CTIMEOTICKS depends on STM32_I2C && !STM32_I2C_DYNTIMEO config STM32_I2C_DUTY16_9 - bool "Frequency with Tlow/Thigh = 16/9 " + bool "Frequency with Tlow/Thigh = 16/9" default n depends on STM32_I2C @@ -10954,6 +11162,10 @@ menu "STM32 QEncoder Driver" depends on SENSORS_QENCODER depends on STM32_TIM1 || STM32_TIM2 || STM32_TIM3 || STM32_TIM4 || STM32_TIM5 || STM32_TIM8 +config STM32_QENCODER_DISABLE_EXTEND16BTIMERS + bool "Disable QEncoder timers extension from 16-bit to 32-bit" + default n + config STM32_TIM1_QE bool "TIM1 QE" default n @@ -11242,7 +11454,7 @@ config STM32_FOC_HAS_PWM_COMPLEMENTARY ---help--- Enable complementary outputs for the FOC PWM (sometimes called 6-PWM mode) -# hiden variables and automatic configuration +# hidden variables and automatic configuration config STM32_FOC_USE_TIM1 bool diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs index c013fd08da0..72830c924e6 100644 --- a/arch/arm/src/stm32/Make.defs +++ b/arch/arm/src/stm32/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -28,7 +28,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c CMN_CSRCS += arm_trigger_irq.c arm_unblocktask.c arm_udelay.c arm_usestack.c -CMN_CSRCS += arm_doirq.c arm_vfork.c +CMN_CSRCS += arm_doirq.c arm_vfork.c arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_STM32_TICKLESS_SYSTICK),y) CMN_CSRCS += arm_systick.c @@ -232,6 +232,10 @@ ifeq ($(CONFIG_SENSORS_QENCODER),y) CHIP_CSRCS += stm32_qencoder.c endif +ifeq ($(CONFIG_SENSORS_HALL3PHASE),y) +CHIP_CSRCS += stm32_hall3ph.c +endif + ifeq ($(CONFIG_STM32_CAN),y) CHIP_CSRCS += stm32_can.c endif @@ -267,3 +271,7 @@ endif ifeq ($(CONFIG_STM32_FOC),y) CHIP_CSRCS += stm32_foc.c endif + +ifeq ($(CONFIG_STM32_CORDIC),y) +CHIP_CSRCS += stm32_cordic.c +endif diff --git a/arch/arm/src/stm32/hardware/stm32_dac.h b/arch/arm/src/stm32/hardware/stm32_dac.h index 78044d347ba..d01c615bd2b 100644 --- a/arch/arm/src/stm32/hardware/stm32_dac.h +++ b/arch/arm/src/stm32/hardware/stm32_dac.h @@ -26,281 +26,29 @@ ****************************************************************************/ #include + #include "chip.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Register Offsets *********************************************************/ - -#define STM32_DAC_CR_OFFSET 0x0000 /* DAC control register */ -#define STM32_DAC_SWTRIGR_OFFSET 0x0004 /* DAC software trigger register */ -#define STM32_DAC_DHR12R1_OFFSET 0x0008 /* DAC channel 1 12-bit right-aligned data holding register */ -#define STM32_DAC_DHR12L1_OFFSET 0x000c /* DAC channel 1 12-bit left aligned data holding register */ -#define STM32_DAC_DHR8R1_OFFSET 0x0010 /* DAC channel 1 8-bit right aligned data holding register */ -#define STM32_DAC_DHR12R2_OFFSET 0x0014 /* DAC channel 2 12-bit right aligned data holding register */ -#define STM32_DAC_DHR12L2_OFFSET 0x0018 /* DAC channel 2 12-bit left aligned data holding register */ -#define STM32_DAC_DHR8R2_OFFSET 0x001c /* DAC channel 2 8-bit right-aligned data holding register */ -#define STM32_DAC_DHR12RD_OFFSET 0x0020 /* Dual DAC 12-bit right-aligned data holding register */ -#define STM32_DAC_DHR12LD_OFFSET 0x0024 /* DUAL DAC 12-bit left aligned data holding register */ -#define STM32_DAC_DHR8RD_OFFSET 0x0028 /* DUAL DAC 8-bit right aligned data holding register */ -#define STM32_DAC_DOR1_OFFSET 0x002c /* DAC channel 1 data output register */ -#define STM32_DAC_DOR2_OFFSET 0x0030 /* DAC channel 2 data output register */ -#define STM32_DAC_SR_OFFSET 0x0034 /* DAC status register */ - -/* Register Addresses *******************************************************/ - -#if STM32_NDAC > 0 -/* DAC1 */ - -# define STM32_DAC1_CR (STM32_DAC1_BASE + STM32_DAC_CR_OFFSET) -# define STM32_DAC1_SWTRIGR (STM32_DAC1_BASE + STM32_DAC_SWTRIGR_OFFSET) -# define STM32_DAC1_DHR12R1 (STM32_DAC1_BASE + STM32_DAC_DHR12R1_OFFSET) -# define STM32_DAC1_DHR12L1 (STM32_DAC1_BASE + STM32_DAC_DHR12L1_OFFSET) -# define STM32_DAC1_DHR8R1 (STM32_DAC1_BASE + STM32_DAC_DHR8R1_OFFSET) -# define STM32_DAC1_DHR12R2 (STM32_DAC1_BASE + STM32_DAC_DHR12R2_OFFSET) -# define STM32_DAC1_DHR12L2 (STM32_DAC1_BASE + STM32_DAC_DHR12L2_OFFSET) -# define STM32_DAC1_DHR8R2 (STM32_DAC1_BASE + STM32_DAC_DHR8R2_OFFSET) -# define STM32_DAC1_DHR12RD (STM32_DAC1_BASE + STM32_DAC_DHR12RD_OFFSET) -# define STM32_DAC1_DHR12LD (STM32_DAC1_BASE + STM32_DAC_DHR12LD_OFFSET) -# define STM32_DAC1_DHR8RD (STM32_DAC1_BASE + STM32_DAC_DHR8RD_OFFSET) -# define STM32_DAC1_DOR1 (STM32_DAC1_BASE + STM32_DAC_DOR1_OFFSET) -# define STM32_DAC1_DOR2 (STM32_DAC1_BASE + STM32_DAC_DOR2_OFFSET) -# define STM32_DAC1_SR (STM32_DAC1_BASE + STM32_DAC_SR_OFFSET) +/* There are 2 main types of DAC IP cores among STM32 chips: + * 1. STM32 DAC IPv1: F1, F2, F3, F4, F7, L1, L4 + * 2. STM32 DAC IPv2: G4 + */ +#if defined(CONFIG_STM32_HAVE_IP_DAC_V1) && \ + defined(CONFIG_STM32_HAVE_IP_DAC_V2) +# error Only one STM32 DAC IP version must be selected #endif -#if STM32_NDAC > 2 -/* DAC2 */ - -# define STM32_DAC2_CR (STM32_DAC2_BASE + STM32_DAC_CR_OFFSET) -# define STM32_DAC2_SWTRIGR (STM32_DAC2_BASE + STM32_DAC_SWTRIGR_OFFSET) -# define STM32_DAC2_DHR12R1 (STM32_DAC2_BASE + STM32_DAC_DHR12R1_OFFSET) -# define STM32_DAC2_DHR12L1 (STM32_DAC2_BASE + STM32_DAC_DHR12L1_OFFSET) -# define STM32_DAC2_DHR8R1 (STM32_DAC2_BASE + STM32_DAC_DHR8R1_OFFSET) -# define STM32_DAC2_DHR12R2 (STM32_DAC2_BASE + STM32_DAC_DHR12R2_OFFSET) -# define STM32_DAC2_DHR12L2 (STM32_DAC2_BASE + STM32_DAC_DHR12L2_OFFSET) -# define STM32_DAC2_DHR8R2 (STM32_DAC2_BASE + STM32_DAC_DHR8R2_OFFSET) -# define STM32_DAC2_DHR12RD (STM32_DAC2_BASE + STM32_DAC_DHR12RD_OFFSET) -# define STM32_DAC2_DHR12LD (STM32_DAC2_BASE + STM32_DAC_DHR12LD_OFFSET) -# define STM32_DAC2_DHR8RD (STM32_DAC2_BASE + STM32_DAC_DHR8RD_OFFSET) -# define STM32_DAC2_DOR1 (STM32_DAC2_BASE + STM32_DAC_DOR1_OFFSET) -# define STM32_DAC2_DOR2 (STM32_DAC2_BASE + STM32_DAC_DOR2_OFFSET) -# define STM32_DAC2_SR (STM32_DAC2_BASE + STM32_DAC_SR_OFFSET) -#endif - -/* Register Bitfield Definitions ********************************************/ - -/* DAC control register */ - -/* These definitions may be used for 16-bit values of either channel */ - -#define DAC_CR_EN (1 << 0) /* Bit 0: DAC channel enable */ -#define DAC_CR_BOFF (1 << 1) /* Bit 1: 1=DAC channel output buffer disable */ -#define DAC_CR_BOFF_EN (0 << 1) /* Bit 1: 0=DAC channel output buffer enable */ -#define DAC_CR_TEN (1 << 2) /* Bit 2: DAC channel trigger enable */ -#define DAC_CR_TSEL_SHIFT (3) /* Bits 3-5: DAC channel trigger selection */ -#define DAC_CR_TSEL_MASK (7 << DAC_CR_TSEL_SHIFT) -# define DAC_CR_TSEL_TIM6 (0 << DAC_CR_TSEL_SHIFT) /* Timer 6 TRGO event */ -#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F33XX) -# define DAC_CR_TSEL_TIM3 (1 << DAC_CR_TSEL_SHIFT) /* Timer 3 TRGO event */ +#if defined(CONFIG_STM32_HAVE_IP_DAC_V1) +# include "stm32_dac_v1.h" +#elif defined(CONFIG_STM32_HAVE_IP_DAC_V2) +# if defined(CONFIG_STM32_STM32G4XXX) +# include "stm32gxxxxx_dac.h" /* Special case for G4 */ +# else +# error "STM32 DAC device not supported" +# endif #else -# define DAC_CR_TSEL_TIM8 (1 << DAC_CR_TSEL_SHIFT) /* Timer 8 TRGO event */ +# error "STM32 DAC IP version not specified" #endif -# define DAC_CR_TSEL_TIM7 (2 << DAC_CR_TSEL_SHIFT) /* Timer 7 TRGO event */ -#if defined(CONFIG_STM32_STM32F33XX) -# define DAC_CR_TSEL_TIM15 (3 << DAC_CR_TSEL_SHIFT) /* Timer 15 TRGO event, or */ -# define DAC_CR_TSEL_HRT1TRG1 (3 << DAC_CR_TSEL_SHIFT) /* HRTIM1 DACTRG1 event */ -#else -# define DAC_CR_TSEL_TIM5 (3 << DAC_CR_TSEL_SHIFT) /* Timer 5 TRGO event */ -#endif -# define DAC_CR_TSEL_TIM2 (4 << DAC_CR_TSEL_SHIFT) /* Timer 2 TRGO event */ -#if defined(CONFIG_STM32_STM32F33XX) -# define DAC_CR_TSEL_HRT1TRG2 (5 << DAC_CR_TSEL_SHIFT) /* HRTIM1 DACTRG2 event, or */ -# define DAC_CR_TSEL_HRT1TRG3 (5 << DAC_CR_TSEL_SHIFT) /* HRTIM1 DACTRG3 event */ -#else -# define DAC_CR_TSEL_TIM4 (5 << DAC_CR_TSEL_SHIFT) /* Timer 4 TRGO event */ -#endif -# define DAC_CR_TSEL_EXT9 (6 << DAC_CR_TSEL_SHIFT) /* External line9 */ -# define DAC_CR_TSEL_SW (7 << DAC_CR_TSEL_SHIFT) /* Software trigger */ -#define DAC_CR_WAVE_SHIFT (6) /* Bits 6-7: DAC channel noise/triangle wave generation */ -#define DAC_CR_WAVE_MASK (3 << DAC_CR_WAVE_SHIFT) -# define DAC_CR_WAVE_DISABLED (0 << DAC_CR_WAVE_SHIFT) /* Wave generation disabled */ -# define DAC_CR_WAVE_NOISE (1 << DAC_CR_WAVE_SHIFT) /* Noise wave generation enabled */ -# define DAC_CR_WAVE_TRIANGLE (2 << DAC_CR_WAVE_SHIFT) /* Triangle wave generation enabled */ -#define DAC_CR_MAMP_SHIFT (8) /* Bits 8-11: DAC channel mask/amplitude selector */ -#define DAC_CR_MAMP_MASK (15 << DAC_CR_MAMP_SHIFT) -# define DAC_CR_MAMP_AMP1 (0 << DAC_CR_MAMP_SHIFT) /* Unmask bit0 of LFSR/triangle amplitude=1 */ -# define DAC_CR_MAMP_AMP3 (1 << DAC_CR_MAMP_SHIFT) /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */ -# define DAC_CR_MAMP_AMP7 (2 << DAC_CR_MAMP_SHIFT) /* Unmask bits[2:0] of LFSR/triangle amplitude=7 */ -# define DAC_CR_MAMP_AMP15 (3 << DAC_CR_MAMP_SHIFT) /* Unmask bits[3:0] of LFSR/triangle amplitude=15 */ -# define DAC_CR_MAMP_AMP31 (4 << DAC_CR_MAMP_SHIFT) /* Unmask bits[4:0] of LFSR/triangle amplitude=31 */ -# define DAC_CR_MAMP_AMP63 (5 << DAC_CR_MAMP_SHIFT) /* Unmask bits[5:0] of LFSR/triangle amplitude=63 */ -# define DAC_CR_MAMP_AMP127 (6 << DAC_CR_MAMP_SHIFT) /* Unmask bits[6:0] of LFSR/triangle amplitude=127 */ -# define DAC_CR_MAMP_AMP255 (7 << DAC_CR_MAMP_SHIFT) /* Unmask bits[7:0] of LFSR/triangle amplitude=255 */ -# define DAC_CR_MAMP_AMP511 (8 << DAC_CR_MAMP_SHIFT) /* Unmask bits[8:0] of LFSR/triangle amplitude=511 */ -# define DAC_CR_MAMP_AMP1023 (9 << DAC_CR_MAMP_SHIFT) /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */ -# define DAC_CR_MAMP_AMP2047 (10 << DAC_CR_MAMP_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */ -# define DAC_CR_MAMP_AMP4095 (11 << DAC_CR_MAMP_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */ -#define DAC_CR_DMAEN (1 << 12) /* Bit 12: DAC channel DMA enable */ -#define DAC_CR_DMAUDRIE (1 << 13) /* Bit 13: DAC channel DMA Underrun Interrupt enable */ - -/* These definitions may be used with the full, 32-bit register */ - -#define DAC_CR_EN1 (1 << 0) /* Bit 0: DAC channel 1 enable */ -#define DAC_CR_BOFF1 (1 << 1) /* Bit 1: DAC channel 1 output buffer disable */ -#define DAC_CR_TEN1 (1 << 2) /* Bit 2: DAC channel 1 trigger enable */ -#define DAC_CR_TSEL1_SHIFT (3) /* Bits 3-5: DAC channel 1 trigger selection */ -#define DAC_CR_TSEL1_MASK (7 << DAC_CR_TSEL1_SHIFT) -# define DAC_CR_TSEL1_TIM6 (0 << DAC_CR_TSEL1_SHIFT) /* Timer 6 TRGO event */ -#if defined(CONFIG_STM32_STM32F33XX) -# define DAC_CR_TSEL1_TIM3 (1 << DAC_CR_TSEL1_SHIFT) /* Timer 3 TRGO event */ -#else -# define DAC_CR_TSEL1_TIM8 (1 << DAC_CR_TSEL1_SHIFT) /* Timer 8 TRGO event */ -#endif -# define DAC_CR_TSEL1_TIM7 (2 << DAC_CR_TSEL1_SHIFT) /* Timer 7 TRGO event */ -#if defined(CONFIG_STM32_STM32F33XX) -# define DAC_CR_TSEL1_TIM15 (3 << DAC_CR_TSEL1_SHIFT) /* Timer 15 TRGO event, or */ -# define DAC_CR_TSEL1_HRT1TRG1 (3 << DAC_CR_TSEL1_SHIFT) /* HRTIM1 DACTRG1 event (DAC1 only) */ -#else -# define DAC_CR_TSEL1_TIM5 (3 << DAC_CR_TSEL1_SHIFT) /* Timer 5 TRGO event */ -#endif -# define DAC_CR_TSEL1_TIM2 (4 << DAC_CR_TSEL1_SHIFT) /* Timer 2 TRGO event */ -#if defined(CONFIG_STM32_STM32F33XX) -# define DAC_CR_TSEL1_HRT1TRG2 (5 << DAC_CR_TSEL1_SHIFT) /* HRTIM1 DACTRG2 event (DAC1), or */ -# define DAC_CR_TSEL1_HRT1TRG3 (5 << DAC_CR_TSEL1_SHIFT) /* HRTIM1 DACTRG3 event (DAC2) */ -#else -# define DAC_CR_TSEL1_TIM4 (5 << DAC_CR_TSEL1_SHIFT) /* Timer 4 TRGO event */ -#endif -# define DAC_CR_TSEL1_EXT9 (6 << DAC_CR_TSEL1_SHIFT) /* External line9 */ -# define DAC_CR_TSEL1_SW (7 << DAC_CR_TSEL1_SHIFT) /* Software trigger */ -#define DAC_CR_WAVE1_SHIFT (6) /* Bits 6-7: DAC channel 1 noise/triangle wave generation */ -#define DAC_CR_WAVE1_MASK (3 << DAC_CR_WAVE1_SHIFT) -# define DAC_CR_WAVE1_DISABLED (0 << DAC_CR_WAVE1_SHIFT) /* Wave generation disabled */ -# define DAC_CR_WAVE1_NOISE (1 << DAC_CR_WAVE1_SHIFT) /* Noise wave generation enabled */ -# define DAC_CR_WAVE1_TRIANGLE (2 << DAC_CR_WAVE1_SHIFT) /* Triangle wave generation enabled */ -#define DAC_CR_MAMP1_SHIFT (8) /* Bits 8-11: DAC channel 1 mask/amplitude selector */ -#define DAC_CR_MAMP1_MASK (15 << DAC_CR_MAMP1_SHIFT) -# define DAC_CR_MAMP1_AMP1 (0 << DAC_CR_MAMP1_SHIFT) /* Unmask bit0 of LFSR/triangle amplitude=1 */ -# define DAC_CR_MAMP1_AMP3 (1 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */ -# define DAC_CR_MAMP1_AMP7 (2 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[2:0] of LFSR/triangle amplitude=7 */ -# define DAC_CR_MAMP1_AMP15 (3 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[3:0] of LFSR/triangle amplitude=15 */ -# define DAC_CR_MAMP1_AMP31 (4 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[4:0] of LFSR/triangle amplitude=31 */ -# define DAC_CR_MAMP1_AMP63 (5 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[5:0] of LFSR/triangle amplitude=63 */ -# define DAC_CR_MAMP1_AMP127 (6 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[6:0] of LFSR/triangle amplitude=127 */ -# define DAC_CR_MAMP1_AMP255 (7 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[7:0] of LFSR/triangle amplitude=255 */ -# define DAC_CR_MAMP1_AMP511 (8 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[8:0] of LFSR/triangle amplitude=511 */ -# define DAC_CR_MAMP1_AMP1023 (9 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */ -# define DAC_CR_MAMP1_AMP2047 (10 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */ -# define DAC_CR_MAMP1_AMP4095 (11 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */ -#define DAC_CR_DMAEN1 (1 << 12) /* Bit 12: DAC channel 1 DMA enable */ -#define DAC_CR_DMAUDRIE1 (1 << 13) /* Bit 13: DAC channel 1 DMA Underrun Interrupt enable */ - -#define DAC_CR_EN2 (1 << 16) /* Bit 16: DAC channel 2 enable */ -#define DAC_CR_BOFF2 (1 << 17) /* Bit 17: DAC channel 2 output buffer disable */ -#define DAC_CR_TEN2 (1 << 18) /* Bit 18: DAC channel 2 trigger enable */ -#define DAC_CR_TSEL2_SHIFT (19) /* Bits 19-21: DAC channel 2 trigger selection */ -#define DAC_CR_TSEL2_MASK (7 << DAC_CR_TSEL2_SHIFT) -# define DAC_CR_TSEL2_TIM6 (0 << DAC_CR_TSEL2_SHIFT) /* Timer 6 TRGO event */ -#if defined(CONFIG_STM32_STM32F33XX) -# define DAC_CR_TSEL2_TIM3 (1 << DAC_CR_TSEL2_SHIFT) /* Timer 3 TRGO event */ -#else -# define DAC_CR_TSEL2_TIM8 (1 << DAC_CR_TSEL2_SHIFT) /* Timer 8 TRGO event */ -#endif -# define DAC_CR_TSEL2_TIM7 (2 << DAC_CR_TSEL2_SHIFT) /* Timer 7 TRGO event */ -#if defined(CONFIG_STM32_STM32F33XX) -# define DAC_CR_TSEL2_TIM15 (3 << DAC_CR_TSEL2_SHIFT) /* Timer 15 TRGO event, or */ -# define DAC_CR_TSEL2_HRT1TRG1 (3 << DAC_CR_TSEL2_SHIFT) /* HRTIM1 DACTRG1 event */ -#else -# define DAC_CR_TSEL2_TIM5 (3 << DAC_CR_TSEL2_SHIFT) /* Timer 5 TRGO event */ -#endif -# define DAC_CR_TSEL2_TIM2 (4 << DAC_CR_TSEL2_SHIFT) /* Timer 2 TRGO event */ -#if defined(CONFIG_STM32_STM32F33XX) -# define DAC_CR_TSEL2_HRT1TRG2 (5 << DAC_CR_TSEL2_SHIFT) /* HRTIM1 DACTRG2 event */ -#else -# define DAC_CR_TSEL2_TIM4 (5 << DAC_CR_TSEL2_SHIFT) /* Timer 4 TRGO event */ -#endif -# define DAC_CR_TSEL2_EXT9 (6 << DAC_CR_TSEL2_SHIFT) /* External line9 */ -# define DAC_CR_TSEL2_SW (7 << DAC_CR_TSEL2_SHIFT) /* Software trigger */ -#define DAC_CR_WAVE2_SHIFT (22) /* Bit 22-23: DAC channel 2 noise/triangle wave generation enable */ -#define DAC_CR_WAVE2_MASK (3 << DAC_CR_WAVE2_SHIFT) -# define DAC_CR_WAVE2_DISABLED (0 << DAC_CR_WAVE2_SHIFT) /* Wave generation disabled */ -# define DAC_CR_WAVE2_NOISE (1 << DAC_CR_WAVE2_SHIFT) /* Noise wave generation enabled */ -# define DAC_CR_WAVE2_TRIANGLE (2 << DAC_CR_WAVE2_SHIFT) /* Triangle wave generation enabled */ -#define DAC_CR_MAMP2_SHIFT (24) /* Bit 24-27: DAC channel 2 mask/amplitude selector */ -#define DAC_CR_MAMP2_MASK (15 << DAC_CR_MAMP2_SHIFT) -# define DAC_CR_MAMP2_AMP1 (0 << DAC_CR_MAMP2_SHIFT) /* Unmask bit0 of LFSR/triangle amplitude=1 */ -# define DAC_CR_MAMP2_AMP3 (1 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */ -# define DAC_CR_MAMP2_AMP7 (2 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[2:0] of LFSR/triangle amplitude=7 */ -# define DAC_CR_MAMP2_AMP15 (3 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[3:0] of LFSR/triangle amplitude=15 */ -# define DAC_CR_MAMP2_AMP31 (4 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[4:0] of LFSR/triangle amplitude=31 */ -# define DAC_CR_MAMP2_AMP63 (5 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[5:0] of LFSR/triangle amplitude=63 */ -# define DAC_CR_MAMP2_AMP127 (6 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[6:0] of LFSR/triangle amplitude=127 */ -# define DAC_CR_MAMP2_AMP255 (7 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[7:0] of LFSR/triangle amplitude=255 */ -# define DAC_CR_MAMP2_AMP511 (8 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[8:0] of LFSR/triangle amplitude=511 */ -# define DAC_CR_MAMP2_AMP1023 (9 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */ -# define DAC_CR_MAMP2_AMP2047 (10 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */ -# define DAC_CR_MAMP2_AMP4095 (11 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */ -#define DAC_CR_DMAEN2 (1 << 28) /* Bit 28: DAC channel 2 DMA enable */ -#define DAC_CR_DMAUDRIE2 (1 << 29) /* Bit 29: DAC channel 2 DMA underrun interrupt enable */ - -/* DAC software trigger register */ - -#define DAC_SWTRIGR_SWTRIG(n) (1 << ((n)-1)) -#define DAC_SWTRIGR_SWTRIG1 (1 << 0) /* Bit 0: DAC channel 1 software trigger */ -#define DAC_SWTRIGR_SWTRIG2 (1 << 1) /* Bit 1: DAC channel 2 software trigger */ - -/* DAC channel 1/2 12-bit right-aligned data holding register */ - -#define DAC_DHR12R_MASK (0x0fff) - -/* DAC channel 1/2 12-bit left aligned data holding register */ - -#define DAC_DHR12L_MASK (0xfff0) - -/* DAC channel 1/2 8-bit right aligned data holding register */ - -#define DAC_DHR8R_MASK (0x00ff) - -/* Dual DAC 12-bit right-aligned data holding register */ - -#define DAC_DHR12RD_DACC_SHIFT(n) (((n)-1) << 4) -#define DAC_DHR12RD_DACC_MASK(n) (0xfff << DAC_DHR12RD_DACC_SHIFT(n)) - -#define DAC_DHR12RD_DACC1_SHIFT (0) /* Bits 0-11: DAC channel 1 12-bit right-aligned data */ -#define DAC_DHR12RD_DACC1_MASK (0xfff << DAC_DHR12RD_DACC1_SHIFT) -#define DAC_DHR12RD_DACC2_SHIFT (16) /* Bits 16-27: DAC channel 2 12-bit right-aligned data */ -#define DAC_DHR12RD_DACC2_MASK (0xfff << DAC_DHR12RD_DACC2_SHIFT) - -/* Dual DAC 12-bit left-aligned data holding register */ - -#define DAC_DHR12LD_DACC_SHIFT(n) ((((n)-1) << 4) + 4) -#define DAC_DHR12LD_DACC_MASK(n) (0xfff << DAC_DHR12LD_DACC_SHIFT(n)) - -#define DAC_DHR12LD_DACC1_SHIFT (4) /* Bits 4-15: DAC channel 1 12-bit left-aligned data */ -#define DAC_DHR12LD_DACC1_MASK (0xfff << DAC_DHR12LD_DACC1_SHIFT) -#define DAC_DHR12LD_DACC2_SHIFT (20) /* Bits 20-31: DAC channel 2 12-bit left-aligned data */ -#define DAC_DHR12LD_DACC2_MASK (0xfff << DAC_DHR12LD_DACC2_SHIFT) - -/* DUAL DAC 8-bit right aligned data holding register */ - -#define DAC_DHR8RD_DACC_SHIFT(n) (((n)-1) << 3) -#define DAC_DHR8RD_DACC_MASK(n) (0xff << DAC_DHR8RD_DACC_SHIFT(n)) - -#define DAC_DHR8RD_DACC1_SHIFT (0) /* Bits 0-7: DAC channel 1 8-bit right-aligned data */ -#define DAC_DHR8RD_DACC1_MASK (0xff << DAC_DHR8RD_DACC1_SHIFT) -#define DAC_DHR8RD_DACC2_SHIFT (8) /* Bits 8-15: DAC channel 2 8-bit right-aligned data */ -#define DAC_DHR8RD_DACC2_MASK (0xff << DAC_DHR8RD_DACC2_SHIFT) - -/* DAC channel 1/2 data output register */ - -#define DAC_DOR_MASK (0x0fff) - -/* DAC status register */ - -#define DAC_SR_DMAUDR(n) (1 << ((((n)-1) << 4) + 13)) -#define DAC_SR_DMAUDR1 (1 << 13) /* Bit 13: DAC channel 1 DMA underrun flag */ -#define DAC_SR_DMAUDR2 (1 << 29) /* Bit 29: DAC channel 2 DMA underrun flag */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32_DAC_H */ diff --git a/arch/arm/src/stm32/hardware/stm32_dac_v1.h b/arch/arm/src/stm32/hardware/stm32_dac_v1.h new file mode 100644 index 00000000000..487b8fe9bd4 --- /dev/null +++ b/arch/arm/src/stm32/hardware/stm32_dac_v1.h @@ -0,0 +1,313 @@ +/**************************************************************************** + * arch/arm/src/stm32/hardware/stm32_dac_v1.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32_DAC_V1_H +#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32_DAC_V1_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include "chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* This is implementation for STM32 DAC IPv1 - F1, F2, F3, F4, F7, L1, L4 */ + +#define HAVE_IP_DAC_V1 +#undef HAVE_IP_DAC_V2 /* No DAC IPv2 */ + +/* Register Offsets *********************************************************/ + +#define STM32_DAC_CR_OFFSET 0x0000 /* DAC control register */ +#define STM32_DAC_SWTRIGR_OFFSET 0x0004 /* DAC software trigger register */ +#define STM32_DAC_DHR12R1_OFFSET 0x0008 /* DAC channel 1 12-bit right-aligned data holding register */ +#define STM32_DAC_DHR12L1_OFFSET 0x000c /* DAC channel 1 12-bit left aligned data holding register */ +#define STM32_DAC_DHR8R1_OFFSET 0x0010 /* DAC channel 1 8-bit right aligned data holding register */ +#define STM32_DAC_DHR12R2_OFFSET 0x0014 /* DAC channel 2 12-bit right aligned data holding register */ +#define STM32_DAC_DHR12L2_OFFSET 0x0018 /* DAC channel 2 12-bit left aligned data holding register */ +#define STM32_DAC_DHR8R2_OFFSET 0x001c /* DAC channel 2 8-bit right-aligned data holding register */ +#define STM32_DAC_DHR12RD_OFFSET 0x0020 /* Dual DAC 12-bit right-aligned data holding register */ +#define STM32_DAC_DHR12LD_OFFSET 0x0024 /* DUAL DAC 12-bit left aligned data holding register */ +#define STM32_DAC_DHR8RD_OFFSET 0x0028 /* DUAL DAC 8-bit right aligned data holding register */ +#define STM32_DAC_DOR1_OFFSET 0x002c /* DAC channel 1 data output register */ +#define STM32_DAC_DOR2_OFFSET 0x0030 /* DAC channel 2 data output register */ +#define STM32_DAC_SR_OFFSET 0x0034 /* DAC status register */ + +/* Register Addresses *******************************************************/ + +#if STM32_NDAC > 0 +/* DAC1 */ + +# define STM32_DAC1_CR (STM32_DAC1_BASE + STM32_DAC_CR_OFFSET) +# define STM32_DAC1_SWTRIGR (STM32_DAC1_BASE + STM32_DAC_SWTRIGR_OFFSET) +# define STM32_DAC1_DHR12R1 (STM32_DAC1_BASE + STM32_DAC_DHR12R1_OFFSET) +# define STM32_DAC1_DHR12L1 (STM32_DAC1_BASE + STM32_DAC_DHR12L1_OFFSET) +# define STM32_DAC1_DHR8R1 (STM32_DAC1_BASE + STM32_DAC_DHR8R1_OFFSET) +# define STM32_DAC1_DHR12R2 (STM32_DAC1_BASE + STM32_DAC_DHR12R2_OFFSET) +# define STM32_DAC1_DHR12L2 (STM32_DAC1_BASE + STM32_DAC_DHR12L2_OFFSET) +# define STM32_DAC1_DHR8R2 (STM32_DAC1_BASE + STM32_DAC_DHR8R2_OFFSET) +# define STM32_DAC1_DHR12RD (STM32_DAC1_BASE + STM32_DAC_DHR12RD_OFFSET) +# define STM32_DAC1_DHR12LD (STM32_DAC1_BASE + STM32_DAC_DHR12LD_OFFSET) +# define STM32_DAC1_DHR8RD (STM32_DAC1_BASE + STM32_DAC_DHR8RD_OFFSET) +# define STM32_DAC1_DOR1 (STM32_DAC1_BASE + STM32_DAC_DOR1_OFFSET) +# define STM32_DAC1_DOR2 (STM32_DAC1_BASE + STM32_DAC_DOR2_OFFSET) +# define STM32_DAC1_SR (STM32_DAC1_BASE + STM32_DAC_SR_OFFSET) + +#endif + +#if STM32_NDAC > 2 +/* DAC2 */ + +# define STM32_DAC2_CR (STM32_DAC2_BASE + STM32_DAC_CR_OFFSET) +# define STM32_DAC2_SWTRIGR (STM32_DAC2_BASE + STM32_DAC_SWTRIGR_OFFSET) +# define STM32_DAC2_DHR12R1 (STM32_DAC2_BASE + STM32_DAC_DHR12R1_OFFSET) +# define STM32_DAC2_DHR12L1 (STM32_DAC2_BASE + STM32_DAC_DHR12L1_OFFSET) +# define STM32_DAC2_DHR8R1 (STM32_DAC2_BASE + STM32_DAC_DHR8R1_OFFSET) +# define STM32_DAC2_DHR12R2 (STM32_DAC2_BASE + STM32_DAC_DHR12R2_OFFSET) +# define STM32_DAC2_DHR12L2 (STM32_DAC2_BASE + STM32_DAC_DHR12L2_OFFSET) +# define STM32_DAC2_DHR8R2 (STM32_DAC2_BASE + STM32_DAC_DHR8R2_OFFSET) +# define STM32_DAC2_DHR12RD (STM32_DAC2_BASE + STM32_DAC_DHR12RD_OFFSET) +# define STM32_DAC2_DHR12LD (STM32_DAC2_BASE + STM32_DAC_DHR12LD_OFFSET) +# define STM32_DAC2_DHR8RD (STM32_DAC2_BASE + STM32_DAC_DHR8RD_OFFSET) +# define STM32_DAC2_DOR1 (STM32_DAC2_BASE + STM32_DAC_DOR1_OFFSET) +# define STM32_DAC2_DOR2 (STM32_DAC2_BASE + STM32_DAC_DOR2_OFFSET) +# define STM32_DAC2_SR (STM32_DAC2_BASE + STM32_DAC_SR_OFFSET) +#endif + +/* Register Bitfield Definitions ********************************************/ + +/* DAC control register */ + +/* These definitions may be used for 16-bit values of either channel */ + +#define DAC_CR_EN (1 << 0) /* Bit 0: DAC channel enable */ +#define DAC_CR_BOFF (1 << 1) /* Bit 1: 1=DAC channel output buffer disable */ +#define DAC_CR_BOFF_EN (0 << 1) /* Bit 1: 0=DAC channel output buffer enable */ +#define DAC_CR_TEN (1 << 2) /* Bit 2: DAC channel trigger enable */ +#define DAC_CR_TSEL_SHIFT (3) /* Bits 3-5: DAC channel trigger selection */ +#define DAC_CR_TSEL_MASK (7 << DAC_CR_TSEL_SHIFT) +# define DAC_CR_TSEL_TIM6 (0 << DAC_CR_TSEL_SHIFT) /* Timer 6 TRGO event */ +#if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F33XX) +# define DAC_CR_TSEL_TIM3 (1 << DAC_CR_TSEL_SHIFT) /* Timer 3 TRGO event */ +#else +# define DAC_CR_TSEL_TIM8 (1 << DAC_CR_TSEL_SHIFT) /* Timer 8 TRGO event */ +#endif +# define DAC_CR_TSEL_TIM7 (2 << DAC_CR_TSEL_SHIFT) /* Timer 7 TRGO event */ +#if defined(CONFIG_STM32_STM32F33XX) +# define DAC_CR_TSEL_TIM15 (3 << DAC_CR_TSEL_SHIFT) /* Timer 15 TRGO event, or */ +# define DAC_CR_TSEL_HRT1TRG1 (3 << DAC_CR_TSEL_SHIFT) /* HRTIM1 DACTRG1 event */ +#else +# define DAC_CR_TSEL_TIM5 (3 << DAC_CR_TSEL_SHIFT) /* Timer 5 TRGO event */ +#endif +# define DAC_CR_TSEL_TIM2 (4 << DAC_CR_TSEL_SHIFT) /* Timer 2 TRGO event */ +#if defined(CONFIG_STM32_STM32F33XX) +# define DAC_CR_TSEL_HRT1TRG2 (5 << DAC_CR_TSEL_SHIFT) /* HRTIM1 DACTRG2 event, or */ +# define DAC_CR_TSEL_HRT1TRG3 (5 << DAC_CR_TSEL_SHIFT) /* HRTIM1 DACTRG3 event */ +#else +# define DAC_CR_TSEL_TIM4 (5 << DAC_CR_TSEL_SHIFT) /* Timer 4 TRGO event */ +#endif +# define DAC_CR_TSEL_EXT9 (6 << DAC_CR_TSEL_SHIFT) /* External line9 */ +# define DAC_CR_TSEL_SW (7 << DAC_CR_TSEL_SHIFT) /* Software trigger */ +#define DAC_CR_WAVE_SHIFT (6) /* Bits 6-7: DAC channel noise/triangle wave generation */ +#define DAC_CR_WAVE_MASK (3 << DAC_CR_WAVE_SHIFT) +# define DAC_CR_WAVE_DISABLED (0 << DAC_CR_WAVE_SHIFT) /* Wave generation disabled */ +# define DAC_CR_WAVE_NOISE (1 << DAC_CR_WAVE_SHIFT) /* Noise wave generation enabled */ +# define DAC_CR_WAVE_TRIANGLE (2 << DAC_CR_WAVE_SHIFT) /* Triangle wave generation enabled */ +#define DAC_CR_MAMP_SHIFT (8) /* Bits 8-11: DAC channel mask/amplitude selector */ +#define DAC_CR_MAMP_MASK (15 << DAC_CR_MAMP_SHIFT) +# define DAC_CR_MAMP_AMP1 (0 << DAC_CR_MAMP_SHIFT) /* Unmask bit0 of LFSR/triangle amplitude=1 */ +# define DAC_CR_MAMP_AMP3 (1 << DAC_CR_MAMP_SHIFT) /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */ +# define DAC_CR_MAMP_AMP7 (2 << DAC_CR_MAMP_SHIFT) /* Unmask bits[2:0] of LFSR/triangle amplitude=7 */ +# define DAC_CR_MAMP_AMP15 (3 << DAC_CR_MAMP_SHIFT) /* Unmask bits[3:0] of LFSR/triangle amplitude=15 */ +# define DAC_CR_MAMP_AMP31 (4 << DAC_CR_MAMP_SHIFT) /* Unmask bits[4:0] of LFSR/triangle amplitude=31 */ +# define DAC_CR_MAMP_AMP63 (5 << DAC_CR_MAMP_SHIFT) /* Unmask bits[5:0] of LFSR/triangle amplitude=63 */ +# define DAC_CR_MAMP_AMP127 (6 << DAC_CR_MAMP_SHIFT) /* Unmask bits[6:0] of LFSR/triangle amplitude=127 */ +# define DAC_CR_MAMP_AMP255 (7 << DAC_CR_MAMP_SHIFT) /* Unmask bits[7:0] of LFSR/triangle amplitude=255 */ +# define DAC_CR_MAMP_AMP511 (8 << DAC_CR_MAMP_SHIFT) /* Unmask bits[8:0] of LFSR/triangle amplitude=511 */ +# define DAC_CR_MAMP_AMP1023 (9 << DAC_CR_MAMP_SHIFT) /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */ +# define DAC_CR_MAMP_AMP2047 (10 << DAC_CR_MAMP_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */ +# define DAC_CR_MAMP_AMP4095 (11 << DAC_CR_MAMP_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */ +#define DAC_CR_DMAEN (1 << 12) /* Bit 12: DAC channel DMA enable */ +#define DAC_CR_DMAUDRIE (1 << 13) /* Bit 13: DAC channel DMA Underrun Interrupt enable */ + +/* These definitions may be used with the full, 32-bit register */ + +#define DAC_CR_EN1 (1 << 0) /* Bit 0: DAC channel 1 enable */ +#define DAC_CR_BOFF1 (1 << 1) /* Bit 1: DAC channel 1 output buffer disable */ +#define DAC_CR_TEN1 (1 << 2) /* Bit 2: DAC channel 1 trigger enable */ +#define DAC_CR_TSEL1_SHIFT (3) /* Bits 3-5: DAC channel 1 trigger selection */ +#define DAC_CR_TSEL1_MASK (7 << DAC_CR_TSEL1_SHIFT) +# define DAC_CR_TSEL1_TIM6 (0 << DAC_CR_TSEL1_SHIFT) /* Timer 6 TRGO event */ +#if defined(CONFIG_STM32_STM32F33XX) +# define DAC_CR_TSEL1_TIM3 (1 << DAC_CR_TSEL1_SHIFT) /* Timer 3 TRGO event */ +#else +# define DAC_CR_TSEL1_TIM8 (1 << DAC_CR_TSEL1_SHIFT) /* Timer 8 TRGO event */ +#endif +# define DAC_CR_TSEL1_TIM7 (2 << DAC_CR_TSEL1_SHIFT) /* Timer 7 TRGO event */ +#if defined(CONFIG_STM32_STM32F33XX) +# define DAC_CR_TSEL1_TIM15 (3 << DAC_CR_TSEL1_SHIFT) /* Timer 15 TRGO event, or */ +# define DAC_CR_TSEL1_HRT1TRG1 (3 << DAC_CR_TSEL1_SHIFT) /* HRTIM1 DACTRG1 event (DAC1 only) */ +#else +# define DAC_CR_TSEL1_TIM5 (3 << DAC_CR_TSEL1_SHIFT) /* Timer 5 TRGO event */ +#endif +# define DAC_CR_TSEL1_TIM2 (4 << DAC_CR_TSEL1_SHIFT) /* Timer 2 TRGO event */ +#if defined(CONFIG_STM32_STM32F33XX) +# define DAC_CR_TSEL1_HRT1TRG2 (5 << DAC_CR_TSEL1_SHIFT) /* HRTIM1 DACTRG2 event (DAC1), or */ +# define DAC_CR_TSEL1_HRT1TRG3 (5 << DAC_CR_TSEL1_SHIFT) /* HRTIM1 DACTRG3 event (DAC2) */ +#else +# define DAC_CR_TSEL1_TIM4 (5 << DAC_CR_TSEL1_SHIFT) /* Timer 4 TRGO event */ +#endif +# define DAC_CR_TSEL1_EXT9 (6 << DAC_CR_TSEL1_SHIFT) /* External line9 */ +# define DAC_CR_TSEL1_SW (7 << DAC_CR_TSEL1_SHIFT) /* Software trigger */ +#define DAC_CR_WAVE1_SHIFT (6) /* Bits 6-7: DAC channel 1 noise/triangle wave generation */ +#define DAC_CR_WAVE1_MASK (3 << DAC_CR_WAVE1_SHIFT) +# define DAC_CR_WAVE1_DISABLED (0 << DAC_CR_WAVE1_SHIFT) /* Wave generation disabled */ +# define DAC_CR_WAVE1_NOISE (1 << DAC_CR_WAVE1_SHIFT) /* Noise wave generation enabled */ +# define DAC_CR_WAVE1_TRIANGLE (2 << DAC_CR_WAVE1_SHIFT) /* Triangle wave generation enabled */ +#define DAC_CR_MAMP1_SHIFT (8) /* Bits 8-11: DAC channel 1 mask/amplitude selector */ +#define DAC_CR_MAMP1_MASK (15 << DAC_CR_MAMP1_SHIFT) +# define DAC_CR_MAMP1_AMP1 (0 << DAC_CR_MAMP1_SHIFT) /* Unmask bit0 of LFSR/triangle amplitude=1 */ +# define DAC_CR_MAMP1_AMP3 (1 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */ +# define DAC_CR_MAMP1_AMP7 (2 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[2:0] of LFSR/triangle amplitude=7 */ +# define DAC_CR_MAMP1_AMP15 (3 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[3:0] of LFSR/triangle amplitude=15 */ +# define DAC_CR_MAMP1_AMP31 (4 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[4:0] of LFSR/triangle amplitude=31 */ +# define DAC_CR_MAMP1_AMP63 (5 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[5:0] of LFSR/triangle amplitude=63 */ +# define DAC_CR_MAMP1_AMP127 (6 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[6:0] of LFSR/triangle amplitude=127 */ +# define DAC_CR_MAMP1_AMP255 (7 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[7:0] of LFSR/triangle amplitude=255 */ +# define DAC_CR_MAMP1_AMP511 (8 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[8:0] of LFSR/triangle amplitude=511 */ +# define DAC_CR_MAMP1_AMP1023 (9 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */ +# define DAC_CR_MAMP1_AMP2047 (10 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */ +# define DAC_CR_MAMP1_AMP4095 (11 << DAC_CR_MAMP1_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */ +#define DAC_CR_DMAEN1 (1 << 12) /* Bit 12: DAC channel 1 DMA enable */ +#define DAC_CR_DMAUDRIE1 (1 << 13) /* Bit 13: DAC channel 1 DMA Underrun Interrupt enable */ + +#define DAC_CR_EN2 (1 << 16) /* Bit 16: DAC channel 2 enable */ +#define DAC_CR_BOFF2 (1 << 17) /* Bit 17: DAC channel 2 output buffer disable */ +#define DAC_CR_TEN2 (1 << 18) /* Bit 18: DAC channel 2 trigger enable */ +#define DAC_CR_TSEL2_SHIFT (19) /* Bits 19-21: DAC channel 2 trigger selection */ +#define DAC_CR_TSEL2_MASK (7 << DAC_CR_TSEL2_SHIFT) +# define DAC_CR_TSEL2_TIM6 (0 << DAC_CR_TSEL2_SHIFT) /* Timer 6 TRGO event */ +#if defined(CONFIG_STM32_STM32F33XX) +# define DAC_CR_TSEL2_TIM3 (1 << DAC_CR_TSEL2_SHIFT) /* Timer 3 TRGO event */ +#else +# define DAC_CR_TSEL2_TIM8 (1 << DAC_CR_TSEL2_SHIFT) /* Timer 8 TRGO event */ +#endif +# define DAC_CR_TSEL2_TIM7 (2 << DAC_CR_TSEL2_SHIFT) /* Timer 7 TRGO event */ +#if defined(CONFIG_STM32_STM32F33XX) +# define DAC_CR_TSEL2_TIM15 (3 << DAC_CR_TSEL2_SHIFT) /* Timer 15 TRGO event, or */ +# define DAC_CR_TSEL2_HRT1TRG1 (3 << DAC_CR_TSEL2_SHIFT) /* HRTIM1 DACTRG1 event */ +#else +# define DAC_CR_TSEL2_TIM5 (3 << DAC_CR_TSEL2_SHIFT) /* Timer 5 TRGO event */ +#endif +# define DAC_CR_TSEL2_TIM2 (4 << DAC_CR_TSEL2_SHIFT) /* Timer 2 TRGO event */ +#if defined(CONFIG_STM32_STM32F33XX) +# define DAC_CR_TSEL2_HRT1TRG2 (5 << DAC_CR_TSEL2_SHIFT) /* HRTIM1 DACTRG2 event */ +#else +# define DAC_CR_TSEL2_TIM4 (5 << DAC_CR_TSEL2_SHIFT) /* Timer 4 TRGO event */ +#endif +# define DAC_CR_TSEL2_EXT9 (6 << DAC_CR_TSEL2_SHIFT) /* External line9 */ +# define DAC_CR_TSEL2_SW (7 << DAC_CR_TSEL2_SHIFT) /* Software trigger */ +#define DAC_CR_WAVE2_SHIFT (22) /* Bit 22-23: DAC channel 2 noise/triangle wave generation enable */ +#define DAC_CR_WAVE2_MASK (3 << DAC_CR_WAVE2_SHIFT) +# define DAC_CR_WAVE2_DISABLED (0 << DAC_CR_WAVE2_SHIFT) /* Wave generation disabled */ +# define DAC_CR_WAVE2_NOISE (1 << DAC_CR_WAVE2_SHIFT) /* Noise wave generation enabled */ +# define DAC_CR_WAVE2_TRIANGLE (2 << DAC_CR_WAVE2_SHIFT) /* Triangle wave generation enabled */ +#define DAC_CR_MAMP2_SHIFT (24) /* Bit 24-27: DAC channel 2 mask/amplitude selector */ +#define DAC_CR_MAMP2_MASK (15 << DAC_CR_MAMP2_SHIFT) +# define DAC_CR_MAMP2_AMP1 (0 << DAC_CR_MAMP2_SHIFT) /* Unmask bit0 of LFSR/triangle amplitude=1 */ +# define DAC_CR_MAMP2_AMP3 (1 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[1:0] of LFSR/triangle amplitude=3 */ +# define DAC_CR_MAMP2_AMP7 (2 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[2:0] of LFSR/triangle amplitude=7 */ +# define DAC_CR_MAMP2_AMP15 (3 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[3:0] of LFSR/triangle amplitude=15 */ +# define DAC_CR_MAMP2_AMP31 (4 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[4:0] of LFSR/triangle amplitude=31 */ +# define DAC_CR_MAMP2_AMP63 (5 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[5:0] of LFSR/triangle amplitude=63 */ +# define DAC_CR_MAMP2_AMP127 (6 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[6:0] of LFSR/triangle amplitude=127 */ +# define DAC_CR_MAMP2_AMP255 (7 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[7:0] of LFSR/triangle amplitude=255 */ +# define DAC_CR_MAMP2_AMP511 (8 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[8:0] of LFSR/triangle amplitude=511 */ +# define DAC_CR_MAMP2_AMP1023 (9 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[9:0] of LFSR/triangle amplitude=1023 */ +# define DAC_CR_MAMP2_AMP2047 (10 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[10:0] of LFSR/triangle amplitude=2047 */ +# define DAC_CR_MAMP2_AMP4095 (11 << DAC_CR_MAMP2_SHIFT) /* Unmask bits[11:0] of LFSR/triangle amplitude=4095 */ +#define DAC_CR_DMAEN2 (1 << 28) /* Bit 28: DAC channel 2 DMA enable */ +#define DAC_CR_DMAUDRIE2 (1 << 29) /* Bit 29: DAC channel 2 DMA underrun interrupt enable */ + +/* DAC software trigger register */ + +#define DAC_SWTRIGR_SWTRIG(n) (1 << ((n)-1)) +#define DAC_SWTRIGR_SWTRIG1 (1 << 0) /* Bit 0: DAC channel 1 software trigger */ +#define DAC_SWTRIGR_SWTRIG2 (1 << 1) /* Bit 1: DAC channel 2 software trigger */ + +/* DAC channel 1/2 12-bit right-aligned data holding register */ + +#define DAC_DHR12R_MASK (0x0fff) + +/* DAC channel 1/2 12-bit left aligned data holding register */ + +#define DAC_DHR12L_MASK (0xfff0) + +/* DAC channel 1/2 8-bit right aligned data holding register */ + +#define DAC_DHR8R_MASK (0x00ff) + +/* Dual DAC 12-bit right-aligned data holding register */ + +#define DAC_DHR12RD_DACC_SHIFT(n) (((n)-1) << 4) +#define DAC_DHR12RD_DACC_MASK(n) (0xfff << DAC_DHR12RD_DACC_SHIFT(n)) + +#define DAC_DHR12RD_DACC1_SHIFT (0) /* Bits 0-11: DAC channel 1 12-bit right-aligned data */ +#define DAC_DHR12RD_DACC1_MASK (0xfff << DAC_DHR12RD_DACC1_SHIFT) +#define DAC_DHR12RD_DACC2_SHIFT (16) /* Bits 16-27: DAC channel 2 12-bit right-aligned data */ +#define DAC_DHR12RD_DACC2_MASK (0xfff << DAC_DHR12RD_DACC2_SHIFT) + +/* Dual DAC 12-bit left-aligned data holding register */ + +#define DAC_DHR12LD_DACC_SHIFT(n) ((((n)-1) << 4) + 4) +#define DAC_DHR12LD_DACC_MASK(n) (0xfff << DAC_DHR12LD_DACC_SHIFT(n)) + +#define DAC_DHR12LD_DACC1_SHIFT (4) /* Bits 4-15: DAC channel 1 12-bit left-aligned data */ +#define DAC_DHR12LD_DACC1_MASK (0xfff << DAC_DHR12LD_DACC1_SHIFT) +#define DAC_DHR12LD_DACC2_SHIFT (20) /* Bits 20-31: DAC channel 2 12-bit left-aligned data */ +#define DAC_DHR12LD_DACC2_MASK (0xfff << DAC_DHR12LD_DACC2_SHIFT) + +/* DUAL DAC 8-bit right aligned data holding register */ + +#define DAC_DHR8RD_DACC_SHIFT(n) (((n)-1) << 3) +#define DAC_DHR8RD_DACC_MASK(n) (0xff << DAC_DHR8RD_DACC_SHIFT(n)) + +#define DAC_DHR8RD_DACC1_SHIFT (0) /* Bits 0-7: DAC channel 1 8-bit right-aligned data */ +#define DAC_DHR8RD_DACC1_MASK (0xff << DAC_DHR8RD_DACC1_SHIFT) +#define DAC_DHR8RD_DACC2_SHIFT (8) /* Bits 8-15: DAC channel 2 8-bit right-aligned data */ +#define DAC_DHR8RD_DACC2_MASK (0xff << DAC_DHR8RD_DACC2_SHIFT) + +/* DAC channel 1/2 data output register */ + +#define DAC_DOR_MASK (0x0fff) + +/* DAC status register */ + +#define DAC_SR_DMAUDR(n) (1 << ((((n)-1) << 4) + 13)) +#define DAC_SR_DMAUDR1 (1 << 13) /* Bit 13: DAC channel 1 DMA underrun flag */ +#define DAC_SR_DMAUDR2 (1 << 29) /* Bit 29: DAC channel 2 DMA underrun flag */ + +#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32_DAC_V1_H */ diff --git a/arch/arm/src/stm32/hardware/stm32_exti.h b/arch/arm/src/stm32/hardware/stm32_exti.h index eb5e4540819..cc979719249 100644 --- a/arch/arm/src/stm32/hardware/stm32_exti.h +++ b/arch/arm/src/stm32/hardware/stm32_exti.h @@ -64,7 +64,7 @@ #if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) # define STM32_EXTI1_OFFSET 0x0000 /* Offset to EXTI1 registers */ -# define STM32_EXTI2_OFFSET 0x0018 /* Offset to EXTI2 registers */ +# define STM32_EXTI2_OFFSET 0x0020 /* Offset to EXTI2 registers */ #endif #define STM32_EXTI_IMR_OFFSET 0x0000 /* Interrupt mask register */ diff --git a/arch/arm/src/stm32/hardware/stm32g4xxxx_cordic.h b/arch/arm/src/stm32/hardware/stm32g4xxxx_cordic.h new file mode 100644 index 00000000000..e057fd5fd49 --- /dev/null +++ b/arch/arm/src/stm32/hardware/stm32g4xxxx_cordic.h @@ -0,0 +1,77 @@ +/**************************************************************************** + * arch/arm/src/stm32/hardware/stm32g4xxxx_cordic.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_CORDIC_H +#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_CORDIC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Register Offsets *********************************************************/ + +#define STM32_CORDIC_CSR_OFFSET 0x0000 /* CORDIC control/status register */ +#define STM32_CORDIC_WDATA_OFFSET 0x0004 /* CORDIC argument register */ +#define STM32_CORDIC_RDATA_OFFSET 0x0008 /* CORDIC result register */ + +/* Register Addresses *******************************************************/ + +#define STM32_CORDIC_CSR (STM32_CORDIC_BASE+STM32_CORDIC_CSR_OFFSET) +#define STM32_CORDIC_WDATA (STM32_CORDIC_BASE+STM32_CORDIC_WDATA_OFFSET) +#define STM32_CORDIC_RDATA (STM32_CORDIC_BASE+STM32_CORDIC_RDATA_OFFSET) + +/* Register Bitfield Definitions ********************************************/ + +/* CORDIC control and status register */ + +#define CORDIC_CSR_FUNC_SHIFT (0) /* Bits 0-3: Function */ +#define CORDIC_CSR_FUNC_MASK (7 << CORDIC_CSR_FUNC_SHIFT) +# define CORDIC_CSR_FUNC_COS (0 << CORDIC_CSR_FUNC_SHIFT) /* Cosine */ +# define CORDIC_CSR_FUNC_SIN (1 << CORDIC_CSR_FUNC_SHIFT) /* Sine */ +# define CORDIC_CSR_FUNC_PHASE (2 << CORDIC_CSR_FUNC_SHIFT) /* Phase */ +# define CORDIC_CSR_FUNC_MOD (3 << CORDIC_CSR_FUNC_SHIFT) /* Modulus */ +# define CORDIC_CSR_FUNC_ARCTAN (4 << CORDIC_CSR_FUNC_SHIFT) /* Arctangent */ +# define CORDIC_CSR_FUNC_HCOS (5 << CORDIC_CSR_FUNC_SHIFT) /* Hyperbolic cosine */ +# define CORDIC_CSR_FUNC_HSIN (6 << CORDIC_CSR_FUNC_SHIFT) /* Hyperbolic sine */ +# define CORDIC_CSR_FUNC_HARCTAN (7 << CORDIC_CSR_FUNC_SHIFT) /* Hyperbolic arctangent */ +# define CORDIC_CSR_FUNC_LN (8 << CORDIC_CSR_FUNC_SHIFT) /* Natural logarithm */ +# define CORDIC_CSR_FUNC_SQRT (9 << CORDIC_CSR_FUNC_SHIFT) /* Square root */ +#define CORDIC_CSR_PRECISION_SHIFT (4) /* Bits 4-7: Precision */ +#define CORDIC_CSR_PRECISION_MASK (7 << CORDIC_CSR_PRECISION_SHIFT) +#define CORDIC_CSR_SCALE_SHIFT (8) /* Bits 8-10: Scale */ +#define CORDIC_CSR_SCALE_MASK (3 << CORDIC_CSR_SCALE_SHIFT) +#define CORDIC_CSR_IEN (1 << 16) /* Bit 16: Enable interrupt */ +#define CORDIC_CSR_DMAREN (1 << 17) /* Bit 17: Enable DMA read channel */ +#define CORDIC_CSR_DMAWEN (1 << 18) /* Bit 18: Enable DMA write channel */ +#define CORDIC_CSR_NRES (1 << 19) /* Bit 19: Number of results in the CORDIC_RDATA register */ +#define CORDIC_CSR_NARGS (1 << 20) /* Bit 20: Number of arguments expected by the CORDIC_WDATA register */ +#define CORDIC_CSR_RESSIZE (1 << 21) /* Bit 21: Width of output data */ +#define CORDIC_CSR_ARGSIZE (1 << 22) /* Bit 22: Width of input data */ +#define CORDIC_CSR_RRDY (1 << 31) /* Bit 31: Result ready flag */ + +#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G4XXXX_CORDIC_H */ diff --git a/arch/arm/src/stm32/hardware/stm32gxxxxx_dac.h b/arch/arm/src/stm32/hardware/stm32gxxxxx_dac.h index 42b082c5734..d6939e00b4b 100644 --- a/arch/arm/src/stm32/hardware/stm32gxxxxx_dac.h +++ b/arch/arm/src/stm32/hardware/stm32gxxxxx_dac.h @@ -32,6 +32,11 @@ * Pre-processor Definitions ****************************************************************************/ +/* Configuration ************************************************************/ + +#define HAVE_IP_DAC_V2 +#undef HAVE_IP_DAC_V1 /* No DAC IPv1 */ + /* Register Offsets *********************************************************/ #define STM32_DAC_CR_OFFSET 0x0000 /* DAC control register */ @@ -60,7 +65,7 @@ /* Register Addresses *******************************************************/ -#if STM32_NDAC > 0 +#ifdef CONFIG_STM32_HAVE_DAC1 /* DAC1 */ # define STM32_DAC1_CR (STM32_DAC1_BASE + STM32_DAC_CR_OFFSET) @@ -87,9 +92,9 @@ # define STM32_DAC1_STR2 (STM32_DAC1_BASE + STM32_DAC_STR2_OFFSET) # define STM32_DAC1_STMODR (STM32_DAC1_BASE + STM32_DAC_STMODR_OFFSET) -#endif +#endif /* CONFIG_STM32_HAVE_DAC1 */ -#if STM32_NDAC > 1 +#ifdef CONFIG_STM32_HAVE_DAC2 /* DAC2 */ # define STM32_DAC2_CR (STM32_DAC2_BASE + STM32_DAC_CR_OFFSET) @@ -116,7 +121,36 @@ # define STM32_DAC2_STR2 (STM32_DAC2_BASE + STM32_DAC_STR2_OFFSET) # define STM32_DAC2_STMODR (STM32_DAC2_BASE + STM32_DAC_STMODR_OFFSET) -#endif +#endif /* CONFIG_STM32_HAVE_DAC2 */ + +#ifdef CONFIG_STM32_HAVE_DAC3 +/* DAC3 */ + +# define STM32_DAC3_CR (STM32_DAC3_BASE + STM32_DAC_CR_OFFSET) +# define STM32_DAC3_SWTRIGR (STM32_DAC3_BASE + STM32_DAC_SWTRIGR_OFFSET) +# define STM32_DAC3_DHR12R1 (STM32_DAC3_BASE + STM32_DAC_DHR12R1_OFFSET) +# define STM32_DAC3_DHR12L1 (STM32_DAC3_BASE + STM32_DAC_DHR12L1_OFFSET) +# define STM32_DAC3_DHR8R1 (STM32_DAC3_BASE + STM32_DAC_DHR8R1_OFFSET) +# define STM32_DAC3_DHR12R2 (STM32_DAC3_BASE + STM32_DAC_DHR12R2_OFFSET) +# define STM32_DAC3_DHR12L2 (STM32_DAC3_BASE + STM32_DAC_DHR12L2_OFFSET) +# define STM32_DAC3_DHR8R2 (STM32_DAC3_BASE + STM32_DAC_DHR8R2_OFFSET) +# define STM32_DAC3_DHR12RD (STM32_DAC3_BASE + STM32_DAC_DHR12RD_OFFSET) +# define STM32_DAC3_DHR12LD (STM32_DAC3_BASE + STM32_DAC_DHR12LD_OFFSET) +# define STM32_DAC3_DHR8RD (STM32_DAC3_BASE + STM32_DAC_DHR8RD_OFFSET) +# define STM32_DAC3_DOR1 (STM32_DAC3_BASE + STM32_DAC_DOR1_OFFSET) +# define STM32_DAC3_DOR2 (STM32_DAC3_BASE + STM32_DAC_DOR2_OFFSET) +# define STM32_DAC3_SR (STM32_DAC3_BASE + STM32_DAC_SR_OFFSET) +# define STM32_DAC3_CCR (STM32_DAC3_BASE + STM32_DAC_CCR_OFFSET) +# define STM32_DAC3_MCR (STM32_DAC3_BASE + STM32_DAC_MCR_OFFSET) +# define STM32_DAC3_SHSR1 (STM32_DAC3_BASE + STM32_DAC_SHSR1_OFFSET) +# define STM32_DAC3_SHSR2 (STM32_DAC3_BASE + STM32_DAC_SHSR2_OFFSET) +# define STM32_DAC3_SHHR (STM32_DAC3_BASE + STM32_DAC_SHHR_OFFSET) +# define STM32_DAC3_SHRR (STM32_DAC3_BASE + STM32_DAC_SHRR_OFFSET) +# define STM32_DAC3_STR1 (STM32_DAC3_BASE + STM32_DAC_STR1_OFFSET) +# define STM32_DAC3_STR2 (STM32_DAC3_BASE + STM32_DAC_STR2_OFFSET) +# define STM32_DAC3_STMODR (STM32_DAC3_BASE + STM32_DAC_STMODR_OFFSET) + +#endif /* CONFIG_STM32_HAVE_DAC3 */ /* Register Bitfield Definitions ********************************************/ @@ -375,7 +409,7 @@ #define DAC_SR_DACRDY(n) (1 << ((((n) - 1) << 4) + 11)) #define DAC_SR_DAC1RDY (1 << 11) /* Bit 13: DAC channel 1 ready status bit */ -#define DAC_SR_DAC2RDY (1 << 27) /* Bit 29: DAC channel 2 ready status bit */ +#define DAC_SR_DAC2RDY (1 << 27) /* Bit 27: DAC channel 2 ready status bit */ #define DAC_SR_DORSTAT(n) (1 << ((((n) - 1) << 4) + 12)) #define DAC_SR_DORSTAT1 (1 << 12) /* Bit 13: DAC channel 1 output register status bit */ @@ -448,10 +482,10 @@ #define DAC_MCR_HFSEL_SHIFT (14) /* High-frequency interface mode selection */ #define DAC_MCR_HFSEL_MASK (0x3 << DAC_MCR_HFSEL_SHIFT) -# define DAC_MCR_HFSEL_DISABLED (0x1 << DAC_MCR_HFSEL_SHIFT) /* High-frequency disabled */ -# define DAC_MCR_HFSEL_AHB_80MHz (0x2 << DAC_MCR_HFSEL_SHIFT) /* High-frequency for AHB > 80 MHz */ -# define DAC_MCR_HFSEL_AHB_160MHz (0x3 << DAC_MCR_HFSEL_SHIFT) /* High-frequency for AHB > 160 MHz */ -# define DAC_MCR_HFSEL_RESERVED (0x4 << DAC_MCR_HFSEL_SHIFT) /* Reserved */ +# define DAC_MCR_HFSEL_DISABLED (0x0 << DAC_MCR_HFSEL_SHIFT) /* High-frequency disabled */ +# define DAC_MCR_HFSEL_AHB_80MHz (0x1 << DAC_MCR_HFSEL_SHIFT) /* High-frequency for AHB > 80 MHz */ +# define DAC_MCR_HFSEL_AHB_160MHz (0x2 << DAC_MCR_HFSEL_SHIFT) /* High-frequency for AHB > 160 MHz */ +# define DAC_MCR_HFSEL_RESERVED (0x3 << DAC_MCR_HFSEL_SHIFT) /* Reserved */ /* DAC channel 1/2 sample and hold sample time register (SHSR1, SHSR2) */ diff --git a/arch/arm/src/stm32/stm32_1wire.c b/arch/arm/src/stm32/stm32_1wire.c index 297eb05ca9c..8dfc8ab7aa7 100644 --- a/arch/arm/src/stm32/stm32_1wire.c +++ b/arch/arm/src/stm32/stm32_1wire.c @@ -1,35 +1,20 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_1wire.c * - * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved. - * Author: Aleksandr Vyhovanec + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_1wire.h b/arch/arm/src/stm32/stm32_1wire.h index f03b2a322d2..305cb46412f 100644 --- a/arch/arm/src/stm32/stm32_1wire.h +++ b/arch/arm/src/stm32/stm32_1wire.h @@ -1,35 +1,20 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_1wire.h * - * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved. - * Author: Aleksandr Vyhovanec + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c index 0c176885933..31a5f819243 100644 --- a/arch/arm/src/stm32/stm32_adc.c +++ b/arch/arm/src/stm32/stm32_adc.c @@ -3871,6 +3871,14 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) break; } + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->rnchannels; + } + break; + case IO_TRIGGER_REG: { /* Start regular conversion if regular channels configured */ diff --git a/arch/arm/src/stm32/stm32_can.c b/arch/arm/src/stm32/stm32_can.c index 2547bf33a67..f0b398ebb9a 100644 --- a/arch/arm/src/stm32/stm32_can.c +++ b/arch/arm/src/stm32/stm32_can.c @@ -61,6 +61,7 @@ #include "chip.h" #include "stm32.h" +#include "stm32_rcc.h" #include "stm32_can.h" #if defined(CONFIG_CAN) && \ @@ -297,7 +298,7 @@ static uint32_t stm32can_vgetreg(uint32_t addr) { /* Yes.. then show how many times the value repeated */ - caninfo("[repeats %d more times]\n", count - 3); + caninfo("[repeats %" PRIu32 " more times]\n", count - 3); } /* Save the new address, value, and count */ @@ -309,7 +310,7 @@ static uint32_t stm32can_vgetreg(uint32_t addr) /* Show the register value read */ - caninfo("%08x->%08x\n", addr, val); + caninfo("%08" PRIx32 "->%08" PRIx32 "\n", addr, val); return val; } @@ -358,7 +359,7 @@ static void stm32can_vputreg(uint32_t addr, uint32_t value) { /* Show the register value being written */ - caninfo("%08x<-%08x\n", addr, value); + caninfo("%08" PRIx32 "->%08" PRIx32 "\n", addr, val); /* Write the value */ @@ -420,16 +421,16 @@ static void stm32can_dumpctrlregs(FAR struct stm32_can_s *priv, /* CAN control and status registers */ - caninfo(" MCR: %08x MSR: %08x TSR: %08x\n", + caninfo(" MCR: %08" PRIx32 " MSR: %08" PRIx32 " TSR: %08" PRIx32 "\n", getreg32(priv->base + STM32_CAN_MCR_OFFSET), getreg32(priv->base + STM32_CAN_MSR_OFFSET), getreg32(priv->base + STM32_CAN_TSR_OFFSET)); - caninfo(" RF0R: %08x RF1R: %08x\n", + caninfo(" RF0R: %08" PRIx32 " RF1R: %08" PRIx32 "\n", getreg32(priv->base + STM32_CAN_RF0R_OFFSET), getreg32(priv->base + STM32_CAN_RF1R_OFFSET)); - caninfo(" IER: %08x ESR: %08x BTR: %08x\n", + caninfo(" IER: %08" PRIx32 " ESR: %08" PRIx32 " BTR: %08" PRIx32 "\n", getreg32(priv->base + STM32_CAN_IER_OFFSET), getreg32(priv->base + STM32_CAN_ESR_OFFSET), getreg32(priv->base + STM32_CAN_BTR_OFFSET)); @@ -465,31 +466,36 @@ static void stm32can_dumpmbregs(FAR struct stm32_can_s *priv, /* CAN mailbox registers (3 TX and 2 RX) */ - caninfo(" TI0R: %08x TDT0R: %08x TDL0R: %08x TDH0R: %08x\n", + caninfo(" TI0R: %08" PRIx32 " TDT0R: %08" PRIx32 " TDL0R: %08" + PRIx32 " TDH0R: %08" PRIx32 "\n", getreg32(priv->base + STM32_CAN_TI0R_OFFSET), getreg32(priv->base + STM32_CAN_TDT0R_OFFSET), getreg32(priv->base + STM32_CAN_TDL0R_OFFSET), getreg32(priv->base + STM32_CAN_TDH0R_OFFSET)); - caninfo(" TI1R: %08x TDT1R: %08x TDL1R: %08x TDH1R: %08x\n", + caninfo(" TI1R: %08" PRIx32 " TDT1R: %08" PRIx32 " TDL1R: %08" + PRIx32 " TDH1R: %08" PRIx32 "\n", getreg32(priv->base + STM32_CAN_TI1R_OFFSET), getreg32(priv->base + STM32_CAN_TDT1R_OFFSET), getreg32(priv->base + STM32_CAN_TDL1R_OFFSET), getreg32(priv->base + STM32_CAN_TDH1R_OFFSET)); - caninfo(" TI2R: %08x TDT2R: %08x TDL2R: %08x TDH2R: %08x\n", + caninfo(" TI2R: %08" PRIx32 " TDT2R: %08" PRIx32 " TDL2R: %08" + PRIx32 " TDH2R: %08" PRIx32 "\n", getreg32(priv->base + STM32_CAN_TI2R_OFFSET), getreg32(priv->base + STM32_CAN_TDT2R_OFFSET), getreg32(priv->base + STM32_CAN_TDL2R_OFFSET), getreg32(priv->base + STM32_CAN_TDH2R_OFFSET)); - caninfo(" RI0R: %08x RDT0R: %08x RDL0R: %08x RDH0R: %08x\n", + caninfo(" RI0R: %08" PRIx32 " RDT0R: %08" PRIx32 " RDL0R: %08" + PRIx32 " RDH0R: %08" PRIx32 "\n", getreg32(priv->base + STM32_CAN_RI0R_OFFSET), getreg32(priv->base + STM32_CAN_RDT0R_OFFSET), getreg32(priv->base + STM32_CAN_RDL0R_OFFSET), getreg32(priv->base + STM32_CAN_RDH0R_OFFSET)); - caninfo(" RI1R: %08x RDT1R: %08x RDL1R: %08x RDH1R: %08x\n", + caninfo(" RI1R: %08" PRIx32 " RDT1R: %08" PRIx32 " RDL1R: %08" + PRIx32 " RDH1R: %08" PRIx32 "\n", getreg32(priv->base + STM32_CAN_RI1R_OFFSET), getreg32(priv->base + STM32_CAN_RDT1R_OFFSET), getreg32(priv->base + STM32_CAN_RDL1R_OFFSET), @@ -526,7 +532,8 @@ static void stm32can_dumpfiltregs(FAR struct stm32_can_s *priv, caninfo("Filter Registers:\n"); } - caninfo(" FMR: %08x FM1R: %08x FS1R: %08x FFA1R: %08x FA1R: %08x\n", + caninfo(" FMR: %08" PRIx32 " FM1R: %08" PRIx32 " FS1R: %08" + PRIx32 " FFA1R: %08" PRIx32 " FA1R: %08" PRIx32 "\n", getreg32(priv->base + STM32_CAN_FMR_OFFSET), getreg32(priv->base + STM32_CAN_FM1R_OFFSET), getreg32(priv->base + STM32_CAN_FS1R_OFFSET), @@ -535,7 +542,7 @@ static void stm32can_dumpfiltregs(FAR struct stm32_can_s *priv, for (i = 0; i < CAN_NFILTERS; i++) { - caninfo(" F%dR1: %08x F%dR2: %08x\n", + caninfo(" F%dR1: %08" PRIx32 " F%dR2: %08" PRIx32 "\n", i, getreg32(priv->base + STM32_CAN_FIR_OFFSET(i, 1)), i, getreg32(priv->base + STM32_CAN_FIR_OFFSET(i, 2))); } @@ -564,7 +571,7 @@ static void stm32can_reset(FAR struct can_dev_s *dev) uint32_t regbit = 0; irqstate_t flags; - caninfo("CAN%d\n", priv->port); + caninfo("CAN%" PRIu8 "\n", priv->port); /* Get the bits in the AHB1RSTR register needed to reset this CAN device */ @@ -626,7 +633,8 @@ static int stm32can_setup(FAR struct can_dev_s *dev) FAR struct stm32_can_s *priv = dev->cd_priv; int ret; - caninfo("CAN%d RX0 irq: %d RX1 irq: %d TX irq: %d\n", + caninfo("CAN%" PRIu8 " RX0 irq: %" PRIu8 " RX1 irq: %" PRIu8 + " TX irq: %" PRIu8 "\n", priv->port, priv->canrx[0], priv->canrx[1], priv->cantx); /* CAN cell initialization */ @@ -634,7 +642,7 @@ static int stm32can_setup(FAR struct can_dev_s *dev) ret = stm32can_cellinit(priv); if (ret < 0) { - canerr("ERROR: CAN%d cell initialization failed: %d\n", + canerr("ERROR: CAN%" PRId8 " cell initialization failed: %d\n", priv->port, ret); return ret; } @@ -647,7 +655,7 @@ static int stm32can_setup(FAR struct can_dev_s *dev) ret = stm32can_filterinit(priv); if (ret < 0) { - canerr("ERROR: CAN%d filter initialization failed: %d\n", + canerr("ERROR: CAN%" PRIu8 " filter initialization failed: %d\n", priv->port, ret); return ret; } @@ -661,7 +669,7 @@ static int stm32can_setup(FAR struct can_dev_s *dev) ret = irq_attach(priv->canrx[0], stm32can_rx0interrupt, dev); if (ret < 0) { - canerr("ERROR: Failed to attach CAN%d RX0 IRQ (%d)", + canerr("ERROR: Failed to attach CAN%" PRIu8 " RX0 IRQ (%" PRIu8 ")", priv->port, priv->canrx[0]); return ret; } @@ -669,7 +677,7 @@ static int stm32can_setup(FAR struct can_dev_s *dev) ret = irq_attach(priv->canrx[1], stm32can_rx1interrupt, dev); if (ret < 0) { - canerr("ERROR: Failed to attach CAN%d RX1 IRQ (%d)", + canerr("ERROR: Failed to attach CAN%" PRIu8 " RX1 IRQ (%" PRIu8 ")", priv->port, priv->canrx[1]); return ret; } @@ -677,7 +685,7 @@ static int stm32can_setup(FAR struct can_dev_s *dev) ret = irq_attach(priv->cantx, stm32can_txinterrupt, dev); if (ret < 0) { - canerr("ERROR: Failed to attach CAN%d TX IRQ (%d)", + canerr("ERROR: Failed to attach CAN%" PRIu8 " TX IRQ (%" PRIu8 ")", priv->port, priv->cantx); return ret; } @@ -712,7 +720,7 @@ static void stm32can_shutdown(FAR struct can_dev_s *dev) { FAR struct stm32_can_s *priv = dev->cd_priv; - caninfo("CAN%d\n", priv->port); + caninfo("CAN%" PRIu8 "\n", priv->port); /* Disable the RX FIFO 0/1 and TX interrupts */ @@ -750,7 +758,7 @@ static void stm32can_rxint(FAR struct can_dev_s *dev, bool enable) FAR struct stm32_can_s *priv = dev->cd_priv; uint32_t regval; - caninfo("CAN%d enable: %d\n", priv->port, enable); + caninfo("CAN%" PRIu8 " enable: %d\n", priv->port, enable); /* Enable/disable the FIFO 0/1 message pending interrupt */ @@ -786,7 +794,7 @@ static void stm32can_txint(FAR struct can_dev_s *dev, bool enable) FAR struct stm32_can_s *priv = dev->cd_priv; uint32_t regval; - caninfo("CAN%d enable: %d\n", priv->port, enable); + caninfo("CAN%" PRIu8 " enable: %d\n", priv->port, enable); /* Support only disabling the transmit mailbox interrupt */ @@ -925,7 +933,7 @@ static int stm32can_ioctl(FAR struct can_dev_s *dev, int cmd, DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX); } - caninfo("TS1: %d TS2: %d BRP: %" PRId32 "\n", + caninfo("TS1: %"PRIu8 " TS2: %" PRIu8 " BRP: %" PRIu32 "\n", bt->bt_tseg1, bt->bt_tseg2, brp); /* Configure bit timing. */ @@ -1223,7 +1231,7 @@ static int stm32can_send(FAR struct can_dev_s *dev, int dlc; int txmb; - caninfo("CAN%d ID: %" PRId32 " DLC: %d\n", + caninfo("CAN%" PRIu8 " ID: %" PRIu32 " DLC: %" PRIu8 "\n", priv->port, (uint32_t)msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc); /* Select one empty transmit mailbox */ @@ -1268,14 +1276,17 @@ static int stm32can_send(FAR struct can_dev_s *dev, DEBUGASSERT(msg->cm_hdr.ch_id < (1 << 11)); regval |= msg->cm_hdr.ch_id << CAN_TIR_STID_SHIFT; } + #else regval |= (((uint32_t) msg->cm_hdr.ch_id << CAN_TIR_STID_SHIFT) & - CAN_TIR_STID_MASK); + CAN_TIR_STID_MASK); + +#endif #ifdef CONFIG_CAN_USE_RTR regval |= (msg->cm_hdr.ch_rtr ? CAN_TIR_RTR : 0); #endif -#endif + stm32can_putreg(priv, STM32_CAN_TIR_OFFSET(txmb), regval); /* Set up the DLC */ @@ -1382,7 +1393,7 @@ static bool stm32can_txready(FAR struct can_dev_s *dev) /* Return true if any mailbox is available */ regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET); - caninfo("CAN%d TSR: %08" PRIx32 "\n", priv->port, regval); + caninfo("CAN%" PRIu8 " TSR: %08" PRIx32 "\n", priv->port, regval); return stm32can_txmb0empty(regval) || stm32can_txmb1empty(regval) || stm32can_txmb2empty(regval); @@ -1414,7 +1425,7 @@ static bool stm32can_txempty(FAR struct can_dev_s *dev) /* Return true if all mailboxes are available */ regval = stm32can_getreg(priv, STM32_CAN_TSR_OFFSET); - caninfo("CAN%d TSR: %08" PRIx32 "\n", priv->port, regval); + caninfo("CAN%" PRIu8 " TSR: %08" PRIx32 "\n", priv->port, regval); return stm32can_txmb0empty(regval) && stm32can_txmb1empty(regval) && stm32can_txmb2empty(regval); @@ -1720,8 +1731,8 @@ static int stm32can_bittiming(FAR struct stm32_can_s *priv) uint32_t ts1; uint32_t ts2; - caninfo("CAN%d PCLK1: %ld baud: %" PRId32 "\n", - priv->port, STM32_PCLK1_FREQUENCY, priv->baud); + caninfo("CAN%" PRIu8 " PCLK1: %lu baud: %" PRIu32 "\n", + priv->port, (unsigned long) STM32_PCLK1_FREQUENCY, priv->baud); /* Try to get CAN_BIT_QUANTA quanta in one bit_time. * @@ -1773,8 +1784,8 @@ static int stm32can_bittiming(FAR struct stm32_can_s *priv) DEBUGASSERT(brp >= 1 && brp <= CAN_BTR_BRP_MAX); } - caninfo("TS1: %" PRId32 " TS2: %" PRId32 " BRP: %" PRId32 "\n", - ts1, ts2, brp); + caninfo("TS1: %" PRIu32 " TS2: %" PRIu32 " BRP: %" PRIu32 "\n", + ts1, ts2, brp); /* Configure bit timing. This also does the following, less obvious * things. Unless loopback mode is enabled, it: @@ -1819,7 +1830,7 @@ static int stm32can_enterinitmode(FAR struct stm32_can_s *priv) uint32_t regval; volatile uint32_t timeout; - caninfo("CAN%d\n", priv->port); + caninfo("CAN%" PRIu8 "\n", priv->port); /* Enter initialization mode */ @@ -1893,9 +1904,8 @@ static int stm32can_exitinitmode(FAR struct stm32_can_s *priv) if (timeout < 1) { - canerr("ERROR: Timed out waiting to " - "exit initialization mode: %08" PRIx32 "\n", - regval); + canerr("ERROR: Timed out waiting to exit initialization mode: %08" + PRIx32 "\n", regval); return -ETIMEDOUT; } @@ -1921,7 +1931,7 @@ static int stm32can_cellinit(FAR struct stm32_can_s *priv) uint32_t regval; int ret; - caninfo("CAN%d\n", priv->port); + caninfo("CAN%" PRIu8 "\n", priv->port); /* Exit from sleep mode */ @@ -2004,7 +2014,7 @@ static int stm32can_filterinit(FAR struct stm32_can_s *priv) uint32_t regval; uint32_t bitmask; - caninfo("CAN%d filter: %d\n", priv->port, priv->filter); + caninfo("CAN%" PRIu8 " filter: %" PRIu8 "\n", priv->port, priv->filter); /* Get the bitmask associated with the filter used by this CAN block */ @@ -2241,7 +2251,7 @@ FAR struct can_dev_s *stm32_caninitialize(int port) { FAR struct can_dev_s *dev = NULL; - caninfo("CAN%d\n", port); + caninfo("CAN%" PRIu8 "\n", port); /* NOTE: Peripherical clocking for CAN1 and/or CAN2 was already provided * by stm32_clockconfig() early in the reset sequence. diff --git a/arch/arm/src/stm32/stm32_cordic.c b/arch/arm/src/stm32/stm32_cordic.c new file mode 100644 index 00000000000..8d3327b46b4 --- /dev/null +++ b/arch/arm/src/stm32/stm32_cordic.c @@ -0,0 +1,330 @@ +/**************************************************************************** + * arch/arm/src/stm32/stm32_cordic.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "arm_arch.h" +#include "chip.h" + +#include "hardware/stm32g4xxxx_cordic.h" + +#include "stm32_cordic.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define STM32_CORDIC_PRECISION (3) +#define STM32_CORDIC_ARGSIZE (0) /* Argument size is 32-bit */ +#define STM32_CORDIC_RESSIZE (0) /* Result size is 32-bit */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure represents the state of one PWM timer */ + +struct stm32_cordic_s +{ + FAR const struct cordic_ops_s *ops; /* Lower half operations */ + uint32_t base; /* The base address of the CORDIC */ + bool inuse; /* True: driver is in-use */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Register access */ + +static uint32_t cordic_getreg(FAR struct stm32_cordic_s *priv, int offset); +static void cordic_putreg(FAR struct stm32_cordic_s *priv, int offset, + uint32_t value); + +/* Ops */ + +int cordic_calc(FAR struct cordic_lowerhalf_s *lower, + FAR struct cordic_calc_s *calc); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* STM32 specific CORDIC ops */ + +struct cordic_ops_s g_stm32_cordic_ops = +{ + .calc = cordic_calc +}; + +/* STM32 CORDIC device */ + +struct stm32_cordic_s g_stm32_cordic_dev = +{ + .ops = &g_stm32_cordic_ops, + .base = STM32_CORDIC_BASE, + .inuse = false +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: cordic_getreg + ****************************************************************************/ + +static uint32_t cordic_getreg(FAR struct stm32_cordic_s *priv, int offset) +{ + return getreg32(priv->base + offset); +} + +/**************************************************************************** + * Name: cordic_putreg + ****************************************************************************/ + +static void cordic_putreg(FAR struct stm32_cordic_s *priv, int offset, + uint32_t value) +{ + putreg32(value, priv->base + offset); +} + +/**************************************************************************** + * Name: cordic_calc + ****************************************************************************/ + +int cordic_calc(FAR struct cordic_lowerhalf_s *lower, + FAR struct cordic_calc_s *calc) +{ + FAR struct stm32_cordic_s *priv = (FAR struct stm32_cordic_s *)lower; + int ret = OK; + uint32_t csr = 0; + bool arg2_inc = false; + uint8_t scale = 0; + + DEBUGASSERT(lower); + DEBUGASSERT(calc); + + /* Configure CORDIC function */ + + switch (calc->func) + { + case CORDIC_CALC_FUNC_COS: + { + csr |= CORDIC_CSR_FUNC_COS; + arg2_inc = true; + scale = 0; + break; + } + + case CORDIC_CALC_FUNC_SIN: + { + csr |= CORDIC_CSR_FUNC_SIN; + arg2_inc = true; + scale = 0; + break; + } + + case CORDIC_CALC_FUNC_PHASE: + { + csr |= CORDIC_CSR_FUNC_PHASE; + arg2_inc = true; + scale = 0; + break; + } + + case CORDIC_CALC_FUNC_MOD: + { + csr |= CORDIC_CSR_FUNC_MOD; + arg2_inc = true; + scale = 0; + break; + } + + case CORDIC_CALC_FUNC_ARCTAN: + { + csr |= CORDIC_CSR_FUNC_ARCTAN; + arg2_inc = true; + scale = 0; + break; + } + + case CORDIC_CALC_FUNC_HCOS: + { + csr |= CORDIC_CSR_FUNC_HCOS; + arg2_inc = false; + scale = 1; + break; + } + + case CORDIC_CALC_FUNC_HSIN: + { + csr |= CORDIC_CSR_FUNC_HSIN; + arg2_inc = false; + scale = 1; + break; + } + + case CORDIC_CALC_FUNC_HARCTAN: + { + csr |= CORDIC_CSR_FUNC_HARCTAN; + arg2_inc = false; + scale = 1; + break; + } + + case CORDIC_CALC_FUNC_LN: + { + csr |= CORDIC_CSR_FUNC_LN; + arg2_inc = false; + scale = 1; + break; + } + + case CORDIC_CALC_FUNC_SQRT: + { + csr |= CORDIC_CSR_FUNC_SQRT; + arg2_inc = false; + scale = 1; + break; + } + + default: + { + ret = -EINVAL; + goto errout; + } + } + + /* Configure precision */ + + csr |= ((STM32_CORDIC_PRECISION << CORDIC_CSR_PRECISION_SHIFT) & + CORDIC_CSR_PRECISION_MASK); + + /* Configure scale */ + + csr |= ((scale << CORDIC_CSR_SCALE_SHIFT) & CORDIC_CSR_SCALE_MASK); + + /* Configure width of output data */ + + csr |= STM32_CORDIC_RESSIZE; + + /* Configure width of input data */ + + csr |= STM32_CORDIC_ARGSIZE; + + /* Include secondary argument */ + + if (arg2_inc == true) + { + csr |= CORDIC_CSR_NARGS; + } + + /* Include secondary result */ + + if (calc->res2_incl == true) + { + csr |= CORDIC_CSR_NRES; + } + + /* Write CSR */ + + cordic_putreg(priv, STM32_CORDIC_CSR_OFFSET, csr); + + /* Write arguments */ + + cordic_putreg(priv, STM32_CORDIC_WDATA_OFFSET, calc->arg1); + + if (arg2_inc == true) + { + cordic_putreg(priv, STM32_CORDIC_WDATA_OFFSET, calc->arg2); + } + + /* Read results - blocking. + * NOTE: We don't need to wait for RRDY flag as wait sates are + * inserted automatically on RDATA read. + */ + + calc->res1 = cordic_getreg(priv, STM32_CORDIC_RDATA_OFFSET); + + if (calc->res2_incl == true) + { + calc->res2 = cordic_getreg(priv, STM32_CORDIC_RDATA_OFFSET); + } + else + { + calc->res2 = 0; + } + +errout: + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_cordicinitialize + * + * Description: + * Initialize a CORDIC device. This function must be called + * from board-specific logic. + * + * Returned Value: + * On success, a pointer to the lower half CORDIC driver is returned. + * NULL is returned on any failure. + * + ****************************************************************************/ + +FAR struct cordic_lowerhalf_s *stm32_cordicinitialize(void) +{ + FAR struct cordic_lowerhalf_s *lower = NULL; + + if (g_stm32_cordic_dev.inuse == true) + { + _err("STM32 CORDIC device already in use\n"); + set_errno(EBUSY); + goto errout; + } + + /* Get lower-half device */ + + lower = (FAR struct cordic_lowerhalf_s *) &g_stm32_cordic_dev; + + /* The driver is now in-use */ + + g_stm32_cordic_dev.inuse = true; + +errout: + return lower; +} diff --git a/arch/arm/src/stm32/stm32_cordic.h b/arch/arm/src/stm32/stm32_cordic.h new file mode 100644 index 00000000000..2baded4d5ba --- /dev/null +++ b/arch/arm/src/stm32/stm32_cordic.h @@ -0,0 +1,55 @@ +/**************************************************************************** + * arch/arm/src/stm32/stm32_cordic.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32_STM32_CORDIC_H +#define __ARCH_ARM_SRC_STM32_STM32_CORDIC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "chip.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_cordicinitialize + * + * Description: + * Initialize a CORDIC device. This function must be called + * from board-specific logic. + * + * Returned Value: + * On success, a pointer to the lower half CORDIC driver is returned. + * NULL is returned on any failure. + * + ****************************************************************************/ + +FAR struct cordic_lowerhalf_s *stm32_cordicinitialize(void); + +#endif /* __ARCH_ARM_SRC_STM32_STM32_CORDIC_H */ diff --git a/arch/arm/src/stm32/stm32_dac.c b/arch/arm/src/stm32/stm32_dac.c index 95c190e175d..4ff6036f8e2 100644 --- a/arch/arm/src/stm32/stm32_dac.c +++ b/arch/arm/src/stm32/stm32_dac.c @@ -52,6 +52,20 @@ * Pre-processor Definitions ****************************************************************************/ +/* RCC reset ****************************************************************/ + +#if defined(HAVE_IP_DAC_V1) +# define STM32_RCC_RSTR STM32_RCC_APB1RSTR +# define RCC_RSTR_DAC1RST RCC_APB1RSTR_DAC1RST +# define RCC_RSTR_DAC2RST RCC_APB1RSTR_DAC2RST +#elif defined(HAVE_IP_DAC_V2) +# define STM32_RCC_RSTR STM32_RCC_AHB2RSTR +# define RCC_RSTR_DAC1RST RCC_AHB2RSTR_DAC1RST +# define RCC_RSTR_DAC2RST RCC_AHB2RSTR_DAC2RST +# define RCC_RSTR_DAC3RST RCC_AHB2RSTR_DAC3RST +# define RCC_RSTR_DAC4RST RCC_AHB2RSTR_DAC4RST +#endif + /* Configuration ************************************************************/ /* Up to 2 DAC interfaces for up to 3 channels are supported @@ -87,8 +101,6 @@ # undef CONFIG_STM32_DAC1CH1_TIMER_FREQUENCY #endif -#if defined(CONFIG_STM32_DAC1) || defined(CONFIG_STM32_DAC2) - /* Sanity checking */ #ifdef CONFIG_STM32_DAC1 @@ -103,6 +115,18 @@ # endif #endif +#ifdef CONFIG_STM32_DAC3 +# if !defined(CONFIG_STM32_DAC3CH1) && !defined(CONFIG_STM32_DAC3CH2) +# error "DAC3 enabled but no channel was selected" +# endif +#endif + +#ifdef CONFIG_STM32_DAC4 +# if !defined(CONFIG_STM32_DAC4CH1) && !defined(CONFIG_STM32_DAC4CH2) +# error "DAC4 enabled but no channel was selected" +# endif +#endif + /* DMA configuration. */ #if defined(CONFIG_STM32_DAC1CH1_DMA) || defined(CONFIG_STM32_DAC1CH2_DMA) || \ @@ -541,9 +565,16 @@ struct stm32_chan_s #endif uint8_t intf; /* DAC zero-based interface number (0 or 1) */ uint32_t pin; /* Pin configuration */ +#ifdef HAVE_IP_DAC_V2 + uint32_t mode; /* DAC channel mode */ +#endif uint32_t dro; /* Data output register */ uint32_t cr; /* Control register */ uint32_t tsel; /* CR trigger select value */ +#ifdef HAVE_IP_DAC_V2 + uint32_t sr; /* Status register */ + uint32_t mcr; /* Mode Control register */ +#endif #ifdef HAVE_DMA uint16_t dmachan; /* DMA channel needed by this DAC */ uint16_t buffer_len; /* DMA buffer length */ @@ -624,8 +655,15 @@ static struct stm32_chan_s g_dac1ch1priv = { .intf = 0, .pin = GPIO_DAC1_OUT1, +#ifdef HAVE_IP_DAC_V2 + .mode = CONFIG_STM32_DAC1CH1_MODE; +#endif .dro = STM32_DAC1_DHR12R1, .cr = STM32_DAC1_CR, +#ifdef HAVE_IP_DAC_V2 + .sr = STM32_DAC1_SR, + .mcr = STM32_DAC1_MCR, +#endif #ifdef CONFIG_STM32_DAC1CH1_DMA .hasdma = 1, .dmachan = DAC1CH1_DMA_CHAN, @@ -665,8 +703,15 @@ static struct stm32_chan_s g_dac1ch2priv = { .intf = 1, .pin = GPIO_DAC1_OUT2, +#ifdef HAVE_IP_DAC_V2 + .mode = CONFIG_STM32_DAC1CH2_MODE << 16; +#endif .dro = STM32_DAC1_DHR12R2, .cr = STM32_DAC1_CR, +#ifdef HAVE_IP_DAC_V2 + .sr = STM32_DAC1_SR, + .mcr = STM32_DAC1_MCR, +#endif #ifdef CONFIG_STM32_DAC1CH2_DMA .hasdma = 1, .dmachan = DAC1CH2_DMA_CHAN, @@ -709,8 +754,15 @@ static struct stm32_chan_s g_dac2ch1priv = { .intf = 2, .pin = GPIO_DAC2_OUT1, +#ifdef HAVE_IP_DAC_V2 + .mode = CONFIG_STM32_DAC2CH1_MODE; +#endif .dro = STM32_DAC2_DHR12R1, .cr = STM32_DAC2_CR, +#ifdef HAVE_IP_DAC_V2 + .sr = STM32_DAC2_SR, + .mcr = STM32_DAC2_MCR, +#endif #ifdef CONFIG_STM32_DAC2CH1_DMA .hasdma = 1, .dmachan = DAC2CH1_DMA_CHAN, @@ -740,6 +792,64 @@ static struct dac_dev_s g_dac2ch1dev = #endif /* CONFIG_STM32_DAC2CH1 */ #endif /* CONFIG_STM32_DAC2 */ +#ifdef CONFIG_STM32_DAC3 +#ifdef CONFIG_STM32_DAC3CH1 +/* Channel 4: DAC3 channel 1 */ + +#ifdef CONFIG_STM32_DAC3CH1_DMA +# error "STM32_DAC3 DMA not supported" +#endif + +static struct stm32_chan_s g_dac3ch1priv = +{ + .intf = 4, + .dro = STM32_DAC3_DHR12R1, +#ifdef HAVE_IP_DAC_V2 + .mode = CONFIG_STM32_DAC3CH1_MODE; +#endif + .cr = STM32_DAC3_CR, +#ifdef HAVE_IP_DAC_V2 + .sr = STM32_DAC3_SR, + .mcr = STM32_DAC3_MCR, +#endif +}; + +static struct dac_dev_s g_dac3ch1dev = +{ + .ad_ops = &g_dacops, + .ad_priv = &g_dac3ch1priv, +}; +#endif /* CONFIG_STM32_DAC3CH1 */ + +#ifdef CONFIG_STM32_DAC3CH2 +/* Channel 5: DAC3 channel 1 */ + +#ifdef CONFIG_STM32_DAC3CH2_DMA +# error "STM32_DAC3 DMA not supported" +#endif + +static struct stm32_chan_s g_dac3ch2priv = +{ + .intf = 5, + .dro = STM32_DAC3_DHR12R2, +#ifdef HAVE_IP_DAC_V2 + .mode = CONFIG_STM32_DAC3CH2_MODE << 16, +#endif + .cr = STM32_DAC3_CR, +#ifdef HAVE_IP_DAC_V2 + .sr = STM32_DAC3_SR, + .mcr = STM32_DAC3_MCR, +#endif +}; + +static struct dac_dev_s g_dac3ch2dev = +{ + .ad_ops = &g_dacops, + .ad_priv = &g_dac3ch2priv, +}; +#endif /* CONFIG_STM32_DAC3CH2 */ +#endif /* CONFIG_STM32_DAC3 */ + static struct stm32_dac_s g_dacblock; /**************************************************************************** @@ -1012,6 +1122,18 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg) stm32_dac_modify_cr(chan, 0, DAC_CR_EN); } +#if defined(HAVE_IP_DAC_V2) + /* Check channelx ready status bit */ + + uint32_t regval; + uint32_t dac = (chan->intf >> 1); + do + { + regval = getreg32(chan->sr); + } + while (!(regval & DAC_SR_DACRDY(dac))); +#endif + #ifdef HAVE_DMA if (chan->hasdma) { @@ -1047,7 +1169,11 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg) { /* Non-DMA transfer */ +#if defined(HAVE_IP_DAC_V1) putreg16(msg->am_data, chan->dro); +#else + putreg32(msg->am_data, chan->dro); +#endif dac_txdone(dev); } @@ -1379,6 +1505,9 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan) { uint16_t clearbits; uint16_t setbits; +#if defined(HAVE_IP_DAC_V2) + uint32_t regval; +#endif #ifdef HAVE_TIMER int ret; #endif @@ -1400,7 +1529,12 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan) * should first be configured to analog (AIN)". */ - stm32_configgpio(chan->pin); + /* Only DAC1 and DAC2 have external pins */ + + if (chan->intf < 4) + { + stm32_configgpio(chan->pin); + } /* DAC channel configuration: * @@ -1415,15 +1549,44 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan) clearbits = DAC_CR_TSEL_MASK | DAC_CR_MAMP_MASK | - DAC_CR_WAVE_MASK | - DAC_CR_BOFF; + DAC_CR_WAVE_MASK; +#if defined (HAVE_IP_DAC_V1) + clearbits |= DAC_CR_BOFF; +#endif + setbits = chan->tsel | /* Set trigger source (SW or timer TRGO event) */ DAC_CR_MAMP_AMP1 | /* Set waveform characteristics */ - DAC_CR_WAVE_DISABLED | /* Set no noise */ - DAC_CR_BOFF_EN; /* Enable output buffer */ + DAC_CR_WAVE_DISABLED; /* Set wave generation disabled */ +#if defined (HAVE_IP_DAC_V1) + setbits |= DAC_CR_BOFF_EN; /* Enable output buffer */ +#endif + stm32_dac_modify_cr(chan, clearbits, setbits); +#if defined(HAVE_IP_DAC_V2) + /* High frequency interface mode selection */ + + if (STM32_SYSCLK_FREQUENCY > 160000000) + { + regval = DAC_MCR_HFSEL_AHB_160MHz; + } + else if (STM32_SYSCLK_FREQUENCY > 80000000) + { + regval = DAC_MCR_HFSEL_AHB_80MHz; + } + else + { + regval = DAC_MCR_HFSEL_DISABLED; + } + + /* DAC mode selection */ + + regval |= chan->mode; + + putreg32(regval, chan->mcr); +#endif + #ifdef HAVE_DMA /* Determine if DMA is supported by this channel */ @@ -1504,24 +1667,30 @@ static int dac_blockinit(void) /* Put the entire DAC block in reset state */ flags = enter_critical_section(); - regval = getreg32(STM32_RCC_APB1RSTR); + regval = getreg32(STM32_RCC_RSTR); #ifdef CONFIG_STM32_DAC1 - regval |= RCC_APB1RSTR_DAC1RST; + regval |= RCC_RSTR_DAC1RST; #endif #ifdef CONFIG_STM32_DAC2 - regval |= RCC_APB1RSTR_DAC2RST; + regval |= RCC_RSTR_DAC2RST; #endif - putreg32(regval, STM32_RCC_APB1RSTR); +#ifdef CONFIG_STM32_DAC3 + regval |= RCC_RSTR_DAC3RST; +#endif + putreg32(regval, STM32_RCC_RSTR); /* Take the DAC out of reset state */ #ifdef CONFIG_STM32_DAC1 - regval &= ~RCC_APB1RSTR_DAC1RST; + regval &= ~RCC_RSTR_DAC1RST; #endif #ifdef CONFIG_STM32_DAC2 - regval &= ~RCC_APB1RSTR_DAC2RST; + regval &= ~RCC_RSTR_DAC2RST; #endif - putreg32(regval, STM32_RCC_APB1RSTR); +#ifdef CONFIG_STM32_DAC3 + regval &= ~RCC_RSTR_DAC3RST; +#endif + putreg32(regval, STM32_RCC_RSTR); leave_critical_section(flags); /* Mark the DAC block as initialized */ @@ -1582,6 +1751,22 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf) } else #endif /* CONFIG_STM32_DAC2CH1 */ +#ifdef CONFIG_STM32_DAC3CH1 + if (intf == 4) + { + ainfo("DAC3-1 Selected\n"); + dev = &g_dac3ch1dev; + } + else +#endif /* CONFIG_STM32_DAC3CH1 */ +#ifdef CONFIG_STM32_DAC3CH2 + if (intf == 5) + { + ainfo("DAC3-2 Selected\n"); + dev = &g_dac3ch2dev; + } + else +#endif /* CONFIG_STM32_DAC3CH2 */ { aerr("ERROR: No such DAC interface: %d\n", intf); return NULL; @@ -1609,5 +1794,4 @@ FAR struct dac_dev_s *stm32_dacinitialize(int intf) return dev; } -#endif /* CONFIG_STM32_DAC1 || CONFIG_STM32_DAC2 */ #endif /* CONFIG_DAC */ diff --git a/arch/arm/src/stm32/stm32_foc.c b/arch/arm/src/stm32/stm32_foc.c index 2ceb104f363..f13df66198b 100644 --- a/arch/arm/src/stm32/stm32_foc.c +++ b/arch/arm/src/stm32/stm32_foc.c @@ -680,7 +680,7 @@ ****************************************************************************/ /* STM32 FOC devices. - * This strucutre gathers all low level drivers required by FOC device. + * This structure gathers all low level drivers required by FOC device. */ struct stm32_foc_dev_s @@ -1653,7 +1653,7 @@ static int stm32_foc_adc_handler(int irq, FAR void *context, FAR void *arg) STM32_ADC_INT_ACK(adc, pending); - /* Call interrupt handler if registerd */ + /* Call interrupt handler if registered */ if (foc_dev->adc_isr != NULL) { diff --git a/arch/arm/src/stm32/stm32_gpio.c b/arch/arm/src/stm32/stm32_gpio.c index 3e596495ad5..c5bc424f762 100644 --- a/arch/arm/src/stm32/stm32_gpio.c +++ b/arch/arm/src/stm32/stm32_gpio.c @@ -406,6 +406,7 @@ int stm32_configgpio(uint32_t cfgset) uintptr_t base; uint32_t regval; uint32_t setting; + uint32_t alt_setting; unsigned int regoffset; unsigned int port; unsigned int pin; @@ -463,6 +464,41 @@ int stm32_configgpio(uint32_t cfgset) flags = enter_critical_section(); + /* Determine the alternate function (Only alternate function pins) */ + + if (pinmode == GPIO_MODER_ALT) + { + alt_setting = (cfgset & GPIO_AF_MASK) >> GPIO_AF_SHIFT; + } + else + { + alt_setting = 0; + } + + /* Set the alternate function (Only alternate function pins) + * This is done before configuring the Outputs on a change to + * an Alternate function. + */ + + if (alt_setting != 0) + { + if (pin < 8) + { + regoffset = STM32_GPIO_AFRL_OFFSET; + pos = pin; + } + else + { + regoffset = STM32_GPIO_AFRH_OFFSET; + pos = pin - 8; + } + + regval = getreg32(base + regoffset); + regval &= ~GPIO_AFR_MASK(pos); + regval |= (alt_setting << GPIO_AFR_SHIFT(pos)); + putreg32(regval, base + regoffset); + } + /* Now apply the configuration to the mode register */ regval = getreg32(base + STM32_GPIO_MODER_OFFSET); @@ -496,32 +532,29 @@ int stm32_configgpio(uint32_t cfgset) regval |= (setting << GPIO_PUPDR_SHIFT(pin)); putreg32(regval, base + STM32_GPIO_PUPDR_OFFSET); - /* Set the alternate function (Only alternate function pins) */ + /* Set the alternate function (Only alternate function pins) + * This is done after configuring the the pin's connection + * on a change away from an Alternate function. + */ - if (pinmode == GPIO_MODER_ALT) - { - setting = (cfgset & GPIO_AF_MASK) >> GPIO_AF_SHIFT; - } - else - { - setting = 0; - } + if (alt_setting == 0) + { + if (pin < 8) + { + regoffset = STM32_GPIO_AFRL_OFFSET; + pos = pin; + } + else + { + regoffset = STM32_GPIO_AFRH_OFFSET; + pos = pin - 8; + } - if (pin < 8) - { - regoffset = STM32_GPIO_AFRL_OFFSET; - pos = pin; - } - else - { - regoffset = STM32_GPIO_AFRH_OFFSET; - pos = pin - 8; - } - - regval = getreg32(base + regoffset); - regval &= ~GPIO_AFR_MASK(pos); - regval |= (setting << GPIO_AFR_SHIFT(pos)); - putreg32(regval, base + regoffset); + regval = getreg32(base + regoffset); + regval &= ~GPIO_AFR_MASK(pos); + regval |= (alt_setting << GPIO_AFR_SHIFT(pos)); + putreg32(regval, base + regoffset); + } /* Set speed (Only outputs and alternate function pins) */ diff --git a/arch/arm/src/stm32/stm32_gpio.h b/arch/arm/src/stm32/stm32_gpio.h index 52a63bdb7c0..609b9cb33bf 100644 --- a/arch/arm/src/stm32/stm32_gpio.h +++ b/arch/arm/src/stm32/stm32_gpio.h @@ -437,10 +437,10 @@ int stm32_configgpio(uint32_t cfgset); * Description: * Unconfigure a GPIO pin based on bit-encoded description of the pin, set * it into default HiZ state (and possibly mark it's unused) and unlock it - * whether it was previsouly selected as alternative function + * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32/stm32_hall3ph.c b/arch/arm/src/stm32/stm32_hall3ph.c new file mode 100644 index 00000000000..4d6ae7117e1 --- /dev/null +++ b/arch/arm/src/stm32/stm32_hall3ph.c @@ -0,0 +1,209 @@ +/**************************************************************************** + * arch/arm/src/stm32/stm32_hall3ph.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "chip.h" +#include "arm_arch.h" +#include "stm32_hall3ph.h" + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct stm32_lowerhalf_s +{ + /* The first field of this state structure must be a pointer to the lower- + * half callback structure: + */ + + FAR const struct hall3_ops_s *ops; /* Lower half callback structure */ + struct stm32_hall3ph_cfg_s cfg; /* Configuration */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +int stm32_hall3ph_setup(FAR struct hall3_lowerhalf_s *lower); +int stm32_hall3ph_shutdown(FAR struct hall3_lowerhalf_s *lower); +int stm32_hall3ph_position(FAR struct hall3_lowerhalf_s *lower, + FAR uint8_t *pos); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +struct hall3_ops_s g_hall3ph_ops = +{ + .setup = stm32_hall3ph_setup, + .shutdown = stm32_hall3ph_shutdown, + .position = stm32_hall3ph_position +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_hall3ph_setup + * + * Description: + * Configure the 3-phase Hall effect sensor + * + ****************************************************************************/ + +int stm32_hall3ph_setup(FAR struct hall3_lowerhalf_s *lower) +{ + FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + + DEBUGASSERT(priv); + + /* Configure input pins */ + + stm32_configgpio(priv->cfg.gpio_pha); + stm32_configgpio(priv->cfg.gpio_phb); + stm32_configgpio(priv->cfg.gpio_phc); + + return OK; +} + +/**************************************************************************** + * Name: stm32_hall3ph_shutdown + * + * Description: + * Disable the 3-phase Hall effect sensor + * + ****************************************************************************/ + +int stm32_hall3ph_shutdown(FAR struct hall3_lowerhalf_s *lower) +{ + FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + + DEBUGASSERT(priv); + + /* Unconfigure input pins */ + + stm32_unconfiggpio(priv->cfg.gpio_pha); + stm32_unconfiggpio(priv->cfg.gpio_phb); + stm32_unconfiggpio(priv->cfg.gpio_phc); + + return OK; +} + +/**************************************************************************** + * Name: stm32_hall3ph_position + * + * Description: + * Return the current 3-phase Hall effect sensor position + * + ****************************************************************************/ + +int stm32_hall3ph_position(FAR struct hall3_lowerhalf_s *lower, + FAR uint8_t *pos) +{ + FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + uint8_t ha = 0; + uint8_t hb = 0; + uint8_t hc = 0; + uint8_t i = 0; + uint8_t thr = (priv->cfg.samples / 2); + + DEBUGASSERT(priv); + + /* Sample pins */ + + for (i = 0; i < priv->cfg.samples; i += 1) + { + ha += stm32_gpioread(priv->cfg.gpio_pha); + hb += stm32_gpioread(priv->cfg.gpio_phb); + hc += stm32_gpioread(priv->cfg.gpio_phc); + } + + /* Get state based on threshold */ + + *pos = ((ha > thr) << 0) | + ((hb > thr) << 1) | + ((hc > thr) << 2); + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_hall3ph_initialize + * + * Description: + * Initialize the 3-phase Hall effect driver + * + ****************************************************************************/ + +int stm32_hall3ph_initialize(FAR const char *devpath, + FAR struct stm32_hall3ph_cfg_s *cfg) +{ + FAR struct stm32_lowerhalf_s *priv = NULL; + int ret = OK; + + /* Allocate the lower-half data structure */ + + priv = (FAR struct stm32_lowerhalf_s *) + kmm_zalloc(sizeof(struct stm32_lowerhalf_s)); + if (priv == NULL) + { + snerr("ERROR: Allocation failed\n"); + ret = -ENOMEM; + goto errout; + } + + /* Copy configuration */ + + memcpy(&priv->cfg, cfg, sizeof(struct stm32_hall3ph_cfg_s)); + + /* Connect ops */ + + priv->ops = &g_hall3ph_ops; + + /* Initialize a Hall effect sensor interface. */ + + ret = hall3_register(devpath, (FAR struct hall3_lowerhalf_s *)priv); + if (ret < 0) + { + snerr("ERROR: hall3ph_register failed: %d\n", ret); + } + +errout: + return ret; +} diff --git a/arch/arm/src/armv7-m/gnu/arm_switchcontext.S b/arch/arm/src/stm32/stm32_hall3ph.h similarity index 61% rename from arch/arm/src/armv7-m/gnu/arm_switchcontext.S rename to arch/arm/src/stm32/stm32_hall3ph.h index 083957059ca..b6efb88a753 100644 --- a/arch/arm/src/armv7-m/gnu/arm_switchcontext.S +++ b/arch/arm/src/stm32/stm32_hall3ph.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/armv7-m/gnu/arm_switchcontext.S + * arch/arm/src/stm32/stm32_hall3ph.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,64 +18,46 @@ * ****************************************************************************/ +#ifndef __ARCH_ARM_SRC_STM32_STM32_HALL3PH_H +#define __ARCH_ARM_SRC_STM32_STM32_HALL3PH_H + /**************************************************************************** * Included Files ****************************************************************************/ #include -#include - -#include "nvic.h" -#include "svcall.h" /**************************************************************************** - * Pre-processor Definitions + * Public Types + ****************************************************************************/ + +/* 3-phase Hall effect sensor configuration */ + +struct stm32_hall3ph_cfg_s +{ + int gpio_pha; /* Hall phase A pincfg */ + int gpio_phb; /* Hall phase B pincfg */ + int gpio_phc; /* Hall phase C pincfg */ + int samples; /* Number of samples taken from GPIO */ +}; + +/**************************************************************************** + * Public Function Prototypes ****************************************************************************/ /**************************************************************************** - * Public Symbols - ****************************************************************************/ - - .syntax unified - .thumb - .file "arm_switchcontext.S" - -/**************************************************************************** - * Macros + * Name: stm32_hall3ph_initialize ****************************************************************************/ /**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: arm_switchcontext + * Name: stm32_hall3ph_initialize * * Description: - * Save the current thread context and restore the specified context. - * Full prototype is: - * - * void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); - * - * Returned Value: - * None + * Initialize the 3-phase Hall effect driver * ****************************************************************************/ - .thumb_func - .globl arm_switchcontext - .type arm_switchcontext, function -arm_switchcontext: +int stm32_hall3ph_initialize(FAR const char *devpath, + FAR struct stm32_hall3ph_cfg_s *cfg); - /* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */ - - mov r2, r1 /* R2: restoreregs */ - mov r1, r0 /* R1: saveregs */ - mov r0, #SYS_switch_context /* R0: context switch */ - svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */ - - /* We will get here only after the rerturn from the context switch */ - - bx lr - .size arm_switchcontext, .-arm_switchcontext - .end +#endif /* __ARCH_ARM_SRC_STM32_STM32_HALL3PH_H */ diff --git a/arch/arm/src/stm32/stm32_ltdc.c b/arch/arm/src/stm32/stm32_ltdc.c index 05b2225be48..fe6581de11d 100644 --- a/arch/arm/src/stm32/stm32_ltdc.c +++ b/arch/arm/src/stm32/stm32_ltdc.c @@ -1,36 +1,20 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_ltdc.c * - * Copyright (C) 2013-2015, 2018 Ken Pettit. All rights reserved. - * Authors: Ken Pettit - * Marco Krahl + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_ltdc.h b/arch/arm/src/stm32/stm32_ltdc.h index 795d2bcf2fe..31d61db94cf 100644 --- a/arch/arm/src/stm32/stm32_ltdc.h +++ b/arch/arm/src/stm32/stm32_ltdc.h @@ -1,36 +1,20 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_ltdc.h * - * Copyright (C) 2013-2014, 2018 Ken Pettit. All rights reserved. - * Authors: Ken Pettit - * Marco Krahl + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/stm32/stm32_otgfsdev.c b/arch/arm/src/stm32/stm32_otgfsdev.c index 8c6e24a3fa4..31e3a95e32d 100644 --- a/arch/arm/src/stm32/stm32_otgfsdev.c +++ b/arch/arm/src/stm32/stm32_otgfsdev.c @@ -2090,6 +2090,8 @@ static void stm32_usbreset(struct stm32_usbdev_s *priv) /* Reset IN endpoint status */ privep->stalled = false; + privep->active = false; + privep->zlp = false; /* Return read requests to the class implementation */ @@ -2099,6 +2101,8 @@ static void stm32_usbreset(struct stm32_usbdev_s *priv) /* Reset endpoint status */ privep->stalled = false; + privep->active = false; + privep->zlp = false; } stm32_putreg(0xffffffff, STM32_OTGFS_DAINT); @@ -4003,6 +4007,8 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, privep->ep.maxpacket = maxpacket; privep->eptype = eptype; privep->stalled = false; + privep->active = false; + privep->zlp = false; } /* Enable the interrupt for this endpoint */ @@ -4101,6 +4107,8 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, privep->ep.maxpacket = maxpacket; privep->eptype = eptype; privep->stalled = false; + privep->active = false; + privep->zlp = false; } /* Enable the interrupt for this endpoint */ diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c index e3f959bdb6c..78f57b244eb 100644 --- a/arch/arm/src/stm32/stm32_pwm.c +++ b/arch/arm/src/stm32/stm32_pwm.c @@ -3645,6 +3645,13 @@ static int pwm_duty_channels_update(FAR struct pwm_lowerhalf_s *dev, #endif { #ifdef CONFIG_PWM_MULTICHAN + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + duty = info->channels[i].duty; channel = info->channels[i].channel; @@ -4390,6 +4397,13 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++) { + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + /* Set output if channel configured */ if (info->channels[i].channel != 0) @@ -4440,159 +4454,11 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) { FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; irqstate_t flags = 0; - uint32_t resetbit = 0; - uint32_t regaddr = 0; - uint32_t regval = 0; + uint16_t outputs = 0; int ret = OK; pwminfo("TIM%u\n", priv->timid); - /* Determine which timer to reset */ - - switch (priv->timid) - { -#ifdef CONFIG_STM32_TIM1_PWM - case 1: - { - regaddr = TIMRCCRST_TIM1; - resetbit = TIMRST_TIM1; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM2_PWM - case 2: - { - regaddr = TIMRCCRST_TIM2; - resetbit = TIMRST_TIM2; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM3_PWM - case 3: - { - regaddr = TIMRCCRST_TIM3; - resetbit = TIMRST_TIM3; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM4_PWM - case 4: - { - regaddr = TIMRCCRST_TIM4; - resetbit = TIMRST_TIM4; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM5_PWM - case 5: - { - regaddr = TIMRCCRST_TIM5; - resetbit = TIMRST_TIM5; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM8_PWM - case 8: - { - regaddr = TIMRCCRST_TIM8; - resetbit = TIMRST_TIM8; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM9_PWM - case 9: - { - regaddr = TIMRCCRST_TIM9; - resetbit = TIMRST_TIM9; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM10_PWM - case 10: - { - regaddr = TIMRCCRST_TIM10; - resetbit = TIMRST_TIM10; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM11_PWM - case 11: - { - regaddr = TIMRCCRST_TIM11; - resetbit = TIMRST_TIM11; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM12_PWM - case 12: - { - regaddr = TIMRCCRST_TIM12; - resetbit = TIMRST_TIM12; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM13_PWM - case 13: - { - regaddr = TIMRCCRST_TIM13; - resetbit = TIMRST_TIM13; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM14_PWM - case 14: - { - regaddr = TIMRCCRST_TIM14; - resetbit = TIMRST_TIM14; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM15_PWM - case 15: - { - regaddr = TIMRCCRST_TIM15; - resetbit = TIMRST_TIM15; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM16_PWM - case 16: - { - regaddr = TIMRCCRST_TIM16; - resetbit = TIMRST_TIM16; - break; - } -#endif - -#ifdef CONFIG_STM32_TIM17_PWM - case 17: - { - regaddr = TIMRCCRST_TIM17; - resetbit = TIMRST_TIM17; - break; - } -#endif - - default: - { - ret = -EINVAL; - goto errout; - } - } - /* Disable interrupts momentary to stop any ongoing timer processing and * to prevent any concurrent access to the reset register. */ @@ -4608,23 +4474,16 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) pwm_putreg(priv, STM32_GTIM_DIER_OFFSET, 0); pwm_putreg(priv, STM32_GTIM_SR_OFFSET, 0); - /* Reset the timer - stopping the output and putting the timer back - * into a state where pwm_start() can be called. - */ + /* Disable the timer and timer outputs */ - regval = getreg32(regaddr); - regval |= resetbit; - putreg32(regval, regaddr); + pwm_timer_enable(dev, false); + outputs = pwm_outputs_from_channels(priv); + ret = pwm_outputs_enable(dev, outputs, false); - regval &= ~resetbit; - putreg32(regval, regaddr); leave_critical_section(flags); - pwminfo("regaddr: %08" PRIx32 " resetbit: %08" PRIx32 "\n", - regaddr, resetbit); pwm_dumpregs(dev, "After stop"); -errout: return ret; } diff --git a/arch/arm/src/stm32/stm32_qencoder.c b/arch/arm/src/stm32/stm32_qencoder.c index 6cc783e4aa6..14edc10e486 100644 --- a/arch/arm/src/stm32/stm32_qencoder.c +++ b/arch/arm/src/stm32/stm32_qencoder.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -70,36 +71,12 @@ # define TIM5_BITWIDTH 16 # define TIM8_BITWIDTH 16 -/* On the F3 series, TIM5 is 32-bit. All of the rest are 16-bit */ +/* On the F2, F3, F4 and G4 series, TIM2 and TIM5 are 32-bit. + * All of the rest are 16-bit + */ -#elif defined(CONFIG_STM32_STM32F30XX) - - /* If TIM5 is enabled, then we have 32-bit timers */ - -# if defined(CONFIG_STM32_TIM5_QE) -# define HAVE_32BIT_TIMERS 1 -# endif - - /* If TIM1,2,3,4, or 8 are enabled, then we have 16-bit timers */ - -# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM2_QE) || \ - defined(CONFIG_STM32_TIM3_QE) || defined(CONFIG_STM32_TIM4_QE) || \ - defined(CONFIG_STM32_TIM8_QE) -# define HAVE_16BIT_TIMERS 1 -# endif - - /* The width in bits of each timer */ - -# define TIM1_BITWIDTH 16 -# define TIM2_BITWIDTH 16 -# define TIM3_BITWIDTH 16 -# define TIM4_BITWIDTH 16 -# define TIM5_BITWIDTH 32 -# define TIM8_BITWIDTH 16 - -/* On the F4 series, TIM2 and TIM5 are 32-bit. All of the rest are 16-bit */ - -#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX) +#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F4XXX) || \ + defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32G4XXX) /* If TIM2 or TIM5 are enabled, then we have 32-bit timers */ @@ -196,12 +173,84 @@ GPIO_MODE_INPUT) #elif defined(CONFIG_STM32_STM32F20XX) || \ defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32F4XXX) + defined(CONFIG_STM32_STM32F4XXX) || \ + defined(CONFIG_STM32_STM32G4XXX) # define STM32_GPIO_INPUT_FLOAT (GPIO_INPUT | GPIO_FLOAT) #else # error "Unrecognized STM32 chip" #endif +/* RCC definitions */ + +#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F20XX) || \ + defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F4XXX) + +# define TIMRCCEN_TIM1 STM32_RCC_APB2ENR +# define TIMEN_TIM1 RCC_APB2ENR_TIM1EN +# define TIMRCCRST_TIM1 STM32_RCC_APB2RSTR +# define TIMRST_TIM1 RCC_APB2RSTR_TIM1RST + +# define TIMRCCEN_TIM2 STM32_RCC_APB1ENR +# define TIMEN_TIM2 RCC_APB1ENR_TIM2EN +# define TIMRCCRST_TIM2 STM32_RCC_APB1RSTR +# define TIMRST_TIM2 RCC_APB1RSTR_TIM2RST + +# define TIMRCCEN_TIM3 STM32_RCC_APB1ENR +# define TIMEN_TIM3 RCC_APB1ENR_TIM3EN +# define TIMRCCRST_TIM3 STM32_RCC_APB1RSTR +# define TIMRST_TIM3 RCC_APB1RSTR_TIM3RST + +# define TIMRCCEN_TIM4 STM32_RCC_APB1ENR +# define TIMEN_TIM4 RCC_APB1ENR_TIM4EN +# define TIMRCCRST_TIM4 STM32_RCC_APB1RSTR +# define TIMRST_TIM4 RCC_APB1RSTR_TIM4RST + +# define TIMRCCEN_TIM5 STM32_RCC_APB1ENR +# define TIMEN_TIM5 RCC_APB1ENR_TIM5EN +# define TIMRCCRST_TIM5 STM32_RCC_APB1RSTR +# define TIMRST_TIM5 RCC_APB1RSTR_TIM5RST + +# define TIMRCCEN_TIM8 STM32_RCC_APB2ENR +# define TIMEN_TIM8 RCC_APB2ENR_TIM8EN +# define TIMRCCRST_TIM8 STM32_RCC_APB2RSTR +# define TIMRST_TIM8 RCC_APB2RSTR_TIM8RST + +#elif defined(CONFIG_STM32_STM32G4XXX) + +# define TIMRCCEN_TIM1 STM32_RCC_APB2ENR +# define TIMEN_TIM1 RCC_APB2ENR_TIM1EN +# define TIMRCCRST_TIM1 STM32_RCC_APB2RSTR +# define TIMRST_TIM1 RCC_APB2RSTR_TIM1RST + +# define TIMRCCEN_TIM2 STM32_RCC_APB1ENR1 +# define TIMEN_TIM2 RCC_APB1ENR1_TIM2EN +# define TIMRCCRST_TIM2 STM32_RCC_APB1RSTR1 +# define TIMRST_TIM2 RCC_APB1RSTR1_TIM2RST + +# define TIMRCCEN_TIM3 STM32_RCC_APB1ENR1 +# define TIMEN_TIM3 RCC_APB1ENR1_TIM3EN +# define TIMRCCRST_TIM3 STM32_RCC_APB1RSTR1 +# define TIMRST_TIM3 RCC_APB1RSTR1_TIM3RST + +# define TIMRCCEN_TIM4 STM32_RCC_APB1ENR1 +# define TIMEN_TIM4 RCC_APB1ENR1_TIM4EN +# define TIMRCCRST_TIM4 STM32_RCC_APB1RSTR1 +# define TIMRST_TIM4 RCC_APB1RSTR1_TIM4RST + +# define TIMRCCEN_TIM5 STM32_RCC_APB1ENR1 +# define TIMEN_TIM5 RCC_APB1ENR1_TIM5EN +# define TIMRCCRST_TIM5 STM32_RCC_APB1RSTR1 +# define TIMRST_TIM5 RCC_APB1RSTR1_TIM5RST + +# define TIMRCCEN_TIM8 STM32_RCC_APB2ENR +# define TIMEN_TIM8 RCC_APB2ENR_TIM8EN +# define TIMRCCRST_TIM8 STM32_RCC_APB2RSTR +# define TIMRST_TIM8 RCC_APB2RSTR_TIM8RST + +#else +# error "Unrecognized STM32 chip" +#endif + /* Debug ********************************************************************/ /* Non-standard debug that may be enabled just for testing the quadrature @@ -264,7 +313,7 @@ struct stm32_lowerhalf_s bool inuse; /* True: The lower-half driver is in-use */ -#ifdef HAVE_16BIT_TIMERS +#ifndef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS volatile int32_t position; /* The current position offset */ #endif }; @@ -295,7 +344,7 @@ static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim); /* Interrupt handling */ -#ifdef HAVE_16BIT_TIMERS +#ifndef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS static int stm32_interrupt(int irq, FAR void *context, FAR void *arg); #endif @@ -305,6 +354,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower); static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower); static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos); +static int stm32_setposmax(FAR struct qe_lowerhalf_s *lower, uint32_t pos); static int stm32_reset(FAR struct qe_lowerhalf_s *lower); static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, unsigned long arg); @@ -317,11 +367,12 @@ static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, static const struct qe_ops_s g_qecallbacks = { - .setup = stm32_setup, - .shutdown = stm32_shutdown, - .position = stm32_position, - .reset = stm32_reset, - .ioctl = stm32_ioctl, + .setup = stm32_setup, + .shutdown = stm32_shutdown, + .position = stm32_position, + .setposmax = stm32_setposmax, + .reset = stm32_reset, + .ioctl = stm32_ioctl, }; /* Per-timer state structures */ @@ -334,8 +385,8 @@ static const struct stm32_qeconfig_s g_tim1config = #ifdef HAVE_MIXEDWIDTH_TIMERS .width = TIM1_BITWIDTH, #endif - .regaddr = STM32_RCC_APB2ENR, - .enable = RCC_APB2ENR_TIM1EN, + .regaddr = TIMRCCEN_TIM1, + .enable = TIMEN_TIM1, .base = STM32_TIM1_BASE, .psc = CONFIG_STM32_TIM1_QEPSC, .ti1cfg = GPIO_TIM1_CH1IN, @@ -359,8 +410,8 @@ static const struct stm32_qeconfig_s g_tim2config = #ifdef HAVE_MIXEDWIDTH_TIMERS .width = TIM2_BITWIDTH, #endif - .regaddr = STM32_RCC_APB1ENR, - .enable = RCC_APB1ENR_TIM2EN, + .regaddr = TIMRCCEN_TIM2, + .enable = TIMEN_TIM2, .base = STM32_TIM2_BASE, .psc = CONFIG_STM32_TIM2_QEPSC, .ti1cfg = GPIO_TIM2_CH1IN, @@ -384,8 +435,8 @@ static const struct stm32_qeconfig_s g_tim3config = #ifdef HAVE_MIXEDWIDTH_TIMERS .width = TIM3_BITWIDTH, #endif - .regaddr = STM32_RCC_APB1ENR, - .enable = RCC_APB1ENR_TIM3EN, + .regaddr = TIMRCCEN_TIM3, + .enable = TIMEN_TIM3, .base = STM32_TIM3_BASE, .psc = CONFIG_STM32_TIM3_QEPSC, .ti1cfg = GPIO_TIM3_CH1IN, @@ -409,8 +460,8 @@ static const struct stm32_qeconfig_s g_tim4config = #ifdef HAVE_MIXEDWIDTH_TIMERS .width = TIM4_BITWIDTH, #endif - .regaddr = STM32_RCC_APB1ENR, - .enable = RCC_APB1ENR_TIM4EN, + .regaddr = TIMRCCEN_TIM4, + .enable = TIMEN_TIM4, .base = STM32_TIM4_BASE, .psc = CONFIG_STM32_TIM4_QEPSC, .ti1cfg = GPIO_TIM4_CH1IN, @@ -434,8 +485,8 @@ static const struct stm32_qeconfig_s g_tim5config = #ifdef HAVE_MIXEDWIDTH_TIMERS .width = TIM5_BITWIDTH, #endif - .regaddr = STM32_RCC_APB1ENR, - .enable = RCC_APB1ENR_TIM5EN, + .regaddr = TIMRCCEN_TIM5, + .enable = TIMEN_TIM5, .base = STM32_TIM5_BASE, .psc = CONFIG_STM32_TIM5_QEPSC, .ti1cfg = GPIO_TIM5_CH1IN, @@ -459,8 +510,8 @@ static const struct stm32_qeconfig_s g_tim8config = #ifdef HAVE_MIXEDWIDTH_TIMERS .width = TIM8_BITWIDTH, #endif - .regaddr = STM32_RCC_APB2ENR, - .enable = RCC_APB2ENR_TIM8EN, + .regaddr = TIMRCCEN_TIM8, + .enable = TIMEN_TIM8, .base = STM32_TIM8_BASE, .psc = CONFIG_STM32_TIM8_QEPSC, .ti1cfg = GPIO_TIM8_CH1IN, @@ -675,7 +726,7 @@ static FAR struct stm32_lowerhalf_s *stm32_tim2lower(int tim) * ****************************************************************************/ -#ifdef HAVE_16BIT_TIMERS +#ifndef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS static int stm32_interrupt(int irq, FAR void *context, FAR void *arg) { FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)arg; @@ -728,7 +779,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower) uint32_t ccmr1; uint16_t ccer; uint16_t cr1; -#ifdef HAVE_16BIT_TIMERS +#ifndef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS uint16_t regval; int ret; #endif @@ -823,7 +874,11 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower) /* Select the Polarity=rising and set the CC1E Bit */ +#ifdef HAVE_GTIM_CCXNP ccer &= ~(GTIM_CCER_CC1P | GTIM_CCER_CC1NP); +#else + ccer &= ~(GTIM_CCER_CC1P); +#endif ccer |= GTIM_CCER_CC1E; /* Write to TIM CCMR1 and CCER registers */ @@ -859,7 +914,11 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower) /* Select the Polarity=rising and set the CC2E Bit */ +#ifdef HAVE_GTIM_CCXNP ccer &= ~(GTIM_CCER_CC2P | GTIM_CCER_CC2NP); +#else + ccer &= ~(GTIM_CCER_CC2P); +#endif ccer |= GTIM_CCER_CC2E; /* Write to TIM CCMR1 and CCER registers */ @@ -884,7 +943,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower) /* There is no need for interrupts with 32-bit timers */ -#ifdef HAVE_16BIT_TIMERS +#ifndef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS #ifdef HAVE_MIXEDWIDTH_TIMERS if (priv->config->width != 32) #endif @@ -917,7 +976,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower) /* There is no need for interrupts with 32-bit timers */ -#ifdef HAVE_16BIT_TIMERS +#ifndef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS #ifdef HAVE_MIXEDWIDTH_TIMERS if (priv->config->width != 32) #endif @@ -989,38 +1048,38 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower) { #ifdef CONFIG_STM32_TIM1_QE case 1: - regaddr = STM32_RCC_APB2RSTR; - resetbit = RCC_APB2RSTR_TIM1RST; + regaddr = TIMRCCRST_TIM1; + resetbit = TIMRST_TIM1; break; #endif #ifdef CONFIG_STM32_TIM2_QE case 2: - regaddr = STM32_RCC_APB1RSTR; - resetbit = RCC_APB1RSTR_TIM2RST; + regaddr = TIMRCCRST_TIM2; + resetbit = TIMRST_TIM2; break; #endif #ifdef CONFIG_STM32_TIM3_QE case 3: - regaddr = STM32_RCC_APB1RSTR; - resetbit = RCC_APB1RSTR_TIM3RST; + regaddr = TIMRCCRST_TIM3; + resetbit = TIMRST_TIM3; break; #endif #ifdef CONFIG_STM32_TIM4_QE case 4: - regaddr = STM32_RCC_APB1RSTR; - resetbit = RCC_APB1RSTR_TIM4RST; + regaddr = TIMRCCRST_TIM4; + resetbit = TIMRST_TIM4; break; #endif #ifdef CONFIG_STM32_TIM5_QE case 5: - regaddr = STM32_RCC_APB1RSTR; - resetbit = RCC_APB1RSTR_TIM5RST; + regaddr = TIMRCCRST_TIM5; + resetbit = TIMRST_TIM5; break; #endif #ifdef CONFIG_STM32_TIM8_QE case 8: - regaddr = STM32_RCC_APB2RSTR; - resetbit = RCC_APB2RSTR_TIM8RST; + regaddr = TIMRCCRST_TIM8; + resetbit = TIMRST_TIM8; break; #endif default: @@ -1039,7 +1098,9 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower) putreg32(regval, regaddr); leave_critical_section(flags); - sninfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit); + sninfo("regaddr: %08" PRIx32 " resetbit: %08" PRIx32 "\n", + regaddr, resetbit); + stm32_dumpregs(priv, "After stop"); /* Disable clocking to the timer */ @@ -1073,7 +1134,7 @@ static int stm32_shutdown(FAR struct qe_lowerhalf_s *lower) static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos) { FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; -#ifdef HAVE_16BIT_TIMERS +#ifndef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS int32_t position; int32_t verify; uint32_t count; @@ -1102,11 +1163,49 @@ static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos) #else /* Return the counter value */ +# if defined(HAVE_32BIT_TIMERS) *pos = (int32_t)stm32_getreg32(priv, STM32_GTIM_CNT_OFFSET); +# else + *pos = (int32_t)stm32_getreg16(priv, STM32_GTIM_CNT_OFFSET); +# endif #endif return OK; } +/**************************************************************************** + * Name: stm32_setposmax + * + * Description: + * Set the maximum encoder position. + * + ****************************************************************************/ + +static int stm32_setposmax(FAR struct qe_lowerhalf_s *lower, uint32_t pos) +{ +#ifdef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS + FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; + +#if defined(HAVE_MIXEDWIDTH_TIMERS) + if (priv->config->width == 32) + { + stm32_putreg32(priv, STM32_GTIM_ARR_OFFSET, pos); + } + else + { + stm32_putreg16(priv, STM32_GTIM_ARR_OFFSET, pos); + } +#elif defined(HAVE_32BIT_TIMERS) + stm32_putreg32(priv, STM32_GTIM_ARR_OFFSET, pos); +#else + stm32_putreg16(priv, STM32_GTIM_ARR_OFFSET, pos); +#endif + + return OK; +#else + return -ENOTTY; +#endif +} + /**************************************************************************** * Name: stm32_reset * @@ -1118,7 +1217,7 @@ static int stm32_position(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos) static int stm32_reset(FAR struct qe_lowerhalf_s *lower) { FAR struct stm32_lowerhalf_s *priv = (FAR struct stm32_lowerhalf_s *)lower; -#ifdef HAVE_16BIT_TIMERS +#ifndef CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS irqstate_t flags; sninfo("Resetting position to zero\n"); diff --git a/arch/arm/src/stm32/stm32_sdadc.c b/arch/arm/src/stm32/stm32_sdadc.c index fdc60f623ca..3ce2e9119e0 100644 --- a/arch/arm/src/stm32/stm32_sdadc.c +++ b/arch/arm/src/stm32/stm32_sdadc.c @@ -1193,12 +1193,24 @@ static int sdadc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) switch (cmd) { case ANIOC_TRIGGER: - sdadc_startconv(priv, true); + { + sdadc_startconv(priv, true); + } + break; + + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->cchannels; + } break; default: - aerr("ERROR: Unknown cmd: %d\n", cmd); - ret = -ENOTTY; + { + aerr("ERROR: Unknown cmd: %d\n", cmd); + ret = -ENOTTY; + } break; } diff --git a/arch/arm/src/stm32/stm32_sdio.c b/arch/arm/src/stm32/stm32_sdio.c index 3b38f7dbe29..cce6936f778 100644 --- a/arch/arm/src/stm32/stm32_sdio.c +++ b/arch/arm/src/stm32/stm32_sdio.c @@ -667,19 +667,18 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask, pinset = GPIO_SDIO_D0 & (GPIO_PORT_MASK | GPIO_PIN_MASK); pinset |= (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI); - /* Arm the SDIO_D Ready and install Isr */ + /* Arm the SDIO_D0 Ready and install Isr */ stm32_gpiosetevent(pinset, true, false, false, stm32_rdyinterrupt, priv); } - /* Disarm SDIO_D ready */ + /* Disarm SDIO_D0 ready and return it to SDIO D0 */ if ((wkupevent & SDIOWAIT_WRCOMPLETE) != 0) { stm32_gpiosetevent(GPIO_SDIO_D0, false, false, false, NULL, NULL); - stm32_configgpio(GPIO_SDIO_D0); } #endif diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c index 584215e5c8d..d5ceed73ec6 100644 --- a/arch/arm/src/stm32/stm32_serial.c +++ b/arch/arm/src/stm32/stm32_serial.c @@ -508,7 +508,8 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev, unsigned int nbuffered, bool upper); #endif static void up_send(struct uart_dev_s *dev, int ch); -#if defined(SERIAL_HAVE_RXDMA_OPS) || defined(SERIAL_HAVE_NODMA_OPS) +#if defined(SERIAL_HAVE_RXDMA_OPS) || defined(SERIAL_HAVE_NODMA_OPS) || \ + defined(CONFIG_STM32_SERIALBRK_BSDCOMPAT) static void up_txint(struct uart_dev_s *dev, bool enable); #endif static bool up_txready(struct uart_dev_s *dev); @@ -2919,7 +2920,8 @@ static void up_dma_txint(struct uart_dev_s *dev, bool enable) * ****************************************************************************/ -#if defined(SERIAL_HAVE_RXDMA_OPS) || defined(SERIAL_HAVE_NODMA_OPS) +#if defined(SERIAL_HAVE_RXDMA_OPS) || defined(SERIAL_HAVE_NODMA_OPS) || \ + defined(CONFIG_STM32_SERIALBRK_BSDCOMPAT) static void up_txint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s *)dev->priv; @@ -2962,6 +2964,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_restoreusartint(priv, ie); +#else /* Fake a TX interrupt here by just calling uart_xmitchars() with * interrupts disabled (note this may recurse). */ diff --git a/arch/arm/src/stm32/stm32_start.c b/arch/arm/src/stm32/stm32_start.c index 6a17d09fa21..5182f0f7c2d 100644 --- a/arch/arm/src/stm32/stm32_start.c +++ b/arch/arm/src/stm32/stm32_start.c @@ -100,7 +100,7 @@ static inline void stm32_fpuconfig(void); #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/stm32f0l0g0/Make.defs b/arch/arm/src/stm32f0l0g0/Make.defs index a1084592963..04da3dce8a4 100644 --- a/arch/arm/src/stm32f0l0g0/Make.defs +++ b/arch/arm/src/stm32f0l0g0/Make.defs @@ -19,7 +19,7 @@ ############################################################################ CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S -CMN_ASRCS += arm_switchcontext.S vfork.S +CMN_ASRCS += vfork.S CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c @@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c +CMN_CSRCS += arm_switchcontext.c ifeq ($(CONFIG_BUILD_PROTECTED),y) CMN_CSRCS += arm_task_start.c arm_pthread_start.c diff --git a/arch/arm/src/stm32f0l0g0/hardware/stm32_adc.h b/arch/arm/src/stm32f0l0g0/hardware/stm32_adc.h index c746dfa8421..5a6247faf44 100644 --- a/arch/arm/src/stm32f0l0g0/hardware/stm32_adc.h +++ b/arch/arm/src/stm32f0l0g0/hardware/stm32_adc.h @@ -61,7 +61,7 @@ # undef HAVE_ADC_VLCD #endif -/* Supprot for Low frequency mode */ +/* Support for Low frequency mode */ #ifdef CONFIG_STM32F0L0G0_ENERGYLITE # define HAVE_ADC_LFM diff --git a/arch/arm/src/stm32f0l0g0/stm32_adc.c b/arch/arm/src/stm32f0l0g0/stm32_adc.c index 29a62353aa3..4f4124f4500 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_adc.c +++ b/arch/arm/src/stm32f0l0g0/stm32_adc.c @@ -1960,6 +1960,14 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) break; } + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->cr_channels; + } + break; + case IO_TRIGGER_REG: { /* Start regular conversion if regular channels configured */ diff --git a/arch/arm/src/stm32f0l0g0/stm32_gpio.c b/arch/arm/src/stm32f0l0g0/stm32_gpio.c index bb9fe52b586..6ff70d0d86e 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_gpio.c +++ b/arch/arm/src/stm32f0l0g0/stm32_gpio.c @@ -344,10 +344,10 @@ int stm32_configgpio(uint32_t cfgset) * Description: * Unconfigure a GPIO pin based on bit-encoded description of the pin, set * it into default HiZ state (and possibly mark it's unused) and unlock it - * whether it was previsouly selected as alternative function + * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32f0l0g0/stm32_gpio.h b/arch/arm/src/stm32f0l0g0/stm32_gpio.h index 99fac4aa3a2..d9e5b004fc1 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_gpio.h +++ b/arch/arm/src/stm32f0l0g0/stm32_gpio.h @@ -262,10 +262,10 @@ int stm32_configgpio(uint32_t cfgset); * Description: * Unconfigure a GPIO pin based on bit-encoded description of the pin, set * it into default HiZ state (and possibly mark it's unused) and unlock it - * whether it was previsouly selected as alternative function + * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32f0l0g0/stm32_pwm.c b/arch/arm/src/stm32f0l0g0/stm32_pwm.c index 8efb04b73b9..941b49fe99e 100644 --- a/arch/arm/src/stm32f0l0g0/stm32_pwm.c +++ b/arch/arm/src/stm32f0l0g0/stm32_pwm.c @@ -1155,6 +1155,13 @@ static int stm32pwm_timer(FAR struct stm32_pwmtimer_s *priv, enum stm32_chanmode_e mode; #ifdef CONFIG_PWM_MULTICHAN + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + duty = info->channels[i].duty; channel = info->channels[i].channel; @@ -1946,6 +1953,13 @@ static int stm32pwm_start(FAR struct pwm_lowerhalf_s *dev, for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++) { + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + /* Set output if channel configured */ if (info->channels[i].channel != 0) diff --git a/arch/arm/src/stm32f7/Make.defs b/arch/arm/src/stm32f7/Make.defs index ad69a86c85f..73f01e1457c 100644 --- a/arch/arm/src/stm32f7/Make.defs +++ b/arch/arm/src/stm32f7/Make.defs @@ -23,7 +23,7 @@ # Common ARM and Cortex-M7 files -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -33,7 +33,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_unblocktask.c -CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CMN_CSRCS += arm_idle.c diff --git a/arch/arm/src/stm32f7/stm32_adc.c b/arch/arm/src/stm32f7/stm32_adc.c index f9a142d1190..ab070d67483 100644 --- a/arch/arm/src/stm32f7/stm32_adc.c +++ b/arch/arm/src/stm32f7/stm32_adc.c @@ -1651,12 +1651,24 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) switch (cmd) { case ANIOC_TRIGGER: - adc_startconv(priv, true); + { + adc_startconv(priv, true); + } + break; + + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->cchannels; + } break; default: - aerr("ERROR: Unknown cmd: %d\n", cmd); - ret = -ENOTTY; + { + aerr("ERROR: Unknown cmd: %d\n", cmd); + ret = -ENOTTY; + } break; } diff --git a/arch/arm/src/stm32f7/stm32_ethernet.c b/arch/arm/src/stm32f7/stm32_ethernet.c index fd8bfa62795..a02b34def72 100644 --- a/arch/arm/src/stm32f7/stm32_ethernet.c +++ b/arch/arm/src/stm32f7/stm32_ethernet.c @@ -666,16 +666,16 @@ struct stm32_ethmac_s /* Descriptor allocations */ static union stm32_rxdesc_u g_rxtable[RXTABLE_SIZE] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); static union stm32_txdesc_u g_txtable[TXTABLE_SIZE] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); /* Buffer allocations */ static uint8_t g_rxbuffer[RXBUFFER_ALLOC] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); static uint8_t g_txbuffer[TXBUFFER_ALLOC] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); /* These are the pre-allocated Ethernet device structures */ diff --git a/arch/arm/src/stm32f7/stm32_gpio.c b/arch/arm/src/stm32f7/stm32_gpio.c index dac28b76ce2..162776b2de2 100644 --- a/arch/arm/src/stm32f7/stm32_gpio.c +++ b/arch/arm/src/stm32f7/stm32_gpio.c @@ -114,6 +114,7 @@ int stm32_configgpio(uint32_t cfgset) uintptr_t base; uint32_t regval; uint32_t setting; + uint32_t alt_setting; unsigned int regoffset; unsigned int port; unsigned int pin; @@ -171,6 +172,41 @@ int stm32_configgpio(uint32_t cfgset) flags = enter_critical_section(); + /* Determine the alternate function (Only alternate function pins) */ + + if (pinmode == GPIO_MODER_ALT) + { + alt_setting = (cfgset & GPIO_AF_MASK) >> GPIO_AF_SHIFT; + } + else + { + alt_setting = 0; + } + + /* Set the alternate function (Only alternate function pins) + * This is done before configuring the Outputs on a change to + * an Alternate function. + */ + + if (alt_setting != 0) + { + if (pin < 8) + { + regoffset = STM32_GPIO_AFRL_OFFSET; + pos = pin; + } + else + { + regoffset = STM32_GPIO_AFRH_OFFSET; + pos = pin - 8; + } + + regval = getreg32(base + regoffset); + regval &= ~GPIO_AFR_MASK(pos); + regval |= (alt_setting << GPIO_AFR_SHIFT(pos)); + putreg32(regval, base + regoffset); + } + /* Now apply the configuration to the mode register */ regval = getreg32(base + STM32_GPIO_MODER_OFFSET); @@ -204,32 +240,29 @@ int stm32_configgpio(uint32_t cfgset) regval |= (setting << GPIO_PUPDR_SHIFT(pin)); putreg32(regval, base + STM32_GPIO_PUPDR_OFFSET); - /* Set the alternate function (Only alternate function pins) */ + /* Set the alternate function (Only alternate function pins) + * This is done after configuring the the pin's connection + * on a change away from an Alternate function. + */ - if (pinmode == GPIO_MODER_ALT) - { - setting = (cfgset & GPIO_AF_MASK) >> GPIO_AF_SHIFT; - } - else - { - setting = 0; - } + if (alt_setting == 0) + { + if (pin < 8) + { + regoffset = STM32_GPIO_AFRL_OFFSET; + pos = pin; + } + else + { + regoffset = STM32_GPIO_AFRH_OFFSET; + pos = pin - 8; + } - if (pin < 8) - { - regoffset = STM32_GPIO_AFRL_OFFSET; - pos = pin; - } - else - { - regoffset = STM32_GPIO_AFRH_OFFSET; - pos = pin - 8; - } - - regval = getreg32(base + regoffset); - regval &= ~GPIO_AFR_MASK(pos); - regval |= (setting << GPIO_AFR_SHIFT(pos)); - putreg32(regval, base + regoffset); + regval = getreg32(base + regoffset); + regval &= ~GPIO_AFR_MASK(pos); + regval |= (alt_setting << GPIO_AFR_SHIFT(pos)); + putreg32(regval, base + regoffset); + } /* Set speed (Only outputs and alternate function pins) */ @@ -327,7 +360,7 @@ int stm32_configgpio(uint32_t cfgset) * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32f7/stm32_gpio.h b/arch/arm/src/stm32f7/stm32_gpio.h index e51a575d791..07a2ab4b863 100644 --- a/arch/arm/src/stm32f7/stm32_gpio.h +++ b/arch/arm/src/stm32f7/stm32_gpio.h @@ -270,7 +270,7 @@ int stm32_configgpio(uint32_t cfgset); * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32f7/stm32_irq.c b/arch/arm/src/stm32f7/stm32_irq.c index 04d403c8df1..1515fbe362b 100644 --- a/arch/arm/src/stm32f7/stm32_irq.c +++ b/arch/arm/src/stm32f7/stm32_irq.c @@ -104,66 +104,73 @@ static void stm32_dumpnvic(const char *msg, int irq) flags = enter_critical_section(); irqinfo("NVIC (%s, irq=%d):\n", msg, irq); - irqinfo(" INTCTRL: %08x VECTAB: %08x\n", + irqinfo(" INTCTRL: %08" PRIx32 " VECTAB: %08" PRIx32 "\n", getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB)); #if 0 - irqinfo(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x " - "SYSTICK: %08x\n", + irqinfo(" SYSH ENABLE MEMFAULT: %08" PRIx32 " BUSFAULT: %08" PRIx32 " " + "USGFAULT: %08" PRIx32 " SYSTICK: %08" PRIx32 "\n", getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA), getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE)); #endif - irqinfo(" IRQ ENABLE: %08x %08x %08x\n", + irqinfo(" IRQ ENABLE: %08" PRIx32 " %08" PRIx32 " %08" PRIx32 "\n", getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE), getreg32(NVIC_IRQ64_95_ENABLE)); - irqinfo(" SYSH_PRIO: %08x %08x %08x\n", + irqinfo(" SYSH_PRIO: %08" PRIx32 " %08" PRIx32 " %08" PRIx32 "\n", getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY), getreg32(NVIC_SYSH12_15_PRIORITY)); - irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n", + irqinfo(" IRQ PRIO: %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " " + "%08" PRIx32 "\n", getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY), getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY)); #if STM32_IRQ_NEXTINTS > 15 - irqinfo(" %08x %08x %08x %08x\n", + irqinfo(" %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " " + "%08" PRIx32 "\n", getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY), getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY)); #endif #if STM32_IRQ_NEXTINTS > 31 - irqinfo(" %08x %08x %08x %08x\n", + irqinfo(" %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " " + "%08" PRIx32 "\n", getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY), getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY)); #endif #if STM32_IRQ_NEXTINTS > 47 - irqinfo(" %08x %08x %08x %08x\n", + irqinfo(" %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " " + "%08" PRIx32 "\n", getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY), getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY)); #endif #if STM32_IRQ_NEXTINTS > 63 - irqinfo(" %08x %08x %08x %08x\n", + irqinfo(" %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " " + "%08" PRIx32 "\n", getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY), getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY)); #endif #if STM32_IRQ_NEXTINTS > 79 - irqinfo(" %08x %08x %08x %08x\n", + irqinfo(" %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " " + "%08" PRIx32 "\n", getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY), getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY)); #endif #if STM32_IRQ_NEXTINTS > 95 - irqinfo(" %08x %08x %08x %08x\n", + irqinfo(" %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " " + "%08" PRIx32 "\n", getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY), getreg32(NVIC_IRQ104_107_PRIORITY), @@ -202,7 +209,8 @@ static int stm32_nmi(int irq, FAR void *context, FAR void *arg) static int stm32_busfault(int irq, FAR void *context, FAR void *arg) { up_irq_save(); - _err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS)); + _err("PANIC!!! Bus fault received: %08" PRIx32 "\n", + getreg32(NVIC_CFAULTS)); PANIC(); return 0; } @@ -210,7 +218,8 @@ static int stm32_busfault(int irq, FAR void *context, FAR void *arg) static int stm32_usagefault(int irq, FAR void *context, FAR void *arg) { up_irq_save(); - _err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS)); + _err("PANIC!!! Usage fault received: %08" PRIx32 "\n", + getreg32(NVIC_CFAULTS)); PANIC(); return 0; } diff --git a/arch/arm/src/stm32f7/stm32_ltdc.c b/arch/arm/src/stm32f7/stm32_ltdc.c index 19b58d77611..1ca8f91cbc6 100644 --- a/arch/arm/src/stm32f7/stm32_ltdc.c +++ b/arch/arm/src/stm32f7/stm32_ltdc.c @@ -1,36 +1,20 @@ /**************************************************************************** * arch/arm/src/stm32f7/stm32_ltdc.c * - * Copyright (C) 2013-2015, 2018 Ken Pettit. All rights reserved. - * Authors: Ken Pettit - * Marco Krahl + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/stm32f7/stm32_ltdc.h b/arch/arm/src/stm32f7/stm32_ltdc.h index df082a8d144..f59ba9fda20 100644 --- a/arch/arm/src/stm32f7/stm32_ltdc.h +++ b/arch/arm/src/stm32f7/stm32_ltdc.h @@ -1,36 +1,20 @@ /**************************************************************************** * arch/arm/src/stm32f7/stm32_ltdc.h * - * Copyright (C) 2013-2014, 2018 Ken Pettit. All rights reserved. - * Authors: Ken Pettit - * Marco Krahl + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/stm32f7/stm32_otgdev.c b/arch/arm/src/stm32f7/stm32_otgdev.c index 22a2e49cfe2..7884d1fda1b 100644 --- a/arch/arm/src/stm32f7/stm32_otgdev.c +++ b/arch/arm/src/stm32f7/stm32_otgdev.c @@ -2121,6 +2121,8 @@ static void stm32_usbreset(struct stm32_usbdev_s *priv) /* Reset IN endpoint status */ privep->stalled = false; + privep->active = false; + privep->zlp = false; /* Return read requests to the class implementation */ @@ -2130,6 +2132,8 @@ static void stm32_usbreset(struct stm32_usbdev_s *priv) /* Reset endpoint status */ privep->stalled = false; + privep->active = false; + privep->zlp = false; } stm32_putreg(0xffffffff, STM32_OTG_DAINT); @@ -4017,8 +4021,10 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, /* Save the endpoint configuration */ privep->ep.maxpacket = maxpacket; - privep->eptype = eptype; - privep->stalled = false; + privep->eptype = eptype; + privep->stalled = false; + privep->active = false; + privep->zlp = false; } /* Enable the interrupt for this endpoint */ @@ -4114,8 +4120,10 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, /* Save the endpoint configuration */ privep->ep.maxpacket = maxpacket; - privep->eptype = eptype; - privep->stalled = false; + privep->eptype = eptype; + privep->stalled = false; + privep->active = false; + privep->zlp = false; } /* Enable the interrupt for this endpoint */ diff --git a/arch/arm/src/stm32f7/stm32_pwm.c b/arch/arm/src/stm32f7/stm32_pwm.c index a0c8cd3de16..b047aa5bf82 100644 --- a/arch/arm/src/stm32f7/stm32_pwm.c +++ b/arch/arm/src/stm32f7/stm32_pwm.c @@ -1375,6 +1375,13 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, enum stm32_chanmode_e mode; #ifdef CONFIG_PWM_MULTICHAN + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + duty = info->channels[i].duty; channel = info->channels[i].channel; @@ -2187,6 +2194,13 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++) { + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + /* Set output if channel configured */ if (info->channels[i].channel != 0) diff --git a/arch/arm/src/stm32f7/stm32_qencoder.c b/arch/arm/src/stm32f7/stm32_qencoder.c index b8238da6bb2..cd9aedd3fab 100644 --- a/arch/arm/src/stm32f7/stm32_qencoder.c +++ b/arch/arm/src/stm32f7/stm32_qencoder.c @@ -263,11 +263,12 @@ static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, static const struct qe_ops_s g_qecallbacks = { - .setup = stm32_setup, - .shutdown = stm32_shutdown, - .position = stm32_position, - .reset = stm32_reset, - .ioctl = stm32_ioctl, + .setup = stm32_setup, + .shutdown = stm32_shutdown, + .position = stm32_position, + .setposmax = NULL, /* not supported yet */ + .reset = stm32_reset, + .ioctl = stm32_ioctl, }; /* Per-timer state structures */ diff --git a/arch/arm/src/stm32f7/stm32_sdmmc.c b/arch/arm/src/stm32f7/stm32_sdmmc.c index 920a02a9f03..0126f871b00 100644 --- a/arch/arm/src/stm32f7/stm32_sdmmc.c +++ b/arch/arm/src/stm32f7/stm32_sdmmc.c @@ -862,19 +862,18 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask, GPIO_PUPD_MASK); pinset |= (GPIO_INPUT | GPIO_EXTI); - /* Arm the SDMMC_D Ready and install Isr */ + /* Arm the SDMMC_D0 Ready and install Isr */ stm32_gpiosetevent(pinset, true, false, false, stm32_sdmmc_rdyinterrupt, priv); } - /* Disarm SDMMC_D ready */ + /* Disarm SDMMC_D0 ready and return it to SDMMC D0 */ if ((wkupevent & SDIOWAIT_WRCOMPLETE) != 0) { stm32_gpiosetevent(priv->d0_gpio, false, false, false, NULL, NULL); - stm32_configgpio(priv->d0_gpio); } #endif diff --git a/arch/arm/src/stm32f7/stm32_serial.c b/arch/arm/src/stm32f7/stm32_serial.c index 6b02a86a9b4..cc9559cde84 100644 --- a/arch/arm/src/stm32f7/stm32_serial.c +++ b/arch/arm/src/stm32f7/stm32_serial.c @@ -236,7 +236,7 @@ #if defined(CONFIG_ARMV7M_DCACHE) # define TXDMA_BUF_SIZE(b) (((b) + TXDMA_BUFFER_MASK) & ~TXDMA_BUFFER_MASK) -# define TXDMA_BUF_ALIGN aligned_data(ARMV7M_DCACHE_LINESIZE); +# define TXDMA_BUF_ALIGN aligned_data(ARMV7M_DCACHE_LINESIZE) #else # define TXDMA_BUF_SIZE(b) (b) # define TXDMA_BUF_ALIGN @@ -3336,6 +3336,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_restoreusartint(priv, ie); +#else /* Fake a TX interrupt here by just calling uart_xmitchars() with * interrupts disabled (note this may recurse). */ diff --git a/arch/arm/src/stm32f7/stm32_spi.c b/arch/arm/src/stm32f7/stm32_spi.c index 91665b8461f..0b7f1a853df 100644 --- a/arch/arm/src/stm32f7/stm32_spi.c +++ b/arch/arm/src/stm32f7/stm32_spi.c @@ -1841,7 +1841,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, { /* The dummy buffer is used to DMA with out increment into */ - static uint8_t rxdummy[4] __attribute__((aligned(4))); + static uint8_t rxdummy[4] aligned_data(4); static const uint16_t txdummy = 0xffff; spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", diff --git a/arch/arm/src/stm32f7/stm32_start.c b/arch/arm/src/stm32f7/stm32_start.c index 5472da4e43a..162fc98f620 100644 --- a/arch/arm/src/stm32f7/stm32_start.c +++ b/arch/arm/src/stm32f7/stm32_start.c @@ -94,7 +94,7 @@ static inline void stm32_fpuconfig(void); #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/stm32h7/Kconfig b/arch/arm/src/stm32h7/Kconfig index 29a9e858180..db108ba4eef 100644 --- a/arch/arm/src/stm32h7/Kconfig +++ b/arch/arm/src/stm32h7/Kconfig @@ -303,7 +303,7 @@ config STM32H7_FLASH_CR_PSIZE range 0 3 ---help--- On some hardware the fastest 64 bit wide flash writes cause too - high power consumption which may compromize the system stability. + high power consumption which may compromise the system stability. This option can be used to reduce the program size. The options are: 0: 8 bits 1: 16 bits @@ -1565,18 +1565,18 @@ config STM32H7_RTC_AUTO_LSECLOCK_START_DRV_CAPABILITY bool "Automatically boost the LSE oscillator drive capability level until it starts-up" default n ---help--- - This will cycle through the correct* values from low to high. To avoid - damaging the the crystal. We want to use the lowest setting that gets - the OSC running. See app note AN2867 + This will cycle through the correct* values from low to high. To + avoid damaging the crystal, we want to use the lowest setting that + gets the OSC running. See app note AN2867 0 = Low drive capability (default) 1 = Medium low drive capability 2 = Medium high drive capability 3 = High drive capability - *It will take into account the rev of the silicon and use - the correct code points to achive the drive strength. - See Eratta ES0392 Rev 7 2.2.14 LSE oscillator driving capability + *It will take into account the revision of the silicon and use + the correct code points to achieve the drive strength. + See Errata ES0392 Rev 7 2.2.14 LSE oscillator driving capability selection bits are swapped. config STM32H7_RTC_LSECLOCK_START_DRV_CAPABILITY @@ -1590,9 +1590,9 @@ config STM32H7_RTC_LSECLOCK_START_DRV_CAPABILITY 2 = Medium high drive capability 3 = High drive capability - It will take into account the rev of the silicon and use - the correct code points tp achive the drive strength. - See Eratta ES0392 Rev 7 2.2.14 LSE oscillator driving capability + It will take into account the revision of the silicon and use + the correct code points to achieve the drive strength. + See Errata ES0392 Rev 7 2.2.14 LSE oscillator driving capability selection bits are swapped. config STM32H7_RTC_LSECLOCK_RUN_DRV_CAPABILITY @@ -1606,14 +1606,13 @@ config STM32H7_RTC_LSECLOCK_RUN_DRV_CAPABILITY 2 = Medium high drive capability 3 = High drive capability - It will take into account the rev of the silicon and use - the correct code points tp achive the drive strength. - See Eratta ES0392 Rev 7 2.2.14 LSE oscillator driving capability + It will take into account the revision of the silicon and use + the correct code points to achieve the drive strength. + See Errata ES0392 Rev 7 2.2.14 LSE oscillator driving capability selection bits are swapped. - WARNING this RUN setting does not apear to work! - it apears that the LSEDRV bits can not be changes once the OSC - is running. + WARNING this RUN setting does not appear to work! It appears + that the LSEDRV bits cannot be changed once the OSC is running. endif # STM32H7_RTC_LSECLOCK diff --git a/arch/arm/src/stm32h7/Make.defs b/arch/arm/src/stm32h7/Make.defs index 6b6801bbcc0..f78faa6b8ed 100644 --- a/arch/arm/src/stm32h7/Make.defs +++ b/arch/arm/src/stm32h7/Make.defs @@ -23,7 +23,7 @@ # Common ARM and Cortex-M7 files -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -33,7 +33,7 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_udelay.c arm_unblocktask.c -CMN_CSRCS += arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c # Configuration-dependent common files diff --git a/arch/arm/src/stm32h7/hardware/stm32_dma.h b/arch/arm/src/stm32h7/hardware/stm32_dma.h index 64a6ab04100..eb00eb43fb9 100644 --- a/arch/arm/src/stm32h7/hardware/stm32_dma.h +++ b/arch/arm/src/stm32h7/hardware/stm32_dma.h @@ -319,7 +319,7 @@ #define DMA_SCR_DBM (1 << 18) /* Bit 15: Double buffer mode */ #define DMA_SCR_CT (1 << 19) /* Bit 19: Current target */ - /* Bit 20: Reserved */ +#define DMA_SCR_TRBUFF (1 << 20) /* Bit 20: Enable the DMA to handle bufferable transfers */ #define DMA_SCR_PBURST_SHIFT (21) /* Bits 21-22: Peripheral burst transfer configuration */ #define DMA_SCR_PBURST_MASK (3 << DMA_SCR_PBURST_SHIFT) # define DMA_SCR_PBURST_SINGLE (0 << DMA_SCR_PBURST_SHIFT) /* 00: Single transfer */ diff --git a/arch/arm/src/stm32h7/stm32_adc.c b/arch/arm/src/stm32h7/stm32_adc.c index 166714da2b5..a6a4023a37c 100644 --- a/arch/arm/src/stm32h7/stm32_adc.c +++ b/arch/arm/src/stm32h7/stm32_adc.c @@ -1760,7 +1760,17 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) switch (cmd) { case ANIOC_TRIGGER: - adc_startconv(priv, true); + { + adc_startconv(priv, true); + } + break; + + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->cchannels; + } break; case ANIOC_WDOG_UPPER: /* Set watchdog upper threshold */ diff --git a/arch/arm/src/stm32h7/stm32_allocateheap.c b/arch/arm/src/stm32h7/stm32_allocateheap.c index f74d7497b56..25197501316 100644 --- a/arch/arm/src/stm32h7/stm32_allocateheap.c +++ b/arch/arm/src/stm32h7/stm32_allocateheap.c @@ -91,7 +91,7 @@ * - BOARD_SDRAM2_SIZE, if defined, declares the size of SDRAM * at address STM32_FMC_BANK6. +1 to CONFIG_MM_REGIONS. * - * - Additionaly, you may use the following options to add one more region + * - Additionally, you may use the following options to add one more region * of memory to system heap: * * - CONFIG_ARCH_HAVE_HEAP2=y diff --git a/arch/arm/src/stm32h7/stm32_dma.c b/arch/arm/src/stm32h7/stm32_dma.c index eaf5003c889..e2cf7912181 100644 --- a/arch/arm/src/stm32h7/stm32_dma.c +++ b/arch/arm/src/stm32h7/stm32_dma.c @@ -1350,7 +1350,7 @@ static void stm32_sdma_setup(DMA_HANDLE handle, FAR stm32_dmacfg_t *cfg) scr &= (DMA_SCR_PFCTRL | DMA_SCR_DIR_MASK | DMA_SCR_PINC | DMA_SCR_MINC | DMA_SCR_PSIZE_MASK | DMA_SCR_MSIZE_MASK | DMA_SCR_PINCOS | DMA_SCR_DBM | DMA_SCR_CIRC | - DMA_SCR_PBURST_MASK | DMA_SCR_MBURST_MASK); + DMA_SCR_PBURST_MASK | DMA_SCR_MBURST_MASK | DMA_SCR_TRBUFF); regval |= scr; dmachan_putreg(dmachan, STM32_DMA_SCR_OFFSET, regval); } diff --git a/arch/arm/src/stm32h7/stm32_ethernet.c b/arch/arm/src/stm32h7/stm32_ethernet.c index 49a3eae706a..e8ce1d3de09 100644 --- a/arch/arm/src/stm32h7/stm32_ethernet.c +++ b/arch/arm/src/stm32h7/stm32_ethernet.c @@ -668,16 +668,16 @@ struct stm32_ethmac_s /* Descriptor allocations */ static union stm32_desc_u g_rxtable[RXTABLE_SIZE] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static union stm32_desc_u g_txtable[TXTABLE_SIZE] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); /* Buffer allocations */ static uint8_t g_rxbuffer[RXBUFFER_ALLOC] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static uint8_t g_txbuffer[TXBUFFER_ALLOC] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); /* These are the pre-allocated Ethernet device structures */ diff --git a/arch/arm/src/stm32h7/stm32_fmc.c b/arch/arm/src/stm32h7/stm32_fmc.c index 19bcf2d0ef5..934d8679a7f 100644 --- a/arch/arm/src/stm32h7/stm32_fmc.c +++ b/arch/arm/src/stm32h7/stm32_fmc.c @@ -91,7 +91,7 @@ * BOARD_FMC_SDCR[1..2] - Initial value for SDRAM control registers for SDRAM * bank 1-2. Note that some bits in SDCR1 influence both SDRAM banks and * are unused in SDCR2! - * BOARD_FMC_SDTR[1..2] - Initial value for SDRAM timing registeres for SDRAM + * BOARD_FMC_SDTR[1..2] - Initial value for SDRAM timing registers for SDRAM * bank 1-2. Note that some bits in SDTR1 influence both SDRAM banks and * are unused in SDTR2! * BOARD_FMC_SDRAM_REFR_PERIOD - The SDRAM refresh rate period in FMC clocks, diff --git a/arch/arm/src/stm32h7/stm32_gpio.c b/arch/arm/src/stm32h7/stm32_gpio.c index f2da8fdcdb0..cf5180a8c83 100644 --- a/arch/arm/src/stm32h7/stm32_gpio.c +++ b/arch/arm/src/stm32h7/stm32_gpio.c @@ -140,6 +140,7 @@ int stm32_configgpio(uint32_t cfgset) uintptr_t base; uint32_t regval; uint32_t setting; + uint32_t alt_setting; unsigned int regoffset; unsigned int port; unsigned int pin; @@ -201,6 +202,50 @@ int stm32_configgpio(uint32_t cfgset) flags = enter_critical_section(); + /* Determine the alternate function (Only alternate function pins) */ + + if (pinmode == GPIO_MODER_ALT) + { + setting = (cfgset & GPIO_AF_MASK) >> GPIO_AF_SHIFT; + } + else + { + setting = 0; + } + + if (pinmode == GPIO_MODER_ALT) + { + alt_setting = (cfgset & GPIO_AF_MASK) >> GPIO_AF_SHIFT; + } + else + { + alt_setting = 0; + } + + /* Set the alternate function (Only alternate function pins) + * This is done before configuring the Outputs on a change to + * an Alternate function. + */ + + if (alt_setting != 0) + { + if (pin < 8) + { + regoffset = STM32_GPIO_AFRL_OFFSET; + pos = pin; + } + else + { + regoffset = STM32_GPIO_AFRH_OFFSET; + pos = pin - 8; + } + + regval = getreg32(base + regoffset); + regval &= ~GPIO_AFR_MASK(pos); + regval |= (alt_setting << GPIO_AFR_SHIFT(pos)); + putreg32(regval, base + regoffset); + } + /* Now apply the configuration to the mode register */ regval = getreg32(base + STM32_GPIO_MODER_OFFSET); @@ -234,32 +279,29 @@ int stm32_configgpio(uint32_t cfgset) regval |= (setting << GPIO_PUPDR_SHIFT(pin)); putreg32(regval, base + STM32_GPIO_PUPDR_OFFSET); - /* Set the alternate function (Only alternate function pins) */ + /* Set the alternate function (Only alternate function pins) + * This is done after configuring the the pin's connection + * on a change away from an Alternate function. + */ - if (pinmode == GPIO_MODER_ALT) - { - setting = (cfgset & GPIO_AF_MASK) >> GPIO_AF_SHIFT; - } - else - { - setting = 0; - } + if (alt_setting == 0) + { + if (pin < 8) + { + regoffset = STM32_GPIO_AFRL_OFFSET; + pos = pin; + } + else + { + regoffset = STM32_GPIO_AFRH_OFFSET; + pos = pin - 8; + } - if (pin < 8) - { - regoffset = STM32_GPIO_AFRL_OFFSET; - pos = pin; - } - else - { - regoffset = STM32_GPIO_AFRH_OFFSET; - pos = pin - 8; - } - - regval = getreg32(base + regoffset); - regval &= ~GPIO_AFR_MASK(pos); - regval |= (setting << GPIO_AFR_SHIFT(pos)); - putreg32(regval, base + regoffset); + regval = getreg32(base + regoffset); + regval &= ~GPIO_AFR_MASK(pos); + regval |= (alt_setting << GPIO_AFR_SHIFT(pos)); + putreg32(regval, base + regoffset); + } /* Set speed (Only outputs and alternate function pins) */ diff --git a/arch/arm/src/stm32h7/stm32_gpio.h b/arch/arm/src/stm32h7/stm32_gpio.h index eaa39e9fe74..9b90cb6e6c6 100644 --- a/arch/arm/src/stm32h7/stm32_gpio.h +++ b/arch/arm/src/stm32h7/stm32_gpio.h @@ -292,7 +292,7 @@ int stm32_configgpio(uint32_t cfgset); * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32h7/stm32_otgdev.c b/arch/arm/src/stm32h7/stm32_otgdev.c index 56c5d8fe2c3..44c413e5fad 100644 --- a/arch/arm/src/stm32h7/stm32_otgdev.c +++ b/arch/arm/src/stm32h7/stm32_otgdev.c @@ -2080,6 +2080,8 @@ static void stm32_usbreset(struct stm32_usbdev_s *priv) /* Reset IN endpoint status */ privep->stalled = false; + privep->active = false; + privep->zlp = false; /* Return read requests to the class implementation */ @@ -2089,6 +2091,8 @@ static void stm32_usbreset(struct stm32_usbdev_s *priv) /* Reset endpoint status */ privep->stalled = false; + privep->active = false; + privep->zlp = false; } stm32_putreg(0xffffffff, STM32_OTG_DAINT); @@ -3959,6 +3963,8 @@ static int stm32_epout_configure(FAR struct stm32_ep_s *privep, privep->ep.maxpacket = maxpacket; privep->eptype = eptype; privep->stalled = false; + privep->active = false; + privep->zlp = false; } /* Enable the interrupt for this endpoint */ @@ -4030,6 +4036,8 @@ static int stm32_epin_configure(FAR struct stm32_ep_s *privep, privep->ep.maxpacket = maxpacket; privep->eptype = eptype; privep->stalled = false; + privep->active = false; + privep->zlp = false; } /* Enable the interrupt for this endpoint */ diff --git a/arch/arm/src/stm32h7/stm32_pmstandby.c b/arch/arm/src/stm32h7/stm32_pmstandby.c index 350efeed004..ed9eac77c0e 100644 --- a/arch/arm/src/stm32h7/stm32_pmstandby.c +++ b/arch/arm/src/stm32h7/stm32_pmstandby.c @@ -69,7 +69,7 @@ void stm32_pmstandby(void) { uint32_t regval; - /* Clear the wake-up flags before reseting. */ + /* Clear the wake-up flags before resetting. */ modifyreg32(STM32_PWR_CPUCR, 0, STM32_PWR_CPUCR_CSSF); modifyreg32(STM32_PWR_WKUPCR, 0, STM32_PWR_WKUPC1 | STM32_PWR_WKUPC2 | diff --git a/arch/arm/src/stm32h7/stm32_pwm.c b/arch/arm/src/stm32h7/stm32_pwm.c index 145d7ca38dc..101f9b8f9cb 100644 --- a/arch/arm/src/stm32h7/stm32_pwm.c +++ b/arch/arm/src/stm32h7/stm32_pwm.c @@ -3324,6 +3324,13 @@ static int pwm_duty_channels_update(FAR struct pwm_lowerhalf_s *dev, #endif { #ifdef CONFIG_PWM_MULTICHAN + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + duty = info->channels[i].duty; channel = info->channels[i].channel; @@ -4029,6 +4036,13 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++) { + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + /* Set output if channel configured */ if (info->channels[i].channel != 0) diff --git a/arch/arm/src/stm32h7/stm32_qencoder.c b/arch/arm/src/stm32h7/stm32_qencoder.c index b0259d2309c..c55216a6295 100644 --- a/arch/arm/src/stm32h7/stm32_qencoder.c +++ b/arch/arm/src/stm32h7/stm32_qencoder.c @@ -263,11 +263,12 @@ static int stm32_ioctl(FAR struct qe_lowerhalf_s *lower, int cmd, static const struct qe_ops_s g_qecallbacks = { - .setup = stm32_setup, - .shutdown = stm32_shutdown, - .position = stm32_position, - .reset = stm32_reset, - .ioctl = stm32_ioctl, + .setup = stm32_setup, + .shutdown = stm32_shutdown, + .position = stm32_position, + .setposmax = NULL, /* not supported yet */ + .reset = stm32_reset, + .ioctl = stm32_ioctl, }; /* Per-timer state structures */ diff --git a/arch/arm/src/stm32h7/stm32_sdmmc.c b/arch/arm/src/stm32h7/stm32_sdmmc.c index 7336859b9ec..09c65cf81a3 100644 --- a/arch/arm/src/stm32h7/stm32_sdmmc.c +++ b/arch/arm/src/stm32h7/stm32_sdmmc.c @@ -372,7 +372,7 @@ struct stm32_dev_s struct work_s cbfifo; /* Monitor for Lame FIFO */ #endif uint8_t rxfifo[FIFO_SIZE_IN_BYTES] /* To offload with IDMA */ - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); #if defined(CONFIG_ARMV7M_DCACHE) && defined(CONFIG_STM32H7_SDMMC_IDMA) bool unaligned_rx; /* read buffer is not cache-line aligned */ #endif @@ -649,7 +649,7 @@ static struct stm32_sampleregs_s g_sampleregs[DEBUG_NSAMPLES]; /* Input dma buffer for unaligned transfers */ #if defined(CONFIG_ARMV7M_DCACHE) && defined(CONFIG_STM32H7_SDMMC_IDMA) static uint8_t sdmmc_rxbuffer[SDMMC_MAX_BLOCK_SIZE] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); #endif /**************************************************************************** @@ -801,19 +801,18 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask, GPIO_PUPD_MASK); pinset |= (GPIO_INPUT | GPIO_EXTI); - /* Arm the SDMMC_D Ready and install Isr */ + /* Arm the SDMMC_D0 Ready and install Isr */ stm32_gpiosetevent(pinset, true, false, false, stm32_sdmmc_rdyinterrupt, priv); } - /* Disarm SDMMC_D ready */ + /* Disarm SDMMC_D0 ready and return it to SDMMC D0 */ if ((wkupevent & SDIOWAIT_WRCOMPLETE) != 0) { stm32_gpiosetevent(priv->d0_gpio, false, false, false, NULL, NULL); - stm32_configgpio(priv->d0_gpio); } #endif diff --git a/arch/arm/src/stm32h7/stm32_serial.c b/arch/arm/src/stm32h7/stm32_serial.c index e5c4e38d4fd..9ca3186ed16 100644 --- a/arch/arm/src/stm32h7/stm32_serial.c +++ b/arch/arm/src/stm32h7/stm32_serial.c @@ -379,7 +379,7 @@ #if defined(CONFIG_ARMV7M_DCACHE) # define TXDMA_BUF_SIZE(b) (((b) + TXDMA_BUFFER_MASK) & ~TXDMA_BUFFER_MASK) -# define TXDMA_BUF_ALIGN aligned_data(ARMV7M_DCACHE_LINESIZE); +# define TXDMA_BUF_ALIGN aligned_data(ARMV7M_DCACHE_LINESIZE) #else # define TXDMA_BUF_SIZE(b) (b) # define TXDMA_BUF_ALIGN @@ -467,7 +467,8 @@ DMA_SCR_MSIZE_8BITS | \ DMA_SCR_PBURST_SINGLE | \ DMA_SCR_MBURST_SINGLE | \ - CONFIG_USART_TXDMAPRIO) + CONFIG_USART_TXDMAPRIO | \ + DMA_SCR_TRBUFF) #endif /* SERIAL_HAVE_TXDMA */ @@ -3530,6 +3531,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) up_restoreusartint(priv, ie); +#else /* Fake a TX interrupt here by just calling uart_xmitchars() with * interrupts disabled (note this may recurse). */ diff --git a/arch/arm/src/stm32h7/stm32_spi.c b/arch/arm/src/stm32h7/stm32_spi.c index 5a23adf57b9..be8d9686a0a 100644 --- a/arch/arm/src/stm32h7/stm32_spi.c +++ b/arch/arm/src/stm32h7/stm32_spi.c @@ -1964,7 +1964,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, stm32_dmacfg_t rxdmacfg; stm32_dmacfg_t txdmacfg; static uint8_t rxdummy[ARMV7M_DCACHE_LINESIZE] - __attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); + aligned_data(ARMV7M_DCACHE_LINESIZE); static const uint16_t txdummy = 0xffff; FAR void * orig_rxbuffer = rxbuffer; diff --git a/arch/arm/src/stm32h7/stm32_spi.h b/arch/arm/src/stm32h7/stm32_spi.h index 45babad4101..9865d2a7e09 100644 --- a/arch/arm/src/stm32h7/stm32_spi.h +++ b/arch/arm/src/stm32h7/stm32_spi.h @@ -75,7 +75,7 @@ FAR struct spi_dev_s *stm32_spibus_initialize(int bus); * bus number * * Returned Value: - * Valid SPI device structure reference on succcess; a NULL on failure + * Valid SPI device structure reference on success; a NULL on failure * ****************************************************************************/ diff --git a/arch/arm/src/stm32h7/stm32_spi_slave.c b/arch/arm/src/stm32h7/stm32_spi_slave.c index 193153cb09e..ea13f643ed5 100644 --- a/arch/arm/src/stm32h7/stm32_spi_slave.c +++ b/arch/arm/src/stm32h7/stm32_spi_slave.c @@ -344,10 +344,10 @@ static const struct spi_slave_ctrlrops_s g_ctrlr_ops = static uint8_t SPI_SLAVE_OUTQ(1)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static uint8_t SPI_SLAVE_INQ(1)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static struct stm32_spidev_s g_spi1ctrlr = SPI_SLAVE_INIT(1); #endif @@ -356,10 +356,10 @@ static struct stm32_spidev_s g_spi1ctrlr = SPI_SLAVE_INIT(1); static uint8_t SPI_SLAVE_OUTQ(2)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static uint8_t SPI_SLAVE_INQ(2)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static struct stm32_spidev_s g_spi2ctrlr = SPI_SLAVE_INIT(2); #endif @@ -368,10 +368,10 @@ static struct stm32_spidev_s g_spi2ctrlr = SPI_SLAVE_INIT(2); static uint8_t SPI_SLAVE_OUTQ(3)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static uint8_t SPI_SLAVE_INQ(3)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static struct stm32_spidev_s g_spi3ctrlr = SPI_SLAVE_INIT(3); #endif @@ -380,10 +380,10 @@ static struct stm32_spidev_s g_spi3ctrlr = SPI_SLAVE_INIT(3); static uint8_t SPI_SLAVE_OUTQ(4)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static uint8_t SPI_SLAVE_INQ(4)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static struct stm32_spidev_s g_spi4ctrlr = SPI_SLAVE_INIT(4); #endif @@ -392,10 +392,10 @@ static struct stm32_spidev_s g_spi4ctrlr = SPI_SLAVE_INIT(4); static uint8_t SPI_SLAVE_OUTQ(5)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static uint8_t SPI_SLAVE_INQ(5)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static struct stm32_spidev_s g_spi5ctrlr = SPI_SLAVE_INIT(5); #endif @@ -406,10 +406,10 @@ static struct stm32_spidev_s g_spi5ctrlr = SPI_SLAVE_INIT(5); static uint8_t SPI_SLAVE_OUTQ(6)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static uint8_t SPI_SLAVE_INQ(6)[DMA_ALIGN_UP(CONFIG_STM32H7_SPI_SLAVE_QSIZE)] -__attribute__((aligned(ARMV7M_DCACHE_LINESIZE))); +aligned_data(ARMV7M_DCACHE_LINESIZE); static struct stm32_spidev_s g_spi6ctrlr = SPI_SLAVE_INIT(6); #endif @@ -1620,7 +1620,7 @@ static void spi_slave_initialize(struct stm32_spidev_s *priv) * Mode 0: CFG2.CPHA=0 and CFG2.CPOL=0 * Master: CFG2.MSTR=1 * 8-bit: CFG1.DSIZE=7 - * MSB tranmitted first: CFG2.LSBFRST=0 + * MSB transmitted first: CFG2.LSBFRST=0 * Replace NSS with SSI & SSI=1: CR1.SSI=1 CFG2.SSM=1 (prevent MODF err) * Two lines full duplex: CFG2.COMM=0 */ @@ -1673,7 +1673,7 @@ static void spi_slave_initialize(struct stm32_spidev_s *priv) nxsem_init(&priv->exclsem, 0, 1); #ifdef CONFIG_STM32H7_SPI_DMA - /* DMA will be started in the interrupt handler, syncronized to the master + /* DMA will be started in the interrupt handler, synchronized to the master * nss */ @@ -1722,10 +1722,10 @@ static void spi_slave_initialize(struct stm32_spidev_s *priv) * Initialize the selected SPI port(bus) to operate as spi slave * * Input Parameters: - * Port number (for hardware that has mutiple SPI interfaces) + * Port number (for hardware that has multiple SPI interfaces) * * Returned Value: - * Valid SPI device structure reference on succcess; a NULL on failure + * Valid SPI device structure reference on success; a NULL on failure * ****************************************************************************/ diff --git a/arch/arm/src/stm32h7/stm32_start.c b/arch/arm/src/stm32h7/stm32_start.c index c26a5e6f47d..5b33d03fb7f 100644 --- a/arch/arm/src/stm32h7/stm32_start.c +++ b/arch/arm/src/stm32h7/stm32_start.c @@ -109,7 +109,7 @@ static inline void stm32_fpuconfig(void); #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/stm32h7/stm32_wwdg.c b/arch/arm/src/stm32h7/stm32_wwdg.c index 28c84cbb01c..ea7155fc1dc 100644 --- a/arch/arm/src/stm32h7/stm32_wwdg.c +++ b/arch/arm/src/stm32h7/stm32_wwdg.c @@ -108,7 +108,7 @@ static void stm32_putreg(uint16_t val, uint32_t addr); static void stm32_setwindow(FAR struct stm32_lowerhalf_s *priv, uint8_t window); -/* Interrupt hanlding *******************************************************/ +/* Interrupt handling *******************************************************/ static int stm32_interrupt(int irq, FAR void *context, FAR void *arg); @@ -530,7 +530,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, * reload = timeout * Fwwdg / 1000 - 1 * * Where - * timeout is the desired timout in milliseconds + * timeout is the desired timeout in milliseconds * reload is the contents of T{5:0] * Fwwdg is the frequency of the WWDG clock */ @@ -543,7 +543,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, */ #if 0 - wdinfo("wdgtb=%d fwwdg=%d reload=%d timout=%d\n", + wdinfo("wdgtb=%d fwwdg=%d reload=%d timeout=%d\n", wdgtb, fwwdg, reload, 1000 * (reload + 1) / fwwdg); #endif if (reload <= WWDG_CR_T_MAX || wdgtb == 3) @@ -576,7 +576,7 @@ static int stm32_settimeout(FAR struct watchdog_lowerhalf_s *lower, priv->fwwdg = fwwdg; priv->reload = reload; - wdinfo("wdgtb=%d fwwdg=%d reload=%d timout=%d\n", + wdinfo("wdgtb=%d fwwdg=%d reload=%d timeout=%d\n", wdgtb, fwwdg, reload, priv->timeout); /* Set WDGTB[1:0] bits according to calculated value */ diff --git a/arch/arm/src/stm32l4/Kconfig b/arch/arm/src/stm32l4/Kconfig index e8a831cdaca..e18579569c1 100644 --- a/arch/arm/src/stm32l4/Kconfig +++ b/arch/arm/src/stm32l4/Kconfig @@ -428,6 +428,54 @@ config ARCH_CHIP_STM32L4A6AG ---help--- STM32 L4 Cortex M4, AES, HASH, 1024Kb FLASH, 320 Kb SRAM +config ARCH_CHIP_STM32L4R5VG + bool "STM32L4R5VG" + select STM32L4_STM32L4R5XX + select STM32L4_FLASH_CONFIG_G + select STM32L4_IO_CONFIG_V + ---help--- + STM32 L4+ Cortex M4, 1024Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R5QG + bool "STM32L4R5QG" + select STM32L4_STM32L4R5XX + select STM32L4_FLASH_CONFIG_G + select STM32L4_IO_CONFIG_Q + ---help--- + STM32 L4+ Cortex M4, 1024Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R5ZG + bool "STM32L4R5ZG" + select STM32L4_STM32L4R5XX + select STM32L4_FLASH_CONFIG_G + select STM32L4_IO_CONFIG_Z + ---help--- + STM32 L4+ Cortex M4, 1024Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R5AG + bool "STM32L4R5AG" + select STM32L4_STM32L4R5XX + select STM32L4_FLASH_CONFIG_G + select STM32L4_IO_CONFIG_A + ---help--- + STM32 L4+ Cortex M4, 1024Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R5VI + bool "STM32L4R5VI" + select STM32L4_STM32L4R5XX + select STM32L4_FLASH_CONFIG_I + select STM32L4_IO_CONFIG_V + ---help--- + STM32 L4+ Cortex M4, 2048Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R5QI + bool "STM32L4R5QI" + select STM32L4_STM32L4R5XX + select STM32L4_FLASH_CONFIG_I + select STM32L4_IO_CONFIG_Q + ---help--- + STM32 L4+ Cortex M4, 2048Kb FLASH, 640 Kb SRAM + config ARCH_CHIP_STM32L4R5ZI bool "STM32L4R5ZI" select STM32L4_STM32L4R5XX @@ -436,6 +484,54 @@ config ARCH_CHIP_STM32L4R5ZI ---help--- STM32 L4+ Cortex M4, 2048Kb FLASH, 640 Kb SRAM +config ARCH_CHIP_STM32L4R5AI + bool "STM32L4R5AI" + select STM32L4_STM32L4R5XX + select STM32L4_FLASH_CONFIG_I + select STM32L4_IO_CONFIG_A + ---help--- + STM32 L4+ Cortex M4, 2048Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R9VG + bool "STM32L4R9VG" + select STM32L4_STM32L4R9XX + select STM32L4_FLASH_CONFIG_G + select STM32L4_IO_CONFIG_V + ---help--- + STM32 L4+ Cortex M4, 1024Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R9ZG + bool "STM32L4R9ZG" + select STM32L4_STM32L4R9XX + select STM32L4_FLASH_CONFIG_G + select STM32L4_IO_CONFIG_Z + ---help--- + STM32 L4+ Cortex M4, 1024Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R9AG + bool "STM32L4R9AG" + select STM32L4_STM32L4R9XX + select STM32L4_FLASH_CONFIG_G + select STM32L4_IO_CONFIG_A + ---help--- + STM32 L4+ Cortex M4, 1024Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R9VI + bool "STM32L4R9VI" + select STM32L4_STM32L4R9XX + select STM32L4_FLASH_CONFIG_I + select STM32L4_IO_CONFIG_V + ---help--- + STM32 L4+ Cortex M4, 2048Kb FLASH, 640 Kb SRAM + +config ARCH_CHIP_STM32L4R9ZI + bool "STM32L4R9ZI" + select STM32L4_STM32L4R9XX + select STM32L4_FLASH_CONFIG_I + select STM32L4_IO_CONFIG_Z + ---help--- + STM32 L4+ Cortex M4, 2048Kb FLASH, 640 Kb SRAM + config ARCH_CHIP_STM32L4R9AI bool "STM32L4R9AI" select STM32L4_STM32L4R9XX @@ -475,6 +571,7 @@ config STM32L4_STM32L4X3 bool default n select ARCH_HAVE_FPU + select STM32L4_HAVE_LPUART1 select STM32L4_HAVE_USART1 select STM32L4_HAVE_USART2 select STM32L4_HAVE_USART3 if !(STM32L4_STM32L432XX || STM32L4_STM32L442XX) @@ -490,6 +587,7 @@ config STM32L4_STM32L4X5 bool default n select ARCH_HAVE_FPU + select STM32L4_HAVE_LPUART1 select STM32L4_HAVE_USART1 select STM32L4_HAVE_USART2 select STM32L4_HAVE_USART3 @@ -520,6 +618,7 @@ config STM32L4_STM32L4X6 bool default n select ARCH_HAVE_FPU + select STM32L4_HAVE_LPUART1 select STM32L4_HAVE_USART1 select STM32L4_HAVE_USART2 select STM32L4_HAVE_USART3 @@ -550,6 +649,7 @@ config STM32L4_STM32L4XR bool default n select ARCH_HAVE_FPU + select STM32L4_HAVE_LPUART1 select STM32L4_HAVE_USART1 select STM32L4_HAVE_USART2 select STM32L4_HAVE_USART3 @@ -1031,6 +1131,10 @@ config STM32L4_HAVE_TIM17 bool default n +config STM32L4_HAVE_LPUART1 + bool + default n + config STM32L4_HAVE_USART1 bool default n @@ -1395,6 +1499,13 @@ config STM32L4_SPI3 select SPI select STM32L4_SPI +config STM32L4_LPUART1 + bool "LPUART1" + default n + depends on STM32L4_HAVE_LPUART1 + select ARCH_HAVE_SERIAL_TERMIOS + select STM32L4_USART + config STM32L4_USART2 bool "USART2" default n @@ -5390,9 +5501,54 @@ config STM32L4_SERIALDRIVER config STM32L4_1WIREDRIVER bool -menu "U[S]ART Configuration" +menu "[LP]U[S]ART Configuration" depends on STM32L4_USART +choice + prompt "LPUART1 Driver Configuration" + default STM32L4_LPUART1_SERIALDRIVER + depends on STM32L4_LPUART1 + +config STM32L4_LPUART1_SERIALDRIVER + bool "Standard serial driver" + select LPUART1_SERIALDRIVER + select STM32L4_SERIALDRIVER + +config STM32L4_LPUART1_1WIREDRIVER + bool "1-Wire driver" + select STM32L4_1WIREDRIVER + +endchoice # LPUART1 Driver Configuration + +if LPUART1_SERIALDRIVER + +config LPUART1_RS485 + bool "RS-485 on LPUART1" + default n + depends on STM32L4_LPUART1 + ---help--- + Enable RS-485 interface on LPUART1. Your board config will have to + provide GPIO_LPUART1_RS485_DIR pin definition. Currently it cannot be + used with LPUART1_RXDMA. + +config LPUART1_RS485_DIR_POLARITY + int "LPUART1 RS-485 DIR pin polarity" + default 1 + range 0 1 + depends on LPUART1_RS485 + ---help--- + Polarity of DIR pin for RS-485 on LPUART1. Set to state on DIR pin which + enables TX (0 - low / nTXEN, 1 - high / TXEN). + +config LPUART1_RXDMA + bool "LPUART1 Rx DMA" + default n + depends on STM32L4_LPUART1 && (STM32L4_DMA1 || STM32L4_DMA2 || STM32L4_DMAMUX) + ---help--- + In high data rate usage, Rx DMA may eliminate Rx overrun errors + +endif # LPUART1_SERIALDRIVER + choice prompt "USART1 Driver Configuration" default STM32L4_USART1_SERIALDRIVER diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs index ca695c82d25..42c3a74e717 100644 --- a/arch/arm/src/stm32l4/Make.defs +++ b/arch/arm/src/stm32l4/Make.defs @@ -23,7 +23,7 @@ # Common ARM and Cortex-M4 files (copied from stm32/Make.defs) -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -33,7 +33,8 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c -CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_switchcontext.c +CMN_CSRCS += arm_puts.c # Configuration-dependent common files diff --git a/arch/arm/src/stm32l4/README.txt b/arch/arm/src/stm32l4/README.txt index 0f88d839b51..4cb87056267 100644 --- a/arch/arm/src/stm32l4/README.txt +++ b/arch/arm/src/stm32l4/README.txt @@ -46,8 +46,8 @@ MSI : OK LSE : OK RCC : All registers defined, peripherals enabled, basic clock working SYSCTL : All registers defined -USART : Working in normal mode (no DMA, to be tested, code is written) -DMA : works; at least tested with QSPI +USART : OK +DMA : OK SRAM2 : OK; can be included in MM region or left separate for special app : purposes SPI : OK, tested (including DMA) @@ -81,7 +81,8 @@ FIREWALL : Code written, to be tested, requires support from ldscript TSC : TODO (Touch Screen Controller) SWP : TODO (Single wire protocol master, to connect with NFC enabled : SIM cards) -LPUART : TODO (Low power UART working with LSE at low baud rates) +LPUART : Experimental support (Low power UART working with LSE at low + : baud rates) LPTIM : Code written, to be tested (Low power TIMER) OPAMP : TODO (Analog operational amplifier) COMP : There is some code (Analog comparators) @@ -94,7 +95,7 @@ DCMI : TODO (Digital Camera interfaces) New peripherals only in STM32L4+: -DMAMUX1 : TODO +DMAMUX1 : OK DSI : TODO GFXMMU : TODO LTDC : TODO diff --git a/arch/arm/src/stm32l4/hardware/stm32l4_flash.h b/arch/arm/src/stm32l4/hardware/stm32l4_flash.h index 8b6e7ee1dc2..22973a5003e 100644 --- a/arch/arm/src/stm32l4/hardware/stm32l4_flash.h +++ b/arch/arm/src/stm32l4/hardware/stm32l4_flash.h @@ -34,14 +34,35 @@ /* Flash size is known from the chip selection: * * When CONFIG_STM32L4_FLASH_OVERRIDE_DEFAULT is set the - * CONFIG_STM32L4_FLASH_CONFIG_x selects the default FLASH size based on the - * chip part number. This value can be overridden with - * CONFIG_STM32L4_FLASH_OVERRIDE_x + * CONFIG_STM32L4_FLASH_CONFIG_x selects the default FLASH size based + * on the chip part number. This value can be overridden with + * CONFIG_STM32L4_FLASH_OVERRIDE_x. For example: * * Parts STM32L4xxE have 512Kb of FLASH * Parts STM32L4xxG have 1024Kb of FLASH + * Parts STM32L4xxI have 2048Kb of FLASH * - * N.B. Only Single bank mode is supported + * The STM32L4x5/STM32L4x6 devices have two banks, but on 512 and 256 Kb + * devices an option byte is available to map all pages to the first bank. + * + * The STM32L43x/44x/45x/46x chips (CONFIG_STM32L4_STM32L4X3) have a + * single bank only. + * + * STM32L4+ devices (CONFIG_STM32L4_STM32L4XR) have single and dual bank + * operating modes. + * + * The STM32L4R/Sxx devices have 1 Mb or 2 Mb of flash + * The STM32L4P/Q5x devices have 512 Kb or 1 Mb of flash + * + * STM32L4+ flash page size is 4 Kb (dual mode) or 8 Kb (single mode). + * Dual bank mode is the default and this flash driver does not support + * single bank mode on these devices. + * + * For STM32L+ bank mode is controlled by two different bits + * in option bytes: + * + * In 2 Mb devices bit 22 (DBANK) controls dual bank mode. + * In 1 Mb devices bit 21 (DB1M) controls dual bank mode. */ #define _K(x) ((x)*1024) @@ -104,9 +125,9 @@ #elif defined(CONFIG_STM32L4_FLASH_CONFIG_G) /* 1 MB */ # define STM32L4_FLASH_NPAGES 512 # define STM32L4_FLASH_PAGESIZE 2048 -#elif defined(CONFIG_STM32L4_FLASH_CONFIG_I) /* 2 MB */ -# define STM32L4_FLASH_NPAGES 256 -# define STM32L4_FLASH_PAGESIZE 8192 +#elif defined(CONFIG_STM32L4_FLASH_CONFIG_I) /* 2 MB, STM32L4+ only */ +# define STM32L4_FLASH_NPAGES 512 +# define STM32L4_FLASH_PAGESIZE 4096 #else # error "unknown flash configuration!" #endif @@ -257,10 +278,14 @@ # define FLASH_OPTCR_BFB2 (1 << 20) /* Bit 20: Dual bank boot */ # define FLASH_OPTCR_DUALBANK (1 << 21) /* Bit 21: Dual bank enable */ #endif +#if defined(CONFIG_STM32L4_STM32L4XR) +# define FLASH_OPTCR_DBANK (1 << 22) /* Bit 22: Dual bank mode for 2MB devices */ +#endif #define FLASH_OPTCR_NBOOT1 (1 << 23) /* Bit 23: Boot configuration */ #define FLASH_OPTCR_SRAM2_PE (1 << 24) /* Bit 24: SRAM2 parity check enable */ #define FLASH_OPTCR_SRAM2_RST (1 << 25) /* Bit 25: SRAM2 Erase when system reset */ -#if defined(CONFIG_STM32L4_STM32L4X3) || defined(CONFIG_STM32L4_STM32L496XX) || defined(CONFIG_STM32L4_STM32L4XR) +#if defined(CONFIG_STM32L4_STM32L4X3) || defined(CONFIG_STM32L4_STM32L496XX) || \ + defined(CONFIG_STM32L4_STM32L4XR) # define FLASH_OPTCR_NSWBOOT0 (1 << 26) /* Bit 26: Software BOOT0 */ # define FLASH_OPTCR_NBOOT0 (1 << 27) /* Bit 27: nBOOT0 option bit */ #endif diff --git a/arch/arm/src/stm32l4/hardware/stm32l4_memorymap.h b/arch/arm/src/stm32l4/hardware/stm32l4_memorymap.h index 06a7f7f9239..094fc7cd10b 100644 --- a/arch/arm/src/stm32l4/hardware/stm32l4_memorymap.h +++ b/arch/arm/src/stm32l4/hardware/stm32l4_memorymap.h @@ -60,10 +60,17 @@ #define STM32L4_SYSMEM_BASE 0x1fff0000 /* 0x1fff0000-0x1fff6fff: System memory */ #define STM32L4_OTP_BASE 0x1fff7000 /* 0x1fff7000-0x1fff73ff: OTP memory */ /* 0x1fff7400-0x1fff77ff: Reserved */ -#define STM32L4_OPTION_BASE 0x1fff7800 /* 0x1fff7800-0x1fff780f: Option bytes */ +#ifdef CONFIG_STM32L4_STM32L4XR +# define STM32L4_OPTION_BASE 0x1ff00000 /* 0x1ff00000-0x1ff0000f: Option bytes */ + /* 0x1ff00010-0x1ff00fff: Reserved */ +# define STM32L4_OPTION2_BASE 0x1ff01000 /* 0x1ff01000-0x1ff0100f: Option bytes 2 */ + /* 0x1ff01010-0x1ff01fff: Reserved */ +#else +# define STM32L4_OPTION_BASE 0x1fff7800 /* 0x1fff7800-0x1fff780f: Option bytes */ /* 0x1fff7810-0x1ffff7ff: Reserved */ -#define STM32L4_OPTION2_BASE 0x1ffff800 /* 0x1ffff800-0x1ffff80f: Option bytes 2 */ +# define STM32L4_OPTION2_BASE 0x1ffff800 /* 0x1ffff800-0x1ffff80f: Option bytes 2 */ /* 0x1ffff810-0x1fffffff: Reserved */ +#endif /* System Memory Addresses **************************************************/ diff --git a/arch/arm/src/stm32l4/hardware/stm32l4_uart.h b/arch/arm/src/stm32l4/hardware/stm32l4_uart.h index 3613adc6ae8..cbd7e7c9d51 100644 --- a/arch/arm/src/stm32l4/hardware/stm32l4_uart.h +++ b/arch/arm/src/stm32l4/hardware/stm32l4_uart.h @@ -219,13 +219,19 @@ #define USART_CR3_WUFIE (1 << 22) /* Bit 22: Wakeup from Stop mode interrupt enable */ -/* Baud Rate Register */ +/* Baud Rate Register (USART) */ #define USART_BRR_FRAC_SHIFT (0) /* Bits 3-0: fraction of USARTDIV */ #define USART_BRR_FRAC_MASK (0x0f << USART_BRR_FRAC_SHIFT) #define USART_BRR_MANT_SHIFT (4) /* Bits 15-4: mantissa of USARTDIV */ #define USART_BRR_MANT_MASK (0x0fff << USART_BRR_MANT_SHIFT) +/* Baud Rate Register (LPUART) */ + +#define LPUART_BRR_SHIFT (0) /* Bits 19-0: LPUART baud rate */ +#define LPUART_BRR_MASK (0xfffff << LPUART_BRR_SHIFT) +#define LPUART_BRR_MIN (0x300) /* Minimum value permitted for BRR register */ + /* Guard time and prescaler register */ #define USART_GTPR_PSC_SHIFT (0) /* Bits 0-7: Prescaler value */ diff --git a/arch/arm/src/stm32l4/stm32l4_1wire.c b/arch/arm/src/stm32l4/stm32l4_1wire.c index 8769c1d078b..d52ea8385bd 100644 --- a/arch/arm/src/stm32l4/stm32l4_1wire.c +++ b/arch/arm/src/stm32l4/stm32l4_1wire.c @@ -1,35 +1,20 @@ /**************************************************************************** * arch/arm/src/stm32l4/stm32l4_1wire.c * - * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved. - * Author: Aleksandr Vyhovanec + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/stm32l4/stm32l4_1wire.h b/arch/arm/src/stm32l4/stm32l4_1wire.h index 422bc93abbb..a3e97e980e6 100644 --- a/arch/arm/src/stm32l4/stm32l4_1wire.h +++ b/arch/arm/src/stm32l4/stm32l4_1wire.h @@ -1,35 +1,20 @@ /**************************************************************************** * arch/arm/src/stm32l4/stm32l4_1wire.h * - * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved. - * Author: Aleksandr Vyhovanec + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/stm32l4/stm32l4_adc.c b/arch/arm/src/stm32l4/stm32l4_adc.c index 3c986f61590..a10466c02b9 100644 --- a/arch/arm/src/stm32l4/stm32l4_adc.c +++ b/arch/arm/src/stm32l4/stm32l4_adc.c @@ -1996,6 +1996,14 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) } break; + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = priv->cchannels; + } + break; + case ANIOC_WDOG_UPPER: /* Set watchdog upper threshold */ { regval = adc_getreg(priv, STM32L4_ADC_TR1_OFFSET); diff --git a/arch/arm/src/stm32l4/stm32l4_adc.h b/arch/arm/src/stm32l4/stm32l4_adc.h index 5cedeb2f05d..4c1edce396a 100644 --- a/arch/arm/src/stm32l4/stm32l4_adc.h +++ b/arch/arm/src/stm32l4/stm32l4_adc.h @@ -1132,7 +1132,7 @@ #ifdef CONFIG_STM32L4_ADC_LL_OPS -/* This structure provides the publicly visable representation of the +/* This structure provides the publicly visible representation of the * "lower-half" ADC driver structure. */ @@ -1142,7 +1142,7 @@ struct stm32_adc_dev_s FAR const struct stm32_adc_ops_s *llops; - /* Require cast-compatibility with private "lower-half" ADC strucutre */ + /* Require cast-compatibility with private "lower-half" ADC structure */ }; /* Low-level operations for ADC */ diff --git a/arch/arm/src/stm32l4/stm32l4_dfumode.c b/arch/arm/src/stm32l4/stm32l4_dfumode.c index 8beae25db4e..f81d4a20ae7 100644 --- a/arch/arm/src/stm32l4/stm32l4_dfumode.c +++ b/arch/arm/src/stm32l4/stm32l4_dfumode.c @@ -1,37 +1,20 @@ /**************************************************************************** * arch/arm/src/stm32l4/stm32l4_dfumode.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/arm/src/stm32l4/stm32l4_flash.c b/arch/arm/src/stm32l4/stm32l4_flash.c index 041ad5f5c2e..834175488ac 100644 --- a/arch/arm/src/stm32l4/stm32l4_flash.c +++ b/arch/arm/src/stm32l4/stm32l4_flash.c @@ -89,8 +89,8 @@ #define FLASH_PAGE_MASK (FLASH_PAGE_SIZE - 1) #if FLASH_PAGE_SIZE == 2048 # define FLASH_PAGE_SHIFT (11) /* 2**11 = 2048B */ -#elif FLASH_PAGE_SIZE == 8192 -# define FLASH_PAGE_SHIFT (13) /* 2**13 = 8192B */ +#elif FLASH_PAGE_SIZE == 4096 +# define FLASH_PAGE_SHIFT (12) /* 2**12 = 4096B */ #else # error Unsupported STM32L4_FLASH_PAGESIZE #endif @@ -186,10 +186,14 @@ static inline void flash_erase(size_t page) defined(CONFIG_STM32L4_STM32L4XR) if (page <= 0xff) { + /* Select bank 1 */ + modifyreg32(STM32L4_FLASH_CR, FLASH_CR_BKER, 0); } else { + /* Select bank 2 */ + modifyreg32(STM32L4_FLASH_CR, 0, FLASH_CR_BKER); } #endif diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.c b/arch/arm/src/stm32l4/stm32l4_gpio.c index bdfcdf90ee2..87272b9cacf 100644 --- a/arch/arm/src/stm32l4/stm32l4_gpio.c +++ b/arch/arm/src/stm32l4/stm32l4_gpio.c @@ -361,10 +361,10 @@ int stm32l4_configgpio(uint32_t cfgset) * Description: * Unconfigure a GPIO pin based on bit-encoded description of the pin, set * it into default HiZ state (and possibly mark it's unused) and unlock it - * whether it was previsouly selected as alternative function + * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32l4/stm32l4_gpio.h b/arch/arm/src/stm32l4/stm32l4_gpio.h index d90f63fb892..083c02569e3 100644 --- a/arch/arm/src/stm32l4/stm32l4_gpio.h +++ b/arch/arm/src/stm32l4/stm32l4_gpio.h @@ -272,10 +272,10 @@ int stm32l4_configgpio(uint32_t cfgset); * Description: * Unconfigure a GPIO pin based on bit-encoded description of the pin, set * it into default HiZ state (and possibly mark it's unused) and unlock it - * whether it was previsouly selected as alternative function + * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32l4/stm32l4_lowputc.c b/arch/arm/src/stm32l4/stm32l4_lowputc.c index 5832bf24850..b66da7a34a5 100644 --- a/arch/arm/src/stm32l4/stm32l4_lowputc.c +++ b/arch/arm/src/stm32l4/stm32l4_lowputc.c @@ -45,7 +45,26 @@ /* Select USART parameters for the selected console */ #ifdef HAVE_CONSOLE -# if defined(CONFIG_USART1_SERIAL_CONSOLE) +# if defined(CONFIG_LPUART1_SERIAL_CONSOLE) +# define STM32L4_CONSOLE_BASE STM32L4_LPUART1_BASE +# define STM32L4_APBCLOCK STM32L4_PCLK1_FREQUENCY +# define STM32L4_CONSOLE_APBREG STM32L4_RCC_APB1ENR2 +# define STM32L4_CONSOLE_APBEN RCC_APB1ENR2_LPUART1EN +# define STM32L4_CONSOLE_BAUD CONFIG_LPUART1_BAUD +# define STM32L4_CONSOLE_BITS CONFIG_LPUART1_BITS +# define STM32L4_CONSOLE_PARITY CONFIG_LPUART1_PARITY +# define STM32L4_CONSOLE_2STOP CONFIG_LPUART1_2STOP +# define STM32L4_CONSOLE_TX GPIO_LPUART1_TX +# define STM32L4_CONSOLE_RX GPIO_LPUART1_RX +# ifdef CONFIG_LPUART1_RS485 +# define STM32L4_CONSOLE_RS485_DIR GPIO_LPUART1_RS485_DIR +# if (CONFIG_LPUART1_RS485_DIR_POLARITY == 0) +# define STM32L4_CONSOLE_RS485_DIR_POLARITY false +# else +# define STM32L4_CONSOLE_RS485_DIR_POLARITY true +# endif +# endif +# elif defined(CONFIG_USART1_SERIAL_CONSOLE) # define STM32L4_CONSOLE_BASE STM32L4_USART1_BASE # define STM32L4_APBCLOCK STM32L4_PCLK2_FREQUENCY # define STM32L4_CONSOLE_APBREG STM32L4_RCC_APB2ENR diff --git a/arch/arm/src/stm32l4/stm32l4_pwm.c b/arch/arm/src/stm32l4/stm32l4_pwm.c index 2e4c8c8d079..ffb6808c257 100644 --- a/arch/arm/src/stm32l4/stm32l4_pwm.c +++ b/arch/arm/src/stm32l4/stm32l4_pwm.c @@ -3105,6 +3105,13 @@ static int pwm_duty_channels_update(FAR struct pwm_lowerhalf_s *dev, #endif { #ifdef CONFIG_STM32L4_PWM_MULTICHAN + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + duty = info->channels[i].duty; channel = info->channels[i].channel; @@ -3930,6 +3937,13 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++) { + /* Break the loop if all following channels are not configured */ + + if (info->channels[i].channel == -1) + { + break; + } + /* Set output if channel configured */ if (info->channels[i].channel != 0) diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.c b/arch/arm/src/stm32l4/stm32l4_pwr.c index a51e4ae8296..71a3ad7afa6 100644 --- a/arch/arm/src/stm32l4/stm32l4_pwr.c +++ b/arch/arm/src/stm32l4/stm32l4_pwr.c @@ -212,6 +212,68 @@ bool stm32l4_pwr_enableusv(bool set) return was_set; } +/**************************************************************************** + * Name: stm32l4_pwr_vddio2_valid + * + * Description: + * Report that the Vddio2 independent I/Os supply voltage is valid or not. + * Setting this bit is mandatory to use the PG2 - PG15 I/Os. + * + * Input Parameters: + * set - True: Vddio2 is value; False: Vddio2 is not present. Logical and + * electrical isolation is applied to ignore this supply. + * + * Returned Value: + * True: The bit was previously set. + * + ****************************************************************************/ + +#if !defined(CONFIG_STM32L4_STM32L4X3) +bool stm32l4_pwr_vddio2_valid(bool set) +{ + uint32_t regval; + bool was_set; + bool was_clk_enabled; + + regval = getreg32(STM32L4_RCC_APB1ENR1); + was_clk_enabled = ((regval & RCC_APB1ENR1_PWREN) != 0); + + if (!was_clk_enabled) + { + stm32l4_pwr_enableclk(true); + } + + /* Get the current state of the STM32L4 PWR control register 2 */ + + regval = stm32l4_pwr_getreg(STM32L4_PWR_CR2_OFFSET); + was_set = ((regval & PWR_CR2_IOSV) != 0); + + /* Enable or disable the ability to write */ + + if (was_set && !set) + { + /* Reset the Vddio2 independent I/O supply valid bit. */ + + regval &= ~PWR_CR2_IOSV; + stm32l4_pwr_putreg(STM32L4_PWR_CR2_OFFSET, regval); + } + else if (!was_set && set) + { + /* Set the Vddio2 independent I/O supply valid bit. */ + + regval |= PWR_CR2_IOSV; + stm32l4_pwr_putreg(STM32L4_PWR_CR2_OFFSET, regval); + } + + if (!was_clk_enabled) + { + stm32l4_pwr_enableclk(false); + } + + return was_set; +} +#endif + /**************************************************************************** * Name: stm32_pwr_setvos * diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.h b/arch/arm/src/stm32l4/stm32l4_pwr.h index dafe535d977..5d15397ca1d 100644 --- a/arch/arm/src/stm32l4/stm32l4_pwr.h +++ b/arch/arm/src/stm32l4/stm32l4_pwr.h @@ -105,6 +105,25 @@ bool stm32l4_pwr_enablebkp(bool writable); bool stm32l4_pwr_enableusv(bool set); +/**************************************************************************** + * Name: stm32l4_pwr_vddio2_valid + * + * Description: + * Report that the Vddio2 independent I/Os supply voltage is valid or not. + * Setting this bit is mandatory to use the PG2 - PG15 I/Os. + * + * Input Parameters: + * set - True: Vddio2 is value; False: Vddio2 is not present. Logical and + * electrical isolation is applied to ignore this supply. + * + * Returned Value: + * True: The bit was previously set. + ****************************************************************************/ + +#if !defined(CONFIG_STM32L4_STM32L4X3) +bool stm32l4_pwr_vddio2_valid(bool set); +#endif + /**************************************************************************** * Name: stm32_pwr_setvos * diff --git a/arch/arm/src/stm32l4/stm32l4_qencoder.c b/arch/arm/src/stm32l4/stm32l4_qencoder.c index 20620dea11b..24d5495c900 100644 --- a/arch/arm/src/stm32l4/stm32l4_qencoder.c +++ b/arch/arm/src/stm32l4/stm32l4_qencoder.c @@ -258,11 +258,12 @@ static int stm32l4_ioctl(FAR struct qe_lowerhalf_s *lower, static const struct qe_ops_s g_qecallbacks = { - .setup = stm32l4_setup, - .shutdown = stm32l4_shutdown, - .position = stm32l4_position, - .reset = stm32l4_reset, - .ioctl = stm32l4_ioctl, + .setup = stm32l4_setup, + .shutdown = stm32l4_shutdown, + .position = stm32l4_position, + .setposmax = NULL, /* not supported yet */ + .reset = stm32l4_reset, + .ioctl = stm32l4_ioctl, }; /* Per-timer state structures */ diff --git a/arch/arm/src/stm32l4/stm32l4_sdmmc.c b/arch/arm/src/stm32l4/stm32l4_sdmmc.c index 77f6d70eddb..be92f71614e 100644 --- a/arch/arm/src/stm32l4/stm32l4_sdmmc.c +++ b/arch/arm/src/stm32l4/stm32l4_sdmmc.c @@ -782,19 +782,18 @@ static void stm32_configwaitints(struct stm32_dev_s *priv, uint32_t waitmask, pinset = priv->d0_gpio & (GPIO_PORT_MASK | GPIO_PIN_MASK); pinset |= (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI); - /* Arm the SDMMC_D Ready and install ISR */ + /* Arm the SDMMC_D0 Ready and install ISR */ stm32_gpiosetevent(pinset, true, false, false, stm32_sdmmc_rdyinterrupt, priv); } - /* Disarm SDMMC_D ready */ + /* Disarm SDMMC_D0 ready and return it to SDMMC D0 */ if ((wkupevent & SDIOWAIT_WRCOMPLETE) != 0) { stm32_gpiosetevent(priv->d0_gpio, false, false, false, NULL, NULL); - stm32_configgpio(priv->d0_gpio); } #endif diff --git a/arch/arm/src/stm32l4/stm32l4_serial.c b/arch/arm/src/stm32l4/stm32l4_serial.c index 78d0d2a340e..48823bf4062 100644 --- a/arch/arm/src/stm32l4/stm32l4_serial.c +++ b/arch/arm/src/stm32l4/stm32l4_serial.c @@ -391,6 +391,14 @@ static const struct uart_ops_s g_uart_dma_ops = /* I/O buffers */ +#ifdef CONFIG_STM32L4_LPUART1_SERIALDRIVER +static char g_lpuart1rxbuffer[CONFIG_LPUART1_RXBUFSIZE]; +static char g_lpuart1txbuffer[CONFIG_LPUART1_TXBUFSIZE]; +# ifdef CONFIG_LPUART1_RXDMA +static char g_lpuart1rxfifo[RXDMA_BUFFER_SIZE]; +# endif +#endif + #ifdef CONFIG_STM32L4_USART1_SERIALDRIVER static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE]; static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE]; @@ -431,14 +439,75 @@ static char g_uart5rxfifo[RXDMA_BUFFER_SIZE]; # endif #endif -/* This describes the state of the STM32 USART1 ports. */ +/* This describes the state of the STM32 LPUART1 port. */ + +#ifdef CONFIG_STM32L4_LPUART1_SERIALDRIVER +static struct stm32l4_serial_s g_lpuart1priv = +{ + .dev = + { +#if CONSOLE_UART == 1 + .isconsole = true, +#endif + .recv = + { + .size = CONFIG_LPUART1_RXBUFSIZE, + .buffer = g_lpuart1rxbuffer, + }, + .xmit = + { + .size = CONFIG_LPUART1_TXBUFSIZE, + .buffer = g_lpuart1txbuffer, + }, +#ifdef CONFIG_LPUART1_RXDMA + .ops = &g_uart_dma_ops, +#else + .ops = &g_uart_ops, +#endif + .priv = &g_lpuart1priv, + }, + + .irq = STM32L4_IRQ_LPUART1, + .parity = CONFIG_LPUART1_PARITY, + .bits = CONFIG_LPUART1_BITS, + .stopbits2 = CONFIG_LPUART1_2STOP, + .baud = CONFIG_LPUART1_BAUD, + .apbclock = STM32L4_PCLK1_FREQUENCY, + .usartbase = STM32L4_LPUART1_BASE, + .tx_gpio = GPIO_LPUART1_TX, + .rx_gpio = GPIO_LPUART1_RX, +#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_LPUART1_OFLOWCONTROL) + .oflow = true, + .cts_gpio = GPIO_LPUART1_CTS, +#endif +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART1_IFLOWCONTROL) + .iflow = true, + .rts_gpio = GPIO_LPUART1_RTS, +#endif +#ifdef CONFIG_LPUART1_RXDMA + .rxdma_channel = DMAMAP_LPUART1_RX, + .rxfifo = g_lpuart1rxfifo, +#endif + +#ifdef CONFIG_LPUART1_RS485 + .rs485_dir_gpio = GPIO_LPUART1_RS485_DIR, +# if (CONFIG_USART1_RS485_DIR_POLARITY == 0) + .rs485_dir_polarity = false, +# else + .rs485_dir_polarity = true, +# endif +#endif +}; +#endif + +/* This describes the state of the STM32 USART1 port. */ #ifdef CONFIG_STM32L4_USART1_SERIALDRIVER static struct stm32l4_serial_s g_usart1priv = { .dev = { -#if CONSOLE_UART == 1 +#if CONSOLE_UART == 2 .isconsole = true, #endif .recv = @@ -499,7 +568,7 @@ static struct stm32l4_serial_s g_usart2priv = { .dev = { -#if CONSOLE_UART == 2 +#if CONSOLE_UART == 3 .isconsole = true, #endif .recv = @@ -560,7 +629,7 @@ static struct stm32l4_serial_s g_usart3priv = { .dev = { -#if CONSOLE_UART == 3 +#if CONSOLE_UART == 4 .isconsole = true, #endif .recv = @@ -621,7 +690,7 @@ static struct stm32l4_serial_s g_uart4priv = { .dev = { -#if CONSOLE_UART == 4 +#if CONSOLE_UART == 5 .isconsole = true, #endif .recv = @@ -682,7 +751,7 @@ static struct stm32l4_serial_s g_uart5priv = { .dev = { -#if CONSOLE_UART == 5 +#if CONSOLE_UART == 6 .isconsole = true, #endif .recv = @@ -739,22 +808,25 @@ static struct stm32l4_serial_s g_uart5priv = /* This table lets us iterate over the configured USARTs */ FAR static struct stm32l4_serial_s * -const g_uart_devs[STM32L4_NUSART + STM32L4_NUART] = +const g_uart_devs[STM32L4_NLPUART + STM32L4_NUSART + STM32L4_NUART] = { +#ifdef CONFIG_STM32L4_LPUART1_SERIALDRIVER + [0] = &g_lpuart1priv, +#endif #ifdef CONFIG_STM32L4_USART1_SERIALDRIVER - [0] = &g_usart1priv, + [1] = &g_usart1priv, #endif #ifdef CONFIG_STM32L4_USART2_SERIALDRIVER - [1] = &g_usart2priv, + [2] = &g_usart2priv, #endif #ifdef CONFIG_STM32L4_USART3_SERIALDRIVER - [2] = &g_usart3priv, + [3] = &g_usart3priv, #endif #ifdef CONFIG_STM32L4_UART4_SERIALDRIVER - [3] = &g_uart4priv, + [4] = &g_uart4priv, #endif #ifdef CONFIG_STM32L4_UART5_SERIALDRIVER - [4] = &g_uart5priv, + [5] = &g_uart5priv, #endif }; @@ -921,20 +993,16 @@ static int stm32l4serial_dmanextrx(FAR struct stm32l4_serial_s *priv) #endif /**************************************************************************** - * Name: stm32l4serial_setformat + * Name: stm32l4serial_setbaud_usart * * Description: - * Set the serial line format and speed. + * Set the serial line baud rate (standard UART and USART). * ****************************************************************************/ #ifndef CONFIG_SUPPRESS_UART_CONFIG -static void stm32l4serial_setformat(FAR struct uart_dev_s *dev) +static void stm32l4serial_setbaud_usart(FAR struct stm32l4_serial_s *priv) { - FAR struct stm32l4_serial_s *priv = - (FAR struct stm32l4_serial_s *)dev->priv; - uint32_t regval; - /* This first implementation is for U[S]ARTs that support oversampling * by 8 in additional to the standard oversampling by 16. */ @@ -990,6 +1058,73 @@ static void stm32l4serial_setformat(FAR struct uart_dev_s *dev) stm32l4serial_putreg(priv, STM32L4_USART_CR1_OFFSET, cr1); stm32l4serial_putreg(priv, STM32L4_USART_BRR_OFFSET, brr); +} +#endif + +/**************************************************************************** + * Name: stm32l4serial_setbaud_lpuart + * + * Description: + * Set the serial line baud rate (LPUART only). + * + ****************************************************************************/ + +#ifndef CONFIG_SUPPRESS_UART_CONFIG +#ifdef CONFIG_STM32L4_LPUART1_SERIALDRIVER +static void stm32l4serial_setbaud_lpuart(FAR struct stm32l4_serial_s *priv) +{ + uint32_t brr; + + /* The equation is: + * + * baud = 256 * fCK / brr + * brr = 256 * fCK / baud + * + * It is forbidden to write values lower than LPUART_BRR_MIN in + * the LPUART_BRR register. fCK must range from 3 x baud rate to + * 4096 x baud rate. + */ + + brr = (((uint64_t)priv->apbclock << 8) + (priv->baud >> 1)) / priv->baud; + brr &= LPUART_BRR_MASK; + + if (brr < LPUART_BRR_MIN) + { + brr = LPUART_BRR_MIN; + } + + stm32l4serial_putreg(priv, STM32L4_USART_BRR_OFFSET, brr); +} +#endif +#endif + +/**************************************************************************** + * Name: stm32l4serial_setformat + * + * Description: + * Set the serial line format and speed. + * + ****************************************************************************/ + +#ifndef CONFIG_SUPPRESS_UART_CONFIG +static void stm32l4serial_setformat(FAR struct uart_dev_s *dev) +{ + FAR struct stm32l4_serial_s *priv = + (FAR struct stm32l4_serial_s *)dev->priv; + uint32_t regval; + + /* Set baud rate */ + +#ifdef CONFIG_STM32L4_LPUART1_SERIALDRIVER + if (priv->usartbase == STM32L4_LPUART1_BASE) + { + stm32l4serial_setbaud_lpuart(priv); + } + else +#endif + { + stm32l4serial_setbaud_usart(priv); + } /* Configure parity mode */ @@ -1215,7 +1350,7 @@ static void stm32l4serial_pm_setsuspend(bool suspend) g_serialpm.serial_suspended = suspend; - for (n = 0; n < STM32L4_NUSART + STM32L4_NUART; n++) + for (n = 0; n < STM32L4_NLPUART + STM32L4_NUSART + STM32L4_NUART; n++) { struct stm32l4_serial_s *priv = g_uart_devs[n]; @@ -1254,6 +1389,12 @@ static void stm32l4serial_setapbclock(FAR struct uart_dev_s *dev, bool on) { default: return; +#ifdef CONFIG_STM32L4_LPUART1_SERIALDRIVER + case STM32L4_LPUART1_BASE: + rcc_en = RCC_APB1ENR2_LPUART1EN; + regaddr = STM32L4_RCC_APB1ENR2; + break; +#endif #ifdef CONFIG_STM32L4_USART1_SERIALDRIVER case STM32L4_USART1_BASE: rcc_en = RCC_APB2ENR_USART1EN; @@ -2885,7 +3026,7 @@ static int stm32l4serial_pmprepare(FAR struct pm_callback_s *cb, int domain, * buffers. */ - for (n = 0; n < STM32L4_NUSART + STM32L4_NUART; n++) + for (n = 0; n < STM32L4_NLPUART + STM32L4_NUSART + STM32L4_NUART; n++) { struct stm32l4_serial_s *priv = g_uart_devs[n]; @@ -2955,7 +3096,7 @@ void arm_earlyserialinit(void) /* Disable all USART interrupts */ - for (i = 0; i < STM32L4_NUSART + STM32L4_NUART; i++) + for (i = 0; i < STM32L4_NLPUART + STM32L4_NUSART + STM32L4_NUART; i++) { if (g_uart_devs[i]) { @@ -3024,7 +3165,7 @@ void arm_serialinit(void) strcpy(devname, "/dev/ttySx"); - for (i = 0; i < STM32L4_NUSART + STM32L4_NUART; i++) + for (i = 0; i < STM32L4_NLPUART + STM32L4_NUSART + STM32L4_NUART; i++) { /* Don't create a device for non-configured ports. */ @@ -3068,6 +3209,13 @@ void stm32l4_serial_dma_poll(void) flags = enter_critical_section(); +#ifdef CONFIG_LPUART1_RXDMA + if (g_lpuart1priv.rxdma != NULL) + { + stm32l4serial_dmarxcallback(g_lpuart1priv.rxdma, 0, &g_lpuart1priv); + } +#endif + #ifdef CONFIG_USART1_RXDMA if (g_usart1priv.rxdma != NULL) { diff --git a/arch/arm/src/stm32l4/stm32l4_start.c b/arch/arm/src/stm32l4/stm32l4_start.c index 327639b8317..2002cf0b605 100644 --- a/arch/arm/src/stm32l4/stm32l4_start.c +++ b/arch/arm/src/stm32l4/stm32l4_start.c @@ -109,7 +109,7 @@ static inline void stm32l4_fpuconfig(void); #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/stm32l4/stm32l4_uart.h b/arch/arm/src/stm32l4/stm32l4_uart.h index 49c7733c7a7..f1d8829b17c 100644 --- a/arch/arm/src/stm32l4/stm32l4_uart.h +++ b/arch/arm/src/stm32l4/stm32l4_uart.h @@ -60,9 +60,16 @@ #if !defined(CONFIG_STM32L4_HAVE_USART1) # undef CONFIG_STM32L4_USART1 #endif +#if !defined(CONFIG_STM32L4_HAVE_LPUART1) +# undef CONFIG_STM32L4_LPUART1 +#endif /* Sanity checks */ +#if !defined(CONFIG_STM32L4_LPUART1) +# undef CONFIG_STM32L4_LPUART1_SERIALDRIVER +# undef CONFIG_STM32L4_LPUART1_1WIREDRIVER +#endif #if !defined(CONFIG_STM32L4_USART1) # undef CONFIG_STM32L4_USART1_SERIALDRIVER # undef CONFIG_STM32L4_USART1_1WIREDRIVER @@ -86,50 +93,64 @@ /* Is there a USART enabled? */ -#if defined(CONFIG_STM32L4_USART1) || defined(CONFIG_STM32L4_USART2) || \ - defined(CONFIG_STM32L4_USART3) || defined(CONFIG_STM32L4_UART4) || \ - defined(CONFIG_STM32L4_UART5) +#if defined(CONFIG_STM32L4_LPUART1) || defined(CONFIG_STM32L4_USART1) || \ + defined(CONFIG_STM32L4_USART2) || defined(CONFIG_STM32L4_USART3) || \ + defined(CONFIG_STM32L4_UART4) || defined(CONFIG_STM32L4_UART5) # define HAVE_UART 1 #endif /* Is there a serial console? */ -#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32L4_USART1_SERIALDRIVER) +#if defined(CONFIG_LPUART1_SERIAL_CONSOLE) && defined(CONFIG_STM32L4_LPUART1_SERIALDRIVER) +# undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE # undef CONFIG_UART4_SERIAL_CONSOLE # undef CONFIG_UART5_SERIAL_CONSOLE # define CONSOLE_UART 1 # define HAVE_CONSOLE 1 -#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32L4_USART2_SERIALDRIVER) -# undef CONFIG_USART1_SERIAL_CONSOLE +#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32L4_USART1_SERIALDRIVER) +# undef CONFIG_LPUART1_SERIAL_CONSOLE +# undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE # undef CONFIG_UART4_SERIAL_CONSOLE # undef CONFIG_UART5_SERIAL_CONSOLE # define CONSOLE_UART 2 # define HAVE_CONSOLE 1 -#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32L4_USART3_SERIALDRIVER) +#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32L4_USART2_SERIALDRIVER) +# undef CONFIG_LPUART1_SERIAL_CONSOLE # undef CONFIG_USART1_SERIAL_CONSOLE -# undef CONFIG_USART2_SERIAL_CONSOLE +# undef CONFIG_USART3_SERIAL_CONSOLE # undef CONFIG_UART4_SERIAL_CONSOLE # undef CONFIG_UART5_SERIAL_CONSOLE # define CONSOLE_UART 3 # define HAVE_CONSOLE 1 +#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32L4_USART3_SERIALDRIVER) +# undef CONFIG_LPUART1_SERIAL_CONSOLE +# undef CONFIG_USART1_SERIAL_CONSOLE +# undef CONFIG_USART2_SERIAL_CONSOLE +# undef CONFIG_UART4_SERIAL_CONSOLE +# undef CONFIG_UART5_SERIAL_CONSOLE +# define CONSOLE_UART 4 +# define HAVE_CONSOLE 1 #elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32L4_UART4_SERIALDRIVER) +# undef CONFIG_LPUART1_SERIAL_CONSOLE # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE # undef CONFIG_UART5_SERIAL_CONSOLE -# define CONSOLE_UART 4 +# define CONSOLE_UART 5 # define HAVE_CONSOLE 1 #elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32L4_UART5_SERIALDRIVER) +# undef CONFIG_LPUART1_SERIAL_CONSOLE # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE # undef CONFIG_UART4_SERIAL_CONSOLE -# define CONSOLE_UART 5 +# define CONSOLE_UART 6 # define HAVE_CONSOLE 1 #else +# undef CONFIG_LPUART1_SERIAL_CONSOLE # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE @@ -144,6 +165,7 @@ */ #if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA) +# undef CONFIG_LPUART1_RXDMA # undef CONFIG_USART1_RXDMA # undef CONFIG_USART2_RXDMA # undef CONFIG_USART3_RXDMA @@ -153,6 +175,10 @@ /* Disable the DMA configuration on all unused USARTs */ +#ifndef CONFIG_STM32L4_LPUART1_SERIALDRIVER +# undef CONFIG_LPUART1_RXDMA +#endif + #ifndef CONFIG_STM32L4_USART1_SERIALDRIVER # undef CONFIG_USART1_RXDMA #endif @@ -176,16 +202,18 @@ /* Is DMA available on any (enabled) USART? */ #undef SERIAL_HAVE_RXDMA -#if defined(CONFIG_USART1_RXDMA) || defined(CONFIG_USART2_RXDMA) || \ - defined(CONFIG_USART3_RXDMA) || defined(CONFIG_UART4_RXDMA) || \ - defined(CONFIG_UART5_RXDMA) +#if defined(CONFIG_LPUART1_RXDMA) || defined(CONFIG_USART1_RXDMA) || \ + defined(CONFIG_USART2_RXDMA) || defined(CONFIG_USART3_RXDMA) || \ + defined(CONFIG_UART4_RXDMA) || defined(CONFIG_UART5_RXDMA) # define SERIAL_HAVE_RXDMA 1 #endif /* Is DMA used on the console UART? */ #undef SERIAL_HAVE_CONSOLE_DMA -#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_USART1_RXDMA) +#if defined(CONFIG_LPUART1_SERIAL_CONSOLE) && defined(CONFIG_LPUART1_RXDMA) +# define SERIAL_HAVE_CONSOLE_DMA 1 +#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_USART1_RXDMA) # define SERIAL_HAVE_CONSOLE_DMA 1 #elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_USART2_RXDMA) # define SERIAL_HAVE_CONSOLE_DMA 1 @@ -200,7 +228,9 @@ /* Is DMA used on all (enabled) USARTs */ #define SERIAL_HAVE_ONLY_DMA 1 -#if defined(CONFIG_STM32L4_USART1_SERIALDRIVER) && !defined(CONFIG_USART1_RXDMA) +#if defined(CONFIG_STM32L4_LPUART1_SERIALDRIVER) && !defined(CONFIG_LPUART1_RXDMA) +# undef SERIAL_HAVE_ONLY_DMA +#elif defined(CONFIG_STM32L4_USART1_SERIALDRIVER) && !defined(CONFIG_USART1_RXDMA) # undef SERIAL_HAVE_ONLY_DMA #elif defined(CONFIG_STM32L4_USART2_SERIALDRIVER) && !defined(CONFIG_USART2_RXDMA) # undef SERIAL_HAVE_ONLY_DMA @@ -214,9 +244,9 @@ /* Is RS-485 used? */ -#if defined(CONFIG_USART1_RS485) || defined(CONFIG_USART2_RS485) || \ - defined(CONFIG_USART3_RS485) || defined(CONFIG_UART4_RS485) || \ - defined(CONFIG_UART5_RS485) +#if defined(CONFIG_LPUART1_RS485) || defined(CONFIG_USART1_RS485) || \ + defined(CONFIG_USART2_RS485) || defined(CONFIG_USART3_RS485) || \ + defined(CONFIG_UART4_RS485) || defined(CONFIG_UART5_RS485) # define HAVE_RS485 1 #endif diff --git a/arch/arm/src/stm32l5/Kconfig b/arch/arm/src/stm32l5/Kconfig index 5c60d10e9f4..a1821de9ae9 100644 --- a/arch/arm/src/stm32l5/Kconfig +++ b/arch/arm/src/stm32l5/Kconfig @@ -2845,7 +2845,7 @@ config STM32L5_FLOWCONTROL_BROKEN Enable UART RTS flow control using Software. Because STM Current STM32 have broken HW based RTS behavior (they assert nRTS after every byte received) Enable this setting workaround - this issue by useing software based management of RTS + this issue by using software based management of RTS config STM32L5_USART_BREAKS bool "Add TIOxSBRK to support sending Breaks" @@ -2989,7 +2989,7 @@ config STM32L5_SDMMC1_DMAPRIO hex "SDMMC1 DMA priority" default 0x00001000 ---help--- - Select SDMMC1 DMA prority. + Select SDMMC1 DMA priority. Options are: 0x00000000 low, 0x00001000 medium, 0x00002000 high, 0x00003000 very high. Default: medium. diff --git a/arch/arm/src/stm32l5/Make.defs b/arch/arm/src/stm32l5/Make.defs index 0ce8155a11d..a87fd6db07b 100644 --- a/arch/arm/src/stm32l5/Make.defs +++ b/arch/arm/src/stm32l5/Make.defs @@ -28,7 +28,7 @@ HEAD_ASRC = CMN_UASRCS = CMN_UCSRCS = -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -38,7 +38,8 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c -CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_switchcontext.c +CMN_CSRCS += arm_puts.c # Configuration-dependent common files diff --git a/arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h b/arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h index be0dde3ac6b..d2dc00d234b 100644 --- a/arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h +++ b/arch/arm/src/stm32l5/hardware/stm32l562xx_rcc.h @@ -291,7 +291,7 @@ /* PLLSAI1 Configuration register */ -#define RCC_PLLSAI1CFG_PLLSRC_SHIFT (0) /* Bit 0-1: Main PLSAI1 entry clock soure */ +#define RCC_PLLSAI1CFG_PLLSRC_SHIFT (0) /* Bit 0-1: Main PLSAI1 entry clock source */ #define RCC_PLLSAI1CFG_PLLSRC_MASK (3 << RCC_PLLSAI1CFG_PLLSRC_SHIFT) # define RCC_PLLSAI1CFG_PLLSRC_NONE (0 << RCC_PLLSAI1CFG_PLLSRC_SHIFT) /* 000: No clock sent to PLLs */ # define RCC_PLLSAI1CFG_PLLSRC_MSI (1 << RCC_PLLSAI1CFG_PLLSRC_SHIFT) /* 001: MSI selected as PLL source */ @@ -339,7 +339,7 @@ /* PLLSAI2 Configuration register */ -#define RCC_PLLSAI2CFG_PLLSRC_SHIFT (0) /* Bit 0-1: Main PLSAI2 entry clock soure */ +#define RCC_PLLSAI2CFG_PLLSRC_SHIFT (0) /* Bit 0-1: Main PLSAI2 entry clock source */ #define RCC_PLLSAI2CFG_PLLSRC_MASK (3 << RCC_PLLSAI2CFG_PLLSRC_SHIFT) # define RCC_PLLSAI2CFG_PLLSRC_NONE (0 << RCC_PLLSAI2CFG_PLLSRC_SHIFT) /* 000: No clock sent to PLLs */ # define RCC_PLLSAI2CFG_PLLSRC_MSI (1 << RCC_PLLSAI2CFG_PLLSRC_SHIFT) /* 001: MSI selected as PLL source */ diff --git a/arch/arm/src/stm32l5/stm32l5_gpio.c b/arch/arm/src/stm32l5/stm32l5_gpio.c index 4485f9b47bc..1053f32491a 100644 --- a/arch/arm/src/stm32l5/stm32l5_gpio.c +++ b/arch/arm/src/stm32l5/stm32l5_gpio.c @@ -93,7 +93,7 @@ const uint32_t g_gpiobase[STM32L5_NPORTS] = * * Assumptions: * This function is called early in the initialization sequence so that - * no mutual exlusion is necessary. + * no mutual exclusion is necessary. * ****************************************************************************/ @@ -112,7 +112,7 @@ void stm32l5_gpioinit(void) * * Returned Value: * OK on success - * A negated errono valu on invalid port, or when pin is locked as ALT + * A negated errno value on invalid port, or when pin is locked as ALT * function. * * To-Do: Auto Power Enable @@ -301,10 +301,10 @@ int stm32l5_configgpio(uint32_t cfgset) * Description: * Unconfigure a GPIO pin based on bit-encoded description of the pin, set * it into default HiZ state (and possibly mark it's unused) and unlock it - * whether it was previsouly selected as alternative function + * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32l5/stm32l5_gpio.h b/arch/arm/src/stm32l5/stm32l5_gpio.h index 1c46f45b194..8b11fc6c8c1 100644 --- a/arch/arm/src/stm32l5/stm32l5_gpio.h +++ b/arch/arm/src/stm32l5/stm32l5_gpio.h @@ -155,7 +155,7 @@ /* If the pin is a GPIO digital output, then this identifies the initial * output value. If the pin is an input, this bit is overloaded to provide - * the qualifier to distinquish input pull-up and -down: + * the qualifier to distinguish input pull-up and -down: * * 1111 1111 1100 0000 0000 * 9876 5432 1098 7654 3210 @@ -268,10 +268,10 @@ int stm32l5_configgpio(uint32_t cfgset); * Description: * Unconfigure a GPIO pin based on bit-encoded description of the pin, set * it into default HiZ state (and possibly mark it's unused) and unlock it - * whether it was previsouly selected as alternative function + * whether it was previously selected as alternative function * (GPIO_ALT|GPIO_CNF_AFPP|...). * - * This is a safety function and prevents hardware from schocks, as + * This is a safety function and prevents hardware from shocks, as * unexpected write to the Timer Channel Output GPIO to fixed '1' or '0' * while it should operate in PWM mode could produce excessive on-board * currents and trigger over-current/alarm function. diff --git a/arch/arm/src/stm32l5/stm32l5_irq.c b/arch/arm/src/stm32l5/stm32l5_irq.c index db1d6f63fbf..b03f3ebe99c 100644 --- a/arch/arm/src/stm32l5/stm32l5_irq.c +++ b/arch/arm/src/stm32l5/stm32l5_irq.c @@ -133,8 +133,8 @@ static void stm32l5_dumpnvic(const char *msg, int irq) * stm32l5_dbgmonitor, stm32l5_pendsv, stm32l5_reserved * * Description: - * Handlers for various execptions. None are handled and all are fatal - * error conditions. The only advantage these provided over the default + * Handlers for various exceptions. None are handled and all are fatal + * error conditions. The only advantage these provide over the default * unexpected interrupt handler is that they provide a diagnostic output. * ****************************************************************************/ diff --git a/arch/arm/src/stm32l5/stm32l5_pwr.c b/arch/arm/src/stm32l5/stm32l5_pwr.c index 0a6f45edbad..6d05fe50227 100644 --- a/arch/arm/src/stm32l5/stm32l5_pwr.c +++ b/arch/arm/src/stm32l5/stm32l5_pwr.c @@ -251,14 +251,14 @@ bool stm32l5_pwr_vddio2_valid(bool set) if (was_set && !set) { - /* Reset the Vddio2 invalid I/O supply valid bit. */ + /* Reset the Vddio2 independent I/O supply valid bit. */ regval &= ~PWR_CR2_IOSV; stm32l5_pwr_putreg(STM32L5_PWR_CR2_OFFSET, regval); } else if (!was_set && set) { - /* Set the Vddio2 invalid I/O supply valid bit. */ + /* Set the Vddio2 independent I/O supply valid bit. */ regval |= PWR_CR2_IOSV; stm32l5_pwr_putreg(STM32L5_PWR_CR2_OFFSET, regval); diff --git a/arch/arm/src/stm32l5/stm32l5_rcc.c b/arch/arm/src/stm32l5/stm32l5_rcc.c index b18378d416e..5ab9ff7ba87 100644 --- a/arch/arm/src/stm32l5/stm32l5_rcc.c +++ b/arch/arm/src/stm32l5/stm32l5_rcc.c @@ -198,9 +198,9 @@ void stm32l5_clockconfig(void) * operation * re-enable/re-start the PLL * - * This functional performs a subset of the operations performed by + * This function performs a subset of the operations performed by * stm32l5_clockconfig() - * reset the currenlty enabled peripheral clocks. + * reset the currently enabled peripheral clocks. * * If CONFIG_ARCH_BOARD_STM32L5_CUSTOM_CLOCKCONFIG is defined, then * clocking will be enabled by an externally provided, board-specific diff --git a/arch/arm/src/stm32l5/stm32l5_rcc.h b/arch/arm/src/stm32l5/stm32l5_rcc.h index fc3e81542f0..b1ce5acbc20 100644 --- a/arch/arm/src/stm32l5/stm32l5_rcc.h +++ b/arch/arm/src/stm32l5/stm32l5_rcc.h @@ -131,7 +131,7 @@ void stm32l5_clockconfig(void); * * Description: * Any STM32L5 board may replace the "standard" board clock configuration - * logic with its own, custom clock cofiguration logic. + * logic with its own, custom clock configuration logic. * ****************************************************************************/ @@ -163,9 +163,9 @@ void stm32l5_stdclockconfig(void); * operation: When re-awakening from deep-sleep modes, it is necessary to * re-enable/re-start the PLL * - * This functional performs a subset of the operations performed by + * This function performs a subset of the operations performed by * stm32l5_clockconfig(): It does not reset any devices, and it does not - * reset the currenlty enabled peripheral clocks. + * reset the currently enabled peripheral clocks. * * If CONFIG_ARCH_BOARD_STM32L5_CUSTOM_CLOCKCONFIG is defined, then * clocking will be enabled by an externally provided, board-specific diff --git a/arch/arm/src/stm32l5/stm32l5_serial.c b/arch/arm/src/stm32l5/stm32l5_serial.c index b994415980b..21e00bb2103 100644 --- a/arch/arm/src/stm32l5/stm32l5_serial.c +++ b/arch/arm/src/stm32l5/stm32l5_serial.c @@ -1795,9 +1795,9 @@ static int stm32l5serial_interrupt(int irq, FAR void *context, FAR void *arg) * " " USART_ISR_ORE Overrun Error Detected * USART_CR3_CTSIE USART_ISR_CTS CTS flag (not used) * - * NOTE: Some of these status bits must be cleared by explicity writing - * one to the ICR register: USART_ICR_CTSCF, USART_ICR_LBDCF. Note of - * those are currently being used. + * NOTE: Some of these status bits must be cleared by explicitly + * writing one to the ICR register: USART_ICR_CTSCF, USART_ICR_LBDCF. + * None of those are currently being used. */ #ifdef HAVE_RS485 diff --git a/arch/arm/src/stm32l5/stm32l5_spi.c b/arch/arm/src/stm32l5/stm32l5_spi.c index b679c151b58..e209e425bd0 100644 --- a/arch/arm/src/stm32l5/stm32l5_spi.c +++ b/arch/arm/src/stm32l5/stm32l5_spi.c @@ -1727,7 +1727,7 @@ static void spi_bus_initialize(FAR struct stm32l5_spidev_s *priv) * Mode 0: CR1.CPHA=0 and CR1.CPOL=0 * Master: CR1.MSTR=1 * 8-bit: CR2.DS=7 - * MSB tranmitted first: CR1.LSBFIRST=0 + * MSB transmitted first: CR1.LSBFIRST=0 * Replace NSS with SSI & SSI=1: CR1.SSI=1 CR1.SSM=1 * (prevents MODF error) * Two lines full duplex: CR1.BIDIMODE=0 CR1.BIDIOIE=(Don't care) diff --git a/arch/arm/src/stm32l5/stm32l5_start.c b/arch/arm/src/stm32l5/stm32l5_start.c index c490ff58840..8041bbd69fb 100644 --- a/arch/arm/src/stm32l5/stm32l5_start.c +++ b/arch/arm/src/stm32l5/stm32l5_start.c @@ -111,7 +111,7 @@ static inline void stm32l5_fpuconfig(void); #ifdef CONFIG_ARMV8M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/arm/src/str71x/Make.defs b/arch/arm/src/str71x/Make.defs index 35019c9f65d..5322690c5a2 100644 --- a/arch/arm/src/str71x/Make.defs +++ b/arch/arm/src/str71x/Make.defs @@ -30,7 +30,7 @@ CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_stackframe.c CMN_CSRCS += arm_syscall.c arm_unblocktask.c arm_undefinedinsn.c arm_usestack.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c -CMN_CSRCS += arm_lowputs.c arm_vfork.c +CMN_CSRCS += arm_lowputs.c arm_vfork.c arm_puts.c ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) CMN_CSRCS += arm_idle.c diff --git a/arch/arm/src/tiva/Make.defs b/arch/arm/src/tiva/Make.defs index 2483799a861..3ae3f77cdf2 100644 --- a/arch/arm/src/tiva/Make.defs +++ b/arch/arm/src/tiva/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -28,7 +28,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c -CMN_CSRCS += arm_usestack.c arm_vfork.c +CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARM_SEMIHOSTING_HOSTFS),y) CMN_CSRCS += arm_hostfs.c diff --git a/arch/arm/src/tiva/common/tiva_qencoder.c b/arch/arm/src/tiva/common/tiva_qencoder.c index d4d11630019..529c4deae4d 100644 --- a/arch/arm/src/tiva/common/tiva_qencoder.c +++ b/arch/arm/src/tiva/common/tiva_qencoder.c @@ -107,11 +107,12 @@ static int tiva_qe_resetatindex(FAR struct tiva_qe_s *qe); static const struct qe_ops_s g_qe_ops = { - .setup = tiva_qe_setup, - .shutdown = tiva_qe_shutdown, - .position = tiva_qe_position, - .reset = tiva_qe_reset, - .ioctl = tiva_qe_ioctl, + .setup = tiva_qe_setup, + .shutdown = tiva_qe_shutdown, + .position = tiva_qe_position, + .setposmax = NULL, /* not supported yet */ + .reset = tiva_qe_reset, + .ioctl = tiva_qe_ioctl, }; #ifdef CONFIG_TIVA_QEI0 diff --git a/arch/arm/src/xmc4/Make.defs b/arch/arm/src/xmc4/Make.defs index 66d7669c317..bf02e9e99ca 100644 --- a/arch/arm/src/xmc4/Make.defs +++ b/arch/arm/src/xmc4/Make.defs @@ -18,7 +18,7 @@ # ############################################################################ -CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S +CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c @@ -28,7 +28,7 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_releasepending.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c CMN_CSRCS += arm_systemreset.c arm_udelay.c arm_unblocktask.c arm_usestack.c -CMN_CSRCS += arm_vfork.c +CMN_CSRCS += arm_vfork.c arm_switchcontext.c arm_puts.c ifeq ($(CONFIG_ARMV7M_STACKCHECK),y) CMN_CSRCS += arm_stackcheck.c diff --git a/arch/arm/src/xmc4/xmc4_start.c b/arch/arm/src/xmc4/xmc4_start.c index 305d472d37d..21682115e1d 100644 --- a/arch/arm/src/xmc4/xmc4_start.c +++ b/arch/arm/src/xmc4/xmc4_start.c @@ -117,7 +117,7 @@ const uintptr_t g_idle_topstack = HEAP_BASE; #ifdef CONFIG_ARMV7M_STACKCHECK /* we need to get r10 set before we can allow instrumentation calls */ -void __start(void) __attribute__ ((no_instrument_function)); +void __start(void) noinstrument_function; #endif /**************************************************************************** diff --git a/arch/avr/src/Makefile b/arch/avr/src/Makefile index 51784174b76..75aa595dab1 100644 --- a/arch/avr/src/Makefile +++ b/arch/avr/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_FAMILY_AVR32),y) ARCH_SUBDIR = avr32 @@ -59,8 +59,8 @@ OBJS = $(AOBJS) $(COBJS) # Override in Make.defs if linker is not 'ld' -LDSTARTGROUP ?= -Wl,--start-group -LDENDGROUP ?= -Wl,--end-group +LDSTARTGROUP ?= --start-group +LDENDGROUP ?= --end-group LDFLAGS += $(ARCHSCRIPT) BOARDMAKE = $(if $(wildcard board$(DELIM)Makefile),y,) @@ -104,7 +104,7 @@ board/libboard$(LIBEXT): nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT) @echo "LD: nuttx" - $(Q) $(LD) -Wl,--entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ + $(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ -o $(NUTTX) $(filter-out board/libboard$(LIBEXT), $^) $(EXTRA_OBJS) \ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP) ifneq ($(CONFIG_WINDOWS_NATIVE),y) @@ -140,8 +140,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -149,7 +147,7 @@ endif $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/avr/src/at32uc3/Make.defs b/arch/avr/src/at32uc3/Make.defs index 8a7a5a5e718..a501f141990 100644 --- a/arch/avr/src/at32uc3/Make.defs +++ b/arch/avr/src/at32uc3/Make.defs @@ -31,7 +31,7 @@ CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c CMN_CSRCS += up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c -CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c +CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c up_puts.c # Configuration-dependent common files diff --git a/arch/avr/src/avr/Toolchain.defs b/arch/avr/src/avr/Toolchain.defs index 0e9adcd25c7..d1b62de149a 100644 --- a/arch/avr/src/avr/Toolchain.defs +++ b/arch/avr/src/avr/Toolchain.defs @@ -61,25 +61,25 @@ endif ifeq ($(CONFIG_ARCH_CHIP_ATMEGA128),y) ARCHCPUFLAGS += -mmcu=atmega128 - LDFLAGS += -Wl,-mavr51 + LDFLAGS += -mavr51 else ifeq ($(CONFIG_ARCH_CHIP_ATMEGA1284P),y) ARCHCPUFLAGS += -mmcu=atmega1284p - LDFLAGS += -Wl,-mavr51 + LDFLAGS += -mavr51 else ifeq ($(CONFIG_ARCH_CHIP_AT90USB646),y) ARCHCPUFLAGS += -mmcu=at90usb646 - LDFLAGS += -Wl,-mavr5 + LDFLAGS += -mavr5 else ifeq ($(CONFIG_ARCH_CHIP_AT90USB647),y) ARCHCPUFLAGS += -mmcu=at90usb647 - LDFLAGS += -Wl,-mavr5 + LDFLAGS += -mavr5 else ifeq ($(CONFIG_ARCH_CHIP_AT90USB1286),y) ARCHCPUFLAGS += -mmcu=at90usb1286 - LDFLAGS += -Wl,-mavr51 + LDFLAGS += -mavr51 else ifeq ($(CONFIG_ARCH_CHIP_AT90USB1287),y) ARCHCPUFLAGS += -mmcu=at90usb1287 - LDFLAGS += -Wl,-mavr51 + LDFLAGS += -mavr51 else ifeq ($(CONFIG_ARCH_CHIP_ATMEGA2560),y) ARCHCPUFLAGS += -mmcu=atmega2560 - LDFLAGS += -Wl,-mavr6 + LDFLAGS += -mavr6 else $(error "No valid CONFIG_ARCH_CHIP_ set in the configuration") endif @@ -94,26 +94,22 @@ endif ifeq ($(CONFIG_AVR_TOOLCHAIN),BUILDROOT) CROSSDEV ?= avr-nuttx-elf- - LDFLAGS += -nostartfiles -nodefaultlibs endif # AVR CrossPack under macOS ifeq ($(CONFIG_AVR_TOOLCHAIN),CROSSPACK) CROSSDEV ?= avr- - LDFLAGS += -nostartfiles -nodefaultlibs endif # GCC toolchain under Linux ifeq ($(CONFIG_AVR_TOOLCHAIN),LINUXGCC) CROSSDEV ?= avr- - LDFLAGS += -nostartfiles -nodefaultlibs endif ifeq ($(CONFIG_AVR_TOOLCHAIN),WINAVR) CROSSDEV ?= avr- - LDFLAGS += -nostartfiles -nodefaultlibs endif # Default toolchain @@ -121,7 +117,7 @@ endif CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/avr/src/avr/up_reprioritizertr.c b/arch/avr/src/avr/up_reprioritizertr.c index c876b2a3918..7bf1565e963 100644 --- a/arch/avr/src/avr/up_reprioritizertr.c +++ b/arch/avr/src/avr/up_reprioritizertr.c @@ -50,8 +50,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -109,7 +108,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/avr/src/avr32/Toolchain.defs b/arch/avr/src/avr32/Toolchain.defs index 1078ec3257e..f3ce5bf7698 100644 --- a/arch/avr/src/avr32/Toolchain.defs +++ b/arch/avr/src/avr32/Toolchain.defs @@ -41,7 +41,7 @@ ARCHCPUFLAGS = -mpart=uc3b0256 CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/avr/src/avr32/up_exceptions.S b/arch/avr/src/avr32/up_exceptions.S index 7f9e616d38e..88bb9e06502 100644 --- a/arch/avr/src/avr32/up_exceptions.S +++ b/arch/avr/src/avr32/up_exceptions.S @@ -36,7 +36,7 @@ .global avr32_int2irqno /* Returns IRQ number of INT2 event */ .global avr32_int3irqno /* Returns IRQ number of INT3 event */ .global up_doirq /* Dispatch an IRQ */ - .global up_fullcontextrestore /* Restore new task contex */ + .global up_fullcontextrestore /* Restore new task context */ /**************************************************************************** * Macros @@ -303,7 +303,7 @@ avr32_common: #endif /* On return, r12 will hold the new address of the register context */ - /* save area. On an interrupt contex switch, this will (1) not be the */ + /* save area. On an interrupt context switch, this will (1) not be the */ /* same as the value of r12 passed to up_doirq(), and (2) may not */ /* reside on a stack. */ diff --git a/arch/avr/src/avr32/up_fullcontextrestore.S b/arch/avr/src/avr32/up_fullcontextrestore.S index 2a12427ee7a..32a91d1aeb6 100644 --- a/arch/avr/src/avr32/up_fullcontextrestore.S +++ b/arch/avr/src/avr32/up_fullcontextrestore.S @@ -39,7 +39,7 @@ * Name: up_fullcontextrestore * * Description: - * Restore the full-running contex of a thread. + * Restore the full-running context of a thread. * * NOTE: Thus function must handle one very strange case. That is when * this function is called with up_sigdeliver(). That case is strange in diff --git a/arch/avr/src/avr32/up_reprioritizertr.c b/arch/avr/src/avr32/up_reprioritizertr.c index a3d26a4d359..ccc3bf431cc 100644 --- a/arch/avr/src/avr32/up_reprioritizertr.c +++ b/arch/avr/src/avr32/up_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/hc/src/Makefile b/arch/hc/src/Makefile index 7c76ad4b2d8..2892b83530b 100644 --- a/arch/hc/src/Makefile +++ b/arch/hc/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_HC12),y) ARCH_SUBDIR = hc12 @@ -60,8 +60,8 @@ OBJS = $(AOBJS) $(COBJS) # Override in Make.defs if linker is not 'ld' -LDSTARTGROUP ?= -Wl,--start-group -LDENDGROUP ?= -Wl,--end-group +LDSTARTGROUP ?= --start-group +LDENDGROUP ?= --end-group LDFLAGS += $(ARCHSCRIPT) BOARDMAKE = $(if $(wildcard board$(DELIM)Makefile),y,) @@ -119,7 +119,7 @@ board/libboard$(LIBEXT): nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT) $(Q) echo "LD: nuttx" - $(Q) $(LD) -Wl,--entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ + $(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ -o $(NUTTX) $(filter-out board/libboard$(LIBEXT), $^) $(EXTRA_OBJS) \ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP) ifneq ($(CONFIG_WINDOWS_NATIVE),y) @@ -155,8 +155,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -164,7 +162,7 @@ endif $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/hc/src/common/up_reprioritizertr.c b/arch/hc/src/common/up_reprioritizertr.c index bdd111f8481..04f074fa84a 100644 --- a/arch/hc/src/common/up_reprioritizertr.c +++ b/arch/hc/src/common/up_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/mips/include/pic32mz/chip.h b/arch/mips/include/pic32mz/chip.h index 2e6b2696ca3..e219cbfad31 100644 --- a/arch/mips/include/pic32mz/chip.h +++ b/arch/mips/include/pic32mz/chip.h @@ -101,6 +101,40 @@ # define CHIP_NJTAG 1 /* Has JTAG */ # define CHIP_NTRACE 1 /* Has trace capability */ +/* Available in 64/100/124/144 pin packages. Description here is + * specifically for the 100 pin package (PIC32MZ2048EFG100). + */ + +#elif defined(CONFIG_ARCH_CHIP_PIC32MZ2048EFG) +# undef CHIP_PIC32MZEC /* Not PIC32MZEC family */ +# define CHIP_PIC32MZEF 1 /* PIC32MZEF family */ +# define CHIP_BOOTFLASH_KB 160 /* 160Kb boot FLASH */ +# define CHIP_PROGFLASH_KB 2048 /* 2048Kb program FLASH */ +# define CHIP_DATAMEM_KB 512 /* 512Kb data memory */ +# define CHIP_NTIMERS 9 /* 5 timers */ +# define CHIP_NIC 9 /* 5 input capture */ +# define CHIP_NOC 9 /* 5 output compare */ +# define CHIP_NUARTS 6 /* 6 UARTS */ +# define CHIP_UARTFIFOD 8 /* 8 level deep UART FIFOs */ +# define CHIP_NSPI 6 /* 6 SPI/I2S interfaces */ +# define CHIP_NCAN 0 /* No CAN 2.0B interfaces */ +# define CHIP_NCRTYPO 0 /* No crypto support */ +# define CHIP_RNG 1 /* 1 Random number generator */ +# define CHIP_NDMACH 8 /* 8 programmable DMA channels */ +# define CHIP_NUSBDMACHAN 12 /* 12 dedicated DMA channels */ +# define CHIP_NADC10 40 /* 40 ADC channels */ +# define CHIP_NCM 2 /* 2 Analog comparators */ +# define CHIP_USBHSOTG 1 /* 1 USB 2.0 HSOTG */ +# define CHIP_NI2C 5 /* 5 I2C interfaces */ +# define CHIP_NPMP 1 /* Have parallel master port */ +# define CHIP_NEBI 1 /* Have eternal bus interface */ +# define CHIP_NSQI 1 /* 1 Serial quad interface */ +# define CHIP_NRTCC 1 /* Has RTCC */ +# define CHIP_NETHERNET 1 /* 1 Ethernet MAC */ +# define CHIP_NPORTS 7 /* 7 ports (A-G) */ +# define CHIP_NJTAG 1 /* Has JTAG */ +# define CHIP_NTRACE 1 /* Has trace capability */ + /* Available in 64/100/124/144 pin packages. Description here is * specifically for the 124 and 144 pin packages (PIC32MZ2048EFH1100, and * PIC32MZ2048EFH144). The PIC32MZ2048EFH1100 differs in that it has only diff --git a/arch/mips/src/Makefile b/arch/mips/src/Makefile index 394500aa3f8..9a3463c0676 100644 --- a/arch/mips/src/Makefile +++ b/arch/mips/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_MIPS),y) ARCH_SUBDIR = mips32 @@ -138,8 +138,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -147,7 +145,7 @@ endif $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/mips/src/mips32/Kconfig b/arch/mips/src/mips32/Kconfig index 9de7126f86b..67992cc52c4 100644 --- a/arch/mips/src/mips32/Kconfig +++ b/arch/mips/src/mips32/Kconfig @@ -67,6 +67,11 @@ config MIPS32_TOOLCHAIN_PINGUINOL depends on HOST_LINUX || HOST_MACOS select ARCH_TOOLCHAIN_GNU +config MIPS32_TOOLCHAIN_SOURCERY_CODEBENCH_LITE + bool "Sourcery CodeBench Lite for MIPS ELF toolchain under Linux" + depends on HOST_LINUX + select ARCH_TOOLCHAIN_GNU + endchoice config MIPS32_TOOLCHAIN_MICROCHIP_XC32_LICENSED diff --git a/arch/mips/src/mips32/Toolchain.defs b/arch/mips/src/mips32/Toolchain.defs index 2b1ac516bd7..c148e572f02 100644 --- a/arch/mips/src/mips32/Toolchain.defs +++ b/arch/mips/src/mips32/Toolchain.defs @@ -39,6 +39,12 @@ ifeq ($(filter y, \ CONFIG_MIPS32_TOOLCHAIN ?= PINGUINOL endif +ifeq ($(filter y, \ + $(CONFIG_MIPS32_TOOLCHAIN_SOURCERY_CODEBENCH_LITE) \ + ),y) + CONFIG_MIPS32_TOOLCHAIN ?= SOURCERY_CODEBENCH_LITE +endif + ifeq ($(filter y, \ $(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32) \ ),y) @@ -149,6 +155,17 @@ ifeq ($(CONFIG_MIPS32_TOOLCHAIN),PINGUINOL) LDSCRIPT = pinguino-debug.ld endif +# Sourcery CodeBench Lite toolchain under Linux + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN),SOURCERY_CODEBENCH_LITE) + CROSSDEV ?= mips-sde-elf- + MAXOPTIMIZATION ?= -O2 + ARCHCPUFLAGS = -mlong32 -membedded-data -msoft-float -march=$(MIPS_MARCH) $(MIPS_MICROMIPS) -EL + ARCHPICFLAGS = -fpic -membedded-pic + LDFLAGS += -nostartfiles -nodefaultlibs + LDSCRIPT = sourcery-debug.ld +endif + # Microchip XC32 toolchain under Linux ifeq ($(CONFIG_MIPS32_TOOLCHAIN),MICROCHIPL_XC32) diff --git a/arch/mips/src/mips32/mips_reprioritizertr.c b/arch/mips/src/mips32/mips_reprioritizertr.c index f5088c51071..5d04a586388 100644 --- a/arch/mips/src/mips32/mips_reprioritizertr.c +++ b/arch/mips/src/mips32/mips_reprioritizertr.c @@ -53,8 +53,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -112,7 +111,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/mips/src/pic32mx/pic32mx_usbdev.c b/arch/mips/src/pic32mx/pic32mx_usbdev.c index 20ec742cd12..f248f56c30a 100644 --- a/arch/mips/src/pic32mx/pic32mx_usbdev.c +++ b/arch/mips/src/pic32mx/pic32mx_usbdev.c @@ -576,7 +576,7 @@ static const struct usbdev_ops_s g_devops = */ static volatile struct usbotg_bdtentry_s g_bdt[4*PIC32MX_NENDPOINTS] - __attribute__ ((aligned(512))); + aligned_data(512); /**************************************************************************** * Private Functions diff --git a/arch/mips/src/pic32mz/Kconfig b/arch/mips/src/pic32mz/Kconfig index d121535bf5a..a14ea1d1335 100644 --- a/arch/mips/src/pic32mz/Kconfig +++ b/arch/mips/src/pic32mz/Kconfig @@ -26,6 +26,13 @@ config ARCH_CHIP_PIC32MZ2048ECM the ARCH_CHIP_PIC32MZ2048ECM144-I/PH used with the PIC32MZ EC STARTER KIT DM320006-C (no longer available) +config ARCH_CHIP_PIC32MZ2048EFG + bool "PIC32MZ2048EFG" + select ARCH_CHIP_PIC32MZEF + ---help--- + Microchip PIC32MZ2048EFG (MIPS32 M5150) such as the + PIC32MZ2048EFG100 used in the chipKIT Wi-FIRE. + config ARCH_CHIP_PIC32MZ2048EFH bool "PIC32MZ2048EFH" select ARCH_CHIP_PIC32MZEF diff --git a/arch/mips/src/pic32mz/pic32mz_ethernet.c b/arch/mips/src/pic32mz/pic32mz_ethernet.c index d21b413e586..0839521521a 100644 --- a/arch/mips/src/pic32mz/pic32mz_ethernet.c +++ b/arch/mips/src/pic32mz/pic32mz_ethernet.c @@ -388,13 +388,13 @@ struct pic32mz_driver_s /* Descriptors and packet buffers */ union pic32mz_rxdesc_u g_rxdesc[CONFIG_PIC32MZ_ETH_NRXDESC] - __attribute__((aligned(PIC32MZ_DCACHE_LINESIZE))); + aligned_data(PIC32MZ_DCACHE_LINESIZE); union pic32mz_txdesc_u g_txdesc[CONFIG_PIC32MZ_ETH_NTXDESC] - __attribute__((aligned(PIC32MZ_DCACHE_LINESIZE))); + aligned_data(PIC32MZ_DCACHE_LINESIZE); uint8_t g_buffers[PIC32MZ_NBUFFERS * PIC32MZ_ALIGNED_BUFSIZE] - __attribute__((aligned(PIC32MZ_DCACHE_LINESIZE))); + aligned_data(PIC32MZ_DCACHE_LINESIZE); /* Array of ethernet driver status structures */ diff --git a/arch/misoc/src/Makefile b/arch/misoc/src/Makefile index a00a2b3500f..c68ddf6a5bf 100644 --- a/arch/misoc/src/Makefile +++ b/arch/misoc/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_CHIP_LM32),y) ARCH_SUBDIR = lm32 @@ -61,8 +61,8 @@ OBJS = $(AOBJS) $(COBJS) # Override in Make.defs if linker is not 'ld' -LDSTARTGROUP ?= -Wl,--start-group -LDENDGROUP ?= -Wl,--end-group +LDSTARTGROUP ?= --start-group +LDENDGROUP ?= --end-group LDFLAGS += $(ARCHSCRIPT) BOARDMAKE = $(if $(wildcard board$(DELIM)Makefile),y,) @@ -105,7 +105,7 @@ board/libboard$(LIBEXT): $(Q) $(MAKE) -C board libboard$(LIBEXT) EXTRAFLAGS="$(EXTRAFLAGS)" nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT) - $(Q) $(LD) -Wl,--entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ + $(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ -o $(NUTTX) $(filter-out board/libboard$(LIBEXT), $^) $(EXTRA_OBJS) \ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP) ifneq ($(CONFIG_WINDOWS_NATIVE),y) @@ -141,8 +141,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -150,7 +148,7 @@ endif $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/misoc/src/lm32/Toolchain.defs b/arch/misoc/src/lm32/Toolchain.defs index 2157bbf6ae0..a2352d6b4c2 100644 --- a/arch/misoc/src/lm32/Toolchain.defs +++ b/arch/misoc/src/lm32/Toolchain.defs @@ -78,7 +78,7 @@ endif CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/misoc/src/lm32/lm32_reprioritizertr.c b/arch/misoc/src/lm32/lm32_reprioritizertr.c index 11c5cc7f1a8..5203abe962c 100644 --- a/arch/misoc/src/lm32/lm32_reprioritizertr.c +++ b/arch/misoc/src/lm32/lm32_reprioritizertr.c @@ -53,8 +53,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -112,7 +111,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index 27615411628..7b130523314 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -1,36 +1,20 @@ /**************************************************************************** * arch/misoc/src/lm32/lm32_allocateheap.c - * LM32 C startup code. * - * Adapted for NuttX: + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Ramtin Amin + * http://www.apache.org/licenses/LICENSE-2.0 * - * Derives from LatticeMico32 C startup code. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/arch/misoc/src/minerva/Toolchain.defs b/arch/misoc/src/minerva/Toolchain.defs index d74f570faff..4da093e9211 100644 --- a/arch/misoc/src/minerva/Toolchain.defs +++ b/arch/misoc/src/minerva/Toolchain.defs @@ -32,7 +32,7 @@ endif CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/misoc/src/minerva/minerva_reprioritizertr.c b/arch/misoc/src/minerva/minerva_reprioritizertr.c index 565d3ffdf01..fcd1b0d3ab1 100644 --- a/arch/misoc/src/minerva/minerva_reprioritizertr.c +++ b/arch/misoc/src/minerva/minerva_reprioritizertr.c @@ -53,8 +53,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,8 +109,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) if (switch_needed) { /* If we are going to do a context switch, then now is the right - * time to add any pending tasks back into the ready-to-run list - * task list now. + * time to add any pending tasks back into the ready-to-run list. */ if (g_pendingtasks.head) diff --git a/arch/or1k/src/Makefile b/arch/or1k/src/Makefile index a822d1eb1da..cac8df8de8b 100644 --- a/arch/or1k/src/Makefile +++ b/arch/or1k/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_MOR1KX),y) # OpenRISC mor1kx ARCH_SUBDIR = mor1kx @@ -79,8 +79,8 @@ LDFLAGS += $(ARCHSCRIPT) # Override in Make.defs if linker is not 'ld' -LDSTARTGROUP ?= -Wl,--start-group -LDENDGROUP ?= -Wl,--end-group +LDSTARTGROUP ?= --start-group +LDENDGROUP ?= --end-group BOARDMAKE = $(if $(wildcard board$(DELIM)Makefile),y,) @@ -141,7 +141,7 @@ board$(DELIM)libboard$(LIBEXT): nuttx$(EXEEXT): $(HEAD_OBJ) board$(DELIM)libboard$(LIBEXT) $(Q) echo "LD: nuttx" - $(Q) $(LD) -Wl,--entry=0x100 $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ + $(Q) $(LD) --entry=0x100 $(LDFLAGS) $(LIBPATHS) $(EXTRA_LIBPATHS) \ -o $(NUTTX) $(filter-out board/libboard$(LIBEXT), $^) $(EXTRA_OBJS) \ $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP) ifneq ($(CONFIG_WINDOWS_NATIVE),y) @@ -181,8 +181,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -191,7 +189,7 @@ endif $(call DELFILE, $(BIN)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/or1k/src/common/up_internal.h b/arch/or1k/src/common/up_internal.h index 150323a2b57..2f83ca78df2 100644 --- a/arch/or1k/src/common/up_internal.h +++ b/arch/or1k/src/common/up_internal.h @@ -180,7 +180,7 @@ EXTERN uint32_t _ebss; /* End+1 of .bss */ #ifdef CONFIG_ARCH_RAMFUNCS -# define __ramfunc__ __attribute__ ((section(".ramfunc"),long_call,noinline)) +# define __ramfunc__ locate_code(".ramfunc") farcall_function noinline_function /* Functions declared in the .ramfunc section will be packaged together * by the linker script and stored in FLASH. During boot-up, the start diff --git a/arch/or1k/src/common/up_reprioritizertr.c b/arch/or1k/src/common/up_reprioritizertr.c index bf22ea41a7b..2a7c315b4af 100644 --- a/arch/or1k/src/common/up_reprioritizertr.c +++ b/arch/or1k/src/common/up_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/or1k/src/mor1kx/Make.defs b/arch/or1k/src/mor1kx/Make.defs index 392820a9b25..cd8f8fd33bd 100644 --- a/arch/or1k/src/mor1kx/Make.defs +++ b/arch/or1k/src/mor1kx/Make.defs @@ -42,6 +42,7 @@ CMN_CSRCS = up_initialize.c \ up_mdelay.c \ up_idle.c \ up_irq.c \ + up_puts.c \ up_uart.c \ up_timer.c \ up_doirq.c \ diff --git a/arch/or1k/src/mor1kx/Toolchain.defs b/arch/or1k/src/mor1kx/Toolchain.defs index af9ab612fa6..6961548d329 100644 --- a/arch/or1k/src/mor1kx/Toolchain.defs +++ b/arch/or1k/src/mor1kx/Toolchain.defs @@ -59,7 +59,7 @@ LDSCRIPT = or1k-elf-debug.ld CC = $(CROSSDEV)gcc CXX = $(CROSSDEV)g++ CPP = $(CROSSDEV)gcc -E -P -x c -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld STRIP = $(CROSSDEV)strip --strip-unneeded AR = $(CROSSDEV)gcc-ar rcs NM = $(CROSSDEV)gcc-nm diff --git a/arch/renesas/include/rx65n/inttypes.h b/arch/renesas/include/rx65n/inttypes.h index 47e30b592f1..2f714760182 100644 --- a/arch/renesas/include/rx65n/inttypes.h +++ b/arch/renesas/include/rx65n/inttypes.h @@ -30,77 +30,77 @@ #define PRId32 "ld" #define PRId64 "lld" -#define PRIdPTR "d" +#define PRIdPTR "ld" #define PRIi8 "i" #define PRIi16 "i" #define PRIi32 "li" #define PRIi64 "lli" -#define PRIiPTR "i" +#define PRIiPTR "li" #define PRIo8 "o" #define PRIo16 "o" #define PRIo32 "lo" #define PRIo64 "llo" -#define PRIoPTR "o" +#define PRIoPTR "lo" #define PRIu8 "u" #define PRIu16 "u" #define PRIu32 "lu" #define PRIu64 "llu" -#define PRIuPTR "u" +#define PRIuPTR "lu" #define PRIx8 "x" #define PRIx16 "x" #define PRIx32 "lx" #define PRIx64 "llx" -#define PRIxPTR "x" +#define PRIxPTR "lx" #define PRIX8 "X" #define PRIX16 "X" #define PRIX32 "lX" #define PRIX64 "llX" -#define PRIXPTR "X" +#define PRIXPTR "lX" #define SCNd8 "hhd" #define SCNd16 "hd" #define SCNd32 "ld" #define SCNd64 "lld" -#define SCNdPTR "d" +#define SCNdPTR "ld" #define SCNi8 "hhi" #define SCNi16 "hi" #define SCNi32 "li" #define SCNi64 "lli" -#define SCNiPTR "i" +#define SCNiPTR "li" #define SCNo8 "hho" #define SCNo16 "ho" #define SCNo32 "lo" #define SCNo64 "llo" -#define SCNoPTR "o" +#define SCNoPTR "lo" #define SCNu8 "hhu" #define SCNu16 "hu" #define SCNu32 "lu" #define SCNu64 "llu" -#define SCNuPTR "u" +#define SCNuPTR "lu" #define SCNx8 "hhx" #define SCNx16 "hx" #define SCNx32 "lx" #define SCNx64 "llx" -#define SCNxPTR "x" +#define SCNxPTR "lx" #define INT8_C(x) x #define INT16_C(x) x diff --git a/arch/renesas/src/Makefile b/arch/renesas/src/Makefile index 36e0738c9d4..1dc6b7d1215 100644 --- a/arch/renesas/src/Makefile +++ b/arch/renesas/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ARCH_SRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src @@ -149,8 +149,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -158,7 +156,7 @@ endif $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/renesas/src/common/up_reprioritizertr.c b/arch/renesas/src/common/up_reprioritizertr.c index 75d3fcf9eb8..c0f03925fa3 100644 --- a/arch/renesas/src/common/up_reprioritizertr.c +++ b/arch/renesas/src/common/up_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/renesas/src/rx65n/rx65n_dtc.c b/arch/renesas/src/rx65n/rx65n_dtc.c index 1968ba91969..81dbc8d85a1 100644 --- a/arch/renesas/src/rx65n/rx65n_dtc.c +++ b/arch/renesas/src/rx65n/rx65n_dtc.c @@ -1252,7 +1252,7 @@ void rx65n_dtc_srcdeactivation(DTC_HANDLE handle, uint8_t src) if (dtchandle->initialized) { - /* Disable the interrupt soure */ + /* Disable the interrupt source */ ICU.DTCER[act_source].BIT.DTCE = 0; } diff --git a/arch/renesas/src/rx65n/rx65n_eth.c b/arch/renesas/src/rx65n/rx65n_eth.c index cba34aedf2c..671ccd1860f 100644 --- a/arch/renesas/src/rx65n/rx65n_eth.c +++ b/arch/renesas/src/rx65n/rx65n_eth.c @@ -238,7 +238,7 @@ * interrupt. */ -#define ETHER_CFG_AL1_INT_PRIORTY (15) +#define ETHER_CFG_AL1_INT_PRIORITY (15) /* Use LINKSTA signal for detect link status changes * 0 = unused (use PHY-LSI status register) @@ -336,7 +336,7 @@ /* DMA descriptor buffer alignment to 32 bytes */ -#define NX_ALIGN32 __attribute__((aligned(32))) +#define NX_ALIGN32 aligned_data(32) /**************************************************************************** * Public Variables @@ -3114,7 +3114,7 @@ void rx65n_ether_enable_icu(void) /* Priority to this interrupt should be value 2 */ - ipl = ETHER_CFG_AL1_INT_PRIORTY; + ipl = ETHER_CFG_AL1_INT_PRIORITY; /* Disable group interrupts */ diff --git a/arch/renesas/src/rx65n/rx65n_usbhost.c b/arch/renesas/src/rx65n/rx65n_usbhost.c index cff082f7189..6a7dc7ddd5b 100644 --- a/arch/renesas/src/rx65n/rx65n_usbhost.c +++ b/arch/renesas/src/rx65n/rx65n_usbhost.c @@ -250,12 +250,12 @@ struct rx65n_usbhost_list_s /* Variable length buffer data follows */ }; -struct rx65n_usbhost_ed_s __attribute__ ((aligned (32))); -struct rx65n_usbhost_gtd_s __attribute__ ((aligned (32))); +struct rx65n_usbhost_ed_s aligned_data(32); +struct rx65n_usbhost_gtd_s aligned_data(32); /* This must be aligned to a 256-byte boundary */ -static struct ohci_hcca_s g_hcca __attribute__ ((aligned (256))); +static struct ohci_hcca_s g_hcca aligned_data(256); static struct ohci_hcca_s *HCCA; static struct rx65n_usbhost_gtd_s *TDTAIL; @@ -7209,7 +7209,7 @@ static int rx65n_usbhost_ctrlout(struct usbhost_driver_s *drvr, static int dev_addressed_state = 0; /* Assumption : This control out is called first time for - * set address command. Just reseting the bus after the + * set address command. Just resetting the bus after the * set address command */ diff --git a/arch/renesas/src/rx65n/rx65n_vector_table.c b/arch/renesas/src/rx65n/rx65n_vector_table.c index 0ce24009068..f2b6cc63e2a 100644 --- a/arch/renesas/src/rx65n/rx65n_vector_table.c +++ b/arch/renesas/src/rx65n/rx65n_vector_table.c @@ -30,13 +30,13 @@ * Pre-processor Definitions ****************************************************************************/ -#define OFS_REG __attribute__ ((section (".ofs1"))) /* 0xfe7f5d00 */ -#define OFS_TMINF __attribute__ ((section (".ofs2"))) /* 0xfe7f5d10 */ -#define OFS_SPCC __attribute__ ((section (".ofs3"))) /* 0xfe7f5d40 */ -#define OFS_TMEF __attribute__ ((section (".ofs4"))) /* 0xfe7f5d48 */ -#define OFS_OSIS __attribute__ ((section (".ofs5"))) /* 0xfe7f5d50 */ -#define OFS_FAW __attribute__ ((section (".ofs6"))) /* 0xfe7f5d64 */ -#define OFS_ROMCODE __attribute__ ((section (".ofs7"))) /* 0xfe7f5d70 */ +#define OFS_REG locate_data(".ofs1") /* 0xfe7f5d00 */ +#define OFS_TMINF locate_data(".ofs2") /* 0xfe7f5d10 */ +#define OFS_SPCC locate_data(".ofs3") /* 0xfe7f5d40 */ +#define OFS_TMEF locate_data(".ofs4") /* 0xfe7f5d48 */ +#define OFS_OSIS locate_data(".ofs5") /* 0xfe7f5d50 */ +#define OFS_FAW locate_data(".ofs6") /* 0xfe7f5d64 */ +#define OFS_ROMCODE locate_data(".ofs7") /* 0xfe7f5d70 */ /* SPCC register */ @@ -181,7 +181,7 @@ void r_floatingpoint_exception(void) #endif } -#define EXVECT_SECT __attribute__ ((section (".exvectors"))) +#define EXVECT_SECT locate_data(".exvectors") const void *except_vectors[] EXVECT_SECT = { @@ -218,7 +218,7 @@ const void *except_vectors[] EXVECT_SECT = r_nmi_exception /* 0xfffffff8 NMI */ }; -#define FVECT_SECT __attribute__ ((section (".fvectors"))) +#define FVECT_SECT locate_data(".fvectors") extern void _start(void); /* defined in rx65n_head.S */ const void *hardware_vectors[] FVECT_SECT = { @@ -227,7 +227,7 @@ const void *hardware_vectors[] FVECT_SECT = _start /* Power On Reset PC */ }; -#define RVECT_SECT __attribute__ ((section (".rvectors"))) +#define RVECT_SECT locate_data(".rvectors") const void *relocatable_vectors[256] RVECT_SECT = { 0 diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig index 1bbe8145d18..00a39198502 100644 --- a/arch/risc-v/Kconfig +++ b/arch/risc-v/Kconfig @@ -67,6 +67,7 @@ config ARCH_CHIP_MPFS select ARCH_RV64GC select ARCH_HAVE_MPU select ARCH_HAVE_RESET + select ARCH_HAVE_PWM_MULTICHAN ---help--- MicroChip Polarfire processor (RISC-V 64bit core with GCVX extensions). diff --git a/arch/risc-v/include/tls.h b/arch/risc-v/include/tls.h index 98bda2f7ec5..ba0a09afeb8 100644 --- a/arch/risc-v/include/tls.h +++ b/arch/risc-v/include/tls.h @@ -63,7 +63,7 @@ ****************************************************************************/ #ifdef CONFIG_TLS_ALIGNED -static inline FAR struct tls_info_s *up_tls_info(void) +static inline struct tls_info_s *up_tls_info(void) { DEBUGASSERT(!up_interrupt_context()); return TLS_INFO((uintptr_t)up_getsp()); diff --git a/arch/risc-v/src/Makefile b/arch/risc-v/src/Makefile index f40811d6d0a..939215ef864 100644 --- a/arch/risc-v/src/Makefile +++ b/arch/risc-v/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_RV32I),y) # Base Integer support ARCH_SUBDIR = rv32i @@ -182,8 +182,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -193,7 +191,7 @@ endif $(call DELFILE, $(HEAD_OBJ)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/risc-v/src/bl602/Make.defs b/arch/risc-v/src/bl602/Make.defs index 99558179b38..43575a84cd4 100644 --- a/arch/risc-v/src/bl602/Make.defs +++ b/arch/risc-v/src/bl602/Make.defs @@ -51,6 +51,7 @@ CHIP_CSRCS = bl602_allocateheap.c CHIP_CSRCS += bl602_idle.c bl602_irq.c bl602_irq_dispatch.c CHIP_CSRCS += bl602_serial.c bl602_lowputc.c bl602_tim.c CHIP_CSRCS += bl602_start.c bl602_timerisr.c bl602_efuse.c +CHIP_CSRCS += bl602_os_hal.c ifeq ($(CONFIG_I2C),y) CHIP_CSRCS += bl602_i2c.c @@ -83,7 +84,7 @@ CHIP_CSRCS += bl602_glb.c bl602_gpio.c bl602_hbn.c bl602_systemreset.c ifeq ($(CONFIG_BL602_WIRELESS),y) WIRELESS_DRV_UNPACK = bl_blob -WIRELESS_DRV_VERSION = 1.8.0 +WIRELESS_DRV_VERSION = 1.9.1-dev WIRELESS_DRV_ZIP = v$(WIRELESS_DRV_VERSION).zip WIRELESS_DRV_URL = https://github.com/bouffalolab/bl_blob/archive/refs/heads @@ -100,7 +101,7 @@ chip/$(WIRELESS_DRV_UNPACK): $(WIRELESS_DRV_ZIP) context:: chip/$(WIRELESS_DRV_UNPACK) -clean_context:: +distclean:: $(call DELFILE, chip/$(WIRELESS_DRV_ZIP)) $(call DELDIR, chip/$(WIRELESS_DRV_UNPACK)) @@ -108,7 +109,7 @@ INCLUDES += $(shell $(INCDIR) "$(CC)" $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(WIRELE CHIP_CSRCS += bl602_netdev.c EXTRA_LIBPATHS += -L $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(WIRELESS_DRV_UNPACK)$(DELIM)libs$(DELIM)BL602$(DELIM)nuttx -EXTRA_LIBS += -lbl602_wifi -lblecontroller +EXTRA_LIBS += -lbl602_wifi -lbl602_wifi_manage -lblecontroller # Due to some Wi-Fi related libraries, the option is need to avoid linking too much # unused functions. diff --git a/arch/risc-v/src/bl602/bl602_allocateheap.c b/arch/risc-v/src/bl602/bl602_allocateheap.c index 56b952b2bd2..73613b44422 100644 --- a/arch/risc-v/src/bl602/bl602_allocateheap.c +++ b/arch/risc-v/src/bl602/bl602_allocateheap.c @@ -57,9 +57,9 @@ extern uint8_t _heap_wifi_size; * ****************************************************************************/ -void up_allocate_heap(FAR void **heap_start, size_t *heap_size) +void up_allocate_heap(void **heap_start, size_t *heap_size) { - *heap_start = (FAR void *)&_heap_start; + *heap_start = (void *)&_heap_start; *heap_size = (size_t)&_heap_size; } diff --git a/arch/risc-v/src/bl602/bl602_hbn.h b/arch/risc-v/src/bl602/bl602_hbn.h index d09248cb253..267267476e3 100644 --- a/arch/risc-v/src/bl602/bl602_hbn.h +++ b/arch/risc-v/src/bl602/bl602_hbn.h @@ -64,7 +64,7 @@ extern "C" #define BL602_HBN_INT_ACOMP0 (20) /* HBN interrupt type: ACOMP0 */ #define BL602_HBN_INT_ACOMP1 (22) /* HBN interrupt type: ACOMP1 */ -typedef CODE int (*bl602_hbn_cb_t)(FAR void *arg); +typedef int (*bl602_hbn_cb_t)(void *arg); /**************************************************************************** * Public Function Prototypes diff --git a/arch/risc-v/src/bl602/bl602_head.S b/arch/risc-v/src/bl602/bl602_head.S index 2439e13f3e8..54b43cd0bc2 100644 --- a/arch/risc-v/src/bl602/bl602_head.S +++ b/arch/risc-v/src/bl602/bl602_head.S @@ -77,12 +77,17 @@ exception_common: addi s0, sp, XCPTCONTEXT_SIZE sw s0, 2*4(sp) /* original SP */ - /* Setup arg0(exception cause), arg1(context) */ - - csrr a0, mcause /* exception cause */ csrr s0, mepc sw s0, 0(sp) /* exception PC */ +#ifdef CONFIG_STACK_OVERFLOW_CHECK + la t0, __cyg_profile_func_enter + jalr x1, 0(t0) +#endif + + /* Setup arg0(exception cause), arg1(context) */ + + csrr a0, mcause /* exception cause */ mv a1, sp /* context = sp */ #if CONFIG_ARCH_INTERRUPTSTACK > 15 diff --git a/arch/risc-v/src/bl602/bl602_i2c.c b/arch/risc-v/src/bl602/bl602_i2c.c index e0ea59b338e..23d5a10a833 100644 --- a/arch/risc-v/src/bl602/bl602_i2c.c +++ b/arch/risc-v/src/bl602/bl602_i2c.c @@ -114,12 +114,12 @@ struct bl602_i2c_priv_s * Private Function Prototypes ****************************************************************************/ -static int bl602_i2c_transfer(FAR struct i2c_master_s *dev, - FAR struct i2c_msg_s * msgs, +static int bl602_i2c_transfer(struct i2c_master_s *dev, + struct i2c_msg_s * msgs, int count); #ifdef CONFIG_I2C_RESET -static int bl602_i2c_reset(FAR struct i2c_master_s *dev); +static int bl602_i2c_reset(struct i2c_master_s *dev); #endif /**************************************************************************** @@ -171,7 +171,7 @@ static struct bl602_i2c_priv_s bl602_i2c0_priv = * ****************************************************************************/ -static void bl602_i2c_send_data(FAR struct bl602_i2c_priv_s *priv) +static void bl602_i2c_send_data(struct bl602_i2c_priv_s *priv) { uint32_t temp = 0; uint32_t val = 0; @@ -237,7 +237,7 @@ static void bl602_i2c_recvdata(struct bl602_i2c_priv_s *priv) * ****************************************************************************/ -static void bl602_i2c_sem_init(FAR struct bl602_i2c_priv_s *priv) +static void bl602_i2c_sem_init(struct bl602_i2c_priv_s *priv) { nxsem_init(&priv->sem_excl, 0, 1); @@ -512,7 +512,7 @@ static void bl602_i2c_transfer_enable(struct bl602_i2c_priv_s *priv) * ****************************************************************************/ -static void bl602_i2c_start_transfer(FAR struct bl602_i2c_priv_s *priv) +static void bl602_i2c_start_transfer(struct bl602_i2c_priv_s *priv) { bl602_i2c_clear_status(I2C0); bl602_i2c_config_para(priv); @@ -675,14 +675,14 @@ static void bl602_i2c_set_freq(int freq) * ****************************************************************************/ -static int bl602_i2c_transfer(FAR struct i2c_master_s *dev, - FAR struct i2c_msg_s * msgs, +static int bl602_i2c_transfer(struct i2c_master_s *dev, + struct i2c_msg_s * msgs, int count) { int i; int j; int ret = OK; - FAR struct bl602_i2c_priv_s *priv = (FAR struct bl602_i2c_priv_s *)dev; + struct bl602_i2c_priv_s *priv = (struct bl602_i2c_priv_s *)dev; if (count <= 0) { @@ -780,9 +780,9 @@ static int bl602_i2c_transfer(FAR struct i2c_master_s *dev, ****************************************************************************/ #ifdef CONFIG_I2C_RESET -static int bl602_i2c_reset(FAR struct i2c_master_s *dev) +static int bl602_i2c_reset(struct i2c_master_s *dev) { - FAR struct bl602_i2c_priv_s *priv = (FAR struct bl602_i2c_priv_s *)dev; + struct bl602_i2c_priv_s *priv = (struct bl602_i2c_priv_s *)dev; bl602_swrst_ahb_slave1(AHB_SLAVE1_I2C); bl602_i2c_set_freq(priv->config->clk_freq); @@ -896,7 +896,7 @@ static void bl602_i2c_callback(struct bl602_i2c_priv_s *priv) * ****************************************************************************/ -static int bl602_i2c_irq(int cpuint, void *context, FAR void *arg) +static int bl602_i2c_irq(int cpuint, void *context, void *arg) { uint32_t tmp_val; @@ -1012,10 +1012,10 @@ struct i2c_master_s *bl602_i2cbus_initialize(int port) * ****************************************************************************/ -int bl602_i2cbus_uninitialize(FAR struct i2c_master_s *dev) +int bl602_i2cbus_uninitialize(struct i2c_master_s *dev) { irqstate_t flags; - FAR struct bl602_i2c_priv_s *priv = (FAR struct bl602_i2c_priv_s *)dev; + struct bl602_i2c_priv_s *priv = (struct bl602_i2c_priv_s *)dev; DEBUGASSERT(dev); diff --git a/arch/risc-v/src/bl602/bl602_i2c.h b/arch/risc-v/src/bl602/bl602_i2c.h index 07a9297c4fa..c93fba54528 100644 --- a/arch/risc-v/src/bl602/bl602_i2c.h +++ b/arch/risc-v/src/bl602/bl602_i2c.h @@ -81,7 +81,7 @@ struct i2c_master_s *bl602_i2cbus_initialize(int port); * ****************************************************************************/ -int bl602_i2cbus_uninitialize(FAR struct i2c_master_s *dev); +int bl602_i2cbus_uninitialize(struct i2c_master_s *dev); #undef EXTERN #if defined(__cplusplus) diff --git a/arch/risc-v/src/bl602/bl602_irq.c b/arch/risc-v/src/bl602/bl602_irq.c index f59391c3016..aa88775da86 100644 --- a/arch/risc-v/src/bl602/bl602_irq.c +++ b/arch/risc-v/src/bl602/bl602_irq.c @@ -83,7 +83,7 @@ void up_irqinitialize(void) /* Colorize the interrupt stack for debug purposes */ size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~15); - riscv_stack_color((FAR void *)&g_intstackalloc, intstack_size); + riscv_stack_color((void *)&g_intstackalloc, intstack_size); #endif /* currents_regs is non-NULL only while processing an interrupt */ diff --git a/arch/risc-v/src/bl602/bl602_netdev.c b/arch/risc-v/src/bl602/bl602_netdev.c index 014aae6ffe8..2f45c152f5f 100644 --- a/arch/risc-v/src/bl602/bl602_netdev.c +++ b/arch/risc-v/src/bl602/bl602_netdev.c @@ -60,7 +60,7 @@ #include "wifi_manager/wifi_mgmr_api.h" #include "wifi_manager/bl_wifi.h" #include "wifi_manager/include/wifi_mgmr_ext.h" -#include "wifi_driver/os_hal.h" +#include "bl602_os_hal.h" #include "bl602_netdev.h" #include "bl602_efuse.h" @@ -107,13 +107,13 @@ #define BL602_NET_WDDELAY (1 * CLOCKS_PER_SEC) +#define WIFI_MTU_SIZE 1516 + #define BL602_NET_TXBUFF_NUM 12 -#define BL602_NET_TXBUFF_SIZE (1650) +#define BL602_NET_TXBUFF_SIZE (WIFI_MTU_SIZE + PRESERVE_80211_HEADER_LEN) #define BL602_TXDESC_THRESHOLD 3 -#define WIFI_MTU_SIZE 1514 - #if BL602_NET_TXBUFF_SIZE & 0x3 != 0 #error "BL602_NET_TXBUFF_SIZE must be aligned to 4 bytes" #endif @@ -167,7 +167,7 @@ struct bl602_net_driver_s struct scan_parse_param_s { - FAR struct bl602_net_driver_s *priv; + struct bl602_net_driver_s *priv; int flags; struct iw_scan_req scan_req; @@ -207,7 +207,7 @@ struct bl602_net_driver_s g_bl602_net[BL602_NET_NINTERFACES]; static struct tx_buf_ind_s g_tx_buf_indicator = BITSET_T_INITIALIZER((1 << BL602_NET_TXBUFF_NUM) - 1); -static uint8_t __attribute__((section(".wifi_ram.txbuff"))) +static uint8_t locate_data(".wifi_ram.txbuff") g_tx_buff[BL602_NET_TXBUFF_NUM][BL602_NET_TXBUFF_SIZE]; static sem_t g_wifi_scan_sem; /* wifi scan complete semaphore */ @@ -231,7 +231,8 @@ static struct uint32_t scan_result_status : 2; /* WiFi scan result status */ uint32_t scan_result_len : 6; uint32_t retry_cnt : 4; /* MAX 16 retries */ - uint32_t connected: 1; + uint32_t sta_connected: 1; + uint32_t ap_stared: 1; } g_state; /**************************************************************************** @@ -247,46 +248,47 @@ extern void wifi_mgmr_tsk_init(void); extern int bl602_ef_ctrl_read_mac_address(uint8_t mac[6]); extern void wifi_main(int argc, char *argv[]); extern void wifi_mgmr_start_background(wifi_conf_t *conf); +extern int bl_pm_init(void); extern struct net_device bl606a0_sta; /* Common TX logic */ -static int bl602_net_transmit(FAR struct bl602_net_driver_s *priv); -static int bl602_net_txpoll(FAR struct net_driver_s *dev); +static int bl602_net_transmit(struct bl602_net_driver_s *priv); +static int bl602_net_txpoll(struct net_driver_s *dev); /* Interrupt handling */ static void bl602_net_reply(struct bl602_net_driver_s *priv); -static void bl602_net_receive(FAR struct bl602_net_driver_s *priv); +static void bl602_net_receive(struct bl602_net_driver_s *priv); /* Watchdog timer expirations */ -static void bl602_net_poll_work(FAR void *arg); +static void bl602_net_poll_work(void *arg); static void bl602_net_poll_expiry(wdparm_t arg); /* NuttX callback functions */ -static int bl602_net_ifup(FAR struct net_driver_s *dev); -static int bl602_net_ifdown(FAR struct net_driver_s *dev); +static int bl602_net_ifup(struct net_driver_s *dev); +static int bl602_net_ifdown(struct net_driver_s *dev); -static void bl602_net_txavail_work(FAR void *arg); -static int bl602_net_txavail(FAR struct net_driver_s *dev); +static void bl602_net_txavail_work(void *arg); +static int bl602_net_txavail(struct net_driver_s *dev); #if defined(CONFIG_NET_MCASTGROUP) || defined(CONFIG_NET_ICMPv6) -static int bl602_net_addmac(FAR struct net_driver_s *dev, - FAR const uint8_t *mac); +static int bl602_net_addmac(struct net_driver_s *dev, + const uint8_t *mac); # ifdef CONFIG_NET_MCASTGROUP -static int bl602_net_rmmac(FAR struct net_driver_s *dev, - FAR const uint8_t *mac); +static int bl602_net_rmmac(struct net_driver_s *dev, + const uint8_t *mac); # endif # ifdef CONFIG_NET_ICMPv6 -static void bl602_net_ipv6multicast(FAR struct bl602_net_driver_s *priv); +static void bl602_net_ipv6multicast(struct bl602_net_driver_s *priv); # endif #endif #ifdef CONFIG_NETDEV_IOCTL static int -bl602_net_ioctl(FAR struct net_driver_s *dev, int cmd, unsigned long arg); +bl602_net_ioctl(struct net_driver_s *dev, int cmd, unsigned long arg); #endif /**************************************************************************** @@ -311,7 +313,7 @@ bl602_net_ioctl(FAR struct net_driver_s *dev, int cmd, unsigned long arg); * ****************************************************************************/ -static int bl602_net_transmit(FAR struct bl602_net_driver_s *priv) +static int bl602_net_transmit(struct bl602_net_driver_s *priv) { int ret = OK; ninfo("tx pkt len:%d\n", priv->net_dev.d_len); @@ -378,10 +380,10 @@ static int bl602_net_transmit(FAR struct bl602_net_driver_s *priv) * ****************************************************************************/ -static int bl602_net_txpoll(FAR struct net_driver_s *dev) +static int bl602_net_txpoll(struct net_driver_s *dev) { - FAR struct bl602_net_driver_s *priv = - (FAR struct bl602_net_driver_s *)dev->d_private; + struct bl602_net_driver_s *priv = + (struct bl602_net_driver_s *)dev->d_private; if (priv->net_dev.d_len > 0) { @@ -555,7 +557,7 @@ static void bl602_net_reply(struct bl602_net_driver_s *priv) * ****************************************************************************/ -static void bl602_net_receive(FAR struct bl602_net_driver_s *priv) +static void bl602_net_receive(struct bl602_net_driver_s *priv) { #ifdef CONFIG_NET_PKT /* When packet sockets are enabled, feed the frame into the tap */ @@ -740,8 +742,8 @@ int bl602_net_notify(uint32_t event, uint8_t *data, int len, void *opaque) { DEBUGASSERT(opaque != NULL); - FAR struct bl602_net_driver_s *priv = - (FAR struct bl602_net_driver_s *)opaque; + struct bl602_net_driver_s *priv = + (struct bl602_net_driver_s *)opaque; DEBUGASSERT(priv == &g_bl602_net[0] || priv == &g_bl602_net[1]); @@ -849,9 +851,9 @@ int bl602_net_notify(uint32_t event, uint8_t *data, int len, void *opaque) * ****************************************************************************/ -static void bl602_net_poll_work(FAR void *arg) +static void bl602_net_poll_work(void *arg) { - FAR struct bl602_net_driver_s *priv = (FAR struct bl602_net_driver_s *)arg; + struct bl602_net_driver_s *priv = (struct bl602_net_driver_s *)arg; net_lock(); DEBUGASSERT(priv->net_dev.d_buf == NULL); @@ -911,7 +913,7 @@ static void bl602_net_poll_work(FAR void *arg) static void bl602_net_poll_expiry(wdparm_t arg) { - FAR struct bl602_net_driver_s *priv = (FAR struct bl602_net_driver_s *)arg; + struct bl602_net_driver_s *priv = (struct bl602_net_driver_s *)arg; /* Schedule to perform the interrupt processing on the worker thread. */ @@ -939,10 +941,10 @@ static void bl602_net_poll_expiry(wdparm_t arg) * ****************************************************************************/ -static int bl602_net_ifup(FAR struct net_driver_s *dev) +static int bl602_net_ifup(struct net_driver_s *dev) { - FAR struct bl602_net_driver_s *priv = - (FAR struct bl602_net_driver_s *)dev->d_private; + struct bl602_net_driver_s *priv = + (struct bl602_net_driver_s *)dev->d_private; #ifdef CONFIG_NET_IPv4 ninfo("Bringing up: %ld.%ld.%ld.%ld\n", @@ -1013,10 +1015,10 @@ static int bl602_net_soft_reset(void) * ****************************************************************************/ -static int bl602_net_ifdown(FAR struct net_driver_s *dev) +static int bl602_net_ifdown(struct net_driver_s *dev) { - FAR struct bl602_net_driver_s *priv = - (FAR struct bl602_net_driver_s *)dev->d_private; + struct bl602_net_driver_s *priv = + (struct bl602_net_driver_s *)dev->d_private; irqstate_t flags; net_lock(); @@ -1053,9 +1055,9 @@ static int bl602_net_ifdown(FAR struct net_driver_s *dev) * ****************************************************************************/ -static void bl602_net_txavail_work(FAR void *arg) +static void bl602_net_txavail_work(void *arg) { - FAR struct bl602_net_driver_s *priv = (FAR struct bl602_net_driver_s *)arg; + struct bl602_net_driver_s *priv = (struct bl602_net_driver_s *)arg; net_lock(); DEBUGASSERT(priv->net_dev.d_buf == NULL); @@ -1126,10 +1128,10 @@ static void bl602_net_txavail_work(FAR void *arg) * ****************************************************************************/ -static int bl602_net_txavail(FAR struct net_driver_s *dev) +static int bl602_net_txavail(struct net_driver_s *dev) { - FAR struct bl602_net_driver_s *priv = - (FAR struct bl602_net_driver_s *)dev->d_private; + struct bl602_net_driver_s *priv = + (struct bl602_net_driver_s *)dev->d_private; if (work_available(&priv->availwork)) { @@ -1158,11 +1160,11 @@ static int bl602_net_txavail(FAR struct net_driver_s *dev) ****************************************************************************/ #if defined(CONFIG_NET_MCASTGROUP) || defined(CONFIG_NET_ICMPv6) -static int bl602_net_addmac(FAR struct net_driver_s *dev, - FAR const uint8_t *mac) +static int bl602_net_addmac(struct net_driver_s *dev, + const uint8_t *mac) { - FAR struct bl602_net_driver_s *priv = - (FAR struct bl602_net_driver_s *)dev->d_private; + struct bl602_net_driver_s *priv = + (struct bl602_net_driver_s *)dev->d_private; /* Add the MAC address to the hardware multicast routing table */ @@ -1186,11 +1188,11 @@ static int bl602_net_addmac(FAR struct net_driver_s *dev, ****************************************************************************/ #ifdef CONFIG_NET_MCASTGROUP -static int bl602_net_rmmac(FAR struct net_driver_s *dev, - FAR const uint8_t *mac) +static int bl602_net_rmmac(struct net_driver_s *dev, + const uint8_t *mac) { - FAR struct bl602_net_driver_s *priv = - (FAR struct bl602_net_driver_s *)dev->d_private; + struct bl602_net_driver_s *priv = + (struct bl602_net_driver_s *)dev->d_private; /* Add the MAC address to the hardware multicast routing table */ @@ -1213,9 +1215,9 @@ static int bl602_net_rmmac(FAR struct net_driver_s *dev, ****************************************************************************/ #ifdef CONFIG_NET_ICMPv6 -static void bl602_net_ipv6multicast(FAR struct bl602_net_driver_s *priv) +static void bl602_net_ipv6multicast(struct bl602_net_driver_s *priv) { - FAR struct net_driver_s *dev; + struct net_driver_s *dev; uint16_t tmp16; uint8_t mac[6]; @@ -1454,7 +1456,7 @@ static int format_scan_result_to_wapi(struct iwreq *req, int result_cnt) } static wifi_mgmr_t * -bl602_netdev_get_wifi_mgmr(FAR struct bl602_net_driver_s *priv) +bl602_netdev_get_wifi_mgmr(struct bl602_net_driver_s *priv) { if (priv->current_mode == IW_MODE_INFRA) { @@ -1471,7 +1473,7 @@ bl602_netdev_get_wifi_mgmr(FAR struct bl602_net_driver_s *priv) } #ifdef CONFIG_NETDEV_IOCTL -static int bl602_ioctl_wifi_start(FAR struct bl602_net_driver_s *priv, +static int bl602_ioctl_wifi_start(struct bl602_net_driver_s *priv, uintptr_t arg) { UNUSED(arg); @@ -1488,6 +1490,14 @@ static int bl602_ioctl_wifi_start(FAR struct bl602_net_driver_s *priv, { int state; + if (g_state.sta_connected == 1) + { + return OK; + } + + priv->prev_connectd = 0; + g_state.retry_cnt = 0; + wifi_mgmr_sta_autoconnect_enable(); if (wifi_mgmr_sta_connect(NULL, mgmr->wifi_mgmr_stat_info.ssid, mgmr->wifi_mgmr_stat_info.passphr, @@ -1512,8 +1522,14 @@ static int bl602_ioctl_wifi_start(FAR struct bl602_net_driver_s *priv, else if (priv->current_mode == IW_MODE_MASTER) { int channel; + + if (g_state.ap_stared == 1) + { + return OK; + } + wifi_mgmr_channel_get(&channel); - syslog(LOG_INFO, "current channel:%d\n", channel); + wlinfo("AP channel:%d\n", channel); if (wifi_mgmr_api_ap_start(mgmr->wifi_mgmr_stat_info.ssid, mgmr->wifi_mgmr_stat_info.passphr, @@ -1531,7 +1547,7 @@ static int bl602_ioctl_wifi_start(FAR struct bl602_net_driver_s *priv, return OK; } -static int bl602_ioctl_wifi_stop(FAR struct bl602_net_driver_s *priv, +static int bl602_ioctl_wifi_stop(struct bl602_net_driver_s *priv, uintptr_t arg) { UNUSED(arg); @@ -1540,12 +1556,22 @@ static int bl602_ioctl_wifi_stop(FAR struct bl602_net_driver_s *priv, if (priv->current_mode == IW_MODE_INFRA) { + if (g_state.sta_connected == 0) + { + return OK; + } + wifi_mgmr_sta_disconnect(); nxsig_sleep(1); wifi_mgmr_api_idle(); } else if (priv->current_mode == IW_MODE_MASTER) { + if (g_state.ap_stared == 0) + { + return OK; + } + wifi_mgmr_api_ap_stop(); nxsig_sleep(1); wifi_mgmr_api_idle(); @@ -1574,10 +1600,10 @@ static int bl602_ioctl_wifi_stop(FAR struct bl602_net_driver_s *priv, ****************************************************************************/ static int -bl602_net_ioctl(FAR struct net_driver_s *dev, int cmd, unsigned long arg) +bl602_net_ioctl(struct net_driver_s *dev, int cmd, unsigned long arg) { - FAR struct bl602_net_driver_s *priv = - (FAR struct bl602_net_driver_s *)dev->d_private; + struct bl602_net_driver_s *priv = + (struct bl602_net_driver_s *)dev->d_private; int ret = -ENOSYS; /* Decode and dispatch the driver-specific IOCTL command */ @@ -1871,13 +1897,6 @@ bl602_net_ioctl(FAR struct net_driver_s *dev, int cmd, unsigned long arg) } else if (req->u.essid.flags == 1) { - if (g_state.connected == 1) - { - return OK; - } - - priv->prev_connectd = 0; - g_state.retry_cnt = 0; return bl602_ioctl_wifi_start(priv, arg); } else @@ -1989,8 +2008,9 @@ bl602_net_ioctl(FAR struct net_driver_s *dev, int cmd, unsigned long arg) } #endif -static int wifi_manager_process(int argc, FAR char *argv[]) +static int wifi_manager_process(int argc, char *argv[]) { + bl_pm_init(); wifi_main_init(); ipc_emb_notify(); @@ -2094,7 +2114,7 @@ void bl602_net_event(int evt, int val) { struct bl602_net_driver_s *priv = &g_bl602_net[0]; priv->prev_connectd = 1; - g_state.connected = 1; + g_state.sta_connected = 1; netdev_carrier_on(&priv->net_dev); @@ -2107,11 +2127,13 @@ void bl602_net_event(int evt, int val) case CODE_WIFI_ON_DISCONNECT: do { - struct bl602_net_driver_s *priv = &g_bl602_net[0]; - if (g_state.connected == 1) + /* struct bl602_net_driver_s *priv = &g_bl602_net[0]; */ + + if (g_state.sta_connected == 1) { - netdev_carrier_off(&priv->net_dev); - g_state.connected = 0; + /* netdev_carrier_off(&priv->net_dev); */ + + g_state.sta_connected = 0; } } while (0); @@ -2152,6 +2174,7 @@ void bl602_net_event(int evt, int val) struct bl602_net_driver_s *priv = &g_bl602_net[1]; netdev_carrier_on(&priv->net_dev); #endif + g_state.ap_stared = 1; } while (0); break; @@ -2163,6 +2186,7 @@ void bl602_net_event(int evt, int val) struct bl602_net_driver_s *priv = &g_bl602_net[1]; netdev_carrier_off(&priv->net_dev); #endif + g_state.ap_stared = 0; } while (0); break; @@ -2194,7 +2218,7 @@ void bl602_net_event(int evt, int val) int bl602_net_initialize(void) { - FAR struct bl602_net_driver_s *priv; + struct bl602_net_driver_s *priv; int tmp; int idx; uint8_t mac[6]; diff --git a/arch/risc-v/src/bl602/bl602_oneshot_lowerhalf.c b/arch/risc-v/src/bl602/bl602_oneshot_lowerhalf.c index 34e500d036b..1af1d223ace 100644 --- a/arch/risc-v/src/bl602/bl602_oneshot_lowerhalf.c +++ b/arch/risc-v/src/bl602/bl602_oneshot_lowerhalf.c @@ -71,7 +71,7 @@ struct bl602_oneshot_lowerhalf_s /* Private lower half data follows */ oneshot_callback_t callback; /* Internal handler that receives callback */ - FAR void * arg; /* Argument that is passed to the handler */ + void * arg; /* Argument that is passed to the handler */ uint8_t tim; /* timer tim 0,1 */ uint8_t irq; /* IRQ associated with this timer */ bool started; /* True: Timer has been started */ @@ -81,14 +81,14 @@ struct bl602_oneshot_lowerhalf_s * Private Function Prototypes ****************************************************************************/ -static int bl602_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec * ts); -static int bl602_start(FAR struct oneshot_lowerhalf_s *lower, +static int bl602_max_delay(struct oneshot_lowerhalf_s *lower, + struct timespec * ts); +static int bl602_start(struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, - FAR void * arg, - FAR const struct timespec * ts); -static int bl602_cancel(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec * ts); + void * arg, + const struct timespec * ts); +static int bl602_cancel(struct oneshot_lowerhalf_s *lower, + struct timespec * ts); /**************************************************************************** * Private Data @@ -122,13 +122,13 @@ static const struct oneshot_operations_s g_oneshot_ops = * ****************************************************************************/ -static int bl602_oneshot_handler(int irq, FAR void *context, FAR void *arg) +static int bl602_oneshot_handler(int irq, void *context, void *arg) { - FAR struct bl602_oneshot_lowerhalf_s *priv = - (FAR struct bl602_oneshot_lowerhalf_s *)arg; + struct bl602_oneshot_lowerhalf_s *priv = + (struct bl602_oneshot_lowerhalf_s *)arg; oneshot_callback_t callback; - FAR void * cbarg; + void * cbarg; /* Clear Interrupt Bits */ @@ -198,11 +198,11 @@ static int bl602_oneshot_handler(int irq, FAR void *context, FAR void *arg) * ****************************************************************************/ -static int bl602_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec * ts) +static int bl602_max_delay(struct oneshot_lowerhalf_s *lower, + struct timespec * ts) { - FAR struct bl602_oneshot_lowerhalf_s *priv = - (FAR struct bl602_oneshot_lowerhalf_s *)lower; + struct bl602_oneshot_lowerhalf_s *priv = + (struct bl602_oneshot_lowerhalf_s *)lower; uint64_t usecs; DEBUGASSERT(priv != NULL && ts != NULL); @@ -237,13 +237,13 @@ static int bl602_max_delay(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -static int bl602_start(FAR struct oneshot_lowerhalf_s *lower, +static int bl602_start(struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, - FAR void * arg, - FAR const struct timespec * ts) + void * arg, + const struct timespec * ts) { - FAR struct bl602_oneshot_lowerhalf_s *priv = - (FAR struct bl602_oneshot_lowerhalf_s *)lower; + struct bl602_oneshot_lowerhalf_s *priv = + (struct bl602_oneshot_lowerhalf_s *)lower; irqstate_t flags; uint64_t usec; @@ -307,11 +307,11 @@ static int bl602_start(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -static int bl602_cancel(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec * ts) +static int bl602_cancel(struct oneshot_lowerhalf_s *lower, + struct timespec * ts) { - FAR struct bl602_oneshot_lowerhalf_s *priv = - (FAR struct bl602_oneshot_lowerhalf_s *)lower; + struct bl602_oneshot_lowerhalf_s *priv = + (struct bl602_oneshot_lowerhalf_s *)lower; irqstate_t flags; DEBUGASSERT(priv != NULL); @@ -359,15 +359,15 @@ static int bl602_cancel(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, +struct oneshot_lowerhalf_s *oneshot_initialize(int chan, uint16_t resolution) { - FAR struct bl602_oneshot_lowerhalf_s *priv; + struct bl602_oneshot_lowerhalf_s *priv; struct timer_cfg_s timstr; /* Allocate an instance of the lower half driver */ - priv = (FAR struct bl602_oneshot_lowerhalf_s *)kmm_zalloc( + priv = (struct bl602_oneshot_lowerhalf_s *)kmm_zalloc( sizeof(struct bl602_oneshot_lowerhalf_s)); if (priv == NULL) diff --git a/arch/risc-v/src/bl602/bl602_oneshot_lowerhalf.h b/arch/risc-v/src/bl602/bl602_oneshot_lowerhalf.h index 5b6e560e814..f6f4d2e8a8e 100644 --- a/arch/risc-v/src/bl602/bl602_oneshot_lowerhalf.h +++ b/arch/risc-v/src/bl602/bl602_oneshot_lowerhalf.h @@ -78,7 +78,7 @@ struct bl602_oneshot_s uint8_t cbndx; /* Timer callback handler index */ #endif volatile bool running; /* True: the timer is running */ - FAR struct bl602_tim_dev_s *tch; /* Pointer returned by + struct bl602_tim_dev_s *tch; /* Pointer returned by * bl602_tim_init() */ volatile oneshot_handler_t handler; /* Oneshot expiration callback */ volatile void * arg; /* The argument that will accompany diff --git a/arch/risc-v/src/bl602/bl602_os_hal.c b/arch/risc-v/src/bl602/bl602_os_hal.c new file mode 100644 index 00000000000..6288ef72f86 --- /dev/null +++ b/arch/risc-v/src/bl602/bl602_os_hal.c @@ -0,0 +1,1606 @@ +/**************************************************************************** + * arch/risc-v/src/bl602/bl602_os_hal.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifdef CONFIG_BL602_WIRELESS + +#include +#include + +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define OS_HPWORK HPWORK +#define OS_LPWORK LPWORK + +#ifdef CONFIG_BL602_WIRELESS + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct mq_adpt +{ + struct file mq; /* Message queue handle */ + uint32_t msgsize; /* Message size */ + char name[16]; /* Message queue name */ +}; + +struct irq_adpt +{ + void (*func)(void *arg); /* Interrupt callback function */ + void *arg; /* Interrupt private data */ +}; + +enum bl_os_timer_mode +{ + BL_OS_TIEMR_ONCE = 0, + BL_OS_TIEMR_CYCLE +}; + +typedef enum bl_os_timer_mode bl_os_timer_mode_t; + +struct timer_adpt +{ + struct wdog_s wdog; + int32_t delay; + bl_os_timer_mode_t mode; + void (*func)(void *arg); + void *arg; +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +extern void *__attribute__((weak)) _wifi_log_flag; + +bl_ops_funcs_t g_bl_ops_funcs = +{ + ._version = BL_OS_ADAPTER_VERSION, + ._printf = bl_os_printf, + ._assert = bl_os_assert_func, + ._init = bl_os_api_init, + ._enter_critical = bl_os_enter_critical, + ._exit_critical = bl_os_exit_critical, + ._msleep = bl_os_msleep, + ._sleep = bl_os_sleep, + ._event_group_create = bl_os_event_create, + ._event_group_delete = bl_os_event_delete, + ._event_group_send = bl_os_event_send, + ._event_group_wait = bl_os_event_wait, + ._event_register = bl_os_event_register, + ._event_notify = bl_os_event_notify, + ._task_create = bl_os_task_create, + ._task_delete = bl_os_task_delete, + ._task_get_current_task = bl_os_task_get_current_task, + ._task_notify_create = bl_os_task_notify_create, + ._task_notify = bl_os_task_notify, + ._task_wait = bl_os_task_wait, + ._lock_gaint = bl_os_lock_gaint, + ._unlock_gaint = bl_os_unlock_gaint, + ._irq_attach = bl_os_irq_attach, + ._irq_enable = bl_os_irq_enable, + ._irq_disable = bl_os_irq_disable, + ._workqueue_create = bl_os_workqueue_create, + ._workqueue_submit_hp = bl_os_workqueue_submit_hpwork, + ._workqueue_submit_lp = bl_os_workqueue_submit_lpwork, + ._timer_create = bl_os_timer_create, + ._timer_delete = bl_os_timer_delete, + ._timer_start_once = bl_os_timer_start_once, + ._timer_start_periodic = bl_os_timer_start_periodic, + ._sem_create = bl_os_sem_create, + ._sem_delete = bl_os_sem_delete, + ._sem_take = bl_os_sem_take, + ._sem_give = bl_os_sem_give, + ._mutex_create = bl_os_mutex_create, + ._mutex_delete = bl_os_mutex_delete, + ._mutex_lock = bl_os_mutex_lock, + ._mutex_unlock = bl_os_mutex_unlock, + ._queue_create = bl_os_mq_creat, + ._queue_delete = bl_os_mq_delete, + ._queue_send_wait = bl_os_mq_send_wait, + ._queue_send = bl_os_mq_send, + ._queue_recv = bl_os_mq_recv, + ._malloc = bl_os_malloc, + ._free = bl_os_free, + ._zalloc = bl_os_zalloc, + ._get_time_ms = bl_os_clock_gettime_ms, + ._get_tick = bl_os_get_tick, + ._log_write = bl_os_log_write +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: bl_os_assert_func + * + * Description: + * Delete timer and free resource + * + * Input Parameters: + * file - assert file + * line - assert line + * func - assert function + * expr - assert condition + * + * Returned Value: + * None + * + ****************************************************************************/ + +void bl_os_assert_func(const char *file, int line, + const char *func, const char *expr) +{ + printf("Assert failed in %s, %s:%d (%s)", + func, file, line, expr); + abort(); +} + +/**************************************************************************** + * Name: bl_os_event_create + * + * Description: + * Create event group + * + * Input Parameters: + * + * Returned Value: + * Event group data pointer + * + ****************************************************************************/ + +void *bl_os_event_create(void) +{ + return (void *)0; +} + +/**************************************************************************** + * Name: bl_os_event_delete + * + * Description: + * Delete event and free resource + * + * Input Parameters: + * event - event data point + * + * Returned Value: + * None + * + ****************************************************************************/ + +void bl_os_event_delete(void *event) +{ +} + +/**************************************************************************** + * Name: bl_os_event_send + * + * Description: + * Set event bits + * + * Input Parameters: + * + * Returned Value: + * Event value after setting + * + ****************************************************************************/ + +uint32_t bl_os_event_send(void *event, uint32_t bits) +{ + return 0; +} + +/**************************************************************************** + * Name: bl_os_event_wait + * + * Description: + * Delete timer and free resource + * + * Input Parameters: + * event + * bits_to_wait_for + * clear_on_exit + * wait_for_all_bits + * block_time_tick + * + * Returned Value: + * Current event value + * + ****************************************************************************/ + +uint32_t bl_os_event_wait(void *event, + uint32_t bits_to_wait_for, + int clear_on_exit, + int wait_for_all_bits, + uint32_t block_time_tick) +{ + return 0; +} + +/**************************************************************************** + * Name: bl_os_event_register + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_event_register(int type, void *cb, void *arg) +{ + return 0; +} + +/**************************************************************************** + * Name: bl_os_event_notify + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_event_notify(int evt, int val) +{ + bl602_net_event(evt, val); + return 0; +} + +/**************************************************************************** + * Name: bl_os_task_create + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_task_create(const char *name, + void *entry, + uint32_t stack_depth, + void *param, + uint32_t prio, + void *task_handle) +{ + return nxtask_create(name, prio, stack_depth, entry, (char **)¶m); +} + +/**************************************************************************** + * Name: bl_os_task_delete + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void bl_os_task_delete(void *task_handle) +{ + pid_t task = (int)task_handle; + + task_delete((pid_t)task); +} + +/**************************************************************************** + * Name: bl_os_task_get_current_task + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void *bl_os_task_get_current_task(void) +{ + return (void *)0; +} + +/**************************************************************************** + * Name: bl_os_task_notify_create + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void *bl_os_task_notify_create(void) +{ + return bl_os_sem_create(0); +} + +/**************************************************************************** + * Name: bl_os_task_get_current_task + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void bl_os_task_notify(void *task_handle) +{ + bl_os_sem_give(task_handle); +} + +/**************************************************************************** + * Name: bl_os_task_get_current_task + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void bl_os_task_wait(void *task_handle, uint32_t tick) +{ + bl_os_sem_take(task_handle, tick); +} + +/**************************************************************************** + * Name: bl_os_api_init + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_api_init(void) +{ + return 0; +} + +/**************************************************************************** + * Name: bl_os_lock_gaint + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void bl_os_lock_gaint(void) +{ +} + +/**************************************************************************** + * Name: bl_os_unlock_gaint + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void bl_os_unlock_gaint(void) +{ +} + +/**************************************************************************** + * Name: bl_os_enter_critical + * + * Description: + * Enter critical state + * + * Input Parameters: + * None + * + * Returned Value: + * CPU PS value + * + ****************************************************************************/ + +uint32_t bl_os_enter_critical(void) +{ + irqstate_t flags; + + flags = enter_critical_section(); + + return flags; +} + +/**************************************************************************** + * Name: bl_os_exit_critical + * + * Description: + * Exit from critical state + * + * Input Parameters: + * level - CPU PS value + * + * Returned Value: + * None + * + ****************************************************************************/ + +void bl_os_exit_critical(uint32_t level) +{ + leave_critical_section(level); +} + +/**************************************************************************** + * Name: bl_os_msleep + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_msleep(long msec) +{ + useconds_t usec = msec * 1000; + + return nxsig_usleep(usec); +} + +/**************************************************************************** + * Name: bl_os_sleep + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_sleep(unsigned int seconds) +{ + return nxsig_sleep(seconds); +} + +/**************************************************************************** + * Name: bl_os_printf + * + * Description: + * Output format string and its arguments + * + * Input Parameters: + * format - format string + * + * Returned Value: + * 0 + * + ****************************************************************************/ + +void bl_os_printf(const char *__fmt, ...) +{ + if (&_wifi_log_flag) + { + va_list arg; + + va_start(arg, __fmt); + vsyslog(LOG_INFO, __fmt, arg); + va_end(arg); + } +} + +/**************************************************************************** + * Name: bl_os_malloc + * + * Description: + * Allocate a block of memory + * + * Input Parameters: + * size - memory size + * + * Returned Value: + * Memory pointer + * + ****************************************************************************/ + +void *bl_os_malloc(unsigned int size) +{ + return kmm_malloc(size); +} + +/**************************************************************************** + * Name: bl_os_free + * + * Description: + * Free a block of memory + * + * Input Parameters: + * ptr - memory block + * + * Returned Value: + * No + * + ****************************************************************************/ + +void bl_os_free(void *ptr) +{ + kmm_free(ptr); +} + +/**************************************************************************** + * Name: bl_os_zalloc + * + * Description: + * Allocate a block of memory + * + * Input Parameters: + * size - memory size + * + * Returned Value: + * Memory pointer + * + ****************************************************************************/ + +void *bl_os_zalloc(unsigned int size) +{ + return kmm_zalloc(size); +} + +/**************************************************************************** + * Name: bl_os_update_time + * + * Description: + * Transform ticks to time and add this time to timespec value + * + * Input Parameters: + * timespec - Input timespec data pointer + * ticks - System ticks + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void bl_os_update_time(struct timespec *timespec, uint32_t ticks) +{ + uint32_t tmp; + + tmp = TICK2SEC(ticks); + timespec->tv_sec += tmp; + + ticks -= SEC2TICK(tmp); + tmp = TICK2NSEC(ticks); + + timespec->tv_nsec += tmp; +} + +/**************************************************************************** + * Name: bl_os_errno_trans + * + * Description: + * Transform from nuttx Os error code to Wi-Fi adapter error code + * + * Input Parameters: + * ret - NuttX error code + * + * Returned Value: + * Wi-Fi adapter error code + * + ****************************************************************************/ + +static inline int32_t bl_os_errno_trans(int ret) +{ + if (!ret) + { + return true; + } + else + { + return false; + } +} + +/**************************************************************************** + * Name: bl_os_mq_creat + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void *bl_os_mq_creat(uint32_t queue_len, uint32_t item_size) +{ + struct mq_attr attr; + struct mq_adpt *mq_adpt; + int ret; + + mq_adpt = (struct mq_adpt *)kmm_malloc(sizeof(struct mq_adpt)); + + if (!mq_adpt) + { + wlerr("ERROR: Failed to kmm_malloc\n"); + return NULL; + } + + snprintf(mq_adpt->name, sizeof(mq_adpt->name), + "/tmp/%p", mq_adpt); + + attr.mq_maxmsg = queue_len; + attr.mq_msgsize = item_size; + attr.mq_curmsgs = 0; + attr.mq_flags = 0; + + ret = file_mq_open(&mq_adpt->mq, mq_adpt->name, + O_RDWR | O_CREAT, 0644, &attr); + + if (ret < 0) + { + wlerr("ERROR: Failed to create mqueue\n"); + kmm_free(mq_adpt); + return NULL; + } + + mq_adpt->msgsize = item_size; + + return (void *)mq_adpt; +} + +/**************************************************************************** + * Name: bl_os_mq_delete + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void bl_os_mq_delete(void *mq) +{ + struct mq_adpt *mq_adpt = (struct mq_adpt *)mq; + + file_mq_close(&mq_adpt->mq); + file_mq_unlink(mq_adpt->name); + kmm_free(mq_adpt); +} + +/**************************************************************************** + * Name: bl_os_mq_send_generic + * + * Description: + * Generic send message to queue within a certain period of time + * + * Input Parameters: + * queue - Message queue data pointer + * item - Message data pointer + * ticks - Wait ticks + * prio - Message priority + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +int bl_os_mq_send_wait(void *queue, void *item, uint32_t len, + uint32_t ticks, int prio) +{ + int ret; + struct timespec timeout; + struct mq_adpt *mq_adpt = (struct mq_adpt *)queue; + + if (ticks == BL_OS_WAITING_FOREVER || ticks == 0) + { + /* Wi-Fi interrupt function will call this adapter function to send + * message to message queue, so here we should call kernel API + * instead of application API + */ + + ret = file_mq_send(&mq_adpt->mq, (const char *)item, + len, prio); + if (ret < 0) + { + wlerr("ERROR: Failed to send message to mqueue error=%d\n", + ret); + } + } + else + { + ret = clock_gettime(CLOCK_REALTIME, &timeout); + if (ret < 0) + { + wlerr("ERROR: Failed to get time\n"); + return false; + } + + if (ticks) + { + bl_os_update_time(&timeout, ticks); + } + + ret = file_mq_timedsend(&mq_adpt->mq, (const char *)item, + len, prio, &timeout); + if (ret < 0) + { + wlerr("ERROR: Failed to timedsend message to mqueue error=%d\n", + ret); + } + } + + return bl_os_errno_trans(ret); +} + +/**************************************************************************** + * Name: bl_os_mq_send + * + * Description: + * Send message of low priority to queue within a certain period of time + * + * Input Parameters: + * queue - Message queue data pointer + * item - Message data pointer + * ticks - Wait ticks + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +int bl_os_mq_send(void *queue, void *item, uint32_t len) +{ + return bl_os_mq_send_wait(queue, item, len, BL_OS_WAITING_FOREVER, 0); +} + +/**************************************************************************** + * Name: bl_os_mq_recv + * + * Description: + * Receive message from queue within a certain period of time + * + * Input Parameters: + * queue - Message queue data pointer + * item - Message data pointer + * ticks - Wait ticks + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +int bl_os_mq_recv(void *queue, void *item, uint32_t len, uint32_t tick) +{ + ssize_t ret; + struct timespec timeout; + unsigned int prio; + struct mq_adpt *mq_adpt = (struct mq_adpt *)queue; + + if (tick == BL_OS_WAITING_FOREVER) + { + ret = file_mq_receive(&mq_adpt->mq, + (char *)item, + mq_adpt->msgsize, + &prio); + if (ret < 0) + { + wlerr("ERROR: Failed to receive from mqueue error=%d\n", ret); + } + } + else + { + ret = clock_gettime(CLOCK_REALTIME, &timeout); + + if (ret < 0) + { + wlerr("ERROR: Failed to get time\n"); + return false; + } + + if (tick) + { + bl_os_update_time(&timeout, tick); + } + + ret = file_mq_timedreceive(&mq_adpt->mq, + (char *)item, + mq_adpt->msgsize, + &prio, + &timeout); + if (ret < 0) + { + wlerr("ERROR: Failed to timedreceive from mqueue error=%d\n", ret); + } + } + + return ret < 0 ? false : true; +} + +/**************************************************************************** + * Name: bl_os_timer_callback + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +static void bl_os_timer_callback(wdparm_t arg) +{ + struct timer_adpt *timer; + bl_os_timer_mode_t mode; + + timer = (struct timer_adpt *)arg; + mode = timer->mode; + + if (timer->func) + { + timer->func(timer->arg); + } + + if (mode == BL_OS_TIEMR_CYCLE) + { + wd_start(&timer->wdog, timer->delay, bl_os_timer_callback, arg); + } +} + +/**************************************************************************** + * Name: bl_os_timer_create + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void *bl_os_timer_create(void *func, void *argv) +{ + struct timer_adpt *timer; + + timer = (struct timer_adpt *)kmm_malloc(sizeof(struct timer_adpt)); + + if (!timer) + { + assert(0); + } + + memset((void *)timer, 0, sizeof(struct timer_adpt)); + + timer->func = func; + timer->arg = argv; + + return timer; +} + +/**************************************************************************** + * Name: bl_os_timer_delete + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_timer_delete(void *timerid, uint32_t tick) +{ + struct timer_adpt *timer; + int ret; + + timer = (struct timer_adpt *)timerid; + + if (!timer) + { + return -EFAULT; + } + + ret = wd_cancel(&timer->wdog); + + kmm_free(timerid); + + return ret; +} + +/**************************************************************************** + * Name: os_timer_start_once + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_timer_start_once(void *timerid, long t_sec, long t_nsec) +{ + struct timer_adpt *timer; + struct timespec reltime; + int32_t tick; + + timer = (struct timer_adpt *)timerid; + + if (!timer) + { + return -EFAULT; + } + + reltime.tv_nsec = t_nsec; + reltime.tv_sec = t_sec; + + clock_time2ticks(&reltime, &tick); + + timer->mode = BL_OS_TIEMR_ONCE; + timer->delay = tick; + + return wd_start(&timer->wdog, + timer->delay, + bl_os_timer_callback, + (wdparm_t)timer); +} + +/**************************************************************************** + * Name: os_timer_start_periodic + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_timer_start_periodic(void *timerid, long t_sec, long t_nsec) +{ + struct timer_adpt *timer; + struct timespec reltime; + int32_t tick; + + timer = (struct timer_adpt *)timerid; + + if (!timer) + { + return -EFAULT; + } + + reltime.tv_nsec = t_nsec; + reltime.tv_sec = t_sec; + + clock_time2ticks(&reltime, &tick); + + timer->mode = BL_OS_TIEMR_CYCLE; + timer->delay = tick; + + return wd_start(&timer->wdog, + timer->delay, + bl_os_timer_callback, + (wdparm_t)timer); +} + +/**************************************************************************** + * Name: bl_os_workqueue_create + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void *bl_os_workqueue_create(void) +{ + struct work_s *work = NULL; + work = (struct work_s *)kmm_calloc(1, sizeof(struct work_s)); + + if (!work) + { + assert(0); + } + + return (void *)work; +} + +/**************************************************************************** + * Name: bl_os_workqueue_submit_hpwork + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_workqueue_submit_hpwork(void *work, + void *worker, + void *argv, + long tick) +{ + if (!work) + { + return -EINVAL; + } + + if (!work_available((struct work_s *)work)) + { + return -EINVAL; + } + + return work_queue(OS_HPWORK, work, (worker_t)worker, argv, tick); +} + +/**************************************************************************** + * Name: bl_os_workqueue_submit_lpwork + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +int bl_os_workqueue_submit_lpwork(void *work, + void *worker, + void *argv, + long tick) +{ + if (!work) + { + return -EINVAL; + } + + if (!work_available((struct work_s *)work)) + { + return -EINVAL; + } + + return work_queue(OS_LPWORK, work, (worker_t)worker, argv, tick); +} + +/**************************************************************************** + * Name: bl_os_clock_gettime_ms + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +uint64_t bl_os_clock_gettime_ms(void) +{ + struct timespec ts; + clock_gettime(CLOCK_REALTIME, &ts); + return ts.tv_sec * 1000 + ts.tv_nsec / 1000000; +} + +/**************************************************************************** + * Name: bl_os_get_tick + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +uint32_t bl_os_get_tick() +{ + uint32_t tick; + + tick = bl_os_clock_gettime_ms(); + + return tick; +} + +/**************************************************************************** + * Name: bl_os_isr_adpt_cb + * + * Description: + * Wi-Fi interrupt adapter callback function + * + * Input Parameters: + * arg - interrupt adapter private data + * + * Returned Value: + * 0 on success + * + ****************************************************************************/ + +static int bl_os_isr_adpt_cb(int irq, void *context, void *arg) +{ + struct irq_adpt *adapter = (struct irq_adpt *)arg; + + adapter->func(adapter->arg); + + return 0; +} + +/**************************************************************************** + * Name: bl_os_irq_attach + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void bl_os_irq_attach(int32_t n, void *f, void *arg) +{ + int ret; + struct irq_adpt *adapter; + + wlinfo("INFO: n=%ld f=%p arg=%p\n", n, f, arg); + + adapter = (struct irq_adpt *)kmm_malloc(sizeof(struct irq_adpt)); + + if (!adapter) + { + DEBUGASSERT(0); + } + + adapter->func = f; + adapter->arg = arg; + + ret = irq_attach(n, bl_os_isr_adpt_cb, (void *)adapter); + + if (ret != OK) + { + DEBUGASSERT(0); + } +} + +/**************************************************************************** + * Name: bl_os_irq_enable + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void bl_os_irq_enable(int32_t n) +{ + up_enable_irq(n); +} + +/**************************************************************************** + * Name: bl_os_irq_disable + * + * Description: + * + * Input Parameters: + * + * Returned Value: + * + ****************************************************************************/ + +void bl_os_irq_disable(int32_t n) +{ + up_disable_irq(n); +} + +/**************************************************************************** + * Name: bl_os_mutex_create + * + * Description: + * Create mutex + * + * Input Parameters: + * None + * + * Returned Value: + * Mutex data pointer + * + ****************************************************************************/ + +void *bl_os_mutex_create(void) +{ + int ret; + sem_t *sem; + int tmp; + + tmp = sizeof(sem_t); + sem = (sem_t *)kmm_malloc(tmp); + if (!sem) + { + wlerr("ERROR: Failed to alloc %d memory\n", tmp); + return NULL; + } + + ret = nxsem_init(sem, 0, 1); + if (ret) + { + wlerr("ERROR: Failed to initialize sem error=%d\n", ret); + kmm_free(sem); + return NULL; + } + + return sem; +} + +/**************************************************************************** + * Name: bl_os_mutex_delete + * + * Description: + * Delete mutex + * + * Input Parameters: + * mutex_data - mutex data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +void bl_os_mutex_delete(void *mutex_data) +{ + sem_t *sem = (sem_t *)mutex_data; + + nxsem_destroy(sem); + kmm_free(sem); +} + +/**************************************************************************** + * Name: bl_os_mutex_lock + * + * Description: + * Lock mutex + * + * Input Parameters: + * mutex_data - mutex data pointer + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +int32_t bl_os_mutex_lock(void *mutex_data) +{ + int ret; + sem_t *sem = (sem_t *)mutex_data; + + ret = nxsem_wait(sem); + if (ret) + { + wlerr("ERROR: Failed to wait sem\n"); + } + + return bl_os_errno_trans(ret); +} + +/**************************************************************************** + * Name: bl_os_mutex_unlock + * + * Description: + * Lock mutex + * + * Input Parameters: + * mutex_data - mutex data pointer + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +int32_t bl_os_mutex_unlock(void *mutex_data) +{ + int ret; + sem_t *sem = (sem_t *)mutex_data; + + ret = nxsem_post(sem); + if (ret) + { + wlerr("ERROR: Failed to post sem error=%d\n", ret); + } + + return bl_os_errno_trans(ret); +} + +/**************************************************************************** + * Name: bl_os_sem_create + * + * Description: + * Create and initialize semaphore + * + * Input Parameters: + * max - No mean + * init - semaphore initialization value + * + * Returned Value: + * Semaphore data pointer + * + ****************************************************************************/ + +void *bl_os_sem_create(uint32_t init) +{ + int ret; + sem_t *sem; + int tmp; + + tmp = sizeof(sem_t); + sem = (sem_t *)kmm_malloc(tmp); + if (!sem) + { + wlerr("ERROR: Failed to alloc %d memory\n", tmp); + return NULL; + } + + ret = nxsem_init(sem, 0, init); + if (ret) + { + wlerr("ERROR: Failed to initialize sem error=%d\n", ret); + kmm_free(sem); + return NULL; + } + + return sem; +} + +/**************************************************************************** + * Name: bl_os_sem_delete + * + * Description: + * Delete semaphore + * + * Input Parameters: + * semphr - Semaphore data pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +void bl_os_sem_delete(void *semphr) +{ + sem_t *sem = (sem_t *)semphr; + + nxsem_destroy(sem); + kmm_free(sem); +} + +/**************************************************************************** + * Name: bl_os_sem_take + * + * Description: + * Wait semaphore within a certain period of time + * + * Input Parameters: + * semphr - Semaphore data pointer + * ticks - Wait system ticks + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +int32_t bl_os_sem_take(void *semphr, uint32_t ticks) +{ + int ret; + struct timespec timeout; + sem_t *sem = (sem_t *)semphr; + + if (ticks == BL_OS_WAITING_FOREVER) + { + ret = nxsem_wait(sem); + if (ret) + { + wlerr("ERROR: Failed to wait sem\n"); + } + } + else + { + ret = clock_gettime(CLOCK_REALTIME, &timeout); + if (ret < 0) + { + wlerr("ERROR: Failed to get time\n"); + return false; + } + + if (ticks) + { + bl_os_update_time(&timeout, ticks); + } + + ret = nxsem_timedwait(sem, &timeout); + if (ret) + { + wlerr("ERROR: Failed to wait sem in %lu ticks\n", ticks); + } + } + + return bl_os_errno_trans(ret); +} + +/**************************************************************************** + * Name: bl_os_sem_give + * + * Description: + * Post semaphore + * + * Input Parameters: + * semphr - Semaphore data pointer + * + * Returned Value: + * True if success or false if fail + * + ****************************************************************************/ + +int32_t bl_os_sem_give(void *semphr) +{ + int ret; + sem_t *sem = (sem_t *)semphr; + + ret = nxsem_post(sem); + if (ret) + { + wlerr("ERROR: Failed to post sem error=%d\n", ret); + } + + return bl_os_errno_trans(ret); +} + +/**************************************************************************** + * Name: bl_os_log_writev + * + * Description: + * Output log with by format string and its arguments + * + * Input Parameters: + * level - log level, no mean here + * tag - log TAG, no mean here + * file - file name + * line - assert line + * format - format string + * args - arguments list + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void bl_os_log_writev(uint32_t level, + const char *tag, + const char *file, + int line, + const char *format, + va_list args) +{ + switch (level) + { + case LOG_LEVEL_ERROR: + { + vsyslog(LOG_ERR, format, args); + break; + } + + case LOG_LEVEL_WARN: + { + vsyslog(LOG_WARNING, format, args); + break; + } + + case LOG_LEVEL_INFO: + { + vsyslog(LOG_INFO, format, args); + break; + } + } +} + +/**************************************************************************** + * Name: bl_os_log_write + * + * Description: + * Output log with by format string and its arguments + * + * Input Parameters: + * level - log level, no mean here + * file - file name + * line - assert line + * tag - log TAG, no mean here + * format - format string + * + * Returned Value: + * None + * + ****************************************************************************/ + +void bl_os_log_write(uint32_t level, + const char *tag, + const char *file, + int line, + const char *format, + ...) +{ + if (&_wifi_log_flag) + { + va_list list; + va_start(list, format); + bl_os_log_writev(level, tag, NULL, 0, format, list); + va_end(list); + } +} +#endif diff --git a/arch/risc-v/src/bl602/bl602_os_hal.h b/arch/risc-v/src/bl602/bl602_os_hal.h new file mode 100644 index 00000000000..876b0d2680d --- /dev/null +++ b/arch/risc-v/src/bl602/bl602_os_hal.h @@ -0,0 +1,186 @@ +/**************************************************************************** + * arch/risc-v/src/bl602/bl602_os_hal.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_SRC_BL602_OS_HAL_H +#define __ARCH_RISCV_SRC_BL602_OS_HAL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Definition + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +void bl_os_printf(const char *__fmt, ...); + +void bl_os_assert_func(const char *file, + int line, + const char *func, + const char *expr); + +void *bl_os_malloc(unsigned int size); + +void bl_os_free(void *ptr); + +void *bl_os_zalloc(unsigned int size); + +int bl_os_task_create(const char *name, + void *entry, + uint32_t stack_depth, + void *param, + uint32_t prio, + void *task_handle); + +void bl_os_task_delete(void *task_handle); + +void *bl_os_task_get_current_task(void); + +void *bl_os_task_notify_create(void); + +void bl_os_task_notify(void *task_handle); + +void bl_os_task_wait(void *task_handle, uint32_t tick); + +void *bl_os_mq_creat(uint32_t queue_len, uint32_t item_size); + +void bl_os_mq_delete(void *mq); + +int bl_os_mq_send_wait(void *queue, + void *item, + uint32_t len, + uint32_t ticks, + int prio); + +int bl_os_mq_send(void *queue, void *item, uint32_t len); + +int bl_os_mq_recv(void *queue, void *item, uint32_t len, uint32_t tick); + +void *bl_os_timer_create(void *func, void *argv); + +int bl_os_timer_delete(void *timerid, uint32_t tick); + +int bl_os_timer_start_once(void *timerid, long t_sec, long t_nsec); + +int bl_os_timer_start_periodic(void *timerid, long t_sec, long t_nsec); + +void *bl_os_workqueue_create(void); + +int bl_os_workqueue_submit_hpwork(void *work, + void *worker, + void *argv, + long tick); + +int bl_os_workqueue_submit_lpwork(void *work, + void *worker, + void *argv, + long tick); + +uint64_t bl_os_clock_gettime_ms(void); + +void bl_os_irq_attach(int32_t n, void *f, void *arg); + +void bl_os_irq_enable(int32_t n); + +void bl_os_irq_disable(int32_t n); + +void *bl_os_mutex_create(void); + +void bl_os_mutex_delete(void *mutex_data); + +int32_t bl_os_mutex_lock(void *mutex_data); + +int32_t bl_os_mutex_unlock(void *mutex_data); + +void *bl_os_sem_create(uint32_t init); + +int32_t bl_os_sem_take(void *semphr, uint32_t ticks); + +int32_t bl_os_sem_give(void *semphr); + +void bl_os_sem_delete(void *semphr); + +int bl_os_api_init(void); + +void *bl_os_event_create(void); + +void bl_os_event_delete(void *event); + +uint32_t bl_os_event_send(void *event, uint32_t bits); + +uint32_t bl_os_event_wait(void *event, + uint32_t bits_to_wait_for, + int clear_on_exit, + int wait_for_all_bits, + uint32_t block_time_tick); + +int bl_os_event_register(int type, void *cb, void *arg); + +int bl_os_event_notify(int evt, int val); + +void bl_os_lock_gaint(void); + +void bl_os_unlock_gaint(void); + +int bl_os_msleep(long msec); + +uint32_t bl_os_get_tick(void); + +int bl_os_sleep(unsigned int seconds); + +uint32_t bl_os_enter_critical(void); + +void bl_os_exit_critical(uint32_t level); + +void bl_os_log_write(uint32_t level, + const char *tag, + const char *file, + int line, + const char *format, + ...); + + #undef EXTERN + #if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_RISCV_SRC_BL602_OS_HAL_H*/ diff --git a/arch/risc-v/src/bl602/bl602_pwm_lowerhalf.c b/arch/risc-v/src/bl602/bl602_pwm_lowerhalf.c index ad68432b874..62aa2e24541 100644 --- a/arch/risc-v/src/bl602/bl602_pwm_lowerhalf.c +++ b/arch/risc-v/src/bl602/bl602_pwm_lowerhalf.c @@ -81,8 +81,8 @@ struct bl602_pwm_ch_cfgs struct bl602_pwm_s { - FAR const struct pwm_ops_s *ops; /* PWM operations */ - uint32_t chan_pin[5]; /* Channel pin */ + const struct pwm_ops_s *ops; /* PWM operations */ + uint32_t chan_pin[5]; /* Channel pin */ }; /**************************************************************************** @@ -91,12 +91,12 @@ struct bl602_pwm_s /* PWM driver methods */ -static int bl602_pwm_setup(FAR struct pwm_lowerhalf_s *dev); -static int bl602_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev); -static int bl602_pwm_start(FAR struct pwm_lowerhalf_s *dev, - FAR const struct pwm_info_s *info); -static int bl602_pwm_stop(FAR struct pwm_lowerhalf_s *dev); -static int bl602_pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, +static int bl602_pwm_setup(struct pwm_lowerhalf_s *dev); +static int bl602_pwm_shutdown(struct pwm_lowerhalf_s *dev); +static int bl602_pwm_start(struct pwm_lowerhalf_s *dev, + const struct pwm_info_s *info); +static int bl602_pwm_stop(struct pwm_lowerhalf_s *dev); +static int bl602_pwm_ioctl(struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg); /**************************************************************************** @@ -232,7 +232,7 @@ static int32_t pwm_init(uint8_t id, uint32_t freq) * ****************************************************************************/ -static int bl602_pwm_duty(FAR struct bl602_pwm_s *priv, uint8_t chan, +static int bl602_pwm_duty(struct bl602_pwm_s *priv, uint8_t chan, ub16_t duty) { uint16_t period; @@ -268,7 +268,7 @@ static int bl602_pwm_duty(FAR struct bl602_pwm_s *priv, uint8_t chan, * ****************************************************************************/ -static int bl602_pwm_freq(FAR struct bl602_pwm_s *priv, uint8_t chan, +static int bl602_pwm_freq(struct bl602_pwm_s *priv, uint8_t chan, uint32_t freq) { uint16_t period = BL_PWM_CLK / freq; @@ -298,11 +298,11 @@ static int bl602_pwm_freq(FAR struct bl602_pwm_s *priv, uint8_t chan, * ****************************************************************************/ -static int bl602_pwm_setup(FAR struct pwm_lowerhalf_s *dev) +static int bl602_pwm_setup(struct pwm_lowerhalf_s *dev) { int i; int ret = OK; - FAR struct bl602_pwm_s *priv = (FAR struct bl602_pwm_s *)dev; + struct bl602_pwm_s *priv = (struct bl602_pwm_s *)dev; UNUSED(i); @@ -330,11 +330,11 @@ static int bl602_pwm_setup(FAR struct pwm_lowerhalf_s *dev) * ****************************************************************************/ -static int bl602_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) +static int bl602_pwm_shutdown(struct pwm_lowerhalf_s *dev) { int i; int ret = OK; - FAR struct bl602_pwm_s *priv = (FAR struct bl602_pwm_s *)dev; + struct bl602_pwm_s *priv = (struct bl602_pwm_s *)dev; UNUSED(i); @@ -360,10 +360,10 @@ static int bl602_pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) * ****************************************************************************/ -static int bl602_pwm_start(FAR struct pwm_lowerhalf_s *dev, - FAR const struct pwm_info_s *info) +static int bl602_pwm_start(struct pwm_lowerhalf_s *dev, + const struct pwm_info_s *info) { - FAR struct bl602_pwm_s *priv = (FAR struct bl602_pwm_s *)dev; + struct bl602_pwm_s *priv = (struct bl602_pwm_s *)dev; int ret = OK; int i; @@ -393,10 +393,10 @@ static int bl602_pwm_start(FAR struct pwm_lowerhalf_s *dev, * ****************************************************************************/ -static int bl602_pwm_stop(FAR struct pwm_lowerhalf_s *dev) +static int bl602_pwm_stop(struct pwm_lowerhalf_s *dev) { int i; - FAR struct bl602_pwm_s *priv = (FAR struct bl602_pwm_s *)dev; + struct bl602_pwm_s *priv = (struct bl602_pwm_s *)dev; UNUSED(priv); UNUSED(i); @@ -421,10 +421,10 @@ static int bl602_pwm_stop(FAR struct pwm_lowerhalf_s *dev) * ****************************************************************************/ -static int bl602_pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, +static int bl602_pwm_ioctl(struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg) { - FAR struct bl602_pwm_s *priv = (FAR struct bl602_pwm_s *)dev; + struct bl602_pwm_s *priv = (struct bl602_pwm_s *)dev; DEBUGASSERT(dev); @@ -454,7 +454,7 @@ static int bl602_pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, * ****************************************************************************/ -FAR struct pwm_lowerhalf_s *bl602_pwminitialize(int pwm) +struct pwm_lowerhalf_s *bl602_pwminitialize(int pwm) { struct bl602_pwm_s *lower = NULL; diff --git a/arch/risc-v/src/bl602/bl602_pwm_lowerhalf.h b/arch/risc-v/src/bl602/bl602_pwm_lowerhalf.h index 2388a07ad8d..a25164d4bc7 100644 --- a/arch/risc-v/src/bl602/bl602_pwm_lowerhalf.h +++ b/arch/risc-v/src/bl602/bl602_pwm_lowerhalf.h @@ -50,6 +50,6 @@ * ****************************************************************************/ -FAR struct pwm_lowerhalf_s *bl602_pwminitialize(int pwm); +struct pwm_lowerhalf_s *bl602_pwminitialize(int pwm); #endif /* __ARCH_RISCV_SRC_BL602_BL602_PWM_LOWERHALF_H */ diff --git a/arch/risc-v/src/bl602/bl602_rtc.h b/arch/risc-v/src/bl602/bl602_rtc.h index c6cfe500a85..86a5ca03a8b 100644 --- a/arch/risc-v/src/bl602/bl602_rtc.h +++ b/arch/risc-v/src/bl602/bl602_rtc.h @@ -62,7 +62,7 @@ * ****************************************************************************/ -FAR void bl602_hbn_sel(uint8_t clk_type); +void bl602_hbn_sel(uint8_t clk_type); /**************************************************************************** * Name: bl602_hbn_clear_rtc_int @@ -79,7 +79,7 @@ FAR void bl602_hbn_sel(uint8_t clk_type); * ****************************************************************************/ -FAR void bl602_hbn_clear_rtc_int(void); +void bl602_hbn_clear_rtc_int(void); /**************************************************************************** * Name: bl602_hbn_set_rtc_timer @@ -98,7 +98,7 @@ FAR void bl602_hbn_clear_rtc_int(void); * ****************************************************************************/ -FAR void bl602_hbn_set_rtc_timer(uint8_t delay_type, uint32_t compval_low, +void bl602_hbn_set_rtc_timer(uint8_t delay_type, uint32_t compval_low, uint32_t compval_high, uint8_t comp_mode); /**************************************************************************** @@ -115,7 +115,7 @@ FAR void bl602_hbn_set_rtc_timer(uint8_t delay_type, uint32_t compval_low, * ****************************************************************************/ -FAR void bl602_hbn_clear_rtc_counter(void); +void bl602_hbn_clear_rtc_counter(void); /**************************************************************************** * Name: bl602_hbn_enable_rtc_counter @@ -131,7 +131,7 @@ FAR void bl602_hbn_clear_rtc_counter(void); * ****************************************************************************/ -FAR void bl602_hbn_enable_rtc_counter(void); +void bl602_hbn_enable_rtc_counter(void); /**************************************************************************** * Name: bl602_hbn_get_rtc_timer_val @@ -148,7 +148,7 @@ FAR void bl602_hbn_enable_rtc_counter(void); * ****************************************************************************/ -FAR void bl602_hbn_get_rtc_timer_val(uint32_t *val_low, uint32_t *val_high); +void bl602_hbn_get_rtc_timer_val(uint32_t *val_low, uint32_t *val_high); /**************************************************************************** * Name: bl602_rtc_lowerhalf_initialize @@ -165,6 +165,6 @@ FAR void bl602_hbn_get_rtc_timer_val(uint32_t *val_low, uint32_t *val_high); * ****************************************************************************/ -FAR struct rtc_lowerhalf_s *bl602_rtc_lowerhalf_initialize(void); +struct rtc_lowerhalf_s *bl602_rtc_lowerhalf_initialize(void); #endif /* __ARCH_RISCV_SRC_BL602_RTC_LOWERHALF_H */ diff --git a/arch/risc-v/src/bl602/bl602_rtc_lowerhalf.c b/arch/risc-v/src/bl602/bl602_rtc_lowerhalf.c index c5a06897794..eb8e4048193 100644 --- a/arch/risc-v/src/bl602/bl602_rtc_lowerhalf.c +++ b/arch/risc-v/src/bl602/bl602_rtc_lowerhalf.c @@ -53,7 +53,7 @@ struct bl602_cbinfo_s { rtc_alarm_callback_t cb; /* Callback when the alarm expires */ - FAR void *priv; /* Private argument to accompany callback */ + void *priv; /* Private argument to accompany callback */ }; #endif @@ -67,7 +67,7 @@ struct bl602_lowerhalf_s * operations vtable (which may lie in FLASH or ROM) */ - FAR const struct rtc_ops_s *ops; + const struct rtc_ops_s *ops; /* Data following is private to this driver and not visible outside of * this file. @@ -98,27 +98,27 @@ struct bl602_lowerhalf_s /* Prototypes for static methods in struct rtc_ops_s */ -static int bl602_rdtime(FAR struct rtc_lowerhalf_s *lower, - FAR struct rtc_time *rtctime); -static int bl602_settime(FAR struct rtc_lowerhalf_s *lower, - FAR const struct rtc_time *rtctime); -static bool bl602_havesettime(FAR struct rtc_lowerhalf_s *lower); +static int bl602_rdtime(struct rtc_lowerhalf_s *lower, + struct rtc_time *rtctime); +static int bl602_settime(struct rtc_lowerhalf_s *lower, + const struct rtc_time *rtctime); +static bool bl602_havesettime(struct rtc_lowerhalf_s *lower); #ifdef CONFIG_RTC_ALARM -static int bl602_setalarm(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setalarm_s *alarminfo); -static int bl602_setrelative(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setrelative_s *alarminfo); -static int bl602_cancelalarm(FAR struct rtc_lowerhalf_s *lower, +static int bl602_setalarm(struct rtc_lowerhalf_s *lower, + const struct lower_setalarm_s *alarminfo); +static int bl602_setrelative(struct rtc_lowerhalf_s *lower, + const struct lower_setrelative_s *alarminfo); +static int bl602_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid); -static int bl602_rdalarm(FAR struct rtc_lowerhalf_s *lower, - FAR struct lower_rdalarm_s *alarminfo); +static int bl602_rdalarm(struct rtc_lowerhalf_s *lower, + struct lower_rdalarm_s *alarminfo); #endif #ifdef CONFIG_RTC_PERIODIC -static int bl602_setperiodic(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setperiodic_s *alarminfo); -static int bl602_cancelperiodic(FAR struct rtc_lowerhalf_s *lower, int id); +static int bl602_setperiodic(struct rtc_lowerhalf_s *lower, + const struct lower_setperiodic_s *alarminfo); +static int bl602_cancelperiodic(struct rtc_lowerhalf_s *lower, int id); #endif /**************************************************************************** @@ -211,7 +211,7 @@ static int bl602_alarm_callback(void *arg) struct bl602_cbinfo_s *cbinfo = &priv->cbinfo; rtc_alarm_callback_t cb = (rtc_alarm_callback_t)cbinfo->cb; - FAR void *p_arg = (FAR void *)cbinfo->priv; + void *p_arg = (void *)cbinfo->priv; #ifdef CONFIG_RTC_PERIODIC if (priv->periodic_enable) @@ -264,14 +264,14 @@ static int bl602_alarm_callback(void *arg) * ****************************************************************************/ -static int bl602_rdtime(FAR struct rtc_lowerhalf_s *lower, - FAR struct rtc_time *rtctime) +static int bl602_rdtime(struct rtc_lowerhalf_s *lower, + struct rtc_time *rtctime) { struct bl602_lowerhalf_s *priv; uint64_t time_stamp_s; struct rtc_time tim; - priv = (FAR struct bl602_lowerhalf_s *)lower; + priv = (struct bl602_lowerhalf_s *)lower; time_stamp_s = bl602_rtc_get_timestamp_ms() / 1000; tim = priv->rtc_base; @@ -281,8 +281,8 @@ static int bl602_rdtime(FAR struct rtc_lowerhalf_s *lower, tim.tm_year -= 1900; } - time_stamp_s += mktime((FAR struct tm *)&tim); - gmtime_r((const time_t *)&time_stamp_s, (FAR struct tm *)&rtctime); + time_stamp_s += mktime((struct tm *)&tim); + gmtime_r((const time_t *)&time_stamp_s, (struct tm *)&rtctime); return OK; } @@ -303,10 +303,10 @@ static int bl602_rdtime(FAR struct rtc_lowerhalf_s *lower, * ****************************************************************************/ -static int bl602_settime(FAR struct rtc_lowerhalf_s *lower, - FAR const struct rtc_time *rtctime) +static int bl602_settime(struct rtc_lowerhalf_s *lower, + const struct rtc_time *rtctime) { - struct bl602_lowerhalf_s *priv = (FAR struct bl602_lowerhalf_s *)lower; + struct bl602_lowerhalf_s *priv = (struct bl602_lowerhalf_s *)lower; if (rtctime->tm_year < 1900) { @@ -332,9 +332,9 @@ static int bl602_settime(FAR struct rtc_lowerhalf_s *lower, * ****************************************************************************/ -static bool bl602_havesettime(FAR struct rtc_lowerhalf_s *lower) +static bool bl602_havesettime(struct rtc_lowerhalf_s *lower) { - struct bl602_lowerhalf_s *priv = (FAR struct bl602_lowerhalf_s *)lower; + struct bl602_lowerhalf_s *priv = (struct bl602_lowerhalf_s *)lower; return (priv->rtc_base.tm_year != 0); } @@ -357,15 +357,15 @@ static bool bl602_havesettime(FAR struct rtc_lowerhalf_s *lower) ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int bl602_setalarm(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setalarm_s *alarminfo) +static int bl602_setalarm(struct rtc_lowerhalf_s *lower, + const struct lower_setalarm_s *alarminfo) { - FAR struct bl602_lowerhalf_s *priv; - FAR struct bl602_cbinfo_s *cbinfo; + struct bl602_lowerhalf_s *priv; + struct bl602_cbinfo_s *cbinfo; int ret; DEBUGASSERT(lower != NULL && alarminfo != NULL && alarminfo->id == 0); - priv = (FAR struct bl602_lowerhalf_s *)lower; + priv = (struct bl602_lowerhalf_s *)lower; ret = nxsem_wait(&priv->devsem); if (ret < 0) @@ -380,7 +380,7 @@ static int bl602_setalarm(FAR struct rtc_lowerhalf_s *lower, /* Convert the RTC time to a timespec */ - time_stamp_s = mktime((FAR struct tm *)&alarminfo->time); + time_stamp_s = mktime((struct tm *)&alarminfo->time); priv->rtc_alarm = alarminfo->time; /* Remember the callback information */ @@ -422,16 +422,16 @@ static int bl602_setalarm(FAR struct rtc_lowerhalf_s *lower, ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int bl602_setrelative(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setrelative_s *alarminfo) +static int bl602_setrelative(struct rtc_lowerhalf_s *lower, + const struct lower_setrelative_s *alarminfo) { - FAR struct bl602_lowerhalf_s *priv; + struct bl602_lowerhalf_s *priv; struct lower_setalarm_s setalarm; struct rtc_time *time; time_t seconds; int ret = -EINVAL; - priv = (FAR struct bl602_lowerhalf_s *)lower; + priv = (struct bl602_lowerhalf_s *)lower; DEBUGASSERT(lower != NULL && alarminfo != NULL); @@ -453,7 +453,7 @@ static int bl602_setrelative(FAR struct rtc_lowerhalf_s *lower, /* And convert the time back to broken out format */ - gmtime_r(&seconds, (FAR struct tm *)&setalarm.time); + gmtime_r(&seconds, (struct tm *)&setalarm.time); /* The set the alarm using this absolute time */ @@ -486,14 +486,14 @@ static int bl602_setrelative(FAR struct rtc_lowerhalf_s *lower, ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int bl602_cancelalarm(FAR struct rtc_lowerhalf_s *lower, int alarmid) +static int bl602_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid) { - FAR struct bl602_lowerhalf_s *priv; - FAR struct bl602_cbinfo_s *cbinfo; + struct bl602_lowerhalf_s *priv; + struct bl602_cbinfo_s *cbinfo; DEBUGASSERT(lower != NULL); DEBUGASSERT(alarmid == 0); - priv = (FAR struct bl602_lowerhalf_s *)lower; + priv = (struct bl602_lowerhalf_s *)lower; /* Nullify callback information to reduce window for race conditions */ @@ -529,13 +529,13 @@ static int bl602_cancelalarm(FAR struct rtc_lowerhalf_s *lower, int alarmid) ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int bl602_rdalarm(FAR struct rtc_lowerhalf_s *lower, - FAR struct lower_rdalarm_s *alarminfo) +static int bl602_rdalarm(struct rtc_lowerhalf_s *lower, + struct lower_rdalarm_s *alarminfo) { - FAR struct bl602_lowerhalf_s *priv; + struct bl602_lowerhalf_s *priv; DEBUGASSERT(lower != NULL && alarminfo != NULL && alarminfo->time != NULL); - priv = (FAR struct bl602_lowerhalf_s *)lower; + priv = (struct bl602_lowerhalf_s *)lower; if (alarminfo->id == 0) { @@ -565,14 +565,14 @@ static int bl602_rdalarm(FAR struct rtc_lowerhalf_s *lower, ****************************************************************************/ #ifdef CONFIG_RTC_PERIODIC -static int bl602_setperiodic(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setperiodic_s *alarminfo) +static int bl602_setperiodic(struct rtc_lowerhalf_s *lower, + const struct lower_setperiodic_s *alarminfo) { - FAR struct bl602_lowerhalf_s *priv; + struct bl602_lowerhalf_s *priv; irqstate_t flags; DEBUGASSERT(lower != NULL && alarminfo != NULL); - priv = (FAR struct bl602_lowerhalf_s *)lower; + priv = (struct bl602_lowerhalf_s *)lower; flags = enter_critical_section(); priv->periodic = *alarminfo; @@ -601,13 +601,13 @@ static int bl602_setperiodic(FAR struct rtc_lowerhalf_s *lower, ****************************************************************************/ #ifdef CONFIG_RTC_PERIODIC -static int bl602_cancelperiodic(FAR struct rtc_lowerhalf_s *lower, int id) +static int bl602_cancelperiodic(struct rtc_lowerhalf_s *lower, int id) { - FAR struct bl602_lowerhalf_s *priv; + struct bl602_lowerhalf_s *priv; irqstate_t flags; DEBUGASSERT(lower != NULL); - priv = (FAR struct bl602_lowerhalf_s *)lower; + priv = (struct bl602_lowerhalf_s *)lower; DEBUGASSERT(id == 0); @@ -677,7 +677,7 @@ int up_rtc_initialize(void) * ****************************************************************************/ -FAR struct rtc_lowerhalf_s *bl602_rtc_lowerhalf_initialize(void) +struct rtc_lowerhalf_s *bl602_rtc_lowerhalf_initialize(void) { nxsem_init(&g_rtc_lowerhalf.devsem, 0, 1); @@ -689,5 +689,5 @@ FAR struct rtc_lowerhalf_s *bl602_rtc_lowerhalf_initialize(void) g_rtc_lowerhalf.rtc_base.tm_year = 70; g_rtc_lowerhalf.rtc_base.tm_mday = 1; - return (FAR struct rtc_lowerhalf_s *)&g_rtc_lowerhalf; + return (struct rtc_lowerhalf_s *)&g_rtc_lowerhalf; } diff --git a/arch/risc-v/src/bl602/bl602_serial.c b/arch/risc-v/src/bl602/bl602_serial.c index 16679889e82..5d5db2b090f 100644 --- a/arch/risc-v/src/bl602/bl602_serial.c +++ b/arch/risc-v/src/bl602/bl602_serial.c @@ -293,7 +293,7 @@ static struct uart_dev_s *const g_uart_devs[] = * ****************************************************************************/ -static int __uart_interrupt(int irq, FAR void *context, FAR void *arg) +static int __uart_interrupt(int irq, void *context, void *arg) { uart_dev_t *dev = (uart_dev_t *)arg; struct bl602_uart_s *priv = dev->priv; diff --git a/arch/risc-v/src/bl602/bl602_spi.c b/arch/risc-v/src/bl602/bl602_spi.c index f304bb9d2b5..f4ef650f006 100644 --- a/arch/risc-v/src/bl602/bl602_spi.c +++ b/arch/risc-v/src/bl602/bl602_spi.c @@ -143,41 +143,41 @@ struct bl602_spi_priv_s * Private Function Prototypes ****************************************************************************/ -static int bl602_spi_lock(FAR struct spi_dev_s *dev, bool lock); +static int bl602_spi_lock(struct spi_dev_s *dev, bool lock); -static void bl602_spi_select(FAR struct spi_dev_s *dev, uint32_t devid, +static void bl602_spi_select(struct spi_dev_s *dev, uint32_t devid, bool selected); -static uint32_t bl602_spi_setfrequency(FAR struct spi_dev_s *dev, +static uint32_t bl602_spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency); -static void bl602_spi_setmode(FAR struct spi_dev_s *dev, +static void bl602_spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode); -static void bl602_spi_setbits(FAR struct spi_dev_s *dev, int nbits); +static void bl602_spi_setbits(struct spi_dev_s *dev, int nbits); #ifdef CONFIG_SPI_HWFEATURES -static int bl602_spi_hwfeatures(FAR struct spi_dev_s *dev, +static int bl602_spi_hwfeatures(struct spi_dev_s *dev, spi_hwfeatures_t features); #endif -static uint8_t bl602_spi_status(FAR struct spi_dev_s *dev, +static uint8_t bl602_spi_status(struct spi_dev_s *dev, uint32_t devid); #ifdef CONFIG_SPI_CMDDATA -static int bl602_spi_cmddata(FAR struct spi_dev_s *dev, +static int bl602_spi_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd); #endif -static uint32_t bl602_spi_send(FAR struct spi_dev_s *dev, uint32_t wd); -static void bl602_spi_exchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, - FAR void *rxbuffer, size_t nwords); +static uint32_t bl602_spi_send(struct spi_dev_s *dev, uint32_t wd); +static void bl602_spi_exchange(struct spi_dev_s *dev, + const void *txbuffer, + void *rxbuffer, size_t nwords); #ifndef CONFIG_SPI_EXCHANGE -static void bl602_spi_sndblock(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, size_t nwords); -static void bl602_spi_recvblock(FAR struct spi_dev_s *dev, - FAR void *rxbuffer, size_t nwords); +static void bl602_spi_sndblock(struct spi_dev_s *dev, + const void *txbuffer, size_t nwords); +static void bl602_spi_recvblock(struct spi_dev_s *dev, + void *rxbuffer, size_t nwords); #endif #ifdef CONFIG_SPI_TRIGGER -static int bl602_spi_trigger(FAR struct spi_dev_s *dev); +static int bl602_spi_trigger(struct spi_dev_s *dev); #endif -static void bl602_spi_init(FAR struct spi_dev_s *dev); -static void bl602_spi_deinit(FAR struct spi_dev_s *dev); +static void bl602_spi_init(struct spi_dev_s *dev); +static void bl602_spi_deinit(struct spi_dev_s *dev); /**************************************************************************** * Private Data @@ -395,10 +395,10 @@ static void bl602_clockconfig(struct spi_clock_cfg_s *clockcfg) * ****************************************************************************/ -static int bl602_spi_lock(FAR struct spi_dev_s *dev, bool lock) +static int bl602_spi_lock(struct spi_dev_s *dev, bool lock) { int ret; - FAR struct bl602_spi_priv_s *priv = (FAR struct bl602_spi_priv_s *)dev; + struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev; if (lock) { @@ -435,7 +435,7 @@ static int bl602_spi_lock(FAR struct spi_dev_s *dev, bool lock) * ****************************************************************************/ -static void bl602_spi_select(FAR struct spi_dev_s *dev, uint32_t devid, +static void bl602_spi_select(struct spi_dev_s *dev, uint32_t devid, bool selected) { /* we used hardware CS */ @@ -458,10 +458,10 @@ static void bl602_spi_select(FAR struct spi_dev_s *dev, uint32_t devid, * ****************************************************************************/ -static uint32_t bl602_spi_setfrequency(FAR struct spi_dev_s *dev, +static uint32_t bl602_spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency) { - FAR struct bl602_spi_priv_s *priv = (FAR struct bl602_spi_priv_s *)dev; + struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev; struct spi_clock_cfg_s clockcfg; size_t count; uint8_t ticks; @@ -526,7 +526,7 @@ static uint32_t bl602_spi_setfrequency(FAR struct spi_dev_s *dev, ****************************************************************************/ #ifdef CONFIG_SPI_CS_DELAY_CONTROL -static int bl602_spi_setdelay(FAR struct spi_dev_s *dev, uint32_t startdelay, +static int bl602_spi_setdelay(struct spi_dev_s *dev, uint32_t startdelay, uint32_t stopdelay, uint32_t csdelay) { spierr("SPI CS delay control not supported\n"); @@ -552,9 +552,9 @@ static int bl602_spi_setdelay(FAR struct spi_dev_s *dev, uint32_t startdelay, ****************************************************************************/ static void -bl602_spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) +bl602_spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode) { - FAR struct bl602_spi_priv_s *priv = (FAR struct bl602_spi_priv_s *)dev; + struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev; spiinfo("mode=%d\n", mode); @@ -607,9 +607,9 @@ bl602_spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) * ****************************************************************************/ -static void bl602_spi_setbits(FAR struct spi_dev_s *dev, int nbits) +static void bl602_spi_setbits(struct spi_dev_s *dev, int nbits) { - FAR struct bl602_spi_priv_s *priv = (FAR struct bl602_spi_priv_s *)dev; + struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev; spiinfo("nbits=%d\n", nbits); @@ -658,7 +658,7 @@ static void bl602_spi_setbits(FAR struct spi_dev_s *dev, int nbits) * ****************************************************************************/ -static uint8_t bl602_spi_status(FAR struct spi_dev_s *dev, uint32_t devid) +static uint8_t bl602_spi_status(struct spi_dev_s *dev, uint32_t devid) { uint8_t status = 0; @@ -690,7 +690,7 @@ static uint8_t bl602_spi_status(FAR struct spi_dev_s *dev, uint32_t devid) ****************************************************************************/ #ifdef CONFIG_SPI_CMDDATA -static int bl602_spi_cmddata(FAR struct spi_dev_s *dev, +static int bl602_spi_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd) { spierr("SPI cmddata not supported\n"); @@ -717,7 +717,7 @@ static int bl602_spi_cmddata(FAR struct spi_dev_s *dev, ****************************************************************************/ #ifdef CONFIG_SPI_HWFEATURES -static int bl602_spi_hwfeatures(FAR struct spi_dev_s *dev, +static int bl602_spi_hwfeatures(struct spi_dev_s *dev, spi_hwfeatures_t features) { /* Other H/W features are not supported */ @@ -750,9 +750,9 @@ static int bl602_spi_hwfeatures(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void bl602_spi_dma_exchange(FAR struct bl602_spi_priv_s *priv, - FAR const void *txbuffer, - FAR void *rxbuffer, uint32_t nwords) +static void bl602_spi_dma_exchange(struct bl602_spi_priv_s *priv, + const void *txbuffer, + void *rxbuffer, uint32_t nwords) { spierr("SPI dma not supported\n"); DEBUGPANIC(); @@ -774,7 +774,7 @@ static void bl602_spi_dma_exchange(FAR struct bl602_spi_priv_s *priv, * ****************************************************************************/ -static uint32_t bl602_spi_poll_send(FAR struct bl602_spi_priv_s *priv, +static uint32_t bl602_spi_poll_send(struct bl602_spi_priv_s *priv, uint32_t wd) { uint32_t val; @@ -816,7 +816,7 @@ static uint32_t bl602_spi_poll_send(FAR struct bl602_spi_priv_s *priv, * ****************************************************************************/ -static uint32_t bl602_spi_dma_send(FAR struct bl602_spi_priv_s *priv, +static uint32_t bl602_spi_dma_send(struct bl602_spi_priv_s *priv, uint32_t wd) { uint32_t rd = 0; @@ -842,9 +842,9 @@ static uint32_t bl602_spi_dma_send(FAR struct bl602_spi_priv_s *priv, * ****************************************************************************/ -static uint32_t bl602_spi_send(FAR struct spi_dev_s *dev, uint32_t wd) +static uint32_t bl602_spi_send(struct spi_dev_s *dev, uint32_t wd) { - FAR struct bl602_spi_priv_s *priv = (FAR struct bl602_spi_priv_s *)dev; + struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev; uint32_t rd; if (priv->dma_chan) @@ -880,9 +880,9 @@ static uint32_t bl602_spi_send(FAR struct spi_dev_s *dev, uint32_t wd) * ****************************************************************************/ -static void bl602_spi_poll_exchange(FAR struct bl602_spi_priv_s *priv, - FAR const void *txbuffer, - FAR void *rxbuffer, size_t nwords) +static void bl602_spi_poll_exchange(struct bl602_spi_priv_s *priv, + const void *txbuffer, + void *rxbuffer, size_t nwords) { int i; uint32_t w_wd = 0xffff; @@ -948,11 +948,11 @@ static void bl602_spi_poll_exchange(FAR struct bl602_spi_priv_s *priv, * ****************************************************************************/ -static void bl602_spi_exchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, FAR void *rxbuffer, +static void bl602_spi_exchange(struct spi_dev_s *dev, + const void *txbuffer, void *rxbuffer, size_t nwords) { - FAR struct bl602_spi_priv_s *priv = (FAR struct bl602_spi_priv_s *)dev; + struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev; if (priv->dma_chan) { @@ -986,8 +986,8 @@ static void bl602_spi_exchange(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void bl602_spi_sndblock(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, size_t nwords) +static void bl602_spi_sndblock(struct spi_dev_s *dev, + const void *txbuffer, size_t nwords) { spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords); @@ -1014,8 +1014,8 @@ static void bl602_spi_sndblock(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void bl602_spi_recvblock(FAR struct spi_dev_s *dev, - FAR void *rxbuffer, size_t nwords) +static void bl602_spi_recvblock(struct spi_dev_s *dev, + void *rxbuffer, size_t nwords) { spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords); @@ -1040,7 +1040,7 @@ static void bl602_spi_recvblock(FAR struct spi_dev_s *dev, ****************************************************************************/ #ifdef CONFIG_SPI_TRIGGER -static int bl602_spi_trigger(FAR struct spi_dev_s *dev) +static int bl602_spi_trigger(struct spi_dev_s *dev) { spierr("SPI trigger not supported\n"); DEBUGPANIC(); @@ -1089,9 +1089,9 @@ static void bl602_set_spi_0_act_mode_sel(uint8_t mod) * ****************************************************************************/ -static void bl602_spi_init(FAR struct spi_dev_s *dev) +static void bl602_spi_init(struct spi_dev_s *dev) { - FAR struct bl602_spi_priv_s *priv = (FAR struct bl602_spi_priv_s *)dev; + struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev; const struct bl602_spi_config_s *config = priv->config; /* Initialize the SPI semaphore that enforces mutually exclusive access */ @@ -1146,9 +1146,9 @@ static void bl602_spi_init(FAR struct spi_dev_s *dev) * ****************************************************************************/ -static void bl602_spi_deinit(FAR struct spi_dev_s *dev) +static void bl602_spi_deinit(struct spi_dev_s *dev) { - FAR struct bl602_spi_priv_s *priv = (FAR struct bl602_spi_priv_s *)dev; + struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev; bl602_swrst_ahb_slave1(AHB_SLAVE1_SPI); @@ -1173,10 +1173,10 @@ static void bl602_spi_deinit(FAR struct spi_dev_s *dev) * ****************************************************************************/ -FAR struct spi_dev_s *bl602_spibus_initialize(int port) +struct spi_dev_s *bl602_spibus_initialize(int port) { - FAR struct spi_dev_s *spi_dev; - FAR struct bl602_spi_priv_s *priv; + struct spi_dev_s *spi_dev; + struct bl602_spi_priv_s *priv; irqstate_t flags; switch (port) @@ -1190,7 +1190,7 @@ FAR struct spi_dev_s *bl602_spibus_initialize(int port) return NULL; } - spi_dev = (FAR struct spi_dev_s *)priv; + spi_dev = (struct spi_dev_s *)priv; flags = enter_critical_section(); @@ -1218,10 +1218,10 @@ FAR struct spi_dev_s *bl602_spibus_initialize(int port) * ****************************************************************************/ -int bl602_spibus_uninitialize(FAR struct spi_dev_s *dev) +int bl602_spibus_uninitialize(struct spi_dev_s *dev) { irqstate_t flags; - FAR struct bl602_spi_priv_s *priv = (FAR struct bl602_spi_priv_s *)dev; + struct bl602_spi_priv_s *priv = (struct bl602_spi_priv_s *)dev; DEBUGASSERT(dev); diff --git a/arch/risc-v/src/bl602/bl602_spi.h b/arch/risc-v/src/bl602/bl602_spi.h index e2c340f3be3..b2ddb0c226f 100644 --- a/arch/risc-v/src/bl602/bl602_spi.h +++ b/arch/risc-v/src/bl602/bl602_spi.h @@ -65,7 +65,7 @@ extern "C" * ****************************************************************************/ -FAR struct spi_dev_s *bl602_spibus_initialize(int port); +struct spi_dev_s *bl602_spibus_initialize(int port); /**************************************************************************** * Name: bl602_spibus_uninitialize @@ -75,7 +75,7 @@ FAR struct spi_dev_s *bl602_spibus_initialize(int port); * ****************************************************************************/ -int bl602_spibus_uninitialize(FAR struct spi_dev_s *dev); +int bl602_spibus_uninitialize(struct spi_dev_s *dev); #endif /* CONFIG_BL602_SPI0 */ diff --git a/arch/risc-v/src/bl602/bl602_spiflash.c b/arch/risc-v/src/bl602/bl602_spiflash.c index 0740c301d12..c651a15d6a3 100644 --- a/arch/risc-v/src/bl602/bl602_spiflash.c +++ b/arch/risc-v/src/bl602/bl602_spiflash.c @@ -50,7 +50,7 @@ ****************************************************************************/ #define SPIFLASH_BLOCKSIZE (0x1000) -#define MTD2PRIV(_dev) ((FAR struct bl602_spiflash_s *)_dev) +#define MTD2PRIV(_dev) ((struct bl602_spiflash_s *)_dev) /**************************************************************************** * Private Types @@ -81,15 +81,15 @@ struct bl602_spiflash_s /* MTD driver methods */ -static int bl602_erase(FAR struct mtd_dev_s *dev, off_t startblock, +static int bl602_erase(struct mtd_dev_s *dev, off_t startblock, size_t nblocks); -static ssize_t bl602_bread(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR uint8_t *buffer); -static ssize_t bl602_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR const uint8_t *buffer); -static ssize_t bl602_read(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR uint8_t *buffer); -static int bl602_ioctl(FAR struct mtd_dev_s *dev, int cmd, +static ssize_t bl602_bread(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, uint8_t *buffer); +static ssize_t bl602_bwrite(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, const uint8_t *buffer); +static ssize_t bl602_read(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, uint8_t *buffer); +static int bl602_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg); /**************************************************************************** @@ -137,11 +137,11 @@ static struct bl602_spiflash_s g_bl602_spiflash = * ****************************************************************************/ -static int bl602_erase(FAR struct mtd_dev_s *dev, off_t startblock, +static int bl602_erase(struct mtd_dev_s *dev, off_t startblock, size_t nblocks) { int ret = 0; - FAR struct bl602_spiflash_s *priv = MTD2PRIV(dev); + struct bl602_spiflash_s *priv = MTD2PRIV(dev); uint32_t addr = priv->config->flash_offset \ + startblock * SPIFLASH_BLOCKSIZE; uint32_t size = nblocks * SPIFLASH_BLOCKSIZE; @@ -175,11 +175,11 @@ static int bl602_erase(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -static ssize_t bl602_read(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR uint8_t *buffer) +static ssize_t bl602_read(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, uint8_t *buffer) { int ret = 0; - FAR struct bl602_spiflash_s *priv = MTD2PRIV(dev); + struct bl602_spiflash_s *priv = MTD2PRIV(dev); uint32_t addr = priv->config->flash_offset + offset; uint32_t size = nbytes; @@ -210,11 +210,11 @@ static ssize_t bl602_read(FAR struct mtd_dev_s *dev, off_t offset, * ****************************************************************************/ -static ssize_t bl602_bread(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR uint8_t *buffer) +static ssize_t bl602_bread(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, uint8_t *buffer) { int ret = 0; - FAR struct bl602_spiflash_s *priv = MTD2PRIV(dev); + struct bl602_spiflash_s *priv = MTD2PRIV(dev); uint32_t addr = priv->config->flash_offset \ + startblock * SPIFLASH_BLOCKSIZE; uint32_t size = nblocks * SPIFLASH_BLOCKSIZE; @@ -247,11 +247,11 @@ static ssize_t bl602_bread(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -static ssize_t bl602_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR const uint8_t *buffer) +static ssize_t bl602_bwrite(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, const uint8_t *buffer) { int ret = 0; - FAR struct bl602_spiflash_s *priv = MTD2PRIV(dev); + struct bl602_spiflash_s *priv = MTD2PRIV(dev); uint32_t addr = priv->config->flash_offset \ + startblock * SPIFLASH_BLOCKSIZE; uint32_t size = nblocks * SPIFLASH_BLOCKSIZE; @@ -282,18 +282,18 @@ static ssize_t bl602_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -int bl602_ioctl(FAR struct mtd_dev_s *dev, int cmd, +int bl602_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg) { int ret = -EINVAL; - FAR struct bl602_spiflash_s *priv = MTD2PRIV(dev); + struct bl602_spiflash_s *priv = MTD2PRIV(dev); switch (cmd) { case MTDIOC_GEOMETRY: { finfo("cmd(0x%x) MTDIOC_GEOMETRY.\n", cmd); - FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)arg; + struct mtd_geometry_s *geo = (struct mtd_geometry_s *)arg; if (geo) { geo->blocksize = SPIFLASH_BLOCKSIZE; @@ -309,8 +309,8 @@ int bl602_ioctl(FAR struct mtd_dev_s *dev, int cmd, break; case BIOC_PARTINFO: { - FAR struct partition_info_s *info = - (FAR struct partition_info_s *)arg; + struct partition_info_s *info = + (struct partition_info_s *)arg; if (info != NULL) { info->numsectors = priv->config->flash_size / @@ -351,10 +351,10 @@ int bl602_ioctl(FAR struct mtd_dev_s *dev, int cmd, * ****************************************************************************/ -FAR struct mtd_dev_s *bl602_spiflash_alloc_mtdpart(void) +struct mtd_dev_s *bl602_spiflash_alloc_mtdpart(void) { struct bl602_spiflash_s *priv = &g_bl602_spiflash; - FAR struct mtd_dev_s *mtd_part = NULL; + struct mtd_dev_s *mtd_part = NULL; priv->config->flash_offset = CONFIG_BL602_MTD_OFFSET; priv->config->flash_size = CONFIG_BL602_MTD_SIZE; @@ -384,7 +384,7 @@ FAR struct mtd_dev_s *bl602_spiflash_alloc_mtdpart(void) * ****************************************************************************/ -FAR struct mtd_dev_s *bl602_spiflash_get_mtd(void) +struct mtd_dev_s *bl602_spiflash_get_mtd(void) { struct bl602_spiflash_s *priv = &g_bl602_spiflash; diff --git a/arch/risc-v/src/bl602/bl602_spiflash.h b/arch/risc-v/src/bl602/bl602_spiflash.h index d8cdc9efd45..f35812ce962 100644 --- a/arch/risc-v/src/bl602/bl602_spiflash.h +++ b/arch/risc-v/src/bl602/bl602_spiflash.h @@ -60,7 +60,7 @@ extern "C" * ****************************************************************************/ -FAR struct mtd_dev_s *bl602_spiflash_alloc_mtdpart(void); +struct mtd_dev_s *bl602_spiflash_alloc_mtdpart(void); /**************************************************************************** * Name: bl602_spiflash_get_mtd @@ -76,7 +76,7 @@ FAR struct mtd_dev_s *bl602_spiflash_alloc_mtdpart(void); * ****************************************************************************/ -FAR struct mtd_dev_s *bl602_spiflash_get_mtd(void); +struct mtd_dev_s *bl602_spiflash_get_mtd(void); #ifdef __cplusplus } diff --git a/arch/risc-v/src/bl602/bl602_start.c b/arch/risc-v/src/bl602/bl602_start.c index f037832c2e0..ebf7ba3152d 100644 --- a/arch/risc-v/src/bl602/bl602_start.c +++ b/arch/risc-v/src/bl602/bl602_start.c @@ -70,14 +70,13 @@ */ uint8_t g_idle_stack[BL602_IDLESTACK_SIZE] - __attribute__((section(".noinit_idle_stack"))); + locate_data(".noinit_idle_stack"); /* Dont change the name of variable, since we refer this * g_boot2_partition_table in linker script */ -static struct boot2_partition_table_s g_boot2_partition_table - __attribute__((used)); +static struct boot2_partition_table_s g_boot2_partition_table unused_data; /**************************************************************************** * Public Data @@ -97,7 +96,7 @@ extern void bl602_boardinitialize(void); * Name: boot2_get_flash_addr ****************************************************************************/ -uint32_t __attribute__((no_instrument_function)) boot2_get_flash_addr(void) +uint32_t noinstrument_function boot2_get_flash_addr(void) { extern uint8_t __boot2_flash_cfg_src; @@ -107,7 +106,7 @@ uint32_t __attribute__((no_instrument_function)) boot2_get_flash_addr(void) } #ifdef CONFIG_STACK_OVERFLOW_CHECK -void __attribute__((no_instrument_function, section(".tcm_code"))) +void noinstrument_function locate_code(".tcm_code") __cyg_profile_func_enter(void *this_fn, void *call_site) { register uintptr_t *sp; @@ -149,7 +148,7 @@ __cyg_profile_func_enter(void *this_fn, void *call_site) return; } -void __attribute__((no_instrument_function, section(".tcm_code"))) +void noinstrument_function locate_code(".tcm_code") __cyg_profile_func_exit(void *this_fn, void *call_site) { return; diff --git a/arch/risc-v/src/bl602/bl602_tim_lowerhalf.c b/arch/risc-v/src/bl602/bl602_tim_lowerhalf.c index 6c85547ec1b..385001723c4 100644 --- a/arch/risc-v/src/bl602/bl602_tim_lowerhalf.c +++ b/arch/risc-v/src/bl602/bl602_tim_lowerhalf.c @@ -55,10 +55,10 @@ struct bl602_tim_lowerhalf_s { - FAR const struct timer_ops_s *ops; /* Lower half operations */ + const struct timer_ops_s *ops; /* Lower half operations */ tccb_t callback; /* Current upper half interrupt callback */ - FAR void *arg; /* Argument passed to upper half callback */ + void *arg; /* Argument passed to upper half callback */ bool started; /* True: Timer has been started */ uint8_t irq; /* IRQ associated with this UART */ uint8_t tim; /* timer tim 0,1 */ @@ -72,15 +72,15 @@ static int bl602_timer_handler(int irq, void *context, void *arg); /* "Lower half" driver methods */ -static int bl602_tim_start(FAR struct timer_lowerhalf_s *lower); -static int bl602_tim_stop(FAR struct timer_lowerhalf_s *lower); -static int bl602_tim_getstatus(FAR struct timer_lowerhalf_s *lower, - FAR struct timer_status_s * status); -static int bl602_tim_settimeout(FAR struct timer_lowerhalf_s *lower, +static int bl602_tim_start(struct timer_lowerhalf_s *lower); +static int bl602_tim_stop(struct timer_lowerhalf_s *lower); +static int bl602_tim_getstatus(struct timer_lowerhalf_s *lower, + struct timer_status_s * status); +static int bl602_tim_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout); -static void bl602_tim_setcallback(FAR struct timer_lowerhalf_s *lower, +static void bl602_tim_setcallback(struct timer_lowerhalf_s *lower, tccb_t callback, - FAR void * arg); + void * arg); /**************************************************************************** * Private Data @@ -134,8 +134,8 @@ static struct bl602_tim_lowerhalf_s g_tim2_lowerhalf = static int bl602_timer_handler(int irq, void *context, void *arg) { - FAR struct bl602_tim_lowerhalf_s *priv = - (FAR struct bl602_tim_lowerhalf_s *)arg; + struct bl602_tim_lowerhalf_s *priv = + (struct bl602_tim_lowerhalf_s *)arg; uint32_t next_interval_us = 0; /* Clear Interrupt Bits */ @@ -205,10 +205,10 @@ static int bl602_timer_handler(int irq, void *context, void *arg) * ****************************************************************************/ -static int bl602_tim_start(FAR struct timer_lowerhalf_s *lower) +static int bl602_tim_start(struct timer_lowerhalf_s *lower) { - FAR struct bl602_tim_lowerhalf_s *priv = - (FAR struct bl602_tim_lowerhalf_s *)lower; + struct bl602_tim_lowerhalf_s *priv = + (struct bl602_tim_lowerhalf_s *)lower; if (!priv->started) { @@ -246,10 +246,10 @@ static int bl602_tim_start(FAR struct timer_lowerhalf_s *lower) * ****************************************************************************/ -static int bl602_tim_stop(FAR struct timer_lowerhalf_s *lower) +static int bl602_tim_stop(struct timer_lowerhalf_s *lower) { - FAR struct bl602_tim_lowerhalf_s *priv = - (FAR struct bl602_tim_lowerhalf_s *)lower; + struct bl602_tim_lowerhalf_s *priv = + (struct bl602_tim_lowerhalf_s *)lower; /* timer disable */ @@ -283,11 +283,11 @@ static int bl602_tim_stop(FAR struct timer_lowerhalf_s *lower) * ****************************************************************************/ -static int bl602_tim_getstatus(FAR struct timer_lowerhalf_s *lower, - FAR struct timer_status_s * status) +static int bl602_tim_getstatus(struct timer_lowerhalf_s *lower, + struct timer_status_s * status) { - FAR struct bl602_tim_lowerhalf_s *priv = - (FAR struct bl602_tim_lowerhalf_s *)lower; + struct bl602_tim_lowerhalf_s *priv = + (struct bl602_tim_lowerhalf_s *)lower; uint32_t current_count; status->timeout = bl602_timer_getcompvalue(priv->tim, TIMER_COMP_ID_0); @@ -320,11 +320,11 @@ static int bl602_tim_getstatus(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -static int bl602_tim_settimeout(FAR struct timer_lowerhalf_s *lower, +static int bl602_tim_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout) { - FAR struct bl602_tim_lowerhalf_s *priv = - (FAR struct bl602_tim_lowerhalf_s *)lower; + struct bl602_tim_lowerhalf_s *priv = + (struct bl602_tim_lowerhalf_s *)lower; bl602_timer_setcompvalue(priv->tim, TIMER_COMP_ID_0, timeout); @@ -351,12 +351,12 @@ static int bl602_tim_settimeout(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -static void bl602_tim_setcallback(FAR struct timer_lowerhalf_s *lower, +static void bl602_tim_setcallback(struct timer_lowerhalf_s *lower, tccb_t callback, - FAR void * arg) + void * arg) { struct bl602_tim_lowerhalf_s *priv = - (FAR struct bl602_tim_lowerhalf_s *)lower; + (struct bl602_tim_lowerhalf_s *)lower; irqstate_t flags = enter_critical_section(); /* Save the new callback */ @@ -389,9 +389,9 @@ static void bl602_tim_setcallback(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -int bl602_timer_initialize(FAR const char *devpath, int timer) +int bl602_timer_initialize(const char *devpath, int timer) { - FAR struct bl602_tim_lowerhalf_s *lower; + struct bl602_tim_lowerhalf_s *lower; struct timer_cfg_s timstr; switch (timer) @@ -443,8 +443,8 @@ int bl602_timer_initialize(FAR const char *devpath, int timer) * REVISIT: The returned handle is discard here. */ - FAR void *drvr = - timer_register(devpath, (FAR struct timer_lowerhalf_s *)lower); + void *drvr = + timer_register(devpath, (struct timer_lowerhalf_s *)lower); if (drvr == NULL) { /* The actual cause of the failure may have been a failure to allocate diff --git a/arch/risc-v/src/bl602/bl602_tim_lowerhalf.h b/arch/risc-v/src/bl602/bl602_tim_lowerhalf.h index 1fe11d3fd3a..d120168ff60 100644 --- a/arch/risc-v/src/bl602/bl602_tim_lowerhalf.h +++ b/arch/risc-v/src/bl602/bl602_tim_lowerhalf.h @@ -38,6 +38,6 @@ * Name: bl602_timer_initialize ****************************************************************************/ -int bl602_timer_initialize(FAR const char *devpath, int timer); +int bl602_timer_initialize(const char *devpath, int timer); #endif /* __ARCH_RISCV_SRC_BL602_TIM_LOWERHALF_H */ diff --git a/arch/risc-v/src/bl602/bl602_timerisr.c b/arch/risc-v/src/bl602/bl602_timerisr.c index 1ccd6c60b6a..dc6011397de 100644 --- a/arch/risc-v/src/bl602/bl602_timerisr.c +++ b/arch/risc-v/src/bl602/bl602_timerisr.c @@ -111,7 +111,7 @@ static void bl602_reload_mtimecmp(void) * Name: bl602_timerisr ****************************************************************************/ -static int bl602_timerisr(int irq, void *context, FAR void *arg) +static int bl602_timerisr(int irq, void *context, void *arg) { bl602_reload_mtimecmp(); diff --git a/arch/risc-v/src/bl602/bl602_wdt_lowerhalf.c b/arch/risc-v/src/bl602/bl602_wdt_lowerhalf.c index 7a5f79e0547..13d51501a20 100644 --- a/arch/risc-v/src/bl602/bl602_wdt_lowerhalf.c +++ b/arch/risc-v/src/bl602/bl602_wdt_lowerhalf.c @@ -57,8 +57,8 @@ struct bl602_wdt_lowerhalf_s { - FAR const struct watchdog_ops_s *ops; /* Lower half operations */ - uint32_t lastreset; /* The last reset time */ + const struct watchdog_ops_s *ops; /* Lower half operations */ + uint32_t lastreset; /* The last reset time */ uint32_t timeout; uint8_t started; }; @@ -69,12 +69,12 @@ struct bl602_wdt_lowerhalf_s /* "Lower half" driver methods **********************************************/ -static int bl602_start(FAR struct watchdog_lowerhalf_s *lower); -static int bl602_stop(FAR struct watchdog_lowerhalf_s *lower); -static int bl602_keepalive(FAR struct watchdog_lowerhalf_s *lower); -static int bl602_getstatus(FAR struct watchdog_lowerhalf_s *lower, - FAR struct watchdog_status_s *status); -static int bl602_settimeout(FAR struct watchdog_lowerhalf_s *lower, +static int bl602_start(struct watchdog_lowerhalf_s *lower); +static int bl602_stop(struct watchdog_lowerhalf_s *lower); +static int bl602_keepalive(struct watchdog_lowerhalf_s *lower); +static int bl602_getstatus(struct watchdog_lowerhalf_s *lower, + struct watchdog_status_s *status); +static int bl602_settimeout(struct watchdog_lowerhalf_s *lower, uint32_t timeout); /**************************************************************************** @@ -127,10 +127,10 @@ static struct bl602_wdt_lowerhalf_s g_wdtdev = * ****************************************************************************/ -static int bl602_start(FAR struct watchdog_lowerhalf_s *lower) +static int bl602_start(struct watchdog_lowerhalf_s *lower) { - FAR struct bl602_wdt_lowerhalf_s *priv = - (FAR struct bl602_wdt_lowerhalf_s *)lower; + struct bl602_wdt_lowerhalf_s *priv = + (struct bl602_wdt_lowerhalf_s *)lower; irqstate_t flags; DEBUGASSERT(priv); @@ -169,10 +169,10 @@ static int bl602_start(FAR struct watchdog_lowerhalf_s *lower) * ****************************************************************************/ -static int bl602_stop(FAR struct watchdog_lowerhalf_s *lower) +static int bl602_stop(struct watchdog_lowerhalf_s *lower) { - FAR struct bl602_wdt_lowerhalf_s *priv = - (FAR struct bl602_wdt_lowerhalf_s *)lower; + struct bl602_wdt_lowerhalf_s *priv = + (struct bl602_wdt_lowerhalf_s *)lower; bl602_wdt_disable(); priv->started = false; @@ -196,10 +196,10 @@ static int bl602_stop(FAR struct watchdog_lowerhalf_s *lower) * ****************************************************************************/ -static int bl602_keepalive(FAR struct watchdog_lowerhalf_s *lower) +static int bl602_keepalive(struct watchdog_lowerhalf_s *lower) { - FAR struct bl602_wdt_lowerhalf_s *priv = - (FAR struct bl602_wdt_lowerhalf_s *)lower; + struct bl602_wdt_lowerhalf_s *priv = + (struct bl602_wdt_lowerhalf_s *)lower; irqstate_t flags; /* Reload the WDT timer */ @@ -230,11 +230,11 @@ static int bl602_keepalive(FAR struct watchdog_lowerhalf_s *lower) * ****************************************************************************/ -static int bl602_getstatus(FAR struct watchdog_lowerhalf_s *lower, - FAR struct watchdog_status_s *status) +static int bl602_getstatus(struct watchdog_lowerhalf_s *lower, + struct watchdog_status_s *status) { - FAR struct bl602_wdt_lowerhalf_s *priv = - (FAR struct bl602_wdt_lowerhalf_s *)lower; + struct bl602_wdt_lowerhalf_s *priv = + (struct bl602_wdt_lowerhalf_s *)lower; uint32_t ticks; uint32_t elapsed; @@ -285,11 +285,11 @@ static int bl602_getstatus(FAR struct watchdog_lowerhalf_s *lower, * ****************************************************************************/ -static int bl602_settimeout(FAR struct watchdog_lowerhalf_s *lower, +static int bl602_settimeout(struct watchdog_lowerhalf_s *lower, uint32_t timeout) { - FAR struct bl602_wdt_lowerhalf_s *priv = - (FAR struct bl602_wdt_lowerhalf_s *)lower; + struct bl602_wdt_lowerhalf_s *priv = + (struct bl602_wdt_lowerhalf_s *)lower; DEBUGASSERT(priv); @@ -334,14 +334,14 @@ static int bl602_settimeout(FAR struct watchdog_lowerhalf_s *lower, * ****************************************************************************/ -int bl602_wdt_initialize(FAR const char *devpath) +int bl602_wdt_initialize(const char *devpath) { - FAR struct bl602_wdt_lowerhalf_s *priv = &g_wdtdev; - FAR void *handle; + struct bl602_wdt_lowerhalf_s *priv = &g_wdtdev; + void *handle; /* Register the watchdog driver as /dev/watchdog0 */ handle = watchdog_register(devpath, - (FAR struct watchdog_lowerhalf_s *)priv); + (struct watchdog_lowerhalf_s *)priv); return (handle != NULL) ? OK : -ENODEV; } diff --git a/arch/risc-v/src/bl602/bl602_wdt_lowerhalf.h b/arch/risc-v/src/bl602/bl602_wdt_lowerhalf.h index cb9b721fdef..a10ebace576 100644 --- a/arch/risc-v/src/bl602/bl602_wdt_lowerhalf.h +++ b/arch/risc-v/src/bl602/bl602_wdt_lowerhalf.h @@ -64,6 +64,6 @@ extern "C" * ****************************************************************************/ -int bl602_wdt_initialize(FAR const char *devpath); +int bl602_wdt_initialize(const char *devpath); #endif /* __ARCH_RISCV_SRC_BL602_BL602_WDT_LOWERHALF_H */ diff --git a/arch/risc-v/src/c906/c906_allocateheap.c b/arch/risc-v/src/c906/c906_allocateheap.c index 0968bd2a3d9..95407246cc0 100644 --- a/arch/risc-v/src/c906/c906_allocateheap.c +++ b/arch/risc-v/src/c906/c906_allocateheap.c @@ -76,7 +76,7 @@ * ****************************************************************************/ -void up_allocate_heap(FAR void **heap_start, size_t *heap_size) +void up_allocate_heap(void **heap_start, size_t *heap_size) { #if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) /* Get the size and position of the user-space heap. @@ -88,7 +88,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) /* Return the user-space heap settings */ - *heap_start = (FAR void *)ubase; + *heap_start = (void *)ubase; *heap_size = usize; /* Allow user-mode access to the user heap memory in PMP @@ -98,7 +98,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) #else /* Return the heap settings */ - *heap_start = (FAR void *)g_idle_topstack; + *heap_start = (void *)g_idle_topstack; *heap_size = KRAM_END - g_idle_topstack; #endif } @@ -114,11 +114,11 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) ****************************************************************************/ #if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) -void up_allocate_kheap(FAR void **heap_start, size_t *heap_size) +void up_allocate_kheap(void **heap_start, size_t *heap_size) { /* Return the kernel heap settings. */ - *heap_start = (FAR void *)g_idle_topstack; + *heap_start = (void *)g_idle_topstack; *heap_size = KRAM_END - g_idle_topstack; } #endif diff --git a/arch/risc-v/src/c906/c906_irq.c b/arch/risc-v/src/c906/c906_irq.c index 8db70604aeb..b1a70910502 100644 --- a/arch/risc-v/src/c906/c906_irq.c +++ b/arch/risc-v/src/c906/c906_irq.c @@ -75,7 +75,7 @@ void up_irqinitialize(void) #if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 15 size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~15); - riscv_stack_color((FAR void *)&g_intstackalloc, intstack_size); + riscv_stack_color((void *)&g_intstackalloc, intstack_size); #endif /* Set priority for all global interrupts to 1 (lowest) */ diff --git a/arch/risc-v/src/c906/c906_serial.c b/arch/risc-v/src/c906/c906_serial.c index 4d5fafa0dba..94df3e5b8a3 100644 --- a/arch/risc-v/src/c906/c906_serial.c +++ b/arch/risc-v/src/c906/c906_serial.c @@ -119,7 +119,7 @@ static int up_setup(struct uart_dev_s *dev); static void up_shutdown(struct uart_dev_s *dev); static int up_attach(struct uart_dev_s *dev); static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context, FAR void *arg); +static int up_interrupt(int irq, void *context, void *arg); static int up_ioctl(struct file *filep, int cmd, unsigned long arg); static int up_receive(struct uart_dev_s *dev, uint32_t *status); static void up_rxint(struct uart_dev_s *dev, bool enable); @@ -366,7 +366,7 @@ static void up_detach(struct uart_dev_s *dev) static volatile uint32_t lsr_data_ready = 0; #endif -static int up_interrupt(int irq, void *context, FAR void *arg) +static int up_interrupt(int irq, void *context, void *arg) { struct uart_dev_s *dev = (struct uart_dev_s *)arg; struct up_dev_s *priv; diff --git a/arch/risc-v/src/c906/c906_timerisr.c b/arch/risc-v/src/c906/c906_timerisr.c index a3c89fa8bac..a615500cd42 100644 --- a/arch/risc-v/src/c906/c906_timerisr.c +++ b/arch/risc-v/src/c906/c906_timerisr.c @@ -93,7 +93,7 @@ static void c906_reload_mtimecmp(void) * Name: c906_timerisr ****************************************************************************/ -static int c906_timerisr(int irq, void *context, FAR void *arg) +static int c906_timerisr(int irq, void *context, void *arg) { c906_reload_mtimecmp(); diff --git a/arch/risc-v/src/common/riscv_allocateheap.c b/arch/risc-v/src/common/riscv_allocateheap.c index 3e3d1af4e59..a896adb0d15 100644 --- a/arch/risc-v/src/common/riscv_allocateheap.c +++ b/arch/risc-v/src/common/riscv_allocateheap.c @@ -65,9 +65,9 @@ * ****************************************************************************/ -void up_allocate_heap(FAR void **heap_start, size_t *heap_size) +void up_allocate_heap(void **heap_start, size_t *heap_size) { board_autoled_on(LED_HEAPALLOCATE); - *heap_start = (FAR void *)g_idle_topstack; + *heap_start = (void *)g_idle_topstack; *heap_size = CONFIG_RAM_END - g_idle_topstack; } diff --git a/arch/risc-v/src/common/riscv_backtrace.c b/arch/risc-v/src/common/riscv_backtrace.c index a0490342aa8..f3283250a61 100644 --- a/arch/risc-v/src/common/riscv_backtrace.c +++ b/arch/risc-v/src/common/riscv_backtrace.c @@ -61,9 +61,9 @@ static inline uintptr_t getfp(void) * ****************************************************************************/ -static int backtrace(FAR uintptr_t *base, FAR uintptr_t *limit, - FAR uintptr_t *fp, FAR uintptr_t *ra, - FAR void **buffer, int size) +static int backtrace(uintptr_t *base, uintptr_t *limit, + uintptr_t *fp, uintptr_t *ra, + void **buffer, int size) { int i = 0; @@ -72,14 +72,14 @@ static int backtrace(FAR uintptr_t *base, FAR uintptr_t *limit, buffer[i++] = ra; } - for (; i < size; fp = (FAR uintptr_t *)*(fp - 2), i++) + for (; i < size; fp = (uintptr_t *)*(fp - 2), i++) { if (fp > limit || fp < base) { break; } - ra = (FAR uintptr_t *)*(fp - 1); + ra = (uintptr_t *)*(fp - 1); if (ra == NULL) { break; @@ -119,9 +119,9 @@ static int backtrace(FAR uintptr_t *base, FAR uintptr_t *limit, * ****************************************************************************/ -int up_backtrace(FAR struct tcb_s *tcb, FAR void **buffer, int size) +int up_backtrace(struct tcb_s *tcb, void **buffer, int size) { - FAR struct tcb_s *rtcb = running_task(); + struct tcb_s *rtcb = running_task(); irqstate_t flags; int ret; @@ -135,22 +135,22 @@ int up_backtrace(FAR struct tcb_s *tcb, FAR void **buffer, int size) if (up_interrupt_context()) { #if CONFIG_ARCH_INTERRUPTSTACK > 15 - ret = backtrace((FAR void *)&g_intstackalloc, - (FAR void *)((uint32_t)&g_intstackalloc + + ret = backtrace((void *)&g_intstackalloc, + (void *)((uint32_t)&g_intstackalloc + CONFIG_ARCH_INTERRUPTSTACK), - (FAR void *)getfp(), NULL, buffer, size); + (void *)getfp(), NULL, buffer, size); #else ret = backtrace(rtcb->stack_base_ptr, rtcb->stack_base_ptr + rtcb->adj_stack_size, - (FAR void *)getfp(), NULL, buffer, size); + (void *)getfp(), NULL, buffer, size); #endif if (ret < size) { ret += backtrace(rtcb->stack_base_ptr, rtcb->stack_base_ptr + rtcb->adj_stack_size, - (FAR void *)CURRENT_REGS[REG_FP], - (FAR void *)CURRENT_REGS[REG_EPC], + (void *)CURRENT_REGS[REG_FP], + (void *)CURRENT_REGS[REG_EPC], &buffer[ret], size - ret); } } @@ -158,7 +158,7 @@ int up_backtrace(FAR struct tcb_s *tcb, FAR void **buffer, int size) { ret = backtrace(rtcb->stack_base_ptr, rtcb->stack_base_ptr + rtcb->adj_stack_size, - (FAR void *)getfp(), NULL, buffer, size); + (void *)getfp(), NULL, buffer, size); } } else @@ -167,8 +167,8 @@ int up_backtrace(FAR struct tcb_s *tcb, FAR void **buffer, int size) ret = backtrace(tcb->stack_base_ptr, tcb->stack_base_ptr + tcb->adj_stack_size, - (FAR void *)tcb->xcp.regs[REG_FP], - (FAR void *)tcb->xcp.regs[REG_EPC], + (void *)tcb->xcp.regs[REG_FP], + (void *)tcb->xcp.regs[REG_EPC], buffer, size); leave_critical_section(flags); diff --git a/arch/risc-v/src/common/riscv_checkstack.c b/arch/risc-v/src/common/riscv_checkstack.c index 5429696cc50..b384f952675 100644 --- a/arch/risc-v/src/common/riscv_checkstack.c +++ b/arch/risc-v/src/common/riscv_checkstack.c @@ -63,9 +63,9 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size); static size_t do_stackcheck(uintptr_t alloc, size_t size) { - FAR uintptr_t start; - FAR uintptr_t end; - FAR uint32_t *ptr; + uintptr_t start; + uintptr_t end; + uint32_t *ptr; size_t mark; if (size == 0) @@ -88,7 +88,7 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size) * that does not have the magic value is the high water mark. */ - for (ptr = (FAR uint32_t *)start, mark = (size >> 2); + for (ptr = (uint32_t *)start, mark = (size >> 2); *ptr == STACK_COLOR && mark > 0; ptr++, mark--); @@ -108,7 +108,7 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size) int i; int j; - ptr = (FAR uint32_t *)start; + ptr = (uint32_t *)start; for (i = 0; i < size; i += 4 * 64) { for (j = 0; j < 64; j++) @@ -156,12 +156,12 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size) * ****************************************************************************/ -size_t up_check_tcbstack(FAR struct tcb_s *tcb) +size_t up_check_tcbstack(struct tcb_s *tcb) { return do_stackcheck((uintptr_t)tcb->stack_base_ptr, tcb->adj_stack_size); } -ssize_t up_check_tcbstack_remain(FAR struct tcb_s *tcb) +ssize_t up_check_tcbstack_remain(struct tcb_s *tcb) { return tcb->adj_stack_size - up_check_tcbstack(tcb); } diff --git a/arch/risc-v/src/common/riscv_createstack.c b/arch/risc-v/src/common/riscv_createstack.c index 1616c99bbf5..1a206685160 100644 --- a/arch/risc-v/src/common/riscv_createstack.c +++ b/arch/risc-v/src/common/riscv_createstack.c @@ -102,7 +102,7 @@ * ****************************************************************************/ -int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) +int up_create_stack(struct tcb_s *tcb, size_t stack_size, uint8_t ttype) { #ifdef CONFIG_TLS_ALIGNED /* The allocated stack size must not exceed the maximum possible for the @@ -234,7 +234,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) ****************************************************************************/ #ifdef CONFIG_STACK_COLORATION -void riscv_stack_color(FAR void *stackbase, size_t nbytes) +void riscv_stack_color(void *stackbase, size_t nbytes) { /* Take extra care that we do not write outsize the stack boundaries */ diff --git a/arch/risc-v/src/common/riscv_exit.c b/arch/risc-v/src/common/riscv_exit.c index 41929e11bae..689f5cacfea 100644 --- a/arch/risc-v/src/common/riscv_exit.c +++ b/arch/risc-v/src/common/riscv_exit.c @@ -63,11 +63,11 @@ ****************************************************************************/ #ifdef CONFIG_DUMP_ON_EXIT -static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg) +static void _up_dumponexit(struct tcb_s *tcb, void *arg) { - FAR struct filelist *filelist; + struct filelist *filelist; #ifdef CONFIG_FILE_STREAM - FAR struct file_struct *filep; + struct file_struct *filep; #endif int i; int j; diff --git a/arch/risc-v/src/common/riscv_internal.h b/arch/risc-v/src/common/riscv_internal.h index 00520e1c70d..dbea140ec3c 100644 --- a/arch/risc-v/src/common/riscv_internal.h +++ b/arch/risc-v/src/common/riscv_internal.h @@ -168,7 +168,7 @@ void riscv_copyfullstate(uint32_t *dest, uint32_t *src); #endif void riscv_sigdeliver(void); -int riscv_swint(int irq, FAR void *context, FAR void *arg); +int riscv_swint(int irq, void *context, void *arg); uint32_t riscv_get_newintctx(void); #ifdef CONFIG_ARCH_FPU @@ -221,7 +221,7 @@ void riscv_exception(uint32_t mcause, uint32_t *regs); /* Debug ********************************************************************/ #ifdef CONFIG_STACK_COLORATION -void riscv_stack_color(FAR void *stackbase, size_t nbytes); +void riscv_stack_color(void *stackbase, size_t nbytes); #endif #undef EXTERN diff --git a/arch/risc-v/src/common/riscv_pthread_exit.c b/arch/risc-v/src/common/riscv_pthread_exit.c index 39964ea1ff1..11348d991dd 100644 --- a/arch/risc-v/src/common/riscv_pthread_exit.c +++ b/arch/risc-v/src/common/riscv_pthread_exit.c @@ -52,9 +52,13 @@ * None ****************************************************************************/ -void up_pthread_exit(pthread_exitroutine_t exit, FAR void *exit_value) +void up_pthread_exit(pthread_exitroutine_t exit, void *exit_value) { sys_call2(SYS_pthread_exit, (uintptr_t)exit, (uintptr_t)exit_value); + + /* Suppress "'noreturn' function does return" warning */ + + while (1); } #endif /* !CONFIG_BUILD_FLAT && __KERNEL__ && !CONFIG_DISABLE_PTHREAD */ diff --git a/arch/risc-v/src/common/riscv_releasestack.c b/arch/risc-v/src/common/riscv_releasestack.c index a50f5db90c9..72c22f5b36c 100644 --- a/arch/risc-v/src/common/riscv_releasestack.c +++ b/arch/risc-v/src/common/riscv_releasestack.c @@ -75,7 +75,7 @@ * ****************************************************************************/ -void up_release_stack(FAR struct tcb_s *dtcb, uint8_t ttype) +void up_release_stack(struct tcb_s *dtcb, uint8_t ttype) { /* Is there a stack allocated? */ diff --git a/arch/risc-v/src/common/riscv_stackframe.c b/arch/risc-v/src/common/riscv_stackframe.c index ec6023f7007..b69e52d920d 100644 --- a/arch/risc-v/src/common/riscv_stackframe.c +++ b/arch/risc-v/src/common/riscv_stackframe.c @@ -90,9 +90,9 @@ * ****************************************************************************/ -FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size) +void *up_stack_frame(struct tcb_s *tcb, size_t frame_size) { - FAR void *ret; + void *ret; /* Align the frame_size */ @@ -110,7 +110,7 @@ FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size) /* Save the adjusted stack values in the struct tcb_s */ - tcb->stack_base_ptr = (FAR uint8_t *)tcb->stack_base_ptr + frame_size; + tcb->stack_base_ptr = (uint8_t *)tcb->stack_base_ptr + frame_size; tcb->adj_stack_size -= frame_size; /* And return the pointer to the allocated region */ diff --git a/arch/risc-v/src/common/riscv_task_start.c b/arch/risc-v/src/common/riscv_task_start.c index dfc0b1b310a..417db572a58 100644 --- a/arch/risc-v/src/common/riscv_task_start.c +++ b/arch/risc-v/src/common/riscv_task_start.c @@ -60,7 +60,7 @@ * ****************************************************************************/ -void up_task_start(main_t taskentry, int argc, FAR char *argv[]) +void up_task_start(main_t taskentry, int argc, char *argv[]) { /* Let sys_call3() do all of the work */ diff --git a/arch/risc-v/src/common/riscv_usestack.c b/arch/risc-v/src/common/riscv_usestack.c index a47b5082390..959ff5c29b4 100644 --- a/arch/risc-v/src/common/riscv_usestack.c +++ b/arch/risc-v/src/common/riscv_usestack.c @@ -82,7 +82,7 @@ * ****************************************************************************/ -int up_use_stack(FAR struct tcb_s *tcb, FAR void *stack, size_t stack_size) +int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size) { uintptr_t top_of_stack; size_t size_of_stack; diff --git a/arch/risc-v/src/esp32c3/Kconfig b/arch/risc-v/src/esp32c3/Kconfig index f5ba5130d4c..f91e39dfa5d 100644 --- a/arch/risc-v/src/esp32c3/Kconfig +++ b/arch/risc-v/src/esp32c3/Kconfig @@ -151,7 +151,9 @@ config ESP32C3_CPU_FREQ_MHZ config ESP32C3_RT_TIMER bool "Real-time Timer" default n - select ESP32C3_TIMER0 + select ESP32C3_TIMER + ---help--- + Real-time Timer is relying upon the Systimer 1. config ESP32C3_DISABLE_STDC_ATOMIC bool "Disable standard C atomic" @@ -166,7 +168,6 @@ config ESP32C3_WIRELESS bool default n select ESP32C3_RT_TIMER - select ESP32C3_TIMER0 menu "ESP32-C3 Peripheral Support" @@ -206,6 +207,7 @@ config ESP32C3_LEDC bool "LEDC (PWM)" default n select PWM + select ARCH_HAVE_PWM_MULTICHAN config ESP32C3_GPIO_IRQ bool "GPIO pin interrupts" @@ -309,7 +311,6 @@ config ESP32C3_WIRELESS select NET select ARCH_PHY_INTERRUPT select ESP32C3_RT_TIMER - select ESP32C3_TIMER0 ---help--- Enable Wireless support @@ -374,6 +375,14 @@ config ESP32C3_I2C0_SDAPIN endif # ESP32C3_I2C0 +config ESP32C3_I2CTIMEOSEC + int "Timeout seconds" + default 0 + +config ESP32C3_I2CTIMEOMS + int "Timeout milliseconds" + default 500 + endmenu # I2C configuration menu "SPI configuration" @@ -749,6 +758,20 @@ config ESP32C3_WIFI_FS_MOUNTPT ---help--- Mount point of Wi-Fi storage file system. +config ESP32C3_WIFI_MTD_OFFSET + hex "Wi-Fi MTD partition offset" + default 0x280000 + depends on ESP32C3_WIFI_SAVE_PARAM + ---help--- + This is the base address of the Wi-Fi MTD partition. + +config ESP32C3_WIFI_MTD_SIZE + hex "Wi-Fi MTD partition size" + default 0xb0000 + depends on ESP32C3_WIFI_SAVE_PARAM + ---help--- + This is the size of the Wi-Fi MTD partition. + config ESP32C3_WIFI_STA_DISCONNECT_PM bool "Power Management for station when disconnected" default n @@ -876,7 +899,6 @@ config ESP32C3_AUTO_SLEEP default n select PM select ESP32C3_RT_TIMER - select ESP32C3_TIMER0 select ESP32C3_TICKLESS ---help--- Enable ESP32-C3 Auto-sleep diff --git a/arch/risc-v/src/esp32c3/Make.defs b/arch/risc-v/src/esp32c3/Make.defs index 6c1b53cdc95..8e0b30c9d04 100644 --- a/arch/risc-v/src/esp32c3/Make.defs +++ b/arch/risc-v/src/esp32c3/Make.defs @@ -45,7 +45,7 @@ endif # Specify our C code within this directory to be included -CHIP_CSRCS = esp32c3_allocateheap.c esp32c3_start.c esp32c3_idle.c +CHIP_CSRCS = esp32c3_allocateheap.c esp32c3_start.c esp32c3_wdt.c esp32c3_idle.c CHIP_CSRCS += esp32c3_irq.c CHIP_CSRCS += esp32c3_clockconfig.c esp32c3_gpio.c CHIP_CSRCS += esp32c3_lowputc.c @@ -85,12 +85,9 @@ ifeq ($(CONFIG_ESP32C3_PARTITION),y) CHIP_CSRCS += esp32c3_partition.c endif -ifeq ($(CONFIG_ESP32C3_WDT),y) -CHIP_CSRCS += esp32c3_wdt.c ifeq ($(CONFIG_WATCHDOG),y) CHIP_CSRCS += esp32c3_wdt_lowerhalf.c endif -endif ifeq ($(CONFIG_ESP32C3_TIMER),y) CHIP_CSRCS += esp32c3_tim.c @@ -175,7 +172,7 @@ endif ifeq ($(CONFIG_ESP32C3_WIRELESS),y) WIRELESS_DRV_UNPACK = esp-wireless-drivers-3rdparty -WIRELESS_DRV_ID = df1f8c1 +WIRELESS_DRV_ID = 024420d WIRELESS_DRV_ZIP = $(WIRELESS_DRV_ID).zip WIRELESS_DRV_URL = https://github.com/espressif/esp-wireless-drivers-3rdparty/archive @@ -191,7 +188,7 @@ chip/$(WIRELESS_DRV_UNPACK): $(WIRELESS_DRV_ZIP) context:: chip/$(WIRELESS_DRV_UNPACK) -clean_context:: +distclean:: $(call DELFILE, chip/$(WIRELESS_DRV_ZIP)) $(call DELDIR, chip/$(WIRELESS_DRV_UNPACK)) diff --git a/arch/risc-v/src/esp32c3/esp32c3_adc.c b/arch/risc-v/src/esp32c3/esp32c3_adc.c index bafda50d69c..976a062db7b 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_adc.c +++ b/arch/risc-v/src/esp32c3/esp32c3_adc.c @@ -666,16 +666,27 @@ static int adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg) switch (cmd) { case ANIOC_TRIGGER: + { + /* Start sampling and read ADC value here */ - /* Start sampling and read ADC value here */ + adc_read_work(dev); + ret = OK; + } + break; - adc_read_work(dev); - ret = OK; + case ANIOC_GET_NCHANNELS: + { + /* Return the number of configured channels */ + + ret = 1; + } break; default: - aerr("ERROR: Unknown cmd: %d\n", cmd); - ret = -ENOTTY; + { + aerr("ERROR: Unknown cmd: %d\n", cmd); + ret = -ENOTTY; + } break; } diff --git a/arch/risc-v/src/esp32c3/esp32c3_aes.c b/arch/risc-v/src/esp32c3/esp32c3_aes.c index 8353df579e5..b2a43055e04 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_aes.c +++ b/arch/risc-v/src/esp32c3/esp32c3_aes.c @@ -588,8 +588,8 @@ int esp32c3_aes_init(void) #ifdef CONFIG_CRYPTO_AES -int aes_cypher(FAR void *out, FAR const void *in, uint32_t size, - FAR const void *iv, FAR const void *key, uint32_t keysize, +int aes_cypher(void *out, const void *in, uint32_t size, + const void *iv, const void *key, uint32_t keysize, int mode, int encrypt) { int ret; diff --git a/arch/risc-v/src/esp32c3/esp32c3_allocateheap.c b/arch/risc-v/src/esp32c3/esp32c3_allocateheap.c index 8119d05e75d..42d68e19612 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_allocateheap.c +++ b/arch/risc-v/src/esp32c3/esp32c3_allocateheap.c @@ -59,7 +59,7 @@ * ****************************************************************************/ -void up_allocate_heap(FAR void **heap_start, size_t *heap_size) +void up_allocate_heap(void **heap_start, size_t *heap_size) { /* These values come from the linker scripts (esp32c3.ld and * esp32c3.template.ld.) Check boards/risc-v/esp32c3. @@ -70,7 +70,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) board_autoled_on(LED_HEAPALLOCATE); - *heap_start = (FAR void *)&_sheap; + *heap_start = (void *)&_sheap; *heap_size = (size_t)(ets_rom_layout_p->dram0_rtos_reserved_start - (uintptr_t)&_sheap); } diff --git a/arch/risc-v/src/esp32c3/esp32c3_attr.h b/arch/risc-v/src/esp32c3/esp32c3_attr.h index 93122d60fff..e0c9818d07a 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_attr.h +++ b/arch/risc-v/src/esp32c3/esp32c3_attr.h @@ -27,27 +27,27 @@ /* Forces code into IRAM instead of flash */ -#define IRAM_ATTR __attribute__((section(".iram1"))) +#define IRAM_ATTR locate_data(".iram1") /* Forces data into DRAM instead of flash */ -#define DRAM_ATTR __attribute__((section(".dram1"))) +#define DRAM_ATTR locate_data(".dram1") /* Forces code into RTC fast memory */ -#define RTC_IRAM_ATTR __attribute__((section(".rtc.text"))) +#define RTC_IRAM_ATTR locate_data(".rtc.text") /* Forces data into RTC slow memory * Any variable marked with this attribute will keep its value * during a deep sleep / wake cycle. */ -#define RTC_DATA_ATTR __attribute__((section(".rtc.data"))) +#define RTC_DATA_ATTR locate_data(".rtc.data") /* Forces read-only data into RTC slow memory * Makes constant data available to RTC wake stubs. */ -#define RTC_RODATA_ATTR __attribute__((section(".rtc.rodata"))) +#define RTC_RODATA_ATTR locate_data(".rtc.rodata") #endif /* __ARCH_RISCV_SRC_ESP32C3_ESP32C3_ATTR_H */ diff --git a/arch/risc-v/src/esp32c3/esp32c3_ble_adapter.c b/arch/risc-v/src/esp32c3/esp32c3_ble_adapter.c index 21926fb2f96..62f9dc098bd 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_ble_adapter.c +++ b/arch/risc-v/src/esp32c3/esp32c3_ble_adapter.c @@ -600,7 +600,7 @@ static void interrupt_clear_wrapper(int intr_source, int intr_num) * ****************************************************************************/ -static int esp_int_adpt_cb(int irq, void *context, FAR void *arg) +static int esp_int_adpt_cb(int irq, void *context, void *arg) { struct irq_adpt_s *adapter = (struct irq_adpt_s *)arg; diff --git a/arch/risc-v/src/esp32c3/esp32c3_efuse.h b/arch/risc-v/src/esp32c3/esp32c3_efuse.h index eaf95c4518f..91bb447b6fe 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_efuse.h +++ b/arch/risc-v/src/esp32c3/esp32c3_efuse.h @@ -178,7 +178,7 @@ void esp32c3_efuse_burn_efuses(void); * ****************************************************************************/ -int esp32c3_efuse_initialize(FAR const char *devpath); +int esp32c3_efuse_initialize(const char *devpath); #ifdef __cplusplus } diff --git a/arch/risc-v/src/esp32c3/esp32c3_efuse_lowerhalf.c b/arch/risc-v/src/esp32c3/esp32c3_efuse_lowerhalf.c index f347b385207..e1d15d46fa5 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_efuse_lowerhalf.c +++ b/arch/risc-v/src/esp32c3/esp32c3_efuse_lowerhalf.c @@ -37,8 +37,8 @@ struct esp32c3_efuse_lowerhalf_s { - FAR const struct efuse_ops_s *ops; /* Lower half operations */ - void *upper; /* Pointer to efuse_upperhalf_s */ + const struct efuse_ops_s *ops; /* Lower half operations */ + void *upper; /* Pointer to efuse_upperhalf_s */ }; /**************************************************************************** @@ -47,14 +47,14 @@ struct esp32c3_efuse_lowerhalf_s /* "Lower half" driver methods */ -static int esp32c3_efuse_lowerhalf_read(FAR struct efuse_lowerhalf_s *lower, +static int esp32c3_efuse_lowerhalf_read(struct efuse_lowerhalf_s *lower, const efuse_desc_t *field[], uint8_t *data, size_t bits_len); -static int esp32c3_efuse_lowerhalf_write(FAR struct efuse_lowerhalf_s *lower, +static int esp32c3_efuse_lowerhalf_write(struct efuse_lowerhalf_s *lower, const efuse_desc_t *field[], const uint8_t *data, size_t bits_len); -static int esp32c3_efuse_lowerhalf_ioctl(FAR struct efuse_lowerhalf_s *lower, +static int esp32c3_efuse_lowerhalf_ioctl(struct efuse_lowerhalf_s *lower, int cmd, unsigned long arg); /**************************************************************************** @@ -100,7 +100,7 @@ static struct esp32c3_efuse_lowerhalf_s g_esp32c3_efuse_lowerhalf = * ****************************************************************************/ -static int esp32c3_efuse_lowerhalf_read(FAR struct efuse_lowerhalf_s *lower, +static int esp32c3_efuse_lowerhalf_read(struct efuse_lowerhalf_s *lower, const efuse_desc_t *field[], uint8_t *data, size_t bits_len) { @@ -131,7 +131,7 @@ static int esp32c3_efuse_lowerhalf_read(FAR struct efuse_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32c3_efuse_lowerhalf_write(FAR struct efuse_lowerhalf_s *lower, +static int esp32c3_efuse_lowerhalf_write(struct efuse_lowerhalf_s *lower, const efuse_desc_t *field[], const uint8_t *data, size_t bits_len) @@ -172,7 +172,7 @@ static int esp32c3_efuse_lowerhalf_write(FAR struct efuse_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32c3_efuse_lowerhalf_ioctl(FAR struct efuse_lowerhalf_s *lower, +static int esp32c3_efuse_lowerhalf_ioctl(struct efuse_lowerhalf_s *lower, int cmd, unsigned long arg) { int ret = OK; @@ -212,7 +212,7 @@ static int esp32c3_efuse_lowerhalf_ioctl(FAR struct efuse_lowerhalf_s *lower, * ****************************************************************************/ -int esp32c3_efuse_initialize(FAR const char *devpath) +int esp32c3_efuse_initialize(const char *devpath) { struct esp32c3_efuse_lowerhalf_s *lower = NULL; int ret = OK; @@ -224,7 +224,7 @@ int esp32c3_efuse_initialize(FAR const char *devpath) /* Register the efuse upper driver */ lower->upper = efuse_register(devpath, - (FAR struct efuse_lowerhalf_s *)lower); + (struct efuse_lowerhalf_s *)lower); if (lower->upper == NULL) { diff --git a/arch/risc-v/src/esp32c3/esp32c3_freerun.h b/arch/risc-v/src/esp32c3/esp32c3_freerun.h index d80da590489..be2d27c8030 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_freerun.h +++ b/arch/risc-v/src/esp32c3/esp32c3_freerun.h @@ -46,11 +46,11 @@ struct esp32c3_freerun_s { - uint8_t chan; /* The timer/counter in use */ - uint32_t overflow; /* Timer counter overflow */ - uint16_t resolution; /* Timer resolution */ - uint64_t max_timeout; /* Maximum timeout to overflow */ - FAR struct esp32c3_tim_dev_s *tch; /* Handle returned by esp32c3_tim_init() */ + uint8_t chan; /* The timer/counter in use */ + uint32_t overflow; /* Timer counter overflow */ + uint16_t resolution; /* Timer resolution */ + uint64_t max_timeout; /* Maximum timeout to overflow */ + struct esp32c3_tim_dev_s *tch; /* Handle returned by esp32c3_tim_init() */ }; /**************************************************************************** diff --git a/arch/risc-v/src/esp32c3/esp32c3_gpio.c b/arch/risc-v/src/esp32c3/esp32c3_gpio.c index de4fc5b020f..920a4662415 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_gpio.c +++ b/arch/risc-v/src/esp32c3/esp32c3_gpio.c @@ -87,7 +87,7 @@ static void gpio_dispatch(int irq, uint32_t status, uint32_t *regs) ****************************************************************************/ #ifdef CONFIG_ESP32C3_GPIO_IRQ -static int gpio_interrupt(int irq, FAR void *context, FAR void *arg) +static int gpio_interrupt(int irq, void *context, void *arg) { uint32_t status; diff --git a/arch/risc-v/src/esp32c3/esp32c3_i2c.c b/arch/risc-v/src/esp32c3/esp32c3_i2c.c index 8807703315c..a43d08d2a0b 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_i2c.c +++ b/arch/risc-v/src/esp32c3/esp32c3_i2c.c @@ -268,7 +268,7 @@ static int esp32c3_i2c_transfer(struct i2c_master_s *dev, static inline void esp32c3_i2c_process(struct esp32c3_i2c_priv_s *priv, uint32_t status); #ifdef CONFIG_I2C_POLLED -static int esp32c3_i2c_polling_waitdone(FAR struct esp32c3_i2c_priv_s *priv); +static int esp32c3_i2c_polling_waitdone(struct esp32c3_i2c_priv_s *priv); #endif #ifdef CONFIG_I2C_RESET @@ -799,8 +799,18 @@ static int esp32c3_i2c_sem_waitdone(struct esp32c3_i2c_priv_s *priv) clock_gettime(CLOCK_REALTIME, &abstime); - abstime.tv_sec += 10; - abstime.tv_nsec += 0; +#if CONFIG_ESP32C3_I2CTIMEOSEC > 0 + abstime.tv_sec += CONFIG_ESP32C3_I2CTIMEOSEC; +#endif + +#if CONFIG_ESP32C3_I2CTIMEOMS > 0 + abstime.tv_nsec += CONFIG_ESP32C3_I2CTIMEOMS * NSEC_PER_MSEC; + if (abstime.tv_nsec >= 1000 * NSEC_PER_MSEC) + { + abstime.tv_sec++; + abstime.tv_nsec -= 1000 * NSEC_PER_MSEC; + } +#endif ret = nxsem_timedwait_uninterruptible(&priv->sem_isr, &abstime); @@ -826,7 +836,7 @@ static int esp32c3_i2c_sem_waitdone(struct esp32c3_i2c_priv_s *priv) * ****************************************************************************/ #ifdef CONFIG_I2C_POLLED -static int esp32c3_i2c_polling_waitdone(FAR struct esp32c3_i2c_priv_s *priv) +static int esp32c3_i2c_polling_waitdone(struct esp32c3_i2c_priv_s *priv) { int ret; struct timespec current_time; diff --git a/arch/risc-v/src/esp32c3/esp32c3_ledc.c b/arch/risc-v/src/esp32c3/esp32c3_ledc.c index c769d26a163..2d265bbad73 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_ledc.c +++ b/arch/risc-v/src/esp32c3/esp32c3_ledc.c @@ -105,12 +105,12 @@ /* LEDC timer registers mapping */ #define LEDC_TIMER_REG(r, n) ((r) + (n) * (LEDC_TIMER1_CONF_REG - \ - LEDC_TIMER2_CONF_REG)) + LEDC_TIMER0_CONF_REG)) /* LEDC timer channel registers mapping */ -#define LEDC_CHAN_REG(r, n) ((r) + (n) * (LEDC_CH0_CONF0_REG - \ - LEDC_CH1_CONF0_REG)) +#define LEDC_CHAN_REG(r, n) ((r) + (n) * (LEDC_CH1_CONF0_REG - \ + LEDC_CH0_CONF0_REG)) #define SET_TIMER_BITS(t, r, b) setbits(b, LEDC_TIMER_REG(r, (t)->num)); #define SET_TIMER_REG(t, r, v) putreg32(v, LEDC_TIMER_REG(r, (t)->num)); @@ -632,9 +632,17 @@ static int pwm_start(struct pwm_lowerhalf_s *dev, for (int i = 0; i < channels; i++) { +#ifdef CONFIG_PWM_NCHANNELS + if (priv->chans[i].duty != info->channels[i].duty) +#else if (priv->chans[i].duty != info[i].duty) +#endif { +#ifdef CONFIG_PWM_NCHANNELS + priv->chans[i].duty = info->channels[i].duty; +#else priv->chans[i].duty = info[i].duty; +#endif setup_channel(priv, i); } } diff --git a/arch/risc-v/src/esp32c3/esp32c3_oneshot.h b/arch/risc-v/src/esp32c3/esp32c3_oneshot.h index 169d5a95f56..3d5fe839ca8 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_oneshot.h +++ b/arch/risc-v/src/esp32c3/esp32c3_oneshot.h @@ -58,14 +58,14 @@ typedef void (*oneshot_handler_t)(void *arg); struct esp32c3_oneshot_s { - uint8_t chan; /* The timer/counter in use */ - volatile bool running; /* True: the timer is running */ - FAR struct esp32c3_tim_dev_s *tim; /* Pointer returned by - * esp32c3_tim_init() */ - volatile oneshot_handler_t handler; /* Oneshot expiration callback */ - volatile void *arg; /* The argument that will accompany - * the callback */ - uint32_t resolution; /* us */ + uint8_t chan; /* The timer/counter in use */ + volatile bool running; /* True: the timer is running */ + struct esp32c3_tim_dev_s *tim; /* Pointer returned by + * esp32c3_tim_init() */ + volatile oneshot_handler_t handler; /* Oneshot expiration callback */ + volatile void *arg; /* The argument that will accompany + * the callback */ + uint32_t resolution; /* us */ }; /**************************************************************************** diff --git a/arch/risc-v/src/esp32c3/esp32c3_oneshot_lowerhalf.c b/arch/risc-v/src/esp32c3/esp32c3_oneshot_lowerhalf.c index 496038e7d3d..fe4da9a0afe 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_oneshot_lowerhalf.c +++ b/arch/risc-v/src/esp32c3/esp32c3_oneshot_lowerhalf.c @@ -57,7 +57,7 @@ struct esp32c3_oneshot_lowerhalf_s struct oneshot_lowerhalf_s lh; /* Lower half instance */ struct esp32c3_oneshot_s oneshot; /* ESP32-C3-specific oneshot state */ oneshot_callback_t callback; /* Upper half Interrupt callback */ - FAR void *arg; /* Argument passed to handler */ + void *arg; /* Argument passed to handler */ uint16_t resolution; }; @@ -69,16 +69,16 @@ static void esp32c3_oneshot_lh_handler(void *arg); /* "Lower half" driver methods **********************************************/ -static int oneshot_lh_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts); -static int oneshot_lh_start(FAR struct oneshot_lowerhalf_s *lower, +static int oneshot_lh_max_delay(struct oneshot_lowerhalf_s *lower, + struct timespec *ts); +static int oneshot_lh_start(struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, - FAR void *arg, - FAR const struct timespec *ts); -static int oneshot_lh_cancel(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts); -static int oneshot_lh_current(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts); + void *arg, + const struct timespec *ts); +static int oneshot_lh_cancel(struct oneshot_lowerhalf_s *lower, + struct timespec *ts); +static int oneshot_lh_current(struct oneshot_lowerhalf_s *lower, + struct timespec *ts); /**************************************************************************** * Private Data @@ -112,8 +112,8 @@ static const struct oneshot_operations_s g_esp32c3_timer_ops = static void esp32c3_oneshot_lh_handler(void *arg) { - FAR struct esp32c3_oneshot_lowerhalf_s *priv = - (FAR struct esp32c3_oneshot_lowerhalf_s *)arg; + struct esp32c3_oneshot_lowerhalf_s *priv = + (struct esp32c3_oneshot_lowerhalf_s *)arg; DEBUGASSERT(priv != NULL); DEBUGASSERT(priv->callback != NULL); @@ -148,8 +148,8 @@ static void esp32c3_oneshot_lh_handler(void *arg) * ****************************************************************************/ -static int oneshot_lh_max_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts) +static int oneshot_lh_max_delay(struct oneshot_lowerhalf_s *lower, + struct timespec *ts) { DEBUGASSERT(ts != NULL); @@ -190,13 +190,13 @@ static int oneshot_lh_max_delay(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -static int oneshot_lh_start(FAR struct oneshot_lowerhalf_s *lower, +static int oneshot_lh_start(struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, - FAR void *arg, - FAR const struct timespec *ts) + void *arg, + const struct timespec *ts) { - FAR struct esp32c3_oneshot_lowerhalf_s *priv = - (FAR struct esp32c3_oneshot_lowerhalf_s *)lower; + struct esp32c3_oneshot_lowerhalf_s *priv = + (struct esp32c3_oneshot_lowerhalf_s *)lower; int ret; irqstate_t flags; @@ -248,11 +248,11 @@ static int oneshot_lh_start(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -static int oneshot_lh_cancel(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts) +static int oneshot_lh_cancel(struct oneshot_lowerhalf_s *lower, + struct timespec *ts) { - FAR struct esp32c3_oneshot_lowerhalf_s *priv = - (FAR struct esp32c3_oneshot_lowerhalf_s *)lower; + struct esp32c3_oneshot_lowerhalf_s *priv = + (struct esp32c3_oneshot_lowerhalf_s *)lower; irqstate_t flags; int ret; @@ -293,11 +293,11 @@ static int oneshot_lh_cancel(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -static int oneshot_lh_current(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts) +static int oneshot_lh_current(struct oneshot_lowerhalf_s *lower, + struct timespec *ts) { - FAR struct esp32c3_oneshot_lowerhalf_s *priv = - (FAR struct esp32c3_oneshot_lowerhalf_s *)lower; + struct esp32c3_oneshot_lowerhalf_s *priv = + (struct esp32c3_oneshot_lowerhalf_s *)lower; uint64_t current_us; DEBUGASSERT(priv != NULL); @@ -334,15 +334,15 @@ static int oneshot_lh_current(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, +struct oneshot_lowerhalf_s *oneshot_initialize(int chan, uint16_t resolution) { - FAR struct esp32c3_oneshot_lowerhalf_s *priv; + struct esp32c3_oneshot_lowerhalf_s *priv; int ret; /* Allocate an instance of the lower half driver */ - priv = (FAR struct esp32c3_oneshot_lowerhalf_s *)kmm_zalloc( + priv = (struct esp32c3_oneshot_lowerhalf_s *)kmm_zalloc( sizeof(struct esp32c3_oneshot_lowerhalf_s)); if (priv == NULL) diff --git a/arch/risc-v/src/esp32c3/esp32c3_partition.c b/arch/risc-v/src/esp32c3/esp32c3_partition.c index 02960955073..7fa1083d1c4 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_partition.c +++ b/arch/risc-v/src/esp32c3/esp32c3_partition.c @@ -362,7 +362,7 @@ static int ota_set_bootseq(struct mtd_dev_priv_s *dev, int num) * ****************************************************************************/ -static int esp32c3_part_erase(FAR struct mtd_dev_s *dev, off_t startblock, +static int esp32c3_part_erase(struct mtd_dev_s *dev, off_t startblock, size_t nblocks) { struct mtd_dev_priv_s *mtd_priv = (struct mtd_dev_priv_s *)dev; @@ -387,8 +387,8 @@ static int esp32c3_part_erase(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -static ssize_t esp32c3_part_read(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR uint8_t *buffer) +static ssize_t esp32c3_part_read(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, uint8_t *buffer) { struct mtd_dev_priv_s *mtd_priv = (struct mtd_dev_priv_s *)dev; @@ -412,9 +412,9 @@ static ssize_t esp32c3_part_read(FAR struct mtd_dev_s *dev, off_t offset, * ****************************************************************************/ -static ssize_t esp32c3_part_bread(FAR struct mtd_dev_s *dev, +static ssize_t esp32c3_part_bread(struct mtd_dev_s *dev, off_t startblock, size_t nblocks, - FAR uint8_t *buffer) + uint8_t *buffer) { struct mtd_dev_priv_s *mtd_priv = (struct mtd_dev_priv_s *)dev; @@ -438,8 +438,8 @@ static ssize_t esp32c3_part_bread(FAR struct mtd_dev_s *dev, * ****************************************************************************/ -static ssize_t esp32c3_part_write(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR const uint8_t *buffer) +static ssize_t esp32c3_part_write(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, const uint8_t *buffer) { struct mtd_dev_priv_s *mtd_priv = (struct mtd_dev_priv_s *)dev; @@ -464,9 +464,9 @@ static ssize_t esp32c3_part_write(FAR struct mtd_dev_s *dev, off_t offset, * ****************************************************************************/ -static ssize_t esp32c3_part_bwrite(FAR struct mtd_dev_s *dev, +static ssize_t esp32c3_part_bwrite(struct mtd_dev_s *dev, off_t startblock, size_t nblocks, - FAR const uint8_t *buffer) + const uint8_t *buffer) { struct mtd_dev_priv_s *mtd_priv = (struct mtd_dev_priv_s *)dev; @@ -489,7 +489,7 @@ static ssize_t esp32c3_part_bwrite(FAR struct mtd_dev_s *dev, * ****************************************************************************/ -static int esp32c3_part_ioctl(FAR struct mtd_dev_s *dev, int cmd, +static int esp32c3_part_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg) { int ret; diff --git a/arch/risc-v/src/esp32c3/esp32c3_rng.c b/arch/risc-v/src/esp32c3/esp32c3_rng.c index ce046aed1d5..54ad30297d4 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_rng.c +++ b/arch/risc-v/src/esp32c3/esp32c3_rng.c @@ -57,9 +57,9 @@ ****************************************************************************/ static int esp32c3_rng_initialize(void); -static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer, +static ssize_t esp32c3_rng_read(struct file *filep, char *buffer, size_t buflen); -static int esp32c3_rng_open(FAR struct file *filep); +static int esp32c3_rng_open(struct file *filep); /**************************************************************************** * Private Types @@ -164,7 +164,7 @@ static int esp32c3_rng_initialize(void) * Name: esp32c3_rng_open ****************************************************************************/ -static int esp32c3_rng_open(FAR struct file *filep) +static int esp32c3_rng_open(struct file *filep) { /* O_NONBLOCK is not supported */ @@ -181,10 +181,10 @@ static int esp32c3_rng_open(FAR struct file *filep) * Name: esp32c3_rng_read ****************************************************************************/ -static ssize_t esp32c3_rng_read(FAR struct file *filep, FAR char *buffer, +static ssize_t esp32c3_rng_read(struct file *filep, char *buffer, size_t buflen) { - FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev; + struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev; ssize_t read_len; uint8_t *rd_buf = (uint8_t *)buffer; diff --git a/arch/risc-v/src/esp32c3/esp32c3_rt_timer.c b/arch/risc-v/src/esp32c3/esp32c3_rt_timer.c index 47173539935..c703babd7d8 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_rt_timer.c +++ b/arch/risc-v/src/esp32c3/esp32c3_rt_timer.c @@ -57,21 +57,32 @@ #define RT_TIMER_TASK_PRIORITY CONFIG_ESP32C3_RT_TIMER_TASK_PRIORITY #define RT_TIMER_TASK_STACK_SIZE CONFIG_ESP32C3_RT_TIMER_TASK_STACK_SIZE -#define ESP32C3_TIMER_PRESCALER (APB_CLK_FREQ / (1000 * 1000)) -#define ESP32C3_RT_TIMER 0 /* Timer 0 */ +#define CYCLES_PER_USEC 16 /* Timer running at 16 MHz*/ +#define USEC_TO_CYCLES(u) ((u) * CYCLES_PER_USEC) +#define CYCLES_TO_USEC(c) ((c) / CYCLES_PER_USEC) +#define ESP32C3_RT_TIMER ESP32C3_SYSTIM /* Systimer 1 */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct esp32c3_rt_priv_s +{ + int pid; + sem_t toutsem; + struct list_node runlist; + struct list_node toutlist; + struct esp32c3_tim_dev_s *timer; +}; /**************************************************************************** * Private Data ****************************************************************************/ -static int s_pid; - -static sem_t s_toutsem; - -static struct list_node s_runlist; -static struct list_node s_toutlist; - -static struct esp32c3_tim_dev_s *s_esp32c3_tim_dev; +static struct esp32c3_rt_priv_s g_rt_priv = +{ + .pid = -EINVAL, +}; /**************************************************************************** * Private Function Prototypes @@ -94,7 +105,7 @@ static struct esp32c3_tim_dev_s *s_esp32c3_tim_dev; * ****************************************************************************/ -static void start_rt_timer(FAR struct rt_timer_s *timer, +static void start_rt_timer(struct rt_timer_s *timer, uint64_t timeout, bool repeat) { @@ -102,7 +113,7 @@ static void start_rt_timer(FAR struct rt_timer_s *timer, struct rt_timer_s *p; bool inserted = false; uint64_t counter; - struct esp32c3_tim_dev_s *tim = s_esp32c3_tim_dev; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; flags = enter_critical_section(); @@ -112,7 +123,8 @@ static void start_rt_timer(FAR struct rt_timer_s *timer, { /* Calculate the timer's alarm value */ - ESP32C3_TIM_GETCTR(tim, &counter); + ESP32C3_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); timer->timeout = timeout; timer->alarm = timer->timeout + counter; @@ -129,7 +141,7 @@ static void start_rt_timer(FAR struct rt_timer_s *timer, * node of timer whose alarm value is larger than new one */ - list_for_every_entry(&s_runlist, p, struct rt_timer_s, list) + list_for_every_entry(&priv->runlist, p, struct rt_timer_s, list) { if (p->alarm > timer->alarm) { @@ -145,19 +157,20 @@ static void start_rt_timer(FAR struct rt_timer_s *timer, if (!inserted) { - list_add_tail(&s_runlist, &timer->list); + list_add_tail(&priv->runlist, &timer->list); } timer->state = RT_TIMER_READY; /* If this timer is at the head of the list */ - if (timer == container_of(s_runlist.next, struct rt_timer_s, list)) + if (timer == container_of(priv->runlist.next, + struct rt_timer_s, list)) { /* Reset the hardware timer alarm */ - ESP32C3_TIM_SETALRVL(tim, timer->alarm); - ESP32C3_TIM_SETALRM(tim, true); + ESP32C3_TIM_SETALRVL(priv->timer, USEC_TO_CYCLES(timer->alarm)); + ESP32C3_TIM_SETALRM(priv->timer, true); } } @@ -179,13 +192,13 @@ static void start_rt_timer(FAR struct rt_timer_s *timer, * ****************************************************************************/ -static void stop_rt_timer(FAR struct rt_timer_s *timer) +static void stop_rt_timer(struct rt_timer_s *timer) { irqstate_t flags; bool ishead; struct rt_timer_s *next_timer; uint64_t alarm; - struct esp32c3_tim_dev_s *tim = s_esp32c3_tim_dev; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; flags = enter_critical_section(); @@ -201,7 +214,8 @@ static void stop_rt_timer(FAR struct rt_timer_s *timer) { /* Check if the timer is at the head of the list */ - if (timer == container_of(s_runlist.next, struct rt_timer_s, list)) + if (timer == container_of(priv->runlist.next, + struct rt_timer_s, list)) { ishead = true; } @@ -217,19 +231,19 @@ static void stop_rt_timer(FAR struct rt_timer_s *timer) if (ishead) { - if (!list_is_empty(&s_runlist)) + if (!list_is_empty(&priv->runlist)) { /* Set the value from the next timer as the new hardware timer * alarm value. */ - next_timer = container_of(s_runlist.next, + next_timer = container_of(priv->runlist.next, struct rt_timer_s, list); alarm = next_timer->alarm; - ESP32C3_TIM_SETALRVL(tim, alarm); - ESP32C3_TIM_SETALRM(tim, true); + ESP32C3_TIM_SETALRVL(priv->timer, USEC_TO_CYCLES(alarm)); + ESP32C3_TIM_SETALRM(priv->timer, true); } } } @@ -253,11 +267,13 @@ static void stop_rt_timer(FAR struct rt_timer_s *timer) * ****************************************************************************/ -static void delete_rt_timer(FAR struct rt_timer_s *timer) +static void delete_rt_timer(struct rt_timer_s *timer) { int ret; irqstate_t flags; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; + flags = enter_critical_section(); if (timer->state == RT_TIMER_READY) @@ -273,12 +289,12 @@ static void delete_rt_timer(FAR struct rt_timer_s *timer) goto exit; } - list_add_after(&s_toutlist, &timer->list); + list_add_after(&priv->toutlist, &timer->list); timer->state = RT_TIMER_DELETE; /* Wake up the thread to process deleted timers */ - ret = nxsem_post(&s_toutsem); + ret = nxsem_post(&priv->toutsem); if (ret < 0) { tmrerr("ERROR: Failed to post sem ret=%d\n", ret); @@ -304,21 +320,22 @@ exit: * ****************************************************************************/ -static int rt_timer_thread(int argc, FAR char *argv[]) +static int rt_timer_thread(int argc, char *argv[]) { int ret; irqstate_t flags; struct rt_timer_s *timer; enum rt_timer_state_e raw_state; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; while (1) { /* Waiting for all timers to time out */ - ret = nxsem_wait(&s_toutsem); + ret = nxsem_wait(&priv->toutsem); if (ret) { - tmrerr("ERROR: Wait s_toutsem error=%d\n", ret); + tmrerr("ERROR: Wait toutsem error=%d\n", ret); assert(0); } @@ -326,11 +343,12 @@ static int rt_timer_thread(int argc, FAR char *argv[]) /* Process all the timers in list */ - while (!list_is_empty(&s_toutlist)) + while (!list_is_empty(&priv->toutlist)) { /* Get the first timer in the list */ - timer = container_of(s_toutlist.next, struct rt_timer_s, list); + timer = container_of(priv->toutlist.next, + struct rt_timer_s, list); /* Cache the raw state to decide how to deal with this timer */ @@ -400,17 +418,17 @@ static int rt_timer_isr(int irq, void *context, void *arg) uint64_t alarm; uint64_t counter; bool wake = false; - struct esp32c3_tim_dev_s *tim = s_esp32c3_tim_dev; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; /* Clear interrupt register status */ - ESP32C3_TIM_ACKINT(tim); + ESP32C3_TIM_ACKINT(priv->timer); flags = enter_critical_section(); /* Check if there is a timer running */ - if (!list_is_empty(&s_runlist)) + if (!list_is_empty(&priv->runlist)) { /** * When stop/delete timer, in the same time the hardware timer @@ -418,8 +436,9 @@ static int rt_timer_isr(int irq, void *context, void *arg) * from running list, so the 1st timer is not which triggers. */ - timer = container_of(s_runlist.next, struct rt_timer_s, list); - ESP32C3_TIM_GETCTR(tim, &counter); + timer = container_of(priv->runlist.next, struct rt_timer_s, list); + ESP32C3_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); if (timer->alarm <= counter) { /* Remove the first timer from the running list and add it to @@ -431,32 +450,33 @@ static int rt_timer_isr(int irq, void *context, void *arg) list_delete(&timer->list); timer->state = RT_TIMER_TIMEOUT; - list_add_after(&s_toutlist, &timer->list); + list_add_after(&priv->toutlist, &timer->list); wake = true; /* Check if there is a timer running */ - if (!list_is_empty(&s_runlist)) + if (!list_is_empty(&priv->runlist)) { /* Reset hardware timer alarm with next timer's alarm value */ - timer = container_of(s_runlist.next, struct rt_timer_s, list); + timer = container_of(priv->runlist.next, + struct rt_timer_s, list); alarm = timer->alarm; - ESP32C3_TIM_SETALRVL(tim, alarm); + ESP32C3_TIM_SETALRVL(priv->timer, USEC_TO_CYCLES(alarm)); } } /* If there is a timer in the list, the alarm should be enabled */ - ESP32C3_TIM_SETALRM(tim, true); + ESP32C3_TIM_SETALRM(priv->timer, true); } if (wake) { /* Wake up the thread to process timed-out timers */ - ret = nxsem_post(&s_toutsem); + ret = nxsem_post(&priv->toutsem); if (ret < 0) { tmrerr("ERROR: Failed to post sem ret=%d\n", ret); @@ -487,8 +507,8 @@ static int rt_timer_isr(int irq, void *context, void *arg) * ****************************************************************************/ -int rt_timer_create(FAR const struct rt_timer_args_s *args, - FAR struct rt_timer_s **timer_handle) +int rt_timer_create(const struct rt_timer_args_s *args, + struct rt_timer_s **timer_handle) { struct rt_timer_s *timer; @@ -526,7 +546,7 @@ int rt_timer_create(FAR const struct rt_timer_args_s *args, * ****************************************************************************/ -void rt_timer_start(FAR struct rt_timer_s *timer, +void rt_timer_start(struct rt_timer_s *timer, uint64_t timeout, bool repeat) { @@ -549,7 +569,7 @@ void rt_timer_start(FAR struct rt_timer_s *timer, * ****************************************************************************/ -void rt_timer_stop(FAR struct rt_timer_s *timer) +void rt_timer_stop(struct rt_timer_s *timer) { stop_rt_timer(timer); } @@ -568,7 +588,7 @@ void rt_timer_stop(FAR struct rt_timer_s *timer) * ****************************************************************************/ -void rt_timer_delete(FAR struct rt_timer_s *timer) +void rt_timer_delete(struct rt_timer_s *timer) { delete_rt_timer(timer); } @@ -577,7 +597,7 @@ void rt_timer_delete(FAR struct rt_timer_s *timer) * Name: rt_timer_time_us * * Description: - * Get time of the RT timer in microseconds. + * Get current counter value of the RT timer in microseconds. * * Input Parameters: * None @@ -590,9 +610,10 @@ void rt_timer_delete(FAR struct rt_timer_s *timer) uint64_t IRAM_ATTR rt_timer_time_us(void) { uint64_t counter; - struct esp32c3_tim_dev_s *tim = s_esp32c3_tim_dev; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; - ESP32C3_TIM_GETCTR(tim, &counter); + ESP32C3_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); return counter; } @@ -601,7 +622,7 @@ uint64_t IRAM_ATTR rt_timer_time_us(void) * Name: rt_timer_get_alarm * * Description: - * Get the timestamp when the next timeout is expected to occur. + * Get the remaining time to the next timeout. * * Input Parameters: * None @@ -615,13 +636,15 @@ uint64_t IRAM_ATTR rt_timer_get_alarm(void) { irqstate_t flags; uint64_t counter; - struct esp32c3_tim_dev_s *tim = s_esp32c3_tim_dev; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; uint64_t alarm_value = 0; flags = enter_critical_section(); - ESP32C3_TIM_GETCTR(tim, &counter); - ESP32C3_TIM_GETALRVL(tim, &alarm_value); + ESP32C3_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); + ESP32C3_TIM_GETALRVL(priv->timer, &alarm_value); + alarm_value = CYCLES_TO_USEC(alarm_value); if (alarm_value <= counter) { @@ -654,14 +677,15 @@ uint64_t IRAM_ATTR rt_timer_get_alarm(void) void IRAM_ATTR rt_timer_calibration(uint64_t time_us) { uint64_t counter; - struct esp32c3_tim_dev_s *tim = s_esp32c3_tim_dev; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; irqstate_t flags; flags = enter_critical_section(); - ESP32C3_TIM_GETCTR(tim, &counter); + ESP32C3_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); counter += time_us; - ESP32C3_TIM_SETCTR(tim, counter); - ESP32C3_TIM_RLD_NOW(tim); + ESP32C3_TIM_SETCTR(priv->timer, USEC_TO_CYCLES(counter)); + ESP32C3_TIM_RLD_NOW(priv->timer); leave_critical_section(flags); } @@ -683,16 +707,16 @@ int esp32c3_rt_timer_init(void) { int pid; irqstate_t flags; - struct esp32c3_tim_dev_s *tim; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; - tim = esp32c3_tim_init(ESP32C3_RT_TIMER); - if (!tim) + priv->timer = esp32c3_tim_init(ESP32C3_RT_TIMER); + if (priv->timer == NULL) { tmrerr("ERROR: Failed to initialize ESP32-C3 timer0\n"); return -EINVAL; } - nxsem_init(&s_toutsem, 0, 0); + nxsem_init(&priv->toutsem, 0, 0); pid = kthread_create(RT_TIMER_TASK_NAME, RT_TIMER_TASK_PRIORITY, @@ -702,33 +726,31 @@ int esp32c3_rt_timer_init(void) if (pid < 0) { tmrerr("ERROR: Failed to create RT timer task error=%d\n", pid); - esp32c3_tim_deinit(tim); + esp32c3_tim_deinit(priv->timer); return pid; } - list_initialize(&s_runlist); - list_initialize(&s_toutlist); + list_initialize(&priv->runlist); + list_initialize(&priv->toutlist); - s_esp32c3_tim_dev = tim; - s_pid = pid; + priv->pid = pid; flags = enter_critical_section(); /* ESP32-C3 hardware timer configuration: - * - 1 counter = 1us - * - Counter increase mode - * - Non-reload mode + * 1 count = 1/16 us + * Clear the counter. + * Set the ISR. + * Enable timeout interrupt. + * Start the counter. + * NOTE: No interrupt will be triggered + * until ESP32C3_TIM_SETALRM is set. */ - ESP32C3_TIM_SETPRE(tim, ESP32C3_TIMER_PRESCALER); - ESP32C3_TIM_SETMODE(tim, ESP32C3_TIM_MODE_UP); - ESP32C3_TIM_SETARLD(tim, false); - ESP32C3_TIM_CLEAR(tim); - - ESP32C3_TIM_SETISR(tim, rt_timer_isr, NULL); - ESP32C3_TIM_ENABLEINT(tim); - - ESP32C3_TIM_START(tim); + ESP32C3_TIM_CLEAR(priv->timer); + ESP32C3_TIM_SETISR(priv->timer, rt_timer_isr, NULL); + ESP32C3_TIM_ENABLEINT(priv->timer); + ESP32C3_TIM_START(priv->timer); leave_critical_section(flags); @@ -752,15 +774,23 @@ int esp32c3_rt_timer_init(void) void esp32c3_rt_timer_deinit(void) { irqstate_t flags; + struct esp32c3_rt_priv_s *priv = &g_rt_priv; flags = enter_critical_section(); - ESP32C3_TIM_STOP(s_esp32c3_tim_dev); - esp32c3_tim_deinit(s_esp32c3_tim_dev); - s_esp32c3_tim_dev = NULL; + ESP32C3_TIM_STOP(priv->timer); + ESP32C3_TIM_DISABLEINT(priv->timer); + ESP32C3_TIM_SETISR(priv->timer, NULL, NULL); + esp32c3_tim_deinit(priv->timer); + priv->timer = NULL; leave_critical_section(flags); - kthread_delete(s_pid); - nxsem_destroy(&s_toutsem); + if (priv->pid != -EINVAL) + { + kthread_delete(priv->pid); + priv->pid = -EINVAL; + } + + nxsem_destroy(&priv->toutsem); } diff --git a/arch/risc-v/src/esp32c3/esp32c3_rtc.c b/arch/risc-v/src/esp32c3/esp32c3_rtc.c index 9f975f42853..00dd9a4fcdb 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_rtc.c +++ b/arch/risc-v/src/esp32c3/esp32c3_rtc.c @@ -80,14 +80,6 @@ #define EXT_OSC_FLAG BIT(3) -/* Number of cycles to wait from the 32k XTAL oscillator to - * consider it running. Larger values increase startup delay. - * Smaller values may cause false positive detection - * (i.e. oscillator runs for a few cycles and then stops). - */ - -#define SLOW_CLK_CAL_CYCLES 1024 - #define RTC_FAST_CLK_FREQ_8M 8500000 /* With the default value of CK8M_DFREQ, @@ -369,7 +361,7 @@ struct alm_cbinfo_s { struct rt_timer_s *alarm_hdl; /* Timer id point to here */ volatile alm_callback_t ac_cb; /* Client callback function */ - volatile FAR void *ac_arg; /* Argument to pass with the callback function */ + volatile void *ac_arg; /* Argument to pass with the callback function */ uint64_t deadline_us; uint8_t index; }; @@ -436,7 +428,7 @@ static void IRAM_ATTR esp32c3_rtc_clk_cpu_freq_to_pll_mhz( int cpu_freq_mhz); #ifdef CONFIG_RTC_DRIVER -static void IRAM_ATTR esp32c3_rt_cb_handler(FAR void *arg); +static void IRAM_ATTR esp32c3_rt_cb_handler(void *arg); #endif /**************************************************************************** @@ -1347,11 +1339,11 @@ static void IRAM_ATTR esp32c3_rtc_clk_cpu_freq_to_pll_mhz( * ****************************************************************************/ -static void IRAM_ATTR esp32c3_rt_cb_handler(FAR void *arg) +static void IRAM_ATTR esp32c3_rt_cb_handler(void *arg) { - FAR struct alm_cbinfo_s *cbinfo = (struct alm_cbinfo_s *)arg; + struct alm_cbinfo_s *cbinfo = (struct alm_cbinfo_s *)arg; alm_callback_t cb; - FAR void *cb_arg; + void *cb_arg; int alminfo_id; DEBUGASSERT(cbinfo != NULL); @@ -1364,7 +1356,7 @@ static void IRAM_ATTR esp32c3_rt_cb_handler(FAR void *arg) /* Alarm callback */ cb = cbinfo->ac_cb; - cb_arg = (FAR void *)cbinfo->ac_arg; + cb_arg = (void *)cbinfo->ac_arg; cbinfo->ac_cb = NULL; cbinfo->ac_arg = NULL; cbinfo->deadline_us = 0; @@ -2363,7 +2355,7 @@ time_t up_rtc_time(void) * ****************************************************************************/ -int up_rtc_settime(FAR const struct timespec *ts) +int up_rtc_settime(const struct timespec *ts) { irqstate_t flags; uint64_t now_us; @@ -2458,7 +2450,7 @@ int up_rtc_initialize(void) ****************************************************************************/ #ifdef CONFIG_RTC_HIRES -int up_rtc_gettime(FAR struct timespec *tp) +int up_rtc_gettime(struct timespec *tp) { irqstate_t flags; uint64_t time_us; @@ -2501,10 +2493,10 @@ int up_rtc_gettime(FAR struct timespec *tp) * ****************************************************************************/ -int up_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) +int up_rtc_setalarm(struct alm_setalarm_s *alminfo) { struct rt_timer_args_s rt_timer_args; - FAR struct alm_cbinfo_s *cbinfo; + struct alm_cbinfo_s *cbinfo; irqstate_t flags; int ret = -EBUSY; int id; @@ -2576,7 +2568,7 @@ int up_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) int up_rtc_cancelalarm(enum alm_id_e alarmid) { - FAR struct alm_cbinfo_s *cbinfo; + struct alm_cbinfo_s *cbinfo; irqstate_t flags; int ret = -ENODATA; @@ -2623,10 +2615,10 @@ int up_rtc_cancelalarm(enum alm_id_e alarmid) * ****************************************************************************/ -int up_rtc_rdalarm(FAR struct timespec *tp, uint32_t alarmid) +int up_rtc_rdalarm(struct timespec *tp, uint32_t alarmid) { irqstate_t flags; - FAR struct alm_cbinfo_s *cbinfo; + struct alm_cbinfo_s *cbinfo; DEBUGASSERT(tp != NULL); DEBUGASSERT((RTC_ALARM0 <= alarmid) && (alarmid < RTC_ALARM_LAST)); diff --git a/arch/risc-v/src/esp32c3/esp32c3_rtc.h b/arch/risc-v/src/esp32c3/esp32c3_rtc.h index 95a8feb62e5..6b02cb3f4fb 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_rtc.h +++ b/arch/risc-v/src/esp32c3/esp32c3_rtc.h @@ -50,6 +50,14 @@ extern "C" * Pre-processor Definitions ****************************************************************************/ +/* Number of cycles to wait from the 32k XTAL oscillator to + * consider it running. Larger values increase startup delay. + * Smaller values may cause false positive detection + * (i.e. oscillator runs for a few cycles and then stops). + */ + +#define SLOW_CLK_CAL_CYCLES 1024 + /* Cycles for RTC Timer clock source (internal oscillator) calibrate */ #define RTC_CLK_SRC_CAL_CYCLES (10) @@ -144,7 +152,7 @@ struct esp32c3_cpu_freq_config_s /* The form of an alarm callback */ -typedef CODE void (*alm_callback_t)(FAR void *arg, unsigned int alarmid); +typedef void (*alm_callback_t)(void *arg, unsigned int alarmid); enum alm_id_e { @@ -160,7 +168,7 @@ struct alm_setalarm_s int as_id; /* enum alm_id_e */ struct timespec as_time; /* Alarm expiration time */ alm_callback_t as_cb; /* Callback (if non-NULL) */ - FAR void *as_arg; /* Argument for callback */ + void *as_arg; /* Argument for callback */ }; #endif /* CONFIG_RTC_ALARM */ @@ -543,7 +551,7 @@ time_t up_rtc_time(void); * ****************************************************************************/ -int up_rtc_settime(FAR const struct timespec *ts); +int up_rtc_settime(const struct timespec *ts); /**************************************************************************** * Name: up_rtc_initialize @@ -579,7 +587,7 @@ int up_rtc_initialize(void); ****************************************************************************/ #ifdef CONFIG_RTC_HIRES -int up_rtc_gettime(FAR struct timespec *tp); +int up_rtc_gettime(struct timespec *tp); #endif #ifdef CONFIG_RTC_ALARM @@ -598,7 +606,7 @@ int up_rtc_gettime(FAR struct timespec *tp); * ****************************************************************************/ -int up_rtc_setalarm(FAR struct alm_setalarm_s *alminfo); +int up_rtc_setalarm(struct alm_setalarm_s *alminfo); /**************************************************************************** * Name: up_rtc_cancelalarm @@ -631,7 +639,7 @@ int up_rtc_cancelalarm(enum alm_id_e alarmid); * ****************************************************************************/ -int up_rtc_rdalarm(FAR struct timespec *tp, uint32_t alarmid); +int up_rtc_rdalarm(struct timespec *tp, uint32_t alarmid); #endif /* CONFIG_RTC_ALARM */ diff --git a/arch/risc-v/src/esp32c3/esp32c3_rtc_lowerhalf.c b/arch/risc-v/src/esp32c3/esp32c3_rtc_lowerhalf.c index 0ba283d6623..b31a6ab4ddf 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_rtc_lowerhalf.c +++ b/arch/risc-v/src/esp32c3/esp32c3_rtc_lowerhalf.c @@ -46,7 +46,7 @@ struct esp32c3_cbinfo_s { volatile rtc_alarm_callback_t cb; /* Callback when the alarm expires */ - volatile FAR void *priv; /* Private argurment to accompany callback */ + volatile void *priv; /* Private argurment to accompany callback */ }; #endif @@ -60,7 +60,7 @@ struct esp32c3_lowerhalf_s * operations vtable (which may lie in FLASH or ROM) */ - FAR const struct rtc_ops_s *ops; + const struct rtc_ops_s *ops; #ifdef CONFIG_RTC_ALARM /* Alarm callback information */ @@ -74,22 +74,22 @@ struct esp32c3_lowerhalf_s /* Prototypes for static methods in struct rtc_ops_s */ -static int rtc_lh_rdtime(FAR struct rtc_lowerhalf_s *lower, - FAR struct rtc_time *rtctime); -static int rtc_lh_settime(FAR struct rtc_lowerhalf_s *lower, - FAR const struct rtc_time *rtctime); -static bool rtc_lh_havesettime(FAR struct rtc_lowerhalf_s *lower); +static int rtc_lh_rdtime(struct rtc_lowerhalf_s *lower, + struct rtc_time *rtctime); +static int rtc_lh_settime(struct rtc_lowerhalf_s *lower, + const struct rtc_time *rtctime); +static bool rtc_lh_havesettime(struct rtc_lowerhalf_s *lower); #ifdef CONFIG_RTC_ALARM -static void rtc_lh_alarm_callback(FAR void *arg, unsigned int alarmid); -static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setalarm_s *alarminfo); -static int rtc_lh_setrelative(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setrelative_s *alarminfo); -static int rtc_lh_cancelalarm(FAR struct rtc_lowerhalf_s *lower, +static void rtc_lh_alarm_callback(void *arg, unsigned int alarmid); +static int rtc_lh_setalarm(struct rtc_lowerhalf_s *lower, + const struct lower_setalarm_s *alarminfo); +static int rtc_lh_setrelative(struct rtc_lowerhalf_s *lower, + const struct lower_setrelative_s *alarminfo); +static int rtc_lh_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid); -static int rtc_lh_rdalarm(FAR struct rtc_lowerhalf_s *lower, - FAR struct lower_rdalarm_s *alarminfo); +static int rtc_lh_rdalarm(struct rtc_lowerhalf_s *lower, + struct lower_rdalarm_s *alarminfo); #endif /**************************************************************************** @@ -145,12 +145,12 @@ static struct esp32c3_lowerhalf_s g_rtc_lowerhalf = ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static void rtc_lh_alarm_callback(FAR void *arg, unsigned int alarmid) +static void rtc_lh_alarm_callback(void *arg, unsigned int alarmid) { - FAR struct esp32c3_lowerhalf_s *lower; - FAR struct esp32c3_cbinfo_s *cbinfo; + struct esp32c3_lowerhalf_s *lower; + struct esp32c3_cbinfo_s *cbinfo; rtc_alarm_callback_t cb; - FAR void *priv; + void *priv; DEBUGASSERT((RTC_ALARM0 <= alarmid) && (alarmid < RTC_ALARM_LAST)); @@ -162,7 +162,7 @@ static void rtc_lh_alarm_callback(FAR void *arg, unsigned int alarmid) */ cb = (rtc_alarm_callback_t)cbinfo->cb; - priv = (FAR void *)cbinfo->priv; + priv = (void *)cbinfo->priv; cbinfo->cb = NULL; cbinfo->priv = NULL; @@ -192,11 +192,11 @@ static void rtc_lh_alarm_callback(FAR void *arg, unsigned int alarmid) * ****************************************************************************/ -static int rtc_lh_rdtime(FAR struct rtc_lowerhalf_s *lower, - FAR struct rtc_time *rtctime) +static int rtc_lh_rdtime(struct rtc_lowerhalf_s *lower, + struct rtc_time *rtctime) { #if defined(CONFIG_RTC_HIRES) - FAR struct timespec ts; + struct timespec ts; int ret; /* Get the higher resolution time */ @@ -212,7 +212,7 @@ static int rtc_lh_rdtime(FAR struct rtc_lowerhalf_s *lower, * compatible. */ - if (!gmtime_r(&ts.tv_sec, (FAR struct tm *)rtctime)) + if (!gmtime_r(&ts.tv_sec, (struct tm *)rtctime)) { ret = -get_errno(); goto errout; @@ -233,7 +233,7 @@ errout: /* Convert the one second epoch time to a struct tm */ - if (gmtime_r(&timer, (FAR struct tm *)rtctime) == 0) + if (gmtime_r(&timer, (struct tm *)rtctime) == 0) { int errcode = get_errno(); DEBUGASSERT(errcode > 0); @@ -262,8 +262,8 @@ errout: * ****************************************************************************/ -static int rtc_lh_settime(FAR struct rtc_lowerhalf_s *lower, - FAR const struct rtc_time *rtctime) +static int rtc_lh_settime(struct rtc_lowerhalf_s *lower, + const struct rtc_time *rtctime) { struct timespec ts; @@ -271,7 +271,7 @@ static int rtc_lh_settime(FAR struct rtc_lowerhalf_s *lower, * rtc_time is cast compatible with struct tm. */ - ts.tv_sec = mktime((FAR struct tm *)rtctime); + ts.tv_sec = mktime((struct tm *)rtctime); ts.tv_nsec = 0; /* Now set the time (with a accuracy of seconds) */ @@ -293,7 +293,7 @@ static int rtc_lh_settime(FAR struct rtc_lowerhalf_s *lower, * ****************************************************************************/ -static bool rtc_lh_havesettime(FAR struct rtc_lowerhalf_s *lower) +static bool rtc_lh_havesettime(struct rtc_lowerhalf_s *lower) { if (esp32c3_rtc_get_boot_time() == 0) { @@ -321,11 +321,11 @@ static bool rtc_lh_havesettime(FAR struct rtc_lowerhalf_s *lower) ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setalarm_s *alarminfo) +static int rtc_lh_setalarm(struct rtc_lowerhalf_s *lower, + const struct lower_setalarm_s *alarminfo) { - FAR struct esp32c3_lowerhalf_s *priv; - FAR struct esp32c3_cbinfo_s *cbinfo; + struct esp32c3_lowerhalf_s *priv; + struct esp32c3_cbinfo_s *cbinfo; struct alm_setalarm_s lowerinfo; int ret; @@ -333,7 +333,7 @@ static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, DEBUGASSERT((RTC_ALARM0 <= alarminfo->id) && (alarminfo->id < RTC_ALARM_LAST)); - priv = (FAR struct esp32c3_lowerhalf_s *)lower; + priv = (struct esp32c3_lowerhalf_s *)lower; /* Remember the callback information */ @@ -349,7 +349,7 @@ static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, /* Convert the RTC time to a timespec (1 second accuracy) */ - lowerinfo.as_time.tv_sec = mktime((FAR struct tm *)&alarminfo->time); + lowerinfo.as_time.tv_sec = mktime((struct tm *)&alarminfo->time); lowerinfo.as_time.tv_nsec = 0; /* And set the alarm */ @@ -383,8 +383,8 @@ static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int rtc_lh_setrelative(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setrelative_s *alarminfo) +static int rtc_lh_setrelative(struct rtc_lowerhalf_s *lower, + const struct lower_setrelative_s *alarminfo) { struct lower_setalarm_s setalarm; time_t seconds; @@ -400,7 +400,7 @@ static int rtc_lh_setrelative(FAR struct rtc_lowerhalf_s *lower, flags = spin_lock_irqsave(NULL); seconds = alarminfo->reltime; - gmtime_r(&seconds, (FAR struct tm *)&setalarm.time); + gmtime_r(&seconds, (struct tm *)&setalarm.time); /* The set the alarm using this absolute time */ @@ -434,15 +434,15 @@ static int rtc_lh_setrelative(FAR struct rtc_lowerhalf_s *lower, ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int rtc_lh_cancelalarm(FAR struct rtc_lowerhalf_s *lower, int alarmid) +static int rtc_lh_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid) { - FAR struct esp32c3_lowerhalf_s *priv; - FAR struct esp32c3_cbinfo_s *cbinfo; + struct esp32c3_lowerhalf_s *priv; + struct esp32c3_cbinfo_s *cbinfo; DEBUGASSERT(lower != NULL); DEBUGASSERT((RTC_ALARM0 <= alarmid) && (alarmid < RTC_ALARM_LAST)); - priv = (FAR struct esp32c3_lowerhalf_s *)lower; + priv = (struct esp32c3_lowerhalf_s *)lower; /* Nullify callback information to reduce window for race conditions */ @@ -473,8 +473,8 @@ static int rtc_lh_cancelalarm(FAR struct rtc_lowerhalf_s *lower, int alarmid) ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int rtc_lh_rdalarm(FAR struct rtc_lowerhalf_s *lower, - FAR struct lower_rdalarm_s *alarminfo) +static int rtc_lh_rdalarm(struct rtc_lowerhalf_s *lower, + struct lower_rdalarm_s *alarminfo) { struct timespec ts; int ret; @@ -487,8 +487,8 @@ static int rtc_lh_rdalarm(FAR struct rtc_lowerhalf_s *lower, flags = spin_lock_irqsave(NULL); ret = up_rtc_rdalarm(&ts, alarminfo->id); - localtime_r((FAR const time_t *)&ts.tv_sec, - (FAR struct tm *)alarminfo->time); + localtime_r((const time_t *)&ts.tv_sec, + (struct tm *)alarminfo->time); spin_unlock_irqrestore(NULL, flags); @@ -515,9 +515,9 @@ static int rtc_lh_rdalarm(FAR struct rtc_lowerhalf_s *lower, * ****************************************************************************/ -FAR struct rtc_lowerhalf_s *esp32c3_rtc_lowerhalf(void) +struct rtc_lowerhalf_s *esp32c3_rtc_lowerhalf(void) { - return (FAR struct rtc_lowerhalf_s *)&g_rtc_lowerhalf; + return (struct rtc_lowerhalf_s *)&g_rtc_lowerhalf; } /**************************************************************************** @@ -539,7 +539,7 @@ FAR struct rtc_lowerhalf_s *esp32c3_rtc_lowerhalf(void) int esp32c3_rtc_driverinit(void) { int ret; - FAR struct rtc_lowerhalf_s *lower; + struct rtc_lowerhalf_s *lower; /* Instantiate the ESP32-C3 lower-half RTC driver */ diff --git a/arch/risc-v/src/esp32c3/esp32c3_rtcheap.c b/arch/risc-v/src/esp32c3/esp32c3_rtcheap.c index c067578dc22..e9b750ee478 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_rtcheap.c +++ b/arch/risc-v/src/esp32c3/esp32c3_rtcheap.c @@ -34,7 +34,7 @@ * Private Data ****************************************************************************/ -static FAR struct mm_heap_s *g_rtcheap; +static struct mm_heap_s *g_rtcheap; /**************************************************************************** * Public Functions @@ -60,7 +60,7 @@ void esp32c3_rtcheap_initialize(void) extern uint8_t *_srtcheap; extern uint8_t *_ertcheap; - start = (FAR void *)&_srtcheap; + start = (void *)&_srtcheap; size = (size_t)((uintptr_t)&_ertcheap - (uintptr_t)&_srtcheap); g_rtcheap = mm_initialize("rtcheap", start, size); } @@ -126,7 +126,7 @@ void *esp32c3_rtcheap_zalloc(size_t size) * ****************************************************************************/ -void esp32c3_rtcheap_free(FAR void *mem) +void esp32c3_rtcheap_free(void *mem) { mm_free(g_rtcheap, mem); } @@ -163,7 +163,7 @@ void *esp32c3_rtcheap_memalign(size_t alignment, size_t size) * ****************************************************************************/ -bool esp32c3_rtcheap_heapmember(FAR void *mem) +bool esp32c3_rtcheap_heapmember(void *mem) { return mm_heapmember(g_rtcheap, mem); } @@ -177,7 +177,7 @@ bool esp32c3_rtcheap_heapmember(FAR void *mem) * ****************************************************************************/ -int esp32c3_rtcheap_mallinfo(FAR struct mallinfo *info) +int esp32c3_rtcheap_mallinfo(struct mallinfo *info) { return mm_mallinfo(g_rtcheap, info); } diff --git a/arch/risc-v/src/esp32c3/esp32c3_rtcheap.h b/arch/risc-v/src/esp32c3/esp32c3_rtcheap.h index b0d4b34f5bf..565c5291386 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_rtcheap.h +++ b/arch/risc-v/src/esp32c3/esp32c3_rtcheap.h @@ -94,7 +94,7 @@ void *esp32c3_rtcheap_zalloc(size_t size); * ****************************************************************************/ -void esp32c3_rtcheap_free(FAR void *mem); +void esp32c3_rtcheap_free(void *mem); /**************************************************************************** * Name: esp32c3_rtcheap_memalign @@ -125,7 +125,7 @@ void *esp32c3_rtcheap_memalign(size_t alignment, size_t size); * ****************************************************************************/ -bool esp32c3_rtcheap_heapmember(FAR void *mem); +bool esp32c3_rtcheap_heapmember(void *mem); /**************************************************************************** * Name: esp32c3_rtcheap_mallinfo @@ -136,7 +136,7 @@ bool esp32c3_rtcheap_heapmember(FAR void *mem); * ****************************************************************************/ -int esp32c3_rtcheap_mallinfo(FAR struct mallinfo *info); +int esp32c3_rtcheap_mallinfo(struct mallinfo *info); #undef EXTERN #ifdef __cplusplus diff --git a/arch/risc-v/src/esp32c3/esp32c3_serial.c b/arch/risc-v/src/esp32c3/esp32c3_serial.c index 08f3d68a0fe..49a41fd7a08 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_serial.c +++ b/arch/risc-v/src/esp32c3/esp32c3_serial.c @@ -235,7 +235,7 @@ static uart_dev_t g_uart1_dev = * ****************************************************************************/ -static int uart_handler(int irq, FAR void *context, FAR void *arg) +static int uart_handler(int irq, void *context, void *arg) { struct uart_dev_s *dev = (struct uart_dev_s *)arg; struct esp32c3_uart_s *priv = dev->priv; diff --git a/arch/risc-v/src/esp32c3/esp32c3_spi.c b/arch/risc-v/src/esp32c3/esp32c3_spi.c index ab5f54cc69b..99b7840f6df 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_spi.c +++ b/arch/risc-v/src/esp32c3/esp32c3_spi.c @@ -185,53 +185,53 @@ struct esp32c3_spi_priv_s * Private Function Prototypes ****************************************************************************/ -static int esp32c3_spi_lock(FAR struct spi_dev_s *dev, bool lock); +static int esp32c3_spi_lock(struct spi_dev_s *dev, bool lock); #ifndef CONFIG_ESP32C3_SPI_UDCS -static void esp32c3_spi_select(FAR struct spi_dev_s *dev, +static void esp32c3_spi_select(struct spi_dev_s *dev, uint32_t devid, bool selected); #endif -static uint32_t esp32c3_spi_setfrequency(FAR struct spi_dev_s *dev, +static uint32_t esp32c3_spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency); -static void esp32c3_spi_setmode(FAR struct spi_dev_s *dev, +static void esp32c3_spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode); -static void esp32c3_spi_setbits(FAR struct spi_dev_s *dev, int nbits); +static void esp32c3_spi_setbits(struct spi_dev_s *dev, int nbits); #ifdef CONFIG_SPI_HWFEATURES -static int esp32c3_spi_hwfeatures(FAR struct spi_dev_s *dev, +static int esp32c3_spi_hwfeatures(struct spi_dev_s *dev, spi_hwfeatures_t features); #endif -static uint32_t esp32c3_spi_send(FAR struct spi_dev_s *dev, uint32_t wd); -static void esp32c3_spi_exchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, - FAR void *rxbuffer, size_t nwords); +static uint32_t esp32c3_spi_send(struct spi_dev_s *dev, uint32_t wd); +static void esp32c3_spi_exchange(struct spi_dev_s *dev, + const void *txbuffer, + void *rxbuffer, size_t nwords); #ifdef CONFIG_ESP32C3_SPI2_DMA -static int esp32c3_spi_interrupt(int irq, void *context, FAR void *arg); -static int esp32c3_spi_sem_waitdone(FAR struct esp32c3_spi_priv_s *priv); -static void esp32c3_spi_dma_exchange(FAR struct esp32c3_spi_priv_s *priv, - FAR const void *txbuffer, - FAR void *rxbuffer, +static int esp32c3_spi_interrupt(int irq, void *context, void *arg); +static int esp32c3_spi_sem_waitdone(struct esp32c3_spi_priv_s *priv); +static void esp32c3_spi_dma_exchange(struct esp32c3_spi_priv_s *priv, + const void *txbuffer, + void *rxbuffer, uint32_t nwords); #else -static void esp32c3_spi_poll_exchange(FAR struct esp32c3_spi_priv_s *priv, - FAR const void *txbuffer, - FAR void *rxbuffer, +static void esp32c3_spi_poll_exchange(struct esp32c3_spi_priv_s *priv, + const void *txbuffer, + void *rxbuffer, size_t nwords); #endif #ifndef CONFIG_SPI_EXCHANGE -static void esp32c3_spi_sndblock(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, +static void esp32c3_spi_sndblock(struct spi_dev_s *dev, + const void *txbuffer, size_t nwords); -static void esp32c3_spi_recvblock(FAR struct spi_dev_s *dev, - FAR void *rxbuffer, +static void esp32c3_spi_recvblock(struct spi_dev_s *dev, + void *rxbuffer, size_t nwords); #endif #ifdef CONFIG_SPI_TRIGGER -static int esp32c3_spi_trigger(FAR struct spi_dev_s *dev); +static int esp32c3_spi_trigger(struct spi_dev_s *dev); #endif #ifdef CONFIG_ESP32C3_SPI2_DMA -static void esp32c3_spi_dma_init(FAR struct spi_dev_s *dev); +static void esp32c3_spi_dma_init(struct spi_dev_s *dev); #endif -static void esp32c3_spi_init(FAR struct spi_dev_s *dev); -static void esp32c3_spi_deinit(FAR struct spi_dev_s *dev); +static void esp32c3_spi_init(struct spi_dev_s *dev); +static void esp32c3_spi_deinit(struct spi_dev_s *dev); /**************************************************************************** * Private Data @@ -391,10 +391,10 @@ static inline void esp32c3_spi_clr_regbits(uint32_t addr, uint32_t bits) * ****************************************************************************/ -static int esp32c3_spi_lock(FAR struct spi_dev_s *dev, bool lock) +static int esp32c3_spi_lock(struct spi_dev_s *dev, bool lock) { int ret; - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; if (lock) { @@ -423,7 +423,7 @@ static int esp32c3_spi_lock(FAR struct spi_dev_s *dev, bool lock) ****************************************************************************/ #ifdef CONFIG_ESP32C3_SPI2_DMA -static int esp32c3_spi_sem_waitdone(FAR struct esp32c3_spi_priv_s *priv) +static int esp32c3_spi_sem_waitdone(struct esp32c3_spi_priv_s *priv) { int ret; struct timespec abstime; @@ -463,11 +463,11 @@ static int esp32c3_spi_sem_waitdone(FAR struct esp32c3_spi_priv_s *priv) ****************************************************************************/ #ifndef CONFIG_ESP32C3_SPI_UDCS -static void esp32c3_spi_select(FAR struct spi_dev_s *dev, +static void esp32c3_spi_select(struct spi_dev_s *dev, uint32_t devid, bool selected) { #if SPI_HAVE_SWCS - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; bool value = selected ? false : true; esp32c3_gpiowrite(priv->config->cs_pin, value); @@ -493,11 +493,11 @@ static void esp32c3_spi_select(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static uint32_t esp32c3_spi_setfrequency(FAR struct spi_dev_s *dev, +static uint32_t esp32c3_spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency) { uint32_t reg_val; - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; const uint32_t duty_cycle = 128; if (priv->frequency == frequency) @@ -615,10 +615,10 @@ static uint32_t esp32c3_spi_setfrequency(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void esp32c3_spi_setmode(FAR struct spi_dev_s *dev, +static void esp32c3_spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode) { - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; spiinfo("mode=%d\n", mode); @@ -684,9 +684,9 @@ static void esp32c3_spi_setmode(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void esp32c3_spi_setbits(FAR struct spi_dev_s *dev, int nbits) +static void esp32c3_spi_setbits(struct spi_dev_s *dev, int nbits) { - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; spiinfo("nbits=%d\n", nbits); @@ -710,7 +710,7 @@ static void esp32c3_spi_setbits(FAR struct spi_dev_s *dev, int nbits) ****************************************************************************/ #ifdef CONFIG_SPI_HWFEATURES -static int esp32c3_spi_hwfeatures(FAR struct spi_dev_s *dev, +static int esp32c3_spi_hwfeatures(struct spi_dev_s *dev, spi_hwfeatures_t features) { /* Other H/W features are not supported */ @@ -741,9 +741,9 @@ static int esp32c3_spi_hwfeatures(FAR struct spi_dev_s *dev, ****************************************************************************/ #ifdef CONFIG_ESP32C3_SPI2_DMA -static void esp32c3_spi_dma_exchange(FAR struct esp32c3_spi_priv_s *priv, - FAR const void *txbuffer, - FAR void *rxbuffer, +static void esp32c3_spi_dma_exchange(struct esp32c3_spi_priv_s *priv, + const void *txbuffer, + void *rxbuffer, uint32_t nwords) { const uint32_t total = nwords * (priv->nbits / 8); @@ -844,7 +844,7 @@ static void esp32c3_spi_dma_exchange(FAR struct esp32c3_spi_priv_s *priv, * ****************************************************************************/ -static uint32_t esp32c3_spi_poll_send(FAR struct esp32c3_spi_priv_s *priv, +static uint32_t esp32c3_spi_poll_send(struct esp32c3_spi_priv_s *priv, uint32_t wd) { uint32_t val; @@ -894,9 +894,9 @@ static uint32_t esp32c3_spi_poll_send(FAR struct esp32c3_spi_priv_s *priv, * ****************************************************************************/ -static uint32_t esp32c3_spi_send(FAR struct spi_dev_s *dev, uint32_t wd) +static uint32_t esp32c3_spi_send(struct spi_dev_s *dev, uint32_t wd) { - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; return esp32c3_spi_poll_send(priv, wd); } @@ -922,9 +922,9 @@ static uint32_t esp32c3_spi_send(FAR struct spi_dev_s *dev, uint32_t wd) * ****************************************************************************/ -static void esp32c3_spi_poll_exchange(FAR struct esp32c3_spi_priv_s *priv, - FAR const void *txbuffer, - FAR void *rxbuffer, +static void esp32c3_spi_poll_exchange(struct esp32c3_spi_priv_s *priv, + const void *txbuffer, + void *rxbuffer, size_t nwords) { const uint32_t total_bytes = nwords * (priv->nbits / 8); @@ -1051,12 +1051,12 @@ static void esp32c3_spi_poll_exchange(FAR struct esp32c3_spi_priv_s *priv, * ****************************************************************************/ -static void esp32c3_spi_exchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, - FAR void *rxbuffer, +static void esp32c3_spi_exchange(struct spi_dev_s *dev, + const void *txbuffer, + void *rxbuffer, size_t nwords) { - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; #ifdef CONFIG_ESP32C3_SPI2_DMA size_t thld = CONFIG_ESP32C3_SPI2_DMATHRESHOLD; @@ -1094,8 +1094,8 @@ static void esp32c3_spi_exchange(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void esp32c3_spi_sndblock(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, +static void esp32c3_spi_sndblock(struct spi_dev_s *dev, + const void *txbuffer, size_t nwords) { spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords); @@ -1123,8 +1123,8 @@ static void esp32c3_spi_sndblock(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void esp32c3_spi_recvblock(FAR struct spi_dev_s *dev, - FAR void *rxbuffer, +static void esp32c3_spi_recvblock(struct spi_dev_s *dev, + void *rxbuffer, size_t nwords) { spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords); @@ -1150,7 +1150,7 @@ static void esp32c3_spi_recvblock(FAR struct spi_dev_s *dev, ****************************************************************************/ #ifdef CONFIG_SPI_TRIGGER -static int esp32c3_spi_trigger(FAR struct spi_dev_s *dev) +static int esp32c3_spi_trigger(struct spi_dev_s *dev) { return -ENOSYS; } @@ -1171,9 +1171,9 @@ static int esp32c3_spi_trigger(FAR struct spi_dev_s *dev) ****************************************************************************/ #ifdef CONFIG_ESP32C3_SPI2_DMA -void esp32c3_spi_dma_init(FAR struct spi_dev_s *dev) +void esp32c3_spi_dma_init(struct spi_dev_s *dev) { - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; /* Enable GDMA clock for the SPI peripheral */ @@ -1219,9 +1219,9 @@ void esp32c3_spi_dma_init(FAR struct spi_dev_s *dev) * ****************************************************************************/ -static void esp32c3_spi_init(FAR struct spi_dev_s *dev) +static void esp32c3_spi_init(struct spi_dev_s *dev) { - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; const struct esp32c3_spi_config_s *config = priv->config; uint32_t regval; @@ -1312,9 +1312,9 @@ static void esp32c3_spi_init(FAR struct spi_dev_s *dev) * ****************************************************************************/ -static void esp32c3_spi_deinit(FAR struct spi_dev_s *dev) +static void esp32c3_spi_deinit(struct spi_dev_s *dev) { - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; #ifdef CONFIG_ESP32C3_SPI2_DMA modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, priv->config->dma_clk_bit, 0); @@ -1346,9 +1346,9 @@ static void esp32c3_spi_deinit(FAR struct spi_dev_s *dev) ****************************************************************************/ #ifdef CONFIG_ESP32C3_SPI2_DMA -static int esp32c3_spi_interrupt(int irq, void *context, FAR void *arg) +static int esp32c3_spi_interrupt(int irq, void *context, void *arg) { - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)arg; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)arg; esp32c3_spi_clr_regbits(SPI_DMA_INT_RAW_REG, SPI_TRANS_DONE_INT_RAW_M); nxsem_post(&priv->sem_isr); @@ -1371,10 +1371,10 @@ static int esp32c3_spi_interrupt(int irq, void *context, FAR void *arg) * ****************************************************************************/ -FAR struct spi_dev_s *esp32c3_spibus_initialize(int port) +struct spi_dev_s *esp32c3_spibus_initialize(int port) { - FAR struct spi_dev_s *spi_dev; - FAR struct esp32c3_spi_priv_s *priv; + struct spi_dev_s *spi_dev; + struct esp32c3_spi_priv_s *priv; irqstate_t flags; switch (port) @@ -1388,7 +1388,7 @@ FAR struct spi_dev_s *esp32c3_spibus_initialize(int port) return NULL; } - spi_dev = (FAR struct spi_dev_s *)priv; + spi_dev = (struct spi_dev_s *)priv; flags = enter_critical_section(); @@ -1458,10 +1458,10 @@ FAR struct spi_dev_s *esp32c3_spibus_initialize(int port) * ****************************************************************************/ -int esp32c3_spibus_uninitialize(FAR struct spi_dev_s *dev) +int esp32c3_spibus_uninitialize(struct spi_dev_s *dev) { irqstate_t flags; - FAR struct esp32c3_spi_priv_s *priv = (FAR struct esp32c3_spi_priv_s *)dev; + struct esp32c3_spi_priv_s *priv = (struct esp32c3_spi_priv_s *)dev; DEBUGASSERT(dev); diff --git a/arch/risc-v/src/esp32c3/esp32c3_spi.h b/arch/risc-v/src/esp32c3/esp32c3_spi.h index 7876fbb714e..6f983c33710 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_spi.h +++ b/arch/risc-v/src/esp32c3/esp32c3_spi.h @@ -68,7 +68,7 @@ extern "C" * ****************************************************************************/ -FAR struct spi_dev_s *esp32c3_spibus_initialize(int port); +struct spi_dev_s *esp32c3_spibus_initialize(int port); /**************************************************************************** * Name: esp32c3_spi[0|1]_select and esp32c3_spi[0|1]_status @@ -102,10 +102,10 @@ FAR struct spi_dev_s *esp32c3_spibus_initialize(int port); ****************************************************************************/ #ifdef CONFIG_ESP32C3_SPI2 -void esp32c3_spi2_select(FAR struct spi_dev_s *dev, uint32_t devid, +void esp32c3_spi2_select(struct spi_dev_s *dev, uint32_t devid, bool selected); -uint8_t esp32c3_spi2_status(FAR struct spi_dev_s *dev, uint32_t devid); -int esp32c3_spi2_cmddata(FAR struct spi_dev_s *dev, +uint8_t esp32c3_spi2_status(struct spi_dev_s *dev, uint32_t devid); +int esp32c3_spi2_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd); #endif @@ -124,7 +124,7 @@ int esp32c3_spi2_cmddata(FAR struct spi_dev_s *dev, * ****************************************************************************/ -int esp32c3_spibus_uninitialize(FAR struct spi_dev_s *dev); +int esp32c3_spibus_uninitialize(struct spi_dev_s *dev); /**************************************************************************** * Name: esp32c3_spislave_ctrlr_initialize @@ -141,7 +141,7 @@ int esp32c3_spibus_uninitialize(FAR struct spi_dev_s *dev); * ****************************************************************************/ -FAR struct spi_slave_ctrlr_s *esp32c3_spislave_ctrlr_initialize(int port); +struct spi_slave_ctrlr_s *esp32c3_spislave_ctrlr_initialize(int port); /**************************************************************************** * Name: esp32c3_spislave_ctrlr_uninitialize @@ -157,7 +157,7 @@ FAR struct spi_slave_ctrlr_s *esp32c3_spislave_ctrlr_initialize(int port); * ****************************************************************************/ -int esp32c3_spislave_ctrlr_uninitialize(FAR struct spi_slave_ctrlr_s *ctrlr); +int esp32c3_spislave_ctrlr_uninitialize(struct spi_slave_ctrlr_s *ctrlr); #endif /* CONFIG_ESP32C3_SPI */ diff --git a/arch/risc-v/src/esp32c3/esp32c3_spi_slave.c b/arch/risc-v/src/esp32c3/esp32c3_spi_slave.c index 0a29072ba56..2da911be5b4 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_spi_slave.c +++ b/arch/risc-v/src/esp32c3/esp32c3_spi_slave.c @@ -189,42 +189,42 @@ struct spislave_priv_s /* SPI Slave controller interrupt handlers */ -static int spislave_cs_interrupt(int irq, void *context, FAR void *arg); -static int spislave_periph_interrupt(int irq, void *context, FAR void *arg); +static int spislave_cs_interrupt(int irq, void *context, void *arg); +static int spislave_periph_interrupt(int irq, void *context, void *arg); /* SPI Slave controller internal functions */ -static void spislave_setmode(FAR struct spi_slave_ctrlr_s *ctrlr, +static void spislave_setmode(struct spi_slave_ctrlr_s *ctrlr, enum spi_slave_mode_e mode); -static void spislave_setbits(FAR struct spi_slave_ctrlr_s *ctrlr, int nbits); -static void spislave_store_result(FAR struct spislave_priv_s *priv, +static void spislave_setbits(struct spi_slave_ctrlr_s *ctrlr, int nbits); +static void spislave_store_result(struct spislave_priv_s *priv, uint32_t recv_bytes); -static void spislave_prepare_next_rx(FAR struct spislave_priv_s *priv); -static void spislave_evict_sent_data(FAR struct spislave_priv_s *priv, +static void spislave_prepare_next_rx(struct spislave_priv_s *priv); +static void spislave_evict_sent_data(struct spislave_priv_s *priv, uint32_t sent_bytes); #ifdef CONFIG_ESP32C3_SPI2_DMA -static void spislave_setup_rx_dma(FAR struct spislave_priv_s *priv); -static void spislave_setup_tx_dma(FAR struct spislave_priv_s *priv); -static void spislave_prepare_next_tx(FAR struct spislave_priv_s *priv); +static void spislave_setup_rx_dma(struct spislave_priv_s *priv); +static void spislave_setup_tx_dma(struct spislave_priv_s *priv); +static void spislave_prepare_next_tx(struct spislave_priv_s *priv); #else -static void spislave_write_tx_buffer(FAR struct spislave_priv_s *priv); +static void spislave_write_tx_buffer(struct spislave_priv_s *priv); #endif -static void spislave_initialize(FAR struct spi_slave_ctrlr_s *ctrlr); -static void spislave_deinitialize(FAR struct spi_slave_ctrlr_s *ctrlr); +static void spislave_initialize(struct spi_slave_ctrlr_s *ctrlr); +static void spislave_deinitialize(struct spi_slave_ctrlr_s *ctrlr); /* SPI Slave controller operations */ -static void spislave_bind(FAR struct spi_slave_ctrlr_s *ctrlr, - FAR struct spi_slave_dev_s *dev, +static void spislave_bind(struct spi_slave_ctrlr_s *ctrlr, + struct spi_slave_dev_s *dev, enum spi_slave_mode_e mode, int nbits); -static void spislave_unbind(FAR struct spi_slave_ctrlr_s *ctrlr); -static int spislave_enqueue(FAR struct spi_slave_ctrlr_s *ctrlr, - FAR const void *data, +static void spislave_unbind(struct spi_slave_ctrlr_s *ctrlr); +static int spislave_enqueue(struct spi_slave_ctrlr_s *ctrlr, + const void *data, size_t nwords); -static bool spislave_qfull(FAR struct spi_slave_ctrlr_s *ctrlr); -static void spislave_qflush(FAR struct spi_slave_ctrlr_s *ctrlr); -static size_t spislave_qpoll(FAR struct spi_slave_ctrlr_s *ctrlr); +static bool spislave_qfull(struct spi_slave_ctrlr_s *ctrlr); +static void spislave_qflush(struct spi_slave_ctrlr_s *ctrlr); +static size_t spislave_qpoll(struct spi_slave_ctrlr_s *ctrlr); /**************************************************************************** * Private Data @@ -414,10 +414,10 @@ static inline void spislave_dma_rx_fifo_reset(void) * ****************************************************************************/ -static void spislave_setmode(FAR struct spi_slave_ctrlr_s *ctrlr, +static void spislave_setmode(struct spi_slave_ctrlr_s *ctrlr, enum spi_slave_mode_e mode) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; spiinfo("mode=%d\n", mode); @@ -498,9 +498,9 @@ static void spislave_setmode(FAR struct spi_slave_ctrlr_s *ctrlr, * ****************************************************************************/ -static void spislave_setbits(FAR struct spi_slave_ctrlr_s *ctrlr, int nbits) +static void spislave_setbits(struct spi_slave_ctrlr_s *ctrlr, int nbits) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; spiinfo("nbits=%d\n", nbits); @@ -524,9 +524,9 @@ static void spislave_setbits(FAR struct spi_slave_ctrlr_s *ctrlr, int nbits) * ****************************************************************************/ -static int spislave_cs_interrupt(int irq, void *context, FAR void *arg) +static int spislave_cs_interrupt(int irq, void *context, void *arg) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)arg; + struct spislave_priv_s *priv = (struct spislave_priv_s *)arg; if (priv->is_processing) { @@ -553,7 +553,7 @@ static int spislave_cs_interrupt(int irq, void *context, FAR void *arg) * ****************************************************************************/ -static void spislave_store_result(FAR struct spislave_priv_s *priv, +static void spislave_store_result(struct spislave_priv_s *priv, uint32_t recv_bytes) { uint32_t remaining_space = SPI_SLAVE_BUFSIZE - priv->rx_length; @@ -624,7 +624,7 @@ static void spislave_store_result(FAR struct spislave_priv_s *priv, * ****************************************************************************/ -static void spislave_prepare_next_rx(FAR struct spislave_priv_s *priv) +static void spislave_prepare_next_rx(struct spislave_priv_s *priv) { if (priv->rx_length < SPI_SLAVE_BUFSIZE) { @@ -650,7 +650,7 @@ static void spislave_prepare_next_rx(FAR struct spislave_priv_s *priv) * ****************************************************************************/ -static void spislave_evict_sent_data(FAR struct spislave_priv_s *priv, +static void spislave_evict_sent_data(struct spislave_priv_s *priv, uint32_t sent_bytes) { if (sent_bytes < priv->tx_length) @@ -683,7 +683,7 @@ static void spislave_evict_sent_data(FAR struct spislave_priv_s *priv, ****************************************************************************/ #ifndef CONFIG_ESP32C3_SPI2_DMA -static void spislave_write_tx_buffer(FAR struct spislave_priv_s *priv) +static void spislave_write_tx_buffer(struct spislave_priv_s *priv) { /* Initialize data_buf_reg with the address of the first data buffer * register (W0). @@ -728,7 +728,7 @@ static void spislave_write_tx_buffer(FAR struct spislave_priv_s *priv) ****************************************************************************/ #ifdef CONFIG_ESP32C3_SPI2_DMA -static void spislave_setup_rx_dma(FAR struct spislave_priv_s *priv) +static void spislave_setup_rx_dma(struct spislave_priv_s *priv) { uint32_t length = SPI_SLAVE_BUFSIZE - priv->rx_length; @@ -767,7 +767,7 @@ static void spislave_setup_rx_dma(FAR struct spislave_priv_s *priv) ****************************************************************************/ #ifdef CONFIG_ESP32C3_SPI2_DMA -static void spislave_setup_tx_dma(FAR struct spislave_priv_s *priv) +static void spislave_setup_tx_dma(struct spislave_priv_s *priv) { esp32c3_dma_setup(priv->dma_channel, true, dma_txdesc, SPI_DMA_DESC_NUM, priv->tx_buffer, SPI_SLAVE_BUFSIZE); @@ -803,7 +803,7 @@ static void spislave_setup_tx_dma(FAR struct spislave_priv_s *priv) * ****************************************************************************/ -static void spislave_prepare_next_tx(FAR struct spislave_priv_s *priv) +static void spislave_prepare_next_tx(struct spislave_priv_s *priv) { if (priv->tx_length != 0) { @@ -848,9 +848,9 @@ static void spislave_prepare_next_tx(FAR struct spislave_priv_s *priv) * ****************************************************************************/ -static int spislave_periph_interrupt(int irq, void *context, FAR void *arg) +static int spislave_periph_interrupt(int irq, void *context, void *arg) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)arg; + struct spislave_priv_s *priv = (struct spislave_priv_s *)arg; uint32_t regval = getreg32(SPI_SLAVE1_REG); uint32_t transfer_size = REG_MASK(regval, SPI_SLV_DATA_BITLEN) / 8; @@ -911,7 +911,7 @@ static int spislave_periph_interrupt(int irq, void *context, FAR void *arg) ****************************************************************************/ #ifdef CONFIG_ESP32C3_SPI2_DMA -void spislave_dma_init(FAR struct spislave_priv_s *priv) +void spislave_dma_init(struct spislave_priv_s *priv) { /* Enable GDMA clock for the SPI peripheral */ @@ -960,9 +960,9 @@ void spislave_dma_init(FAR struct spislave_priv_s *priv) * ****************************************************************************/ -static void spislave_initialize(FAR struct spi_slave_ctrlr_s *ctrlr) +static void spislave_initialize(struct spi_slave_ctrlr_s *ctrlr) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; const struct spislave_config_s *config = priv->config; spiinfo("ctrlr=%p\n", ctrlr); @@ -1052,9 +1052,9 @@ static void spislave_initialize(FAR struct spi_slave_ctrlr_s *ctrlr) * ****************************************************************************/ -static void spislave_deinitialize(FAR struct spi_slave_ctrlr_s *ctrlr) +static void spislave_deinitialize(struct spi_slave_ctrlr_s *ctrlr) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; esp32c3_gpioirqdisable(ESP32C3_PIN2IRQ(priv->config->cs_pin)); @@ -1103,13 +1103,13 @@ static void spislave_deinitialize(FAR struct spi_slave_ctrlr_s *ctrlr) * ****************************************************************************/ -static void spislave_bind(FAR struct spi_slave_ctrlr_s *ctrlr, - FAR struct spi_slave_dev_s *dev, +static void spislave_bind(struct spi_slave_ctrlr_s *ctrlr, + struct spi_slave_dev_s *dev, enum spi_slave_mode_e mode, int nbits) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; - FAR const void *data = NULL; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; + const void *data = NULL; irqstate_t flags; size_t num_words; @@ -1169,9 +1169,9 @@ static void spislave_bind(FAR struct spi_slave_ctrlr_s *ctrlr, * ****************************************************************************/ -static void spislave_unbind(FAR struct spi_slave_ctrlr_s *ctrlr) +static void spislave_unbind(struct spi_slave_ctrlr_s *ctrlr) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; irqstate_t flags; DEBUGASSERT(priv != NULL); @@ -1225,11 +1225,11 @@ static void spislave_unbind(FAR struct spi_slave_ctrlr_s *ctrlr) * ****************************************************************************/ -static int spislave_enqueue(FAR struct spi_slave_ctrlr_s *ctrlr, - FAR const void *data, +static int spislave_enqueue(struct spi_slave_ctrlr_s *ctrlr, + const void *data, size_t len) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; size_t num_bytes = WORDS2BYTES(priv, len); size_t bufsize; irqstate_t flags; @@ -1280,9 +1280,9 @@ static int spislave_enqueue(FAR struct spi_slave_ctrlr_s *ctrlr, * ****************************************************************************/ -static bool spislave_qfull(FAR struct spi_slave_ctrlr_s *ctrlr) +static bool spislave_qfull(struct spi_slave_ctrlr_s *ctrlr) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; irqstate_t flags; bool is_full = false; @@ -1314,9 +1314,9 @@ static bool spislave_qfull(FAR struct spi_slave_ctrlr_s *ctrlr) * ****************************************************************************/ -static void spislave_qflush(FAR struct spi_slave_ctrlr_s *ctrlr) +static void spislave_qflush(struct spi_slave_ctrlr_s *ctrlr) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; irqstate_t flags; DEBUGASSERT(priv != NULL); @@ -1345,9 +1345,9 @@ static void spislave_qflush(FAR struct spi_slave_ctrlr_s *ctrlr) * ****************************************************************************/ -static size_t spislave_qpoll(FAR struct spi_slave_ctrlr_s *ctrlr) +static size_t spislave_qpoll(struct spi_slave_ctrlr_s *ctrlr) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; irqstate_t flags; uint32_t tmp; uint32_t recv_n; @@ -1399,10 +1399,10 @@ static size_t spislave_qpoll(FAR struct spi_slave_ctrlr_s *ctrlr) * ****************************************************************************/ -FAR struct spi_slave_ctrlr_s *esp32c3_spislave_ctrlr_initialize(int port) +struct spi_slave_ctrlr_s *esp32c3_spislave_ctrlr_initialize(int port) { - FAR struct spi_slave_ctrlr_s *spislave_dev; - FAR struct spislave_priv_s *priv; + struct spi_slave_ctrlr_s *spislave_dev; + struct spislave_priv_s *priv; irqstate_t flags; switch (port) @@ -1416,7 +1416,7 @@ FAR struct spi_slave_ctrlr_s *esp32c3_spislave_ctrlr_initialize(int port) return NULL; } - spislave_dev = (FAR struct spi_slave_ctrlr_s *)priv; + spislave_dev = (struct spi_slave_ctrlr_s *)priv; flags = enter_critical_section(); @@ -1484,9 +1484,9 @@ FAR struct spi_slave_ctrlr_s *esp32c3_spislave_ctrlr_initialize(int port) * ****************************************************************************/ -int esp32c3_spislave_ctrlr_uninitialize(FAR struct spi_slave_ctrlr_s *ctrlr) +int esp32c3_spislave_ctrlr_uninitialize(struct spi_slave_ctrlr_s *ctrlr) { - FAR struct spislave_priv_s *priv = (FAR struct spislave_priv_s *)ctrlr; + struct spislave_priv_s *priv = (struct spislave_priv_s *)ctrlr; irqstate_t flags; DEBUGASSERT(ctrlr != NULL); diff --git a/arch/risc-v/src/esp32c3/esp32c3_spiflash.c b/arch/risc-v/src/esp32c3/esp32c3_spiflash.c index 059757a5918..f2c0ee0477d 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_spiflash.c +++ b/arch/risc-v/src/esp32c3/esp32c3_spiflash.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include @@ -77,10 +78,7 @@ #define SPI_FLASH_ERASED_STATE (0xff) #define SPI_FLASH_SIZE (4 * 1024 * 1024) -#define ESP32C3_MTD_OFFSET CONFIG_ESP32C3_MTD_OFFSET -#define ESP32C3_MTD_SIZE CONFIG_ESP32C3_MTD_SIZE - -#define MTD2PRIV(_dev) ((FAR struct esp32c3_spiflash_s *)_dev) +#define MTD2PRIV(_dev) ((struct esp32c3_spiflash_s *)_dev) #define MTD_SIZE(_priv) ((*(_priv)->data)->chip.chip_size) #define MTD_BLKSIZE(_priv) ((*(_priv)->data)->chip.page_size) #define MTD_ERASESIZE(_priv) ((*(_priv)->data)->chip.sector_size) @@ -914,28 +912,30 @@ static int esp32c3_ioctl(struct mtd_dev_s *dev, int cmd, * Name: esp32c3_spiflash_alloc_mtdpart * * Description: - * Allocate SPI Flash MTD. + * Allocate an MTD partition from the ESP32-C3 SPI Flash. * * Input Parameters: - * None + * mtd_offset - MTD Partition offset from the base address in SPI Flash. + * mtd_size - Size for the MTD partition. * * Returned Value: * SPI Flash MTD data pointer if success or NULL if fail. * ****************************************************************************/ -FAR struct mtd_dev_s *esp32c3_spiflash_alloc_mtdpart(void) +struct mtd_dev_s *esp32c3_spiflash_alloc_mtdpart(uint32_t mtd_offset, + uint32_t mtd_size) { struct esp32c3_spiflash_s *priv = &g_esp32c3_spiflash; const esp32c3_spiflash_chip_t *chip = &(*priv->data)->chip; - FAR struct mtd_dev_s *mtd_part; + struct mtd_dev_s *mtd_part; uint32_t blocks; uint32_t startblock; uint32_t size; - ASSERT((ESP32C3_MTD_OFFSET + ESP32C3_MTD_SIZE) <= chip->chip_size); - ASSERT((ESP32C3_MTD_OFFSET % chip->sector_size) == 0); - ASSERT((ESP32C3_MTD_SIZE % chip->sector_size) == 0); + ASSERT((mtd_offset + mtd_size) <= chip->chip_size); + ASSERT((mtd_offset % chip->sector_size) == 0); + ASSERT((mtd_size % chip->sector_size) == 0); finfo("ESP32-C3 SPI Flash information:\n"); finfo("\tID = 0x%" PRIx32 "\n", chip->device_id); @@ -945,16 +945,19 @@ FAR struct mtd_dev_s *esp32c3_spiflash_alloc_mtdpart(void) finfo("\tSector size = %" PRId32 " KB\n", chip->sector_size / 1024); finfo("\tBlock size = %" PRId32 " KB\n", chip->block_size / 1024); -#if ESP32C3_MTD_SIZE == 0 - size = chip->chip_size - ESP32C3_MTD_OFFSET; -#else - size = ESP32C3_MTD_SIZE; -#endif + if (mtd_size == 0) + { + size = chip->chip_size - mtd_offset; + } + else + { + size = mtd_size; + } - finfo("\tMTD offset = 0x%x\n", ESP32C3_MTD_OFFSET); + finfo("\tMTD offset = 0x%" PRIx32 "\n", mtd_offset); finfo("\tMTD size = 0x%" PRIx32 "\n", size); - startblock = MTD_SIZE2BLK(priv, ESP32C3_MTD_OFFSET); + startblock = MTD_SIZE2BLK(priv, mtd_offset); blocks = MTD_SIZE2BLK(priv, size); mtd_part = mtd_partition(&priv->mtd, startblock, blocks); diff --git a/arch/risc-v/src/esp32c3/esp32c3_spiflash.h b/arch/risc-v/src/esp32c3/esp32c3_spiflash.h index f274c1c83be..76c7812f80f 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_spiflash.h +++ b/arch/risc-v/src/esp32c3/esp32c3_spiflash.h @@ -66,17 +66,19 @@ struct mtd_dev_s *esp32c3_spiflash_mtd(void); * Name: esp32c3_spiflash_alloc_mtdpart * * Description: - * Alloc ESP32-C3 SPI Flash MTD + * Allocate an MTD partition from the ESP32-C3 SPI Flash. * * Input Parameters: - * None + * mtd_offset - MTD Partition offset from the base address in SPI Flash. + * mtd_size - Size for the MTD partition. * * Returned Value: * ESP32-C3 SPI Flash MTD data pointer if success or NULL if fail * ****************************************************************************/ -FAR struct mtd_dev_s *esp32c3_spiflash_alloc_mtdpart(void); +struct mtd_dev_s *esp32c3_spiflash_alloc_mtdpart(uint32_t mtd_offset, + uint32_t mtd_size); /**************************************************************************** * Name: esp32c3_spiflash_encrypt_mtd diff --git a/arch/risc-v/src/esp32c3/esp32c3_start.c b/arch/risc-v/src/esp32c3/esp32c3_start.c index 2ce266f5c6c..d83cf82dcfd 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_start.c +++ b/arch/risc-v/src/esp32c3/esp32c3_start.c @@ -34,6 +34,7 @@ #include "esp32c3_irq.h" #include "esp32c3_lowputc.h" #include "esp32c3_start.h" +#include "esp32c3_wdt.h" /**************************************************************************** * Pre-processor Definitions @@ -52,7 +53,7 @@ /* Address of the IDLE thread */ uint8_t g_idlestack[CONFIG_IDLETHREAD_STACKSIZE] - __attribute__((aligned(16), section(".noinit"))); + aligned_data(16) locate_data(".noinit"); uint32_t g_idle_topstack = ESP32C3_IDLESTACK_TOP; /**************************************************************************** @@ -94,6 +95,10 @@ void __esp32c3_start(void) showprogress('B'); + /* Disable any wdt enabled by bootloader */ + + esp32c3_wdt_early_deinit(); + /* Initialize onboard resources */ esp32c3_board_initialize(); diff --git a/arch/risc-v/src/esp32c3/esp32c3_textheap.c b/arch/risc-v/src/esp32c3/esp32c3_textheap.c index 2bc65bf3891..35a09bc6b9f 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_textheap.c +++ b/arch/risc-v/src/esp32c3/esp32c3_textheap.c @@ -57,9 +57,9 @@ * ****************************************************************************/ -FAR void *up_textheap_memalign(size_t align, size_t size) +void *up_textheap_memalign(size_t align, size_t size) { - FAR void *ret = NULL; + void *ret = NULL; /* Prioritise allocating from RTC. If that fails, allocate from the * main heap. @@ -93,7 +93,7 @@ FAR void *up_textheap_memalign(size_t align, size_t size) * ****************************************************************************/ -void up_textheap_free(FAR void *p) +void up_textheap_free(void *p) { if (p) { diff --git a/arch/risc-v/src/esp32c3/esp32c3_tickless.c b/arch/risc-v/src/esp32c3/esp32c3_tickless.c index 12c756699ee..07b51fb8c60 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_tickless.c +++ b/arch/risc-v/src/esp32c3/esp32c3_tickless.c @@ -27,10 +27,10 @@ * * void up_timer_initialize(void): Initializes the timer facilities. * Called early in the initialization sequence (by up_initialize()). - * int up_timer_gettime(FAR struct timespec *ts): Returns the current + * int up_timer_gettime(struct timespec *ts): Returns the current * time from the platform specific time source. * int up_timer_cancel(void): Cancels the interval timer. - * int up_timer_start(FAR const struct timespec *ts): Start (or re-starts) + * int up_timer_start(const struct timespec *ts): Start (or re-starts) * the interval timer. * * The RTOS will provide the following interfaces for use by the platform- @@ -112,7 +112,7 @@ static inline uint64_t up_tmr_getcounter(void); static inline uint64_t up_tmr_getalarmvalue(void); static inline void up_tmr_counter_advance(uint64_t tick); static void IRAM_ATTR up_tmr_setcounter(uint64_t ticks); -static void IRAM_ATTR up_timer_expire(int irq, void *regs, FAR void *arg); +static void IRAM_ATTR up_timer_expire(int irq, void *regs, void *arg); /**************************************************************************** * Private Data @@ -247,7 +247,7 @@ static void IRAM_ATTR up_tmr_setcounter(uint64_t ticks) putreg32(alarm_ticks & 0xffffffff, SYS_TIMER_SYSTIMER_TARGET0_LO_REG); putreg32((alarm_ticks >> 32) & 0xfffff, SYS_TIMER_SYSTIMER_TARGET0_HI_REG); - /* apply alarm vaule */ + /* apply alarm value */ REG_SET_BIT(SYS_TIMER_SYSTIMER_COMP0_LOAD_REG, SYS_TIMER_TIMER_COMP0_LOAD); @@ -275,7 +275,7 @@ static void IRAM_ATTR up_tmr_setcounter(uint64_t ticks) * ****************************************************************************/ -static void IRAM_ATTR up_timer_expire(int irq, void *regs, FAR void *arg) +static void IRAM_ATTR up_timer_expire(int irq, void *regs, void *arg) { g_timer_started = false; setbits(SYS_TIMER_TARGET0_INT_CLR, SYS_TIMER_SYSTIMER_INT_CLR_REG); @@ -294,7 +294,7 @@ static void IRAM_ATTR up_timer_expire(int irq, void *regs, FAR void *arg) * up_timer_initialize() was called). This function is functionally * equivalent to: * - * int clock_gettime(clockid_t clockid, FAR struct timespec *ts); + * int clock_gettime(clockid_t clockid, struct timespec *ts); * * when clockid is CLOCK_MONOTONIC. * @@ -319,7 +319,7 @@ static void IRAM_ATTR up_timer_expire(int irq, void *regs, FAR void *arg) * ****************************************************************************/ -int IRAM_ATTR up_timer_gettime(FAR struct timespec *ts) +int IRAM_ATTR up_timer_gettime(struct timespec *ts) { uint64_t ticks; irqstate_t flags; @@ -371,7 +371,7 @@ int IRAM_ATTR up_timer_gettime(FAR struct timespec *ts) * ****************************************************************************/ -int IRAM_ATTR up_timer_cancel(FAR struct timespec *ts) +int IRAM_ATTR up_timer_cancel(struct timespec *ts) { uint64_t alarm_value; uint64_t counter; @@ -439,7 +439,7 @@ int IRAM_ATTR up_timer_cancel(FAR struct timespec *ts) * ****************************************************************************/ -int IRAM_ATTR up_timer_start(FAR const struct timespec *ts) +int IRAM_ATTR up_timer_start(const struct timespec *ts) { uint64_t cpu_ticks; irqstate_t flags; diff --git a/arch/risc-v/src/esp32c3/esp32c3_tim.c b/arch/risc-v/src/esp32c3/esp32c3_tim.c index a8379fd7702..994aac41825 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_tim.c +++ b/arch/risc-v/src/esp32c3/esp32c3_tim.c @@ -36,6 +36,8 @@ #include "esp32c3_tim.h" #include "esp32c3_irq.h" #include "esp32c3_gpio.h" +#include "hardware/esp32c3_system.h" +#include "hardware/esp32c3_systimer.h" /**************************************************************************** * Private Types @@ -43,7 +45,7 @@ struct esp32c3_tim_priv_s { - FAR struct esp32c3_tim_ops_s *ops; + struct esp32c3_tim_ops_s *ops; uint8_t id; /* Timer instance */ uint8_t periph; /* Peripheral ID */ uint8_t irq; /* Interrupt ID */ @@ -57,34 +59,34 @@ struct esp32c3_tim_priv_s /* TIM operations ***********************************************************/ -static void esp32c3_tim_start(FAR struct esp32c3_tim_dev_s *dev); -static void esp32c3_tim_stop(FAR struct esp32c3_tim_dev_s *dev); -static void esp32c3_tim_clear(FAR struct esp32c3_tim_dev_s *dev); -static void esp32c3_tim_setmode(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_start(struct esp32c3_tim_dev_s *dev); +static void esp32c3_tim_stop(struct esp32c3_tim_dev_s *dev); +static void esp32c3_tim_clear(struct esp32c3_tim_dev_s *dev); +static void esp32c3_tim_setmode(struct esp32c3_tim_dev_s *dev, enum esp32c3_tim_mode_e mode); -static void esp32c3_tim_setclksrc(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setclksrc(struct esp32c3_tim_dev_s *dev, enum esp32c3_tim_clksrc_e src); -static void esp32c3_tim_setpre(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setpre(struct esp32c3_tim_dev_s *dev, uint16_t pre); -static void esp32c3_tim_getcounter(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_getcounter(struct esp32c3_tim_dev_s *dev, uint64_t *value); -static void esp32c3_tim_setcounter(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setcounter(struct esp32c3_tim_dev_s *dev, uint64_t value); -static void esp32c3_tim_reload_now(FAR struct esp32c3_tim_dev_s *dev); -static void esp32c3_tim_getalarmvalue(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_reload_now(struct esp32c3_tim_dev_s *dev); +static void esp32c3_tim_getalarmvalue(struct esp32c3_tim_dev_s *dev, uint64_t *value); -static void esp32c3_tim_setalarmvalue(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setalarmvalue(struct esp32c3_tim_dev_s *dev, uint64_t value); -static void esp32c3_tim_setalarm(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setalarm(struct esp32c3_tim_dev_s *dev, bool enable); -static void esp32c3_tim_setautoreload(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setautoreload(struct esp32c3_tim_dev_s *dev, bool enable); -static int esp32c3_tim_setisr(FAR struct esp32c3_tim_dev_s *dev, - xcpt_t handler, FAR void * arg); -static void esp32c3_tim_enableint(FAR struct esp32c3_tim_dev_s *dev); -static void esp32c3_tim_disableint(FAR struct esp32c3_tim_dev_s *dev); -static void esp32c3_tim_ackint(FAR struct esp32c3_tim_dev_s *dev); -static int esp32c3_tim_checkint(FAR struct esp32c3_tim_dev_s *dev); +static int esp32c3_tim_setisr(struct esp32c3_tim_dev_s *dev, + xcpt_t handler, void * arg); +static void esp32c3_tim_enableint(struct esp32c3_tim_dev_s *dev); +static void esp32c3_tim_disableint(struct esp32c3_tim_dev_s *dev); +static void esp32c3_tim_ackint(struct esp32c3_tim_dev_s *dev); +static int esp32c3_tim_checkint(struct esp32c3_tim_dev_s *dev); /**************************************************************************** * Private Data @@ -114,6 +116,28 @@ struct esp32c3_tim_ops_s esp32c3_tim_ops = .checkint = esp32c3_tim_checkint }; +struct esp32c3_tim_ops_s esp32c3_systim_ops = +{ + .start = esp32c3_tim_start, + .stop = esp32c3_tim_stop, + .clear = esp32c3_tim_clear, + .setmode = NULL, + .getcounter = esp32c3_tim_getcounter, + .setclksrc = NULL, + .setpre = NULL, + .setcounter = esp32c3_tim_setcounter, + .reloadnow = esp32c3_tim_reload_now, + .getalarmvalue = esp32c3_tim_getalarmvalue, + .setalarmvalue = esp32c3_tim_setalarmvalue, + .setalarm = esp32c3_tim_setalarm, + .setautoreload = NULL, + .setisr = esp32c3_tim_setisr, + .enableint = esp32c3_tim_enableint, + .disableint = esp32c3_tim_disableint, + .ackint = esp32c3_tim_ackint, + .checkint = esp32c3_tim_checkint +}; + #ifdef CONFIG_ESP32C3_TIMER0 /* TIMER0 */ @@ -142,6 +166,20 @@ struct esp32c3_tim_priv_s g_esp32c3_tim1_priv = }; #endif +#ifdef CONFIG_ESP32C3_RT_TIMER +/* SYSTIMER */ + +struct esp32c3_tim_priv_s g_esp32c3_tim2_priv = +{ + .ops = &esp32c3_systim_ops, + .id = ESP32C3_SYSTIM, + .periph = ESP32C3_PERIPH_SYSTIMER_T2 , /* Peripheral ID */ + .irq = ESP32C3_IRQ_SYSTIMER_T2, /* Interrupt ID */ + .cpuint = -ENOMEM, /* CPU interrupt assigned to this timer */ + .inuse = false, +}; +#endif + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -157,12 +195,22 @@ struct esp32c3_tim_priv_s g_esp32c3_tim1_priv = * ****************************************************************************/ -static void esp32c3_tim_start(FAR struct esp32c3_tim_dev_s *dev) +static void esp32c3_tim_start(struct esp32c3_tim_dev_s *dev) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; - modifyreg32(TIMG_T0CONFIG_REG(priv->id), TIMG_T0_EN_M, TIMG_T0_EN_M); + priv = (struct esp32c3_tim_priv_s *)dev; + if (priv->id == ESP32C3_SYSTIM) + { + /* Start counter 1 */ + + modifyreg32(SYS_TIMER_SYSTIMER_CONF_REG, 0, + SYS_TIMER_TIMER_UNIT1_WORK_EN_M); + } + else + { + modifyreg32(TIMG_T0CONFIG_REG(priv->id), TIMG_T0_EN_M, TIMG_T0_EN_M); + } } /**************************************************************************** @@ -176,12 +224,22 @@ static void esp32c3_tim_start(FAR struct esp32c3_tim_dev_s *dev) * ****************************************************************************/ -static void esp32c3_tim_stop(FAR struct esp32c3_tim_dev_s *dev) +static void esp32c3_tim_stop(struct esp32c3_tim_dev_s *dev) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; - modifyreg32(TIMG_T0CONFIG_REG(priv->id), TIMG_T0_EN_M, 0); + priv = (struct esp32c3_tim_priv_s *)dev; + if (priv->id == ESP32C3_SYSTIM) + { + /* Stop counter 1 */ + + modifyreg32(SYS_TIMER_SYSTIMER_CONF_REG, + SYS_TIMER_TIMER_UNIT1_WORK_EN_M, 0); + } + else + { + modifyreg32(TIMG_T0CONFIG_REG(priv->id), TIMG_T0_EN_M, 0); + } } /**************************************************************************** @@ -195,7 +253,7 @@ static void esp32c3_tim_stop(FAR struct esp32c3_tim_dev_s *dev) * ****************************************************************************/ -static void esp32c3_tim_clear(FAR struct esp32c3_tim_dev_s *dev) +static void esp32c3_tim_clear(struct esp32c3_tim_dev_s *dev) { uint64_t clear_value = 0; DEBUGASSERT(dev); @@ -215,12 +273,12 @@ static void esp32c3_tim_clear(FAR struct esp32c3_tim_dev_s *dev) * ****************************************************************************/ -static void esp32c3_tim_setmode(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setmode(struct esp32c3_tim_dev_s *dev, enum esp32c3_tim_mode_e mode) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; if (mode == ESP32C3_TIM_MODE_DOWN) { modifyreg32(TIMG_T0CONFIG_REG(priv->id), TIMG_T0_INCREASE_M, 0); @@ -243,12 +301,12 @@ static void esp32c3_tim_setmode(FAR struct esp32c3_tim_dev_s *dev, * ****************************************************************************/ -static void esp32c3_tim_setclksrc(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setclksrc(struct esp32c3_tim_dev_s *dev, enum esp32c3_tim_clksrc_e src) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; if (src == ESP32C3_TIM_APB_CLK) { modifyreg32(TIMG_T0CONFIG_REG(priv->id), TIMG_T0_USE_XTAL_M, 0); @@ -273,13 +331,13 @@ static void esp32c3_tim_setclksrc(FAR struct esp32c3_tim_dev_s *dev, * ****************************************************************************/ -static void esp32c3_tim_setpre(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setpre(struct esp32c3_tim_dev_s *dev, uint16_t pre) { uint32_t mask = (uint32_t)pre << TIMG_T0_DIVIDER_S; struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; modifyreg32(TIMG_T0CONFIG_REG(priv->id), TIMG_T0_DIVIDER_M, mask); } @@ -296,30 +354,57 @@ static void esp32c3_tim_setpre(FAR struct esp32c3_tim_dev_s *dev, * ****************************************************************************/ -static void esp32c3_tim_getcounter(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_getcounter(struct esp32c3_tim_dev_s *dev, uint64_t *value) { uint32_t value_32; struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; *value = 0; + if (priv->id == ESP32C3_SYSTIM) + { + /* Trigger an update event */ - /* Dummy value (0 or 1) to latch the counter value to read it */ + modifyreg32(SYS_TIMER_SYSTIMER_UNIT1_OP_REG, 0, + SYS_TIMER_TIMER_UNIT1_UPDATE_M); - putreg32(BIT(0), TIMG_T0UPDATE_REG(priv->id)); + /* Wait until the value is valid */ - /* Read value */ + while ((getreg32(SYS_TIMER_SYSTIMER_UNIT1_OP_REG) & + SYS_TIMER_TIMER_UNIT1_VALUE_VALID_M) != + SYS_TIMER_TIMER_UNIT1_VALUE_VALID_M); - value_32 = getreg32(TIMG_T0HI_REG(priv->id)); /* High 32 bits */ + /* Finally read the counter 1 value */ - /* Discard the top 10 bits */ + value_32 = getreg32(SYS_TIMER_SYSTIMER_UNIT1_VALUE_HI_REG); - value_32 &= LOW_22_MASK; - *value |= (uint64_t)value_32; - *value <<= SHIFT_32; - value_32 = getreg32(TIMG_T0LO_REG(priv->id)); /* Low 32 bits */ - *value |= (uint64_t)value_32; + /* Discard the top 12 bits */ + + value_32 &= LOW_20_MASK; + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(SYS_TIMER_SYSTIMER_UNIT1_VALUE_LO_REG); + *value |= (uint64_t)value_32; + } + else + { + /* Dummy value (0 or 1) to latch the counter value to read it */ + + putreg32(BIT(0), TIMG_T0UPDATE_REG(priv->id)); + + /* Read value */ + + value_32 = getreg32(TIMG_T0HI_REG(priv->id)); /* High 32 bits */ + + /* Discard the top 10 bits */ + + value_32 &= LOW_22_MASK; + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(TIMG_T0LO_REG(priv->id)); /* Low 32 bits */ + *value |= (uint64_t)value_32; + } } /**************************************************************************** @@ -338,22 +423,38 @@ static void esp32c3_tim_getcounter(FAR struct esp32c3_tim_dev_s *dev, * ****************************************************************************/ -static void esp32c3_tim_setcounter(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setcounter(struct esp32c3_tim_dev_s *dev, uint64_t value) { uint64_t low_64 = value & LOW_32_MASK; - - /* Get only the low 22 bits. */ - - uint64_t high_64 = (value >> SHIFT_32) & LOW_22_MASK; + uint64_t high_64; struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; - /* Set the counter value */ + if (priv->id == ESP32C3_SYSTIM) + { + high_64 = (value >> SHIFT_32) & LOW_20_MASK; - putreg32((uint32_t)low_64, TIMG_T0LOADLO_REG(priv->id)); - putreg32((uint32_t)high_64, TIMG_T0LOADHI_REG(priv->id)); + /* Set the counter 1 value */ + + putreg32((uint32_t)low_64, SYS_TIMER_SYSTIMER_UNIT1_LOAD_LO_REG); + putreg32((uint32_t)high_64, SYS_TIMER_SYSTIMER_UNIT1_LOAD_HI_REG); + + /* Synchronize */ + + putreg32(SYS_TIMER_TIMER_UNIT1_LOAD_M, + SYS_TIMER_SYSTIMER_UNIT1_LOAD_REG); + } + else + { + high_64 = (value >> SHIFT_32) & LOW_22_MASK; + + /* Set the counter value */ + + putreg32((uint32_t)low_64, TIMG_T0LOADLO_REG(priv->id)); + putreg32((uint32_t)high_64, TIMG_T0LOADHI_REG(priv->id)); + } } /**************************************************************************** @@ -368,15 +469,25 @@ static void esp32c3_tim_setcounter(FAR struct esp32c3_tim_dev_s *dev, * ****************************************************************************/ -static void esp32c3_tim_reload_now(FAR struct esp32c3_tim_dev_s *dev) +static void esp32c3_tim_reload_now(struct esp32c3_tim_dev_s *dev) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; - /* Dummy value to trigger reloading */ + if (priv->id == ESP32C3_SYSTIM) + { + /* Load immediately */ - putreg32(BIT(0), TIMG_T0LOAD_REG(priv->id)); + putreg32(SYS_TIMER_TIMER_UNIT1_LOAD_M, + SYS_TIMER_SYSTIMER_UNIT1_LOAD_REG); + } + else + { + /* Dummy value to trigger reloading */ + + putreg32(BIT(0), TIMG_T0LOAD_REG(priv->id)); + } } /**************************************************************************** @@ -391,27 +502,42 @@ static void esp32c3_tim_reload_now(FAR struct esp32c3_tim_dev_s *dev) * ****************************************************************************/ -static void esp32c3_tim_getalarmvalue(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_getalarmvalue(struct esp32c3_tim_dev_s *dev, uint64_t *value) { uint32_t value_32; struct esp32c3_tim_priv_s *priv; - DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; *value = 0; + if (priv->id == ESP32C3_SYSTIM) + { + /* Read value */ - /* Read value */ + value_32 = getreg32(SYS_TIMER_SYSTIMER_TARGET2_HI_REG); /* High 32 bits */ - value_32 = getreg32(TIMG_T0ALARMHI_REG(priv->id)); /* High 32 bits */ + /* Get only the 20 low bits. */ - /* Get only the 22 low bits. */ + value_32 &= LOW_20_MASK; + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(SYS_TIMER_SYSTIMER_TARGET2_LO_REG); /* Low 32 bits */ + *value |= (uint64_t)value_32; + } + else + { + /* Read value */ - value_32 &= LOW_22_MASK; - *value |= (uint64_t)value_32; - *value <<= SHIFT_32; - value_32 = getreg32(TIMG_T0ALARMLO_REG(priv->id)); /* Low 32 bits */ - *value |= (uint64_t)value_32; + value_32 = getreg32(TIMG_T0ALARMHI_REG(priv->id)); /* High 32 bits */ + + /* Get only the 22 low bits. */ + + value_32 &= LOW_22_MASK; + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(TIMG_T0ALARMLO_REG(priv->id)); /* Low 32 bits */ + *value |= (uint64_t)value_32; + } } /**************************************************************************** @@ -427,19 +553,38 @@ static void esp32c3_tim_getalarmvalue(FAR struct esp32c3_tim_dev_s *dev, * ****************************************************************************/ -static void esp32c3_tim_setalarmvalue(FAR struct esp32c3_tim_dev_s *dev, - uint64_t value) +static void esp32c3_tim_setalarmvalue(struct esp32c3_tim_dev_s *dev, + uint64_t value) { struct esp32c3_tim_priv_s *priv; - uint64_t low_64 = value & LOW_32_MASK; - uint64_t high_64 = (value >> SHIFT_32) & LOW_22_MASK; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; - /* Set an alarm value */ + if (priv->id == ESP32C3_SYSTIM) + { + uint64_t low_64 = value & LOW_32_MASK; + uint64_t high_64 = (value >> SHIFT_32) & LOW_20_MASK; - putreg32((uint32_t)low_64, TIMG_T0ALARMLO_REG(priv->id)); - putreg32((uint32_t)high_64, TIMG_T0ALARMHI_REG(priv->id)); + /* Set an alarm value */ + + putreg32((uint32_t)low_64, SYS_TIMER_SYSTIMER_TARGET2_LO_REG); + putreg32((uint32_t)high_64, SYS_TIMER_SYSTIMER_TARGET2_HI_REG); + + /* Synchronize */ + + putreg32(SYS_TIMER_TIMER_COMP2_LOAD_M, + SYS_TIMER_SYSTIMER_COMP2_LOAD_REG); + } + else + { + uint64_t low_64 = value & LOW_32_MASK; + uint64_t high_64 = (value >> SHIFT_32) & LOW_22_MASK; + + /* Set an alarm value */ + + putreg32((uint32_t)low_64, TIMG_T0ALARMLO_REG(priv->id)); + putreg32((uint32_t)high_64, TIMG_T0ALARMHI_REG(priv->id)); + } } /**************************************************************************** @@ -455,20 +600,40 @@ static void esp32c3_tim_setalarmvalue(FAR struct esp32c3_tim_dev_s *dev, * ****************************************************************************/ -static void esp32c3_tim_setalarm(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setalarm(struct esp32c3_tim_dev_s *dev, bool enable) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; - if (enable) + if (priv->id == ESP32C3_SYSTIM) { - modifyreg32(TIMG_T0CONFIG_REG(priv->id), 0, TIMG_T0_ALARM_EN_M); + if (enable) + { + /* Enable Comparator 2 */ + + modifyreg32(SYS_TIMER_SYSTIMER_CONF_REG, 0, + SYS_TIMER_TARGET2_WORK_EN_M); + } + else + { + /* Disable Comparator 2 */ + + modifyreg32(SYS_TIMER_SYSTIMER_CONF_REG, + SYS_TIMER_TARGET2_WORK_EN_M, 0); + } } else { - modifyreg32(TIMG_T0CONFIG_REG(priv->id), TIMG_T0_ALARM_EN_M, 0); + if (enable) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->id), 0, TIMG_T0_ALARM_EN_M); + } + else + { + modifyreg32(TIMG_T0CONFIG_REG(priv->id), TIMG_T0_ALARM_EN_M, 0); + } } } @@ -486,12 +651,12 @@ static void esp32c3_tim_setalarm(FAR struct esp32c3_tim_dev_s *dev, * ****************************************************************************/ -static void esp32c3_tim_setautoreload(FAR struct esp32c3_tim_dev_s *dev, +static void esp32c3_tim_setautoreload(struct esp32c3_tim_dev_s *dev, bool enable) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; if (enable) { @@ -523,15 +688,15 @@ static void esp32c3_tim_setautoreload(FAR struct esp32c3_tim_dev_s *dev, * ****************************************************************************/ -static int esp32c3_tim_setisr(FAR struct esp32c3_tim_dev_s *dev, - xcpt_t handler, FAR void *arg) +static int esp32c3_tim_setisr(struct esp32c3_tim_dev_s *dev, + xcpt_t handler, void *arg) { - FAR struct esp32c3_tim_priv_s *priv = NULL; + struct esp32c3_tim_priv_s *priv = NULL; int ret = OK; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; + priv = (struct esp32c3_tim_priv_s *)dev; /* Disable interrupt when callback is removed. */ @@ -612,12 +777,20 @@ errout: * ****************************************************************************/ -static void esp32c3_tim_enableint(FAR struct esp32c3_tim_dev_s *dev) +static void esp32c3_tim_enableint(struct esp32c3_tim_dev_s *dev) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; - modifyreg32(TIMG_INT_ENA_TIMERS_REG(priv->id), 0, TIMG_T0_INT_ENA_M); + priv = (struct esp32c3_tim_priv_s *)dev; + if (priv->id == ESP32C3_SYSTIM) + { + modifyreg32(SYS_TIMER_SYSTIMER_INT_ENA_REG, 0, + SYS_TIMER_TARGET2_INT_ENA_M); + } + else + { + modifyreg32(TIMG_INT_ENA_TIMERS_REG(priv->id), 0, TIMG_T0_INT_ENA_M); + } } /**************************************************************************** @@ -631,12 +804,20 @@ static void esp32c3_tim_enableint(FAR struct esp32c3_tim_dev_s *dev) * ****************************************************************************/ -static void esp32c3_tim_disableint(FAR struct esp32c3_tim_dev_s *dev) +static void esp32c3_tim_disableint(struct esp32c3_tim_dev_s *dev) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; - modifyreg32(TIMG_INT_ENA_TIMERS_REG(priv->id), TIMG_T0_INT_ENA_M, 0); + priv = (struct esp32c3_tim_priv_s *)dev; + if (priv->id == ESP32C3_SYSTIM) + { + modifyreg32(SYS_TIMER_SYSTIMER_INT_ENA_REG, + SYS_TIMER_TARGET2_INT_ENA_M, 0); + } + else + { + modifyreg32(TIMG_INT_ENA_TIMERS_REG(priv->id), TIMG_T0_INT_ENA_M, 0); + } } /**************************************************************************** @@ -650,12 +831,20 @@ static void esp32c3_tim_disableint(FAR struct esp32c3_tim_dev_s *dev) * ****************************************************************************/ -static void esp32c3_tim_ackint(FAR struct esp32c3_tim_dev_s *dev) +static void esp32c3_tim_ackint(struct esp32c3_tim_dev_s *dev) { struct esp32c3_tim_priv_s *priv; DEBUGASSERT(dev); - priv = (FAR struct esp32c3_tim_priv_s *)dev; - modifyreg32(TIMG_INT_CLR_TIMERS_REG(priv->id), 0, TIMG_T0_INT_CLR_M); + priv = (struct esp32c3_tim_priv_s *)dev; + if (priv->id == ESP32C3_SYSTIM) + { + modifyreg32(SYS_TIMER_SYSTIMER_INT_CLR_REG, 0, + SYS_TIMER_TARGET2_INT_CLR_M); + } + else + { + modifyreg32(TIMG_INT_CLR_TIMERS_REG(priv->id), 0, TIMG_T0_INT_CLR_M); + } } /**************************************************************************** @@ -672,15 +861,27 @@ static void esp32c3_tim_ackint(FAR struct esp32c3_tim_dev_s *dev) * ****************************************************************************/ -static int esp32c3_tim_checkint(FAR struct esp32c3_tim_dev_s *dev) +static int esp32c3_tim_checkint(struct esp32c3_tim_dev_s *dev) { struct esp32c3_tim_priv_s *priv = (struct esp32c3_tim_priv_s *)dev; uint32_t reg_value; + int ret; DEBUGASSERT(dev != NULL); + if (priv->id == ESP32C3_SYSTIM) + { + reg_value = getreg32(SYS_TIMER_SYSTIMER_INT_ST_REG); + ret = (reg_value & SYS_TIMER_TARGET2_INT_ST_M) >> + SYS_TIMER_TARGET2_INT_ST_S; + } + else + { + reg_value = getreg32(TIMG_INT_ST_TIMERS_REG(priv->id)); + ret = (reg_value & TIMG_T0_INT_ST_M) >> + TIMG_T0_INT_ST_S; + } - reg_value = getreg32(TIMG_INT_ST_TIMERS_REG(priv->id)); - return ((reg_value & TIMG_T0_INT_ST_V) >> TIMG_T0_INT_ST_S); + return ret; } /**************************************************************************** @@ -704,9 +905,9 @@ static int esp32c3_tim_checkint(FAR struct esp32c3_tim_dev_s *dev) * ****************************************************************************/ -FAR struct esp32c3_tim_dev_s *esp32c3_tim_init(int timer) +struct esp32c3_tim_dev_s *esp32c3_tim_init(int timer) { - FAR struct esp32c3_tim_priv_s *tim = NULL; + struct esp32c3_tim_priv_s *tim = NULL; /* First, take the data structure associated with the timer instance */ @@ -728,6 +929,24 @@ FAR struct esp32c3_tim_dev_s *esp32c3_tim_init(int timer) } #endif +#ifdef CONFIG_ESP32C3_RT_TIMER + case 2: + { + tim = &g_esp32c3_tim2_priv; + + /* Clock and reset of systimer peripheral is already performed + * either in esp32c3_timerisr.c or in esp32c3_tickless.c. + * Set comparator 2 to use counter 1 and set the mode + * to oneshot mode, i.e., disable periodic mode. + */ + + modifyreg32(SYS_TIMER_SYSTIMER_TARGET2_CONF_REG, + SYS_TIMER_TARGET2_PERIOD_MODE_M, + SYS_TIMER_TARGET2_TIMER_UNIT_SEL_M); + break; + } +#endif + default: { tmrerr("ERROR: unsupported TIMER %d\n", timer); @@ -748,7 +967,7 @@ FAR struct esp32c3_tim_dev_s *esp32c3_tim_init(int timer) } errout: - return (FAR struct esp32c3_tim_dev_s *)tim; + return (struct esp32c3_tim_dev_s *)tim; } /**************************************************************************** @@ -762,12 +981,12 @@ FAR struct esp32c3_tim_dev_s *esp32c3_tim_init(int timer) * ****************************************************************************/ -void esp32c3_tim_deinit(FAR struct esp32c3_tim_dev_s *dev) +void esp32c3_tim_deinit(struct esp32c3_tim_dev_s *dev) { - FAR struct esp32c3_tim_priv_s *tim = NULL; + struct esp32c3_tim_priv_s *tim = NULL; DEBUGASSERT(dev); - tim = (FAR struct esp32c3_tim_priv_s *)dev; + tim = (struct esp32c3_tim_priv_s *)dev; tim->inuse = false; } diff --git a/arch/risc-v/src/esp32c3/esp32c3_tim.h b/arch/risc-v/src/esp32c3/esp32c3_tim.h index 12ad92ad6ea..3d5cda5393a 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_tim.h +++ b/arch/risc-v/src/esp32c3/esp32c3_tim.h @@ -65,6 +65,7 @@ enum esp32c3_tim_inst_e { ESP32C3_TIMER0 = 0, /* Timer 0 from Timer Group 0 */ ESP32C3_TIMER1, /* Timer 0 from Timer Group 1 */ + ESP32C3_SYSTIM, /* SYSTIMER 1 */ }; /* Timer mode */ @@ -98,43 +99,43 @@ struct esp32c3_tim_ops_s { /* Timer tasks */ - CODE void (*start)(FAR struct esp32c3_tim_dev_s *dev); - CODE void (*stop)(FAR struct esp32c3_tim_dev_s *dev); - CODE void (*clear)(FAR struct esp32c3_tim_dev_s *dev); + void (*start)(struct esp32c3_tim_dev_s *dev); + void (*stop)(struct esp32c3_tim_dev_s *dev); + void (*clear)(struct esp32c3_tim_dev_s *dev); /* Timer operations */ - CODE void (*setmode)(FAR struct esp32c3_tim_dev_s *dev, + void (*setmode)(struct esp32c3_tim_dev_s *dev, enum esp32c3_tim_mode_e mode); - CODE void (*setclksrc)(FAR struct esp32c3_tim_dev_s *dev, + void (*setclksrc)(struct esp32c3_tim_dev_s *dev, enum esp32c3_tim_clksrc_e src); - CODE void (*setpre)(FAR struct esp32c3_tim_dev_s *dev, uint16_t pre); - CODE void (*getcounter)(FAR struct esp32c3_tim_dev_s *dev, + void (*setpre)(struct esp32c3_tim_dev_s *dev, uint16_t pre); + void (*getcounter)(struct esp32c3_tim_dev_s *dev, uint64_t *value); - CODE void (*setcounter)(FAR struct esp32c3_tim_dev_s *dev, uint64_t value); - CODE void (*reloadnow)(FAR struct esp32c3_tim_dev_s *dev); - CODE void (*getalarmvalue)(FAR struct esp32c3_tim_dev_s *dev, + void (*setcounter)(struct esp32c3_tim_dev_s *dev, uint64_t value); + void (*reloadnow)(struct esp32c3_tim_dev_s *dev); + void (*getalarmvalue)(struct esp32c3_tim_dev_s *dev, uint64_t *value); - CODE void (*setalarmvalue)(FAR struct esp32c3_tim_dev_s *dev, + void (*setalarmvalue)(struct esp32c3_tim_dev_s *dev, uint64_t value); - CODE void (*setalarm)(FAR struct esp32c3_tim_dev_s *dev, bool enable); - CODE void (*setautoreload)(FAR struct esp32c3_tim_dev_s *dev, bool enable); + void (*setalarm)(struct esp32c3_tim_dev_s *dev, bool enable); + void (*setautoreload)(struct esp32c3_tim_dev_s *dev, bool enable); /* Timer interrupts */ - CODE int (*setisr)(FAR struct esp32c3_tim_dev_s *dev, xcpt_t handler, - FAR void * arg); - CODE void (*enableint)(FAR struct esp32c3_tim_dev_s *dev); - CODE void (*disableint)(FAR struct esp32c3_tim_dev_s *dev); - CODE void (*ackint)(FAR struct esp32c3_tim_dev_s *dev); - CODE int (*checkint)(FAR struct esp32c3_tim_dev_s *dev); + int (*setisr)(struct esp32c3_tim_dev_s *dev, xcpt_t handler, + void * arg); + void (*enableint)(struct esp32c3_tim_dev_s *dev); + void (*disableint)(struct esp32c3_tim_dev_s *dev); + void (*ackint)(struct esp32c3_tim_dev_s *dev); + int (*checkint)(struct esp32c3_tim_dev_s *dev); }; /**************************************************************************** * Public Function Prototypes ****************************************************************************/ -FAR struct esp32c3_tim_dev_s *esp32c3_tim_init(int timer); -void esp32c3_tim_deinit(FAR struct esp32c3_tim_dev_s *dev); +struct esp32c3_tim_dev_s *esp32c3_tim_init(int timer); +void esp32c3_tim_deinit(struct esp32c3_tim_dev_s *dev); #endif /* __ARCH_RISCV_SRC_ESP32C3_ESP32C3_TIM_H */ diff --git a/arch/risc-v/src/esp32c3/esp32c3_tim_lowerhalf.c b/arch/risc-v/src/esp32c3/esp32c3_tim_lowerhalf.c index 23b7dd0726c..d7baf881ff0 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_tim_lowerhalf.c +++ b/arch/risc-v/src/esp32c3/esp32c3_tim_lowerhalf.c @@ -54,12 +54,12 @@ struct esp32c3_timer_lowerhalf_s { - FAR const struct timer_ops_s *ops; /* Lower half operations */ - FAR struct esp32c3_tim_dev_s *tim; /* esp32c3 timer driver */ - tccb_t callback; /* Current user interrupt callback */ - FAR void *arg; /* Argument passed to upper half callback */ - bool started; /* True: Timer has been started */ - void *upper; /* Pointer to watchdog_upperhalf_s */ + const struct timer_ops_s *ops; /* Lower half operations */ + struct esp32c3_tim_dev_s *tim; /* esp32c3 timer driver */ + tccb_t callback; /* Current user interrupt callback */ + void *arg; /* Argument passed to upper half callback */ + bool started; /* True: Timer has been started */ + void *upper; /* Pointer to watchdog_upperhalf_s */ }; /**************************************************************************** @@ -70,16 +70,16 @@ static int esp32c3_timer_handler(int irq, void *context, void *arg); /* "Lower half" driver methods **********************************************/ -static int esp32c3_timer_start(FAR struct timer_lowerhalf_s *lower); -static int esp32c3_timer_stop(FAR struct timer_lowerhalf_s *lower); -static int esp32c3_timer_getstatus(FAR struct timer_lowerhalf_s *lower, - FAR struct timer_status_s *status); -static int esp32c3_timer_settimeout(FAR struct timer_lowerhalf_s *lower, +static int esp32c3_timer_start(struct timer_lowerhalf_s *lower); +static int esp32c3_timer_stop(struct timer_lowerhalf_s *lower); +static int esp32c3_timer_getstatus(struct timer_lowerhalf_s *lower, + struct timer_status_s *status); +static int esp32c3_timer_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout); -static int esp32c3_timer_maxtimeout(FAR struct timer_lowerhalf_s *lower, +static int esp32c3_timer_maxtimeout(struct timer_lowerhalf_s *lower, uint32_t *timeout); -static void esp32c3_timer_setcallback(FAR struct timer_lowerhalf_s *lower, - tccb_t callback, FAR void *arg); +static void esp32c3_timer_setcallback(struct timer_lowerhalf_s *lower, + tccb_t callback, void *arg); /**************************************************************************** * Private Data @@ -130,8 +130,8 @@ static struct esp32c3_timer_lowerhalf_s g_esp32c3_timer1_lowerhalf = static int esp32c3_timer_handler(int irq, void *context, void *arg) { - FAR struct esp32c3_timer_lowerhalf_s *priv = - (FAR struct esp32c3_timer_lowerhalf_s *)arg; + struct esp32c3_timer_lowerhalf_s *priv = + (struct esp32c3_timer_lowerhalf_s *)arg; uint32_t next_interval_us = 0; if (priv->callback(&next_interval_us, priv->upper)) @@ -168,10 +168,10 @@ static int esp32c3_timer_handler(int irq, void *context, void *arg) * ****************************************************************************/ -static int esp32c3_timer_start(FAR struct timer_lowerhalf_s *lower) +static int esp32c3_timer_start(struct timer_lowerhalf_s *lower) { - FAR struct esp32c3_timer_lowerhalf_s *priv = - (FAR struct esp32c3_timer_lowerhalf_s *)lower; + struct esp32c3_timer_lowerhalf_s *priv = + (struct esp32c3_timer_lowerhalf_s *)lower; int ret = OK; uint16_t pre; irqstate_t flags; @@ -263,10 +263,10 @@ errout: * ****************************************************************************/ -static int esp32c3_timer_stop(FAR struct timer_lowerhalf_s *lower) +static int esp32c3_timer_stop(struct timer_lowerhalf_s *lower) { - FAR struct esp32c3_timer_lowerhalf_s *priv = - (FAR struct esp32c3_timer_lowerhalf_s *)lower; + struct esp32c3_timer_lowerhalf_s *priv = + (struct esp32c3_timer_lowerhalf_s *)lower; int ret = OK; irqstate_t flags; @@ -309,11 +309,11 @@ errout: * ****************************************************************************/ -static int esp32c3_timer_getstatus(FAR struct timer_lowerhalf_s *lower, - FAR struct timer_status_s *status) +static int esp32c3_timer_getstatus(struct timer_lowerhalf_s *lower, + struct timer_status_s *status) { - FAR struct esp32c3_timer_lowerhalf_s *priv = - (FAR struct esp32c3_timer_lowerhalf_s *)lower; + struct esp32c3_timer_lowerhalf_s *priv = + (struct esp32c3_timer_lowerhalf_s *)lower; int ret = OK; uint64_t current_counter_value; uint64_t alarm_value; @@ -371,11 +371,11 @@ static int esp32c3_timer_getstatus(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32c3_timer_settimeout(FAR struct timer_lowerhalf_s *lower, +static int esp32c3_timer_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout) { - FAR struct esp32c3_timer_lowerhalf_s *priv = - (FAR struct esp32c3_timer_lowerhalf_s *)lower; + struct esp32c3_timer_lowerhalf_s *priv = + (struct esp32c3_timer_lowerhalf_s *)lower; int ret = OK; DEBUGASSERT(priv); @@ -403,7 +403,7 @@ static int esp32c3_timer_settimeout(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32c3_timer_maxtimeout(FAR struct timer_lowerhalf_s *lower, +static int esp32c3_timer_maxtimeout(struct timer_lowerhalf_s *lower, uint32_t *max_timeout) { DEBUGASSERT(max_timeout); @@ -433,11 +433,11 @@ static int esp32c3_timer_maxtimeout(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -static void esp32c3_timer_setcallback(FAR struct timer_lowerhalf_s *lower, - tccb_t callback, FAR void *arg) +static void esp32c3_timer_setcallback(struct timer_lowerhalf_s *lower, + tccb_t callback, void *arg) { - FAR struct esp32c3_timer_lowerhalf_s *priv = - (FAR struct esp32c3_timer_lowerhalf_s *)lower; + struct esp32c3_timer_lowerhalf_s *priv = + (struct esp32c3_timer_lowerhalf_s *)lower; irqstate_t flags; int ret = OK; @@ -492,7 +492,7 @@ static void esp32c3_timer_setcallback(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -int esp32c3_timer_initialize(FAR const char *devpath, uint8_t timer) +int esp32c3_timer_initialize(const char *devpath, uint8_t timer) { struct esp32c3_timer_lowerhalf_s *lower = NULL; int ret = OK; @@ -542,7 +542,7 @@ int esp32c3_timer_initialize(FAR const char *devpath, uint8_t timer) */ lower->upper = timer_register(devpath, - (FAR struct timer_lowerhalf_s *)lower); + (struct timer_lowerhalf_s *)lower); if (lower->upper == NULL) { /* The actual cause of the failure may have been a failure to allocate diff --git a/arch/risc-v/src/esp32c3/esp32c3_tim_lowerhalf.h b/arch/risc-v/src/esp32c3/esp32c3_tim_lowerhalf.h index 84beabaa2c5..3648564744f 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_tim_lowerhalf.h +++ b/arch/risc-v/src/esp32c3/esp32c3_tim_lowerhalf.h @@ -35,6 +35,6 @@ * Name: esp32c3_timer_initialize ****************************************************************************/ -int esp32c3_timer_initialize(FAR const char *devpath, uint8_t timer); +int esp32c3_timer_initialize(const char *devpath, uint8_t timer); #endif /* __ARCH_RISCV_SRC_ESP32C3_ESP32C3_TIM_LOWERHALF_H */ diff --git a/arch/risc-v/src/esp32c3/esp32c3_timerisr.c b/arch/risc-v/src/esp32c3/esp32c3_timerisr.c index 8583403871e..fd55c04f197 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_timerisr.c +++ b/arch/risc-v/src/esp32c3/esp32c3_timerisr.c @@ -51,7 +51,7 @@ * Name: systimer_isr ****************************************************************************/ -static int systimer_isr(int irq, FAR void *context, FAR void *arg) +static int systimer_isr(int irq, void *context, void *arg) { setbits(SYS_TIMER_TARGET0_INT_CLR, SYS_TIMER_SYSTIMER_INT_CLR_REG); diff --git a/arch/risc-v/src/esp32c3/esp32c3_wdt.c b/arch/risc-v/src/esp32c3/esp32c3_wdt.c index f53b8382322..c40070fcbe0 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_wdt.c +++ b/arch/risc-v/src/esp32c3/esp32c3_wdt.c @@ -32,14 +32,21 @@ #include "riscv_arch.h" #include "hardware/esp32c3_rtccntl.h" #include "hardware/esp32c3_tim.h" +#include "hardware/esp32c3_efuse.h" -#include "esp32c3_wdt.h" #include "esp32c3_irq.h" +#include "esp32c3_rtc.h" +#include "esp32c3_wdt.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ +/* Helpers for converting from Q13.19 fixed-point format to float */ + +#define N 19 +#define Q_TO_FLOAT(x) ((float)x/(float)(1<base == \ @@ -91,6 +98,7 @@ static int32_t esp32c3_wdt_config_stage(struct esp32c3_wdt_dev_s *dev, enum esp32c3_wdt_stage_e stage, enum esp32c3_wdt_stage_action_e cfg); static void esp32c3_wdt_update_conf(struct esp32c3_wdt_dev_s *dev); +static uint16_t esp32c3_wdt_rtc_clk(struct esp32c3_wdt_dev_s *dev); static int32_t esp32c3_wdt_setisr(struct esp32c3_wdt_dev_s *dev, xcpt_t handler, void *arg); static void esp32c3_wdt_enableint(struct esp32c3_wdt_dev_s *dev); @@ -132,7 +140,7 @@ struct esp32c3_wdt_ops_s esp32c3_rwdt_ops = .feed = esp32c3_wdt_feed, .stg_conf = esp32c3_wdt_config_stage, .upd_conf = NULL, - .rtc_clk = NULL, + .rtc_clk = esp32c3_wdt_rtc_clk, .setisr = esp32c3_wdt_setisr, .enableint = esp32c3_wdt_enableint, .disableint = esp32c3_wdt_disableint, @@ -540,6 +548,14 @@ static int32_t esp32c3_wdt_settimeout(struct esp32c3_wdt_dev_s *dev, { if (IS_RWDT(dev)) { + /* The timeout of only stage 0 happens at: + * Thold0 = RTC_CNTL_WDT_STG0_HOLD << (EFUSE_WDT_DELAY_SEL + 1) + */ + + uint32_t delay; + delay = REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, + EFUSE_WDT_DELAY_SEL); + value = value >> (delay + 1); esp32c3_wdt_putreg(dev, RWDT_STAGE0_TIMEOUT_OFFSET, value); } else @@ -626,6 +642,72 @@ static void esp32c3_wdt_feed(struct esp32c3_wdt_dev_s *dev) } } +/**************************************************************************** + * Name: esp32c3_wdt_rtc_clk + * + * Description: + * Calculate the necessary cycles of RTC SLOW_CLK to complete + * 1 ms. + * + * Parameters: + * dev - Pointer to the driver state structure. + * + * Returned Values: + * Return the number of cycles that completes 1 ms. + * + ****************************************************************************/ + +static uint16_t esp32c3_wdt_rtc_clk(struct esp32c3_wdt_dev_s *dev) +{ + enum esp32c3_rtc_slow_freq_e slow_clk_rtc; + uint32_t period_13q19; + float period; + float cycles_ms; + uint16_t cycles_ms_int; + + /* Calibration map: Maps each RTC SLOW_CLK source to the number + * used to calibrate this source. + */ + + static const enum esp32c3_rtc_cal_sel_e cal_map[] = + { + RTC_CAL_RTC_MUX, + RTC_CAL_32K_XTAL, + RTC_CAL_8MD256 + }; + + DEBUGASSERT(dev); + + /* Check which clock is sourcing the slow_clk_rtc */ + + slow_clk_rtc = esp32c3_rtc_clk_slow_freq_get(); + + /* Get the slow_clk_rtc period in us in Q13.19 fixed point format */ + + period_13q19 = esp32c3_rtc_clk_cal(cal_map[slow_clk_rtc], + SLOW_CLK_CAL_CYCLES); + + /* Assert no error happened during the calibration */ + + DEBUGASSERT(period_13q19 != 0); + + /* Convert from Q13.19 format to float */ + + period = Q_TO_FLOAT(period_13q19); + + wdinfo("PERIOD: %f %" PRIu32"\n", period, period_13q19); + + /* Get the number of cycles necessary to count 1 ms */ + + cycles_ms = 1000.0f / period; + + /* Get the integer number of cycles */ + + cycles_ms_int = (uint16_t)cycles_ms; + + return cycles_ms_int; +} + /**************************************************************************** * Name: esp32c3_wdt_setisr * @@ -846,6 +928,18 @@ struct esp32c3_wdt_dev_s *esp32c3_wdt_init(enum esp32c3_wdt_inst_e wdt_id) case ESP32C3_WDT_RWDT: { wdt = &g_esp32c3_rwdt_priv; + + /* If RTC was not initialized in a previous + * stage by the PM or by clock_initialize() + * Then, init the RTC clock configuration here. + */ + +#if !defined(CONFIG_PM) && !defined(CONFIG_RTC) + /* Initialize RTC controller parameters */ + + esp32c3_rtc_init(); + esp32c3_rtc_clk_set(); +#endif break; } @@ -876,6 +970,24 @@ struct esp32c3_wdt_dev_s *esp32c3_wdt_init(enum esp32c3_wdt_inst_e wdt_id) return (struct esp32c3_wdt_dev_s *)wdt; } +/**************************************************************************** + * Name: esp32c3_wdt_early_deinit + * + * Description: + * Disable the WDT(s) that was/were enabled by the bootloader. + * + ****************************************************************************/ + +void esp32c3_wdt_early_deinit(void) +{ + uint32_t regval; + putreg32(RTC_CNTL_WDT_WKEY_VALUE, RTC_CNTL_WDTWPROTECT_REG); + regval = getreg32(RTC_CNTL_WDTCONFIG0_REG); + regval &= ~RTC_CNTL_WDT_EN; + putreg32(regval, RTC_CNTL_WDTCONFIG0_REG); + putreg32(0, RTC_CNTL_WDTWPROTECT_REG); +} + /**************************************************************************** * Name: esp32c3_wdt_deinit * diff --git a/arch/risc-v/src/esp32c3/esp32c3_wdt.h b/arch/risc-v/src/esp32c3/esp32c3_wdt.h index 4316d114f05..61e78ee7391 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_wdt.h +++ b/arch/risc-v/src/esp32c3/esp32c3_wdt.h @@ -141,6 +141,7 @@ struct esp32c3_wdt_ops_s ****************************************************************************/ struct esp32c3_wdt_dev_s *esp32c3_wdt_init(enum esp32c3_wdt_inst_e wdt_id); +void esp32c3_wdt_early_deinit(void); void esp32c3_wdt_deinit(struct esp32c3_wdt_dev_s *dev); bool esp32c3_wdt_is_running(struct esp32c3_wdt_dev_s *dev); diff --git a/arch/risc-v/src/esp32c3/esp32c3_wifi_adapter.c b/arch/risc-v/src/esp32c3/esp32c3_wifi_adapter.c index 2934851f1c8..169c58f9354 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_wifi_adapter.c +++ b/arch/risc-v/src/esp32c3/esp32c3_wifi_adapter.c @@ -719,7 +719,7 @@ static int32_t wifi_errno_trans(int ret) * ****************************************************************************/ -static int esp_int_adpt_cb(int irq, void *context, FAR void *arg) +static int esp_int_adpt_cb(int irq, void *context, void *arg) { struct irq_adpt *adapter = (struct irq_adpt *)arg; @@ -2155,7 +2155,7 @@ static int esp_event_id_map(int event_id) * ****************************************************************************/ -static void esp_evt_work_cb(FAR void *arg) +static void esp_evt_work_cb(void *arg) { int ret; irqstate_t flags; @@ -4972,7 +4972,7 @@ void esp_wifi_free_eb(void *eb) * ****************************************************************************/ -int esp_wifi_notify_subscribe(pid_t pid, FAR struct sigevent *event) +int esp_wifi_notify_subscribe(pid_t pid, struct sigevent *event) { int id; struct wifi_notify *notify; @@ -5297,7 +5297,7 @@ errout_set_mode: * ****************************************************************************/ -int esp_wifi_sta_send_data(FAR void *pbuf, size_t len) +int esp_wifi_sta_send_data(void *pbuf, size_t len) { int ret; @@ -6376,7 +6376,7 @@ errout_set_mode: * ****************************************************************************/ -int esp_wifi_softap_send_data(FAR void *pbuf, size_t len) +int esp_wifi_softap_send_data(void *pbuf, size_t len) { int ret; @@ -6494,18 +6494,43 @@ int esp_wifi_softap_password(struct iwreq *iwr, bool set) return wifi_errno_trans(ret); } - ext = (struct iw_encode_ext *)(iwr->u.encoding.pointer); pdata = (uint8_t *)(ext + 1); len = ext->key_len; - if (set) { wifi_cfg.ap.max_connection = ESP_MAX_STA_CONN; memset(wifi_cfg.ap.password, 0x0, PWD_MAX_LEN); - memcpy(wifi_cfg.ap.password, pdata, len); if (len) { - wifi_cfg.ap.authmode = WIFI_AUTH_WPA_WPA2_PSK; + memcpy(wifi_cfg.ap.password, pdata, len); + switch (ext->alg) + { + case IW_ENCODE_ALG_NONE: + wifi_cfg.ap.authmode = WIFI_AUTH_OPEN; + break; + + case IW_ENCODE_ALG_WEP: + wifi_cfg.ap.authmode = WIFI_AUTH_WEP; + break; + + case IW_ENCODE_ALG_TKIP: + wifi_cfg.ap.authmode = WIFI_AUTH_WPA_PSK; + break; + + case IW_ENCODE_ALG_CCMP: + wifi_cfg.ap.authmode = WIFI_AUTH_WPA2_PSK; + break; + + case IW_ENCODE_ALG_PMK: + case IW_ENCODE_ALG_AES_CMAC: + wifi_cfg.ap.authmode = WIFI_AUTH_WPA_WPA2_PSK; + break; + + default: + wlerr("ERROR: Failed to transfer wireless authmode: %d", + ext->alg); + return -EINVAL; + } } ret = esp_wifi_set_config(WIFI_IF_AP, &wifi_cfg); @@ -6588,7 +6613,7 @@ int esp_wifi_softap_essid(struct iwreq *iwr, bool set) { memset(wifi_cfg.ap.ssid, 0x0, SSID_MAX_LEN); memcpy(wifi_cfg.ap.ssid, pdata, len); - + wifi_cfg.ap.ssid_len = len; ret = esp_wifi_set_config(WIFI_IF_AP, &wifi_cfg); if (ret) { @@ -6808,11 +6833,14 @@ int esp_wifi_softap_auth(struct iwreq *iwr, bool set) return -EINVAL; } - ret = esp_wifi_set_config(WIFI_IF_AP, &wifi_cfg); - if (ret) + if (wifi_cfg.ap.authmode == WIFI_AUTH_OPEN) { - wlerr("ERROR: Failed to set Wi-Fi config data ret=%d\n", ret); - return wifi_errno_trans(ret); + ret = esp_wifi_set_config(WIFI_IF_AP, &wifi_cfg); + if (ret) + { + wlerr("ERROR: Failed to set Wi-Fi config data ret=%d\n", ret); + return wifi_errno_trans(ret); + } } } else diff --git a/arch/risc-v/src/esp32c3/esp32c3_wifi_adapter.h b/arch/risc-v/src/esp32c3/esp32c3_wifi_adapter.h index 0e9e8408c4f..77a05d9a4ea 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_wifi_adapter.h +++ b/arch/risc-v/src/esp32c3/esp32c3_wifi_adapter.h @@ -140,7 +140,7 @@ void esp_wifi_free_eb(void *eb); * ****************************************************************************/ -int esp_wifi_notify_subscribe(pid_t pid, FAR struct sigevent *event); +int esp_wifi_notify_subscribe(pid_t pid, struct sigevent *event); #ifdef ESP32C3_WLAN_HAS_STA @@ -194,7 +194,7 @@ int esp_wifi_sta_stop(void); * ****************************************************************************/ -int esp_wifi_sta_send_data(FAR void *pbuf, size_t len); +int esp_wifi_sta_send_data(void *pbuf, size_t len); /**************************************************************************** * Name: esp_wifi_sta_register_recv_cb diff --git a/arch/risc-v/src/esp32c3/esp32c3_wifi_utils.c b/arch/risc-v/src/esp32c3/esp32c3_wifi_utils.c index 4636045345b..7c500f6fb92 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_wifi_utils.c +++ b/arch/risc-v/src/esp32c3/esp32c3_wifi_utils.c @@ -158,8 +158,7 @@ int esp_wifi_start_scan(struct iwreq *iwr) config->ssid[req->essid_len] = '\0'; } - if (iwr->u.data.flags & IW_SCAN_THIS_FREQ && - req->num_channels > 0) + if (req->num_channels > 0) { /* Scan specific channels */ @@ -364,6 +363,7 @@ void esp_wifi_scan_event_parse(void) { priv->scan_status = ESP_SCAN_DONE; wlinfo("INFO: None AP is scanned\n"); + nxsem_post(&priv->scan_signal); return; } @@ -372,6 +372,7 @@ void esp_wifi_scan_event_parse(void) { priv->scan_status = ESP_SCAN_DONE; wlerr("ERROR: Failed to calloc buffer to print scan results"); + nxsem_post(&priv->scan_signal); return; } @@ -447,7 +448,7 @@ void esp_wifi_scan_event_parse(void) * in pointer field. */ - iwe->u.essid.pointer = (FAR void *)sizeof(iwe->u.essid); + iwe->u.essid.pointer = (void *)sizeof(iwe->u.essid); memcpy(&iwe->u.essid + 1, ap_list_buffer[bss_count].ssid, essid_len); diff --git a/arch/risc-v/src/esp32c3/esp32c3_wlan.c b/arch/risc-v/src/esp32c3/esp32c3_wlan.c index d71221ddca0..01bb83c8ea5 100644 --- a/arch/risc-v/src/esp32c3/esp32c3_wlan.c +++ b/arch/risc-v/src/esp32c3/esp32c3_wlan.c @@ -114,7 +114,7 @@ struct wlan_pktbuf_s struct wlan_ops_s { int (*start)(void); - int (*send)(FAR void *pdata, size_t n); + int (*send)(void *pdata, size_t n); int (*essid)(struct iwreq *iwr, bool set); int (*bssid)(struct iwreq *iwr, bool set); int (*passwd)(struct iwreq *iwr, bool set); @@ -128,7 +128,7 @@ struct wlan_ops_s int (*rssi)(struct iwreq *iwr, bool set); int (*connect)(void); int (*disconnect)(void); - int (*event)(pid_t pid, FAR struct sigevent *event); + int (*event)(pid_t pid, struct sigevent *event); int (*stop)(void); }; @@ -231,17 +231,17 @@ static const struct wlan_ops_s g_softap_ops = /* Common TX logic */ -static void wlan_transmit(FAR struct wlan_priv_s *priv); -static void wlan_rxpoll(FAR void *arg); -static int wlan_txpoll(FAR struct net_driver_s *dev); -static void wlan_dopoll(FAR struct wlan_priv_s *priv); +static void wlan_transmit(struct wlan_priv_s *priv); +static void wlan_rxpoll(void *arg); +static int wlan_txpoll(struct net_driver_s *dev); +static void wlan_dopoll(struct wlan_priv_s *priv); /* Watchdog timer expirations */ -static void wlan_txtimeout_work(FAR void *arg); +static void wlan_txtimeout_work(void *arg); static void wlan_txtimeout_expiry(wdparm_t arg); -static void wlan_poll_work(FAR void *arg); +static void wlan_poll_work(void *arg); static void wlan_poll_expiry(wdparm_t arg); /* NuttX callback functions */ @@ -249,15 +249,15 @@ static void wlan_poll_expiry(wdparm_t arg); static int wlan_ifup(struct net_driver_s *dev); static int wlan_ifdown(struct net_driver_s *dev); -static void wlan_txavail_work(FAR void *arg); +static void wlan_txavail_work(void *arg); static int wlan_txavail(struct net_driver_s *dev); #if defined(CONFIG_NET_MCASTGROUP) || defined(CONFIG_NET_ICMPv6) -static int wlan_addmac(struct net_driver_s *dev, FAR const uint8_t *mac); +static int wlan_addmac(struct net_driver_s *dev, const uint8_t *mac); #endif #ifdef CONFIG_NET_MCASTGROUP -static int wlan_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac); +static int wlan_rmmac(struct net_driver_s *dev, const uint8_t *mac); #endif #ifdef CONFIG_NETDEV_IOCTL @@ -266,7 +266,7 @@ static int wlan_ioctl(struct net_driver_s *dev, int cmd, #endif #ifdef CONFIG_NET_ICMPv6 -static void wlan_ipv6multicast(FAR struct wlan_priv_s *priv); +static void wlan_ipv6multicast(struct wlan_priv_s *priv); #endif /**************************************************************************** @@ -451,7 +451,7 @@ static inline void wlan_add_txpkt_head(struct wlan_priv_s *priv, * ****************************************************************************/ -static struct wlan_pktbuf_s *wlan_recvframe(FAR struct wlan_priv_s *priv) +static struct wlan_pktbuf_s *wlan_recvframe(struct wlan_priv_s *priv) { irqstate_t flags; sq_entry_t *entry; @@ -484,7 +484,7 @@ static struct wlan_pktbuf_s *wlan_recvframe(FAR struct wlan_priv_s *priv) * ****************************************************************************/ -static struct wlan_pktbuf_s *wlan_txframe(FAR struct wlan_priv_s *priv) +static struct wlan_pktbuf_s *wlan_txframe(struct wlan_priv_s *priv) { irqstate_t flags; sq_entry_t *entry; @@ -518,7 +518,7 @@ static struct wlan_pktbuf_s *wlan_txframe(FAR struct wlan_priv_s *priv) * ****************************************************************************/ -static void wlan_transmit(FAR struct wlan_priv_s *priv) +static void wlan_transmit(struct wlan_priv_s *priv) { struct wlan_pktbuf_s *pktbuf; int ret; @@ -555,7 +555,7 @@ static void wlan_transmit(FAR struct wlan_priv_s *priv) * ****************************************************************************/ -static void wlan_tx_done(FAR struct wlan_priv_s *priv) +static void wlan_tx_done(struct wlan_priv_s *priv) { wd_cancel(&priv->txtimeout); @@ -580,7 +580,7 @@ static void wlan_tx_done(FAR struct wlan_priv_s *priv) * ****************************************************************************/ -static int wlan_rx_done(FAR struct wlan_priv_s *priv, void *buffer, +static int wlan_rx_done(struct wlan_priv_s *priv, void *buffer, uint16_t len, void *eb) { struct wlan_pktbuf_s *pktbuf; @@ -650,12 +650,12 @@ out: * ****************************************************************************/ -static void wlan_rxpoll(FAR void *arg) +static void wlan_rxpoll(void *arg) { struct wlan_pktbuf_s *pktbuf; struct eth_hdr_s *eth_hdr; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)arg; - FAR struct net_driver_s *dev = &priv->dev; + struct wlan_priv_s *priv = (struct wlan_priv_s *)arg; + struct net_driver_s *dev = &priv->dev; #ifdef WLAN_RX_THRESHOLD uint32_t rbytes = 0; #endif @@ -873,10 +873,10 @@ static void wlan_rxpoll(FAR void *arg) * ****************************************************************************/ -static int wlan_txpoll(FAR struct net_driver_s *dev) +static int wlan_txpoll(struct net_driver_s *dev) { struct wlan_pktbuf_s *pktbuf; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; DEBUGASSERT(dev->d_buf != NULL); @@ -946,9 +946,9 @@ static int wlan_txpoll(FAR struct net_driver_s *dev) * ****************************************************************************/ -static void wlan_dopoll(FAR struct wlan_priv_s *priv) +static void wlan_dopoll(struct wlan_priv_s *priv) { - FAR struct net_driver_s *dev = &priv->dev; + struct net_driver_s *dev = &priv->dev; struct wlan_pktbuf_s *pktbuf; uint8_t *txbuf; int ret; @@ -1064,10 +1064,10 @@ static void wlan_txtimeout_expiry(wdparm_t arg) * ****************************************************************************/ -static void wlan_poll_work(FAR void *arg) +static void wlan_poll_work(void *arg) { int32_t delay = WLAN_WDDELAY; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)arg; + struct wlan_priv_s *priv = (struct wlan_priv_s *)arg; struct net_driver_s *dev = &priv->dev; struct wlan_pktbuf_s *pktbuf; @@ -1134,7 +1134,7 @@ exit: static void wlan_poll_expiry(wdparm_t arg) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)arg; + struct wlan_priv_s *priv = (struct wlan_priv_s *)arg; if (priv->ifup) { @@ -1159,9 +1159,9 @@ static void wlan_poll_expiry(wdparm_t arg) * ****************************************************************************/ -static void wlan_txavail_work(FAR void *arg) +static void wlan_txavail_work(void *arg) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)arg; + struct wlan_priv_s *priv = (struct wlan_priv_s *)arg; /* Try to send all cached TX packets even if net is down */ @@ -1202,10 +1202,10 @@ static void wlan_txavail_work(FAR void *arg) * ****************************************************************************/ -static int wlan_ifup(FAR struct net_driver_s *dev) +static int wlan_ifup(struct net_driver_s *dev) { int ret; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; #ifdef CONFIG_NET_IPv4 ninfo("Bringing up: %d.%d.%d.%d\n", @@ -1269,10 +1269,10 @@ static int wlan_ifup(FAR struct net_driver_s *dev) * ****************************************************************************/ -static int wlan_ifdown(FAR struct net_driver_s *dev) +static int wlan_ifdown(struct net_driver_s *dev) { int ret; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; net_lock(); @@ -1321,9 +1321,9 @@ static int wlan_ifdown(FAR struct net_driver_s *dev) * ****************************************************************************/ -static int wlan_txavail(FAR struct net_driver_s *dev) +static int wlan_txavail(struct net_driver_s *dev) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; if (work_available(&priv->txwork)) { @@ -1352,9 +1352,9 @@ static int wlan_txavail(FAR struct net_driver_s *dev) ****************************************************************************/ #if defined(CONFIG_NET_MCASTGROUP) || defined(CONFIG_NET_ICMPv6) -static int wlan_addmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac) +static int wlan_addmac(struct net_driver_s *dev, const uint8_t *mac) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; /* Add the MAC address to the hardware multicast routing table */ @@ -1379,9 +1379,9 @@ static int wlan_addmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac) ****************************************************************************/ #ifdef CONFIG_NET_MCASTGROUP -static int wlan_rmmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac) +static int wlan_rmmac(struct net_driver_s *dev, const uint8_t *mac) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; /* Add the MAC address to the hardware multicast routing table */ @@ -1404,9 +1404,9 @@ static int wlan_rmmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac) ****************************************************************************/ #ifdef CONFIG_NET_ICMPv6 -static void wlan_ipv6multicast(FAR struct wlan_priv_s *priv) +static void wlan_ipv6multicast(struct wlan_priv_s *priv) { - FAR struct net_driver_s *dev; + struct net_driver_s *dev; uint16_t tmp16; uint8_t mac[6]; @@ -1476,7 +1476,7 @@ static void wlan_ipv6multicast(FAR struct wlan_priv_s *priv) ****************************************************************************/ #ifdef CONFIG_NETDEV_IOCTL -static int wlan_ioctl(FAR struct net_driver_s *dev, +static int wlan_ioctl(struct net_driver_s *dev, int cmd, unsigned long arg) { @@ -1674,8 +1674,8 @@ static int esp32c3_net_initialize(int devno, uint8_t *mac_addr, const struct wlan_ops_s *ops) { int ret; - FAR struct wlan_priv_s *priv; - FAR struct net_driver_s *netdev; + struct wlan_priv_s *priv; + struct net_driver_s *netdev; priv = &g_wlan_priv[devno]; if (priv->ref != 0) @@ -1743,7 +1743,7 @@ static int esp32c3_net_initialize(int devno, uint8_t *mac_addr, #ifdef ESP32C3_WLAN_HAS_STA static int wlan_sta_rx_done(void *buffer, uint16_t len, void *eb) { - FAR struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_STA_DEVNO]; + struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_STA_DEVNO]; return wlan_rx_done(priv, buffer, len, eb); } @@ -1768,7 +1768,7 @@ static int wlan_sta_rx_done(void *buffer, uint16_t len, void *eb) static void wlan_sta_tx_done(uint8_t *data, uint16_t *len, bool status) { - FAR struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_STA_DEVNO]; + struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_STA_DEVNO]; wlan_tx_done(priv); } @@ -1795,7 +1795,7 @@ static void wlan_sta_tx_done(uint8_t *data, uint16_t *len, bool status) #ifdef ESP32C3_WLAN_HAS_SOFTAP static int wlan_softap_rx_done(void *buffer, uint16_t len, void *eb) { - FAR struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_SOFTAP_DEVNO]; + struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_SOFTAP_DEVNO]; return wlan_rx_done(priv, buffer, len, eb); } @@ -1820,7 +1820,7 @@ static int wlan_softap_rx_done(void *buffer, uint16_t len, void *eb) static void wlan_softap_tx_done(uint8_t *data, uint16_t *len, bool status) { - FAR struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_SOFTAP_DEVNO]; + struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_SOFTAP_DEVNO]; wlan_tx_done(priv); } @@ -1850,7 +1850,7 @@ static void wlan_softap_tx_done(uint8_t *data, uint16_t *len, bool status) int esp32c3_wlan_sta_set_linkstatus(bool linkstatus) { int ret = -EINVAL; - FAR struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_STA_DEVNO]; + struct wlan_priv_s *priv = &g_wlan_priv[ESP32C3_WLAN_STA_DEVNO]; if (priv != NULL) { diff --git a/arch/risc-v/src/esp32c3/hardware/esp32c3_rtccntl.h b/arch/risc-v/src/esp32c3/hardware/esp32c3_rtccntl.h index 9f9282a17df..4ef6c8a8048 100644 --- a/arch/risc-v/src/esp32c3/hardware/esp32c3_rtccntl.h +++ b/arch/risc-v/src/esp32c3/hardware/esp32c3_rtccntl.h @@ -49,13 +49,13 @@ * write-enable the wdt registers */ -#define RTC_CNTL_WDT_WKEY_VALUE 0x50D83AA1 +#define RTC_CNTL_WDT_WKEY_VALUE 0x50d83aa1 /* The value that needs to be written to RTC_CNTL_SWD_WPROTECT_REG * to write-enable the wdt registers */ -#define RTC_CNTL_SWD_WKEY_VALUE 0x8F1D312A +#define RTC_CNTL_SWD_WKEY_VALUE 0x8f1d312a /* Possible values for RTC_CNTL_WDT_CPU_RESET_LENGTH * and RTC_CNTL_WDT_SYS_RESET_LENGTH diff --git a/arch/risc-v/src/esp32c3/hardware/esp32c3_tim.h b/arch/risc-v/src/esp32c3/hardware/esp32c3_tim.h index d4d080c54f8..0049bb91378 100644 --- a/arch/risc-v/src/esp32c3/hardware/esp32c3_tim.h +++ b/arch/risc-v/src/esp32c3/hardware/esp32c3_tim.h @@ -73,6 +73,8 @@ #define LOW_32_MASK 0xffffffff #define LOW_22_MASK 0x003fffff +#define LOW_20_MASK 0x000fffff +#define LOW_26_MASK 0x03ffffff #define SHIFT_32 32 #define TIMG_T0CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x0000) diff --git a/arch/risc-v/src/fe310/fe310_irq.c b/arch/risc-v/src/fe310/fe310_irq.c index 258bb3286d3..1525da716ba 100644 --- a/arch/risc-v/src/fe310/fe310_irq.c +++ b/arch/risc-v/src/fe310/fe310_irq.c @@ -62,7 +62,7 @@ void up_irqinitialize(void) #if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 15 size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~15); - riscv_stack_color((FAR void *)&g_intstackalloc, intstack_size); + riscv_stack_color((void *)&g_intstackalloc, intstack_size); #endif /* Set priority for all global interrupts to 1 (lowest) */ diff --git a/arch/risc-v/src/fe310/fe310_serial.c b/arch/risc-v/src/fe310/fe310_serial.c index c234b4d8360..6f1ec2b45b7 100644 --- a/arch/risc-v/src/fe310/fe310_serial.c +++ b/arch/risc-v/src/fe310/fe310_serial.c @@ -119,7 +119,7 @@ static int up_setup(struct uart_dev_s *dev); static void up_shutdown(struct uart_dev_s *dev); static int up_attach(struct uart_dev_s *dev); static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context, FAR void *arg); +static int up_interrupt(int irq, void *context, void *arg); static int up_ioctl(struct file *filep, int cmd, unsigned long arg); static int up_receive(struct uart_dev_s *dev, unsigned int *status); static void up_rxint(struct uart_dev_s *dev, bool enable); @@ -364,7 +364,7 @@ static void up_detach(struct uart_dev_s *dev) * ****************************************************************************/ -static int up_interrupt(int irq, void *context, FAR void *arg) +static int up_interrupt(int irq, void *context, void *arg) { struct uart_dev_s *dev = (struct uart_dev_s *)arg; struct up_dev_s *priv; diff --git a/arch/risc-v/src/fe310/fe310_timerisr.c b/arch/risc-v/src/fe310/fe310_timerisr.c index 1e93c8a3c29..95815003994 100644 --- a/arch/risc-v/src/fe310/fe310_timerisr.c +++ b/arch/risc-v/src/fe310/fe310_timerisr.c @@ -91,7 +91,7 @@ static void fe310_reload_mtimecmp(void) * Name: fe310_timerisr ****************************************************************************/ -static int fe310_timerisr(int irq, void *context, FAR void *arg) +static int fe310_timerisr(int irq, void *context, void *arg) { fe310_reload_mtimecmp(); diff --git a/arch/risc-v/src/k210/hardware/k210_memorymap.h b/arch/risc-v/src/k210/hardware/k210_memorymap.h index 60b6a2a781f..68d620fb625 100644 --- a/arch/risc-v/src/k210/hardware/k210_memorymap.h +++ b/arch/risc-v/src/k210/hardware/k210_memorymap.h @@ -1,10 +1,6 @@ /**************************************************************************** * arch/risc-v/src/k210/hardware/k210_memorymap.h * - * Derives from software originally provided by Canaan Inc - * - * Copyright 2018 Canaan Inc - * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. The diff --git a/arch/risc-v/src/k210/hardware/k210_sysctl.h b/arch/risc-v/src/k210/hardware/k210_sysctl.h index 3024a03f56d..0ee6cd62998 100644 --- a/arch/risc-v/src/k210/hardware/k210_sysctl.h +++ b/arch/risc-v/src/k210/hardware/k210_sysctl.h @@ -1,10 +1,6 @@ /**************************************************************************** * arch/risc-v/src/k210/hardware/k210_sysctl.h * - * Derives from software originally provided by Canaan Inc - * - * Copyright 2018 Canaan Inc - * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. The diff --git a/arch/risc-v/src/k210/k210_allocateheap.c b/arch/risc-v/src/k210/k210_allocateheap.c index a45f4f81db0..5a0a713762e 100644 --- a/arch/risc-v/src/k210/k210_allocateheap.c +++ b/arch/risc-v/src/k210/k210_allocateheap.c @@ -60,10 +60,10 @@ * ****************************************************************************/ -void up_allocate_heap(FAR void **heap_start, size_t *heap_size) +void up_allocate_heap(void **heap_start, size_t *heap_size) { board_autoled_on(LED_HEAPALLOCATE); - *heap_start = (FAR void *)K210_HEAP_START; + *heap_start = (void *)K210_HEAP_START; *heap_size = CONFIG_RAM_END - K210_HEAP_START; } @@ -78,7 +78,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) ****************************************************************************/ #if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) -void up_allocate_kheap(FAR void **heap_start, size_t *heap_size) +void up_allocate_kheap(void **heap_start, size_t *heap_size) { /* Get the unaligned size and position of the user-space heap. * This heap begins after the user-space .bss section at an offset @@ -103,7 +103,7 @@ void up_allocate_kheap(FAR void **heap_start, size_t *heap_size) * that was not dedicated to the user heap). */ - *heap_start = (FAR void *)USERSPACE->us_bssend; + *heap_start = (void *)USERSPACE->us_bssend; *heap_size = ubase - (uintptr_t)USERSPACE->us_bssend; } #endif diff --git a/arch/risc-v/src/k210/k210_clockconfig.c b/arch/risc-v/src/k210/k210_clockconfig.c index c4a07d34682..0eb331023fb 100644 --- a/arch/risc-v/src/k210/k210_clockconfig.c +++ b/arch/risc-v/src/k210/k210_clockconfig.c @@ -1,10 +1,6 @@ /**************************************************************************** * arch/risc-v/src/k210/k210_clockconfig.c * - * Derives from software originally provided by Canaan Inc - * - * Copyright 2018 Canaan Inc - * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. The diff --git a/arch/risc-v/src/k210/k210_cpuidlestack.c b/arch/risc-v/src/k210/k210_cpuidlestack.c index eec32a9e62a..a96b9ea2a28 100644 --- a/arch/risc-v/src/k210/k210_cpuidlestack.c +++ b/arch/risc-v/src/k210/k210_cpuidlestack.c @@ -40,7 +40,7 @@ #define STACK_ISALIGNED(a) ((uintptr_t)(a) & ~SMP_STACK_MASK) #if CONFIG_SMP_NCPUS > 1 -static FAR const uintptr_t g_cpu_stackalloc[CONFIG_SMP_NCPUS] = +static const uintptr_t g_cpu_stackalloc[CONFIG_SMP_NCPUS] = { 0 , K210_IDLESTACK1_BASE @@ -94,7 +94,7 @@ static FAR const uintptr_t g_cpu_stackalloc[CONFIG_SMP_NCPUS] = * ****************************************************************************/ -int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size) +int up_cpu_idlestack(int cpu, struct tcb_s *tcb, size_t stack_size) { #if CONFIG_SMP_NCPUS > 1 uintptr_t stack_alloc; @@ -108,7 +108,7 @@ int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size) DEBUGASSERT(stack_alloc != 0 && STACK_ISALIGNED(stack_alloc)); tcb->adj_stack_size = SMP_STACK_SIZE; - tcb->stack_alloc_ptr = (FAR void *)stack_alloc; + tcb->stack_alloc_ptr = (void *)stack_alloc; tcb->stack_base_ptr = tcb->stack_alloc_ptr; #endif return OK; diff --git a/arch/risc-v/src/k210/k210_cpupause.c b/arch/risc-v/src/k210/k210_cpupause.c index 757a9abf563..3ac5042cc4e 100644 --- a/arch/risc-v/src/k210/k210_cpupause.c +++ b/arch/risc-v/src/k210/k210_cpupause.c @@ -123,7 +123,7 @@ bool up_cpu_pausereq(int cpu) int up_cpu_paused(int cpu) { - FAR struct tcb_s *tcb = this_task(); + struct tcb_s *tcb = this_task(); /* Update scheduler parameters */ @@ -187,7 +187,7 @@ int up_cpu_paused(int cpu) * ****************************************************************************/ -int riscv_pause_handler(int irq, void *c, FAR void *arg) +int riscv_pause_handler(int irq, void *c, void *arg) { int cpu = up_cpu_index(); diff --git a/arch/risc-v/src/k210/k210_cpustart.c b/arch/risc-v/src/k210/k210_cpustart.c index c3e47af4062..ace60c94dae 100644 --- a/arch/risc-v/src/k210/k210_cpustart.c +++ b/arch/risc-v/src/k210/k210_cpustart.c @@ -64,7 +64,7 @@ ****************************************************************************/ extern volatile bool g_serial_ok; -extern int riscv_pause_handler(int irq, void *c, FAR void *arg); +extern int riscv_pause_handler(int irq, void *c, void *arg); /**************************************************************************** * Public Functions @@ -113,7 +113,7 @@ void k210_cpu_boot(int cpu) DPRINTF("CPU%d Started\n", this_cpu()); #ifdef CONFIG_STACK_COLORATION - FAR struct tcb_s *tcb = this_task(); + struct tcb_s *tcb = this_task(); /* If stack debug is enabled, then fill the stack with a * recognizable value that we can use later to test for high @@ -146,14 +146,14 @@ void k210_cpu_boot(int cpu) * Name: up_cpu_start * * Description: - * In an SMP configution, only one CPU is initially active (CPU 0). System - * initialization occurs on that single thread. At the completion of the - * initialization of the OS, just before beginning normal multitasking, + * In an SMP configuration, only one CPU is initially active (CPU 0). + * System initialization occurs on that single thread. At the completion of + * the initialization of the OS, just before beginning normal multitasking, * the additional CPUs would be started by calling this function. * - * Each CPU is provided the entry point to is IDLE task when started. A + * Each CPU is provided the entry point to its IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or + * CPU's g_assignedtasks[cpu] list. No stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each @@ -161,8 +161,8 @@ void k210_cpu_boot(int cpu) * * Input Parameters: * cpu - The index of the CPU being started. This will be a numeric - * value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU - * 0 is already active) + * value in the range of one to (CONFIG_SMP_NCPUS-1). + * (CPU 0 is already active) * * Returned Value: * Zero on success; a negated errno value on failure. diff --git a/arch/risc-v/src/k210/k210_gpiohs.c b/arch/risc-v/src/k210/k210_gpiohs.c index a4c9b3f2d5e..5857e4c9a76 100644 --- a/arch/risc-v/src/k210/k210_gpiohs.c +++ b/arch/risc-v/src/k210/k210_gpiohs.c @@ -1,10 +1,6 @@ /**************************************************************************** * arch/risc-v/src/k210/k210_gpiohs.c * - * Derives from software originally provided by Canaan Inc - * - * Copyright 2018 Canaan Inc - * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. The diff --git a/arch/risc-v/src/k210/k210_gpiohs.h b/arch/risc-v/src/k210/k210_gpiohs.h index 1c00fc1e35f..3a94e75ab7a 100644 --- a/arch/risc-v/src/k210/k210_gpiohs.h +++ b/arch/risc-v/src/k210/k210_gpiohs.h @@ -1,10 +1,6 @@ /**************************************************************************** * arch/risc-v/src/k210/k210_gpiohs.h * - * Derives from software originally provided by Canaan Inc - * - * Copyright 2018 Canaan Inc - * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with * this work for additional information regarding copyright ownership. The diff --git a/arch/risc-v/src/k210/k210_irq.c b/arch/risc-v/src/k210/k210_irq.c index 2ebaa5be32e..ed1fce04e4e 100644 --- a/arch/risc-v/src/k210/k210_irq.c +++ b/arch/risc-v/src/k210/k210_irq.c @@ -52,7 +52,7 @@ volatile uint64_t *g_current_regs[1]; #endif #ifdef CONFIG_SMP -extern int riscv_pause_handler(int irq, void *c, FAR void *arg); +extern int riscv_pause_handler(int irq, void *c, void *arg); #endif /**************************************************************************** @@ -88,7 +88,7 @@ void up_irqinitialize(void) #else intstack_size = ((CONFIG_ARCH_INTERRUPTSTACK * CONFIG_SMP_NCPUS) & ~15); #endif - riscv_stack_color((FAR void *)&g_intstackalloc, intstack_size); + riscv_stack_color((void *)&g_intstackalloc, intstack_size); #endif /* Set priority for all global interrupts to 1 (lowest) */ diff --git a/arch/risc-v/src/k210/k210_serial.c b/arch/risc-v/src/k210/k210_serial.c index 85fbc216719..cb707e46091 100644 --- a/arch/risc-v/src/k210/k210_serial.c +++ b/arch/risc-v/src/k210/k210_serial.c @@ -119,7 +119,7 @@ static int up_setup(struct uart_dev_s *dev); static void up_shutdown(struct uart_dev_s *dev); static int up_attach(struct uart_dev_s *dev); static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context, FAR void *arg); +static int up_interrupt(int irq, void *context, void *arg); static int up_ioctl(struct file *filep, int cmd, unsigned long arg); static int up_receive(struct uart_dev_s *dev, unsigned int *status); static void up_rxint(struct uart_dev_s *dev, bool enable); @@ -364,7 +364,7 @@ static void up_detach(struct uart_dev_s *dev) * ****************************************************************************/ -static int up_interrupt(int irq, void *context, FAR void *arg) +static int up_interrupt(int irq, void *context, void *arg) { struct uart_dev_s *dev = (struct uart_dev_s *)arg; struct up_dev_s *priv; diff --git a/arch/risc-v/src/k210/k210_timerisr.c b/arch/risc-v/src/k210/k210_timerisr.c index 25f684cb0db..b4e1913264e 100644 --- a/arch/risc-v/src/k210/k210_timerisr.c +++ b/arch/risc-v/src/k210/k210_timerisr.c @@ -93,7 +93,7 @@ static void k210_reload_mtimecmp(void) * Name: k210_timerisr ****************************************************************************/ -static int k210_timerisr(int irq, void *context, FAR void *arg) +static int k210_timerisr(int irq, void *context, void *arg) { k210_reload_mtimecmp(); diff --git a/arch/risc-v/src/litex/litex_irq.c b/arch/risc-v/src/litex/litex_irq.c index 0751131925b..8c6f00694ba 100644 --- a/arch/risc-v/src/litex/litex_irq.c +++ b/arch/risc-v/src/litex/litex_irq.c @@ -61,7 +61,7 @@ void up_irqinitialize(void) #if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 15 size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~15); - riscv_stack_color((FAR void *)&g_intstackalloc, intstack_size); + riscv_stack_color((void *)&g_intstackalloc, intstack_size); #endif /* litex vexriscv dont have priority and threshold control */ diff --git a/arch/risc-v/src/litex/litex_serial.c b/arch/risc-v/src/litex/litex_serial.c index 05bfe30899d..8345e224e8b 100644 --- a/arch/risc-v/src/litex/litex_serial.c +++ b/arch/risc-v/src/litex/litex_serial.c @@ -143,7 +143,7 @@ static int up_setup(struct uart_dev_s *dev); static void up_shutdown(struct uart_dev_s *dev); static int up_attach(struct uart_dev_s *dev); static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context, FAR void *arg); +static int up_interrupt(int irq, void *context, void *arg); static int up_ioctl(struct file *filep, int cmd, unsigned long arg); static int up_receive(struct uart_dev_s *dev, unsigned int *status); static void up_rxint(struct uart_dev_s *dev, bool enable); @@ -386,7 +386,7 @@ static void up_detach(struct uart_dev_s *dev) * ****************************************************************************/ -static int up_interrupt(int irq, void *context, FAR void *arg) +static int up_interrupt(int irq, void *context, void *arg) { struct uart_dev_s *dev = (struct uart_dev_s *)arg; struct up_dev_s *priv; diff --git a/arch/risc-v/src/litex/litex_timerisr.c b/arch/risc-v/src/litex/litex_timerisr.c index a5652c64cdd..266016e7b76 100644 --- a/arch/risc-v/src/litex/litex_timerisr.c +++ b/arch/risc-v/src/litex/litex_timerisr.c @@ -134,7 +134,7 @@ static void litex_reload_mtimecmp(void) * Name: litex_timerisr ****************************************************************************/ -static int litex_timerisr(int irq, void *context, FAR void *arg) +static int litex_timerisr(int irq, void *context, void *arg) { litex_reload_mtimecmp(); diff --git a/arch/risc-v/src/mpfs/Kconfig b/arch/risc-v/src/mpfs/Kconfig index dc8ced74850..a74aaeae55b 100755 --- a/arch/risc-v/src/mpfs/Kconfig +++ b/arch/risc-v/src/mpfs/Kconfig @@ -103,6 +103,79 @@ config MPFS_I2C1 select ARCH_HAVE_I2CRESET default n +config MPFS_EMMCSD + bool "EMMCSD" + select ARCH_HAVE_SDIO + select SDIO_BLOCKSETUP + select SDIO_DMA + default n + ---help--- + Selects the MPFS eMMCSD driver. + +comment "CorePWM Options" + +config MPFS_HAVE_COREPWM + bool "CorePWM FPGA IP block configured" + default n + +config MPFS_COREPWM0 + bool "CorePWM0 FPGA IP block configured" + default n + select PWM_MULTICHAN + depends on MPFS_HAVE_COREPWM + +config MPFS_COREPWM0_BASE + hex "Base address for the instance" + default 0x44000000 + depends on MPFS_COREPWM0 + +config MPFS_COREPWM0_PWMCLK + int "Clock frequency of the CorePWM0 block (Hz)" + default 25000000 + range 1000000 100000000 + depends on MPFS_COREPWM0 + +config MPFS_COREPWM0_REGWIDTH + int "Width of the PWM register (8, 16 or 32 bits)" + default 32 + range 8 32 + depends on MPFS_COREPWM0 + +config MPFS_COREPWM0_NCHANNELS + int "Number of Output Channels for CorePWM0" + default 8 + range 1 16 + depends on MPFS_COREPWM0 + +config MPFS_COREPWM1 + bool "CorePWM1 FPGA IP block configured" + default n + select PWM_MULTICHAN + depends on MPFS_HAVE_COREPWM + +config MPFS_COREPWM1_BASE + hex "Base address for the instance" + default 0x45000000 + depends on MPFS_COREPWM1 + +config MPFS_COREPWM1_PWMCLK + int "Clock frequency of the CorePWM1 block (Hz)" + default 25000000 + range 1000000 100000000 + depends on MPFS_COREPWM1 + +config MPFS_COREPWM1_REGWIDTH + int "Width of the PWM register (8, 16 or 32 bits)" + default 32 + range 8 32 + depends on MPFS_COREPWM1 + +config MPFS_COREPWM1_NCHANNELS + int "Number of Output Channels for CorePWM1" + default 2 + range 1 16 + depends on MPFS_COREPWM1 + endmenu config MPFS_DMA diff --git a/arch/risc-v/src/mpfs/Make.defs b/arch/risc-v/src/mpfs/Make.defs index 35bbc0019c7..22f017ebb2f 100755 --- a/arch/risc-v/src/mpfs/Make.defs +++ b/arch/risc-v/src/mpfs/Make.defs @@ -33,7 +33,7 @@ CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c -CMN_CSRCS += riscv_mdelay.c riscv_copyfullstate.c +CMN_CSRCS += riscv_mdelay.c riscv_udelay.c riscv_copyfullstate.c ifeq ($(CONFIG_STACK_COLORATION),y) CMN_CSRCS += riscv_checkstack.c @@ -73,3 +73,11 @@ endif ifeq ($(CONFIG_I2C),y) CHIP_CSRCS += mpfs_i2c.c endif + +ifeq ($(CONFIG_MPFS_EMMCSD),y) +CHIP_CSRCS += mpfs_emmcsd.c +endif + +ifeq (${CONFIG_MPFS_HAVE_COREPWM},y) +CHIP_CSRCS += mpfs_corepwm.c +endif diff --git a/arch/risc-v/src/mpfs/hardware/mpfs_corepwm.h b/arch/risc-v/src/mpfs/hardware/mpfs_corepwm.h new file mode 100644 index 00000000000..ea938bc6199 --- /dev/null +++ b/arch/risc-v/src/mpfs/hardware/mpfs_corepwm.h @@ -0,0 +1,98 @@ +/**************************************************************************** + * arch/risc-v/src/mpfs/hardware/mpfs_corepwm.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_SRC_MPFS_HARDWARE_MPFS_COREPWM_H +#define __ARCH_RISCV_SRC_MPFS_HARDWARE_MPFS_COREPWM_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CorePWM features *********************************************************/ + +#define MPFS_MAX_PWM_CHANNELS 16 + +/* Register Base Address ****************************************************/ + +#define MPFS_COREPWM0_BASE (CONFIG_MPFS_COREPWM0_BASE) +#define MPFS_COREPWM1_BASE (CONFIG_MPFS_COREPWM1_BASE) + +/* Register offsets *********************************************************/ + +#define MPFS_COREPWM_PRESCALE_OFFSET (0x00) +#define MPFS_COREPWM_PERIOD_OFFSET (0x04) +#define MPFS_COREPWM_PWM_ENABLE_0_7_OFFSET (0x08) +#define MPFS_COREPWM_PWM_ENABLE_8_15_OFFSET (0x0C) +#define MPFS_COREPWM_PWM1_POS_EDGE_OFFSET (0x10) +#define MPFS_COREPWM_PWM1_NEG_EDGE_OFFSET (0x14) +#define MPFS_COREPWM_PWM2_POS_EDGE_OFFSET (0x18) +#define MPFS_COREPWM_PWM2_NEG_EDGE_OFFSET (0x1C) +#define MPFS_COREPWM_PWM3_POS_EDGE_OFFSET (0x20) +#define MPFS_COREPWM_PWM3_NEG_EDGE_OFFSET (0x24) +#define MPFS_COREPWM_PWM4_POS_EDGE_OFFSET (0x28) +#define MPFS_COREPWM_PWM4_NEG_EDGE_OFFSET (0x2C) +#define MPFS_COREPWM_PWM5_POS_EDGE_OFFSET (0x30) +#define MPFS_COREPWM_PWM5_NEG_EDGE_OFFSET (0x34) +#define MPFS_COREPWM_PWM6_POS_EDGE_OFFSET (0x38) +#define MPFS_COREPWM_PWM6_NEG_EDGE_OFFSET (0x3C) +#define MPFS_COREPWM_PWM7_POS_EDGE_OFFSET (0x40) +#define MPFS_COREPWM_PWM7_NEG_EDGE_OFFSET (0x44) +#define MPFS_COREPWM_PWM8_POS_EDGE_OFFSET (0x48) +#define MPFS_COREPWM_PWM8_NEG_EDGE_OFFSET (0x4C) +#define MPFS_COREPWM_PWM9_POS_EDGE_OFFSET (0x50) +#define MPFS_COREPWM_PWM9_NEG_EDGE_OFFSET (0x54) +#define MPFS_COREPWM_PWM10_POS_EDGE_OFFSET (0x58) +#define MPFS_COREPWM_PWM10_NEG_EDGE_OFFSET (0x5C) +#define MPFS_COREPWM_PWM11_POS_EDGE_OFFSET (0x60) +#define MPFS_COREPWM_PWM11_NEG_EDGE_OFFSET (0x64) +#define MPFS_COREPWM_PWM12_POS_EDGE_OFFSET (0x68) +#define MPFS_COREPWM_PWM12_NEG_EDGE_OFFSET (0x6C) +#define MPFS_COREPWM_PWM13_POS_EDGE_OFFSET (0x70) +#define MPFS_COREPWM_PWM13_NEG_EDGE_OFFSET (0x74) +#define MPFS_COREPWM_PWM14_POS_EDGE_OFFSET (0x78) +#define MPFS_COREPWM_PWM14_NEG_EDGE_OFFSET (0x7C) +#define MPFS_COREPWM_PWM15_POS_EDGE_OFFSET (0x80) +#define MPFS_COREPWM_PWM15_NEG_EDGE_OFFSET (0x84) +#define MPFS_COREPWM_PWM16_POS_EDGE_OFFSET (0x88) +#define MPFS_COREPWM_PWM16_NEG_EDGE_OFFSET (0x8C) +#define MPFS_COREPWM_STRETCH_OFFSET (0x90) +#define MPFS_COREPWM_TACHPRESCALE_OFFSET (0x94) +#define MPFS_COREPWM_TACHSTATUS_OFFSET (0x98) +#define MPFS_COREPWM_TACHIRQMASK_OFFSET (0x9C) +#define MPFS_COREPWM_TACHMODE_OFFSET (0xA0) +#define MPFS_COREPWM_TACHPULSEDUR_0_OFFSET (0xA4) +#define MPFS_COREPWM_TACHPULSEDUR_1_OFFSET (0xA8) +#define MPFS_COREPWM_TACHPULSEDUR_2_OFFSET (0xAC) +#define MPFS_COREPWM_TACHPULSEDUR_3_OFFSET (0xB0) +#define MPFS_COREPWM_TACHPULSEDUR_4_OFFSET (0xB4) +#define MPFS_COREPWM_TACHPULSEDUR_5_OFFSET (0xB8) +#define MPFS_COREPWM_TACHPULSEDUR_6_OFFSET (0xBC) +#define MPFS_COREPWM_TACHPULSEDUR_7_OFFSET (0xC0) +#define MPFS_COREPWM_TACHPULSEDUR_8_OFFSET (0xC4) +#define MPFS_COREPWM_TACHPULSEDUR_9_OFFSET (0xC8) +#define MPFS_COREPWM_TACHPULSEDUR_10_OFFSET (0xCC) +#define MPFS_COREPWM_TACHPULSEDUR_11_OFFSET (0xD0) +#define MPFS_COREPWM_TACHPULSEDUR_12_OFFSET (0xD4) +#define MPFS_COREPWM_TACHPULSEDUR_13_OFFSET (0xD8) +#define MPFS_COREPWM_TACHPULSEDUR_14_OFFSET (0xDC) +#define MPFS_COREPWM_TACHPULSEDUR_15_OFFSET (0xE0) +#define MPFS_COREPWM_SYNC_UPDATE_OFFSET (0xE4) + +#endif /* __ARCH_RISCV_SRC_MPFS_HARDWARE_MPFS_COREPWM_H */ diff --git a/arch/risc-v/src/mpfs/hardware/mpfs_emmcsd.h b/arch/risc-v/src/mpfs/hardware/mpfs_emmcsd.h new file mode 100755 index 00000000000..6cf6cdf2e0a --- /dev/null +++ b/arch/risc-v/src/mpfs/hardware/mpfs_emmcsd.h @@ -0,0 +1,746 @@ +/**************************************************************************** + * arch/risc-v/src/mpfs/hardware/mpfs_emmcsd.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_SRC_MPFS_HARDWARE_MPFS_EMMCSD_H +#define __ARCH_RISCV_SRC_MPFS_HARDWARE_MPFS_EMMCSD_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define MPFS_EMMCSD_HRS00_OFFSET 0x00 +#define MPFS_EMMCSD_HRS01_OFFSET 0x04 +#define MPFS_EMMCSD_HRS02_OFFSET 0x08 +#define MPFS_EMMCSD_HRS03_OFFSET 0x0c +#define MPFS_EMMCSD_HRS04_OFFSET 0x10 +#define MPFS_EMMCSD_HRS06_OFFSET 0x18 +#define MPFS_EMMCSD_HRS07_OFFSET 0x1c +#define MPFS_EMMCSD_HRS30_OFFSET 0x78 +#define MPFS_EMMCSD_HRS31_OFFSET 0x7c +#define MPFS_EMMCSD_HRS32_OFFSET 0x80 +#define MPFS_EMMCSD_HRS33_OFFSET 0x84 +#define MPFS_EMMCSD_HRS34_OFFSET 0x88 +#define MPFS_EMMCSD_HRS35_OFFSET 0x8c +#define MPFS_EMMCSD_HRS36_OFFSET 0x90 +#define MPFS_EMMCSD_HRS37_OFFSET 0x94 +#define MPFS_EMMCSD_HRS38_OFFSET 0x98 + +#define MPFS_EMMCSD_CRS63_OFFSET 0xfc + +#define MPFS_EMMCSD_SRS00_OFFSET 0x200 +#define MPFS_EMMCSD_SRS01_OFFSET 0x204 +#define MPFS_EMMCSD_SRS02_OFFSET 0x208 +#define MPFS_EMMCSD_SRS03_OFFSET 0x20c +#define MPFS_EMMCSD_SRS04_OFFSET 0x210 +#define MPFS_EMMCSD_SRS05_OFFSET 0x214 +#define MPFS_EMMCSD_SRS06_OFFSET 0x218 +#define MPFS_EMMCSD_SRS07_OFFSET 0x21c +#define MPFS_EMMCSD_SRS08_OFFSET 0x220 +#define MPFS_EMMCSD_SRS09_OFFSET 0x224 +#define MPFS_EMMCSD_SRS10_OFFSET 0x228 +#define MPFS_EMMCSD_SRS11_OFFSET 0x22c +#define MPFS_EMMCSD_SRS12_OFFSET 0x230 +#define MPFS_EMMCSD_SRS13_OFFSET 0x234 +#define MPFS_EMMCSD_SRS14_OFFSET 0x238 +#define MPFS_EMMCSD_SRS15_OFFSET 0x23c +#define MPFS_EMMCSD_SRS16_OFFSET 0x240 +#define MPFS_EMMCSD_SRS17_OFFSET 0x244 +#define MPFS_EMMCSD_SRS18_OFFSET 0x248 +#define MPFS_EMMCSD_SRS19_OFFSET 0x24c +#define MPFS_EMMCSD_SRS20_OFFSET 0x250 +#define MPFS_EMMCSD_SRS21_OFFSET 0x254 +#define MPFS_EMMCSD_SRS22_OFFSET 0x258 +#define MPFS_EMMCSD_SRS23_OFFSET 0x25c + +#define MPFS_EMMCSD_SRS24_OFFSET 0x260 +#define MPFS_EMMCSD_SRS25_OFFSET 0x264 +#define MPFS_EMMCSD_SRS26_OFFSET 0x268 +#define MPFS_EMMCSD_SRS27_OFFSET 0x26c +#define MPFS_EMMCSD_SRS29_OFFSET 0x274 + +#define MPFS_EMMCSD_CQRS00_OFFSET 0x400 +#define MPFS_EMMCSD_CQRS01_OFFSET 0x404 +#define MPFS_EMMCSD_CQRS02_OFFSET 0x408 +#define MPFS_EMMCSD_CQRS03_OFFSET 0x40c +#define MPFS_EMMCSD_CQRS04_OFFSET 0x410 +#define MPFS_EMMCSD_CQRS05_OFFSET 0x414 +#define MPFS_EMMCSD_CQRS06_OFFSET 0x418 +#define MPFS_EMMCSD_CQRS07_OFFSET 0x41c +#define MPFS_EMMCSD_CQRS08_OFFSET 0x420 +#define MPFS_EMMCSD_CQRS09_OFFSET 0x424 +#define MPFS_EMMCSD_CQRS10_OFFSET 0x428 +#define MPFS_EMMCSD_CQRS11_OFFSET 0x42c +#define MPFS_EMMCSD_CQRS12_OFFSET 0x430 +#define MPFS_EMMCSD_CQRS13_OFFSET 0x434 +#define MPFS_EMMCSD_CQRS14_OFFSET 0x438 +#define MPFS_EMMCSD_CQRS16_OFFSET 0x440 +#define MPFS_EMMCSD_CQRS17_OFFSET 0x444 +#define MPFS_EMMCSD_CQRS18_OFFSET 0x448 +#define MPFS_EMMCSD_CQRS20_OFFSET 0x450 +#define MPFS_EMMCSD_CQRS21_OFFSET 0x454 +#define MPFS_EMMCSD_CQRS22_OFFSET 0x458 +#define MPFS_EMMCSD_CQRS23_OFFSET 0x45c + +/* HRS00 register */ + +#define MPFS_EMMCSD_HRS00_HWINIT1 (0xff << 24) +#define MPFS_EMMCSD_HRS00_SAV (0xff << 16) +#define MPFS_EMMCSD_HRS00_HWINIT0 (0x7fff << 1) +#define MPFS_EMMCSD_HRS00_SWR (1 << 0) + +/* HRS01 register */ + +#define MPFS_EMMCSD_HRS01_HWINIT0 (0xff << 24) +#define MPFS_EMMCSD_HRS01_DP (0xffffff << 0) + +/* HRS02 register */ + +#define MPFS_EMMCSD_HRS02_HWINIT1 (0x3fff << 18) +#define MPFS_EMMCSD_FRS02_OTN (0x3 << 16) +#define MPFS_EMMCSD_HRS02_HWINIT0 (0xfff << 4) +#define MPFS_EMMCSD_HRS02_PBL (0xf << 0) + +/* HRS03 register */ + +#define MPFS_EMMCSD_HRS03_AER_IEBS (1 << 19) +#define MPFS_EMMCSD_HRS03_AER_IEBD (1 << 18) +#define MPFS_EMMCSD_HRS03_AER_IERS (1 << 17) +#define MPFS_EMMCSD_HRS03_AER_IERD (1 << 16) +#define MPFS_EMMCSD_HRS03_AER_SENBS (1 << 11) +#define MPFS_EMMCSD_HRS03_AER_SENBD (1 << 10) +#define MPFS_EMMCSD_HRS03_AER_SENRS (1 << 9) +#define MPFS_EMMCSD_HRS03_AER_SENRD (1 << 8) +#define MPFS_EMMCSD_HRS03_AER_BS (1 << 3) +#define MPFS_EMMCSD_HRS03_AER_BD (1 << 2) +#define MPFS_EMMCSD_HRS03_AER_RS (1 << 1) +#define MPFS_EMMCSD_HRS03_AER_RD (1 << 0) + +/* HRS04 register */ + +#define MPFS_EMMCSD_HRS04_UIS_ACK (1 << 26) +#define MPFS_EMMCSD_HRS04_UIS_RD (1 << 25) +#define MPFS_EMMCSD_HRS04_UIS_WR (1 << 24) +#define MPFS_EMMCSD_HRS04_UIS_RDATA (0xff << 16) +#define MPFS_EMMCSD_HRS04_UIS_WDATA (0xff << 8) +#define MPFS_EMMCSD_HRS04_UIS_ADDR (0x3f << 0) + +/* HRS06 register */ + +#define MPFS_EMMCSD_HRS06_ETR (1 << 15) +#define MPFS_EMMCSD_HRS06_ETV (0x3f << 8) +#define MPFS_EMMCSD_HRS06_EMM (0x3 << 0) + +/* HRS07 register */ + +#define MPFS_EMMCSD_HRS07_ODELAY_VAL (0x1f << 16) +#define MPFS_EMMCSD_HRS07_IDELAY_VAL (0x1f << 0) + +/* HRS30 register */ + +#define MPFS_EMMCSD_HRS30_HS400ESSUP (1 << 1) +#define MPFS_EMMCSD_HRS30_CQSUP (1 << 0) + +/* HRS31 register */ + +#define MPFS_EMMCSD_HRS31_HOSTCTRLVER (0xfff << 16) +#define MPFS_EMMCSD_HRS31_HOSTFIXVER (0xff << 0) + +/* HRS32 register */ + +#define MPFS_EMMCSD_HRS32_LOAD (1 << 31) +#define MPFS_EMMCSD_HRS32_ADDR (0x7fff << 16) +#define MPFS_EMMCSD_HRS32_DATA (0xffff << 0) + +/* HRS33 register */ + +/* #define MPFS_EMMCSD_HRS33_STAT0 */ + +/* HRS34 register */ + +#define MPFS_EMMCSD_HRS33_STAT1 (0xff << 0) + +/* HRS35 register */ + +#define MPFS_EMMCSD_HRS35_TFR (1 << 31) +#define MPFS_EMMCSD_HRS35_TFV (0x3f << 16) +#define MPFS_EMMCSD_HRS35_TVAL (0x3f << 0) + +/* HRS36 register */ + +#define MPFS_EMMCSD_HRS36_BOOT_EDE (1 << 5) +#define MPFS_EMMCSD_HRS36_BOOT_EDC (1 << 4) +#define MPFS_EMMCSD_HRS36_BOOT_EDT (1 << 3) +#define MPFS_EMMCSD_HRS36_BOOT_EAI (1 << 2) +#define MPFS_EMMCSD_HRS36_BOOT_EAT (1 << 1) +#define MPFS_EMMCSD_HRS36_BOOT_ACT (1 << 0) + +/* HRS37 register */ + +#define MPFS_EMMCSD_HRS37_RGB_COEFF_IFM (0x3f << 0) + +/* HRS38 register */ + +#define MPFS_EMMCSD_HRS38_RGB_COEFF (0x0f << 0) + +/* CRS63 register */ + +#define MPFS_EMMCSD_CRS63_HWINIT1 (0xff << 24) +#define MPFS_EMMCSD_CRS63_SVN (0xff << 16) +#define MPFS_EMMCSD_CRS63_HWINIT0 (0xff << 8) +#define MPFS_EMMCSD_CRS63_ISES (0xff << 0) + +/* SRS01 register */ + +#define MPFS_EMMCSD_SRS01_BCCT (0xff << 16) +#define MPFS_EMMCSD_SRS01_SDMABB (0x7 << 12) +#define MPFS_EMMCSD_SRS01_TBS (0xfff << 0) + +#define MPFS_EMMCSD_SRS01_DMA_SZ_512KB 0x00007000 + +/* SRS03 register */ + +#define MPFS_EMMCSD_SRS03_CIDX (0x3f << 24) +#define MPFS_EMMCSD_SRS03_CT (0x03 << 22) +#define MPFS_EMMCSD_SRS03_DPS (1 << 21) +#define MPFS_EMMCSD_SRS03_CICE (1 << 20) +#define MPFS_EMMCSD_SRS03_CRCCE (1 << 19) +#define MPFS_EMMCSD_SRS03_RTS (0x3 << 16) +#define MPFS_EMMCSD_SRS03_RID (1 << 8) +#define MPFS_EMMCSD_SRS03_RECE (1 << 7) +#define MPFS_EMMCSD_SRS03_RECT (1 << 6) +#define MPFS_EMMCSD_SRS03_MSBS (1 << 5) +#define MPFS_EMMCSD_SRS03_DTDS (1 << 4) +#define MPFS_EMMCSD_SRS03_ACE (0x3 << 2) +#define MPFS_EMMCSD_SRS03_BCE (1 << 1) +#define MPFS_EMMCSD_SRS03_DMAE (1 << 0) + +#define MPFS_EMMCSD_SRS03_NO_RESPONSE (0 << 16) +#define MPFS_EMMCSD_SRS03_RESP_L136 (0x1 << 16) +#define MPFS_EMMCSD_SRS03_RESP_L48 (0x2 << 16) +#define MPFS_EMMCSD_SRS03_RESP_L48B (0x3 << 16) + +/* SRS09 register */ + +#define MPFS_EMMCSD_SRS09_CMDSL (1 << 24) +#define MPFS_EMMCSD_SRS09_DATSL1 (0xf << 20) +#define MPFS_EMMCSD_SRS09_WPSL (1 << 19) +#define MPFS_EMMCSD_SRS09_CDSL (1 << 18) +#define MPFS_EMMCSD_SRS09_CSS (1 << 17) +#define MPFS_EMMCSD_SRS09_CI (1 << 16) +#define MPFS_EMMCSD_SRS09_BRE (1 << 11) +#define MPFS_EMMCSD_SRS09_BWE (1 << 10) +#define MPFS_EMMCSD_SRS09_RTA (1 << 9) +#define MPFS_EMMCSD_SRS09_WTA (1 << 8) +#define MPFS_EMMCSD_SRS09_DATSL2 (0xf << 4) +#define MPFS_EMMCSD_SRS09_DLA (1 << 2) +#define MPFS_EMMCSD_SRS09_CIDAT (1 << 1) +#define MPFS_EMMCSD_SRS09_CICMD (1 << 0) + +/* SRS10 register */ + +#define MPFS_EMMCSD_SRS10_WORM (1 << 26) +#define MPFS_EMMCSD_SRS10_WOIS (1 << 25) +#define MPFS_EMMCSD_SRS10_WOIQ (1 << 24) +#define MPFS_EMMCSD_SRS10_IBG (1 << 19) +#define MPFS_EMMCSD_SRS10_RWC (1 << 18) +#define MPFS_EMMCSD_SRS10_CREQ (1 << 17) +#define MPFS_EMMCSD_SRS10_SBGR (1 << 16) +#define MPFS_EMMCSD_SRS10_BVS2 (0x7 << 13) +#define MPFS_EMMCSD_SRS10_BP2 (1 << 12) +#define MPFS_EMMCSD_SRS10_BVS (0x7 << 9) +#define MPFS_EMMCSD_SRS10_BP (1 << 8) +#define MPFS_EMMCSD_SRS10_CDSS (1 << 7) +#define MPFS_EMMCSD_SRS10_CDTL (1 << 6) +#define MPFS_EMMCSD_SRS10_EDTW (1 << 5) +#define MPFS_EMMCSD_SRS10_DMASEL (0x3 << 3) +#define MPFS_EMMCSD_SRS10_HSE (1 << 2) +#define MPFS_EMMCSD_SRS10_DTW (1 << 1) +#define MPFS_EMMCSD_SRS10_LEDC (1 << 0) + +/* SRS11 register */ + +#define MPFS_EMMCSD_SRS11_SRDAT (1 << 26) +#define MPFS_EMMCSD_SRS11_SRCMD (1 << 25) +#define MPFS_EMMCSD_SRS11_SRFA (1 << 24) +#define MPFS_EMMCSD_SRS11_DTCV (0xf << 16) +#define MPFS_EMMCSD_SRS11_SDCFSL (0xff << 8) +#define MPFS_EMMCSD_SRS11_SDCFSH (0x3 << 6) +#define MPFS_EMMCSD_SRS11_CLKGENSEL (1 << 5) /* Not documented! */ +#define MPFS_EMMCSD_SRS11_SDCE (1 << 2) +#define MPFS_EMMCSD_SRS11_ICS (1 << 1) +#define MPFS_EMMCSD_SRS11_ICE (1 << 0) + +/* SRS12 register */ + +#define MPFS_EMMCSD_SRS12_ERSP (1 << 27) +#define MPFS_EMMCSD_SRS12_EADMA (1 << 25) +#define MPFS_EMMCSD_SRS12_EAC (1 << 24) +#define MPFS_EMMCSD_SRS12_ECL (1 << 23) +#define MPFS_EMMCSD_SRS12_EDEB (1 << 22) +#define MPFS_EMMCSD_SRS12_EDCRC (1 << 21) +#define MPFS_EMMCSD_SRS12_EDT (1 << 20) +#define MPFS_EMMCSD_SRS12_ECI (1 << 19) +#define MPFS_EMMCSD_SRS12_ECEB (1 << 18) +#define MPFS_EMMCSD_SRS12_ECCRC (1 << 17) +#define MPFS_EMMCSD_SRS12_ECT (1 << 16) +#define MPFS_EMMCSD_SRS12_EINT (1 << 15) +#define MPFS_EMMCSD_SRS12_CQINT (1 << 14) +#define MPFS_EMMCSD_SRS12_CINT (1 << 8) +#define MPFS_EMMCSD_SRS12_CR (1 << 7) +#define MPFS_EMMCSD_SRS12_CIN (1 << 6) +#define MPFS_EMMCSD_SRS12_BRR (1 << 5) +#define MPFS_EMMCSD_SRS12_BWR (1 << 4) +#define MPFS_EMMCSD_SRS12_DMAINT (1 << 3) +#define MPFS_EMMCSD_SRS12_BGE (1 << 2) +#define MPFS_EMMCSD_SRS12_TC (1 << 1) +#define MPFS_EMMCSD_SRS12_CC (1 << 0) + +#define MPFS_EMMCSD_SRS12_ESTAT_MASK (0xFFFF8000u) +#define MPFS_EMMCSD_SRS12_STAT_CLEAR 0xFFFFFFFFu + +/* SRS13 register */ + +#define MPFS_EMMCSD_SRS13_ERSP_SE (1 << 27) +#define MPFS_EMMCSD_SRS13_TUNING_ERR_SE (1 << 26) +#define MPFS_EMMCSD_SRS13_EADMA_SE (1 << 25) +#define MPFS_EMMCSD_SRS13_EAC_SE (1 << 24) +#define MPFS_EMMCSD_SRS13_ECL_SE (1 << 23) +#define MPFS_EMMCSD_SRS13_EDEB_SE (1 << 22) +#define MPFS_EMMCSD_SRS13_EDCRC_SE (1 << 21) +#define MPFS_EMMCSD_SRS13_EDT_SE (1 << 20) +#define MPFS_EMMCSD_SRS13_ECI_SE (1 << 19) +#define MPFS_EMMCSD_SRS13_ECEB_SE (1 << 18) +#define MPFS_EMMCSD_SRS13_ECCRC_SE (1 << 17) +#define MPFS_EMMCSD_SRS13_ECT_SE (1 << 16) +#define MPFS_EMMCSD_SRS13_CQINT_SE (1 << 14) +#define MPFS_EMMCSD_SRS13_RT_SE (1 << 12) /* Undocumented */ +#define MPFS_EMMCSD_SRS13_INT_ON_C_SE (1 << 11) /* Undocumented */ +#define MPFS_EMMCSD_SRS13_INT_ON_B_SE (1 << 10) /* Undocumented */ +#define MPFS_EMMCSD_SRS13_INT_ON_A_SE (1 << 9) /* Undocumented */ +#define MPFS_EMMCSD_SRS13_CINT_SE (1 << 8) +#define MPFS_EMMCSD_SRS13_CR_SE (1 << 7) +#define MPFS_EMMCSD_SRS13_CIN_SE (1 << 6) +#define MPFS_EMMCSD_SRS13_BRR_SE (1 << 5) +#define MPFS_EMMCSD_SRS13_BWR_SE (1 << 4) +#define MPFS_EMMCSD_SRS13_DMAINT_SE (1 << 3) +#define MPFS_EMMCSD_SRS13_BGE_SE (1 << 2) +#define MPFS_EMMCSD_SRS13_TC_SE (1 << 1) +#define MPFS_EMMCSD_SRS13_CC_SE (1 << 0) + +#define MPFS_EMMCSD_SRS13_STATUS_EN (MPFS_EMMCSD_SRS13_ERSP_SE | \ + MPFS_EMMCSD_SRS13_TUNING_ERR_SE | \ + MPFS_EMMCSD_SRS13_EADMA_SE | \ + MPFS_EMMCSD_SRS13_EAC_SE | \ + MPFS_EMMCSD_SRS13_ECL_SE | \ + MPFS_EMMCSD_SRS13_EDEB_SE | \ + MPFS_EMMCSD_SRS13_EDCRC_SE | \ + MPFS_EMMCSD_SRS13_EDT_SE | \ + MPFS_EMMCSD_SRS13_ECI_SE | \ + MPFS_EMMCSD_SRS13_ECEB_SE | \ + MPFS_EMMCSD_SRS13_ECCRC_SE | \ + MPFS_EMMCSD_SRS13_ECT_SE | \ + MPFS_EMMCSD_SRS13_CQINT_SE | \ + MPFS_EMMCSD_SRS13_RT_SE | \ + MPFS_EMMCSD_SRS13_INT_ON_C_SE | \ + MPFS_EMMCSD_SRS13_INT_ON_B_SE | \ + MPFS_EMMCSD_SRS13_INT_ON_A_SE | \ + MPFS_EMMCSD_SRS13_CR_SE | \ + MPFS_EMMCSD_SRS13_CIN_SE | \ + MPFS_EMMCSD_SRS13_BRR_SE | \ + MPFS_EMMCSD_SRS13_BWR_SE | \ + MPFS_EMMCSD_SRS13_DMAINT_SE | \ + MPFS_EMMCSD_SRS13_BGE_SE | \ + MPFS_EMMCSD_SRS13_TC_SE | \ + MPFS_EMMCSD_SRS13_CC_SE) + +/* SRS14 register */ + +#define MPFS_EMMCSD_SRS14_ERSP_IE (1 << 27) +#define MPFS_EMMCSD_SRS14_EADMA_IE (1 << 25) +#define MPFS_EMMCSD_SRS14_EAC_IE (1 << 24) +#define MPFS_EMMCSD_SRS14_ECL_IE (1 << 23) +#define MPFS_EMMCSD_SRS14_EDEB_IE (1 << 22) +#define MPFS_EMMCSD_SRS14_EDCRC_IE (1 << 21) +#define MPFS_EMMCSD_SRS14_EDT_IE (1 << 20) +#define MPFS_EMMCSD_SRS14_ECI_IE (1 << 19) +#define MPFS_EMMCSD_SRS14_ECEB_IE (1 << 18) +#define MPFS_EMMCSD_SRS14_ECCRC_IE (1 << 17) +#define MPFS_EMMCSD_SRS14_ECT_IE (1 << 16) +#define MPFS_EMMCSD_SRS14_CQINT_IE (1 << 14) +#define MPFS_EMMCSD_SRS14_CINT_IE (1 << 8) +#define MPFS_EMMCSD_SRS14_CR_IE (1 << 7) +#define MPFS_EMMCSD_SRS14_CIN_IE (1 << 6) +#define MPFS_EMMCSD_SRS14_BRR_IE (1 << 5) +#define MPFS_EMMCSD_SRS14_BWR_IE (1 << 4) +#define MPFS_EMMCSD_SRS14_DMAINT_IE (1 << 3) +#define MPFS_EMMCSD_SRS14_BGE_IE (1 << 2) +#define MPFS_EMMCSD_SRS14_TC_IE (1 << 1) +#define MPFS_EMMCSD_SRS14_CC_IE (1 << 0) + +/* SRS15 register */ + +#define MPFS_EMMCSD_SRS15_PVE (1 << 31) +#define MPFS_EMMCSD_SRS15_A64B (1 << 29) +#define MPFS_EMMCSD_SRS15_HV4E (1 << 28) +#define MPFS_EMMCSD_SRS15_SCS (1 << 23) +#define MPFS_EMMCSD_SRS15_EXTNG (1 << 22) +#define MPFS_EMMCSD_SRS15_DSS (0x3 << 20) +#define MPFS_EMMCSD_SRS15_V18SE (1 << 19) +#define MPFS_EMMCSD_SRS15_UMS (0x7 << 16) +#define MPFS_EMMCSD_SRS15_CNIACE (1 << 7) +#define MPFS_EMMCSD_SRS15_ACRE (1 << 5) +#define MPFS_EMMCSD_SRS15_ACIE (1 << 4) +#define MPFS_EMMCSD_SRS15_ACEBE (1 << 3) +#define MPFS_EMMCSD_SRS15_ACCE (1 << 2) +#define MPFS_EMMCSD_SRS15_ACTE (1 << 1) +#define MPFS_EMMCSD_SRS15_ACNE (1 << 0) + +/* SRS16 register */ + +#define MPFS_EMMCSD_SRS16_SLT (0x3 << 30) +#define MPFS_EMMCSD_SRS16_AIS (1 << 29) +#define MPFS_EMMCSD_SRS16_A64S (1 << 28) +#define MPFS_EMMCSD_SRS16_HWINIT1 (1 << 27) +#define MPFS_EMMCSD_SRS16_VS18 (1 << 26) +#define MPFS_EMMCSD_SRS16_VS30 (1 << 25) +#define MPFS_EMMCSD_SRS16_VS33 (1 << 24) +#define MPFS_EMMCSD_SRS16_SRS (1 << 23) +#define MPFS_EMMCSD_SRS16_DMAS (1 << 22) +#define MPFS_EMMCSD_SRS16_HSS (1 << 21) +#define MPFS_EMMCSD_SRS16_ADMA1S (1 << 20) +#define MPFS_EMMCSD_SRS16_ADMA2S (1 << 19) +#define MPFS_EMMCSD_SRS16_EDS8 (1 << 18) +#define MPFS_EMMCSD_SRS16_MBL (0x3 << 16) +#define MPFS_EMMCSD_SRS16_BCSDCLK (0xff << 8) +#define MPFS_EMMCSD_SRS16_TCU (1 << 7) +#define MPFS_EMMCSD_SRS16_HWINIT0 (1 << 6) +#define MPFS_EMMCSD_SRS16_TCF (0x3f << 0) + +/* SRS17 register */ + +#define MPFS_EMMCSD_SRS17_HWINIT3 (0x7 << 29) +#define MPFS_EMMCSD_SRS17_VDD2S (1 << 28) +#define MPFS_EMMCSD_SRS17_HWINIT2 (0xf << 24) +#define MPFS_EMMCSD_SRS17_CLKMPR (0xff << 16) +#define MPFS_EMMCSD_SRS17_RTNGM (0x3 << 14) +#define MPFS_EMMCSD_SRS17_UTSM50 (1 << 13) +#define MPFS_EMMCSD_SRS17_HWINIT1 (1 << 12) +#define MPFS_EMMCSD_SRS17_RTNGCNT (0xf << 8) +#define MPFS_EMMCSD_SRS17_HWINIT0 (1 << 7) +#define MPFS_EMMCSD_SRS17_DRVD (1 << 6) +#define MPFS_EMMCSD_SRS17_DRVC (1 << 5) +#define MPFS_EMMCSD_SRS17_DRVA (1 << 4) +#define MPFS_EMMCSD_SRS17_UHSII (1 << 3) +#define MPFS_EMMCSD_SRS17_DDR50 (1 << 2) +#define MPFS_EMMCSD_SRS17_SDR104 (1 << 1) +#define MPFS_EMMCSD_SRS17_SDR50 (1 << 0) + +/* SRS18 register */ + +#define MPFS_EMMCSD_SRS18_HWINIT0 (0xff << 24) +#define MPFS_EMMCSD_SRS18_MC18 (0xff << 16) +#define MPFS_EMMCSD_SRS18_MC30 (0xff << 8) +#define MPFS_EMMCSD_SRS18_MC33 (0xff << 0) + +/* SRS19 register */ + +#define MPFS_EMMCSD_SRS19_HWINIT0 (0xffffff << 8) +#define MPFS_EMMCSD_SRS19_MC18V2 (0xff << 0) + +/* SRS20 register */ + +#define MPFS_EMMCSD_SRS20_ERESP_FE (1 << 27) +#define MPFS_EMMCSD_SRS20_ETUNE_FE (1 << 26) +#define MPFS_EMMCSD_SRS20_EADMA_FE (1 << 25) +#define MPFS_EMMCSD_SRS20_EAC_FE (1 << 24) +#define MPFS_EMMCSD_SRS20_ECL_FE (1 << 23) +#define MPFS_EMMCSD_SRS20_EDEB_FE (1 << 22) +#define MPFS_EMMCSD_SRS20_EDCRC_FE (1 << 21) +#define MPFS_EMMCSD_SRS20_EDT_FE (1 << 20) +#define MPFS_EMMCSD_SRS20_ECI_FE (1 << 19) +#define MPFS_EMMCSD_SRS20_ECEB_FE (1 << 18) +#define MPFS_EMMCSD_SRS20_ECCRC_FE (1 << 17) +#define MPFS_EMMCSD_SRS20_ECT_FE (1 << 16) +#define MPFS_EMMCSD_SRS20_CNIACE_FE (1 << 7) +#define MPFS_EMMCSD_SRS20_ACIE_FE (1 << 4) +#define MPFS_EMMCSD_SRS20_ACEBE_FE (1 << 3) +#define MPFS_EMMCSD_SRS20_ACCE_FE (1 << 2) +#define MPFS_EMMCSD_SRS20_ACTE_FE (1 << 1) +#define MPFS_EMMCSD_SRS20_ACNE_FE (1 << 0) + +/* SRS21 register */ + +#define MPFS_EMMCSD_SRS21_EADMAL (1 << 2) +#define MPFS_EMMCSD_SRS21_EADMAS (0x3 << 0) + +/* SRS24 register */ + +#define MPFS_EMMCSD_SRS24_DSSPV_31_30 (0x3 << 30) +#define MPFS_EMMCSD_SRS24_HWINIT1 (0xf << 26) +#define MPFS_EMMCSD_SRS24_SDCFSPV_25_16 (0x3ff << 16) +#define MPFS_EMMCSD_SRS24_HWINIT0 (0xffff << 0) + +/* SRS25 register */ + +#define MPFS_EMMCSD_SRS25_DSSPV_31_30 (0x3 << 30) +#define MPFS_EMMCSD_SRS25_HWINIT1 (0xf << 26) +#define MPFS_EMMCSD_SRS25_SDCFSPV_25_16 (0x3ff << 16) +#define MPFS_EMMCSD_SRS25_DSSPV_15_14 (0x3 << 14) +#define MPFS_EMMCSD_SRS25_HWINIT0 (0xf << 10) +#define MPFS_EMMCSD_SRS25_SDCFSPV_09_00 (0x3ff << 0) + +/* SRS26 register */ + +#define MPFS_EMMCSD_SRS26_DSSPV_31_30 (0x3 << 30) +#define MPFS_EMMCSD_SRS26_HWINIT1 (0xf << 26) +#define MPFS_EMMCSD_SRS26_SDCFSPV_25_16 (0x3ff << 16) +#define MPFS_EMMCSD_SRS26_DSSPV_15_14 (0x3 << 14) +#define MPFS_EMMCSD_SRS26_HWINIT0 (0x7 << 11) +#define MPFS_EMMCSD_SRS26_CGSPV_10 (1 << 10) +#define MPFS_EMMCSD_SRS26_SDCFSPV_09_00 (0x3ff << 0) + +/* SRS27 register */ + +#define MPFS_EMMCSD_SRS27_DSSPV_31_30 (0x3 << 30) +#define MPFS_EMMCSD_SRS27_HWINIT1 (0xf << 26) +#define MPFS_EMMCSD_SRS27_SDCFSPV_25_16 (0x3ff << 16) +#define MPFS_EMMCSD_SRS27_DSSPV_15_14 (0x3 << 14) +#define MPFS_EMMCSD_SRS27_HWINIT0 (0xf << 10) +#define MPFS_EMMCSD_SRS27_SDCFSPV_09_00 (0x3ff << 0) + +/* SRS29 register */ + +#define MPFS_EMMCSD_SRS29_HWINIT1 (0xffff << 16) +#define MPFS_EMMCSD_SRS29_DSSPV_15_14 (0x3 << 14) +#define MPFS_EMMCSD_SRS29_HWINIT0 (0xf << 10) +#define MPFS_EMMCSD_SRS29_SDCFSPV_09_00 (0x3ff << 0) + +/* CQRS00 register */ + +#define MPFS_EMMCSD_CQRS00_CQVN1 (0xf << 8) +#define MPFS_EMMCSD_CQRS00_CQVN2 (0xf << 4) +#define MPFS_EMMCSD_CQRS00_CQVN3 (0xf << 0) + +/* CQRS01 register */ + +#define MPFS_EMMCSD_CQRS01_ITCFMUL (0xf << 12) +#define MPFS_EMMCSD_CQRS01_ITCFVAL (0x3ff << 0) + +/* CQRS02 register */ + +#define MPFS_EMMCSD_CQRS02_CQDCE (1 << 12) +#define MPFS_EMMCSD_CQRS02_CQTDS (1 << 8) +#define MPFS_EMMCSD_CQRS02_CQE (1 << 0) + +/* CQRS03 register */ + +#define MPFS_EMMCSD_CQRS03_CQCAT (1 << 8) +#define MPFS_EMMCSD_CQRS03_CQHLT (1 << 0) + +/* CQRS04 register */ + +#define MPFS_EMMCSD_CQRS04_CQTCL (1 << 3) +#define MPFS_EMMCSD_CQRS04_CQREDI (1 << 2) +#define MPFS_EMMCSD_CQRS04_CQTCC (1 << 1) +#define MPFS_EMMCSD_CQRS04_CQHAC (1 << 0) + +/* CQRS05 register */ + +#define MPFS_EMMCSD_CQRS05_CQTCLST (1 << 3) +#define MPFS_EMMCSD_CQRS05_CQREDST (1 << 2) +#define MPFS_EMMCSD_CQRS05_CQTCCST (1 << 1) +#define MPFS_EMMCSD_CQRS05_CQHACST (1 << 0) + +/* CQRS06 register */ + +#define MPFS_EMMCSD_CQRS06_CQTCLSI (1 << 3) +#define MPFS_EMMCSD_CQRS06_CQREDSI (1 << 2) +#define MPFS_EMMCSD_CQRS06_CQTCCSI (1 << 1) +#define MPFS_EMMCSD_CQRS06_CQHACSI (1 << 0) + +/* CQRS07 register */ + +#define MPFS_EMMCSD_CQRS07_CQICED (1 << 31) +#define MPFS_EMMCSD_CQRS07_CQICSB (1 << 20) +#define MPFS_EMMCSD_CQRS07_CQICCTR (1 << 16) +#define MPFS_EMMCSD_CQRS07_CQICCTHWEN (1 << 15) +#define MPFS_EMMCSD_CQRS07_CQICCTH (0x1f << 8) +#define MPFS_EMMCSD_CQRS07_CQICTOVALEN (1 << 7) +#define MPFS_EMMCSD_CQRS07_CQICTOVAL (0x7f << 0) + +/* CQRS10 register */ + +#define MPFS_EMMCSD_CQRS10_CQTD31 (1 << 31) +#define MPFS_EMMCSD_CQRS10_CQTD30 (1 << 30) +#define MPFS_EMMCSD_CQRS10_CQTD29 (1 << 29) +#define MPFS_EMMCSD_CQRS10_CQTD28 (1 << 28) +#define MPFS_EMMCSD_CQRS10_CQTD27 (1 << 27) +#define MPFS_EMMCSD_CQRS10_CQTD26 (1 << 26) +#define MPFS_EMMCSD_CQRS10_CQTD25 (1 << 25) +#define MPFS_EMMCSD_CQRS10_CQTD24 (1 << 24) +#define MPFS_EMMCSD_CQRS10_CQTD23 (1 << 23) +#define MPFS_EMMCSD_CQRS10_CQTD22 (1 << 22) +#define MPFS_EMMCSD_CQRS10_CQTD21 (1 << 21) +#define MPFS_EMMCSD_CQRS10_CQTD20 (1 << 20) +#define MPFS_EMMCSD_CQRS10_CQTD19 (1 << 19) +#define MPFS_EMMCSD_CQRS10_CQTD18 (1 << 18) +#define MPFS_EMMCSD_CQRS10_CQTD17 (1 << 17) +#define MPFS_EMMCSD_CQRS10_CQTD16 (1 << 16) +#define MPFS_EMMCSD_CQRS10_CQTD15 (1 << 15) +#define MPFS_EMMCSD_CQRS10_CQTD14 (1 << 14) +#define MPFS_EMMCSD_CQRS10_CQTD13 (1 << 13) +#define MPFS_EMMCSD_CQRS10_CQTD12 (1 << 12) +#define MPFS_EMMCSD_CQRS10_CQTD11 (1 << 11) +#define MPFS_EMMCSD_CQRS10_CQTD10 (1 << 10) +#define MPFS_EMMCSD_CQRS10_CQTD09 (1 << 9) +#define MPFS_EMMCSD_CQRS10_CQTD08 (1 << 8) +#define MPFS_EMMCSD_CQRS10_CQTD07 (1 << 7) +#define MPFS_EMMCSD_CQRS10_CQTD06 (1 << 6) +#define MPFS_EMMCSD_CQRS10_CQTD05 (1 << 5) +#define MPFS_EMMCSD_CQRS10_CQTD04 (1 << 4) +#define MPFS_EMMCSD_CQRS10_CQTD03 (1 << 3) +#define MPFS_EMMCSD_CQRS10_CQTD02 (1 << 2) +#define MPFS_EMMCSD_CQRS10_CQTD01 (1 << 1) +#define MPFS_EMMCSD_CQRS10_CQTD00 (1 << 0) + +/* CQRS11 register */ + +#define MPFS_EMMCSD_CQRS11_CQTCN31 (1 << 31) +#define MPFS_EMMCSD_CQRS11_CQTCN30 (1 << 30) +#define MPFS_EMMCSD_CQRS11_CQTCN29 (1 << 29) +#define MPFS_EMMCSD_CQRS11_CQTCN28 (1 << 28) +#define MPFS_EMMCSD_CQRS11_CQTCN27 (1 << 27) +#define MPFS_EMMCSD_CQRS11_CQTCN26 (1 << 26) +#define MPFS_EMMCSD_CQRS11_CQTCN25 (1 << 25) +#define MPFS_EMMCSD_CQRS11_CQTCN24 (1 << 24) +#define MPFS_EMMCSD_CQRS11_CQTCN23 (1 << 23) +#define MPFS_EMMCSD_CQRS11_CQTCN22 (1 << 22) +#define MPFS_EMMCSD_CQRS11_CQTCN21 (1 << 21) +#define MPFS_EMMCSD_CQRS11_CQTCN20 (1 << 20) +#define MPFS_EMMCSD_CQRS11_CQTCN19 (1 << 19) +#define MPFS_EMMCSD_CQRS11_CQTCN18 (1 << 18) +#define MPFS_EMMCSD_CQRS11_CQTCN17 (1 << 17) +#define MPFS_EMMCSD_CQRS11_CQTCN16 (1 << 16) +#define MPFS_EMMCSD_CQRS11_CQTCN15 (1 << 15) +#define MPFS_EMMCSD_CQRS11_CQTCN14 (1 << 14) +#define MPFS_EMMCSD_CQRS11_CQTCN13 (1 << 13) +#define MPFS_EMMCSD_CQRS11_CQTCN12 (1 << 12) +#define MPFS_EMMCSD_CQRS11_CQTCN11 (1 << 11) +#define MPFS_EMMCSD_CQRS11_CQTCN10 (1 << 10) +#define MPFS_EMMCSD_CQRS11_CQTCN09 (1 << 9) +#define MPFS_EMMCSD_CQRS11_CQTCN08 (1 << 8) +#define MPFS_EMMCSD_CQRS11_CQTCN07 (1 << 7) +#define MPFS_EMMCSD_CQRS11_CQTCN06 (1 << 6) +#define MPFS_EMMCSD_CQRS11_CQTCN05 (1 << 5) +#define MPFS_EMMCSD_CQRS11_CQTCN04 (1 << 4) +#define MPFS_EMMCSD_CQRS11_CQTCN03 (1 << 3) +#define MPFS_EMMCSD_CQRS11_CQTCN02 (1 << 2) +#define MPFS_EMMCSD_CQRS11_CQTCN01 (1 << 1) +#define MPFS_EMMCSD_CQRS11_CQTCN00 (1 << 0) + +/* CQRS13 register */ + +#define MPFS_EMMCSD_CQRS13_CQDPT31 (1 << 31) +#define MPFS_EMMCSD_CQRS13_CQDPT30 (1 << 30) +#define MPFS_EMMCSD_CQRS13_CQDPT29 (1 << 29) +#define MPFS_EMMCSD_CQRS13_CQDPT28 (1 << 28) +#define MPFS_EMMCSD_CQRS13_CQDPT27 (1 << 27) +#define MPFS_EMMCSD_CQRS13_CQDPT26 (1 << 26) +#define MPFS_EMMCSD_CQRS13_CQDPT25 (1 << 25) +#define MPFS_EMMCSD_CQRS13_CQDPT24 (1 << 24) +#define MPFS_EMMCSD_CQRS13_CQDPT23 (1 << 23) +#define MPFS_EMMCSD_CQRS13_CQDPT22 (1 << 22) +#define MPFS_EMMCSD_CQRS13_CQDPT21 (1 << 21) +#define MPFS_EMMCSD_CQRS13_CQDPT20 (1 << 20) +#define MPFS_EMMCSD_CQRS13_CQDPT19 (1 << 19) +#define MPFS_EMMCSD_CQRS13_CQDPT18 (1 << 18) +#define MPFS_EMMCSD_CQRS13_CQDPT17 (1 << 17) +#define MPFS_EMMCSD_CQRS13_CQDPT16 (1 << 16) +#define MPFS_EMMCSD_CQRS13_CQDPT15 (1 << 15) +#define MPFS_EMMCSD_CQRS13_CQDPT14 (1 << 14) +#define MPFS_EMMCSD_CQRS13_CQDPT13 (1 << 13) +#define MPFS_EMMCSD_CQRS13_CQDPT12 (1 << 12) +#define MPFS_EMMCSD_CQRS13_CQDPT11 (1 << 11) +#define MPFS_EMMCSD_CQRS13_CQDPT10 (1 << 10) +#define MPFS_EMMCSD_CQRS13_CQDPT09 (1 << 9) +#define MPFS_EMMCSD_CQRS13_CQDPT08 (1 << 8) +#define MPFS_EMMCSD_CQRS13_CQDPT07 (1 << 7) +#define MPFS_EMMCSD_CQRS13_CQDPT06 (1 << 6) +#define MPFS_EMMCSD_CQRS13_CQDPT05 (1 << 5) +#define MPFS_EMMCSD_CQRS13_CQDPT04 (1 << 4) +#define MPFS_EMMCSD_CQRS13_CQDPT03 (1 << 3) +#define MPFS_EMMCSD_CQRS13_CQDPT02 (1 << 2) +#define MPFS_EMMCSD_CQRS13_CQDPT01 (1 << 1) +#define MPFS_EMMCSD_CQRS13_CQDPT00 (1 << 0) + +/* CQRS14 register */ + +#define MPFS_EMMCSD_CQRS14_CQTC31 (1 << 31) +#define MPFS_EMMCSD_CQRS14_CQTC30 (1 << 30) +#define MPFS_EMMCSD_CQRS14_CQTC29 (1 << 29) +#define MPFS_EMMCSD_CQRS14_CQTC28 (1 << 28) +#define MPFS_EMMCSD_CQRS14_CQTC27 (1 << 27) +#define MPFS_EMMCSD_CQRS14_CQTC26 (1 << 26) +#define MPFS_EMMCSD_CQRS14_CQTC25 (1 << 25) +#define MPFS_EMMCSD_CQRS14_CQTC24 (1 << 24) +#define MPFS_EMMCSD_CQRS14_CQTC23 (1 << 23) +#define MPFS_EMMCSD_CQRS14_CQTC22 (1 << 22) +#define MPFS_EMMCSD_CQRS14_CQTC21 (1 << 21) +#define MPFS_EMMCSD_CQRS14_CQTC20 (1 << 20) +#define MPFS_EMMCSD_CQRS14_CQTC19 (1 << 19) +#define MPFS_EMMCSD_CQRS14_CQTC18 (1 << 18) +#define MPFS_EMMCSD_CQRS14_CQTC17 (1 << 17) +#define MPFS_EMMCSD_CQRS14_CQTC16 (1 << 16) +#define MPFS_EMMCSD_CQRS14_CQTC15 (1 << 15) +#define MPFS_EMMCSD_CQRS14_CQTC14 (1 << 14) +#define MPFS_EMMCSD_CQRS14_CQTC13 (1 << 13) +#define MPFS_EMMCSD_CQRS14_CQTC12 (1 << 12) +#define MPFS_EMMCSD_CQRS14_CQTC11 (1 << 11) +#define MPFS_EMMCSD_CQRS14_CQTC10 (1 << 10) +#define MPFS_EMMCSD_CQRS14_CQTC09 (1 << 9) +#define MPFS_EMMCSD_CQRS14_CQTC08 (1 << 8) +#define MPFS_EMMCSD_CQRS14_CQTC07 (1 << 7) +#define MPFS_EMMCSD_CQRS14_CQTC06 (1 << 6) +#define MPFS_EMMCSD_CQRS14_CQTC05 (1 << 5) +#define MPFS_EMMCSD_CQRS14_CQTC04 (1 << 4) +#define MPFS_EMMCSD_CQRS14_CQTC03 (1 << 3) +#define MPFS_EMMCSD_CQRS14_CQTC02 (1 << 2) +#define MPFS_EMMCSD_CQRS14_CQTC01 (1 << 1) +#define MPFS_EMMCSD_CQRS14_CQTC00 (1 << 0) + +/* CQRS16 register */ + +#define MPFS_EMMCSD_CQRS16_CQSSCBC (0xf << 16) +#define MPFS_EMMCSD_CQRS16_CQSSCIT (0xffff << 0) + +/* CQRS21 register */ + +#define MPFS_EMMCSD_CQRS21_CQDTEFV (1 << 31) +#define MPFS_EMMCSD_CQRS21_CQDTETID (0x1f << 24) +#define MPFS_EMMCSD_CQRS21_CQDTECI (0x3f << 16) +#define MPFS_EMMCSD_CQRS21_CQRMEFV (1 << 15) +#define MPFS_EMMCSD_CQRS21_CQRMETID (0x1f << 8) +#define MPFS_EMMCSD_CQRS21_CQRMECI (0x3f << 0) + +/* CQRS22 register */ + +#define MPFS_EMMCSD_CQRS22_CQLCRI (0x3f << 0) + +#endif /* __ARCH_RISCV_SRC_MPFS_HARDWARE_MPFS_EMMCSD_H */ diff --git a/arch/risc-v/src/mpfs/hardware/mpfs_sysreg.h b/arch/risc-v/src/mpfs/hardware/mpfs_sysreg.h index c74753fb96c..3067cb48c4c 100755 --- a/arch/risc-v/src/mpfs/hardware/mpfs_sysreg.h +++ b/arch/risc-v/src/mpfs/hardware/mpfs_sysreg.h @@ -137,108 +137,346 @@ /* Register bit field definitions *******************************************/ -/* Master clock configuration */ - -#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_SHIFT (0) /* Bits: 0-5: master synchronous clock divider */ -#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_MASK (0x3f << SYSREG_CLOCK_CONFIG_CR_DIVIDER_SHIFT) -#define SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ_SHIFT (8) /* Bit: 8: enable the 1mHz (2MHz) on-chip oscillator */ -#define SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ_MASK (1 << SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ_SHIFT) -#define SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ (1 << SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ_SHIFT) - -/* RTC clock divider */ - -#define SYSREG_RTC_CLOCK_CR_PERIOD_SHIFT (0) /* Bits: 0-11: period */ -#define SYSREG_RTC_CLOCK_CR_PERIOD_MASK (0xfff << SYSREG_CLOCK_CONFIG_CR_DIVIDER_SHIFT) -#define SYSREG_RTC_CLOCK_CR_ENABLE_SHIFT (16) /* Bit: 16: RTC Clock enable */ -#define SYSREG_RTC_CLOCK_CR_ENABLE_MASK (1 << SYSREG_CLOCK_CONFIG_CR_DIVIDER_SHIFT) -#define SYSREG_RTC_CLOCK_CR_ENABLE (1 << SYSREG_CLOCK_CONFIG_CR_DIVIDER_SHIFT) - -/* TODO: - * FABRIC_RESET_CR - * BOOT_FAIL_CR - * MSS_RESET_CR - * CONFIG_LOCK_CR - * RESET_SR - * DEVICE_STATUS - * MSS_BUILD - * FAB_INTEN_U54_1 - * FAB_INTEN_U54_2 - * FAB_INTEN_U54_3 - * FAB_INTEN_U54_4 - * FAB_INTEN_MISC - * GPIO_INTERRUPT_FAB_CR - * APBBUS_CR +/* CLOCK_CONFIG_CR: + * Master clock configuration. */ -/* Enables the clock to the MSS peripheral */ +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_SHIFT (0) /* Bits: 0-5: master synchronous clock divider */ +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_MASK (0x3f << SYSREG_CLOCK_CONFIG_CR_DIVIDER_SHIFT) +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_CPU_SHIFT (0) /* Bits 0-1: CPU clock divider (Reset=/1 =0) */ +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_CPU_MASK (3) +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_CPU(x) ((x & SYSREG_CLOCK_CONFIG_CR_DIVIDER_CPU_MASK) << SYSREG_CLOCK_CONFIG_CR_DIVIDER_CPU_SHIFT) +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_AXI_SHIFT (2) /* Bits 2-3: AXI clock divider (Reset=/1 =0) */ +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_AXI_MASK (3 << SYSREG_CLOCK_CONFIG_CR_DIVIDER_AXI_SHIFT) +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_AXI(x) ((x & SYSREG_CLOCK_CONFIG_CR_DIVIDER_AXI_MASK) << SYSREG_CLOCK_CONFIG_CR_DIVIDER_AXI_SHIFT) +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_AHB_SHIFT (2) /* Bits 4-5: AHB/APB clock divider (Reset=/2 =1) */ +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_AHB_MASK (3 << SYSREG_CLOCK_CONFIG_CR_DIVIDER_AHB_SHIFT) +#define SYSREG_CLOCK_CONFIG_CR_DIVIDER_AHB(x) ((x & SYSREG_CLOCK_CONFIG_CR_DIVIDER_AHB_MASK) << SYSREG_CLOCK_CONFIG_CR_DIVIDER_AHB_SHIFT) +#define SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ_SHIFT (8) /* Bit: 8: enable the 1mHz (2MHz) on-chip oscillator */ +#define SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ_MASK (1 << SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ_SHIFT) +#define SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ (1 << SYSREG_CLOCK_CONFIG_CR_ENABLE_1MHZ_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_SHIFT (0) /* Bit: 0-29: Clock enable (17 is reserved) */ -#define SYSREG_SUBBLK_CLOCK_CR_MASK (0x3ffdffff << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_ENVM (0 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_MAC0 (1 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_MAC1 (2 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_MMC (3 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_TIMER (4 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_MMUART0 (5 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_MMUART1 (6 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_MMUART2 (7 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_MMUART3 (8 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_MMUART4 (9 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_SPI0 (10 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_SPI1 (11 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_I2C0 (12 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_I2C1 (13 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_CAN0 (14 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_CAN1 (15 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_USB (16 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_RTC (18 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_QSPI (19 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_GPIO0 (20 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_GPIO1 (21 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_GPIO2 (22 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_DDRC (23 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_FIC0 (24 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_FIC1 (25 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_FIC2 (26 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_FIC3 (27 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_ATHENA (28 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SUBBLK_CLOCK_CR_CFM (29 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) +/* RTC_CLOCK_CR: + * RTC clock divider. + */ + +#define SYSREG_RTC_CLOCK_CR_PERIOD_SHIFT (0) /* Bits: 0-11: period */ +#define SYSREG_RTC_CLOCK_CR_PERIOD_MASK (0xfff << SYSREG_RTC_CLOCK_CR_PERIOD_SHIFT) +#define SYSREG_RTC_CLOCK_CR_ENABLE_SHIFT (16) /* Bit: 16: RTC Clock enable */ +#define SYSREG_RTC_CLOCK_CR_ENABLE_MASK (1 << SYSREG_RTC_CLOCK_CR_ENABLE_SHIFT) +#define SYSREG_RTC_CLOCK_CR_ENABLE (1 << SYSREG_RTC_CLOCK_CR_ENABLE_SHIFT) + +/* FABRIC_RESET_CR: + * Fabric Reset mask. + */ + +#define SYSREG_FABRIC_RESET_CR_SHIFT (0) /* Bit: 0: Enable */ +#define SYSREG_FABRIC_RESET_CR_MASK (1 << SYSREG_FABRIC_RESET_CR_SHIFT) +#define SYSREG_FABRIC_RESET_CR_ENABLE (1 << SYSREG_FABRIC_RESET_CR_SHIFT) + +/* BOOT_FAIL_CR: + * Written by firmware to indicate that the boot process failed, + * drives the fab_boot_fail signal to the fabric. + * Is cleared by the fabric asserting fab_boot_fail_clear + */ + +#define SYSREG_BOOT_FAIL_CR_SHIFT (0) /* Bit: 0: Boot Failed */ +#define SYSREG_BOOT_FAIL_CR_MASK (1 << SYSREG_BOOT_FAIL_CR_SHIFT) +#define SYSREG_BOOT_FAIL_CR_BOOT (1 << SYSREG_BOOT_FAIL_CR_SHIFT) + +/* MSS_RESET_CR: + * Allows the CPU to fully reset the MSS. + */ + +#define SYSREG_MSS_RESET_CR_SHIFT (0) /* Bits: 0-15: Reset */ +#define SYSREG_MSS_RESET_CR_MASK (0xffff << SYSREG_MSS_RESET_CR_SHIFT) +#define SYSREG_MSS_RESET_CR_RESET_VALUE (0xdead << SYSREG_MSS_RESET_CR_SHIFT) + +/* CONFIG_LOCK_CR: + * Configuration Lock. When written to '1' will cause all RWC registers + * to lock until a master reset occurs. + */ + +#define SYSREG_CONFIG_LOCK_CR_SHIFT (0) /* Bit: 0: Lock */ +#define SYSREG_CONFIG_LOCK_CR_MASK (1 << SYSREG_CONFIG_LOCK_CR_SHIFT) +#define SYSREG_CONFIG_LOCK_CR_LOCK (1 << SYSREG_CONFIG_LOCK_CR_SHIFT) + +/* RESET_SR: + * Indicates which reset caused the last reset. + * After a reset occurs register should be read and then zero written to + * allow the next reset event to be correctly captured + */ + +#define SYSREG_RESET_SR_SCB_PERIPH_SHIFT (0) /* Bit: 0: Reset by SCB */ +#define SYSREG_RESET_SR_SCB_PERIPH_MASK (1 << SYSREG_RESET_SR_SCB_PERIPH_SHIFT) +#define SYSREG_RESET_SR_SCB_PERIPH (1 << SYSREG_RESET_SR_SCB_PERIPH_SHIFT) +#define SYSREG_RESET_SR_SCB_MSS_SHIFT (1) /* Bit: 1: Reset by SCB MSS */ +#define SYSREG_RESET_SR_SCB_MSS_MASK (1 << SYSREG_RESET_SR_SCB_MSS_SHIFT) +#define SYSREG_RESET_SR_SCB_MSS (1 << SYSREG_RESET_SR_SCB_MSS_SHIFT) +#define SYSREG_RESET_SR_SCB_CPU_SHIFT (2) /* Bit: 2: Reset by SCB CPU */ +#define SYSREG_RESET_SR_SCB_CPU_MASK (1 << SYSREG_RESET_SR_SCB_CPU_SHIFT) +#define SYSREG_RESET_SR_SCB_CPU (1 << SYSREG_RESET_SR_SCB_CPU_SHIFT) +#define SYSREG_RESET_SR_DEBUGGER_SHIFT (3) /* Bit: 3: Reset by Debugger */ +#define SYSREG_RESET_SR_DEBUGGER_MASK (1 << SYSREG_RESET_SR_DEBUGGER_SHIFT) +#define SYSREG_RESET_SR_DEBUGGER (1 << SYSREG_RESET_SR_DEBUGGER_SHIFT) +#define SYSREG_RESET_SR_FABRIC_SHIFT (4) /* Bit: 4: Reset by Fabric */ +#define SYSREG_RESET_SR_FABRIC_MASK (1 << SYSREG_RESET_SR_FABRIC_SHIFT) +#define SYSREG_RESET_SR_FABRIC (1 << SYSREG_RESET_SR_FABRIC_SHIFT) +#define SYSREG_RESET_SR_WDOG_SHIFT (5) /* Bit: 5: Reset by Watchdog */ +#define SYSREG_RESET_SR_WDOG_MASK (1 << SYSREG_RESET_SR_WDOG_SHIFT) +#define SYSREG_RESET_SR_WDOG (1 << SYSREG_RESET_SR_WDOG_SHIFT) +#define SYSREG_RESET_SR_GPIO_SHIFT (6) /* Bit: 6: fabric asserted the GPIO reset inputs */ +#define SYSREG_RESET_SR_GPIO_MASK (1 << SYSREG_RESET_SR_GPIO_SHIFT) +#define SYSREG_RESET_SR_GPIO (1 << SYSREG_RESET_SR_GPIO_SHIFT) +#define SYSREG_RESET_SR_SCB_BUS_SHIFT (7) /* Bit: 6: SCB bus reset occurred */ +#define SYSREG_RESET_SR_SCB_BUS_MASK (1 << SYSREG_RESET_SR_SCB_BUS_SHIFT) +#define SYSREG_RESET_SR_SCB_BUS (1 << SYSREG_RESET_SR_SCB_BUS_SHIFT) +#define SYSREG_RESET_SR_CPU_SOFT_SHIFT (8) /* Bit: 6: CPU reset with soft reset register */ +#define SYSREG_RESET_SR_CPU_SOFT_MASK (1 << SYSREG_RESET_SR_CPU_SOFT_SHIFT) +#define SYSREG_RESET_SR_CPU_SOFT (1 << SYSREG_RESET_SR_CPU_SOFT_SHIFT) + +/* DEVICE_STATUS: + * Indicates the device status, in particular the state of + * the FPGA fabric and the MSS IO banks + */ + +#define SYSREG_DEVICE_STATUS_CURE_UP_SHIFT (0) /* Bit: 0: core_up input from G5 Control */ +#define SYSREG_DEVICE_STATUS_CURE_UP_MASK (1 << SYSREG_DEVICE_STATUS_CURE_UP_SHIFT) +#define SYSREG_DEVICE_STATUS_CURE_UP (1 << SYSREG_DEVICE_STATUS_CURE_UP_SHIFT) +#define SYSREG_DEVICE_STATUS_LP_STATE_SHIFT (1) /* Bit: 1: lp_state input from G5 Control */ +#define SYSREG_DEVICE_STATUS_LP_STATE_MASK (1 << SYSREG_DEVICE_STATUS_LP_STATE_SHIFT) +#define SYSREG_DEVICE_STATUS_LP_STATE (1 << SYSREG_DEVICE_STATUS_LP_STATE_SHIFT) +#define SYSREG_DEVICE_STATUS_FF_IN_PROGRESS_SHIFT (2) /* Bit: 2: ff_in_progress input from G5 Control */ +#define SYSREG_DEVICE_STATUS_FF_IN_PROGRESS_MASK (1 << SYSREG_DEVICE_STATUS_FF_IN_PROGRESS_SHIFT) +#define SYSREG_DEVICE_STATUS_FF_IN_PROGRESS (1 << SYSREG_DEVICE_STATUS_FF_IN_PROGRESS_SHIFT) +#define SYSREG_DEVICE_STATUS_FLASH_VALID_SHIFT (3) /* Bit: 3: flash_valid input from G5 Control */ +#define SYSREG_DEVICE_STATUS_FLASH_VALID_MASK (1 << SYSREG_DEVICE_STATUS_FLASH_VALID_SHIFT) +#define SYSREG_DEVICE_STATUS_FLASH_VALID (1 << SYSREG_DEVICE_STATUS_FLASH_VALID_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_BANK_B2_SHIFT (8) /* Bit: 8: Power status of IO bank 2 */ +#define SYSREG_DEVICE_STATUS_IO_BANK_B2_MASK (1 << SYSREG_DEVICE_STATUS_IO_BANK_B2_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_BANK_B2 (1 << SYSREG_DEVICE_STATUS_IO_BANK_B2_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_BANK_B4_SHIFT (9) /* Bit: 9: Power status of IO bank 4 */ +#define SYSREG_DEVICE_STATUS_IO_BANK_B4_MASK (1 << SYSREG_DEVICE_STATUS_IO_BANK_B4_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_BANK_B4 (1 << SYSREG_DEVICE_STATUS_IO_BANK_B4_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_BANK_B5_SHIFT (10) /* Bit: 10: Power status of IO bank 5 */ +#define SYSREG_DEVICE_STATUS_IO_BANK_B5_MASK (1 << SYSREG_DEVICE_STATUS_IO_BANK_B5_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_BANK_B5 (1 << SYSREG_DEVICE_STATUS_IO_BANK_B5_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_BANK_B6_SHIFT (11) /* Bit: 11: Power status of IO bank 6 */ +#define SYSREG_DEVICE_STATUS_IO_BANK_B6_MASK (1 << SYSREG_DEVICE_STATUS_IO_BANK_B6_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_BANK_B6 (1 << SYSREG_DEVICE_STATUS_IO_BANK_B6_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_EN_SHIFT (12) /* Bit: 12: status of the io_en input from G5 Control. */ +#define SYSREG_DEVICE_STATUS_IO_EN_MASK (1 << SYSREG_DEVICE_STATUS_IO_EN_SHIFT) +#define SYSREG_DEVICE_STATUS_IO_EN (1 << SYSREG_DEVICE_STATUS_IO_EN_SHIFT) + +/* MSS_BUILD: + * SVN revision of the pfsoc_mss_main.sv + */ + +#define SYSREG_MSS_BUILD_REVISION_SHIFT (0) /* Bits: 0-31: revision */ + +/* FAB_INTEN_U54_1: + * U54-1 Fabric interrupt enable + * Enables the F2H_interrupts[31:0] to interrupt U54_1 directly + */ + +#define SYSREG_FAB_INTEN_U54_1_EN(x) (1 << x) + +/* U54-2 Fabric interrupt enable: + * Enables the F2H_interrupts[31:0] to interrupt U54_2 directly + */ + +#define SYSREG_FAB_INTEN_U54_2_EN(x) (1 << x) + +/* U54-3 Fabric interrupt enable: + * Enables the F2H_interrupts[31:0] to interrupt U54_3 directly + */ + +#define SYSREG_FAB_INTEN_U54_3_EN(x) (1 << x) + +/* U54-4 Fabric interrupt enable: + * Enables the F2H_interrupts[31:0] to interrupt U54_4 directly + */ + +#define SYSREG_FAB_INTEN_U54_4_EN(x) (1 << x) + +/* FAB_INTEN_MISC: Allows the Ethernet interrupts to be directly + * routed to the U54 CPUS + */ + +#define SYSREG_FAB_INTEN_MISC_MAC0_U54_1_SHIFT (0) /* Bit: 0: MAC0 to interrupt U54_1 directly */ +#define SYSREG_FAB_INTEN_MISC_MAC0_U54_1_MASK (1 << SYSREG_FAB_INTEN_MISC_MAC0_U54_1_SHIFT) +#define SYSREG_FAB_INTEN_MISC_MAC0_U54_1 (1 << SYSREG_FAB_INTEN_MISC_MAC0_U54_1_SHIFT) +#define SYSREG_FAB_INTEN_MISC_MAC0_U54_2_SHIFT (1) /* Bit: 1: MAC0 to interrupt U54_2 directly */ +#define SYSREG_FAB_INTEN_MISC_MAC0_U54_2_MASK (1 << SYSREG_FAB_INTEN_MISC_MAC0_U54_2_SHIFT) +#define SYSREG_FAB_INTEN_MISC_MAC0_U54_2 (1 << SYSREG_FAB_INTEN_MISC_MAC0_U54_2_SHIFT) +#define SYSREG_FAB_INTEN_MISC_MAC1_U54_3_SHIFT (0) /* Bit: 0: MAC0 to interrupt U54_3 directly */ +#define SYSREG_FAB_INTEN_MISC_MAC1_U54_3_MASK (1 << SYSREG_FAB_INTEN_MISC_MAC1_U54_3_SHIFT) +#define SYSREG_FAB_INTEN_MISC_MAC1_U54_3 (1 << SYSREG_FAB_INTEN_MISC_MAC1_U54_3_SHIFT) +#define SYSREG_FAB_INTEN_MISC_MAC1_U54_4_SHIFT (1) /* Bit: 1: MAC0 to interrupt U54_4 directly */ +#define SYSREG_FAB_INTEN_MISC_MAC1_U54_4_MASK (1 << SYSREG_FAB_INTEN_MISC_MAC1_U54_4_SHIFT) +#define SYSREG_FAB_INTEN_MISC_MAC1_U54_4 (1 << SYSREG_FAB_INTEN_MISC_MAC1_U54_4_SHIFT) + +/* GPIO_INTERRUPT_FAB_CR: Switches GPIO interrupt from PAD to Fabric GPIO + * Setting these bits will disable the Pad interrupt, and enable the fabric + * GPIO interrupt for bits 31:0. When the bit is set the Pad interrupt will + * be ORED into the GPIO0 & GPIO1 non-direct interrupts. When the bit is not + * set the Fabric interrupt is ORED into the GPIO2 non-direct interrupt. + * To prevent ORING the interrupt should not be enabled in the GPIO block. + */ + +#define SYSREG_GPIO_INTERRUPT_FAB_CR(x) (1 << x) + +/* APBBUS_CR: AMP Mode peripheral mapping register + * When the register bit is '0' the peripheral is mapped into the 0x02000000 + * address range using AXI bus 5 from the Coreplex. + * When the register bit is '1' the peripheral is mapped into the 0x28000000 + * address range using AXI bus 6 from the Coreplex. + */ + +#define SYSREG_APBBUS_CR_MMUART0_SHIFT (0) +#define SYSREG_APBBUS_CR_MMUART0_MASK (1 << SYSREG_APBBUS_CR_MMUART0_SHIFT) +#define SYSREG_APBBUS_CR_MMUART0 (1 << SYSREG_APBBUS_CR_MMUART0_SHIFT) +#define SYSREG_APBBUS_CR_MMUART1_SHIFT (1) +#define SYSREG_APBBUS_CR_MMUART1_MASK (1 << SYSREG_APBBUS_CR_MMUART1_SHIFT) +#define SYSREG_APBBUS_CR_MMUART1 (1 << SYSREG_APBBUS_CR_MMUART1_SHIFT) +#define SYSREG_APBBUS_CR_MMUART2_SHIFT (2) +#define SYSREG_APBBUS_CR_MMUART2_MASK (1 << SYSREG_APBBUS_CR_MMUART2_SHIFT) +#define SYSREG_APBBUS_CR_MMUART2 (1 << SYSREG_APBBUS_CR_MMUART2_SHIFT) +#define SYSREG_APBBUS_CR_MMUART3_SHIFT (3) +#define SYSREG_APBBUS_CR_MMUART3_MASK (1 << SYSREG_APBBUS_CR_MMUART3_SHIFT) +#define SYSREG_APBBUS_CR_MMUART3 (1 << SYSREG_APBBUS_CR_MMUART3_SHIFT) +#define SYSREG_APBBUS_CR_MMUART4_SHIFT (4) +#define SYSREG_APBBUS_CR_MMUART4_MASK (1 << SYSREG_APBBUS_CR_MMUART4_SHIFT) +#define SYSREG_APBBUS_CR_MMUART4 (1 << SYSREG_APBBUS_CR_MMUART4_SHIFT) +#define SYSREG_APBBUS_CR_WDOG0_SHIFT (5) +#define SYSREG_APBBUS_CR_WDOG0_MASK (1 << SYSREG_APBBUS_CR_WDOG0_SHIFT) +#define SYSREG_APBBUS_CR_WDOG0 (1 << SYSREG_APBBUS_CR_WDOG0_SHIFT) +#define SYSREG_APBBUS_CR_WDOG1_SHIFT (6) +#define SYSREG_APBBUS_CR_WDOG1_MASK (1 << SYSREG_APBBUS_CR_WDOG1_SHIFT) +#define SYSREG_APBBUS_CR_WDOG1 (1 << SYSREG_APBBUS_CR_WDOG1_SHIFT) +#define SYSREG_APBBUS_CR_WDOG2_SHIFT (7) +#define SYSREG_APBBUS_CR_WDOG2_MASK (1 << SYSREG_APBBUS_CR_WDOG2_SHIFT) +#define SYSREG_APBBUS_CR_WDOG2 (1 << SYSREG_APBBUS_CR_WDOG2_SHIFT) +#define SYSREG_APBBUS_CR_WDOG3_SHIFT (8) +#define SYSREG_APBBUS_CR_WDOG3_MASK (1 << SYSREG_APBBUS_CR_WDOG3_SHIFT) +#define SYSREG_APBBUS_CR_WDOG3 (1 << SYSREG_APBBUS_CR_WDOG3_SHIFT) +#define SYSREG_APBBUS_CR_WDOG4_SHIFT (9) +#define SYSREG_APBBUS_CR_WDOG4_MASK (1 << SYSREG_APBBUS_CR_WDOG4_SHIFT) +#define SYSREG_APBBUS_CR_WDOG4 (1 << SYSREG_APBBUS_CR_WDOG4_SHIFT) +#define SYSREG_APBBUS_CR_SPI0_SHIFT (10) +#define SYSREG_APBBUS_CR_SPI0_MASK (1 << SYSREG_APBBUS_CR_SPI0_SHIFT) +#define SYSREG_APBBUS_CR_SPI0 (1 << SYSREG_APBBUS_CR_SPI0_SHIFT) +#define SYSREG_APBBUS_CR_SPI1_SHIFT (11) +#define SYSREG_APBBUS_CR_SPI1_MASK (1 << SYSREG_APBBUS_CR_SPI1_SHIFT) +#define SYSREG_APBBUS_CR_SPI1 (1 << SYSREG_APBBUS_CR_SPI1_SHIFT) +#define SYSREG_APBBUS_CR_I2C0_SHIFT (12) +#define SYSREG_APBBUS_CR_I2C0_MASK (1 << SYSREG_APBBUS_CR_I2C0_SHIFT) +#define SYSREG_APBBUS_CR_I2C0 (1 << SYSREG_APBBUS_CR_I2C0_SHIFT) +#define SYSREG_APBBUS_CR_I2C1_SHIFT (13) +#define SYSREG_APBBUS_CR_I2C1_MASK (1 << SYSREG_APBBUS_CR_I2C1_SHIFT) +#define SYSREG_APBBUS_CR_I2C1 (1 << SYSREG_APBBUS_CR_I2C1_SHIFT) +#define SYSREG_APBBUS_CR_CAN0_SHIFT (14) +#define SYSREG_APBBUS_CR_CAN0_MASK (1 << SYSREG_APBBUS_CR_CAN0_SHIFT) +#define SYSREG_APBBUS_CR_CAN0 (1 << SYSREG_APBBUS_CR_CAN0_SHIFT) +#define SYSREG_APBBUS_CR_CAN1_SHIFT (15) +#define SYSREG_APBBUS_CR_CAN1_MASK (1 << SYSREG_APBBUS_CR_CAN1_SHIFT) +#define SYSREG_APBBUS_CR_CAN1 (1 << SYSREG_APBBUS_CR_CAN1_SHIFT) +#define SYSREG_APBBUS_CR_GEM0_SHIFT (16) +#define SYSREG_APBBUS_CR_GEM0_MASK (1 << SYSREG_APBBUS_CR_GEM0_SHIFT) +#define SYSREG_APBBUS_CR_GEM0 (1 << SYSREG_APBBUS_CR_GEM0_SHIFT) +#define SYSREG_APBBUS_CR_GEM1_SHIFT (17) +#define SYSREG_APBBUS_CR_GEM1_MASK (1 << SYSREG_APBBUS_CR_GEM1_SHIFT) +#define SYSREG_APBBUS_CR_GEM1 (1 << SYSREG_APBBUS_CR_GEM1_SHIFT) +#define SYSREG_APBBUS_CR_TIMER_SHIFT (18) +#define SYSREG_APBBUS_CR_TIMER_MASK (1 << SYSREG_APBBUS_CR_TIMER_SHIFT) +#define SYSREG_APBBUS_CR_TIMER (1 << SYSREG_APBBUS_CR_TIMER_SHIFT) +#define SYSREG_APBBUS_CR_GPIO0_SHIFT (19) +#define SYSREG_APBBUS_CR_GPIO0_MASK (1 << SYSREG_APBBUS_CR_GPIO0_SHIFT) +#define SYSREG_APBBUS_CR_GPIO0 (1 << SYSREG_APBBUS_CR_GPIO0_SHIFT) +#define SYSREG_APBBUS_CR_GPIO1_SHIFT (20) +#define SYSREG_APBBUS_CR_GPIO1_MASK (1 << SYSREG_APBBUS_CR_GPIO1_SHIFT) +#define SYSREG_APBBUS_CR_GPIO1 (1 << SYSREG_APBBUS_CR_GPIO1_SHIFT) +#define SYSREG_APBBUS_CR_GPIO2_SHIFT (21) +#define SYSREG_APBBUS_CR_GPIO2_MASK (1 << SYSREG_APBBUS_CR_GPIO2_SHIFT) +#define SYSREG_APBBUS_CR_GPIO2 (1 << SYSREG_APBBUS_CR_GPIO2_SHIFT) +#define SYSREG_APBBUS_CR_RTC_SHIFT (22) +#define SYSREG_APBBUS_CR_RTC_MASK (1 << SYSREG_APBBUS_CR_RTC_SHIFT) +#define SYSREG_APBBUS_CR_RTC (1 << SYSREG_APBBUS_CR_RTC_SHIFT) +#define SYSREG_APBBUS_H2FINT_SHIFT (23) +#define SYSREG_APBBUS_H2FINT_MASK (1 << SYSREG_APBBUS_H2FINT_SHIFT) +#define SYSREG_APBBUS_H2FINT (1 << SYSREG_APBBUS_H2FINT_SHIFT) + +/* SUBBLK_CLOCK_CR: + * Enables the clock to the MSS peripheral. + */ + +#define SYSREG_SUBBLK_CLOCK_CR_SHIFT (0) /* Bit: 0-29: Clock enable (17 is reserved) */ +#define SYSREG_SUBBLK_CLOCK_CR_MASK (0x3ffdffff << SYSREG_SUBBLK_CLOCK_CR_SHIFT) +#define SYSREG_SUBBLK_CLOCK_CR_ENVM (1 << 0) +#define SYSREG_SUBBLK_CLOCK_CR_MAC0 (1 << 1) +#define SYSREG_SUBBLK_CLOCK_CR_MAC1 (1 << 2) +#define SYSREG_SUBBLK_CLOCK_CR_MMC (1 << 3) +#define SYSREG_SUBBLK_CLOCK_CR_TIMER (1 << 4) +#define SYSREG_SUBBLK_CLOCK_CR_MMUART0 (1 << 5) +#define SYSREG_SUBBLK_CLOCK_CR_MMUART1 (1 << 6) +#define SYSREG_SUBBLK_CLOCK_CR_MMUART2 (1 << 7) +#define SYSREG_SUBBLK_CLOCK_CR_MMUART3 (1 << 8) +#define SYSREG_SUBBLK_CLOCK_CR_MMUART4 (1 << 9) +#define SYSREG_SUBBLK_CLOCK_CR_SPI0 (1 << 10) +#define SYSREG_SUBBLK_CLOCK_CR_SPI1 (1 << 11) +#define SYSREG_SUBBLK_CLOCK_CR_I2C0 (1 << 12) +#define SYSREG_SUBBLK_CLOCK_CR_I2C1 (1 << 13) +#define SYSREG_SUBBLK_CLOCK_CR_CAN0 (1 << 14) +#define SYSREG_SUBBLK_CLOCK_CR_CAN1 (1 << 15) +#define SYSREG_SUBBLK_CLOCK_CR_USB (1 << 16) +#define SYSREG_SUBBLK_CLOCK_CR_RTC (1 << 18) +#define SYSREG_SUBBLK_CLOCK_CR_QSPI (1 << 19) +#define SYSREG_SUBBLK_CLOCK_CR_GPIO0 (1 << 20) +#define SYSREG_SUBBLK_CLOCK_CR_GPIO1 (1 << 21) +#define SYSREG_SUBBLK_CLOCK_CR_GPIO2 (1 << 22) +#define SYSREG_SUBBLK_CLOCK_CR_DDRC (1 << 23) +#define SYSREG_SUBBLK_CLOCK_CR_FIC0 (1 << 24) +#define SYSREG_SUBBLK_CLOCK_CR_FIC1 (1 << 25) +#define SYSREG_SUBBLK_CLOCK_CR_FIC2 (1 << 26) +#define SYSREG_SUBBLK_CLOCK_CR_FIC3 (1 << 27) +#define SYSREG_SUBBLK_CLOCK_CR_ATHENA (1 << 28) +#define SYSREG_SUBBLK_CLOCK_CR_CFM (1 << 29) /* Holds the MSS peripherals in reset */ -#define SYSREG_SOFT_RESET_CR_SHIFT (0) /* Bit: 0-30: Holds the MSS peripherals in reset */ +#define SYSREG_SOFT_RESET_CR_SHIFT (0) /* Bits: 0-30: Holds the MSS peripherals in reset */ #define SYSREG_SOFT_RESET_CR_MASK (0x7fffffff << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_ENVM (0 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_MAC0 (1 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_MAC1 (2 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_MMC (3 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_TIMER (4 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_MMUART0 (5 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_MMUART1 (6 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_MMUART2 (7 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_MMUART3 (8 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_MMUART4 (9 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_SPI0 (10 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_SPI1 (11 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_I2C0 (12 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_I2C1 (13 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_CAN0 (14 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_CAN1 (15 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_USB (16 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_FPGA (17 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_RTC (18 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_QSPI (19 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_GPIO0 (20 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_GPIO1 (21 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_GPIO2 (22 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_DDRC (23 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_FIC0 (24 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_FIC1 (25 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_FIC2 (26 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_FIC3 (27 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_ATHENA (28 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_CFM (29 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) -#define SYSREG_SOFT_RESET_CR_SGMII (30 << SYSREG_SUBBLK_CLOCK_CR_SHIFT) +#define SYSREG_SOFT_RESET_CR_ENVM (1 << 0) +#define SYSREG_SOFT_RESET_CR_MAC0 (1 << 1) +#define SYSREG_SOFT_RESET_CR_MAC1 (1 << 2) +#define SYSREG_SOFT_RESET_CR_MMC (1 << 3) +#define SYSREG_SOFT_RESET_CR_TIMER (1 << 4) +#define SYSREG_SOFT_RESET_CR_MMUART0 (1 << 5) +#define SYSREG_SOFT_RESET_CR_MMUART1 (1 << 6) +#define SYSREG_SOFT_RESET_CR_MMUART2 (1 << 7) +#define SYSREG_SOFT_RESET_CR_MMUART3 (1 << 8) +#define SYSREG_SOFT_RESET_CR_MMUART4 (1 << 9) +#define SYSREG_SOFT_RESET_CR_SPI0 (1 << 10) +#define SYSREG_SOFT_RESET_CR_SPI1 (1 << 11) +#define SYSREG_SOFT_RESET_CR_I2C0 (1 << 12) +#define SYSREG_SOFT_RESET_CR_I2C1 (1 << 13) +#define SYSREG_SOFT_RESET_CR_CAN0 (1 << 14) +#define SYSREG_SOFT_RESET_CR_CAN1 (1 << 15) +#define SYSREG_SOFT_RESET_CR_USB (1 << 16) +#define SYSREG_SOFT_RESET_CR_FPGA (1 << 17) +#define SYSREG_SOFT_RESET_CR_RTC (1 << 18) +#define SYSREG_SOFT_RESET_CR_QSPI (1 << 19) +#define SYSREG_SOFT_RESET_CR_GPIO0 (1 << 20) +#define SYSREG_SOFT_RESET_CR_GPIO1 (1 << 21) +#define SYSREG_SOFT_RESET_CR_GPIO2 (1 << 22) +#define SYSREG_SOFT_RESET_CR_DDRC (1 << 23) +#define SYSREG_SOFT_RESET_CR_FIC0 (1 << 24) +#define SYSREG_SOFT_RESET_CR_FIC1 (1 << 25) +#define SYSREG_SOFT_RESET_CR_FIC2 (1 << 26) +#define SYSREG_SOFT_RESET_CR_FIC3 (1 << 27) +#define SYSREG_SOFT_RESET_CR_ATHENA (1 << 28) +#define SYSREG_SOFT_RESET_CR_CFM (1 << 29) +#define SYSREG_SOFT_RESET_CR_SGMII (1 << 30) /* TODO: * AHBAXI_CR diff --git a/arch/risc-v/src/mpfs/hardware/mpfs_uart.h b/arch/risc-v/src/mpfs/hardware/mpfs_uart.h index 2d3b0ccf91e..672a2f904a2 100755 --- a/arch/risc-v/src/mpfs/hardware/mpfs_uart.h +++ b/arch/risc-v/src/mpfs/hardware/mpfs_uart.h @@ -57,14 +57,6 @@ #define MPFS_UART_RTO_OFFSET 0x004C /* UART Receiver time-out register */ #define MPFS_UART_ADR_OFFSET 0x0050 /* UART Address register */ -/* Register virtual addresses ***********************************************/ - -#define MPFS250_UART0_VADDR MPFS_UART0_BASE -#define MPFS250_UART1_VADDR MPFS_UART1_BASE -#define MPFS250_UART2_VADDR MPFS_UART2_BASE -#define MPFS250_UART3_VADDR MPFS_UART3_BASE -#define MPFS250_UART4_VADDR MPFS_UART4_BASE - /* Register bit field definitions *******************************************/ /* UART Receive Buffer Register */ @@ -89,7 +81,6 @@ #define UART_IER_ETBEI (1 << 1) /* Bit 1: Enable Transmit Holding Register Empty Interrupt */ #define UART_IER_ELSI (1 << 2) /* Bit 2: Enable Receiver Line Status Interrupt */ #define UART_IER_EDSSI (1 << 3) /* Bit 3: Enable Modem Status Interrupt */ -#define UART_IER_PTIME (1 << 7) /* Bit 7: Programmable THRE Interrupt Mode Enable */ #define UART_IER_ALLIE 0x0000008f /* UART Interrupt Identity Register */ diff --git a/arch/risc-v/src/mpfs/mpfs_allocateheap.c b/arch/risc-v/src/mpfs/mpfs_allocateheap.c index c6bb153fb83..40dbb85e2c2 100755 --- a/arch/risc-v/src/mpfs/mpfs_allocateheap.c +++ b/arch/risc-v/src/mpfs/mpfs_allocateheap.c @@ -76,7 +76,7 @@ * ****************************************************************************/ -void up_allocate_heap(FAR void **heap_start, size_t *heap_size) +void up_allocate_heap(void **heap_start, size_t *heap_size) { #if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) /* Get the size and position of the user-space heap. @@ -88,7 +88,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) /* Return the user-space heap settings */ - *heap_start = (FAR void *)ubase; + *heap_start = (void *)ubase; *heap_size = usize; /* Allow user-mode access to the user heap memory in PMP @@ -98,7 +98,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) #else /* Return the heap settings */ - *heap_start = (FAR void *)g_idle_topstack; + *heap_start = (void *)g_idle_topstack; *heap_size = KRAM_END - g_idle_topstack; #endif } @@ -114,11 +114,11 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) ****************************************************************************/ #if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) -void up_allocate_kheap(FAR void **heap_start, size_t *heap_size) +void up_allocate_kheap(void **heap_start, size_t *heap_size) { /* Return the kernel heap settings. */ - *heap_start = (FAR void *)g_idle_topstack; + *heap_start = (void *)g_idle_topstack; *heap_size = KRAM_END - g_idle_topstack; } #endif diff --git a/arch/risc-v/src/mpfs/mpfs_corepwm.c b/arch/risc-v/src/mpfs/mpfs_corepwm.c new file mode 100644 index 00000000000..a5641ed06c3 --- /dev/null +++ b/arch/risc-v/src/mpfs/mpfs_corepwm.c @@ -0,0 +1,787 @@ +/**************************************************************************** + * arch/risc-v/src/mpfs/mpfs_corepwm.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "hardware/mpfs_corepwm.h" + +#include "riscv_arch.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/* This module only compiles if at least one CorePWM instance + * is configured to the FPGA + */ + +#ifndef CONFIG_MPFS_HAVE_COREPWM +# error This should not be compiled as CorePWM block is not defined/configured +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct mpfs_pwmchan_s +{ + uint8_t channel; /* Timer output channel: {1,..16} */ +}; + +/* This structure represents the state of one PWM timer */ + +struct mpfs_pwmtimer_s +{ + const struct pwm_ops_s *ops; /* PWM operations */ + uint8_t nchannels; /* Number of channels on this PWM block */ + uint8_t pwmid; /* PWM ID {1,...} */ + struct mpfs_pwmchan_s channels[MPFS_MAX_PWM_CHANNELS]; + uint32_t frequency; /* Current frequency setting */ + uintptr_t base; /* The base address of the pwm block */ + uint32_t pwmclk; /* The frequency of the pwm clock */ +}; + +/**************************************************************************** + * Static Function Prototypes + ****************************************************************************/ + +/* Register access */ + +static uint32_t pwm_getreg(struct mpfs_pwmtimer_s *priv, int offset); +static void pwm_putreg(struct mpfs_pwmtimer_s *priv, int offset, + uint32_t value); + +#ifdef CONFIG_DEBUG_PWM_INFO +static void pwm_dumpregs(struct mpfs_pwmtimer_s *priv, const char *msg); +#else +# define pwm_dumpregs(priv,msg) +#endif + +/* Timer management */ + +static int pwm_timer(struct mpfs_pwmtimer_s *priv, + const struct pwm_info_s *info); + +/* PWM driver methods */ + +static int pwm_setup(struct pwm_lowerhalf_s *dev); +static int pwm_shutdown(struct pwm_lowerhalf_s *dev); + +static int pwm_start(struct pwm_lowerhalf_s *dev, + const struct pwm_info_s *info); + +static int pwm_stop(struct pwm_lowerhalf_s *dev); +static int pwm_ioctl(struct pwm_lowerhalf_s *dev, + int cmd, unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This is the list of lower half PWM driver methods used by the upper half + * driver + */ + +static const struct pwm_ops_s g_pwmops = +{ + .setup = pwm_setup, + .shutdown = pwm_shutdown, + .start = pwm_start, + .stop = pwm_stop, + .ioctl = pwm_ioctl, +}; + +#ifdef CONFIG_MPFS_COREPWM0 +static struct mpfs_pwmtimer_s g_pwm0dev = +{ + .ops = &g_pwmops, + .nchannels = CONFIG_MPFS_COREPWM0_NCHANNELS, + .pwmid = 0, + .channels = + { + { + .channel = 1 + }, + { + .channel = 2 + }, + { + .channel = 3 + }, + { + .channel = 4 + }, + { + .channel = 5 + }, + { + .channel = 6 + }, + { + .channel = 7 + }, + { + .channel = 8 + }, + { + .channel = 9 + }, + { + .channel = 10 + }, + { + .channel = 11 + }, + { + .channel = 12 + }, + { + .channel = 13 + }, + { + .channel = 14 + }, + { + .channel = 15 + }, + { + .channel = 16 + } + }, + .base = CONFIG_MPFS_COREPWM0_BASE, + .pwmclk = CONFIG_MPFS_COREPWM0_PWMCLK, +}; +#endif + +#ifdef CONFIG_MPFS_COREPWM1 +static struct mpfs_pwmtimer_s g_pwm1dev = +{ + .ops = &g_pwmops, + .nchannels = CONFIG_MPFS_COREPWM1_NCHANNELS, + .pwmid = 1, + .channels = + { + { + .channel = 1 + }, + { + .channel = 2 + }, + { + .channel = 3 + }, + { + .channel = 4 + }, + { + .channel = 5 + }, + { + .channel = 6 + }, + { + .channel = 7 + }, + { + .channel = 8 + }, + { + .channel = 9 + }, + { + .channel = 10 + }, + { + .channel = 11 + }, + { + .channel = 12 + }, + { + .channel = 13 + }, + { + .channel = 14 + }, + { + .channel = 15 + }, + { + .channel = 16 + } + }, + .base = CONFIG_MPFS_COREPWM1_BASE, + .pwmclk = CONFIG_MPFS_COREPWM1_PWMCLK, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pwm_getreg + * + * Description: + * Read the value of an PWM timer register. + * + * Input Parameters: + * priv - A reference to the PWM block status + * offset - The offset to the register to read + * + * Returned Value: + * The current contents of the specified register + * + ****************************************************************************/ + +static uint32_t pwm_getreg(struct mpfs_pwmtimer_s *priv, int offset) +{ + return getreg32(priv->base + offset); +} + +/**************************************************************************** + * Name: pwm_putreg + * + * Description: + * Read the value of an PWM timer register. + * + * Input Parameters: + * priv - A reference to the PWM block status + * offset - The offset to the register to read + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void pwm_putreg(struct mpfs_pwmtimer_s *priv, int offset, + uint32_t value) +{ + /* TODO: 8,16 & 32 bit reg width consideration + * 32 bit access is required for a 32 bit register + */ + + putreg32(value, priv->base + offset); +} + +/**************************************************************************** + * Name: pwm_dumpregs + * + * Description: + * Dump all timer registers. + * + * Input Parameters: + * priv - A reference to the PWM block status + * + * Returned Value: + * None + * + * TODO: Add TACH* register if tachometer feature is taken in use + * TODO: Add DAC* register if DA feature is taken in use + ****************************************************************************/ + +#ifdef CONFIG_DEBUG_PWM_INFO +#define MPFS_PWMREG_STEP (MPFS_COREPWM_PWM2_POS_EDGE_OFFSET - MPFS_COREPWM_PWM1_POS_EDGE_OFFSET) + +static void pwm_dumpregs(struct mpfs_pwmtimer_s *priv, const char *msg) +{ + pwminfo("%s:\n", msg); + pwminfo(" PRESCALE: %08x PERIOD: %08x\n", + pwm_getreg(priv, MPFS_COREPWM_PRESCALE_OFFSET), + pwm_getreg(priv, MPFS_COREPWM_PERIOD_OFFSET)); + pwminfo(" SYNC_UPDATE: %02x\n", + pwm_getreg(priv, MPFS_COREPWM_SYNC_UPDATE_OFFSET)); + pwminfo(" PWM_ENABLE_0_7: %02x PWM_ENABLE_8_15: %02x\n", + pwm_getreg(priv, MPFS_COREPWM_PWM_ENABLE_0_7_OFFSET), + pwm_getreg(priv, MPFS_COREPWM_PWM_ENABLE_8_15_OFFSET)); + + for (int i = 0; i < priv->nchannels; i++) + { + pwminfo(" PWM%d_POSEDGE: %s%08x PWM%d_NEGEDGE: %s%08x\n", + i + 1, (i < 9) ? " " : "", + pwm_getreg(priv, MPFS_COREPWM_PWM1_POS_EDGE_OFFSET + + i * MPFS_PWMREG_STEP), + i + 1, (i < 9) ? " " : "", + pwm_getreg(priv, MPFS_COREPWM_PWM1_NEG_EDGE_OFFSET + + i * MPFS_PWMREG_STEP)); + } +} +#endif + +/**************************************************************************** + * Name: pwm_timer + * + * Description: + * (Re-)initialize the timer resources and start the pulsed output + * + * Input Parameters: + * priv - A reference to the lower half PWM driver state structure + * info - A reference to the characteristics of the pulsed output + * + * Returned Value: + * Zero on success; a negated errno value on failure + * + ****************************************************************************/ + +static int pwm_timer(struct mpfs_pwmtimer_s *priv, + const struct pwm_info_s *info) +{ + int i; + + /* Calculated values */ + + /* TODO: We might need to calculate prescaler on some rare cases, + * for now hardcoded to 0 + */ + + uint32_t prescaler = 0; + + uint32_t period; + + DEBUGASSERT(priv != NULL && info != NULL); + DEBUGASSERT(info->frequency > 0); + + /* CorePWM FPGA block can be configured to be with either 8, 16, or 32 bit + * registers width. Minimally PWM functionality is set up by two registers: + * PRESCALE and PERIOD which are common to all channels. Up to 16 channels + * may be configured in use. Clock used by the block may be selected in + * design phase an on Icicle Kit reference design version 21.04 has at + * least the following clock signals to choose from the Clocks_and_Resets + * block: 125MHz, 100MHz, 75MHz, 62.5MHz, 50MHz, and 25MHz. + * + * For now only 32 the bit configuration is supported. + * TODO: Add 8 and 16 bit width support + * + * There are many combinations of prescaler and period registers, but the + * best will be the one that has the smallest prescaler value. That is the + * solution that should give us the most accuracy in the pwm control. + * + * Example for clk = 25MHz, prescale 0 and 32 bit wide registers: + * PWM period granularity PWM_PG = (PRESCALE + 1) / pwmclk = + * 40 ns × 1 = 40 ns, so the smallest step is 40ns + * pwmclk = clk / (PRESCALE + 1) = 25,000,000 / (PRESCALE + 1) = + * 25,000,000 + * + * For desired output frequency of 50Hz and using PRESCALE of 0: + * PERIOD = pwmclk / frequency = 25,000,000 / 50 = 500,000 + */ + + pwminfo("PWM%u frequency: %u PWMCLK: %u prescaler: %u\n", + priv->pwmid, info->frequency, priv->pwmclk, prescaler); + + /* Set the reload and prescaler values */ + + period = priv->pwmclk / info->frequency; + + pwm_putreg(priv, MPFS_COREPWM_PERIOD_OFFSET, period); + pwm_putreg(priv, MPFS_COREPWM_PRESCALE_OFFSET, prescaler); + + /* Handle channel specific setup */ + + for (i = 0; i < CONFIG_PWM_NCHANNELS; i++) + { + ub32_t duty; + uint8_t channel; + uint32_t neg_edge; + + channel = info->channels[i].channel; + + /* Duty defined as fraction of 65536, i.e. a value of 1 to 65535 + * corresponding to a duty cycle of 0.000015 - 0.999984 + */ + + duty = ub16toub32(info->channels[i].duty); + neg_edge = b32toi(duty * period + b32HALF); + + if (channel == 0) /* A value of zero means to skip this channel */ + { + continue; + } + + if (channel > MPFS_MAX_PWM_CHANNELS) + { + pwmerr("ERROR: No such PWM channel: %u\n", channel); + return -EINVAL; + } + + /* Set the channels duty cycle by writing to the NEG_EDGE register + * for this channel + */ + + const int neg_edge_reg_offset = + MPFS_COREPWM_PWM1_NEG_EDGE_OFFSET + + (MPFS_COREPWM_PWM2_NEG_EDGE_OFFSET - + MPFS_COREPWM_PWM1_NEG_EDGE_OFFSET) * (channel - 1); + + pwm_putreg(priv, neg_edge_reg_offset, neg_edge); + + /* Enable the channel */ + + if (channel <= 8) + { + uint32_t reg = pwm_getreg(priv, + MPFS_COREPWM_PWM_ENABLE_0_7_OFFSET); + pwm_putreg(priv, MPFS_COREPWM_PWM_ENABLE_0_7_OFFSET, + reg | (1 << (channel - 1))); + } + else + { + uint32_t reg = pwm_getreg(priv, + MPFS_COREPWM_PWM_ENABLE_8_15_OFFSET); + pwm_putreg(priv, MPFS_COREPWM_PWM_ENABLE_8_15_OFFSET, + reg | (1 << (channel - 9))); + } + } + + pwm_dumpregs(priv, "After starting"); + + return OK; +} + +/**************************************************************************** + * Name: pwm_update_duty + * + * Description: + * Change the channel duty cycle. + * + * Input Parameters: + * priv - A reference to the lower half PWM driver state structure + * channel - Channel to by updated + * duty - New duty cycle + * + * Returned Value: + * Zero on success; a negated errno value on failure + * + ****************************************************************************/ + +static int pwm_update_duty(struct mpfs_pwmtimer_s *priv, + uint8_t channel, ub16_t duty16) +{ + uint32_t period; + uint32_t neg_edge; + ub32_t duty = ub16toub32(duty16); + + DEBUGASSERT(priv != NULL); + + if (channel == 0 || channel > priv->nchannels || + channel > MPFS_MAX_PWM_CHANNELS) + { + pwmerr("ERROR: PWM%d has no such channel: %u\n", priv->pwmid, channel); + return -EINVAL; + } + + pwminfo("PWM%u channel %u, duty %08x\n", priv->pwmid, channel, duty16); + + period = pwm_getreg(priv, MPFS_COREPWM_PERIOD_OFFSET); + neg_edge = b32toi(duty * period + b32HALF); + + /* Set the channels duty cycle by writing to the NEG_EDGE register + * for this channel + */ + + const int neg_edge_reg_offset = + MPFS_COREPWM_PWM1_NEG_EDGE_OFFSET + + (MPFS_COREPWM_PWM2_NEG_EDGE_OFFSET - + MPFS_COREPWM_PWM1_NEG_EDGE_OFFSET) * (channel - 1); + + pwm_putreg(priv, neg_edge_reg_offset, neg_edge); + + return OK; +} + +/**************************************************************************** + * Name: pwm_setup + * + * Description: + * This method is called when the driver is opened. The lower half driver + * should configure and initialize the device so that it is ready for use. + * It should not, however, output pulses until the start method is called. + * + * Input Parameters: + * dev - A reference to the lower half PWM driver state structure + * + * Returned Value: + * Zero on success; a negated errno value on failure + * + * Assumptions: + * + * Note: + * On a MPFS CorePWM block no setting up is needed + * + ****************************************************************************/ + +static int pwm_setup(struct pwm_lowerhalf_s *dev) +{ + struct mpfs_pwmtimer_s *priv = (struct mpfs_pwmtimer_s *)dev; + + pwminfo("PWMID%u\n", priv->pwmid); + pwm_dumpregs(priv, "Initially"); + + return OK; +} + +/**************************************************************************** + * Name: pwm_shutdown + * + * Description: + * This method is called when the driver is closed. The lower half driver + * stop pulsed output, free any resources, disable the timer hardware, and + * put the system into the lowest possible power usage state + * + * Input Parameters: + * dev - A reference to the lower half PWM driver state structure + * + * Returned Value: + * Zero on success; a negated errno value on failure + * + ****************************************************************************/ + +static int pwm_shutdown(struct pwm_lowerhalf_s *dev) +{ + struct mpfs_pwmtimer_s *priv = (struct mpfs_pwmtimer_s *)dev; + + pwminfo("PWM%u\n", priv->pwmid); + + /* Make sure that the output has been stopped */ + + pwm_stop(dev); + + return OK; +} + +/**************************************************************************** + * Name: pwm_start + * + * Description: + * (Re-)initialize the timer resources and start the pulsed output + * + * Input Parameters: + * dev - A reference to the lower half PWM driver state structure + * info - A reference to the characteristics of the pulsed output + * + * Returned Value: + * Zero on success; a negated errno value on failure + * + ****************************************************************************/ + +static int pwm_start(struct pwm_lowerhalf_s *dev, + const struct pwm_info_s *info) +{ + int ret = OK; + struct mpfs_pwmtimer_s *priv = (struct mpfs_pwmtimer_s *)dev; + + /* if frequency has not changed we just update duty */ + + if (info->frequency == priv->frequency) + { + int i; + + pwminfo("PWM%u, no change in frequency\n", priv->pwmid); + + for (i = 0; + ret == OK && i < MPFS_MAX_PWM_CHANNELS && i < priv->nchannels; + i++) + { + /* Set output if channel configured */ + + uint8_t chan = info->channels[i].channel; + + if (chan != 0 && chan <= priv->nchannels) + { + pwminfo(" channel %d, duty %d\n", chan, + info->channels[i].duty); + ret = pwm_update_duty(priv, chan, info->channels[i].duty); + } + } + } + else + { + pwminfo("PWM%u, change frequency and duty cycle\n", priv->pwmid); + + ret = pwm_timer(priv, info); + + /* Save current frequency */ + + if (ret == OK) + { + priv->frequency = info->frequency; + } + } + + return ret; +} + +/**************************************************************************** + * Name: pwm_stop + * + * Description: + * Stop the pulsed output and reset the timer resources + * + * Input Parameters: + * dev - A reference to the lower half PWM driver state structure + * + * Returned Value: + * Zero on success; a negated errno value on failure + * + * Assumptions: + * This function is called to stop the pulsed output at anytime. + * + ****************************************************************************/ + +static int pwm_stop(struct pwm_lowerhalf_s *dev) +{ + struct mpfs_pwmtimer_s *priv = (struct mpfs_pwmtimer_s *)dev; + + pwminfo("PWM%u pwm_stop\n", priv->pwmid); + + /* Check that timer number is valid */ + + switch (priv->pwmid) + { +#ifdef CONFIG_MPFS_COREPWM0 + case 0: + break; +#endif +#ifdef CONFIG_MPFS_COREPWM1 + case 1: + break; +#endif + default: + return -EINVAL; + } + + /* Stopped so set frequency to zero */ + + priv->frequency = 0; + + /* No resetting on CorePWM block so just disable the channels and + * it is in a state where pwm_start() can be called. + */ + + pwm_putreg(priv, MPFS_COREPWM_PWM_ENABLE_0_7_OFFSET, 0x00); + pwm_putreg(priv, MPFS_COREPWM_PWM_ENABLE_8_15_OFFSET, 0x00); + + pwm_dumpregs(priv, "After stop"); + + return OK; +} + +/**************************************************************************** + * Name: pwm_ioctl + * + * Description: + * Lower-half logic may support platform-specific ioctl commands + * + * Input Parameters: + * dev - A reference to the lower half PWM driver state structure + * cmd - The ioctl command + * arg - The argument accompanying the ioctl command + * + * Returned Value: + * Zero on success; a negated errno value on failure + * + ****************************************************************************/ + +static int pwm_ioctl(struct pwm_lowerhalf_s *dev, int cmd, + unsigned long arg) +{ +#ifdef CONFIG_DEBUG_PWM_INFO + struct mpfs_pwmtimer_s *priv = (struct mpfs_pwmtimer_s *)dev; + + /* There are no platform-specific ioctl commands */ + + pwminfo("PWM%u\n", priv->pwmid); +#endif + + return -ENOTTY; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mpfs_corepwm_init + * + * Description: + * Initialize a CorePWM block. + * + * Input Parameters: + * pwmid - A number identifying the pwm block. The number of valid + * IDs varies depending on the configuration of the FPGA. + * + * Returned Value: + * On success, a pointer to the MPFS CorePWM lower half PWM driver is + * returned. NULL is returned on any failure. + * + ****************************************************************************/ + +struct pwm_lowerhalf_s *mpfs_corepwm_init(int pwmid) +{ + struct mpfs_pwmtimer_s *lower; + + pwminfo("PWM%u\n", pwmid); + + switch (pwmid) + { +#ifdef CONFIG_MPFS_COREPWM0 + case 0: + lower = &g_pwm0dev; + break; +#endif +#ifdef CONFIG_MPFS_COREPWM1 + case 1: + lower = &g_pwm1dev; + break; +#endif + default: + pwmerr("ERROR: No such timer configured\n"); + return NULL; + } + + return (struct pwm_lowerhalf_s *)lower; +} + diff --git a/arch/risc-v/src/mpfs/mpfs_corepwm.h b/arch/risc-v/src/mpfs/mpfs_corepwm.h new file mode 100644 index 00000000000..3d6cf798907 --- /dev/null +++ b/arch/risc-v/src/mpfs/mpfs_corepwm.h @@ -0,0 +1,99 @@ +/**************************************************************************** + * arch/risc-v/src/mpfs/mpfs_corepwm.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_SRCMPFS_MPFS_MPFS_COREPWM_H +#define __ARCH_RISCV_SRCMPFS_MPFS_MPFS_COREPWM_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* Check if PWM support for any channel is enabled. */ + +#ifdef CONFIG_MPFS_HAVE_COREPWM + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include "hardware/mpfs_corepwm.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: mpfs_corepwm_init + * + * Description: + * Initialize a CorePWM block. + * + * Input Parameters: + * pwmid - A number identifying the pwm block. The number of valid + * IDs varies depending on the configuration of the FPGA. + * + * Returned Value: + * On success, a pointer to the MPFS CorePWM lower half PWM driver is + * returned. NULL is returned on any failure. + * + ****************************************************************************/ + +struct pwm_lowerhalf_s *mpfs_corepwm_init(int pwmid); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* CONFIG_MPFS_HAVE_COREPWM */ +#endif /* __ARCH_RISCV_SRCMPFS_MPFS_MPFS_COREPWM_H */ diff --git a/arch/risc-v/src/mpfs/mpfs_emmcsd.c b/arch/risc-v/src/mpfs/mpfs_emmcsd.c new file mode 100755 index 00000000000..fc013792d81 --- /dev/null +++ b/arch/risc-v/src/mpfs/mpfs_emmcsd.c @@ -0,0 +1,2966 @@ +/**************************************************************************** + * arch/risc-v/src/mpfs/mpfs_emmcsd.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "mpfs_emmcsd.h" +#include "riscv_arch.h" +#include "hardware/mpfs_emmcsd.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define MPFS_EMMCSD_HRS00 (priv->hw_base + MPFS_EMMCSD_HRS00_OFFSET) +#define MPFS_EMMCSD_HRS01 (priv->hw_base + MPFS_EMMCSD_HRS01_OFFSET) +#define MPFS_EMMCSD_HRS04 (priv->hw_base + MPFS_EMMCSD_HRS04_OFFSET) +#define MPFS_EMMCSD_HRS06 (priv->hw_base + MPFS_EMMCSD_HRS06_OFFSET) + +#define MPFS_EMMCSD_SRS01 (priv->hw_base + MPFS_EMMCSD_SRS01_OFFSET) +#define MPFS_EMMCSD_SRS02 (priv->hw_base + MPFS_EMMCSD_SRS02_OFFSET) +#define MPFS_EMMCSD_SRS03 (priv->hw_base + MPFS_EMMCSD_SRS03_OFFSET) +#define MPFS_EMMCSD_SRS04 (priv->hw_base + MPFS_EMMCSD_SRS04_OFFSET) +#define MPFS_EMMCSD_SRS05 (priv->hw_base + MPFS_EMMCSD_SRS05_OFFSET) +#define MPFS_EMMCSD_SRS06 (priv->hw_base + MPFS_EMMCSD_SRS06_OFFSET) +#define MPFS_EMMCSD_SRS07 (priv->hw_base + MPFS_EMMCSD_SRS07_OFFSET) +#define MPFS_EMMCSD_SRS08 (priv->hw_base + MPFS_EMMCSD_SRS08_OFFSET) +#define MPFS_EMMCSD_SRS09 (priv->hw_base + MPFS_EMMCSD_SRS09_OFFSET) +#define MPFS_EMMCSD_SRS10 (priv->hw_base + MPFS_EMMCSD_SRS10_OFFSET) +#define MPFS_EMMCSD_SRS11 (priv->hw_base + MPFS_EMMCSD_SRS11_OFFSET) +#define MPFS_EMMCSD_SRS12 (priv->hw_base + MPFS_EMMCSD_SRS12_OFFSET) +#define MPFS_EMMCSD_SRS13 (priv->hw_base + MPFS_EMMCSD_SRS13_OFFSET) +#define MPFS_EMMCSD_SRS14 (priv->hw_base + MPFS_EMMCSD_SRS14_OFFSET) +#define MPFS_EMMCSD_SRS15 (priv->hw_base + MPFS_EMMCSD_SRS15_OFFSET) +#define MPFS_EMMCSD_SRS16 (priv->hw_base + MPFS_EMMCSD_SRS16_OFFSET) +#define MPFS_EMMCSD_SRS21 (priv->hw_base + MPFS_EMMCSD_SRS21_OFFSET) +#define MPFS_EMMCSD_SRS22 (priv->hw_base + MPFS_EMMCSD_SRS22_OFFSET) +#define MPFS_EMMCSD_SRS23 (priv->hw_base + MPFS_EMMCSD_SRS23_OFFSET) + +#define MPFS_SYSREG_SOFT_RESET_CR (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_SOFT_RESET_CR_OFFSET) +#define MPFS_SYSREG_SUBBLK_CLOCK_CR (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_SUBBLK_CLOCK_CR_OFFSET) + +#define MPFS_PMPCFG_MMC_0 (MPFS_MPUCFG_BASE + 0x700) +#define MPFS_PMPCFG_MMC_1 (MPFS_MPUCFG_BASE + 0x708) +#define MPFS_PMPCFG_MMC_2 (MPFS_MPUCFG_BASE + 0x710) +#define MPFS_PMPCFG_MMC_3 (MPFS_MPUCFG_BASE + 0x718) + +#define MPFS_MMC_CLOCK_400KHZ 400u +#define MPFS_MMC_CLOCK_12_5MHZ 12500u +#define MPFS_MMC_CLOCK_25MHZ 25000u +#define MPFS_MMC_CLOCK_26MHZ 26000u +#define MPFS_MMC_CLOCK_50MHZ 50000u +#define MPFS_MMC_CLOCK_100MHZ 100000u +#define MPFS_MMC_CLOCK_200MHZ 200000u + +#define MPFS_EMMCSD_DEBOUNCE_TIME 0x300000u +#define MPFS_EMMCSD_MODE_LEGACY 0x7u + +#define MPFS_EMMCSD_DATA_TIMEOUT 500000 + +#define MPFS_EMMCSD_SRS10_3_3V_BUS_VOLTAGE (0x7 << 9) +#define MPFS_EMMCSD_SRS10_3_0V_BUS_VOLTAGE (0x6 << 9) +#define MPFS_EMMCSD_SRS10_1_8V_BUS_VOLTAGE (0x5 << 9) + +#define MPFS_EMMCSD_1_8V_BUS_VOLTAGE 18 +#define MPFS_EMMCSD_3_3V_BUS_VOLTAGE 33 + +#define MPFS_EMMCSD_INITIALIZED 0x00 +#define MPFS_EMMCSD_NOT_INITIALIZED 0x01 + +#ifndef CONFIG_SCHED_WORKQUEUE +# error "Callback support requires CONFIG_SCHED_WORKQUEUE" +#endif + +/* High-speed single data rate supports clock frequency up to 52 MHz and data + * bus width of 1 bit, 4 bits, and 8 bits. + */ + +#define MPFS_EMMCSD_MODE_SDR 0x2u + +/* High speed double data rate supports clock frequency up to 52 MHz and data + * bus width of 4 bits and 8 bits. + */ + +#define MPFS_EMMCSD_MODE_DDR 0x3u + +/* SDR data sampling supports clock frequency up to 200 MHz and data bus + * width of 4 bits and 8 bits. + */ + +#define MPFS_EMMCSD_MODE_HS200 0x4u + +/* DDR data sampling supports clock frequency up to 200 MHz and data bus + * width of 8 bits. + */ + +#define MPFS_EMMCSD_MODE_HS400 0x5u + +/* HS400 mode with Enhanced Strobe */ + +#define MPFS_EMMCSD_MODE_HS400_ES 0x6u + +/* Define the Hardware FIFO size */ + +#define FIFO_SIZE_IN_BYTES 64 + +/* Timing */ + +#define EMMCSD_CMDTIMEOUT (100000) +#define EMMCSD_LONGTIMEOUT (100000000) + +/* Event waiting interrupt mask bits */ + +#define MPFS_EMMCSD_CARD_INTS (MPFS_EMMCSD_SRS14_CINT_IE | \ + MPFS_EMMCSD_SRS14_CIN_IE | \ + MPFS_EMMCSD_SRS14_CR_IE) + +#define MPFS_EMMCSD_CMDDONE_STA (MPFS_EMMCSD_SRS12_CC) + +#define MPFS_EMMCSD_RESPDONE_STA (MPFS_EMMCSD_SRS12_ECT | \ + MPFS_EMMCSD_SRS12_ECCRC) + +#define MPFS_EMMCSD_XFRDONE_STA (MPFS_EMMCSD_SRS12_TC) + +#define MPFS_EMMCSD_CMDDONE_MASK (MPFS_EMMCSD_CARD_INTS | \ + MPFS_EMMCSD_SRS14_CC_IE) + +#define MPFS_EMMCSD_RESPDONE_MASK (MPFS_EMMCSD_CARD_INTS | \ + MPFS_EMMCSD_SRS14_ECCRC_IE | \ + MPFS_EMMCSD_SRS14_ECT_IE) + +#define MPFS_EMMCSD_XFRDONE_MASK (MPFS_EMMCSD_CARD_INTS | \ + MPFS_EMMCSD_SRS14_TC_IE) + +#define MPFS_EMMCSD_CMDDONE_ICR (MPFS_EMMCSD_SRS12_CC) + +#define MPFS_EMMCSD_RESPDONE_ICR (MPFS_EMMCSD_SRS12_ECT | \ + MPFS_EMMCSD_SRS12_ECCRC) + +#define MPFS_EMMCSD_XFRDONE_ICR (MPFS_EMMCSD_SRS12_EDCRC | \ + MPFS_EMMCSD_SRS12_EDT | \ + MPFS_EMMCSD_SRS12_TC) + +#define MPFS_EMMCSD_WAITALL_ICR (MPFS_EMMCSD_CMDDONE_ICR | \ + MPFS_EMMCSD_RESPDONE_ICR | \ + MPFS_EMMCSD_XFRDONE_ICR) + +#define MPFS_EMMCSD_RECV_MASKDMA (MPFS_EMMCSD_CARD_INTS | \ + MPFS_EMMCSD_SRS14_EADMA_IE | \ + MPFS_EMMCSD_SRS14_DMAINT_IE | \ + MPFS_EMMCSD_SRS14_EDT_IE | \ + MPFS_EMMCSD_SRS14_ECT_IE | \ + MPFS_EMMCSD_SRS14_BRR_IE | \ + MPFS_EMMCSD_SRS14_TC_IE) + +#define MPFS_EMMCSD_RECV_MASK (MPFS_EMMCSD_CARD_INTS | \ + MPFS_EMMCSD_SRS14_EDT_IE | \ + MPFS_EMMCSD_SRS14_ECT_IE | \ + MPFS_EMMCSD_SRS14_BRR_IE | \ + MPFS_EMMCSD_SRS14_TC_IE) + +#define MPFS_EMMCSD_SEND_MASKDMA (MPFS_EMMCSD_CARD_INTS | \ + MPFS_EMMCSD_SRS14_EADMA_IE | \ + MPFS_EMMCSD_SRS14_DMAINT_IE | \ + MPFS_EMMCSD_SRS14_EDT_IE | \ + MPFS_EMMCSD_SRS14_ECT_IE | \ + MPFS_EMMCSD_SRS14_BWR_IE | \ + MPFS_EMMCSD_SRS14_TC_IE) + +#define MPFS_EMMCSD_SEND_MASK (MPFS_EMMCSD_CARD_INTS | \ + MPFS_EMMCSD_SRS14_EDT_IE | \ + MPFS_EMMCSD_SRS14_ECT_IE | \ + MPFS_EMMCSD_SRS14_BWR_IE | \ + MPFS_EMMCSD_SRS14_TC_IE) + +/* SD-Card IOMUX */ + +#define LIBERO_SETTING_IOMUX1_CR_SD 0x00000000UL +#define LIBERO_SETTING_IOMUX2_CR_SD 0x00000000UL +#define LIBERO_SETTING_IOMUX6_CR_SD 0x0000001DUL +#define LIBERO_SETTING_MSSIO_BANK4_CFG_CR_SD 0x00080907UL +#define LIBERO_SETTING_MSSIO_BANK4_IO_CFG_0_1_CR_SD 0x08290829UL +#define LIBERO_SETTING_MSSIO_BANK4_IO_CFG_2_3_CR_SD 0x08290829UL +#define LIBERO_SETTING_MSSIO_BANK4_IO_CFG_4_5_CR_SD 0x08290829UL +#define LIBERO_SETTING_MSSIO_BANK4_IO_CFG_6_7_CR_SD 0x08290829UL +#define LIBERO_SETTING_MSSIO_BANK4_IO_CFG_8_9_CR_SD 0x08290829UL +#define LIBERO_SETTING_MSSIO_BANK4_IO_CFG_10_11_CR_SD 0x08290829UL +#define LIBERO_SETTING_MSSIO_BANK4_IO_CFG_12_13_CR_SD 0x08290829UL + +/* eMMC / SD switch address */ + +#define SDIO_REGISTER_ADDRESS 0x4f000000 + +#define MPFS_SYSREG_IOMUX1 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_IOMUX1_CR_OFFSET) +#define MPFS_SYSREG_IOMUX2 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_IOMUX2_CR_OFFSET) +#define MPFS_SYSREG_IOMUX6 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_IOMUX6_CR_OFFSET) +#define MPFS_SYSREG_B4_CFG (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_MSSIO_BANK4_CFG_CR) +#define MPFS_SYSREG_B4_0_1 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_MSSIO_BANK4_IO_CFG_0_1_CR_OFFSET) +#define MPFS_SYSREG_B4_2_3 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_MSSIO_BANK4_IO_CFG_2_3_CR_OFFSET) +#define MPFS_SYSREG_B4_4_5 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_MSSIO_BANK4_IO_CFG_4_5_CR_OFFSET) +#define MPFS_SYSREG_B4_6_7 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_MSSIO_BANK4_IO_CFG_6_7_CR_OFFSET) +#define MPFS_SYSREG_B4_8_9 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_MSSIO_BANK4_IO_CFG_8_9_CR_OFFSET) +#define MPFS_SYSREG_B4_10_11 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_MSSIO_BANK4_IO_CFG_10_11_CR_OFFSET) +#define MPFS_SYSREG_4_12_13 (MPFS_SYSREG_BASE + \ + MPFS_SYSREG_MSSIO_BANK4_IO_CFG_12_13_CR_OFFSET) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure defines the state of the MPFS eMMCSD interface */ + +struct mpfs_dev_s +{ + struct sdio_dev_s dev; /* Standard, base SDIO interface */ + + uintptr_t hw_base; /* Base address */ + int plic_irq; /* PLIC interrupt */ + bool clk_enabled; /* Clk state */ + + /* eMMC / SD and HW parameters */ + + bool emmc; /* eMMC or SD */ + int bus_voltage; /* Bus voltage */ + int bus_speed; /* Bus speed */ + bool jumpers_3v3; /* Jumper settings: 1v8 or 3v3 */ + + /* Event support */ + + sem_t waitsem; /* Implements event waiting */ + sdio_eventset_t waitevents; /* Set of events to be waited for */ + uint32_t waitmask; /* Interrupt enables for event waiting */ + volatile sdio_eventset_t wkupevent; /* The event that caused the wakeup */ + struct wdog_s waitwdog; /* Watchdog that handles event timeouts */ + + /* Callback support */ + + sdio_statset_t cdstatus; /* Card status */ + sdio_eventset_t cbevents; /* Set of events to be cause callbacks */ + worker_t callback; /* Registered callback function */ + void *cbarg; /* Registered callback argument */ + struct work_s cbwork; /* Callback work queue structure */ + + /* Interrupt mode data transfer support */ + + uint32_t *buffer; /* Address of current R/W buffer */ + size_t remaining; /* Number of bytes remaining in the transfer */ + size_t receivecnt; /* Real count to receive */ + uint32_t xfrmask; /* Interrupt enables for data transfer */ + + bool widebus; /* Required for DMA support */ + bool onebit; /* true: Only 1-bit transfers are supported */ + + /* DMA data transfer support */ + + bool polltransfer; /* Indicate a poll transfer, no DMA */ + + /* Misc */ + + uint32_t blocksize; /* Current block size */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Low-level helper ********************************************************/ + +#define mpfs_givesem(priv) (nxsem_post(&priv->waitsem)) + +/* Mutual exclusion */ + +#if defined(CONFIG_SDIO_MUXBUS) +static int mpfs_lock(struct sdio_dev_s *dev, bool lock); +#endif + +/* Initialization/setup */ + +static void mpfs_reset(struct sdio_dev_s *dev); +static sdio_capset_t mpfs_capabilities(struct sdio_dev_s *dev); +static sdio_statset_t mpfs_status(struct sdio_dev_s *dev); +static void mpfs_widebus(struct sdio_dev_s *dev, bool enable); +static void mpfs_clock(struct sdio_dev_s *dev, + enum sdio_clock_e rate); +static int mpfs_attach(struct sdio_dev_s *dev); + +/* Command / Status / Data Transfer */ + +static int mpfs_sendcmd(struct sdio_dev_s *dev, uint32_t cmd, + uint32_t arg); +#ifdef CONFIG_SDIO_BLOCKSETUP +static void mpfs_blocksetup(struct sdio_dev_s *dev, + unsigned int blocksize, unsigned int nblocks); +#endif +static int mpfs_recvsetup(struct sdio_dev_s *dev, uint8_t *buffer, + size_t nbytes); +static int mpfs_sendsetup(struct sdio_dev_s *dev, + const uint8_t *buffer, size_t nbytes); +static int mpfs_cancel(struct sdio_dev_s *dev); + +static int mpfs_waitresponse(struct sdio_dev_s *dev, uint32_t cmd); +static int mpfs_recvshortcrc(struct sdio_dev_s *dev, uint32_t cmd, + uint32_t *rshort); +static int mpfs_recvlong(struct sdio_dev_s *dev, uint32_t cmd, + uint32_t rlong[4]); +static int mpfs_recvshort(struct sdio_dev_s *dev, uint32_t cmd, + uint32_t *rshort); + +/* Event handler */ + +static void mpfs_waitenable(struct sdio_dev_s *dev, + sdio_eventset_t eventset, uint32_t timeout); +static sdio_eventset_t mpfs_eventwait(struct sdio_dev_s *dev); +static void mpfs_callbackenable(struct sdio_dev_s *dev, + sdio_eventset_t eventset); +static int mpfs_registercallback(struct sdio_dev_s *dev, + worker_t callback, void *arg); + +/* DMA */ + +#if defined(CONFIG_SDIO_DMA) +static int mpfs_dmarecvsetup(struct sdio_dev_s *dev, + uint8_t *buffer, size_t buflen); +static int mpfs_dmasendsetup(struct sdio_dev_s *dev, + const uint8_t *buffer, size_t buflen); +#endif + +/* Initialization/uninitialization/reset ************************************/ + +static void mpfs_callback(void *arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +struct mpfs_dev_s g_emmcsd_dev = +{ + .dev = + { +#if defined(CONFIG_SDIO_MUXBUS) + .lock = mpfs_lock, +#endif + .reset = mpfs_reset, + .capabilities = mpfs_capabilities, + .status = mpfs_status, + .widebus = mpfs_widebus, + .clock = mpfs_clock, + .attach = mpfs_attach, + .sendcmd = mpfs_sendcmd, +#ifdef CONFIG_SDIO_BLOCKSETUP + .blocksetup = mpfs_blocksetup, +#endif + .recvsetup = mpfs_recvsetup, + .sendsetup = mpfs_sendsetup, + .cancel = mpfs_cancel, + .waitresponse = mpfs_waitresponse, + .recv_r1 = mpfs_recvshortcrc, + .recv_r2 = mpfs_recvlong, + .recv_r3 = mpfs_recvshort, + .recv_r4 = mpfs_recvshort, + .recv_r5 = mpfs_recvshortcrc, + .recv_r6 = mpfs_recvshortcrc, + .recv_r7 = mpfs_recvshort, + .waitenable = mpfs_waitenable, + .eventwait = mpfs_eventwait, + .callbackenable = mpfs_callbackenable, + .registercallback = mpfs_registercallback, +#if defined(CONFIG_SDIO_DMA) + .dmarecvsetup = mpfs_dmarecvsetup, + .dmasendsetup = mpfs_dmasendsetup, +#endif + }, + .hw_base = MPFS_EMMC_SD_BASE, + .plic_irq = MPFS_IRQ_MMC_MAIN, + .emmc = false, + .bus_voltage = MPFS_EMMCSD_3_3V_BUS_VOLTAGE, + .bus_speed = MPFS_EMMCSD_MODE_SDR, + .jumpers_3v3 = true, + .blocksize = 512, + .onebit = false, + .polltransfer = true, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mpfs_takesem + * + * Description: + * Take the wait semaphore (handling false alarm wakeups due to the receipt + * of signals). + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * + * Returned Value: + * Normally OK, but may return -ECANCELED in the rare event that the task + * has been canceled. + * + ****************************************************************************/ + +static int mpfs_takesem(struct mpfs_dev_s *priv) +{ + return nxsem_wait_uninterruptible(&priv->waitsem); +} + +/**************************************************************************** + * Name: mpfs_reset_lines + * + * Description: + * Resets the DAT and CMD lines and waits until they are cleared. + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_reset_lines(struct mpfs_dev_s *priv) +{ + uint32_t retries = EMMCSD_CMDTIMEOUT; + uint32_t status; + + /* Software Reset For DAT Line and CMD Line */ + + modifyreg32(MPFS_EMMCSD_SRS11, 0, MPFS_EMMCSD_SRS11_SRDAT | + MPFS_EMMCSD_SRS11_SRCMD); + + do + { + status = getreg32(MPFS_EMMCSD_SRS11); + } + while ((status & (MPFS_EMMCSD_SRS11_SRDAT | MPFS_EMMCSD_SRS11_SRCMD)) && + --retries); + + if (retries == 0) + { + mcerr("Timeout waiting line resets!\n"); + } +} + +/**************************************************************************** + * Name: mpfs_check_lines_busy + * + * Description: + * Verifies the DAT and CMD lines are available, not busy. + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * + * Returned Value: + * true if busy, false if available + * + ****************************************************************************/ + +static bool mpfs_check_lines_busy(struct mpfs_dev_s *priv) +{ + uint32_t retries = EMMCSD_LONGTIMEOUT; + uint32_t srs9; + + do + { + srs9 = getreg32(MPFS_EMMCSD_SRS09); + } + while (srs9 & (MPFS_EMMCSD_SRS09_CICMD | MPFS_EMMCSD_SRS09_CIDAT) && + --retries); + + if (retries == 0) + { + mcerr("Lines are still busy!\n"); + return true; + } + + return false; +} + +/**************************************************************************** + * Name: mpfs_setclkrate + * + * Description: + * Set the clock rate. Disables the SD clock for the time changing the + * settings, if already enabled. + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * clkcr - New clock rate. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_setclkrate(struct mpfs_dev_s *priv, uint32_t clkrate) +{ + uint32_t baseclk; + uint32_t settings; + uint32_t divider; + uint32_t clkstable; + uint32_t retries = EMMCSD_CMDTIMEOUT; + int i; + + mcinfo("clkrate: %08" PRIx32 "\n", clkrate); + + if (clkrate == 0) + { + modifyreg32(MPFS_EMMCSD_SRS11, MPFS_EMMCSD_SRS11_SDCE, 0); + priv->clk_enabled = false; + return; + } + + baseclk = (getreg32(MPFS_EMMCSD_SRS16) & 0xff00) >> 8; + baseclk *= 1000; + + DEBUGASSERT(baseclk != 0); + + /* 10-bit divider, search for match (N*2) */ + + for (i = 1; i < 2046; i++) + { + if (((baseclk / i) < clkrate) || (((baseclk / i) == clkrate) && + ((baseclk % i) == 0u))) + { + break; + } + } + + divider = ((i / 2) << 8); + + /* Set SDCLK Frequency Select and Internal Clock Enable */ + + settings = (divider & 0xff00u) | ((divider & 0x30000u) >> 10) | + MPFS_EMMCSD_SRS11_ICE; + + /* Disable SD clock if enabled */ + + if (priv->clk_enabled) + { + modifyreg32(MPFS_EMMCSD_SRS11, MPFS_EMMCSD_SRS11_SDCE, 0); + } + + /* Apply new settings */ + + modifyreg32(MPFS_EMMCSD_SRS11, MPFS_EMMCSD_SRS11_SDCFSL | + MPFS_EMMCSD_SRS11_SDCFSH | MPFS_EMMCSD_SRS11_ICE, + settings); + + /* Wait for stable clock */ + + clkstable = getreg32(MPFS_EMMCSD_SRS11); + while (!(clkstable & MPFS_EMMCSD_SRS11_ICS) && --retries) + { + clkstable = getreg32(MPFS_EMMCSD_SRS11); + } + + if (retries == 0) + { + mcwarn("Clock didn't get stable!\n"); + DEBUGPANIC(); + } + + /* HSE bit enabled if clk greater than 25 Mhz */ + + if (clkrate > MPFS_MMC_CLOCK_25MHZ) + { + modifyreg32(MPFS_EMMCSD_SRS10, 0, MPFS_EMMCSD_SRS10_HSE); + } + + priv->clk_enabled = true; + modifyreg32(MPFS_EMMCSD_SRS11, 0, MPFS_EMMCSD_SRS11_SDCE); + + mcinfo("SRS11 now: %08" PRIx32 "\n", getreg32(MPFS_EMMCSD_SRS11)); +} + +/**************************************************************************** + * Name: mpfs_configwaitints + * + * Description: + * Enable/disable SDIO interrupts needed to support the wait function + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * waitmask - The set of bits in the SDIO MASK register to set + * waitevents - Waited for events + * wkupevent - Wake-up events + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_configwaitints(struct mpfs_dev_s *priv, uint32_t waitmask, + sdio_eventset_t waitevents, + sdio_eventset_t wkupevent) +{ + irqstate_t flags; + + /* Save all of the data and set the new interrupt mask in one, atomic + * operation. + */ + + flags = enter_critical_section(); + + priv->waitevents = waitevents; + priv->wkupevent = wkupevent; + priv->waitmask = waitmask; + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: mpfs_configxfrints + * + * Description: + * Enable SDIO interrupts needed to support the data transfer event + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * xfrmask - The set of bits in the SDIO MASK register to set + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_configxfrints(struct mpfs_dev_s *priv, uint32_t xfrmask) +{ + irqstate_t flags; + + flags = enter_critical_section(); + priv->xfrmask = xfrmask; + + mcinfo("Mask: %08" PRIx32 "\n", priv->xfrmask | priv->waitmask); + + putreg32(priv->xfrmask | priv->waitmask, MPFS_EMMCSD_SRS14); + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: mpfs_sendfifo + * + * Description: + * Send SDIO data in interrupt mode + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_sendfifo(struct mpfs_dev_s *priv) +{ + union + { + uint32_t w; + uint8_t b[4]; + } data; + + /* Disable Buffer Write Ready interrupt */ + + modifyreg32(MPFS_EMMCSD_SRS14, MPFS_EMMCSD_SRS14_BWR_IE, 0); + + putreg32(MPFS_EMMCSD_SRS12_TC, MPFS_EMMCSD_SRS12); + + /* We might get extra interrupts */ + + if (priv->remaining == 0) + { + return; + } + + /* Loop while there is more data to be sent and the TX FIFO is not full */ + + while (priv->remaining > 0) + { + /* Is there a full word remaining in the user buffer? */ + + if (priv->remaining >= sizeof(uint32_t)) + { + /* Yes, transfer the word to the TX FIFO */ + + data.w = *priv->buffer++; + priv->remaining -= sizeof(uint32_t); + } + else + { + /* No.. transfer just the bytes remaining in the user buffer, + * padding with zero as necessary to extend to a full word. + */ + + uint8_t *ptr = (uint8_t *)priv->remaining; + int i; + + data.w = 0; + for (i = 0; i < (int)priv->remaining; i++) + { + data.b[i] = *ptr++; + } + + /* Now the transfer is finished */ + + priv->remaining = 0; + } + + /* Put the word in the FIFO */ + + putreg32(data.w, MPFS_EMMCSD_SRS08); + + /* Multi-block writes may hit the wall - stop for now, + * continue later. Enable BWR interrupt, clear status and + * come back when we're good to write again. + */ + + if (priv->remaining && (!(getreg32(MPFS_EMMCSD_SRS09) & + MPFS_EMMCSD_SRS09_BWE))) + { + modifyreg32(MPFS_EMMCSD_SRS14, 0, MPFS_EMMCSD_SRS14_BWR_IE); + putreg32(MPFS_EMMCSD_SRS12_BWR, MPFS_EMMCSD_SRS12); + return; + } + } + + mcinfo("Wrote all\n"); +} + +/**************************************************************************** + * Name: mpfs_recvfifo + * + * Description: + * Receive SDIO data in interrupt mode + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_recvfifo(struct mpfs_dev_s *priv) +{ + union + { + uint32_t w; + uint8_t b[4]; + } data; + + mcinfo("Reading: %lu bytes\n", priv->remaining); + + /* Disable Buffer Read Ready interrupt */ + + modifyreg32(MPFS_EMMCSD_SRS14, MPFS_EMMCSD_SRS14_BRR_IE, 0); + + if (!priv->remaining) + { + return; + } + + /* Loop while there is space to store the data and there is more + * data available in the RX FIFO. + */ + + while (priv->remaining > 0) + { + /* Multi-block reads may hit the wall - stop for now, + * continue later. Enable BRR interrupt, clear status and + * come back when we're good to read more. + */ + + if (!(getreg32(MPFS_EMMCSD_SRS09) & MPFS_EMMCSD_SRS09_BRE)) + { + modifyreg32(MPFS_EMMCSD_SRS14, 0, MPFS_EMMCSD_SRS14_BRR_IE); + putreg32(MPFS_EMMCSD_SRS12_BRR, MPFS_EMMCSD_SRS12); + return; + } + + /* Read the next word from the RX FIFO */ + + data.w = getreg32(MPFS_EMMCSD_SRS08); + if (priv->remaining >= sizeof(uint32_t)) + { + /* Transfer the whole word to the user buffer */ + + *priv->buffer++ = data.w; + priv->remaining -= sizeof(uint32_t); + } + else + { + /* Transfer any trailing fractional word */ + + uint8_t *ptr = (uint8_t *)priv->buffer; + int i; + + for (i = 0; i < (int)priv->remaining; i++) + { + *ptr++ = data.b[i]; + } + + /* Now the transfer is finished */ + + priv->remaining = 0; + } + } + + mcinfo("Read all\n"); +} + +/**************************************************************************** + * Name: mpfs_endwait + * + * Description: + * Wake up a waiting thread if the waited-for event has occurred. + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * wkupevent - The event that caused the wait to end + * + * Returned Value: + * None + * + * Assumptions: + * Always called from the interrupt level with interrupts disabled. + * + ****************************************************************************/ + +static void mpfs_endwait(struct mpfs_dev_s *priv, + sdio_eventset_t wkupevent) +{ + mcinfo("wkupevent: %u\n", wkupevent); + + /* Cancel the watchdog timeout */ + + wd_cancel(&priv->waitwdog); + + /* Disable event-related interrupts */ + + mpfs_configwaitints(priv, 0, 0, wkupevent); + + /* Wake up the waiting thread */ + + mpfs_givesem(priv); +} + +/**************************************************************************** + * Name: mpfs_eventtimeout + * + * Description: + * The watchdog timeout setup when the event wait start has expired without + * any other waited-for event occurring. + * + * Input Parameters: + * arg - The argument + * + * Returned Value: + * None + * + * Assumptions: + * Always called from the interrupt level with interrupts disabled. + * + ****************************************************************************/ + +static void mpfs_eventtimeout(wdparm_t arg) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)arg; + + /* There is always race conditions with timer expirations. */ + + DEBUGASSERT((priv->waitevents & SDIOWAIT_TIMEOUT) != 0 || + priv->wkupevent != 0); + + mcinfo("sta: %08" PRIx32 " enabled irq: %08" PRIx32 "\n", + getreg32(MPFS_EMMCSD_SRS12), + getreg32(MPFS_EMMCSD_SRS13)); + + /* Is a data transfer complete event expected? */ + + if ((priv->waitevents & SDIOWAIT_TIMEOUT) != 0) + { + /* Yes.. wake up any waiting threads */ + + mpfs_endwait(priv, SDIOWAIT_TIMEOUT); + mcerr("Timeout: remaining: %lu\n", priv->remaining); + } +} + +/**************************************************************************** + * Name: mpfs_endtransfer + * + * Description: + * Terminate a transfer with the provided status. This function is called + * only from the SDIO interrupt handler when end-of-transfer conditions + * are detected. + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * wkupevent - The event that caused the transfer to end + * + * Returned Value: + * None + * + * Assumptions: + * Always called from the interrupt level with interrupts disabled. + * + ****************************************************************************/ + +static void mpfs_endtransfer(struct mpfs_dev_s *priv, + sdio_eventset_t wkupevent) +{ + /* Disable all transfer related interrupts */ + + mpfs_configxfrints(priv, 0); + + /* If there were errors, reset lines */ + + if ((wkupevent & (~SDIOWAIT_TRANSFERDONE)) != 0) + { + mpfs_reset_lines(priv); + } + + /* Clear Buffer Read Ready (BRR), BWR and DMA statuses */ + + putreg32(MPFS_EMMCSD_SRS12, MPFS_EMMCSD_SRS12_BRR | + MPFS_EMMCSD_SRS12_BWR | MPFS_EMMCSD_SRS12_DMAINT); + + /* Mark the transfer finished */ + + priv->remaining = 0; + + /* Is a thread wait for these data transfer complete events? */ + + if ((priv->waitevents & wkupevent) != 0) + { + /* Yes.. wake up any waiting threads */ + + mpfs_endwait(priv, wkupevent); + } +} + +/**************************************************************************** + * Name: mpfs_emmcsd_interrupt + * + * Description: + * eMMCSD interrupt handler + * + * Input Parameters: + * priv - Instance of the eMMCSD private state structure. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static int mpfs_emmcsd_interrupt(int irq, void *context, void *arg) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)arg; + uint32_t status; + + DEBUGASSERT(priv != NULL); + + status = getreg32(MPFS_EMMCSD_SRS12); + + mcinfo("status: %08" PRIx32 "\n", status); + + if (status & MPFS_EMMCSD_SRS12_EINT) + { + if (status & MPFS_EMMCSD_SRS12_EDCRC) + { + /* Handle data block send/receive CRC failure */ + + mcerr("ERROR: Data block CRC failure, remaining: %lu\n", + priv->remaining); + + mpfs_endtransfer(priv, SDIOWAIT_TRANSFERDONE | + SDIOWAIT_ERROR); + } + else if (status & MPFS_EMMCSD_SRS12_EDT) + { + /* Handle data timeout error */ + + mcerr("ERROR: Data timeout: %08" PRIx32 " remaining: %lu\n", + status, priv->remaining); + + mpfs_endtransfer(priv, SDIOWAIT_TRANSFERDONE | + SDIOWAIT_TIMEOUT); + } + else if (status & MPFS_EMMCSD_SRS12_EADMA) + { + /* Handle DMA error */ + + mcerr("ERROR: DMA error: %08" PRIx32 " SRS21: %08" PRIx32 "\n", + status, getreg32(MPFS_EMMCSD_SRS21)); + + mpfs_endtransfer(priv, SDIOWAIT_TRANSFERDONE | + SDIOWAIT_ERROR); + } + else + { + /* Generic error, not specified above */ + + mcerr("ERROR: %08" PRIx32 "\n", status); + mpfs_endtransfer(priv, SDIOWAIT_TRANSFERDONE | + SDIOWAIT_ERROR); + } + } + else + { + /* Handle wait events */ + + if (status & MPFS_EMMCSD_SRS12_DMAINT) + { + /* Very large transfers may end up here. + * They are not tested at all. + */ + + mcerr("DMAINT not expected, TC instead!\n"); + + mpfs_endtransfer(priv, SDIOWAIT_TRANSFERDONE); + } + else if (status & MPFS_EMMCSD_SRS12_BRR) + { + if (priv->polltransfer) + { + mpfs_recvfifo(priv); + if (!priv->remaining) + { + if (status & MPFS_EMMCSD_SRS12_TC) + { + mpfs_endtransfer(priv, SDIOWAIT_TRANSFERDONE); + } + } + } + else + { + mpfs_endtransfer(priv, SDIOWAIT_TRANSFERDONE); + } + } + else if (status & MPFS_EMMCSD_SRS12_BWR) + { + if (priv->polltransfer) + { + mpfs_sendfifo(priv); + if (status & MPFS_EMMCSD_SRS12_TC) + { + mpfs_endtransfer(priv, SDIOWAIT_TRANSFERDONE); + } + } + } + else if (status & MPFS_EMMCSD_SRS12_TC) + { + putreg32(MPFS_EMMCSD_SRS12_TC, MPFS_EMMCSD_SRS12); + if (priv->polltransfer && priv->receivecnt) + { + mcerr("Unexpected Transfer Complete!\n"); + } + else + { + mpfs_endtransfer(priv, SDIOWAIT_TRANSFERDONE); + } + } + else if (status & MPFS_EMMCSD_SRS12_CC) + { + /* We don't handle Command Completes here! */ + + DEBUGPANIC(); + } + else if (status & MPFS_EMMCSD_SRS12_CIN) + { + mcinfo("Card inserted!\n"); + + sdio_mediachange((struct sdio_dev_s *)priv, true); + putreg32(MPFS_EMMCSD_SRS12_CIN, MPFS_EMMCSD_SRS12); + } + else if (status & MPFS_EMMCSD_SRS12_CR) + { + mcinfo("Card removed!\n"); + + sdio_mediachange((struct sdio_dev_s *)priv, false); + putreg32(MPFS_EMMCSD_SRS12_CR, MPFS_EMMCSD_SRS12); + } + else + { + mcerr("Status not handled: %08" PRIx32 "\n", status); + } + } + + mcinfo("done\n"); + + return OK; +} + +/**************************************************************************** + * Name: mpfs_lock + * + * Description: + * Locks the bus. Function calls low-level multiplexed bus routines to + * resolve bus requests and acknowledgment issues. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * lock - TRUE to lock, FALSE to unlock. + * + * Returned Value: + * OK on success; a negated errno on failure + * + ****************************************************************************/ + +#if defined(CONFIG_SDIO_MUXBUS) +static int mpfs_lock(struct sdio_dev_s *dev, bool lock) +{ + /* The multiplex bus is part of board support package. */ + + mpfs_muxbus_sdio_lock(dev, lock); + + return OK; +} +#endif + +/**************************************************************************** + * Name: mpfs_set_data_timeout + * + * Description: + * Sets the cycles for determining the data line timeout. + * + * Input Parameters: + * priv - Instance of the eMMCSD private state structure. + * timeout_us - Requested timeout in microseconds + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_set_data_timeout(struct mpfs_dev_s *priv, + uint32_t timeout_us) +{ + uint32_t timeout_interval; + uint32_t sdmclk_khz; + uint32_t sdmclk_mhz; + uint32_t sdmclk; + uint32_t timeout; + uint32_t temp; + uint8_t j; + + temp = getreg32(MPFS_EMMCSD_SRS16); + + /* 0x4u; - 0x4 is dummy -> 50Mhz * 4 = 200Mhz */ + + sdmclk_khz = (temp & 0x0000003fu); + + DEBUGASSERT(sdmclk_khz); + + if (!(temp & MPFS_EMMCSD_SRS16_TCU)) + { + DEBUGASSERT(timeout_us >= 1000); + } + else + { + sdmclk_khz *= 1000; + } + + sdmclk_mhz = sdmclk_khz / 1000; + + if (sdmclk_mhz == 0) + { + sdmclk = sdmclk_khz; + timeout = timeout_us / 1000u; + } + else + { + sdmclk = sdmclk_mhz; + timeout = timeout_us; + } + + /* calculate data timeout counter value */ + + timeout_interval = 8192; /* 2^13 */ + for (j = 0; j < 15; j++) + { + if (timeout < (timeout_interval / sdmclk)) + { + break; + } + + timeout_interval *= 2; + } + + timeout_interval = (uint32_t)j << 16; + + mcinfo("Data timeout: %08" PRIx32 "\n", timeout_interval); + + modifyreg32(MPFS_EMMCSD_SRS11, MPFS_EMMCSD_SRS11_DTCV, timeout_interval); +} + +/**************************************************************************** + * Name: mpfs_set_sdhost_power + * + * Description: + * Sets the requested SD bus voltage. + * + * Input Parameters: + * priv - Instance of the eMMCSD private state structure. + * voltage - Requested voltage: 0v, 3v3, 3v0 or 1v8 + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_set_sdhost_power(struct mpfs_dev_s *priv, uint32_t voltage) +{ + uint32_t srs16; + + /* Disable SD bus power */ + + modifyreg32(MPFS_EMMCSD_SRS10, MPFS_EMMCSD_SRS10_BP, 0); + + /* Clear current voltage settings */ + + modifyreg32(MPFS_EMMCSD_SRS10, MPFS_EMMCSD_SRS10_BVS, 0); + + if (!voltage) + { + return; + } + + srs16 = getreg32(MPFS_EMMCSD_SRS16); + + switch (voltage) + { + case MPFS_EMMCSD_SRS10_3_3V_BUS_VOLTAGE: + DEBUGASSERT(srs16 & MPFS_EMMCSD_SRS16_VS33); + modifyreg32(MPFS_EMMCSD_SRS10, + MPFS_EMMCSD_SRS10_BVS, + MPFS_EMMCSD_SRS10_3_3V_BUS_VOLTAGE | + MPFS_EMMCSD_SRS10_BP); + break; + case MPFS_EMMCSD_SRS10_3_0V_BUS_VOLTAGE: + DEBUGASSERT(srs16 & MPFS_EMMCSD_SRS16_VS30); + modifyreg32(MPFS_EMMCSD_SRS10, + MPFS_EMMCSD_SRS10_BVS, + MPFS_EMMCSD_SRS10_3_0V_BUS_VOLTAGE | + MPFS_EMMCSD_SRS10_BP); + break; + case MPFS_EMMCSD_SRS10_1_8V_BUS_VOLTAGE: + DEBUGASSERT(srs16 & MPFS_EMMCSD_SRS16_VS18); + modifyreg32(MPFS_EMMCSD_SRS10, + MPFS_EMMCSD_SRS10_BVS, + MPFS_EMMCSD_SRS10_1_8V_BUS_VOLTAGE | + MPFS_EMMCSD_SRS10_BP); + break; + default: + DEBUGPANIC(); + } + + nxsig_usleep(1000); +} + +/**************************************************************************** + * Name: mpfs_sdcard_init + * + * Description: + * Switches to use to SD-card instead of eMMC. Call only if the SD-card + * is used, not eMMC. SDIO_REGISTER_ADDRESS is the switch itself: 0 + * means eMMC and 1 is for SD. Also the IOMUX settings are applied + * properly. + * + * Input Parameters: + * priv - Instance of the eMMCSD private state structure. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_sdcard_init(struct mpfs_dev_s *priv) +{ + mcinfo("Init SD-card. Old FPGA will crash here!\n"); + + putreg32(LIBERO_SETTING_IOMUX1_CR_SD, MPFS_SYSREG_IOMUX1); + putreg32(LIBERO_SETTING_IOMUX2_CR_SD, MPFS_SYSREG_IOMUX2); + putreg32(LIBERO_SETTING_IOMUX6_CR_SD, MPFS_SYSREG_IOMUX6); + + /* With 3.3v we exit from here */ + + if (priv->jumpers_3v3) + { + putreg32(1, SDIO_REGISTER_ADDRESS); + return; + } + + putreg32(LIBERO_SETTING_MSSIO_BANK4_CFG_CR_SD, MPFS_SYSREG_B4_CFG); + putreg32(LIBERO_SETTING_MSSIO_BANK4_IO_CFG_0_1_CR_SD, MPFS_SYSREG_B4_0_1); + putreg32(LIBERO_SETTING_MSSIO_BANK4_IO_CFG_2_3_CR_SD, MPFS_SYSREG_B4_2_3); + putreg32(LIBERO_SETTING_MSSIO_BANK4_IO_CFG_4_5_CR_SD, MPFS_SYSREG_B4_4_5); + putreg32(LIBERO_SETTING_MSSIO_BANK4_IO_CFG_6_7_CR_SD, MPFS_SYSREG_B4_6_7); + putreg32(LIBERO_SETTING_MSSIO_BANK4_IO_CFG_8_9_CR_SD, MPFS_SYSREG_B4_8_9); + putreg32(LIBERO_SETTING_MSSIO_BANK4_IO_CFG_10_11_CR_SD, + MPFS_SYSREG_B4_10_11); + putreg32(LIBERO_SETTING_MSSIO_BANK4_IO_CFG_12_13_CR_SD, + MPFS_SYSREG_4_12_13); + + putreg32(1, SDIO_REGISTER_ADDRESS); +} + +/**************************************************************************** + * Name: mpfs_device_reset + * + * Description: + * Reset the SDIO controller. Undo all setup and initialization. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * + * Returned Value: + * true on success, false otherwise + * + ****************************************************************************/ + +static bool mpfs_device_reset(struct sdio_dev_s *dev) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + irqstate_t flags; + uint32_t regval; + uint32_t cap; + uint32_t srs09; + bool retval = true; + int status = MPFS_EMMCSD_INITIALIZED; + + flags = enter_critical_section(); + + up_disable_irq(priv->plic_irq); + + if (!priv->emmc) + { + /* SD card needs FPGA out of reset and FIC3 clks for the eMMC / SD + * switch. It's OK if these are already out of reset or clk applied. + */ + + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, + SYSREG_SOFT_RESET_CR_FPGA | + SYSREG_SOFT_RESET_CR_FIC3, 0); + + modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, 0, + SYSREG_SUBBLK_CLOCK_CR_FIC3); + + mpfs_sdcard_init(priv); + } + + /* Perform system-level reset */ + + modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, 0, + SYSREG_SUBBLK_CLOCK_CR_MMC); + + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, 0, + SYSREG_SOFT_RESET_CR_MMC); + + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, + SYSREG_SOFT_RESET_CR_MMC, 0); + + nxsig_sleep(1); + + /* Perform module-level reset */ + + modifyreg32(MPFS_EMMCSD_HRS00, 0, MPFS_EMMCSD_HRS00_SWR); + + nxsig_usleep(1000); + + do + { + regval = getreg32(MPFS_EMMCSD_HRS00); + } + while (regval & MPFS_EMMCSD_HRS00_SWR); + + putreg32(MPFS_EMMCSD_DEBOUNCE_TIME, MPFS_EMMCSD_HRS01); + + modifyreg32(MPFS_EMMCSD_HRS06, MPFS_EMMCSD_HRS06_EMM, 0); + + /* eMMC, not SD */ + + if (priv->emmc) + { + modifyreg32(MPFS_EMMCSD_HRS06, 0, MPFS_EMMCSD_MODE_LEGACY); + } + + putreg32(MPFS_EMMCSD_SRS12_STAT_CLEAR, MPFS_EMMCSD_SRS12); + + cap = getreg32(MPFS_EMMCSD_SRS16); + + /* DMA 64 bit support? */ + + if (cap & MPFS_EMMCSD_SRS16_A64S) + { + modifyreg32(MPFS_EMMCSD_SRS15, 0, MPFS_EMMCSD_SRS15_A64B | + MPFS_EMMCSD_SRS15_HV4E); + } + +#ifdef CONFIG_SDIO_DMA + /* Check if SDMA is supported */ + + if (!(cap & MPFS_EMMCSD_SRS16_DMAS)) + { + mcerr("DMA not supported!\n"); + DEBUGPANIC(); + } + + uint64_t pmpcfg_mmc_x; + + /* DMA will not work with the power-on default PMPCFG values. + * Check that the HSS or envm bootloader has applied the + * following values below, provide info if not. + */ + + pmpcfg_mmc_x = getreg64(MPFS_PMPCFG_MMC_0); + if ((pmpcfg_mmc_x & 0x1ffffff000000000) != 0x1f00000000000000) + { + mcinfo("Please check PMPCFG_MMC0 register.\n"); + } + + pmpcfg_mmc_x = getreg64(MPFS_PMPCFG_MMC_1); + if ((pmpcfg_mmc_x & 0x1ffffff000000000) != 0x1f00000000000000) + { + mcinfo("Please check PMPCFG_MMC1 register.\n"); + } + + pmpcfg_mmc_x = getreg64(MPFS_PMPCFG_MMC_2); + if ((pmpcfg_mmc_x & 0x1ffffff000000000) != 0x1f00000000000000) + { + mcinfo("Please check PMPCFG_MMC2 register.\n"); + } + + pmpcfg_mmc_x = getreg64(MPFS_PMPCFG_MMC_3); + if ((pmpcfg_mmc_x & 0x1ffffff000000000) != 0x1f00000000000000) + { + mcinfo("Please check PMPCFG_MMC3 register.\n"); + } + +#endif + + /* Clear interrupt status and disable interrupts */ + + putreg32(MPFS_EMMCSD_SRS13_STATUS_EN, MPFS_EMMCSD_SRS13); + putreg32(0, MPFS_EMMCSD_SRS14); + + mpfs_set_data_timeout(priv, MPFS_EMMCSD_DATA_TIMEOUT); + + /* Turn off host controller power */ + + mpfs_set_sdhost_power(priv, 0); + + /* Card state stable */ + + srs09 = getreg32(MPFS_EMMCSD_SRS09); + DEBUGASSERT(srs09 & MPFS_EMMCSD_SRS09_CSS); + + if (!priv->emmc) + { + if (!(srs09 & MPFS_EMMCSD_SRS09_CI)) + { + mcerr("Please insert the SD card!\n"); + + /* No card detected, cannot communicate with it */ + + retval = false; + } + } + + /* Set 1-bit bus mode */ + + modifyreg32(MPFS_EMMCSD_SRS10, + MPFS_EMMCSD_SRS10_DTW | MPFS_EMMCSD_SRS10_EDTW, + 0); + + if (priv->emmc) + { + switch (priv->bus_voltage) + { + case MPFS_EMMCSD_1_8V_BUS_VOLTAGE: + mpfs_set_sdhost_power(priv, MPFS_EMMCSD_SRS10_1_8V_BUS_VOLTAGE); + break; + + case MPFS_EMMCSD_3_3V_BUS_VOLTAGE: + if ((priv->bus_speed != MPFS_EMMCSD_MODE_HS200) && + (priv->bus_speed != MPFS_EMMCSD_MODE_HS400_ES) && + (priv->bus_speed != MPFS_EMMCSD_MODE_HS400)) + { + mpfs_set_sdhost_power(priv, + MPFS_EMMCSD_SRS10_3_3V_BUS_VOLTAGE); + } + else + { + status = MPFS_EMMCSD_NOT_INITIALIZED; + mcerr("Voltage / mode combination not supported!\n"); + } + break; + + default: + DEBUGPANIC(); + } + } + else + { + /* SD-card support currently only 3.3v */ + + mpfs_set_sdhost_power(priv, MPFS_EMMCSD_SRS10_3_3V_BUS_VOLTAGE); + } + + if (status == MPFS_EMMCSD_INITIALIZED) + { + mpfs_setclkrate(priv, MPFS_MMC_CLOCK_400KHZ); + } + + nxsig_usleep(1000); + + /* Reset data */ + + priv->waitevents = 0; /* Set of events to be waited for */ + priv->waitmask = 0; /* Interrupt enables for event waiting */ + priv->wkupevent = 0; /* The event that caused the wakeup */ + + wd_cancel(&priv->waitwdog); /* Cancel any timeouts */ + + /* Interrupt mode data transfer support */ + + priv->buffer = 0; /* Address of current R/W buffer */ + priv->remaining = 0; /* Number of bytes remaining in the transfer */ + priv->xfrmask = 0; /* Interrupt enables for data transfer */ + + priv->widebus = false; + + mpfs_reset_lines(priv); + + leave_critical_section(flags); + + return retval; +} + +/**************************************************************************** + * Name: mpfs_reset + * + * Description: + * Reset the SDIO controller via mpfs_device_reset. This is a wrapper + * function only. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_reset(struct sdio_dev_s *dev) +{ + mpfs_device_reset(dev); +} + +/**************************************************************************** + * Name: mpfs_capabilities + * + * Description: + * Get capabilities (and limitations) of the SDIO driver (optional) + * + * Input Parameters: + * dev - Device-specific state data + * + * Returned Value: + * Returns a bitset of status values (see SDIO_CAPS_* defines) + * + ****************************************************************************/ + +static sdio_capset_t mpfs_capabilities(struct sdio_dev_s *dev) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + sdio_capset_t caps = 0; + + if (priv->onebit) + { + caps |= SDIO_CAPS_1BIT_ONLY; + } + + /* This reverses the logic for mmcsd_writesingle(): setup first, then + * the command is sent. Normally the command is sent first and the setup + * via SDIO_SENDSETUP(). + */ + + caps |= SDIO_CAPS_DMABEFOREWRITE; + +#ifdef CONFIG_SDIO_DMA + caps |= SDIO_CAPS_DMASUPPORTED; +#endif + + return caps; +} + +/**************************************************************************** + * Name: mpfs_status + * + * Description: + * Get SDIO status. + * + * Input Parameters: + * dev - Device-specific state data + * + * Returned Value: + * Returns a bitset of status values (see mpfs_status_* defines) + * + ****************************************************************************/ + +static sdio_statset_t mpfs_status(struct sdio_dev_s *dev) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + return priv->cdstatus; +} + +/**************************************************************************** + * Name: mpfs_widebus + * + * Description: + * Called after change in Bus width has been selected (via ACMD6). Most + * controllers will need to perform some special operations to work + * correctly in the new bus mode. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * wide - true: wide bus (4-bit) bus mode enabled + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_widebus(struct sdio_dev_s *dev, bool wide) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + priv->widebus = wide; + + mcinfo("wide: %d\n", wide); + + if (wide) + { + modifyreg32(MPFS_EMMCSD_SRS10, 0, MPFS_EMMCSD_SRS10_DTW); + } + else + { + modifyreg32(MPFS_EMMCSD_SRS10, MPFS_EMMCSD_SRS10_DTW, 0); + } +} + +/**************************************************************************** + * Name: mpfs_clock + * + * Description: + * Enable/disable SDIO clocking. Only up to 25 Mhz is supported now. 50 Mhz + * may work with some cards. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * rate - Specifies the clocking to use (see enum sdio_clock_e) + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_clock(struct sdio_dev_s *dev, enum sdio_clock_e rate) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + uint32_t clckr; + + switch (rate) + { + /* Disable clock */ + + default: + case CLOCK_SDIO_DISABLED: + clckr = 0; + break; + + /* Enable in initial ID mode clocking (400KHz) */ + + case CLOCK_IDMODE: + clckr = MPFS_MMC_CLOCK_400KHZ; + break; + + /* Enable normal MMC operation clocking */ + + case CLOCK_MMC_TRANSFER: + clckr = MPFS_MMC_CLOCK_25MHZ; + break; + + /* SD normal operation clocking (wide 4-bit mode) */ + + case CLOCK_SD_TRANSFER_4BIT: + clckr = MPFS_MMC_CLOCK_25MHZ; + break; + + /* SD normal operation clocking (narrow 1-bit mode) */ + + case CLOCK_SD_TRANSFER_1BIT: + clckr = MPFS_MMC_CLOCK_25MHZ; + break; + } + + /* Set the new clock frequency */ + + mpfs_setclkrate(priv, clckr); +} + +/**************************************************************************** + * Name: mpfs_attach + * + * Description: + * Attach and prepare interrupts + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * + * Returned Value: + * OK on success; A negated errno on failure. + * + ****************************************************************************/ + +static int mpfs_attach(struct sdio_dev_s *dev) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + int ret; + + /* Attach the SDIO interrupt handler */ + + ret = irq_attach(priv->plic_irq, mpfs_emmcsd_interrupt, priv); + if (ret == OK) + { + /* Disable all interrupts at the SDIO controller and clear + * interrupt flags, except current limit error, card interrupt, + * card removal and card insertion + */ + + modifyreg32(MPFS_EMMCSD_SRS12, MPFS_EMMCSD_SRS12_ECL | + MPFS_EMMCSD_SRS12_CINT | + MPFS_EMMCSD_SRS12_CR | + MPFS_EMMCSD_SRS12_CIN, + 0); + + /* Enable SDIO interrupts. They can now be enabled at the + * SDIO controller as needed. + */ + + up_enable_irq(priv->plic_irq); + + /* Enable card insertion and removal interrupts */ + + putreg32(MPFS_EMMCSD_CARD_INTS, MPFS_EMMCSD_SRS14); + } + + mcinfo("attach: %d\n", ret); + + return ret; +} + +/**************************************************************************** + * Name: mpfs_sendcmd + * + * Description: + * Send the SDIO command + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * cmd - The command to send (32-bits, encoded) + * arg - 32-bit argument required with some commands + * + * Returned Value: + * OK if no errors, an error otherwise + * + ****************************************************************************/ + +static int mpfs_sendcmd(struct sdio_dev_s *dev, uint32_t cmd, + uint32_t arg) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + uint32_t command_information; + uint32_t cmdidx; + + /* Check if command / data lines are busy */ + + if (mpfs_check_lines_busy(priv)) + { + mcerr("Busy!\n"); + return -EBUSY; + } + + /* Clear all status interrupts */ + + putreg32(MPFS_EMMCSD_SRS12_STAT_CLEAR, MPFS_EMMCSD_SRS12); + + /* Check response type */ + + switch (cmd & MMCSD_RESPONSE_MASK) + { + case MMCSD_R2_RESPONSE: + command_information = MPFS_EMMCSD_SRS03_RESP_L136 | + MPFS_EMMCSD_SRS03_CRCCE; + break; + case MMCSD_R3_RESPONSE: + case MMCSD_R4_RESPONSE: + command_information = MPFS_EMMCSD_SRS03_RESP_L48; + break; + case MMCSD_R1_RESPONSE: + case MMCSD_R5_RESPONSE: + case MMCSD_R6_RESPONSE: + case MMCSD_R7_RESPONSE: + command_information = MPFS_EMMCSD_SRS03_RESP_L48 | + MPFS_EMMCSD_SRS03_CRCCE | + MPFS_EMMCSD_SRS03_CICE; + break; + case MMCSD_R1B_RESPONSE: + command_information = MPFS_EMMCSD_SRS03_RESP_L48B | + MPFS_EMMCSD_SRS03_CRCCE | + MPFS_EMMCSD_SRS03_CICE; + break; + case MMCSD_NO_RESPONSE: + command_information = MPFS_EMMCSD_SRS03_NO_RESPONSE; + break; + default: + return -EINVAL; + } + + putreg32(arg, MPFS_EMMCSD_SRS02); + + cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT; + + if (cmd & MMCSD_DATAXFR_MASK) + { + command_information |= MPFS_EMMCSD_SRS03_DPS | + MPFS_EMMCSD_SRS03_BCE | + MPFS_EMMCSD_SRS03_RECE; + +#ifdef CONFIG_SDIO_DMA + if (!priv->polltransfer) + { + command_information |= MPFS_EMMCSD_SRS03_DMAE; + } +#endif + + if ((cmd & MMCSD_DATAXFR_MASK) == MMCSD_RDDATAXFR) + { + command_information |= MPFS_EMMCSD_SRS03_DTDS; + mcinfo("cmd & MMCSD_RDDATAXFR\n"); + } + + if (cmd & MMCSD_MULTIBLOCK) + { + command_information |= MPFS_EMMCSD_SRS03_MSBS; + } + + mcinfo("cmd & MMCSD_DATAXFR_MASK\n"); + } + + putreg32((((cmdidx << 24) & MPFS_EMMCSD_SRS03_CIDX) | command_information), + MPFS_EMMCSD_SRS03); + + mcinfo("sendcmd: %08" PRIx32 " cmd: %08" PRIx32 " arg: %08" PRIx32 + " cmdidx: %08" PRIx32 "\n", + command_information, cmd, arg, cmdidx); + + return OK; +} + +/**************************************************************************** + * Name: mpfs_blocksetup + * + * Description: + * Configure block size and the number of blocks for next transfer. + * + * Input Parameters: + * dev - An instance of the SDIO device interface. + * blocksize - The selected block size. + * nblocks - The number of blocks to transfer. + * + * Returned Value: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SDIO_BLOCKSETUP +static void mpfs_blocksetup(struct sdio_dev_s *dev, + unsigned int blocksize, unsigned int nblocks) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + + priv->blocksize = blocksize; + + putreg32(priv->blocksize | (nblocks << 16) | + MPFS_EMMCSD_SRS01_DMA_SZ_512KB, MPFS_EMMCSD_SRS01); +} +#endif + +/**************************************************************************** + * Name: mpfs_recvsetup + * + * Description: + * Setup hardware in preparation for data transfer from the card in non-DMA + * (interrupt driven mode). This method will do whatever controller setup + * is necessary. This would be called for SD memory just BEFORE sending + * CMD13 (SEND_STATUS), CMD17 (READ_SINGLE_BLOCK), CMD18 + * (READ_MULTIPLE_BLOCKS), ACMD51 (SEND_SCR), etc. Normally, + * EMMCSD_WAITEVENT will be called to receive the indication that the + * transfer is complete. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * buffer - Address of the buffer in which to receive the data + * nbytes - The number of bytes in the transfer + * + * Returned Value: + * Number of bytes sent on success; a negated errno on failure + * + ****************************************************************************/ + +static int mpfs_recvsetup(struct sdio_dev_s *dev, uint8_t *buffer, + size_t nbytes) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + + mcinfo("Receive: %zu bytes\n", nbytes); + + DEBUGASSERT(priv != NULL && buffer != NULL && nbytes > 0); + DEBUGASSERT(((uintptr_t)buffer & 3) == 0); + + priv->buffer = (uint32_t *)buffer; + priv->remaining = nbytes; + priv->receivecnt = nbytes; + priv->polltransfer = true; + + mpfs_check_lines_busy(priv); + + /* Set up the SDIO data path, reset DAT and CMD lines */ + + mpfs_reset_lines(priv); + +#ifndef CONFIG_SDIO_BLOCKSETUP + uint32_t blockcount = ((nbytes - 1) / priv->blocksize) + 1; + putreg32(priv->blocksize | (blockcount << 16), MPFS_EMMCSD_SRS01); +#endif + + putreg32(MPFS_EMMCSD_SRS13_STATUS_EN, MPFS_EMMCSD_SRS13); + putreg32(MPFS_EMMCSD_SRS12_STAT_CLEAR, MPFS_EMMCSD_SRS12); + + /* Enable interrupts */ + + mpfs_configxfrints(priv, MPFS_EMMCSD_RECV_MASK); + + return OK; +} + +/**************************************************************************** + * Name: mpfs_sendsetup + * + * Description: + * Setup hardware in preparation for data transfer from the card. This + * method will do whatever controller setup is necessary. This would be + * called for SD memory just BEFORE sending CMD24 (WRITE_BLOCK), CMD25 + * (WRITE_MULTIPLE_BLOCK). + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * buffer - Address of the buffer containing the data to send + * nbytes - The number of bytes in the transfer + * + * Returned Value: + * Number of bytes sent on success; a negated errno on failure + * + ****************************************************************************/ + +static int mpfs_sendsetup(struct sdio_dev_s *dev, const + uint8_t *buffer, size_t nbytes) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + + mcinfo("Send: %zu bytes\n", nbytes); + + DEBUGASSERT(priv != NULL && buffer != NULL && nbytes > 0); + DEBUGASSERT(((uintptr_t)buffer & 3) == 0); + + mpfs_check_lines_busy(priv); + + /* Save the source buffer information for use by the interrupt handler */ + + priv->buffer = (uint32_t *)buffer; + priv->remaining = nbytes; + priv->receivecnt = 0; + priv->polltransfer = true; + +#ifndef CONFIG_SDIO_BLOCKSETUP + uint32_t blockcount = ((nbytes - 1) / priv->blocksize) + 1; + putreg32(priv->blocksize | (blockcount << 16), MPFS_EMMCSD_SRS01); +#endif + + putreg32(MPFS_EMMCSD_SRS13_STATUS_EN, MPFS_EMMCSD_SRS13); + putreg32(~(MPFS_EMMCSD_SRS12_BWR), MPFS_EMMCSD_SRS12); + + /* Enable interrupts */ + + mpfs_configxfrints(priv, MPFS_EMMCSD_SEND_MASK); + + return OK; +} + +/**************************************************************************** + * Name: mpfs_dmarecvsetup + * + * Description: + * Setup to perform a read DMA. If the processor supports a data cache, + * then this method will also make sure that the contents of the DMA memory + * and the data cache are coherent. For read transfers this may mean + * invalidating the data cache. No cache support is currently implemented. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * buffer - The memory to DMA from + * buflen - The size of the DMA transfer in bytes + * + * Returned Value: + * OK on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_SDIO_DMA +static int mpfs_dmarecvsetup(struct sdio_dev_s *dev, + uint8_t *buffer, size_t buflen) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; +#ifndef CONFIG_SDIO_BLOCKSETUP + uint32_t blockcount; +#endif + + mcinfo("Receive: %zu bytes\n", buflen); + + DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0); + DEBUGASSERT(((uintptr_t)buffer & 3) == 0); + + priv->buffer = (uint32_t *)buffer; + priv->remaining = buflen; + priv->receivecnt = buflen; + priv->polltransfer = false; + + /* Set up the SDIO data path, reset DAT and CMD lines */ + + mpfs_reset_lines(priv); + + modifyreg32(MPFS_EMMCSD_SRS10, MPFS_EMMCSD_SRS10_DMASEL, 0); + + putreg32((uintptr_t)buffer, MPFS_EMMCSD_SRS22); + putreg32((uintptr_t)((uint64_t)buffer >> 32), MPFS_EMMCSD_SRS23); +#ifndef CONFIG_SDIO_BLOCKSETUP + blockcount = ((buflen - 1) / priv->blocksize) + 1; + + putreg32((priv->blocksize | (blockcount << 16) | + MPFS_EMMCSD_SRS01_DMA_SZ_512KB), MPFS_EMMCSD_SRS01); +#endif + + /* Clear interrupt status */ + + putreg32(MPFS_EMMCSD_SRS12_STAT_CLEAR, MPFS_EMMCSD_SRS12); + + mpfs_configxfrints(priv, MPFS_EMMCSD_RECV_MASKDMA); + + return OK; +} +#endif + +/**************************************************************************** + * Name: mpfs_dmasendsetup + * + * Description: + * Setup to perform a write DMA. No cache support is currently implemented. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * buffer - The memory to DMA into + * buflen - The size of the DMA transfer in bytes + * + * Returned Value: + * OK on success; a negated errno on failure + * + ****************************************************************************/ + +#ifdef CONFIG_SDIO_DMA +static int mpfs_dmasendsetup(struct sdio_dev_s *dev, + const uint8_t *buffer, size_t buflen) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; +#ifndef CONFIG_SDIO_BLOCKSETUP + uint32_t blockcount; +#endif + + mcinfo("Send: %zu bytes\n", buflen); + + DEBUGASSERT(priv != NULL && buffer != NULL && buflen > 0); + DEBUGASSERT(((uintptr_t)buffer & 3) == 0); + + /* DMA send doesn't work in 0x08xxxxxxx address range. Default to IRQ mode + * in this special case. + */ + + if (((uintptr_t)buffer & 0xff000000) == 0x08000000) + { + return mpfs_sendsetup(dev, buffer, buflen); + } + + /* Save the source buffer information for use by the interrupt handler */ + + priv->buffer = (uint32_t *)buffer; + priv->remaining = buflen; + priv->receivecnt = 0; + priv->polltransfer = false; + + modifyreg32(MPFS_EMMCSD_SRS10, MPFS_EMMCSD_SRS10_DMASEL, 0); + + putreg32((uintptr_t)buffer, MPFS_EMMCSD_SRS22); + putreg32((uintptr_t)((uint64_t)buffer >> 32), MPFS_EMMCSD_SRS23); + +#ifndef CONFIG_SDIO_BLOCKSETUP + blockcount = ((buflen - 1) / priv->blocksize) + 1; + + putreg32((priv->blocksize | (blockcount << 16) | + MPFS_EMMCSD_SRS01_DMA_SZ_512KB), + MPFS_EMMCSD_SRS01); +#endif + + /* Clear interrupt status */ + + putreg32(MPFS_EMMCSD_SRS12_STAT_CLEAR, MPFS_EMMCSD_SRS12); + + mpfs_configxfrints(priv, MPFS_EMMCSD_SEND_MASKDMA); + + return OK; +} +#endif + +/**************************************************************************** + * Name: mpfs_cancel + * + * Description: + * Cancel the data transfer setup of EMMCSD_RECVSETUP, EMMCSD_SENDSETUP, + * EMMCSD_DMARECVSETUP or EMMCSD_DMASENDSETUP. This must be called to + * cancel the data transfer setup if, for some reason, you cannot perform + * the transfer. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * + * Returned Value: + * OK is success; a negated errno on failure + * + ****************************************************************************/ + +static int mpfs_cancel(struct sdio_dev_s *dev) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + + /* Disable all transfer- and event- related interrupts */ + + mpfs_configxfrints(priv, 0); + mpfs_configwaitints(priv, 0, 0, 0); + + /* If this was a DMA transfer, make sure that DMA is stopped */ + + modifyreg32(MPFS_EMMCSD_SRS03, MPFS_EMMCSD_SRS03_DMAE, 0); + + /* Clearing pending interrupt status on all transfer- and event- related + * interrupts + */ + + putreg32(MPFS_EMMCSD_WAITALL_ICR, MPFS_EMMCSD_SRS12); + + /* Cancel any watchdog timeout */ + + wd_cancel(&priv->waitwdog); + + /* Mark no transfer in progress */ + + priv->remaining = 0; + return OK; +} + +/**************************************************************************** + * Name: mpfs_waitresponse + * + * Description: + * Poll-wait for the response to the last command to be ready. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * cmd - The command that was sent. + * + * Returned Value: + * OK is success; a negated errno on failure + * + ****************************************************************************/ + +static int mpfs_waitresponse(struct sdio_dev_s *dev, uint32_t cmd) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + uint32_t status; + int32_t timeout; + uint32_t waitbits; + + mcinfo("cmd: %08" PRIx32 "\n", cmd); + + switch (cmd & MMCSD_RESPONSE_MASK) + { + case MMCSD_NO_RESPONSE: + timeout = EMMCSD_CMDTIMEOUT; + break; + + case MMCSD_R1_RESPONSE: + case MMCSD_R1B_RESPONSE: + case MMCSD_R2_RESPONSE: + case MMCSD_R4_RESPONSE: + case MMCSD_R5_RESPONSE: + case MMCSD_R6_RESPONSE: + timeout = EMMCSD_LONGTIMEOUT; + break; + + case MMCSD_R3_RESPONSE: + case MMCSD_R7_RESPONSE: + timeout = EMMCSD_CMDTIMEOUT; + break; + + default: + mcerr("Unknown command\n"); + return -EINVAL; + } + + /* Then wait for the response (or timeout) */ + + if (cmd & MMCSD_DATAXFR_MASK) + { + waitbits = MPFS_EMMCSD_SRS12_CC; + } + + do + { + status = getreg32(MPFS_EMMCSD_SRS12); + } + while (!(status & (waitbits | MPFS_EMMCSD_SRS12_EINT)) + && --timeout); + + if (timeout == 0 || (status & MPFS_EMMCSD_SRS12_ECT)) + { + mcerr("ERROR: Timeout cmd: %08" PRIx32 " stat: %08" PRIx32 " wb: %08" + PRIx32 "\n", cmd, status, waitbits); + return -EBUSY; + } + + mcinfo("status: %08" PRIx32 "\n", status); + + return OK; +} + +/**************************************************************************** + * Name: mpfs_check_recverror + * + * Description: + * Receive response to SDIO command. + * + * Input Parameters: + * priv - Instance of the EMMCSD private state structure. + * + * Returned Value: + * OK on success; a negated errno if error detected. + * + ****************************************************************************/ + +static int mpfs_check_recverror(struct mpfs_dev_s *priv) +{ + uint32_t regval; + int ret = OK; + + regval = getreg32(MPFS_EMMCSD_SRS12); + + if (regval & MPFS_EMMCSD_SRS12_EINT) + { + if (regval & (MPFS_EMMCSD_SRS12_ECT | MPFS_EMMCSD_SRS12_EDT)) + { + mcerr("ERROR: Command timeout: %08" PRIx32 "\n", regval); + ret = -ETIMEDOUT; + } + else if (regval & MPFS_EMMCSD_SRS12_EDCRC) + { + mcerr("ERROR: CRC failure: %08" PRIx32 "\n", regval); + ret = -EIO; + } + else + { + mcerr("ERROR: %08" PRIx32 "\n", regval); + ret = -EIO; + } + } + else if (!(regval & MPFS_EMMCSD_SRS12_CC)) + { + mcerr("ERROR: Command not completed: %08" PRIx32 "\n", regval); + ret = -EIO; + } + + if (ret) + { + /* With an error, reset DAT and CMD lines. Otherwise the next command + * will fail as well. + */ + + mpfs_reset_lines(priv); + + /* Clear all status interrupts */ + + putreg32(MPFS_EMMCSD_SRS12_STAT_CLEAR, MPFS_EMMCSD_SRS12); + } + + return ret; +} + +/**************************************************************************** + * Name: mpfs_recvshortcrc + * + * Description: + * Receive response to SDIO command. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * cmd - Command + * rshort - Buffer for reveiving the response + * + * Returned Value: + * OK on success; a negated errno on failure. + * + ****************************************************************************/ + +static int mpfs_recvshortcrc(struct sdio_dev_s *dev, uint32_t cmd, + uint32_t *rshort) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + int ret = OK; + + /* Check if a timeout or CRC error occurred */ + + if (!(cmd & MMCSD_DATAXFR_MASK)) /* TBD: Fix this bypass! */ + { + ret = mpfs_check_recverror(priv); + } + + if (rshort) + { + *rshort = getreg32(MPFS_EMMCSD_SRS04); + mcinfo("recv: %08" PRIx32 "\n", *rshort); + } + + return ret; +} + +/**************************************************************************** + * Name: mpfs_recvshort + * + * Description: + * Receive response to SDIO command. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * cmd - Command + * rshort - Buffer for reveiving the response + * + * Returned Value: + * OK on success; a negated errno on failure. + * + ****************************************************************************/ + +static int mpfs_recvshort(struct sdio_dev_s *dev, uint32_t cmd, + uint32_t *rshort) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + int ret = OK; + + if (!(cmd & MMCSD_DATAXFR_MASK)) + { + ret = mpfs_check_recverror(priv); + } + + if (rshort) + { + *rshort = getreg32(MPFS_EMMCSD_SRS04); + mcinfo("recv: %08" PRIx32 "\n", *rshort); + } + + return ret; +} + +/**************************************************************************** + * Name: mpfs_recvlong + * + * Description: + * Receive response to SDIO command. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * cmd - Command + * rlong - Buffer for reveiving the response + * + * Returned Value: + * OK on success; a negated errno on failure. + * + ****************************************************************************/ + +static int mpfs_recvlong(struct sdio_dev_s *dev, uint32_t cmd, + uint32_t rlong[4]) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + int ret; + + ret = mpfs_check_recverror(priv); + + /* Return the long response */ + + if (rlong) + { + /* Last 8-bits are missing, see SRS04 documemntation, RESP3[23:0] + * has only 24 bits unlike RESP2, RESP1 and RESP0 that have 32 bits. + * We have to shift left 8 bits to match the proper long response. + */ + + rlong[3] = getreg32(MPFS_EMMCSD_SRS04) << 8; + rlong[2] = getreg32(MPFS_EMMCSD_SRS05) << 8; + rlong[1] = getreg32(MPFS_EMMCSD_SRS06) << 8; + rlong[0] = getreg32(MPFS_EMMCSD_SRS07) << 8; + + mcinfo("recv: %08" PRIx32 " %08" PRIx32 " %08" PRIx32 " %08" \ + PRIx32"\n", rlong[0], rlong[1], rlong[2], rlong[3]); + } + + return ret; +} + +/**************************************************************************** + * Name: mpfs_waitenable + * + * Description: + * Enable/disable of a set of SDIO wait events. This is part of the + * the EMMCSD_WAITEVENT sequence. The set of to-be-waited-for events is + * configured before calling mpfs_eventwait. This is done in this way + * to help the driver to eliminate race conditions between the command + * setup and the subsequent events. + * + * The enabled events persist until either (1) EMMCSD_WAITENABLE is called + * again specifying a different set of wait events, or (2) EMMCSD_EVENTWAIT + * returns. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * eventset - A bitset of events to enable or disable (see SDIOWAIT_* + * definitions). 0=disable; 1=enable. + * timeout - SDIO timeout + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_waitenable(struct sdio_dev_s *dev, + sdio_eventset_t eventset, uint32_t timeout) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + uint32_t waitmask = 0; + + mcinfo("eventset: %02" PRIx8 "\n", eventset); + + DEBUGASSERT(priv != NULL); + + /* Disable event-related interrupts */ + + mpfs_configwaitints(priv, 0, 0, 0); + + /* Select the interrupt mask that will give us the appropriate wakeup + * interrupts. + */ + + if ((eventset & SDIOWAIT_CMDDONE) != 0) + { + waitmask |= MPFS_EMMCSD_CMDDONE_MASK; + } + + if ((eventset & SDIOWAIT_RESPONSEDONE) != 0) + { + waitmask |= MPFS_EMMCSD_RESPDONE_MASK; + } + + if ((eventset & SDIOWAIT_TRANSFERDONE) != 0) + { + } + + /* Enable event-related interrupts */ + + mpfs_configwaitints(priv, waitmask, eventset, 0); + + /* Check if the timeout event is specified in the event set */ + + if ((priv->waitevents & SDIOWAIT_TIMEOUT) != 0) + { + int delay; + int ret; + + /* Yes.. Handle a cornercase: The user request a timeout event but + * with timeout == 0? + */ + + if (!timeout) + { + priv->wkupevent = SDIOWAIT_TIMEOUT; + return; + } + + /* Start the watchdog timer */ + + delay = MSEC2TICK(timeout); + ret = wd_start(&priv->waitwdog, delay, + mpfs_eventtimeout, (wdparm_t)priv); + if (ret < OK) + { + mcerr("ERROR: wd_start failed: %d\n", ret); + } + } +} + +/**************************************************************************** + * Name: mpfs_eventwait + * + * Description: + * Wait for one of the enabled events to occur (or a timeout). Note that + * all events enabled by EMMCSD_WAITEVENTS are disabled when mpfs_eventwait + * returns. EMMCSD_WAITEVENTS must be called again before mpfs_eventwait + * can be used again. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * timeout - Maximum time in milliseconds to wait. Zero means immediate + * timeout with no wait. The timeout value is ignored if + * SDIOWAIT_TIMEOUT is not included in the waited-for eventset. + * + * Returned Value: + * Event set containing the event(s) that ended the wait. Should always + * be non-zero. All events are disabled after the wait concludes. + * + ****************************************************************************/ + +static sdio_eventset_t mpfs_eventwait(struct sdio_dev_s *dev) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + sdio_eventset_t wkupevent = 0; + irqstate_t flags; + int ret; + + mcinfo("wait\n"); + + /* There is a race condition here... the event may have completed before + * we get here. In this case waitevents will be zero, but wkupevents will + * be non-zero (and, hopefully, the semaphore count will also be non-zero. + */ + + flags = enter_critical_section(); + + DEBUGASSERT(priv->waitevents != 0 || priv->wkupevent != 0); + + /* Loop until the event (or the timeout occurs). Race conditions are + * avoided by calling mpfs_waitenable prior to triggering the logic that + * will cause the wait to terminate. Under certain race conditions, the + * waited-for may have already occurred before this function was called! + */ + + for (; ; ) + { + /* Wait for an event in event set to occur. If this the event has + * already occurred, then the semaphore will already have been + * incremented and there will be no wait. + */ + + ret = mpfs_takesem(priv); + if (ret < 0) + { + /* Task canceled. Cancel the wdog (assuming it was started) and + * return an SDIO error. + */ + + wd_cancel(&priv->waitwdog); + wkupevent = SDIOWAIT_ERROR; + goto errout_with_waitints; + } + + wkupevent = priv->wkupevent; + + /* Check if the event has occurred. When the event has occurred, then + * evenset will be set to 0 and wkupevent will be set to a nonzero + * value. + */ + + if (wkupevent != 0) + { + /* Yes... break out of the loop with wkupevent non-zero */ + + break; + } + } + + /* Disable event-related interrupts */ + +errout_with_waitints: + + mpfs_configwaitints(priv, 0, 0, 0); + + leave_critical_section(flags); + return wkupevent; +} + +/**************************************************************************** + * Name: mpfs_callbackenable + * + * Description: + * Enable/disable of a set of SDIO callback events. This is part of the + * the SDIO callback sequence. The set of events is configured to enabled + * callbacks to the function provided in mpfs_registercallback. + * + * Events are automatically disabled once the callback is performed and no + * further callback events will occur until they are again enabled by + * calling this method. + * + * Input Parameters: + * dev - An instance of the SDIO device interface + * eventset - A bitset of events to enable or disable (see SDIOMEDIA_* + * definitions). 0=disable; 1=enable. + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void mpfs_callbackenable(struct sdio_dev_s *dev, + sdio_eventset_t eventset) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + + mcinfo("eventset: %02" PRIx8 "\n", eventset); + DEBUGASSERT(priv != NULL); + + priv->cbevents = eventset; + mpfs_callback(priv); +} + +/**************************************************************************** + * Name: mpfs_registercallback + * + * Description: + * Register a callback that that will be invoked on any media status + * change. Callbacks should not be made from interrupt handlers, rather + * interrupt level events should be handled by calling back on the work + * thread. + * + * When this method is called, all callbacks should be disabled until they + * are enabled via a call to EMMCSD_CALLBACKENABLE + * + * Input Parameters: + * dev - Device-specific state data + * callback - The function to call on the media change + * arg - A caller provided value to return with the callback + * + * Returned Value: + * 0 on success; negated errno on failure. + * + ****************************************************************************/ + +static int mpfs_registercallback(struct sdio_dev_s *dev, + worker_t callback, void *arg) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + + /* Disable callbacks and register this callback and is argument */ + + mcinfo("Register %p(%p)\n", callback, arg); + DEBUGASSERT(priv != NULL); + + priv->cbevents = 0; + priv->cbarg = arg; + priv->callback = callback; + return OK; +} + +/**************************************************************************** + * Name: mpfs_callback + * + * Description: + * Perform callback. + * + * Assumptions: + * This function does not execute in the context of an interrupt handler. + * It may be invoked on any user thread or scheduled on the work thread + * from an interrupt handler. + * + ****************************************************************************/ + +static void mpfs_callback(void *arg) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)arg; + + /* Is a callback registered? */ + + DEBUGASSERT(priv != NULL); + + mcinfo("Callback %p(%p) cbevents: %02" PRIx8 " cdstatus: %02" PRIx8 "\n", + priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus); + + if (priv->callback) + { + /* Yes.. Check for enabled callback events */ + + if ((priv->cdstatus & SDIO_STATUS_PRESENT) != 0) + { + /* Media is present. Is the media inserted event enabled? */ + + if ((priv->cbevents & SDIOMEDIA_INSERTED) == 0) + { + /* No... return without performing the callback */ + + return; + } + } + else + { + /* Media is not present. Is the media eject event enabled? */ + + if ((priv->cbevents & SDIOMEDIA_EJECTED) == 0) + { + /* No... return without performing the callback */ + + return; + } + } + + /* Perform the callback, disabling further callbacks. Of course, the + * the callback can (and probably should) re-enable callbacks. + */ + + priv->cbevents = 0; + + /* Callbacks cannot be performed in the context of an interrupt + * handler. If we are in an interrupt handler, then queue the + * callback to be performed later on the work thread. + */ + + if (up_interrupt_context()) + { + /* Yes.. queue it */ + + mcinfo("Queuing callback to %p(%p)\n", + priv->callback, priv->cbarg); + + work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, + priv->cbarg, 0); + } + else + { + /* No.. then just call the callback here */ + + mcinfo("Callback to %p(%p)\n", priv->callback, priv->cbarg); + priv->callback(priv->cbarg); + } + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sdio_initialize + * + * Description: + * Initialize SDIO for operation. + * + * Input Parameters: + * slotno - Not used. + * + * Returned Values: + * A reference to an SDIO interface structure. NULL is returned on + * failures. + * + ****************************************************************************/ + +struct sdio_dev_s *sdio_initialize(int slotno) +{ + struct mpfs_dev_s *priv = NULL; + priv = &g_emmcsd_dev; + + /* Initialize semaphores */ + + nxsem_init(&priv->waitsem, 0, 0); + + /* The waitsem semaphore is used for signaling and, hence, should not have + * priority inheritance enabled. + */ + + nxsem_set_protocol(&priv->waitsem, SEM_PRIO_NONE); + + /* Reset the card and assure that it is in the initial, unconfigured + * state. + */ + + if (!mpfs_device_reset(&priv->dev)) + { + return NULL; + } + + return &priv->dev; +} + +/**************************************************************************** + * Name: sdio_mediachange + * + * Description: + * Called by board-specific logic -- possible from an interrupt handler -- + * in order to signal to the driver that a card has been inserted or + * removed from the slot + * + * Input Parameters: + * dev - An instance of the SDIO driver device state structure. + * cardinslot - true is a card has been detected in the slot; false if a + * card has been removed from the slot. Only transitions + * (inserted->removed or removed->inserted should be reported) + * + * Returned Value: + * None + * + ****************************************************************************/ + +void sdio_mediachange(struct sdio_dev_s *dev, bool cardinslot) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + sdio_statset_t cdstatus; + irqstate_t flags; + + /* Update card status */ + + flags = enter_critical_section(); + cdstatus = priv->cdstatus; + if (cardinslot) + { + priv->cdstatus |= SDIO_STATUS_PRESENT; + } + else + { + priv->cdstatus &= ~SDIO_STATUS_PRESENT; + } + + leave_critical_section(flags); + + mcinfo("cdstatus OLD: %02" PRIx8 " NEW: %02" PRIx8 "\n", + cdstatus, priv->cdstatus); + + /* Perform any requested callback if the status has changed */ + + if (cdstatus != priv->cdstatus) + { + mpfs_callback(priv); + } +} + +/**************************************************************************** + * Name: sdio_wrprotect + * + * Description: + * Called by board-specific logic to report if the card in the slot is + * mechanically write protected. + * + * Input Parameters: + * dev - An instance of the SDIO driver device state structure. + * wrprotect - true is a card is writeprotected. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void sdio_wrprotect(struct sdio_dev_s *dev, bool wrprotect) +{ + struct mpfs_dev_s *priv = (struct mpfs_dev_s *)dev; + irqstate_t flags; + + /* Update card status */ + + flags = enter_critical_section(); + if (wrprotect) + { + priv->cdstatus |= SDIO_STATUS_WRPROTECTED; + } + else + { + priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED; + } + + mcinfo("cdstatus: %02" PRIx8 "\n", priv->cdstatus); + + leave_critical_section(flags); +} diff --git a/arch/risc-v/src/mpfs/mpfs_emmcsd.h b/arch/risc-v/src/mpfs/mpfs_emmcsd.h new file mode 100755 index 00000000000..3f1e0f56245 --- /dev/null +++ b/arch/risc-v/src/mpfs/mpfs_emmcsd.h @@ -0,0 +1,113 @@ +/**************************************************************************** + * arch/risc-v/src/mpfs/mpfs_emmcsd.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_RISCV_SRC_MPFS_MPFS_EMMCSD_H +#define __ARCH_RISCV_SRC_MPFS_MPFS_EMMCSD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include "chip.h" +#include "hardware/mpfs_emmcsd.h" + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: sdio_initialize + * + * Description: + * Initialize SDIO for operation. + * + * Input Parameters: + * slotno - Not used. + * + * Returned Values: + * A reference to an SDIO interface structure. NULL is returned on + * failures. + * + ****************************************************************************/ + +struct sdio_dev_s; /* See include/nuttx/sdio.h */ +struct sdio_dev_s *sdio_initialize(int slotno); + +/**************************************************************************** + * Name: sdio_mediachange + * + * Description: + * Called by board-specific logic -- possibly from an interrupt handler -- + * in order to signal to the driver that a card has been inserted or + * removed from the slot. + * + * Input Parameters: + * dev - An instance of the SDIO driver device state structure. + * cardinslot - true is a card has been detected in the slot; false if a + * card has been removed from the slot. Only transitions + * (inserted->removed or removed->inserted should be reported) + * + * Returned Values: + * None + * + ****************************************************************************/ + +void sdio_mediachange(struct sdio_dev_s *dev, bool cardinslot); + +/**************************************************************************** + * Name: sdio_wrprotect + * + * Description: + * Called by board-specific logic to report if the card in the slot is + * mechanically write protected. + * + * Input Parameters: + * dev - An instance of the SDIO driver device state structure. + * wrprotect - true is a card is writeprotected. + * + * Returned Values: + * None + * + ****************************************************************************/ + +void sdio_wrprotect(struct sdio_dev_s *dev, bool wrprotect); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_RISCV_SRC_MPFS_MPFS_EMMCSD_H */ diff --git a/arch/risc-v/src/mpfs/mpfs_i2c.c b/arch/risc-v/src/mpfs/mpfs_i2c.c index 55e49e6748c..83eea82fae8 100755 --- a/arch/risc-v/src/mpfs/mpfs_i2c.c +++ b/arch/risc-v/src/mpfs/mpfs_i2c.c @@ -235,25 +235,21 @@ static void mpfs_i2c_init(struct mpfs_i2c_priv_s *priv) if (priv->id == 0) { - modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, 0, - (1 << SYSREG_SOFT_RESET_CR_I2C0)); + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, 0, SYSREG_SOFT_RESET_CR_I2C0); - modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, - (1 << SYSREG_SOFT_RESET_CR_I2C0), 0); + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, SYSREG_SOFT_RESET_CR_I2C0, 0); modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, 0, - (1 << SYSREG_SUBBLK_CLOCK_CR_I2C0)); + SYSREG_SUBBLK_CLOCK_CR_I2C0); } else { - modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, 0, - (1 << SYSREG_SOFT_RESET_CR_I2C1)); + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, 0, SYSREG_SOFT_RESET_CR_I2C1); - modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, - (1 << SYSREG_SOFT_RESET_CR_I2C1), 0); + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, SYSREG_SOFT_RESET_CR_I2C1, 0); modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, 0, - (1 << SYSREG_SUBBLK_CLOCK_CR_I2C1)); + SYSREG_SUBBLK_CLOCK_CR_I2C1); } clock_speed = priv->bus_divider; @@ -768,11 +764,11 @@ struct i2c_master_s *mpfs_i2cbus_initialize(int port) priv = &g_mpfs_i2c0_lo_priv; break; #endif /* CONFIG_MPFS_I2C0 */ -#ifdef CONFIG_MPFS_I2C0 +#ifdef CONFIG_MPFS_I2C1 case 1: priv = &g_mpfs_i2c1_lo_priv; break; -#endif /* CONFIG_MPFS_I2C0 */ +#endif /* CONFIG_MPFS_I2C1 */ default: return NULL; } diff --git a/arch/risc-v/src/mpfs/mpfs_irq.c b/arch/risc-v/src/mpfs/mpfs_irq.c index cde61155b06..34e8e53b132 100755 --- a/arch/risc-v/src/mpfs/mpfs_irq.c +++ b/arch/risc-v/src/mpfs/mpfs_irq.c @@ -69,12 +69,16 @@ void up_irqinitialize(void) uint64_t hart_id = READ_CSR(mhartid); - /* hart0 is E51 we can't run on that (need different irq handling) */ - - DEBUGASSERT(hart_id != 0); - - uint32_t *miebase = (uint32_t *)(MPFS_PLIC_H1_MIE0 + - (hart_id - 1) * MPFS_HART_MIE_OFFSET); + uint32_t *miebase; + if (hart_id == 0) + { + miebase = (uint32_t *)MPFS_PLIC_H0_MIE0; + } + else + { + miebase = (uint32_t *)(MPFS_PLIC_H1_MIE0 + + (hart_id - 1) * MPFS_HART_MIE_OFFSET); + } putreg32(0x0, miebase + 0); putreg32(0x0, miebase + 1); @@ -85,8 +89,17 @@ void up_irqinitialize(void) /* Clear pendings in PLIC (for current hart) */ - uintptr_t claim_address = MPFS_PLIC_H1_MCLAIM + - ((hart_id - 1) * MPFS_PLIC_NEXTHART_OFFSET); + uintptr_t claim_address; + if (hart_id == 0) + { + claim_address = MPFS_PLIC_H0_MCLAIM; + } + else + { + claim_address = MPFS_PLIC_H1_MCLAIM + + ((hart_id - 1) * MPFS_PLIC_NEXTHART_OFFSET); + } + uint32_t val = getreg32(claim_address); putreg32(val, claim_address); @@ -94,7 +107,7 @@ void up_irqinitialize(void) #if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 15 size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~15); - riscv_stack_color((FAR void *)&g_intstackalloc, intstack_size); + riscv_stack_color((void *)&g_intstackalloc, intstack_size); #endif /* Set priority for all global interrupts to 1 (lowest) */ @@ -108,8 +121,18 @@ void up_irqinitialize(void) /* Set irq threshold to 0 (permits all global interrupts) */ - uint32_t *threshold_address = (uint32_t *)(MPFS_PLIC_H1_MTHRESHOLD + - ((hart_id - 1) * MPFS_PLIC_NEXTHART_OFFSET)); + uint32_t *threshold_address; + if (hart_id == 0) + { + threshold_address = (uint32_t *)MPFS_PLIC_H0_MTHRESHOLD; + } + else + { + threshold_address = (uint32_t *)(MPFS_PLIC_H1_MTHRESHOLD + + ((hart_id - 1) * + MPFS_PLIC_NEXTHART_OFFSET)); + } + putreg32(0, threshold_address); /* currents_regs is non-NULL only while processing an interrupt */ @@ -164,8 +187,17 @@ void up_disable_irq(int irq) /* Clear enable bit for the irq */ uint64_t hart_id = READ_CSR(mhartid); - uintptr_t miebase = MPFS_PLIC_H1_MIE0 + - ((hart_id - 1) * MPFS_HART_MIE_OFFSET); + uintptr_t miebase; + + if (hart_id == 0) + { + miebase = MPFS_PLIC_H0_MIE0; + } + else + { + miebase = MPFS_PLIC_H1_MIE0 + + ((hart_id - 1) * MPFS_HART_MIE_OFFSET); + } if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_EXT_START) { @@ -210,8 +242,17 @@ void up_enable_irq(int irq) /* Set enable bit for the irq */ uint64_t hart_id = READ_CSR(mhartid); - uintptr_t miebase = MPFS_PLIC_H1_MIE0 + - ((hart_id - 1) * MPFS_HART_MIE_OFFSET); + uintptr_t miebase; + + if (hart_id == 0) + { + miebase = MPFS_PLIC_H0_MIE0; + } + else + { + miebase = MPFS_PLIC_H1_MIE0 + + ((hart_id - 1) * MPFS_HART_MIE_OFFSET); + } if (0 <= extirq && extirq <= NR_IRQS - MPFS_IRQ_EXT_START) { diff --git a/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c b/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c index 2632aa6589c..67bc4d82bf8 100755 --- a/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c +++ b/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c @@ -79,8 +79,17 @@ void *mpfs_dispatch_irq(uint64_t vector, uint64_t *regs) /* Firstly, check if the irq is machine external interrupt */ uint64_t hart_id = READ_CSR(mhartid); - uintptr_t claim_address = MPFS_PLIC_H1_MCLAIM + - ((hart_id - 1) * MPFS_PLIC_NEXTHART_OFFSET); + uintptr_t claim_address; + + if (hart_id == 0) + { + claim_address = MPFS_PLIC_H0_MCLAIM; + } + else + { + claim_address = MPFS_PLIC_H1_MCLAIM + + ((hart_id - 1) * MPFS_PLIC_NEXTHART_OFFSET); + } if (irq == MPFS_IRQ_MEXT) { diff --git a/arch/risc-v/src/mpfs/mpfs_lowputc.c b/arch/risc-v/src/mpfs/mpfs_lowputc.c index a294e720298..fc27d074f8a 100755 --- a/arch/risc-v/src/mpfs/mpfs_lowputc.c +++ b/arch/risc-v/src/mpfs/mpfs_lowputc.c @@ -48,6 +48,8 @@ # define MPFS_CONSOLE_BITS CONFIG_UART0_BITS # define MPFS_CONSOLE_PARITY CONFIG_UART0_PARITY # define MPFS_CONSOLE_2STOP CONFIG_UART0_2STOP +# define MPFS_CONSOLE_CLOCKBIT SYSREG_SUBBLK_CLOCK_CR_MMUART0 +# define MPFS_CONSOLE_RESETBIT SYSREG_SOFT_RESET_CR_MMUART0 # define HAVE_UART #elif defined(CONFIG_UART1_SERIAL_CONSOLE) # define MPFS_CONSOLE_BASE MPFS_UART1_BASE @@ -55,6 +57,8 @@ # define MPFS_CONSOLE_BITS CONFIG_UART1_BITS # define MPFS_CONSOLE_PARITY CONFIG_UART1_PARITY # define MPFS_CONSOLE_2STOP CONFIG_UART1_2STOP +# define MPFS_CONSOLE_CLOCKBIT SYSREG_SUBBLK_CLOCK_CR_MMUART1 +# define MPFS_CONSOLE_RESETBIT SYSREG_SOFT_RESET_CR_MMUART1 # define HAVE_UART #elif defined(CONFIG_UART2_SERIAL_CONSOLE) # define MPFS_CONSOLE_BASE MPFS_UART2_BASE @@ -62,6 +66,8 @@ # define MPFS_CONSOLE_BITS CONFIG_UART2_BITS # define MPFS_CONSOLE_PARITY CONFIG_UART2_PARITY # define MPFS_CONSOLE_2STOP CONFIG_UART2_2STOP +# define MPFS_CONSOLE_CLOCKBIT SYSREG_SUBBLK_CLOCK_CR_MMUART2 +# define MPFS_CONSOLE_RESETBIT SYSREG_SOFT_RESET_CR_MMUART2 # define HAVE_UART # elif defined(CONFIG_UART3_SERIAL_CONSOLE) # define MPFS_CONSOLE_BASE MPFS_UART3_BASE @@ -69,6 +75,8 @@ # define MPFS_CONSOLE_BITS CONFIG_UART3_BITS # define MPFS_CONSOLE_PARITY CONFIG_UART3_PARITY # define MPFS_CONSOLE_2STOP CONFIG_UART3_2STOP +# define MPFS_CONSOLE_CLOCKBIT SYSREG_SUBBLK_CLOCK_CR_MMUART3 +# define MPFS_CONSOLE_RESETBIT SYSREG_SOFT_RESET_CR_MMUART3 # define HAVE_UART # elif defined(CONFIG_UART4_SERIAL_CONSOLE) # define MPFS_CONSOLE_BASE MPFS_UART4_BASE @@ -76,6 +84,8 @@ # define MPFS_CONSOLE_BITS CONFIG_UART4BITS # define MPFS_CONSOLE_PARITY CONFIG_UART4_PARITY # define MPFS_CONSOLE_2STOP CONFIG_UART4_2STOP +# define MPFS_CONSOLE_CLOCKBIT SYSREG_SUBBLK_CLOCK_CR_MMUART4 +# define MPFS_CONSOLE_RESETBIT SYSREG_SOFT_RESET_CR_MMUART4 # define HAVE_UART # elif defined(HAVE_UART) # error "No CONFIG_UARTn_SERIAL_CONSOLE Setting" @@ -178,14 +188,24 @@ void mpfs_lowsetup(void) /* Enable and configure the selected console device */ - /* REVISIT: bringup UART from reset and set clocking. - * Currently done by HSS bootloader - */ - #if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) uint32_t lcr = 0; - lcr = 0; + /* reset on */ + + modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SOFT_RESET_CR_OFFSET, + 0, MPFS_CONSOLE_RESETBIT); + + /* reset off */ + + modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SUBBLK_CLOCK_CR_OFFSET, + 0, MPFS_CONSOLE_CLOCKBIT); + + /* clock on */ + + modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SOFT_RESET_CR_OFFSET, + MPFS_CONSOLE_RESETBIT, 0); + switch (MPFS_CONSOLE_BITS) { case 5: diff --git a/arch/risc-v/src/mpfs/mpfs_serial.c b/arch/risc-v/src/mpfs/mpfs_serial.c index 4bee2bc2616..1f337719825 100755 --- a/arch/risc-v/src/mpfs/mpfs_serial.c +++ b/arch/risc-v/src/mpfs/mpfs_serial.c @@ -35,17 +35,21 @@ #include #include +#include #include -#include +#ifdef CONFIG_SERIAL_TERMIOS +# include +#endif -#include "riscv_arch.h" -#include "riscv_internal.h" +#include #include "chip.h" #include "mpfs.h" #include "mpfs_config.h" #include "mpfs_clockconfig.h" +#include "riscv_arch.h" +#include "riscv_internal.h" /**************************************************************************** * Pre-processor Definitions @@ -341,7 +345,7 @@ static uart_dev_t g_uart4port = }, .xmit = { - .size = CONFIG_UART3_TXBUFSIZE, + .size = CONFIG_UART4_TXBUFSIZE, .buffer = g_uart4txbuffer, }, .ops = &g_uart_ops, @@ -417,6 +421,64 @@ static inline void up_enablebreaks(struct up_dev_s *priv, bool enable) up_serialout(priv, MPFS_UART_LCR_OFFSET, lcr); } +static void up_enable_uart(struct up_dev_s *priv, bool enable) +{ + uint32_t clock_bit = 0; + uint32_t reset_bit = 0; + + switch (priv->uartbase) + { + case MPFS_UART0_BASE: + clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART0; + reset_bit = SYSREG_SOFT_RESET_CR_MMUART0; + break; + case MPFS_UART1_BASE: + clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART1; + reset_bit = SYSREG_SOFT_RESET_CR_MMUART1; + break; + case MPFS_UART2_BASE: + clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART2; + reset_bit = SYSREG_SOFT_RESET_CR_MMUART2; + break; + case MPFS_UART3_BASE: + clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART3; + reset_bit = SYSREG_SOFT_RESET_CR_MMUART3; + break; + case MPFS_UART4_BASE: + clock_bit = SYSREG_SUBBLK_CLOCK_CR_MMUART4; + reset_bit = SYSREG_SOFT_RESET_CR_MMUART4; + break; + + default: + return; + } + + /* reset on */ + + modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SOFT_RESET_CR_OFFSET, + 0, reset_bit); + + if (enable) + { + /* reset off */ + + modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SUBBLK_CLOCK_CR_OFFSET, + 0, reset_bit); + + /* clock on */ + + modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SOFT_RESET_CR_OFFSET, + clock_bit, 0); + } + else + { + /* clock off */ + + modifyreg32(MPFS_SYSREG_BASE + MPFS_SYSREG_SUBBLK_CLOCK_CR_OFFSET, + clock_bit, 0); + } +} + /**************************************************************************** * Name: up_config_baud_divisors * @@ -465,46 +527,21 @@ static void up_config_baud_divisors(struct up_dev_s *priv, uint32_t baudrate) } /**************************************************************************** - * Name: up_setup + * Name: up_set_format * * Description: - * Configure the UART baud, bits, parity, etc. This method is called the - * first time that the serial port is opened. + * Set the serial line format and speed. * ****************************************************************************/ -static int up_setup(struct uart_dev_s *dev) -{ #ifndef CONFIG_SUPPRESS_UART_CONFIG +static void up_set_format(struct uart_dev_s *dev) +{ struct up_dev_s *priv = (struct up_dev_s *)dev->priv; - uint32_t lcr; - - /* Clear fifos */ - - up_serialout(priv, MPFS_UART_FCR_OFFSET, - (UART_FCR_RFIFOR | UART_FCR_XFIFOR)); - - /* set filter to minimum value */ - - up_serialout(priv, MPFS_UART_GFR_OFFSET, 0); - - /* set default TX time guard */ - - up_serialout(priv, MPFS_UART_TTG_OFFSET, 0); - - /* Set trigger */ - - up_serialout(priv, MPFS_UART_FCR_OFFSET, - (UART_FCR_FIFOE | UART_FCR_RT_HALF)); - - /* Set up the IER */ - - priv->ier = up_serialin(priv, MPFS_UART_IER_OFFSET); + uint32_t lcr = 0; /* Set up the LCR */ - lcr = 0; - switch (priv->bits) { case 5: @@ -550,6 +587,49 @@ static int up_setup(struct uart_dev_s *dev) /* Clear DLAB */ up_serialout(priv, MPFS_UART_LCR_OFFSET, lcr); +} +#endif + +/**************************************************************************** + * Name: up_setup + * + * Description: + * Configure the UART baud, bits, parity, etc. This method is called the + * first time that the serial port is opened. + * + ****************************************************************************/ + +static int up_setup(struct uart_dev_s *dev) +{ +#ifndef CONFIG_SUPPRESS_UART_CONFIG + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; + + /* enable clock */ + + up_enable_uart(priv, true); + + /* Disable interrupts */ + + priv->ier = 0; + up_serialout(priv, MPFS_UART_IER_OFFSET, 0); + up_serialout(priv, MPFS_UART_IEM_OFFSET, 0); + + /* Clear fifos */ + + up_serialout(priv, MPFS_UART_FCR_OFFSET, + (UART_FCR_RFIFOR | UART_FCR_XFIFOR)); + + /* set filter to minimum value */ + + up_serialout(priv, MPFS_UART_GFR_OFFSET, 0); + + /* set default TX time guard */ + + up_serialout(priv, MPFS_UART_TTG_OFFSET, 0); + + /* Configure the UART line format and speed. */ + + up_set_format(dev); /* Configure the FIFOs */ @@ -582,6 +662,8 @@ static void up_shutdown(struct uart_dev_s *dev) /* Disable interrupts */ up_disableuartint(priv, NULL); + + up_enable_uart(priv, false); } /**************************************************************************** @@ -749,7 +831,108 @@ static int uart_interrupt(int irq, void *context, void *arg) static int up_ioctl(struct file *filep, int cmd, unsigned long arg) { - return -ENOTTY; +#if defined(CONFIG_SERIAL_TERMIOS) || defined(CONFIG_SERIAL_TIOCSERGSTRUCT) + struct inode *inode = filep->f_inode; + struct uart_dev_s *dev = inode->i_private; + + struct up_dev_s *priv = (struct up_dev_s *)dev->priv; +#endif + + int ret = OK; + + switch (cmd) + { +#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT + case TIOCSERGSTRUCT: + { + struct up_dev_s *user = (struct up_dev_s *)arg; + if (!user) + { + ret = -EINVAL; + } + else + { + memcpy(user, dev, sizeof(struct up_dev_s)); + } + } + break; +#endif + +#ifdef CONFIG_SERIAL_TERMIOS + case TCGETS: + { + struct termios *termiosp = (struct termios *)arg; + + if (!termiosp) + { + ret = -EINVAL; + break; + } + +#ifdef CONFIG_SERIAL_OFLOWCONTROL +#endif +#ifdef CONFIG_SERIAL_IFLOWCONTROL +#endif + termiosp->c_cflag = + ((priv->parity != 0) ? PARENB : 0) | + ((priv->parity == 1) ? PARODD : 0) | + ((priv->stopbits2) ? CSTOPB : 0) | + ((priv->bits == 5) ? CS5 : 0) | + ((priv->bits == 6) ? CS6 : 0) | + ((priv->bits == 7) ? CS7 : 0) | + ((priv->bits == 8) ? CS8 : 0); + + cfsetispeed(termiosp, priv->baud); + } + break; + + case TCSETS: + { + struct termios *termiosp = (struct termios *)arg; + + if (!termiosp) + { + ret = -EINVAL; + break; + } + + if (termiosp->c_cflag & PARENB) + { + priv->parity = (termiosp->c_cflag & PARODD) ? 1 : 2; + } + else + { + priv->parity = 0; + } + + priv->stopbits2 = (termiosp->c_cflag & CSTOPB) != 0; + + priv->bits = (termiosp->c_cflag & CS5) ? 5 : 0; + priv->bits = (termiosp->c_cflag & CS6) ? 6 : 0; + priv->bits = (termiosp->c_cflag & CS7) ? 7 : 0; + priv->bits = (termiosp->c_cflag & CS8) ? 8 : 0; + + /* Note that only cfgetispeed is used because we have knowledge + * that only one speed is supported. + */ + + priv->baud = cfgetispeed(termiosp); + + /* Effect the changes immediately - note that we do not implement + * TCSADRAIN / TCSAFLUSH + */ + + up_set_format(dev); + } + break; +#endif /* CONFIG_SERIAL_TERMIOS */ + + default: + ret = -ENOTTY; + break; + } + + return ret; } /**************************************************************************** @@ -869,7 +1052,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable) * Name: up_txready * * Description: - * Return true if the tranmsit data register is not full + * Return true if the transmit data register is not full * ****************************************************************************/ @@ -883,7 +1066,7 @@ static bool up_txready(struct uart_dev_s *dev) * Name: up_txempty * * Description: - * Return true if the tranmsit data register is empty + * Return true if the transmit data register is empty * ****************************************************************************/ @@ -905,9 +1088,8 @@ static bool up_txempty(struct uart_dev_s *dev) * Description: * Performs the low level UART initialization early in debug so that the * serial console will be available during bootup. This must be called - * before riscv_serialinit. NOTE: This function depends on GPIO pin - * configuration performed in up_consoleinit() and main clock iniialization - * performed in up_clkinitialize(). + * before riscv_serialinit. NOTE: This function depends on + * main clock initialization performed in up_clkinitialize(). * ****************************************************************************/ diff --git a/arch/risc-v/src/mpfs/mpfs_spi.c b/arch/risc-v/src/mpfs/mpfs_spi.c index ffcb476f416..6b5801645da 100644 --- a/arch/risc-v/src/mpfs/mpfs_spi.c +++ b/arch/risc-v/src/mpfs/mpfs_spi.c @@ -1332,25 +1332,21 @@ static void mpfs_spi_init(struct spi_dev_s *dev) if (priv->id == 0) { - modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, 0, - (1 << SYSREG_SOFT_RESET_CR_SPI0)); + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, 0, SYSREG_SOFT_RESET_CR_SPI0); - modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, - (1 << SYSREG_SOFT_RESET_CR_SPI0), 0); + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, SYSREG_SOFT_RESET_CR_SPI0, 0); modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, 0, - (1 << SYSREG_SUBBLK_CLOCK_CR_SPI0)); + SYSREG_SUBBLK_CLOCK_CR_SPI0); } else { - modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, 0, - (1 << SYSREG_SOFT_RESET_CR_SPI1)); + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, 0, SYSREG_SOFT_RESET_CR_SPI1); - modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, - (1 << SYSREG_SOFT_RESET_CR_SPI1), 0); + modifyreg32(MPFS_SYSREG_SOFT_RESET_CR, SYSREG_SOFT_RESET_CR_SPI1, 0); modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, 0, - (1 << SYSREG_SUBBLK_CLOCK_CR_SPI1)); + SYSREG_SUBBLK_CLOCK_CR_SPI1); } /* Reset the device */ @@ -1399,14 +1395,12 @@ static void mpfs_spi_deinit(struct spi_dev_s *dev) if (priv->id == 0) { modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, - (1 << SYSREG_SUBBLK_CLOCK_CR_SPI0), - 0); + SYSREG_SUBBLK_CLOCK_CR_SPI0, 0); } else { modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, - (1 << SYSREG_SUBBLK_CLOCK_CR_SPI1), - 0); + SYSREG_SUBBLK_CLOCK_CR_SPI1, 0); } priv->frequency = 0; diff --git a/arch/risc-v/src/mpfs/mpfs_spi.h b/arch/risc-v/src/mpfs/mpfs_spi.h index 46ad70d7c8d..f426ad2dab2 100644 --- a/arch/risc-v/src/mpfs/mpfs_spi.h +++ b/arch/risc-v/src/mpfs/mpfs_spi.h @@ -73,7 +73,7 @@ struct spi_dev_s *mpfs_spibus_initialize(int port); * ****************************************************************************/ -int mpfs_spibus_uninitialize(FAR struct spi_dev_s *dev); +int mpfs_spibus_uninitialize(struct spi_dev_s *dev); #ifdef __cplusplus } diff --git a/arch/risc-v/src/mpfs/mpfs_timerisr.c b/arch/risc-v/src/mpfs/mpfs_timerisr.c index 444a4c1ad68..20a80f5b169 100755 --- a/arch/risc-v/src/mpfs/mpfs_timerisr.c +++ b/arch/risc-v/src/mpfs/mpfs_timerisr.c @@ -87,7 +87,7 @@ static void mpfs_reload_mtimecmp(void) * Name: mpfs_timerisr ****************************************************************************/ -static int mpfs_timerisr(int irq, void *context, FAR void *arg) +static int mpfs_timerisr(int irq, void *context, void *arg) { mpfs_reload_mtimecmp(); diff --git a/arch/risc-v/src/rv32im/riscv_assert.c b/arch/risc-v/src/rv32im/riscv_assert.c index b551655fd95..686f3070067 100644 --- a/arch/risc-v/src/rv32im/riscv_assert.c +++ b/arch/risc-v/src/rv32im/riscv_assert.c @@ -89,7 +89,7 @@ static void riscv_stackdump(uint32_t sp, uint32_t stack_top) ****************************************************************************/ #ifdef CONFIG_ARCH_STACKDUMP -static inline void riscv_registerdump(FAR volatile uint32_t *regs) +static inline void riscv_registerdump(volatile uint32_t *regs) { /* Are user registers available from interrupt processing? */ @@ -125,7 +125,7 @@ static inline void riscv_registerdump(FAR volatile uint32_t *regs) ****************************************************************************/ #if defined(CONFIG_STACK_COLORATION) || defined(CONFIG_SCHED_BACKTRACE) -static void riscv_taskdump(FAR struct tcb_s *tcb, FAR void *arg) +static void riscv_taskdump(struct tcb_s *tcb, void *arg) { /* Dump interesting properties of this task */ @@ -310,7 +310,7 @@ static void riscv_assert(void) ****************************************************************************/ #ifdef CONFIG_ARCH_USBDUMP -static int usbtrace_syslog(FAR const char *fmt, ...) +static int usbtrace_syslog(const char *fmt, ...) { va_list ap; @@ -322,7 +322,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...) return OK; } -static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg) +static int assert_tracecallback(struct usbtrace_s *trace, void *arg) { usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value); return 0; diff --git a/arch/risc-v/src/rv32im/riscv_reprioritizertr.c b/arch/risc-v/src/rv32im/riscv_reprioritizertr.c index bfff454995a..3b2d4c8f5a5 100644 --- a/arch/risc-v/src/rv32im/riscv_reprioritizertr.c +++ b/arch/risc-v/src/rv32im/riscv_reprioritizertr.c @@ -53,8 +53,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -112,7 +111,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/risc-v/src/rv32im/riscv_swint.c b/arch/risc-v/src/rv32im/riscv_swint.c index ac360bf9401..87e83ae5ff6 100644 --- a/arch/risc-v/src/rv32im/riscv_swint.c +++ b/arch/risc-v/src/rv32im/riscv_swint.c @@ -121,7 +121,7 @@ static void dispatch_syscall(void) * ****************************************************************************/ -int riscv_swint(int irq, FAR void *context, FAR void *arg) +int riscv_swint(int irq, void *context, void *arg) { uint32_t *regs = (uint32_t *)context; @@ -266,7 +266,7 @@ int riscv_swint(int irq, FAR void *context, FAR void *arg) default: { #ifdef CONFIG_BUILD_KERNEL - FAR struct tcb_s *rtcb = nxsched_self(); + struct tcb_s *rtcb = nxsched_self(); int index = rtcb->xcp.nsyscalls; /* Verify that the SYS call number is within range */ diff --git a/arch/risc-v/src/rv32m1/rv32m1_gpio.c b/arch/risc-v/src/rv32m1/rv32m1_gpio.c index 6b71e34058f..6be8e9c020d 100644 --- a/arch/risc-v/src/rv32m1/rv32m1_gpio.c +++ b/arch/risc-v/src/rv32m1/rv32m1_gpio.c @@ -59,14 +59,14 @@ struct rv32m1_ctrlbase_s const uint32_t portgate; /* Port Clock Control Gate */ const uint32_t gpiogate; /* GPIO Clock Control Gate */ const uint32_t irq; /* IRQ Number */ - FAR sq_queue_t *isrchain; /* Interrupt Service Routine Chain */ + sq_queue_t *isrchain; /* Interrupt Service Routine Chain */ }; struct rv32m1_isr_s { sq_entry_t link; xcpt_t isr; - FAR void *arg; + void *arg; uint32_t pin; }; @@ -316,19 +316,19 @@ static void rv32m1_gpio_portconfig(uint32_t cfgset) ****************************************************************************/ LOCATE_ITCM -static int rv32m1_gpio_interrupt(int irq, FAR void *context, FAR void *arg) +static int rv32m1_gpio_interrupt(int irq, void *context, void *arg) { - const FAR struct rv32m1_ctrlbase_s *ctrl; - const FAR sq_queue_t *isrchain; - const FAR sq_entry_t *e; - const FAR struct rv32m1_isr_s *priv; + const struct rv32m1_ctrlbase_s *ctrl; + const sq_queue_t *isrchain; + const sq_entry_t *e; + const struct rv32m1_isr_s *priv; uint32_t portbase; uint32_t risf; /* the Read([red]) Interrupt status Flag */ uint32_t wisf; /* The Interrupt status Flag to write back */ - ctrl = (const FAR struct rv32m1_ctrlbase_s *)arg; + ctrl = (const struct rv32m1_ctrlbase_s *)arg; portbase = ctrl->portbase; isrchain = ctrl->isrchain; @@ -611,7 +611,7 @@ void rv32m1_gpio_irqdisable(uint32_t cfgset) * Name: rv32m1_gpio_irqattach ****************************************************************************/ -int rv32m1_gpio_irqattach(uint32_t cfgset, xcpt_t isr, FAR void *arg) +int rv32m1_gpio_irqattach(uint32_t cfgset, xcpt_t isr, void *arg) { unsigned int port; unsigned int pin; @@ -621,10 +621,10 @@ int rv32m1_gpio_irqattach(uint32_t cfgset, xcpt_t isr, FAR void *arg) irqstate_t flags; - FAR sq_queue_t *isrchain; - FAR sq_entry_t *e; + sq_queue_t *isrchain; + sq_entry_t *e; - FAR struct rv32m1_isr_s *priv; + struct rv32m1_isr_s *priv; if (!isr) { @@ -661,7 +661,7 @@ int rv32m1_gpio_irqattach(uint32_t cfgset, xcpt_t isr, FAR void *arg) e = sq_next(e); } - priv = (FAR struct rv32m1_isr_s *)kmm_malloc(sizeof(*priv)); + priv = (struct rv32m1_isr_s *)kmm_malloc(sizeof(*priv)); if (priv) { /* If it is the first time to attach an isr, the generic gpio @@ -698,7 +698,7 @@ done: * Name: rv32m1_gpio_irqdetach ****************************************************************************/ -int rv32m1_gpio_irqdetach(uint32_t cfgset, xcpt_t isr, FAR void *arg) +int rv32m1_gpio_irqdetach(uint32_t cfgset, xcpt_t isr, void *arg) { uint32_t port; uint32_t pin; @@ -707,11 +707,11 @@ int rv32m1_gpio_irqdetach(uint32_t cfgset, xcpt_t isr, FAR void *arg) irqstate_t flags; - FAR sq_queue_t *isrchain; - FAR sq_entry_t *cur; - FAR sq_entry_t *pre; + sq_queue_t *isrchain; + sq_entry_t *cur; + sq_entry_t *pre; - FAR struct rv32m1_isr_s *priv; + struct rv32m1_isr_s *priv; if (!isr) { diff --git a/arch/risc-v/src/rv32m1/rv32m1_gpio.h b/arch/risc-v/src/rv32m1/rv32m1_gpio.h index 905eceda971..51bb4873001 100644 --- a/arch/risc-v/src/rv32m1/rv32m1_gpio.h +++ b/arch/risc-v/src/rv32m1/rv32m1_gpio.h @@ -281,13 +281,13 @@ EXTERN void rv32m1_gpio_irqdisable(uint32_t cfgset); * Name: rv32m1_gpio_irqattach ****************************************************************************/ -EXTERN int rv32m1_gpio_irqattach(uint32_t cfgset, xcpt_t isr, FAR void *arg); +EXTERN int rv32m1_gpio_irqattach(uint32_t cfgset, xcpt_t isr, void *arg); /**************************************************************************** * Name: rv32m1_gpio_irqdetach ****************************************************************************/ -EXTERN int rv32m1_gpio_irqdetach(uint32_t cfgset, xcpt_t isr, FAR void *arg); +EXTERN int rv32m1_gpio_irqdetach(uint32_t cfgset, xcpt_t isr, void *arg); /**************************************************************************** * Name: rv32m1_gpio_clearpending diff --git a/arch/risc-v/src/rv32m1/rv32m1_irq.c b/arch/risc-v/src/rv32m1/rv32m1_irq.c index b09abf45847..2cc740da717 100644 --- a/arch/risc-v/src/rv32m1/rv32m1_irq.c +++ b/arch/risc-v/src/rv32m1/rv32m1_irq.c @@ -48,7 +48,7 @@ ****************************************************************************/ LOCATE_ITCM -static int rv32m1_intmuxisr(int irq, void *context, FAR void *arg) +static int rv32m1_intmuxisr(int irq, void *context, void *arg) { UNUSED(irq); UNUSED(context); @@ -97,7 +97,7 @@ void up_irqinitialize(void) #if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 15 size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~15); - riscv_stack_color((FAR void *)((uintptr_t)&g_intstacktop - intstack_size), + riscv_stack_color((void *)((uintptr_t)&g_intstacktop - intstack_size), intstack_size); #endif diff --git a/arch/risc-v/src/rv32m1/rv32m1_serial.c b/arch/risc-v/src/rv32m1/rv32m1_serial.c index 0c1740b1ae8..df50c51ba44 100644 --- a/arch/risc-v/src/rv32m1/rv32m1_serial.c +++ b/arch/risc-v/src/rv32m1/rv32m1_serial.c @@ -143,7 +143,7 @@ static int up_setup(struct uart_dev_s *dev); static void up_shutdown(struct uart_dev_s *dev); static int up_attach(struct uart_dev_s *dev); static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context, FAR void *arg); +static int up_interrupt(int irq, void *context, void *arg); static int up_ioctl(struct file *filep, int cmd, unsigned long arg); static int up_receive(struct uart_dev_s *dev, unsigned int *status); static void up_rxint(struct uart_dev_s *dev, bool enable); @@ -491,7 +491,7 @@ static void up_set_format(struct uart_dev_s *dev) /* Get the closer one. i.e. the minimum difference */ tdiff = priv->baud - baud; - tsbr ++; + tsbr++; } /* Pick up the best osr and sbr with the minimum diff */ @@ -767,7 +767,7 @@ static void up_detach(struct uart_dev_s *dev) ****************************************************************************/ LOCATE_ITCM -static int up_interrupt(int irq, void *context, FAR void *arg) +static int up_interrupt(int irq, void *context, void *arg) { struct uart_dev_s *dev = (struct uart_dev_s *)arg; struct up_dev_s *priv; diff --git a/arch/risc-v/src/rv32m1/rv32m1_timerisr.c b/arch/risc-v/src/rv32m1/rv32m1_timerisr.c index 91127d5438b..044dc8409fc 100644 --- a/arch/risc-v/src/rv32m1/rv32m1_timerisr.c +++ b/arch/risc-v/src/rv32m1/rv32m1_timerisr.c @@ -58,7 +58,7 @@ ****************************************************************************/ LOCATE_ITCM -static int rv32m1_timerisr(int irq, void *context, FAR void *arg) +static int rv32m1_timerisr(int irq, void *context, void *arg) { /* Write '1' to clear the pending flag */ diff --git a/arch/risc-v/src/rv64gc/riscv_assert.c b/arch/risc-v/src/rv64gc/riscv_assert.c index 8d7c014efa5..a9d5768620a 100644 --- a/arch/risc-v/src/rv64gc/riscv_assert.c +++ b/arch/risc-v/src/rv64gc/riscv_assert.c @@ -90,7 +90,7 @@ static void up_stackdump(uint64_t sp, uintptr_t stack_top) * Name: up_registerdump ****************************************************************************/ -static inline void up_registerdump(FAR volatile uintptr_t *regs) +static inline void up_registerdump(volatile uintptr_t *regs) { /* Are user registers available from interrupt processing? */ @@ -132,7 +132,7 @@ static inline void up_registerdump(FAR volatile uintptr_t *regs) ****************************************************************************/ #if defined(CONFIG_STACK_COLORATION) || defined(CONFIG_SCHED_BACKTRACE) -static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg) +static void up_taskdump(struct tcb_s *tcb, void *arg) { /* Dump interesting properties of this task */ @@ -319,7 +319,7 @@ static void _up_assert(void) ****************************************************************************/ #ifdef CONFIG_ARCH_USBDUMP -static int usbtrace_syslog(FAR const char *fmt, ...) +static int usbtrace_syslog(const char *fmt, ...) { va_list ap; @@ -331,7 +331,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...) return OK; } -static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg) +static int assert_tracecallback(struct usbtrace_s *trace, void *arg) { usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value); return 0; @@ -365,7 +365,7 @@ void up_assert(const char *filename, int lineno) #else #if CONFIG_TASK_NAME_SIZE > 0 _alert("Assertion failed at file:%s line: %d task: %s\n", - filename, lineno, rtcb->name); + filename, lineno, running_task()->name); #else _alert("Assertion failed at file:%s line: %d\n", filename, lineno); diff --git a/arch/risc-v/src/rv64gc/riscv_reprioritizertr.c b/arch/risc-v/src/rv64gc/riscv_reprioritizertr.c index 974bf5ced99..8cf0b825105 100644 --- a/arch/risc-v/src/rv64gc/riscv_reprioritizertr.c +++ b/arch/risc-v/src/rv64gc/riscv_reprioritizertr.c @@ -53,8 +53,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -112,7 +111,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/risc-v/src/rv64gc/riscv_schedulesigaction.c b/arch/risc-v/src/rv64gc/riscv_schedulesigaction.c index fab6e35994a..7174f6e62a2 100644 --- a/arch/risc-v/src/rv64gc/riscv_schedulesigaction.c +++ b/arch/risc-v/src/rv64gc/riscv_schedulesigaction.c @@ -267,7 +267,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * been delivered. */ - tcb->xcp.sigdeliver = (FAR void *)sigdeliver; + tcb->xcp.sigdeliver = (void *)sigdeliver; tcb->xcp.saved_epc = tcb->xcp.regs[REG_EPC]; tcb->xcp.saved_int_ctx = tcb->xcp.regs[REG_INT_CTX]; @@ -292,7 +292,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * been delivered. */ - tcb->xcp.sigdeliver = (FAR void *)sigdeliver; + tcb->xcp.sigdeliver = (void *)sigdeliver; tcb->xcp.saved_epc = CURRENT_REGS[REG_EPC]; tcb->xcp.saved_int_ctx = CURRENT_REGS[REG_INT_CTX]; @@ -352,7 +352,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * by the signal trampoline after the signal has been delivered. */ - tcb->xcp.sigdeliver = (FAR void *)sigdeliver; + tcb->xcp.sigdeliver = (void *)sigdeliver; tcb->xcp.saved_epc = tcb->xcp.regs[REG_EPC]; tcb->xcp.saved_int_ctx = tcb->xcp.regs[REG_INT_CTX]; diff --git a/arch/risc-v/src/rv64gc/riscv_signal_dispatch.c b/arch/risc-v/src/rv64gc/riscv_signal_dispatch.c index 46f6670d0b2..61e68dd31ba 100644 --- a/arch/risc-v/src/rv64gc/riscv_signal_dispatch.c +++ b/arch/risc-v/src/rv64gc/riscv_signal_dispatch.c @@ -64,7 +64,7 @@ ****************************************************************************/ void up_signal_dispatch(_sa_sigaction_t sighand, int signo, - FAR siginfo_t *info, FAR void *ucontext) + siginfo_t *info, void *ucontext) { /* Let sys_call4() do all of the work */ diff --git a/arch/risc-v/src/rv64gc/riscv_swint.c b/arch/risc-v/src/rv64gc/riscv_swint.c index 8cd2528ad7c..de0f2596bf4 100644 --- a/arch/risc-v/src/rv64gc/riscv_swint.c +++ b/arch/risc-v/src/rv64gc/riscv_swint.c @@ -133,7 +133,7 @@ static void dispatch_syscall(void) * ****************************************************************************/ -int riscv_swint(int irq, FAR void *context, FAR void *arg) +int riscv_swint(int irq, void *context, void *arg) { uint64_t *regs = (uint64_t *)context; @@ -254,7 +254,7 @@ int riscv_swint(int irq, FAR void *context, FAR void *arg) /* R0=SYS_task_start: This a user task start * * void up_task_start(main_t taskentry, int argc, - * FAR char *argv[]) noreturn_function; + * char *argv[]) noreturn_function; * * At this point, the following values are saved in context: * @@ -318,7 +318,7 @@ int riscv_swint(int irq, FAR void *context, FAR void *arg) /* R0=SYS_pthread_exit: This pthread_exit call in user-space * * void up_pthread_exit(pthread_exitroutine_t exit, - * FAR void *exit_value) + * void *exit_value) * * At this point, the following values are saved in context: * @@ -348,7 +348,7 @@ int riscv_swint(int irq, FAR void *context, FAR void *arg) /* R0=SYS_signal_handler: This a user signal handler callback * * void signal_handler(_sa_sigaction_t sighand, int signo, - * FAR siginfo_t *info, FAR void *ucontext); + * siginfo_t *info, void *ucontext); * * At this point, the following values are saved in context: * @@ -421,7 +421,7 @@ int riscv_swint(int irq, FAR void *context, FAR void *arg) default: { #ifdef CONFIG_LIB_SYSCALL - FAR struct tcb_s *rtcb = nxsched_self(); + struct tcb_s *rtcb = nxsched_self(); int index = rtcb->xcp.nsyscalls; /* Verify that the SYS call number is within range */ diff --git a/arch/risc-v/src/rv64gc/riscv_testset.S b/arch/risc-v/src/rv64gc/riscv_testset.S index def91725839..7a4ccdd041f 100644 --- a/arch/risc-v/src/rv64gc/riscv_testset.S +++ b/arch/risc-v/src/rv64gc/riscv_testset.S @@ -60,14 +60,14 @@ * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object (a0). + * lock - A reference to the spinlock object (a0). * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * * Modifies: a1, a2 * diff --git a/arch/risc-v/src/rv64gc/svcall.h b/arch/risc-v/src/rv64gc/svcall.h index 6ecb889c678..555cc3fc77e 100644 --- a/arch/risc-v/src/rv64gc/svcall.h +++ b/arch/risc-v/src/rv64gc/svcall.h @@ -94,7 +94,7 @@ #ifdef CONFIG_BUILD_PROTECTED /* SYS call 4: * - * void up_task_start(main_t taskentry, int argc, FAR char *argv[]) + * void up_task_start(main_t taskentry, int argc, char *argv[]) * noreturn_function; */ @@ -102,7 +102,7 @@ /* SYS call 6: * * void signal_handler(_sa_sigaction_t sighand, int signo, - * FAR siginfo_t *info, FAR void *ucontext); + * siginfo_t *info, void *ucontext); */ #define SYS_signal_handler (6) @@ -127,7 +127,7 @@ /* SYS call 8: * - * void up_pthread_exit(pthread_exitroutine_t exit, FAR void *exit_value) + * void up_pthread_exit(pthread_exitroutine_t exit, void *exit_value) */ #define SYS_pthread_exit (8) diff --git a/arch/sim/Kconfig b/arch/sim/Kconfig index 420f3f41708..32690cc2d0d 100644 --- a/arch/sim/Kconfig +++ b/arch/sim/Kconfig @@ -597,8 +597,8 @@ config SIM_SPI_LINUX depends on HOST_LINUX ---help--- Attach a Linux SPI port via the character device - interface. To achieve a SPI port, it is recommended - to use a USB<>SPI device such as CH341A/B. + interface. To achieve a SPI port on Linux host, it is + recommended to use a USB<>SPI device such as CH341A/B. endchoice diff --git a/arch/sim/src/Makefile b/arch/sim/src/Makefile index 2bc9bcb3e2e..9f961fd1af5 100644 --- a/arch/sim/src/Makefile +++ b/arch/sim/src/Makefile @@ -183,6 +183,12 @@ endif ifeq ($(CONFIG_SIM_SPI_LINUX),y) HOSTSRCS += up_spilinux.c + + up_spilinux.c: config.h + + config.h: $(TOPDIR)/include/nuttx/config.h + @echo "CP: $<" + $(Q) cp $< $@ endif ifeq ($(CONFIG_RPTUN),y) @@ -218,8 +224,8 @@ OBJS = $(AOBJS) $(COBJS) $(HOSTOBJS) ifneq ($(CONFIG_HOST_MACOS),y) ARCHSCRIPT += -T nuttx.ld - LDSTARTGROUP ?= -Wl,--start-group - LDENDGROUP ?= -Wl,--end-group + LDSTARTGROUP ?= --start-group + LDENDGROUP ?= --end-group endif # Determine which NuttX libraries will need to be linked in @@ -329,8 +335,6 @@ depend: .depend context:: -clean_context:: - clean: $(Q) if [ -e board/Makefile ]; then \ $(MAKE) -C board clean ; \ @@ -341,7 +345,7 @@ clean: $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean $(Q) if [ -e board/Makefile ]; then \ $(MAKE) -C board distclean ; \ fi diff --git a/arch/sim/src/nuttx-names.in b/arch/sim/src/nuttx-names.in index 2e3899336f3..2c43b3a0bf6 100644 --- a/arch/sim/src/nuttx-names.in +++ b/arch/sim/src/nuttx-names.in @@ -72,6 +72,9 @@ NXSYMBOLS(opendir) NXSYMBOLS(perror) NXSYMBOLS(poll) NXSYMBOLS(posix_memalign) +NXSYMBOLS(pthread_attr_init) +NXSYMBOLS(pthread_attr_setstack) +NXSYMBOLS(pthread_attr_destroy) NXSYMBOLS(pthread_cond_destroy) NXSYMBOLS(pthread_cond_init) NXSYMBOLS(pthread_cond_signal) diff --git a/arch/sim/src/sim/up_createstack.c b/arch/sim/src/sim/up_createstack.c index ebe36e2ad38..bc14d30531b 100644 --- a/arch/sim/src/sim/up_createstack.c +++ b/arch/sim/src/sim/up_createstack.c @@ -151,7 +151,8 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) ****************************************************************************/ #ifdef CONFIG_STACK_COLORATION -void up_stack_color(FAR void *stackbase, size_t nbytes) +void nostackprotect_function up_stack_color(FAR void *stackbase, + size_t nbytes) { /* Take extra care that we do not write outsize the stack boundaries */ diff --git a/arch/sim/src/sim/up_host_abort.c b/arch/sim/src/sim/up_host_abort.c index 6bdbe8e52eb..db288d388d1 100644 --- a/arch/sim/src/sim/up_host_abort.c +++ b/arch/sim/src/sim/up_host_abort.c @@ -26,6 +26,10 @@ #include "up_internal.h" +/**************************************************************************** + * Public Functions + ****************************************************************************/ + /**************************************************************************** * Name: host_abort * @@ -41,4 +45,5 @@ void host_abort(int status) /* exit the simulation */ exit(status); -} \ No newline at end of file +} + diff --git a/arch/sim/src/sim/up_reprioritizertr.c b/arch/sim/src/sim/up_reprioritizertr.c index 08aadfd1019..5b3a23228a9 100644 --- a/arch/sim/src/sim/up_reprioritizertr.c +++ b/arch/sim/src/sim/up_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/sim/src/sim/up_rptun.c b/arch/sim/src/sim/up_rptun.c index abb583f6277..32c58d3f388 100644 --- a/arch/sim/src/sim/up_rptun.c +++ b/arch/sim/src/sim/up_rptun.c @@ -89,7 +89,7 @@ sim_rptun_get_resource(struct rptun_dev_s *dev) return &priv->shmem->rsc; } - while(priv->shmem == NULL) + while (priv->shmem == NULL) { priv->shmem = host_alloc_shmem(priv->shmemname, sizeof(*priv->shmem), priv->master); diff --git a/arch/sim/src/sim/up_simuart.c b/arch/sim/src/sim/up_simuart.c index 5772353aa14..5e2aa56db55 100644 --- a/arch/sim/src/sim/up_simuart.c +++ b/arch/sim/src/sim/up_simuart.c @@ -156,7 +156,7 @@ int simuart_getc(int fd) * Name: simuart_getcflag ****************************************************************************/ -int simuart_getcflag(int fd, tcflag_t *cflag) +int simuart_getcflag(int fd, unsigned int *cflag) { struct termios t; int ret; @@ -178,7 +178,7 @@ int simuart_getcflag(int fd, tcflag_t *cflag) * Name: simuart_setcflag ****************************************************************************/ -int simuart_setcflag(int fd, tcflag_t cflag) +int simuart_setcflag(int fd, unsigned int cflag) { struct termios t; int ret; diff --git a/arch/sim/src/sim/up_spi.h b/arch/sim/src/sim/up_spi.h index 77947555b21..46df7f59d96 100644 --- a/arch/sim/src/sim/up_spi.h +++ b/arch/sim/src/sim/up_spi.h @@ -25,10 +25,7 @@ * Included Files ****************************************************************************/ -#ifdef __SIM__ #include "config.h" -#endif - #include /**************************************************************************** diff --git a/arch/sim/src/sim/up_testset.c b/arch/sim/src/sim/up_testset.c index 18140990d71..4716ecfdc76 100644 --- a/arch/sim/src/sim/up_testset.c +++ b/arch/sim/src/sim/up_testset.c @@ -40,14 +40,14 @@ * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ diff --git a/arch/x86/src/Makefile b/arch/x86/src/Makefile index 09957da06fb..18575df0508 100644 --- a/arch/x86/src/Makefile +++ b/arch/x86/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_I486),y) ARCH_SUBDIR = i486 @@ -153,8 +153,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -162,7 +160,7 @@ endif $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/x86/src/common/up_reprioritizertr.c b/arch/x86/src/common/up_reprioritizertr.c index 0a2c2134187..7442508078a 100644 --- a/arch/x86/src/common/up_reprioritizertr.c +++ b/arch/x86/src/common/up_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/x86/src/qemu/Make.defs b/arch/x86/src/qemu/Make.defs index 37730cd51de..f9d59c93237 100644 --- a/arch/x86/src/qemu/Make.defs +++ b/arch/x86/src/qemu/Make.defs @@ -32,7 +32,7 @@ CMN_CSRCS += up_irq.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c CMN_CSRCS += up_regdump.c up_releasepending.c up_releasestack.c CMN_CSRCS += up_reprioritizertr.c up_savestate.c up_sigdeliver.c CMN_CSRCS += up_schedulesigaction.c up_stackframe.c up_unblocktask.c -CMN_CSRCS += up_usestack.c +CMN_CSRCS += up_usestack.c up_puts.c # Required QEMU files diff --git a/arch/x86_64/include/intel64/irq.h b/arch/x86_64/include/intel64/irq.h index 903654e1ebe..745bfcafe8e 100644 --- a/arch/x86_64/include/intel64/irq.h +++ b/arch/x86_64/include/intel64/irq.h @@ -184,7 +184,7 @@ struct xcptcontext /* Register save area */ - uint64_t regs[XCPTCONTEXT_REGS] __attribute__((aligned (16))); + uint64_t regs[XCPTCONTEXT_REGS] aligned_data(16); }; #endif diff --git a/arch/x86_64/src/Makefile b/arch/x86_64/src/Makefile index d6bb2aa8208..6c0b16e0e7c 100644 --- a/arch/x86_64/src/Makefile +++ b/arch/x86_64/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_INTEL64),y) ARCH_SUBDIR = intel64 @@ -163,8 +163,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -172,7 +170,7 @@ endif $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/x86_64/src/common/up_allocateheap.c b/arch/x86_64/src/common/up_allocateheap.c index 41eaaf8dbaa..c031b2fcea2 100644 --- a/arch/x86_64/src/common/up_allocateheap.c +++ b/arch/x86_64/src/common/up_allocateheap.c @@ -50,6 +50,9 @@ * Public Functions ****************************************************************************/ +const uintptr_t g_idle_topstack = (uintptr_t)&_ebss + + CONFIG_IDLETHREAD_STACKSIZE; + /**************************************************************************** * Name: up_allocate_heap * @@ -71,7 +74,7 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size) /* Calculate the end of .bss section */ - uintptr_t hstart = (((uintptr_t)&_ebss + PAGE_SIZE - 1) & PAGE_MASK); + uintptr_t hstart = (g_idle_topstack + PAGE_SIZE - 1) & PAGE_MASK; *heap_start = (void *)hstart; /* The size is the rest of the RAM */ diff --git a/arch/x86_64/src/common/up_internal.h b/arch/x86_64/src/common/up_internal.h index bc1d9acf6d3..76f24b337c1 100644 --- a/arch/x86_64/src/common/up_internal.h +++ b/arch/x86_64/src/common/up_internal.h @@ -120,7 +120,7 @@ extern volatile uint64_t *g_current_regs; * end of the heap is CONFIG_RAM_END */ -extern uint64_t g_idle_topstack; +extern const uintptr_t g_idle_topstack; /* Address of the saved user stack pointer */ diff --git a/arch/x86_64/src/common/up_reprioritizertr.c b/arch/x86_64/src/common/up_reprioritizertr.c index 426a184ab25..c9461a187c7 100644 --- a/arch/x86_64/src/common/up_reprioritizertr.c +++ b/arch/x86_64/src/common/up_reprioritizertr.c @@ -51,8 +51,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -110,7 +109,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/x86_64/src/intel64/Make.defs b/arch/x86_64/src/intel64/Make.defs index c0c89765f4b..360fa4abba1 100644 --- a/arch/x86_64/src/intel64/Make.defs +++ b/arch/x86_64/src/intel64/Make.defs @@ -27,7 +27,7 @@ CMN_CSRCS += up_irq.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c CMN_CSRCS += up_regdump.c up_releasepending.c up_releasestack.c CMN_CSRCS += up_reprioritizertr.c up_savestate.c up_sigdeliver.c CMN_CSRCS += up_schedulesigaction.c up_stackframe.c up_unblocktask.c -CMN_CSRCS += up_usestack.c +CMN_CSRCS += up_usestack.c up_puts.c CMN_CSRCS += up_rtc.c CMN_CSRCS += up_map_region.c diff --git a/arch/x86_64/src/intel64/intel64_head.S b/arch/x86_64/src/intel64/intel64_head.S index 302643c163b..c478b212647 100644 --- a/arch/x86_64/src/intel64/intel64_head.S +++ b/arch/x86_64/src/intel64/intel64_head.S @@ -290,8 +290,7 @@ clear_bss: jne clear_bss // Properly setup RSP to idle stack - movabs $idle_stack, %rbx - add $CONFIG_IDLETHREAD_STACKSIZE, %rbx + movabs $g_idle_topstack, %rbx mov %rbx, %rsp @@ -468,35 +467,3 @@ pt_low: .fill X86_NUM_PAGE_ENTRY * X86_NUM_PAGE_ENTRY, X86_PAGE_ENTRY_SIZE, 0 .fill X86_NUM_PAGE_ENTRY * X86_NUM_PAGE_ENTRY, X86_PAGE_ENTRY_SIZE, 0 -/**************************************************************************** - * .bss - ****************************************************************************/ - -/* The stack for the IDLE task thread is declared in .bss. NuttX boots and - * initializes on the IDLE thread, then at the completion of OS startup, this - * thread becomes the thread that executes when there is nothing else to - * do in the system (see up_idle()). - */ - - .section .bss - - .type idle_stack, @object - .comm idle_stack, CONFIG_IDLETHREAD_STACKSIZE, 32 - .size idle_stack, CONFIG_IDLETHREAD_STACKSIZE - -/**************************************************************************** - * .rodata - ****************************************************************************/ - - .section .rodata, "a" - -/* HEAP BASE: _sbss is the start of the BSS region (see ld.script) _ebss is - * the end of the BSS region (see liker script). The heap continues from there - * until the end of memory. - */ - - .type g_idle_topstack, @object -g_idle_topstack: - .quad _ebss - .size g_idle_topstack, . - g_idle_topstack - .end diff --git a/arch/x86_64/src/intel64/up_irq.c b/arch/x86_64/src/intel64/up_irq.c index 433dbfcf5fa..8e238e63e9e 100644 --- a/arch/x86_64/src/intel64/up_irq.c +++ b/arch/x86_64/src/intel64/up_irq.c @@ -63,10 +63,10 @@ static inline void up_idtinit(void); volatile uint64_t *g_current_regs; -uint8_t g_interrupt_stack[IRQ_STACK_SIZE] __attribute__ ((aligned (16))); +uint8_t g_interrupt_stack[IRQ_STACK_SIZE] aligned_data(16); uint8_t *g_interrupt_stack_end = g_interrupt_stack + IRQ_STACK_SIZE - 16; -uint8_t g_isr_stack[IRQ_STACK_SIZE] __attribute__ ((aligned (16))); +uint8_t g_isr_stack[IRQ_STACK_SIZE] aligned_data(16); uint8_t *g_isr_stack_end = g_isr_stack + IRQ_STACK_SIZE - 16; /**************************************************************************** @@ -329,8 +329,8 @@ static void up_apic_init(void) * ****************************************************************************/ -static int __attribute__((unused)) - legacy_pic_irq_handler(int irq, uint32_t *regs, void *arg) +static int unused_code +legacy_pic_irq_handler(int irq, uint32_t *regs, void *arg) { return 0; } diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 379226dc996..66131518ac5 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -17,6 +17,7 @@ config ARCH_CHIP_ESP32 select ARCH_HAVE_TEXT_HEAP select ARCH_HAVE_SDRAM select ARCH_HAVE_RESET + select ARCH_HAVE_BOOTLOADER select ARCH_VECNOTIRQ select LIBC_ARCH_MEMCPY select LIBC_ARCH_MEMCHR diff --git a/arch/xtensa/include/arch.h b/arch/xtensa/include/arch.h index 7b40c4ba058..9cabb928aa7 100644 --- a/arch/xtensa/include/arch.h +++ b/arch/xtensa/include/arch.h @@ -143,7 +143,7 @@ void *xtensa_imm_zalloc(size_t size); * ****************************************************************************/ -void xtensa_imm_free(FAR void *mem); +void xtensa_imm_free(void *mem); /**************************************************************************** * Name: xtensa_imm_memalign @@ -174,7 +174,7 @@ void *xtensa_imm_memalign(size_t alignment, size_t size); * ****************************************************************************/ -bool xtensa_imm_heapmember(FAR void *mem); +bool xtensa_imm_heapmember(void *mem); /**************************************************************************** * Name: xtensa_imm_mallinfo @@ -185,7 +185,7 @@ bool xtensa_imm_heapmember(FAR void *mem); * ****************************************************************************/ -int xtensa_imm_mallinfo(FAR struct mallinfo *info); +int xtensa_imm_mallinfo(struct mallinfo *info); #endif #undef EXTERN diff --git a/arch/xtensa/include/esp32/irq.h b/arch/xtensa/include/esp32/irq.h index a610a636872..66d330f35a4 100644 --- a/arch/xtensa/include/esp32/irq.h +++ b/arch/xtensa/include/esp32/irq.h @@ -188,6 +188,7 @@ */ #define ESP32_IRQ2PERIPH(irq) ((irq)-XTENSA_IRQ_FIRSTPERIPH) +#define ESP32_PERIPH2IRQ(id) ((id)+XTENSA_IRQ_FIRSTPERIPH) /* PRO_INTR_STATUS_REG_0 / APP_INTR_STATUS_REG_0 */ @@ -278,12 +279,27 @@ #define ESP32_NIRQ_PERIPH ESP32_NPERIPHERALS +#ifdef CONFIG_ESP32_GPIO_IRQ + +/* The PRO and APP CPU have different interrupts sources for the GPIO + * peripheral. Each CPU needs to allocate a separate interrupt and attach + * it to its peripheral. + * Here we add a separate IRQ to differentiate between each interrupt. + * When enabling/disabling the IRQ we handle the APP's GPIO separately + * to correctly retrieve the peripheral. + */ + +# ifdef CONFIG_SMP +# define ESP32_IRQ_APPCPU_GPIO ESP32_NPERIPHERALS +# undef ESP32_NIRQ_PERIPH +# define ESP32_NIRQ_PERIPH ESP32_NPERIPHERALS + 1 +# endif + /* Second level GPIO interrupts. GPIO interrupts are decoded and dispatched * as a second level of decoding: The first level dispatches to the GPIO * interrupt handler. The second to the decoded GPIO interrupt handler. */ -#ifdef CONFIG_ESP32_GPIO_IRQ # define ESP32_NIRQ_GPIO 40 # define ESP32_FIRST_GPIOIRQ (XTENSA_NIRQ_INTERNAL+ESP32_NIRQ_PERIPH) # define ESP32_LAST_GPIOIRQ (ESP32_FIRST_GPIOIRQ+ESP32_NIRQ_GPIO-1) @@ -408,6 +424,24 @@ * Inline functions ****************************************************************************/ +#ifdef CONFIG_ESP32_GPIO_IRQ +#ifdef CONFIG_SMP +static inline int esp32_irq_gpio(int cpu) +{ + if (cpu == 0) + { + return ESP32_IRQ_CPU_GPIO; + } + else + { + return ESP32_IRQ_APPCPU_GPIO; + } +} +#else +# define esp32_irq_gpio(c) (UNUSED(c), ESP32_IRQ_CPU_GPIO) +#endif +#endif + /**************************************************************************** * Public Data ****************************************************************************/ diff --git a/arch/xtensa/include/irq.h b/arch/xtensa/include/irq.h index 2a2cdff965b..f6489cb15f0 100644 --- a/arch/xtensa/include/irq.h +++ b/arch/xtensa/include/irq.h @@ -258,6 +258,35 @@ static inline void up_irq_disable(void) #endif } +/**************************************************************************** + * Name: xtensa_disable_all + ****************************************************************************/ + +static inline void xtensa_disable_all(void) +{ + __asm__ __volatile__ + ( + "movi a2, 0\n" + "xsr a2, INTENABLE\n" + : : : "a2" + ); +} + +/**************************************************************************** + * Name: xtensa_intclear + ****************************************************************************/ + +static inline void xtensa_intclear(uint32_t mask) +{ + __asm__ __volatile__ + ( + "wsr %0, INTCLEAR\n" + : + : "r"(mask) + : + ); +} + /**************************************************************************** * Public Data ****************************************************************************/ diff --git a/arch/xtensa/include/tls.h b/arch/xtensa/include/tls.h index 94d41988480..dd18ee8cab9 100644 --- a/arch/xtensa/include/tls.h +++ b/arch/xtensa/include/tls.h @@ -63,7 +63,7 @@ ****************************************************************************/ #ifdef CONFIG_TLS_ALIGNED -static inline FAR struct tls_info_s *up_tls_info(void) +static inline struct tls_info_s *up_tls_info(void) { DEBUGASSERT(!up_interrupt_context()); return TLS_INFO((uintptr_t)up_getsp()); diff --git a/arch/xtensa/src/Makefile b/arch/xtensa/src/Makefile index 36b4e83c4b4..4157f0c2079 100644 --- a/arch/xtensa/src/Makefile +++ b/arch/xtensa/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs ifeq ($(CONFIG_ARCH_FAMILY_LX6),y) ARCH_SUBDIR = lx6 @@ -143,8 +143,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board clean @@ -152,7 +150,7 @@ endif $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(BOARDMAKE),y) $(Q) $(MAKE) -C board distclean endif diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h index 4e2bc49f832..cc292ee89c2 100644 --- a/arch/xtensa/src/common/xtensa.h +++ b/arch/xtensa/src/common/xtensa.h @@ -265,7 +265,6 @@ uint32_t *xtensa_user(int exccause, uint32_t *regs); /* Software interrupt handler */ #ifdef CONFIG_SMP -void __cpu1_start(void) noreturn_function; int xtensa_intercpu_interrupt(int tocpu, int intcode); void xtensa_pause_handler(void); #endif @@ -345,7 +344,7 @@ void xtensa_pminitialize(void); /* Debug ********************************************************************/ #ifdef CONFIG_STACK_COLORATION -void up_stack_color(FAR void *stackbase, size_t nbytes); +void up_stack_color(void *stackbase, size_t nbytes); #endif #endif /* __ASSEMBLY__ */ diff --git a/arch/xtensa/src/common/xtensa_assert.c b/arch/xtensa/src/common/xtensa_assert.c index d52ee6ac4ee..25460342961 100644 --- a/arch/xtensa/src/common/xtensa_assert.c +++ b/arch/xtensa/src/common/xtensa_assert.c @@ -63,7 +63,7 @@ ****************************************************************************/ #ifdef CONFIG_ARCH_USBDUMP -static int usbtrace_syslog(FAR const char *fmt, ...) +static int usbtrace_syslog(const char *fmt, ...) { va_list ap; @@ -75,7 +75,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...) return OK; } -static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg) +static int assert_tracecallback(struct usbtrace_s *trace, void *arg) { usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value); return 0; diff --git a/arch/xtensa/src/common/xtensa_attr.h b/arch/xtensa/src/common/xtensa_attr.h index b44f49c685b..473f498b2d9 100644 --- a/arch/xtensa/src/common/xtensa_attr.h +++ b/arch/xtensa/src/common/xtensa_attr.h @@ -40,33 +40,33 @@ /* Forces code into IRAM instead of flash */ -#define IRAM_ATTR __attribute__((section(".iram1"))) +#define IRAM_ATTR locate_data(".iram1") /* Forces data into DRAM instead of flash */ -#define DRAM_ATTR __attribute__((section(".dram1"))) +#define DRAM_ATTR locate_data(".dram1") /* Forces code into RTC fast memory */ -#define RTC_IRAM_ATTR __attribute__((section(".rtc.text"))) +#define RTC_IRAM_ATTR locate_data(".rtc.text") /* Forces data into RTC slow memory * Any variable marked with this attribute will keep its value * during a deep sleep / wake cycle. */ -#define RTC_DATA_ATTR __attribute__((section(".rtc.data"))) +#define RTC_DATA_ATTR locate_data(".rtc.data") /* Forces read-only data into RTC slow memory * Makes constant data available to RTC wake stubs. */ -#define RTC_RODATA_ATTR __attribute__((section(".rtc.rodata"))) +#define RTC_RODATA_ATTR locate_data(".rtc.rodata") /* Allow bss variables into external memory. */ #ifdef CONFIG_XTENSA_EXTMEM_BSS -# define EXT_RAM_ATTR __attribute__((section(".extmem.bss"))) +# define EXT_RAM_ATTR locate_data(".extmem.bss") #else # define EXT_RAM_ATTR #endif diff --git a/arch/xtensa/src/common/xtensa_backtrace.c b/arch/xtensa/src/common/xtensa_backtrace.c index 2448291458f..bed7a1ce052 100644 --- a/arch/xtensa/src/common/xtensa_backtrace.c +++ b/arch/xtensa/src/common/xtensa_backtrace.c @@ -105,9 +105,9 @@ static void get_window_regs(struct xtensa_windowregs_s *frame) ****************************************************************************/ #ifndef __XTENSA_CALL0_ABI__ -static int backtrace_window(FAR uintptr_t *base, FAR uintptr_t *limit, +static int backtrace_window(uintptr_t *base, uintptr_t *limit, struct xtensa_windowregs_s *frame, - FAR void **buffer, int size) + void **buffer, int size) { uint32_t windowstart; uint32_t ra; @@ -152,9 +152,9 @@ static int backtrace_window(FAR uintptr_t *base, FAR uintptr_t *limit, * ****************************************************************************/ -static int backtrace_stack(FAR uintptr_t *base, FAR uintptr_t *limit, - FAR uintptr_t *sp, FAR uintptr_t *ra, - FAR void **buffer, int size) +static int backtrace_stack(uintptr_t *base, uintptr_t *limit, + uintptr_t *sp, uintptr_t *ra, + void **buffer, int size) { int i = 0; @@ -163,14 +163,14 @@ static int backtrace_stack(FAR uintptr_t *base, FAR uintptr_t *limit, buffer[i++] = MAKE_PC_FROM_RA((uintptr_t)ra); } - for (; i < size; sp = (FAR uintptr_t *)*(sp - 3), i++) + for (; i < size; sp = (uintptr_t *)*(sp - 3), i++) { if (sp > limit || sp < base) { break; } - ra = (FAR uintptr_t *)*(sp - 4); + ra = (uintptr_t *)*(sp - 4); if (ra == NULL) { break; @@ -210,9 +210,9 @@ static int backtrace_stack(FAR uintptr_t *base, FAR uintptr_t *limit, * ****************************************************************************/ -int up_backtrace(FAR struct tcb_s *tcb, FAR void **buffer, int size) +int up_backtrace(struct tcb_s *tcb, void **buffer, int size) { - FAR struct tcb_s *rtcb = running_task(); + struct tcb_s *rtcb = running_task(); irqstate_t flags; int ret; @@ -225,8 +225,6 @@ int up_backtrace(FAR struct tcb_s *tcb, FAR void **buffer, int size) { if (up_interrupt_context()) { - xtensa_window_spill(); - #if CONFIG_ARCH_INTERRUPTSTACK > 15 uintptr_t istackbase; #ifdef CONFIG_SMP @@ -234,20 +232,22 @@ int up_backtrace(FAR struct tcb_s *tcb, FAR void **buffer, int size) #else istackbase = &g_intstackalloc; #endif - ret = bactrace_stack((FAR void *)istackbase, - (FAR void *)((uint32_t)&g_intstackalloc + + xtensa_window_spill(); + + ret = bactrace_stack((void *)istackbase, + (void *)((uint32_t)&g_intstackalloc + CONFIG_ARCH_INTERRUPTSTACK), - (FAR void *)up_getsp(), NULL, buffer, size); + (void *)up_getsp(), NULL, buffer, size); #else ret = backtrace_stack(rtcb->stack_base_ptr, rtcb->stack_base_ptr + rtcb->adj_stack_size, - (FAR void *)up_getsp(), NULL, buffer, size); + (void *)up_getsp(), NULL, buffer, size); #endif ret += backtrace_stack(rtcb->stack_base_ptr, rtcb->stack_base_ptr + rtcb->adj_stack_size, - (FAR void *)CURRENT_REGS[REG_A1], - (FAR void *)CURRENT_REGS[REG_A0], + (void *)CURRENT_REGS[REG_A1], + (void *)CURRENT_REGS[REG_A0], &buffer[ret], size - ret); } else @@ -273,7 +273,7 @@ int up_backtrace(FAR struct tcb_s *tcb, FAR void **buffer, int size) #endif ret += backtrace_stack(rtcb->stack_base_ptr, rtcb->stack_base_ptr + rtcb->adj_stack_size, - (FAR void *)up_getsp(), NULL, buffer, size - ret); + (void *)up_getsp(), NULL, buffer, size - ret); } } else @@ -284,8 +284,8 @@ int up_backtrace(FAR struct tcb_s *tcb, FAR void **buffer, int size) ret = backtrace_stack(tcb->stack_base_ptr, tcb->stack_base_ptr + tcb->adj_stack_size, - (FAR void *)tcb->xcp.regs[REG_A1], - (FAR void *)tcb->xcp.regs[REG_A0], + (void *)tcb->xcp.regs[REG_A1], + (void *)tcb->xcp.regs[REG_A0], buffer, size); leave_critical_section(flags); diff --git a/arch/xtensa/src/common/xtensa_checkstack.c b/arch/xtensa/src/common/xtensa_checkstack.c index dbfe602e6ff..addc33b9ef8 100644 --- a/arch/xtensa/src/common/xtensa_checkstack.c +++ b/arch/xtensa/src/common/xtensa_checkstack.c @@ -72,9 +72,9 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size); static size_t do_stackcheck(uintptr_t alloc, size_t size) { - FAR uintptr_t start; - FAR uintptr_t end; - FAR uint32_t *ptr; + uintptr_t start; + uintptr_t end; + uint32_t *ptr; size_t mark; if (size == 0) @@ -99,7 +99,7 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size) * we encounter that does not have the magic value is the high water mark. */ - for (ptr = (FAR uint32_t *)start, mark = (size >> 2); + for (ptr = (uint32_t *)start, mark = (size >> 2); *ptr == STACK_COLOR && mark > 0; ptr++, mark--); @@ -119,7 +119,7 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size) int i; int j; - ptr = (FAR uint32_t *)start; + ptr = (uint32_t *)start; for (i = 0; i < size; i += 4 * 64) { for (j = 0; j < 64; j++) @@ -167,12 +167,12 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size) * ****************************************************************************/ -size_t up_check_tcbstack(FAR struct tcb_s *tcb) +size_t up_check_tcbstack(struct tcb_s *tcb) { return do_stackcheck((uintptr_t)tcb->stack_base_ptr, tcb->adj_stack_size); } -ssize_t up_check_tcbstack_remain(FAR struct tcb_s *tcb) +ssize_t up_check_tcbstack_remain(struct tcb_s *tcb) { return tcb->adj_stack_size - up_check_tcbstack(tcb); } diff --git a/arch/xtensa/src/common/xtensa_cpupause.c b/arch/xtensa/src/common/xtensa_cpupause.c index 228bc3ecf21..db16c968ac8 100644 --- a/arch/xtensa/src/common/xtensa_cpupause.c +++ b/arch/xtensa/src/common/xtensa_cpupause.c @@ -97,7 +97,7 @@ bool up_cpu_pausereq(int cpu) int up_cpu_paused(int cpu) { - FAR struct tcb_s *tcb = this_task(); + struct tcb_s *tcb = this_task(); /* Update scheduler parameters */ diff --git a/arch/xtensa/src/common/xtensa_createstack.c b/arch/xtensa/src/common/xtensa_createstack.c index ef7a5469015..8d1325752af 100644 --- a/arch/xtensa/src/common/xtensa_createstack.c +++ b/arch/xtensa/src/common/xtensa_createstack.c @@ -97,7 +97,7 @@ * ****************************************************************************/ -int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) +int up_create_stack(struct tcb_s *tcb, size_t stack_size, uint8_t ttype) { #if XCHAL_CP_NUM > 0 struct xcptcontext *xcp; @@ -271,12 +271,12 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) ****************************************************************************/ #ifdef CONFIG_STACK_COLORATION -void up_stack_color(FAR void *stackbase, size_t nbytes) +void up_stack_color(void *stackbase, size_t nbytes) { uintptr_t start; uintptr_t end; size_t nwords; - FAR uint32_t *ptr; + uint32_t *ptr; /* Take extra care that we do not write outside the stack boundaries */ @@ -287,7 +287,7 @@ void up_stack_color(FAR void *stackbase, size_t nbytes) /* Get the adjusted size based on the top and bottom of the stack */ nwords = (end - start) >> 2; - ptr = (FAR uint32_t *)start; + ptr = (uint32_t *)start; /* Set the entire stack to the coloration value */ diff --git a/arch/xtensa/src/common/xtensa_dumpstate.c b/arch/xtensa/src/common/xtensa_dumpstate.c index 6627556fae3..7a8d7e17ac5 100644 --- a/arch/xtensa/src/common/xtensa_dumpstate.c +++ b/arch/xtensa/src/common/xtensa_dumpstate.c @@ -56,7 +56,7 @@ static uint32_t s_last_regs[XCPTCONTEXT_REGS]; ****************************************************************************/ #ifdef CONFIG_STACK_COLORATION -static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg) +static void up_taskdump(struct tcb_s *tcb, void *arg) { /* Dump interesting properties of this task */ @@ -74,7 +74,7 @@ static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg) #if defined(CONFIG_XTENSA_DUMPBT_ON_ASSERT) && \ defined(CONFIG_SCHED_BACKTRACE) - sched_dumpstack(rtcb->pid); + sched_dumpstack(tcb->pid); #endif } #endif diff --git a/arch/xtensa/src/common/xtensa_exit.c b/arch/xtensa/src/common/xtensa_exit.c index 6dbacb57a6d..53685043179 100644 --- a/arch/xtensa/src/common/xtensa_exit.c +++ b/arch/xtensa/src/common/xtensa_exit.c @@ -63,11 +63,11 @@ ****************************************************************************/ #ifdef CONFIG_DUMP_ON_EXIT -static void _xtensa_dumponexit(FAR struct tcb_s *tcb, FAR void *arg) +static void _xtensa_dumponexit(struct tcb_s *tcb, void *arg) { - FAR struct filelist *filelist; + struct filelist *filelist; #ifdef CONFIG_FILE_STREAM - FAR struct file_struct *filep; + struct file_struct *filep; #endif int i; int j; diff --git a/arch/xtensa/src/common/xtensa_int_handlers.S b/arch/xtensa/src/common/xtensa_int_handlers.S index 0a556bda090..522c9692ad2 100644 --- a/arch/xtensa/src/common/xtensa_int_handlers.S +++ b/arch/xtensa/src/common/xtensa_int_handlers.S @@ -705,9 +705,9 @@ _xtensa_level6_handler: call0 _xtensa_context_save /* Save full register state */ /* Save current SP before (possibly) overwriting it, it's the register save - * area. This value will be used later by dispatch_c_isr to retrieve the - * register save area. - */ + * area. This value will be used later by dispatch_c_isr to retrieve the + * register save area. + */ mov a12, sp diff --git a/arch/xtensa/src/common/xtensa_modifyreg16.c b/arch/xtensa/src/common/xtensa_modifyreg16.c index 68ee8c19738..0b9a92111cd 100644 --- a/arch/xtensa/src/common/xtensa_modifyreg16.c +++ b/arch/xtensa/src/common/xtensa_modifyreg16.c @@ -29,6 +29,7 @@ #include #include +#include #include "xtensa.h" @@ -49,10 +50,10 @@ void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits) irqstate_t flags; uint16_t regval; - flags = enter_critical_section(); + flags = spin_lock_irqsave(NULL); regval = getreg16(addr); regval &= ~clearbits; regval |= setbits; putreg16(regval, addr); - leave_critical_section(flags); + spin_unlock_irqrestore(NULL, flags); } diff --git a/arch/xtensa/src/common/xtensa_modifyreg32.c b/arch/xtensa/src/common/xtensa_modifyreg32.c index 511754ba6fd..5c7e876c163 100644 --- a/arch/xtensa/src/common/xtensa_modifyreg32.c +++ b/arch/xtensa/src/common/xtensa_modifyreg32.c @@ -29,6 +29,7 @@ #include #include +#include #include "xtensa.h" @@ -49,10 +50,10 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits) irqstate_t flags; uint32_t regval; - flags = enter_critical_section(); + flags = spin_lock_irqsave(NULL); regval = getreg32(addr); regval &= ~clearbits; regval |= setbits; putreg32(regval, addr); - leave_critical_section(flags); + spin_unlock_irqrestore(NULL, flags); } diff --git a/arch/xtensa/src/common/xtensa_modifyreg8.c b/arch/xtensa/src/common/xtensa_modifyreg8.c index e1211901d69..1ebcb6c27c1 100644 --- a/arch/xtensa/src/common/xtensa_modifyreg8.c +++ b/arch/xtensa/src/common/xtensa_modifyreg8.c @@ -29,6 +29,7 @@ #include #include +#include #include "xtensa.h" @@ -49,10 +50,10 @@ void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits) irqstate_t flags; uint8_t regval; - flags = enter_critical_section(); + flags = spin_lock_irqsave(NULL); regval = getreg8(addr); regval &= ~clearbits; regval |= setbits; putreg8(regval, addr); - leave_critical_section(flags); + spin_unlock_irqrestore(NULL, flags); } diff --git a/arch/xtensa/src/common/xtensa_releasestack.c b/arch/xtensa/src/common/xtensa_releasestack.c index 0ef7f1913cc..68310d27790 100644 --- a/arch/xtensa/src/common/xtensa_releasestack.c +++ b/arch/xtensa/src/common/xtensa_releasestack.c @@ -68,7 +68,7 @@ * ****************************************************************************/ -void up_release_stack(FAR struct tcb_s *dtcb, uint8_t ttype) +void up_release_stack(struct tcb_s *dtcb, uint8_t ttype) { /* Is there a stack allocated? */ diff --git a/arch/xtensa/src/common/xtensa_reprioritizertr.c b/arch/xtensa/src/common/xtensa_reprioritizertr.c index ba100bd834a..760a1c2bc56 100644 --- a/arch/xtensa/src/common/xtensa_reprioritizertr.c +++ b/arch/xtensa/src/common/xtensa_reprioritizertr.c @@ -53,8 +53,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -112,7 +111,6 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/xtensa/src/common/xtensa_stackframe.c b/arch/xtensa/src/common/xtensa_stackframe.c index 7707168686d..b217f22a7bc 100644 --- a/arch/xtensa/src/common/xtensa_stackframe.c +++ b/arch/xtensa/src/common/xtensa_stackframe.c @@ -82,9 +82,9 @@ * ****************************************************************************/ -FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size) +void *up_stack_frame(struct tcb_s *tcb, size_t frame_size) { - FAR void *ret; + void *ret; /* Align the frame_size */ @@ -102,7 +102,7 @@ FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size) /* Save the adjusted stack values in the struct tcb_s */ - tcb->stack_base_ptr = (FAR uint8_t *)tcb->stack_base_ptr + frame_size; + tcb->stack_base_ptr = (uint8_t *)tcb->stack_base_ptr + frame_size; tcb->adj_stack_size -= frame_size; /* And return the pointer to the allocated region */ diff --git a/arch/xtensa/src/common/xtensa_testset.c b/arch/xtensa/src/common/xtensa_testset.c index 35ad8692d75..169ff1085f3 100644 --- a/arch/xtensa/src/common/xtensa_testset.c +++ b/arch/xtensa/src/common/xtensa_testset.c @@ -49,7 +49,7 @@ * ****************************************************************************/ -static inline uint32_t xtensa_compareset(FAR volatile uint32_t *addr, +static inline uint32_t xtensa_compareset(volatile uint32_t *addr, uint32_t compare, uint32_t set) { @@ -77,24 +77,24 @@ static inline uint32_t xtensa_compareset(FAR volatile uint32_t *addr, * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * was previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ -spinlock_t up_testset(volatile FAR spinlock_t *lock) +spinlock_t up_testset(volatile spinlock_t *lock) { spinlock_t prev; /* Perform the 32-bit compare and set operation */ - prev = xtensa_compareset((FAR volatile uint32_t *)lock, + prev = xtensa_compareset((volatile uint32_t *)lock, SP_UNLOCKED, SP_LOCKED); /* xtensa_compareset() should return either SP_UNLOCKED if the spinlock diff --git a/arch/xtensa/src/esp32/.gitignore b/arch/xtensa/src/esp32/.gitignore index cdf3df56169..9adccd80ae6 100644 --- a/arch/xtensa/src/esp32/.gitignore +++ b/arch/xtensa/src/esp32/.gitignore @@ -1,2 +1,3 @@ /esp-wireless-drivers-3rdparty +/esp-nuttx-bootloader /*.zip diff --git a/arch/xtensa/src/esp32/Bootloader.mk b/arch/xtensa/src/esp32/Bootloader.mk new file mode 100644 index 00000000000..51db1777bcb --- /dev/null +++ b/arch/xtensa/src/esp32/Bootloader.mk @@ -0,0 +1,123 @@ +############################################################################ +# arch/xtensa/src/esp32/Bootloader.mk +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +ifeq ($(CONFIG_ESP32_BOOTLOADER_BUILD_FROM_SOURCE),y) + +CHIPDIR = $(TOPDIR)/arch/xtensa/src/chip + +BOOTLOADER_SRCDIR = $(CHIPDIR)/esp-nuttx-bootloader +BOOTLOADER_VERSION = main +BOOTLOADER_URL = https://github.com/espressif/esp-nuttx-bootloader +BOOTLOADER_OUTDIR = out + +$(BOOTLOADER_SRCDIR): + $(Q) git clone $(BOOTLOADER_URL) $(BOOTLOADER_SRCDIR) -b $(BOOTLOADER_VERSION) + +ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) + +BOOTLOADER_CONFIG = $(CHIPDIR)/mcuboot.conf + +$(BOOTLOADER_CONFIG): $(TOPDIR)/.config + $(Q) echo "Creating Bootloader configuration" + $(Q) { \ + echo "CONFIG_ESP_BOOTLOADER_SIZE=0xF000"; \ + echo "CONFIG_ESP_APPLICATION_PRIMARY_START_ADDRESS=$(CONFIG_ESP32_OTA_PRIMARY_SLOT_OFFSET)"; \ + echo "CONFIG_ESP_APPLICATION_SIZE=$(CONFIG_ESP32_OTA_SLOT_SIZE)"; \ + echo "CONFIG_ESP_APPLICATION_SECONDARY_START_ADDRESS=$(CONFIG_ESP32_OTA_SECONDARY_SLOT_OFFSET)";\ + echo "CONFIG_ESP_MCUBOOT_WDT_ENABLE=y"; \ + echo "CONFIG_ESP_SCRATCH_OFFSET=$(CONFIG_ESP32_OTA_SCRATCH_OFFSET)"; \ + echo "CONFIG_ESP_SCRATCH_SIZE=$(CONFIG_ESP32_OTA_SCRATCH_SIZE)"; \ + } > $(BOOTLOADER_CONFIG) + +bootloader: $(BOOTLOADER_SRCDIR) $(BOOTLOADER_CONFIG) + $(Q) echo "Building Bootloader binaries" + $(Q) $(BOOTLOADER_SRCDIR)/build_mcuboot.sh -c esp32 -s -f $(BOOTLOADER_CONFIG) + $(call COPYFILE, $(BOOTLOADER_SRCDIR)/$(BOOTLOADER_OUTDIR)/mcuboot-esp32.bin, $(TOPDIR)) + +clean_bootloader: + $(call DELDIR, $(BOOTLOADER_SRCDIR)) + $(call DELFILE, $(BOOTLOADER_CONFIG)) + $(call DELFILE, $(TOPDIR)/mcuboot-esp32.bin) + +else ifeq ($(CONFIG_ESP32_APP_FORMAT_LEGACY),y) + +BOOTLOADER_CONFIG = $(CHIPDIR)/sdkconfig + +$(BOOTLOADER_CONFIG): $(TOPDIR)/.config + $(Q) echo "Creating Bootloader configuration" + $(Q) { \ + [ "$(CONFIG_ESP32_FLASH_2M)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y"; \ + [ "$(CONFIG_ESP32_FLASH_4M)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y"; \ + [ "$(CONFIG_ESP32_FLASH_8M)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y"; \ + [ "$(CONFIG_ESP32_FLASH_16M)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y"; \ + [ "$(CONFIG_ESP32_FLASH_MODE_DIO)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHMODE_DIO=y"; \ + [ "$(CONFIG_ESP32_FLASH_MODE_DOUT)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHMODE_DOUT=y"; \ + [ "$(CONFIG_ESP32_FLASH_MODE_QIO)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHMODE_QIO=y"; \ + [ "$(CONFIG_ESP32_FLASH_MODE_QOUT)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHMODE_QOUT=y"; \ + [ "$(CONFIG_ESP32_FLASH_FREQ_80M)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHFREQ_80M=y"; \ + [ "$(CONFIG_ESP32_FLASH_FREQ_40M)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHFREQ_40M=y"; \ + [ "$(CONFIG_ESP32_FLASH_FREQ_26M)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHFREQ_26M=y"; \ + [ "$(CONFIG_ESP32_FLASH_FREQ_20M)" = "y" ] && echo "CONFIG_ESPTOOLPY_FLASHFREQ_20M=y"; \ + echo "CONFIG_PARTITION_TABLE_CUSTOM=y"; \ + echo "CONFIG_PARTITION_TABLE_CUSTOM_FILENAME=\"partitions.csv\""; \ + } > $(BOOTLOADER_CONFIG) + +bootloader: $(BOOTLOADER_SRCDIR) $(BOOTLOADER_CONFIG) + $(Q) echo "Building Bootloader binaries" + $(Q) $(BOOTLOADER_SRCDIR)/build_idfboot.sh -c esp32 -s -f $(BOOTLOADER_CONFIG) + $(call COPYFILE, $(BOOTLOADER_SRCDIR)/$(BOOTLOADER_OUTDIR)/bootloader-esp32.bin, $(TOPDIR)) + $(call COPYFILE, $(BOOTLOADER_SRCDIR)/$(BOOTLOADER_OUTDIR)/partition-table-esp32.bin, $(TOPDIR)) + +clean_bootloader: + $(call DELDIR, $(BOOTLOADER_SRCDIR)) + $(call DELFILE, $(BOOTLOADER_CONFIG)) + $(call DELFILE, $(TOPDIR)/bootloader-esp32.bin) + $(call DELFILE, $(TOPDIR)/partition-table-esp32.bin) + +endif + +else ifeq ($(CONFIG_ESP32_BOOTLOADER_DOWNLOAD_PREBUILT),y) + +BOOTLOADER_VERSION = latest +BOOTLOADER_URL = https://github.com/espressif/esp-nuttx-bootloader/releases/download/$(BOOTLOADER_VERSION) + +ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) + +bootloader: + $(Q) echo "Downloading Bootloader binaries" + $(Q) curl -L $(BOOTLOADER_URL)/mcuboot-esp32.bin -o $(TOPDIR)/mcuboot-esp32.bin + +clean_bootloader: + $(call DELFILE, $(TOPDIR)/mcuboot-esp32.bin) + +else ifeq ($(CONFIG_ESP32_APP_FORMAT_LEGACY),y) + +bootloader: + $(Q) echo "Downloading Bootloader binaries" + $(Q) curl -L $(BOOTLOADER_URL)/bootloader-esp32.bin -o $(TOPDIR)/bootloader-esp32.bin + $(Q) curl -L $(BOOTLOADER_URL)/partition-table-esp32.bin -o $(TOPDIR)/partition-table-esp32.bin + +clean_bootloader: + $(call DELFILE, $(TOPDIR)/bootloader-esp32.bin) + $(call DELFILE, $(TOPDIR)/partition-table-esp32.bin) + +endif + +endif diff --git a/arch/xtensa/src/esp32/Kconfig b/arch/xtensa/src/esp32/Kconfig index 55fc67ee595..204cca9d73e 100644 --- a/arch/xtensa/src/esp32/Kconfig +++ b/arch/xtensa/src/esp32/Kconfig @@ -254,14 +254,6 @@ config ESP32_RT_TIMER default n select ESP32_TIMER0 -config ESP32_PARTITION - bool "ESP32 Partition" - default n - select ESP32_SPIFLASH - ---help--- - Decode esp-idf's partition file and initialize - partition by nuttx MTD. - config ESP32_RUN_IRAM bool "Run from IRAM" default n @@ -586,6 +578,15 @@ config ESP32_UART0_TXDMA bool "Enable UART0 TX DMA" select ARCH_DMA select UART0_TXDMA + depends on EXPERIMENTAL + ---help--- + Due to a hardware bug on the DMA used by the UART + only TX DMA can be used. RX DMA is not available. + And when TX DMA is working, RX can't work properly, even + without using DMA. + So, it's not possible to have full duplex when TX DMA is enabled + and for not losing RX data it's recommended to implement the use + of flow control while a TX DMA transfer is ongoing. endif # ESP32_UART0 @@ -617,6 +618,15 @@ config ESP32_UART1_TXDMA bool "Enable UART1 TX DMA" select ARCH_DMA select UART1_TXDMA + depends on EXPERIMENTAL + ---help--- + Due to a hardware bug on the DMA used by the UART + only TX DMA can be used. RX DMA is not available. + And when TX DMA is working, RX can't work properly, even + without using DMA. + So, it's not possible to have full duplex when TX DMA is enabled + and for not losing rx data it's recommended to implement the use + of flow control while a TX DMA transfer is ongoing. endif # ESP32_UART1 @@ -648,6 +658,15 @@ config ESP32_UART2_TXDMA bool "Enable UART2 TX DMA" select ARCH_DMA select UART2_TXDMA + depends on EXPERIMENTAL + ---help--- + Due to a hardware bug on the DMA used by the UART + only TX DMA can be used. RX DMA is not available. + And when TX DMA is working, RX can't work properly simultaneously, even + without using DMA. + So, it's not possible to have full duplex when TX DMA is enabled + and for not losing rx data it's recommended to implement the use + of flow control while a TX DMA transfer is ongoing. endif # ESP32_UART2 @@ -709,6 +728,14 @@ config ESP32_I2C1_SDAPIN endif # ESP32_I2C1 +config ESP32_I2CTIMEOSEC + int "Timeout seconds" + default 0 + +config ESP32_I2CTIMEOMS + int "Timeout milliseconds" + default 500 + endmenu # I2C configuration menu "SPI configuration" @@ -807,9 +834,50 @@ endmenu # ESP32_SPI menu "SPI Flash configuration" depends on ESP32_SPIFLASH +if ESP32_HAVE_OTA_PARTITION + +comment "Application Image OTA Update support" + +config ESP32_OTA_PRIMARY_SLOT_OFFSET + hex "Application image primary slot offset" + default "0x10000" + +config ESP32_OTA_PRIMARY_SLOT_DEVPATH + string "Application image primary slot device path" + default "/dev/ota0" + +config ESP32_OTA_SECONDARY_SLOT_OFFSET + hex "Application image secondary slot offset" + default "0x110000" + +config ESP32_OTA_SECONDARY_SLOT_DEVPATH + string "Application image secondary slot device path" + default "/dev/ota1" + +config ESP32_OTA_SLOT_SIZE + hex "Application image slot size (in bytes)" + default "0x100000" + +config ESP32_OTA_SCRATCH_OFFSET + hex "Scratch partition offset" + default "0x210000" + +config ESP32_OTA_SCRATCH_SIZE + hex "Scratch partition size" + default "0x40000" + +config ESP32_OTA_SCRATCH_DEVPATH + string "Scratch partition device path" + default "/dev/otascratch" + +endif + +comment "General MTD configuration" + config ESP32_MTD_OFFSET hex "MTD base address in SPI Flash" - default 0x180000 + default 0x180000 if !ESP32_HAVE_OTA_PARTITION + default 0x250000 if ESP32_HAVE_OTA_PARTITION ---help--- MTD base address in SPI Flash. @@ -1029,6 +1097,7 @@ config ESP32_WIFI_SCAN_RESULT_SIZE config ESP32_WIFI_SAVE_PARAM bool "Save WiFi Parameters" default n + depends on ESP32_SPIFLASH ---help--- If you enable this option, WiFi adapter parameters will be saved into the file system instead of computing them each time. @@ -1049,6 +1118,21 @@ config ESP32_WIFI_FS_MOUNTPT ---help--- Mount point of WiFi storage file system. +config ESP32_WIFI_MTD_OFFSET + hex "Wi-Fi MTD partition offset" + default 0x280000 if !ESP32_HAVE_OTA_PARTITION + default 0x350000 if ESP32_HAVE_OTA_PARTITION + depends on ESP32_WIFI_SAVE_PARAM + ---help--- + This is the base address of the Wi-Fi MTD partition. + +config ESP32_WIFI_MTD_SIZE + hex "Wi-Fi MTD partition size" + default 0xb0000 + depends on ESP32_WIFI_SAVE_PARAM + ---help--- + This is the size of the Wi-Fi MTD partition. + config ESP32_WIFI_STA_DISCONNECT_PM bool "Power Management for station when disconnected" default n @@ -1126,6 +1210,106 @@ config ESP32_FREERUN endmenu # Timer/counter Configuration endif # ESP32_TIMER +config ESP32_HAVE_OTA_PARTITION + bool + default n + +menu "Application Image Configuration" + +choice + prompt "Application Image Format" + default ESP32_APP_FORMAT_LEGACY + ---help--- + Depending on the chosen 2nd stage bootloader, the application may + be required to be perform a specific startup routine. Furthermore, + the image binary must be formatted according to the definition from + the 2nd stage bootloader. + +config ESP32_APP_FORMAT_LEGACY + bool "Legacy format" + ---help--- + This is the legacy application image format, as supported by the ESP-IDF + 2nd stage bootloader. + +config ESP32_APP_FORMAT_MCUBOOT + bool "MCUboot-bootable format" + select ESP32_HAVE_OTA_PARTITION + depends on EXPERIMENTAL + ---help--- + The ESP32 port of MCUboot supports the loading of unsegmented firmware + images. + +comment "MCUboot support depends on CONFIG_EXPERIMENTAL" + depends on !EXPERIMENTAL + +endchoice # Application Image Format + +choice + prompt "Source for bootloader binaries" + default ESP32_BOOTLOADER_DOWNLOAD_PREBUILT + ---help--- + Select the action to be taken by the build system for the + "make bootloader" target. + +config ESP32_BOOTLOADER_DOWNLOAD_PREBUILT + bool "Download prebuilt binaries" + ---help--- + The build system will download the prebuilt binaries from + https://github.com/espressif/esp-nuttx-bootloader according to the chosen + Application Image Format (ESP32_APP_FORMAT_LEGACY or ESP32_APP_FORMAT_MCUBOOT) + +config ESP32_BOOTLOADER_BUILD_FROM_SOURCE + bool "Build binaries from source" + ---help--- + The build system will build all the required binaries from source. It will clone + the https://github.com/espressif/esp-nuttx-bootloader repository and build a + custom bootloader according to the chosen Application Image Format + (ESP32_APP_FORMAT_LEGACY or ESP32_APP_FORMAT_MCUBOOT) and partition information. + +endchoice + +choice + prompt "Target slot for image flashing" + default ESP32_ESPTOOL_TARGET_PRIMARY + depends on ESP32_HAVE_OTA_PARTITION + ---help--- + Slot to which ESPTOOL will flash the generated binary image. + +config ESP32_ESPTOOL_TARGET_PRIMARY + bool "Application image primary slot" + ---help--- + This assumes that the generated image is already pre-validated. + This is the recommended option for the initial stages of the + application firmware image development. + +config ESP32_ESPTOOL_TARGET_SECONDARY + bool "Application image secondary slot" + ---help--- + The application needs to confirm the generated image as valid, + otherwise the bootloader may consider it invalid and perform the + rollback of the update after a reset. + This is the choice most suitable for the development and verification + of a secure firmware update workflow. + +endchoice + +config ESP32_APP_MCUBOOT_HEADER_SIZE + int "Application image header size (in bytes)" + default 32 + depends on ESP32_APP_FORMAT_MCUBOOT + +endmenu # Application Image Configuration + +if ESP32_APP_FORMAT_LEGACY + +config ESP32_PARTITION + bool "ESP32 Partition" + default n + select ESP32_SPIFLASH + ---help--- + Decode esp-idf's partition file and initialize + partition by nuttx MTD. + menu "Partition Configuration" depends on ESP32_PARTITION @@ -1137,7 +1321,9 @@ config ESP32_PARTITION_MOUNT string "Partition mount point" default "/dev/esp/partition/" -endmenu # ESP32_PARTITION +endmenu # Partition Configuration + +endif menu "AES accelerate" depends on ESP32_AES_ACCELERATOR diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs index 268deae307d..9ac87e3364f 100644 --- a/arch/xtensa/src/esp32/Make.defs +++ b/arch/xtensa/src/esp32/Make.defs @@ -18,11 +18,13 @@ # ############################################################################ +include chip/Bootloader.mk + # The start-up, "head", file. May be either a .S or a .c file. HEAD_ASRC = xtensa_vectors.S xtensa_window_vector.S xtensa_windowspill.S HEAD_ASRC += xtensa_int_handlers.S xtensa_user_handler.S -HEAD_CSRC = esp32_start.c +HEAD_CSRC = esp32_start.c esp32_wdt.c # Common XTENSA files (arch/xtensa/src/common) @@ -69,8 +71,8 @@ endif # Required ESP32 files (arch/xtensa/src/lx6) -CHIP_CSRCS = esp32_allocateheap.c esp32_clockconfig.c esp32_cpuint.c -CHIP_CSRCS += esp32_gpio.c esp32_intdecode.c esp32_irq.c esp32_region.c +CHIP_CSRCS = esp32_allocateheap.c esp32_clockconfig.c esp32_gpio.c +CHIP_CSRCS += esp32_irq.c esp32_region.c CHIP_CSRCS += esp32_user.c CHIP_CSRCS += esp32_dma.c @@ -169,12 +171,9 @@ ifeq ($(CONFIG_ESP32_PARTITION),y) CHIP_CSRCS += esp32_partition.c endif -ifeq ($(CONFIG_ESP32_WDT),y) -CHIP_CSRCS += esp32_wdt.c ifeq ($(CONFIG_WATCHDOG),y) CHIP_CSRCS += esp32_wdt_lowerhalf.c endif -endif ifeq ($(CONFIG_ARCH_HAVE_EXTRA_HEAPS),y) CHIP_CSRCS += esp32_extraheaps.c @@ -223,7 +222,7 @@ chip/$(WIRELESS_DRV_UNPACK): $(WIRELESS_DRV_ZIP) context:: chip/$(WIRELESS_DRV_UNPACK) -clean_context:: +distclean:: $(call DELFILE, chip/$(WIRELESS_DRV_ZIP)) $(call DELDIR, chip/$(WIRELESS_DRV_UNPACK)) diff --git a/arch/xtensa/src/esp32/esp32_aes.c b/arch/xtensa/src/esp32/esp32_aes.c index a04415fe6cf..b1c90080485 100644 --- a/arch/xtensa/src/esp32/esp32_aes.c +++ b/arch/xtensa/src/esp32/esp32_aes.c @@ -580,8 +580,8 @@ int esp32_aes_init(void) #ifdef CONFIG_CRYPTO_AES -int aes_cypher(FAR void *out, FAR const void *in, uint32_t size, - FAR const void *iv, FAR const void *key, uint32_t keysize, +int aes_cypher(void *out, const void *in, uint32_t size, + const void *iv, const void *key, uint32_t keysize, int mode, int encrypt) { int ret; diff --git a/arch/xtensa/src/esp32/esp32_allocateheap.c b/arch/xtensa/src/esp32/esp32_allocateheap.c index c0b806ac679..a43ae4e3291 100644 --- a/arch/xtensa/src/esp32/esp32_allocateheap.c +++ b/arch/xtensa/src/esp32/esp32_allocateheap.c @@ -34,6 +34,11 @@ #include #include +#ifdef CONFIG_ESP32_SPIRAM_BANKSWITCH_ENABLE +#include +#include "esp32_himem.h" +#endif + #include "xtensa.h" /**************************************************************************** @@ -59,11 +64,11 @@ * ****************************************************************************/ -void up_allocate_heap(FAR void **heap_start, size_t *heap_size) +void up_allocate_heap(void **heap_start, size_t *heap_size) { board_autoled_on(LED_HEAPALLOCATE); - *heap_start = (FAR void *)&_sheap; + *heap_start = (void *)&_sheap; DEBUGASSERT(HEAP_REGION1_END > (uintptr_t)*heap_start); *heap_size = (size_t)(HEAP_REGION1_END - (uintptr_t)*heap_start); } @@ -108,28 +113,28 @@ void xtensa_add_region(void) } #ifndef CONFIG_SMP - start = (FAR void *)(HEAP_REGION2_START + XTENSA_IMEM_REGION_SIZE); + start = (void *)(HEAP_REGION2_START + XTENSA_IMEM_REGION_SIZE); size = (size_t)(uintptr_t)&_eheap - (size_t)start; umm_addregion(start, size); #else #ifdef CONFIG_ESP32_QEMU_IMAGE - start = (FAR void *)HEAP_REGION2_START; + start = (void *)HEAP_REGION2_START; size = (size_t)(uintptr_t)&_eheap - (size_t)start; umm_addregion(start, size); #else - start = (FAR void *)HEAP_REGION2_START; + start = (void *)HEAP_REGION2_START; size = (size_t)(HEAP_REGION2_END - HEAP_REGION2_START); umm_addregion(start, size); - start = (FAR void *)HEAP_REGION3_START + XTENSA_IMEM_REGION_SIZE; + start = (void *)HEAP_REGION3_START + XTENSA_IMEM_REGION_SIZE; size = (size_t)(uintptr_t)&_eheap - (size_t)start; umm_addregion(start, size); #endif #endif #ifndef CONFIG_ESP32_QEMU_IMAGE - start = (FAR void *)HEAP_REGION0_START; + start = (void *)HEAP_REGION0_START; size = (size_t)(HEAP_REGION0_END - HEAP_REGION0_START); umm_addregion(start, size); #endif @@ -137,12 +142,15 @@ void xtensa_add_region(void) #ifdef CONFIG_ESP32_SPIRAM # if defined(CONFIG_HEAP2_BASE) && defined(CONFIG_HEAP2_SIZE) # ifdef CONFIG_XTENSA_EXTMEM_BSS - start = (FAR void *)(&_ebss_extmem); + start = (void *)(&_ebss_extmem); size = CONFIG_HEAP2_SIZE - (size_t)(&_ebss_extmem - &_sbss_extmem); # else - start = (FAR void *)CONFIG_HEAP2_BASE; + start = (void *)CONFIG_HEAP2_BASE; size = CONFIG_HEAP2_SIZE; # endif +# ifdef CONFIG_ESP32_SPIRAM_BANKSWITCH_ENABLE + size -= esp_himem_reserved_area_size(); +# endif umm_addregion(start, size); # endif #endif diff --git a/arch/xtensa/src/esp32/esp32_cpuidlestack.c b/arch/xtensa/src/esp32/esp32_cpuidlestack.c index f5c14d5a76f..973d86b6b07 100644 --- a/arch/xtensa/src/esp32/esp32_cpuidlestack.c +++ b/arch/xtensa/src/esp32/esp32_cpuidlestack.c @@ -37,7 +37,7 @@ /* Address of the CPU0 IDLE thread */ uint32_t g_cpu1_idlestack[CPU1_IDLETHREAD_STACKWORDS] - __attribute__((aligned(16), section(".noinit"))); + aligned_data(16) locate_data(".noinit"); /**************************************************************************** * Public Functions @@ -86,7 +86,7 @@ uint32_t g_cpu1_idlestack[CPU1_IDLETHREAD_STACKWORDS] * ****************************************************************************/ -int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size) +int up_cpu_idlestack(int cpu, struct tcb_s *tcb, size_t stack_size) { /* XTENSA uses a push-down stack: the stack grows toward lower* addresses * in memory. The stack pointer register points to the lowest, valid diff --git a/arch/xtensa/src/esp32/esp32_cpuint.c b/arch/xtensa/src/esp32/esp32_cpuint.c deleted file mode 100644 index b7c941c7261..00000000000 --- a/arch/xtensa/src/esp32/esp32_cpuint.c +++ /dev/null @@ -1,636 +0,0 @@ -/**************************************************************************** - * arch/xtensa/src/esp32/esp32_cpuint.c - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "hardware/esp32_dport.h" -#include "esp32_cpuint.h" -#include "xtensa.h" - -#include "sched/sched.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Mapping Peripheral IDs to map register addresses - * - * PERIPHERAL ID DPORT REGISTER OFFSET - * MNEMONIC VAL PRO CPU APP CPU - * -------------------------- --- ------- ------- - * ESP32_PERIPH_MAC 0 0x104 0x218 - * ESP32_PERIPH_MAC_NMI 1 0x108 0x21c - * ESP32_PERIPH_BB 2 0x10c 0x220 - * ESP32_PERIPH_BB_MAC 3 0x110 0x224 - * ESP32_PERIPH_BT_BB 4 0x114 0x228 - * ESP32_PERIPH_BT_BB_NMI 5 0x118 0x22c - * ESP32_PERIPH_RWBT_IRQ 6 0x11c 0x230 - * ESP32_PERIPH_RWBLE_IRQ 7 0x120 0x234 - * ESP32_PERIPH_RWBT_NMI 8 0x124 0x238 - * ESP32_PERIPH_RWBLE_NMI 9 0x128 0x23c - * ESP32_PERIPH_SLC0 10 0x12c 0x240 - * ESP32_PERIPH_SLC1 11 0x130 0x244 - * ESP32_PERIPH_UHCI0 12 0x134 0x248 - * ESP32_PERIPH_UHCI1 13 0x138 0x24c - * ESP32_PERIPH_TG_T0_LEVEL 14 0x13c 0x250 - * ESP32_PERIPH_TG_T1_LEVEL 15 0x140 0x254 - * ESP32_PERIPH_TG_WDT_LEVEL 16 0x144 0x258 - * ESP32_PERIPH_TG_LACT_LEVEL 17 0x148 0x25c - * ESP32_PERIPH_TG1_T0_LEVEL 18 0x14c 0x260 - * ESP32_PERIPH_TG1_T1_LEVEL 19 0x150 0x264 - * ESP32_PERIPH_TG1_WDT_LEVEL 20 0x154 0x268 - * ESP32_PERIPH_G1_LACT_LEVEL 21 0x158 0x26c - * ESP32_PERIPH_CPU_GPIO 22 0x15c 0x270 - * ESP32_PERIPH_CPU_NMI 23 0x160 0x274 - * ESP32_PERIPH_CPU_CPU0 24 0x164 0x278 - * ESP32_PERIPH_CPU_CPU1 25 0x168 0x27c - * ESP32_PERIPH_CPU_CPU2 26 0x16c 0x280 - * ESP32_PERIPH_CPU_CPU3 27 0x170 0x284 - * ESP32_PERIPH_SPI0 28 0x174 0x288 - * ESP32_PERIPH_SPI1 29 0x178 0x28c - * ESP32_PERIPH_SPI2 30 0x17c 0x290 - * ESP32_PERIPH_SPI3 31 0x180 0x294 - * ESP32_PERIPH_I2S0 32 0x184 0x298 - * ESP32_PERIPH_I2S1 33 0x188 0x29c - * ESP32_PERIPH_UART 34 0x18c 0x2a0 - * ESP32_PERIPH_UART1 35 0x190 0x2a4 - * ESP32_PERIPH_UART2 36 0x194 0x2a8 - * ESP32_PERIPH_SDIO_HOST 37 0x198 0x2ac - * ESP32_PERIPH_EMAC 38 0x19c 0x2b0 - * ESP32_PERIPH_PWM0 39 0x1a0 0x2b4 - * ESP32_PERIPH_PWM1 40 0x1a4 0x2b8 - * ESP32_PERIPH_PWM2 41 0x1a8 0x2bc - * ESP32_PERIPH_PWM3 42 0x1ac 0x2c0 - * ESP32_PERIPH_LEDC 43 0x1b0 0x2c4 - * ESP32_PERIPH_EFUSE 44 0x1b4 0x2c8 - * ESP32_PERIPH_CAN 45 0x1b8 0x2cc - * ESP32_PERIPH_RTC_CORE 46 0x1bc 0x2d0 - * ESP32_PERIPH_RMT 47 0x1c0 0x2d4 - * ESP32_PERIPH_PCNT 48 0x1c4 0x2d8 - * ESP32_PERIPH_I2C_EXT0 49 0x1c8 0x2dc - * ESP32_PERIPH_I2C_EXT1 50 0x1cc 0x2e0 - * ESP32_PERIPH_RSA 51 0x1d0 0x2e4 - * ESP32_PERIPH_SPI1_DMA 52 0x1d4 0x2e8 - * ESP32_PERIPH_SPI2_DMA 53 0x1d8 0x2ec - * ESP32_PERIPH_SPI3_DMA 54 0x1dc 0x2f0 - * ESP32_PERIPH_WDG 55 0x1e0 0x2f4 - * ESP32_PERIPH_TIMER1 56 0x1e4 0x2f8 - * ESP32_PERIPH_TIMER2 57 0x1e8 0x2fc - * ESP32_PERIPH_TG_T0_EDGE 58 0x1ec 0x300 - * ESP32_PERIPH_TG_T1_EDGE 59 0x1f0 0x304 - * ESP32_PERIPH_TG_WDT_EDGE 60 0x1F4 0x308 - * ESP32_PERIPH_TG_LACT_EDGE 61 0x1F8 0x30c - * ESP32_PERIPH_TG1_T0_EDGE 62 0x1fc 0x310 - * ESP32_PERIPH_TG1_T1_EDGE 63 0x200 0x314 - * ESP32_PERIPH_TG1_WDT_EDGE 64 0x204 0x318 - * ESP32_PERIPH_TG1_LACT_EDGE 65 0x208 0x31c - * ESP32_PERIPH_MMU_IA 66 0x20c 0x320 - * ESP32_PERIPH_MPU_IA 67 0x210 0x324 - * ESP32_PERIPH_CACHE_IA 68 0x214 0x328 - */ - -#define DPORT_PRO_MAP_REGADDR(n) (DR_REG_DPORT_BASE + 0x104 + ((n) << 2)) -#define DPORT_APP_MAP_REGADDR(n) (DR_REG_DPORT_BASE + 0x218 + ((n) << 2)) - -/* CPU interrupts can be detached from any peripheral source by setting the - * map register to an internal CPU interrupt (6, 7, 11, 15, 16, or 29). - */ - -#define NO_CPUINT ESP32_CPUINT_TIMER0 - -/* Priority range is 1-5 */ - -#define ESP32_MIN_PRIORITY 1 -#define ESP32_MAX_PRIORITY 5 -#define ESP32_PRIO_INDEX(p) ((p) - ESP32_MIN_PRIORITY) - -#ifdef CONFIG_ESP32_WIRELESS -# define ESP32_WIRELESS_RESERVE_INT (1 << ESP32_CPUINT_MAC) -#else -# define ESP32_WIRELESS_RESERVE_INT 0 -#endif - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/* Maps a CPU interrupt to the IRQ of the attached peripheral interrupt */ - -uint8_t g_cpu0_intmap[ESP32_NCPUINTS]; -#ifdef CONFIG_SMP -uint8_t g_cpu1_intmap[ESP32_NCPUINTS]; -#endif - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/* g_intenable[] is a shadow copy of the per-CPU INTENABLE register - * content. - */ - -#ifdef CONFIG_SMP -static uint32_t g_intenable[CONFIG_SMP_NCPUS]; -#else -static uint32_t g_intenable[1]; -#endif - -/* Bitsets for free, unallocated CPU interrupts available to peripheral - * devices. - */ - -static uint32_t g_cpu0_freeints = ESP32_CPUINT_PERIPHSET & - (~ESP32_WIRELESS_RESERVE_INT); -#ifdef CONFIG_SMP -static uint32_t g_cpu1_freeints = ESP32_CPUINT_PERIPHSET & - (~ESP32_WIRELESS_RESERVE_INT); -#endif - -/* Bitsets for each interrupt priority 1-5 */ - -static const uint32_t g_priority[5] = -{ - ESP32_INTPRI1_MASK, - ESP32_INTPRI2_MASK, - ESP32_INTPRI3_MASK, - ESP32_INTPRI4_MASK, - ESP32_INTPRI5_MASK -}; - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: xtensa_disable_all - ****************************************************************************/ - -static inline void xtensa_disable_all(void) -{ - __asm__ __volatile__ - ( - "movi a2, 0\n" - "xsr a2, INTENABLE\n" - : : : "a2" - ); -} - -/**************************************************************************** - * Name: esp32_alloc_cpuint - * - * Description: - * Allocate a CPU interrupt for a peripheral device. This function will - * not allocate any of the pre-allocated CPU interrupts for internal - * devices. - * - * Input Parameters: - * intmask - mask of candidate CPU interrupts. The CPU interrupt will be - * be allocated from free interrupts within this set - * - * Returned Value: - * On success, the allocated level-sensitive, CPU interrupt numbr is - * returned. A negated errno is returned on failure. The only possible - * failure is that all level-sensitive CPU interrupts have already been - * allocated. - * - ****************************************************************************/ - -static int esp32_alloc_cpuint(uint32_t intmask) -{ - irqstate_t flags; - uint32_t *freeints; - uint32_t bitmask; - uint32_t intset; - int cpuint; - int ret = -ENOMEM; - - /* Check if there are CPU interrupts with the requested properties - * available. - */ - - flags = enter_critical_section(); - -#ifdef CONFIG_SMP - if (this_cpu() != 0) - { - freeints = &g_cpu1_freeints; - } - else -#endif - { - freeints = &g_cpu0_freeints; - } - - intset = *freeints & intmask; - if (intset != 0) - { - /* Skip over initial unavailable CPU interrupts quickly in groups - * of 8 interrupt. - */ - - for (cpuint = 0, bitmask = 0xff; - cpuint <= ESP32_CPUINT_MAX && (intset & bitmask) == 0; - cpuint += 8, bitmask <<= 8); - - /* Search for an unallocated CPU interrupt number in the remaining - * intset. - */ - - for (; cpuint <= ESP32_CPUINT_MAX; cpuint++) - { - /* If the bit corresponding to the CPU interrupt is '1', then - * that CPU interrupt is available. - */ - - bitmask = (1ul << cpuint); - if ((intset & bitmask) != 0) - { - /* Got it! */ - - *freeints &= ~bitmask; - ret = cpuint; - break; - } - } - } - - leave_critical_section(flags); - return ret; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: esp32_cpuint_initialize - * - * Description: - * Initialize CPU interrupts - * - * Input Parameters: - * None - * - * Returned Value: - * Zero (OK) is returned on success; A negated errno value is returned on - * any failure. - * - ****************************************************************************/ - -int esp32_cpuint_initialize(void) -{ - uintptr_t regaddr; - uint8_t *intmap; -#ifdef CONFIG_SMP - int cpu; -#endif - int i; - -#ifdef CONFIG_SMP - /* Which CPU are we initializing */ - - cpu = up_cpu_index(); - DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS); -#endif - - /* Disable all CPU interrupts on this CPU */ - - xtensa_disable_all(); - - /* Detach all peripheral sources PRO CPU interrupts */ - - for (i = 0; i < ESP32_NPERIPHERALS; i++) - { -#ifdef CONFIG_SMP - if (cpu != 0) - { - regaddr = DPORT_APP_MAP_REGADDR(i); - } - else -#endif - { - regaddr = DPORT_PRO_MAP_REGADDR(i); - } - - putreg32(NO_CPUINT, regaddr); - } - - /* Initialize CPU interrupt-to-IRQ mapping table */ - -#ifdef CONFIG_SMP - if (cpu != 0) - { - intmap = g_cpu1_intmap; - } - else -#endif - { - intmap = g_cpu0_intmap; - } - - /* Indicate that no peripheral interrupts are assigned to CPU interrupts */ - - memset(intmap, CPUINT_UNASSIGNED, ESP32_NCPUINTS); - - /* Special case the 6 internal interrupts. - * - * CPU interrupt bit IRQ number - * --------------------------- --------------------- - * ESP32_CPUINT_MAC 0 ESP32_IRQ_MAC 4 - * ESP32_CPUINT_TIMER0 6 XTENSA_IRQ_TIMER0 0 - * ESP32_CPUINT_SOFTWARE0 7 Not yet defined - * ESP32_CPUINT_PROFILING 11 Not yet defined - * ESP32_CPUINT_TIMER1 15 XTENSA_IRQ_TIMER1 1 - * ESP32_CPUINT_TIMER2 16 XTENSA_IRQ_TIMER2 2 - * ESP32_CPUINT_SOFTWARE1 29 Not yet defined - */ - - intmap[ESP32_CPUINT_TIMER0] = XTENSA_IRQ_TIMER0; - intmap[ESP32_CPUINT_TIMER1] = XTENSA_IRQ_TIMER1; - intmap[ESP32_CPUINT_TIMER2] = XTENSA_IRQ_TIMER2; - - /* Reserve CPU interrupt for some special drivers */ - -#ifdef CONFIG_ESP32_WIRELESS - intmap[ESP32_CPUINT_MAC] = ESP32_IRQ_MAC; -#endif - - return OK; -} - -/**************************************************************************** - * Name: up_disable_irq - * - * Description: - * Disable the CPU interrupt specified by 'cpuint' - * - ****************************************************************************/ - -void up_disable_irq(int cpuint) -{ -#ifdef CONFIG_SMP - int cpu; -#endif - - DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX); - -#ifdef CONFIG_SMP - cpu = up_cpu_index(); - xtensa_disable_cpuint(&g_intenable[cpu], (1ul << cpuint)); -#else - xtensa_disable_cpuint(&g_intenable[0], (1ul << cpuint)); -#endif -} - -/**************************************************************************** - * Name: up_enable_irq - * - * Description: - * Enable the CPU interrupt specified by 'cpuint' - * - ****************************************************************************/ - -void up_enable_irq(int cpuint) -{ -#ifdef CONFIG_SMP - int cpu; -#endif - - DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX); - -#ifdef CONFIG_SMP - cpu = up_cpu_index(); - xtensa_enable_cpuint(&g_intenable[cpu], (1ul << cpuint)); -#else - xtensa_enable_cpuint(&g_intenable[0], (1ul << cpuint)); -#endif -} - -/**************************************************************************** - * Name: esp32_alloc_levelint - * - * Description: - * Allocate a level CPU interrupt - * - * Input Parameters: - * priority - Priority of the CPU interrupt (1-5) - * - * Returned Value: - * On success, the allocated level-sensitive, CPU interrupt number is - * returned. A negated errno is returned on failure. The only possible - * failure is that all level-sensitive CPU interrupts have already been - * allocated. - * - ****************************************************************************/ - -int esp32_alloc_levelint(int priority) -{ - uint32_t intmask; - - DEBUGASSERT(priority >= ESP32_MIN_PRIORITY && - priority <= ESP32_MAX_PRIORITY); - - /* Check if there are any level CPU interrupts available at the requested - * interrupt priority. - */ - - intmask = g_priority[ESP32_PRIO_INDEX(priority)] & ESP32_CPUINT_LEVELSET; - return esp32_alloc_cpuint(intmask); -} - -/**************************************************************************** - * Name: esp32_alloc_edgeint - * - * Description: - * Allocate an edge CPU interrupt - * - * Input Parameters: - * priority - Priority of the CPU interrupt (1-5) - * - * Returned Value: - * On success, the allocated edge-sensitive, CPU interrupt numbr is - * returned. A negated errno is returned on failure. The only possible - * failure is that all edge-sensitive CPU interrupts have already been - * allocated. - * - ****************************************************************************/ - -int esp32_alloc_edgeint(int priority) -{ - uint32_t intmask; - - DEBUGASSERT(priority >= ESP32_MIN_PRIORITY && - priority <= ESP32_MAX_PRIORITY); - - /* Check if there are any edge CPU interrupts available at the requested - * interrupt priority. - */ - - intmask = g_priority[ESP32_PRIO_INDEX(priority)] & ESP32_CPUINT_EDGESET; - return esp32_alloc_cpuint(intmask); -} - -/**************************************************************************** - * Name: esp32_free_cpuint - * - * Description: - * Free a previously allocated CPU interrupt - * - * Input Parameters: - * The CPU interrupt number to be freed - * - * Returned Value: - * None - * - ****************************************************************************/ - -void esp32_free_cpuint(int cpuint) -{ - irqstate_t flags; - uint32_t *freeints; - uint32_t bitmask; - - DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX); - - /* Mark the CPU interrupt as available */ - - bitmask = (1ul << cpuint); - flags = enter_critical_section(); - -#ifdef CONFIG_SMP - if (this_cpu() != 0) - { - freeints = &g_cpu1_freeints; - } - else -#endif - { - freeints = &g_cpu0_freeints; - } - - DEBUGASSERT((*freeints & bitmask) == 0); - *freeints |= bitmask; - leave_critical_section(flags); -} - -/**************************************************************************** - * Name: esp32_attach_peripheral - * - * Description: - * Attach a peripheral interrupt to a CPU interrupt. - * - * Input Parameters: - * cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU - * periphid - The peripheral number from irq.h to be assigned to - * a CPU interrupt. - * cpuint - The CPU interrupt to receive the peripheral interrupt - * assignment. - * - * Returned Value: - * None - * - ****************************************************************************/ - -void esp32_attach_peripheral(int cpu, int periphid, int cpuint) -{ - uintptr_t regaddr; - uint8_t *intmap; - - DEBUGASSERT(periphid >= 0 && periphid < ESP32_NPERIPHERALS); - DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX); -#ifdef CONFIG_SMP - DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS); - - if (cpu != 0) - { - regaddr = DPORT_APP_MAP_REGADDR(periphid); - intmap = g_cpu1_intmap; - } - else -#endif - { - regaddr = DPORT_PRO_MAP_REGADDR(periphid); - intmap = g_cpu0_intmap; - } - - DEBUGASSERT(intmap[cpuint] == CPUINT_UNASSIGNED); - intmap[cpuint] = periphid + XTENSA_IRQ_FIRSTPERIPH; - - putreg32(cpuint, regaddr); -} - -/**************************************************************************** - * Name: esp32_detach_peripheral - * - * Description: - * Detach a peripheral interrupt from a CPU interrupt. - * - * Input Parameters: - * cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU - * periphid - The peripheral number from irq.h to be detached from the - * CPU interrupt. - * cpuint - The CPU interrupt from which the peripheral interrupt will - * be detached. - * - * Returned Value: - * None - * - ****************************************************************************/ - -void esp32_detach_peripheral(int cpu, int periphid, int cpuint) -{ - uintptr_t regaddr; - uint8_t *intmap; - - DEBUGASSERT(periphid >= 0 && periphid < ESP32_NPERIPHERALS); -#ifdef CONFIG_SMP - DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS); - - if (cpu != 0) - { - regaddr = DPORT_APP_MAP_REGADDR(periphid); - intmap = g_cpu1_intmap; - } - else -#endif - { - regaddr = DPORT_PRO_MAP_REGADDR(periphid); - intmap = g_cpu0_intmap; - } - - DEBUGASSERT(intmap[cpuint] != CPUINT_UNASSIGNED); - intmap[cpuint] = CPUINT_UNASSIGNED; - - putreg32(NO_CPUINT, regaddr); -} diff --git a/arch/xtensa/src/esp32/esp32_cpustart.c b/arch/xtensa/src/esp32/esp32_cpustart.c index acd112e971a..c915b086572 100644 --- a/arch/xtensa/src/esp32/esp32_cpustart.c +++ b/arch/xtensa/src/esp32/esp32_cpustart.c @@ -37,11 +37,14 @@ #include "sched/sched.h" #include "xtensa.h" + #include "hardware/esp32_dport.h" #include "hardware/esp32_rtccntl.h" + #include "esp32_region.h" -#include "esp32_cpuint.h" +#include "esp32_irq.h" #include "esp32_smp.h" +#include "esp32_gpio.h" #ifdef CONFIG_SMP @@ -69,7 +72,7 @@ extern void ets_set_appcpu_boot_addr(uint32_t start); ****************************************************************************/ #if 0 /* Was useful in solving some startup problems */ -static inline void xtensa_registerdump(FAR struct tcb_s *tcb) +static inline void xtensa_registerdump(struct tcb_s *tcb) { _info("CPU%d:\n", up_cpu_index()); @@ -90,15 +93,10 @@ static inline void xtensa_attach_fromcpu0_interrupt(void) { int cpuint; - /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */ - - cpuint = esp32_alloc_levelint(1); - DEBUGASSERT(cpuint >= 0); - /* Connect all CPU peripheral source to allocated CPU interrupt */ - up_disable_irq(cpuint); - esp32_attach_peripheral(1, ESP32_PERIPH_CPU_CPU0, cpuint); + cpuint = esp32_setup_irq(1, ESP32_PERIPH_CPU_CPU0, 1, ESP32_CPUINT_LEVEL); + DEBUGASSERT(cpuint >= 0); /* Attach the inter-CPU interrupt. */ @@ -106,7 +104,7 @@ static inline void xtensa_attach_fromcpu0_interrupt(void) /* Enable the inter 0 CPU interrupts. */ - up_enable_irq(cpuint); + up_enable_irq(ESP32_IRQ_CPU_CPU0); } #endif @@ -118,8 +116,8 @@ static inline void xtensa_attach_fromcpu0_interrupt(void) * Name: xtensa_appcpu_start * * Description: - * This is the entry point used with the APP CPU was started via - * up_cpu_start(). The actually start-up logic in in ROM and we boot up + * This is the entry point used for the APP CPU when it's started via + * up_cpu_start(). The actual start-up logic is in ROM and we boot up * in C code. * * Input Parameters: @@ -132,7 +130,7 @@ static inline void xtensa_attach_fromcpu0_interrupt(void) void xtensa_appcpu_start(void) { - FAR struct tcb_s *tcb = this_task(); + struct tcb_s *tcb = this_task(); register uint32_t sp; #ifdef CONFIG_STACK_COLORATION @@ -211,6 +209,12 @@ void xtensa_appcpu_start(void) xtensa_registerdump(tcb); +#ifdef CONFIG_ESP32_GPIO_IRQ + /* Initialize GPIO interrupt support */ + + esp32_gpioirqinitialize(1); +#endif + #ifndef CONFIG_SUPPRESS_INTERRUPTS /* And Enable interrupts */ @@ -229,14 +233,14 @@ void xtensa_appcpu_start(void) * Name: up_cpu_start * * Description: - * In an SMP configution, only one CPU is initially active (CPU 0). System - * initialization occurs on that single thread. At the completion of the - * initialization of the OS, just before beginning normal multitasking, + * In an SMP configuration, only one CPU is initially active (CPU 0). + * System initialization occurs on that single thread. At the completion of + * the initialization of the OS, just before beginning normal multitasking, * the additional CPUs would be started by calling this function. * - * Each CPU is provided the entry point to is IDLE task when started. A + * Each CPU is provided the entry point to its IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. Not stack has been allocated or + * CPU's g_assignedtasks[cpu] list. No stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each @@ -244,8 +248,8 @@ void xtensa_appcpu_start(void) * * Input Parameters: * cpu - The index of the CPU being started. This will be a numeric - * value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU - * 0 is already active) + * value in the range of one to (CONFIG_SMP_NCPUS-1). + * (CPU 0 is already active) * * Returned Value: * Zero on success; a negated errno value on failure. diff --git a/arch/xtensa/src/esp32/esp32_efuse.h b/arch/xtensa/src/esp32/esp32_efuse.h index dc1f06d3888..51497ba3187 100644 --- a/arch/xtensa/src/esp32/esp32_efuse.h +++ b/arch/xtensa/src/esp32/esp32_efuse.h @@ -60,4 +60,4 @@ int esp_efuse_write_field(const efuse_desc_t *field[], void esp_efuse_burn_efuses(void); -int esp32_efuse_initialize(FAR const char *devpath); +int esp32_efuse_initialize(const char *devpath); diff --git a/arch/xtensa/src/esp32/esp32_efuse_lowerhalf.c b/arch/xtensa/src/esp32/esp32_efuse_lowerhalf.c index 9973ecfbc3b..88730d844a6 100644 --- a/arch/xtensa/src/esp32/esp32_efuse_lowerhalf.c +++ b/arch/xtensa/src/esp32/esp32_efuse_lowerhalf.c @@ -37,8 +37,8 @@ struct esp32_efuse_lowerhalf_s { - FAR const struct efuse_ops_s *ops; /* Lower half operations */ - void *upper; /* Pointer to efuse_upperhalf_s */ + const struct efuse_ops_s *ops; /* Lower half operations */ + void *upper; /* Pointer to efuse_upperhalf_s */ }; /**************************************************************************** @@ -47,14 +47,14 @@ struct esp32_efuse_lowerhalf_s /* "Lower half" driver methods **********************************************/ -static int esp32_efuse_read_field(FAR struct efuse_lowerhalf_s *lower, +static int esp32_efuse_read_field(struct efuse_lowerhalf_s *lower, const efuse_desc_t *field[], - FAR uint8_t *data, size_t size); -static int esp32_efuse_write_field(FAR struct efuse_lowerhalf_s *lower, + uint8_t *data, size_t size); +static int esp32_efuse_write_field(struct efuse_lowerhalf_s *lower, const efuse_desc_t *field[], - FAR const uint8_t *data, + const uint8_t *data, size_t size); -static int efuse_ioctl(FAR struct efuse_lowerhalf_s *lower, int cmd, +static int efuse_ioctl(struct efuse_lowerhalf_s *lower, int cmd, unsigned long arg); /**************************************************************************** @@ -82,7 +82,7 @@ static struct esp32_efuse_lowerhalf_s g_esp32_efuse_lowerhalf = * Private functions ****************************************************************************/ -static int esp32_efuse_read_field(FAR struct efuse_lowerhalf_s *lower, +static int esp32_efuse_read_field(struct efuse_lowerhalf_s *lower, const efuse_desc_t *field[], uint8_t *data, size_t bits_len) { @@ -95,7 +95,7 @@ static int esp32_efuse_read_field(FAR struct efuse_lowerhalf_s *lower, return ret; } -static int esp32_efuse_write_field(FAR struct efuse_lowerhalf_s *lower, +static int esp32_efuse_write_field(struct efuse_lowerhalf_s *lower, const efuse_desc_t *field[], const uint8_t *data, size_t bits_len) { @@ -121,7 +121,7 @@ static int esp32_efuse_write_field(FAR struct efuse_lowerhalf_s *lower, * Name: efuse_ioctl ****************************************************************************/ -static int efuse_ioctl(FAR struct efuse_lowerhalf_s *lower, +static int efuse_ioctl(struct efuse_lowerhalf_s *lower, int cmd, unsigned long arg) { int ret = OK; @@ -162,7 +162,7 @@ static int efuse_ioctl(FAR struct efuse_lowerhalf_s *lower, * ****************************************************************************/ -int esp32_efuse_initialize(FAR const char *devpath) +int esp32_efuse_initialize(const char *devpath) { struct esp32_efuse_lowerhalf_s *lower = NULL; int ret = OK; @@ -174,7 +174,7 @@ int esp32_efuse_initialize(FAR const char *devpath) /* Register the efuser upper driver */ lower->upper = efuse_register(devpath, - (FAR struct efuse_lowerhalf_s *)lower); + (struct efuse_lowerhalf_s *)lower); if (lower->upper == NULL) { diff --git a/arch/xtensa/src/esp32/esp32_emac.c b/arch/xtensa/src/esp32/esp32_emac.c index 5f055b3ec9e..97b5575c1a4 100644 --- a/arch/xtensa/src/esp32/esp32_emac.c +++ b/arch/xtensa/src/esp32/esp32_emac.c @@ -61,7 +61,7 @@ #include "hardware/esp32_dport.h" #include "hardware/esp32_emac.h" #include "esp32_gpio.h" -#include "esp32_cpuint.h" +#include "esp32_irq.h" #include @@ -373,7 +373,7 @@ static void emac_init_buffer(struct esp32_emac_s *priv) for (i = 0; i < EMAC_BUF_NUM; i++) { - sq_addlast((FAR sq_entry_t *)buffer, &priv->freeb); + sq_addlast((sq_entry_t *)buffer, &priv->freeb); buffer += EMAC_BUF_LEN; } } @@ -435,7 +435,7 @@ static inline void emac_free_buffer(struct esp32_emac_s *priv, { /* Free the buffer by adding it to the end of the free buffer list */ - sq_addlast((FAR sq_entry_t *)buffer, &priv->freeb); + sq_addlast((sq_entry_t *)buffer, &priv->freeb); } /**************************************************************************** @@ -1271,7 +1271,7 @@ static int phy_enable_interrupt(void) * ****************************************************************************/ -static void emac_txtimeout_work(FAR void *arg) +static void emac_txtimeout_work(void *arg) { struct esp32_emac_s *priv = (struct esp32_emac_s *)arg; @@ -1315,7 +1315,7 @@ static void emac_txtimeout_expiry(wdparm_t arg) * Interrupts will be re-enabled when emac_ifup() is called. */ - up_disable_irq(priv->cpuint); + up_disable_irq(ESP32_IRQ_EMAC); /* Schedule to perform the TX timeout processing on the worker thread, * perhaps canceling any pending IRQ processing. @@ -1341,7 +1341,7 @@ static void emac_txtimeout_expiry(wdparm_t arg) * ****************************************************************************/ -static void emac_rx_interrupt_work(FAR void *arg) +static void emac_rx_interrupt_work(void *arg) { struct esp32_emac_s *priv = (struct esp32_emac_s *)arg; struct net_driver_s *dev = &priv->dev; @@ -1496,7 +1496,7 @@ static void emac_rx_interrupt_work(FAR void *arg) * ****************************************************************************/ -static void emac_tx_interrupt_work(FAR void *arg) +static void emac_tx_interrupt_work(void *arg) { struct esp32_emac_s *priv = (struct esp32_emac_s *)arg; @@ -1526,7 +1526,7 @@ static void emac_tx_interrupt_work(FAR void *arg) * ****************************************************************************/ -static int emac_interrupt(int irq, FAR void *context, FAR void *arg) +static int emac_interrupt(int irq, void *context, void *arg) { struct esp32_emac_s *priv = (struct esp32_emac_s *)arg; uint32_t value = emac_get_reg(EMAC_DMA_SR_OFFSET); @@ -1677,7 +1677,7 @@ static int emac_txpoll(struct net_driver_s *dev) static void emac_dopoll(struct esp32_emac_s *priv) { - FAR struct net_driver_s *dev = &priv->dev; + struct net_driver_s *dev = &priv->dev; if (!TX_IS_BUSY(priv)) { @@ -1722,7 +1722,7 @@ static void emac_dopoll(struct esp32_emac_s *priv) * ****************************************************************************/ -static void emac_txavail_work(FAR void *arg) +static void emac_txavail_work(void *arg) { struct esp32_emac_s *priv = (struct esp32_emac_s *)arg; @@ -1758,11 +1758,11 @@ static void emac_txavail_work(FAR void *arg) * ****************************************************************************/ -static void emac_poll_work(FAR void *arg) +static void emac_poll_work(void *arg) { int ret; struct esp32_emac_s *priv = (struct esp32_emac_s *)arg; - FAR struct net_driver_s *dev = &priv->dev; + struct net_driver_s *dev = &priv->dev; ninfo("ifup: %d\n", priv->ifup); @@ -1826,7 +1826,7 @@ static void emac_poll_work(FAR void *arg) static void emac_poll_expiry(wdparm_t arg) { - FAR struct esp32_emac_s *priv = (FAR struct esp32_emac_s *)arg; + struct esp32_emac_s *priv = (struct esp32_emac_s *)arg; /* Schedule to perform the interrupt processing on the worker thread. */ @@ -1904,7 +1904,7 @@ static int emac_ifup(struct net_driver_s *dev) /* Enable the Ethernet interrupt */ - up_enable_irq(priv->cpuint); + up_enable_irq(ESP32_IRQ_EMAC); leave_critical_section(flags); @@ -2026,7 +2026,7 @@ static int emac_txavail(struct net_driver_s *dev) ****************************************************************************/ #if defined(CONFIG_NET_MCASTGROUP) || defined(CONFIG_NET_ICMPv6) -static int emac_addmac(struct net_driver_s *dev, FAR const uint8_t *mac) +static int emac_addmac(struct net_driver_s *dev, const uint8_t *mac) { ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); @@ -2055,7 +2055,7 @@ static int emac_addmac(struct net_driver_s *dev, FAR const uint8_t *mac) ****************************************************************************/ #ifdef CONFIG_NET_MCASTGROUP -static int emac_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac) +static int emac_rmmac(struct net_driver_s *dev, const uint8_t *mac) { ninfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]); @@ -2096,7 +2096,7 @@ static int emac_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac) static int emac_ioctl(struct net_driver_s *dev, int cmd, unsigned long arg) { #if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT) - FAR struct esp32_emacmac_s *priv = NET2PRIV(dev); + struct esp32_emacmac_s *priv = NET2PRIV(dev); #endif int ret; @@ -2185,9 +2185,8 @@ int esp32_emac_init(void) memset(priv, 0, sizeof(struct esp32_emac_s)); - /* Allocate and register interrupt */ - - priv->cpuint = esp32_alloc_levelint(1); + priv->cpuint = esp32_setup_irq(0, ESP32_PERIPH_EMAC, + 1, ESP32_CPUINT_LEVEL); if (priv->cpuint < 0) { nerr("ERROR: Failed alloc interrupt\n"); @@ -2196,9 +2195,6 @@ int esp32_emac_init(void) goto error; } - up_disable_irq(priv->cpuint); - esp32_attach_peripheral(0, ESP32_PERIPH_EMAC, priv->cpuint); - ret = irq_attach(ESP32_IRQ_EMAC, emac_interrupt, priv); if (ret != 0) { @@ -2240,8 +2236,7 @@ int esp32_emac_init(void) return 0; errout_with_attachirq: - esp32_detach_peripheral(0, ESP32_PERIPH_EMAC, priv->cpuint); - esp32_free_cpuint(priv->cpuint); + esp32_teardown_irq(0, ESP32_PERIPH_EMAC, priv->cpuint); error: return ret; diff --git a/arch/xtensa/src/esp32/esp32_freerun.h b/arch/xtensa/src/esp32/esp32_freerun.h index c43b33a577f..d09d45004ce 100644 --- a/arch/xtensa/src/esp32/esp32_freerun.h +++ b/arch/xtensa/src/esp32/esp32_freerun.h @@ -46,11 +46,11 @@ struct esp32_freerun_s { - uint8_t chan; /* The timer/counter in use */ - uint32_t overflow; /* Timer counter overflow */ - uint16_t resolution; /* Timer resolution */ - uint64_t max_timeout; /* Maximum timeout to overflow */ - FAR struct esp32_tim_dev_s *tch; /* Handle returned by esp32_tim_init() */ + uint8_t chan; /* The timer/counter in use */ + uint32_t overflow; /* Timer counter overflow */ + uint16_t resolution; /* Timer resolution */ + uint64_t max_timeout; /* Maximum timeout to overflow */ + struct esp32_tim_dev_s *tch; /* Handle returned by esp32_tim_init() */ }; /**************************************************************************** diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c index e7a9ed25355..ea0eabe375f 100644 --- a/arch/xtensa/src/esp32/esp32_gpio.c +++ b/arch/xtensa/src/esp32/esp32_gpio.c @@ -34,10 +34,13 @@ #include #include "xtensa.h" + #include "hardware/esp32_iomux.h" #include "hardware/esp32_gpio.h" -#include "esp32_cpuint.h" + +#include "esp32_irq.h" #include "esp32_rtc_gpio.h" + #include "esp32_gpio.h" /**************************************************************************** @@ -53,7 +56,11 @@ ****************************************************************************/ #ifdef CONFIG_ESP32_GPIO_IRQ -static int g_gpio_cpuint; +#ifdef CONFIG_SMP +static int g_gpio_cpuint[CONFIG_SMP_NCPUS]; +#else +static int g_gpio_cpuint[1]; +#endif #endif static const uint8_t g_pin2func[40] = @@ -128,7 +135,7 @@ static void gpio_dispatch(int irq, uint32_t status, uint32_t *regs) ****************************************************************************/ #ifdef CONFIG_ESP32_GPIO_IRQ -static int gpio_interrupt(int irq, FAR void *context, FAR void *arg) +static int gpio_interrupt(int irq, void *context, void *arg) { uint32_t status; @@ -163,6 +170,18 @@ static int gpio_interrupt(int irq, FAR void *context, FAR void *arg) * Description: * Configure a GPIO pin based on encoded pin attributes. * + * Input Parameters: + * pin - GPIO pin to be configured + * attr - Attributes to be configured for the selected GPIO pin. + * The following attributes are accepted: + * - Direction (OUTPUT or INPUT) + * - Pull (PULLUP, PULLDOWN or OPENDRAIN) + * - Function (if not provided, assume function GPIO by default) + * - Drive strength (if not provided, assume DRIVE_2 by default) + * + * Returned Value: + * Zero (OK) on success, or -1 (ERROR) in case of failure. + * ****************************************************************************/ int esp32_configgpio(int pin, gpio_pinattr_t attr) @@ -281,23 +300,34 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr) } } - /* Add drivers */ - - func |= (uint32_t)(2ul << FUN_DRV_S); - - /* Select the pad's function. If no function was given, consider it a - * normal input or output (i.e. function3). - */ + /* Configure the pad's function */ if ((attr & FUNCTION_MASK) != 0) { - func |= (uint32_t)(((attr >> FUNCTION_SHIFT) - 1) << MCU_SEL_S); + uint32_t val = ((attr & FUNCTION_MASK) >> FUNCTION_SHIFT) - 1; + func |= val << MCU_SEL_S; } else { + /* Function not provided, assuming function GPIO by default */ + func |= (uint32_t)(PIN_FUNC_GPIO << MCU_SEL_S); } + /* Configure the pad's drive strength */ + + if ((attr & DRIVE_MASK) != 0) + { + uint32_t val = ((attr & DRIVE_MASK) >> DRIVE_SHIFT) - 1; + func |= val << FUN_DRV_S; + } + else + { + /* Drive strength not provided, assuming strength 2 by default */ + + func |= UINT32_C(2) << FUN_DRV_S; + } + if ((attr & OPEN_DRAIN) != 0) { cntrl |= (1 << GPIO_PIN_PAD_DRIVER_S); @@ -383,32 +413,24 @@ bool esp32_gpioread(int pin) ****************************************************************************/ #ifdef CONFIG_ESP32_GPIO_IRQ -void esp32_gpioirqinitialize(void) +void esp32_gpioirqinitialize(int cpu) { - int cpu; - - /* Allocate a level-sensitive, priority 1 CPU interrupt */ - - g_gpio_cpuint = esp32_alloc_levelint(1); - DEBUGASSERT(g_gpio_cpuint >= 0); - - /* Set up to receive peripheral interrupts on the current CPU */ - #ifdef CONFIG_SMP - cpu = up_cpu_index(); + DEBUGASSERT(cpu >= 0 && cpu <= CONFIG_SMP_NCPUS); #else - cpu = 0; + DEBUGASSERT(cpu == 0); #endif - /* Attach the GPIO peripheral to the allocated CPU interrupt */ + /* Setup the GPIO interrupt. */ - up_disable_irq(g_gpio_cpuint); - esp32_attach_peripheral(cpu, ESP32_PERIPH_CPU_GPIO, g_gpio_cpuint); + g_gpio_cpuint[cpu] = esp32_setup_irq(cpu, ESP32_PERIPH_CPU_GPIO, + 1, ESP32_CPUINT_LEVEL); + DEBUGASSERT(g_gpio_cpuint[cpu] >= 0); /* Attach and enable the interrupt handler */ - DEBUGVERIFY(irq_attach(ESP32_IRQ_CPU_GPIO, gpio_interrupt, NULL)); - up_enable_irq(g_gpio_cpuint); + DEBUGVERIFY(irq_attach(esp32_irq_gpio(cpu), gpio_interrupt, NULL)); + up_enable_irq(esp32_irq_gpio(cpu)); } #endif @@ -425,10 +447,8 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype) { uintptr_t regaddr; uint32_t regval; -#ifdef CONFIG_SMP - int cpu; -#endif int pin; + int cpu = up_cpu_index(); DEBUGASSERT(irq >= ESP32_FIRST_GPIOIRQ && irq <= ESP32_LAST_GPIOIRQ); @@ -438,7 +458,7 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype) /* Get the address of the GPIO PIN register for this pin */ - up_disable_irq(g_gpio_cpuint); + up_disable_irq(esp32_irq_gpio(cpu)); regaddr = GPIO_REG(pin); regval = getreg32(regaddr); @@ -454,7 +474,6 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype) */ #ifdef CONFIG_SMP - cpu = up_cpu_index(); if (cpu != 0) { /* APP_CPU */ @@ -472,7 +491,7 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype) regval |= (intrtype << GPIO_PIN_INT_TYPE_S); putreg32(regval, regaddr); - up_enable_irq(g_gpio_cpuint); + up_enable_irq(esp32_irq_gpio(cpu)); } #endif @@ -490,6 +509,7 @@ void esp32_gpioirqdisable(int irq) uintptr_t regaddr; uint32_t regval; int pin; + int cpu = up_cpu_index(); DEBUGASSERT(irq >= ESP32_FIRST_GPIOIRQ && irq <= ESP32_LAST_GPIOIRQ); @@ -499,14 +519,14 @@ void esp32_gpioirqdisable(int irq) /* Get the address of the GPIO PIN register for this pin */ - up_disable_irq(g_gpio_cpuint); + up_disable_irq(esp32_irq_gpio(cpu)); regaddr = GPIO_REG(pin); regval = getreg32(regaddr); regval &= ~(GPIO_PIN_INT_ENA_M | GPIO_PIN_INT_TYPE_M); putreg32(regval, regaddr); - up_enable_irq(g_gpio_cpuint); + up_enable_irq(esp32_irq_gpio(cpu)); } #endif diff --git a/arch/xtensa/src/esp32/esp32_gpio.h b/arch/xtensa/src/esp32/esp32_gpio.h index 84a63e4add1..5d7cc8518e9 100644 --- a/arch/xtensa/src/esp32/esp32_gpio.h +++ b/arch/xtensa/src/esp32/esp32_gpio.h @@ -56,6 +56,7 @@ #define PULLUP (1 << 3) #define PULLDOWN (1 << 4) #define OPEN_DRAIN (1 << 5) + #define FUNCTION_SHIFT 6 #define FUNCTION_MASK (7 << FUNCTION_SHIFT) # define FUNCTION_1 (1 << FUNCTION_SHIFT) @@ -65,6 +66,13 @@ # define FUNCTION_5 (5 << FUNCTION_SHIFT) # define FUNCTION_6 (6 << FUNCTION_SHIFT) +#define DRIVE_SHIFT 9 +#define DRIVE_MASK (7 << DRIVE_SHIFT) +# define DRIVE_0 (1 << DRIVE_SHIFT) +# define DRIVE_1 (2 << DRIVE_SHIFT) +# define DRIVE_2 (3 << DRIVE_SHIFT) +# define DRIVE_3 (4 << DRIVE_SHIFT) + #define INPUT_PULLUP (INPUT | PULLUP) #define INPUT_PULLDOWN (INPUT | PULLDOWN) #define OUTPUT_OPEN_DRAIN (OUTPUT | OPEN_DRAIN) @@ -136,9 +144,9 @@ extern "C" ****************************************************************************/ #ifdef CONFIG_ESP32_GPIO_IRQ -void esp32_gpioirqinitialize(void); +void esp32_gpioirqinitialize(int c); #else -# define esp32_gpioirqinitialize() +# define esp32_gpioirqinitialize(c) #endif /**************************************************************************** @@ -147,6 +155,18 @@ void esp32_gpioirqinitialize(void); * Description: * Configure a GPIO pin based on encoded pin attributes. * + * Input Parameters: + * pin - GPIO pin to be configured + * attr - Attributes to be configured for the selected GPIO pin. + * The following attributes are accepted: + * - Direction (OUTPUT or INPUT) + * - Pull (PULLUP, PULLDOWN or OPENDRAIN) + * - Function (if not provided, assume function GPIO by default) + * - Drive strength (if not provided, assume DRIVE_2 by default) + * + * Returned Value: + * Zero (OK) on success, or -1 (ERROR) in case of failure. + * ****************************************************************************/ int esp32_configgpio(int pin, gpio_pinattr_t attr); diff --git a/arch/xtensa/src/esp32/esp32_himem.c b/arch/xtensa/src/esp32/esp32_himem.c index 2cff1f98e83..459e9a1c0ce 100644 --- a/arch/xtensa/src/esp32/esp32_himem.c +++ b/arch/xtensa/src/esp32/esp32_himem.c @@ -103,13 +103,13 @@ /* Character driver methods */ -static int himem_open(FAR struct file *filep); -static int himem_close(FAR struct file *filep); -static ssize_t himem_read(FAR struct file *filep, FAR char *buffer, +static int himem_open(struct file *filep); +static int himem_close(struct file *filep); +static ssize_t himem_read(struct file *filep, char *buffer, size_t buflen); -static ssize_t himem_write(FAR struct file *filep, FAR const char *buffer, +static ssize_t himem_write(struct file *filep, const char *buffer, size_t buflen); -static int himem_ioctl(FAR struct file *filep, int cmd, +static int himem_ioctl(struct file *filep, int cmd, unsigned long arg); /* This structure is used only for access control */ @@ -222,7 +222,7 @@ size_t esp_himem_reserved_area_size(void) int esp_himem_init(void) { - FAR struct himem_access_s *priv; + struct himem_access_s *priv; int paddr_start = (4096 * 1024) - (CACHE_BLOCKSIZE * SPIRAM_BANKSWITCH_RESERVE); int paddr_end; @@ -236,7 +236,7 @@ int esp_himem_init(void) /* Allocate a new himem access instance */ - priv = (FAR struct himem_access_s *) + priv = (struct himem_access_s *) kmm_zalloc(sizeof(struct himem_access_s)); if (!priv) @@ -652,7 +652,7 @@ int esp_himem_unmap(esp_himem_rangehandle_t range, void *ptr, * ****************************************************************************/ -static int himem_open(FAR struct file *filep) +static int himem_open(struct file *filep) { return OK; } @@ -665,7 +665,7 @@ static int himem_open(FAR struct file *filep) * ****************************************************************************/ -static int himem_close(FAR struct file *filep) +static int himem_close(struct file *filep) { return OK; } @@ -674,7 +674,7 @@ static int himem_close(FAR struct file *filep) * Name: himem_read ****************************************************************************/ -static ssize_t himem_read(FAR struct file *filep, FAR char *buffer, +static ssize_t himem_read(struct file *filep, char *buffer, size_t buflen) { return -ENOSYS; @@ -684,7 +684,7 @@ static ssize_t himem_read(FAR struct file *filep, FAR char *buffer, * Name: himem_write ****************************************************************************/ -static ssize_t himem_write(FAR struct file *filep, FAR const char *buffer, +static ssize_t himem_write(struct file *filep, const char *buffer, size_t buflen) { return -ENOSYS; @@ -694,7 +694,7 @@ static ssize_t himem_write(FAR struct file *filep, FAR const char *buffer, * Name: himem_ioctl ****************************************************************************/ -static int himem_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +static int himem_ioctl(struct file *filep, int cmd, unsigned long arg) { int ret = OK; @@ -704,8 +704,8 @@ static int himem_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case HIMEMIOC_ALLOC_BLOCKS: { - FAR struct esp_himem_par *param = - (FAR struct esp_himem_par *)((uintptr_t)arg); + struct esp_himem_par *param = + (struct esp_himem_par *)((uintptr_t)arg); DEBUGASSERT(param != NULL); @@ -724,8 +724,8 @@ static int himem_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case HIMEMIOC_FREE_BLOCKS: { - FAR struct esp_himem_par *param = - (FAR struct esp_himem_par *)((uintptr_t)arg); + struct esp_himem_par *param = + (struct esp_himem_par *)((uintptr_t)arg); DEBUGASSERT(param != NULL); @@ -742,8 +742,8 @@ static int himem_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case HIMEMIOC_ALLOC_MAP_RANGE: { - FAR struct esp_himem_par *param = - (FAR struct esp_himem_par *)((uintptr_t)arg); + struct esp_himem_par *param = + (struct esp_himem_par *)((uintptr_t)arg); DEBUGASSERT(param != NULL); @@ -762,8 +762,8 @@ static int himem_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case HIMEMIOC_FREE_MAP_RANGE: { - FAR struct esp_himem_par *param = - (FAR struct esp_himem_par *)((uintptr_t)arg); + struct esp_himem_par *param = + (struct esp_himem_par *)((uintptr_t)arg); DEBUGASSERT(param != NULL); @@ -780,8 +780,8 @@ static int himem_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case HIMEMIOC_MAP: { - FAR struct esp_himem_par *param = - (FAR struct esp_himem_par *)((uintptr_t)arg); + struct esp_himem_par *param = + (struct esp_himem_par *)((uintptr_t)arg); DEBUGASSERT(param != NULL); @@ -804,8 +804,8 @@ static int himem_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case HIMEMIOC_UNMAP: { - FAR struct esp_himem_par *param = - (FAR struct esp_himem_par *)((uintptr_t)arg); + struct esp_himem_par *param = + (struct esp_himem_par *)((uintptr_t)arg); DEBUGASSERT(param != NULL); @@ -824,8 +824,8 @@ static int himem_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case HIMEMIOC_GET_PHYS_SIZE: { - FAR struct esp_himem_par *param = - (FAR struct esp_himem_par *)((uintptr_t)arg); + struct esp_himem_par *param = + (struct esp_himem_par *)((uintptr_t)arg); DEBUGASSERT(param != NULL); @@ -837,8 +837,8 @@ static int himem_ioctl(FAR struct file *filep, int cmd, unsigned long arg) case HIMEMIOC_GET_FREE_SIZE: { - FAR struct esp_himem_par *param = - (FAR struct esp_himem_par *)((uintptr_t)arg); + struct esp_himem_par *param = + (struct esp_himem_par *)((uintptr_t)arg); DEBUGASSERT(param != NULL); diff --git a/arch/xtensa/src/esp32/esp32_himem.h b/arch/xtensa/src/esp32/esp32_himem.h index baf776fe047..1f29c511543 100644 --- a/arch/xtensa/src/esp32/esp32_himem.h +++ b/arch/xtensa/src/esp32/esp32_himem.h @@ -32,12 +32,20 @@ extern "C" { #endif +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + /* Indicates that a mapping will only be read from. Note that this is unused * for now. */ #define ESP_HIMEM_MAPFLAG_RO 1 +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ + /* Allocate a block in high memory * * params: diff --git a/arch/xtensa/src/esp32/esp32_i2c.c b/arch/xtensa/src/esp32/esp32_i2c.c index 28ecac715af..34d4e8e471e 100644 --- a/arch/xtensa/src/esp32/esp32_i2c.c +++ b/arch/xtensa/src/esp32/esp32_i2c.c @@ -47,7 +47,7 @@ #include "esp32_i2c.h" #include "esp32_gpio.h" -#include "esp32_cpuint.h" +#include "esp32_irq.h" #include "xtensa.h" #include "hardware/esp32_gpio_sigmap.h" @@ -172,7 +172,6 @@ struct esp32_i2c_config_s uint8_t sda_pin; /* GPIO configuration for SDA as SDA */ #ifndef CONFIG_I2C_POLLED - uint8_t cpu; /* CPU ID */ uint8_t periph; /* Peripheral ID */ uint8_t irq; /* Interrupt ID */ #endif @@ -201,6 +200,8 @@ struct esp32_i2c_priv_s #ifndef CONFIG_I2C_POLLED sem_t sem_isr; /* Interrupt wait semaphore */ + int cpuint; /* CPU interrupt assigned to this I2C */ + uint8_t cpu; /* CPU ID */ #endif /* I2C work state (see enum esp32_i2cstate_e) */ @@ -212,10 +213,6 @@ struct esp32_i2c_priv_s uint8_t msgid; /* Current message ID */ ssize_t bytes; /* Processed data bytes */ -#ifndef CONFIG_I2C_POLLED - int cpuint; /* CPU interrupt assigned to this I2C */ -#endif - uint32_t error; /* I2C transform error */ bool ready_read; /* If I2C has read data */ @@ -238,20 +235,20 @@ struct esp32_i2c_priv_s * Private Function Prototypes ****************************************************************************/ -static void esp32_i2c_init_clock(FAR struct esp32_i2c_priv_s *priv, +static void esp32_i2c_init_clock(struct esp32_i2c_priv_s *priv, uint32_t clock); -static void esp32_i2c_init(FAR struct esp32_i2c_priv_s *priv); -static void esp32_i2c_deinit(FAR struct esp32_i2c_priv_s *priv); -static int esp32_i2c_transfer(FAR struct i2c_master_s *dev, - FAR struct i2c_msg_s *msgs, +static void esp32_i2c_init(struct esp32_i2c_priv_s *priv); +static void esp32_i2c_deinit(struct esp32_i2c_priv_s *priv); +static int esp32_i2c_transfer(struct i2c_master_s *dev, + struct i2c_msg_s *msgs, int count); static inline void esp32_i2c_process(struct esp32_i2c_priv_s *priv, uint32_t status); #ifdef CONFIG_I2C_POLLED -static int esp32_i2c_polling_waitdone(FAR struct esp32_i2c_priv_s *priv); +static int esp32_i2c_polling_waitdone(struct esp32_i2c_priv_s *priv); #endif #ifdef CONFIG_I2C_RESET -static int esp32_i2c_reset(FAR struct i2c_master_s *dev); +static int esp32_i2c_reset(struct i2c_master_s *dev); #endif #ifdef CONFIG_I2C_TRACE @@ -289,7 +286,6 @@ static const struct esp32_i2c_config_s esp32_i2c0_config = .scl_pin = CONFIG_ESP32_I2C0_SCLPIN, .sda_pin = CONFIG_ESP32_I2C0_SDAPIN, #ifndef CONFIG_I2C_POLLED - .cpu = 0, .periph = ESP32_PERIPH_I2C_EXT0, .irq = ESP32_IRQ_I2C_EXT0, #endif @@ -322,7 +318,6 @@ static const struct esp32_i2c_config_s esp32_i2c1_config = .scl_pin = CONFIG_ESP32_I2C1_SCLPIN, .sda_pin = CONFIG_ESP32_I2C1_SDAPIN, #ifndef CONFIG_I2C_POLLED - .cpu = 0, .periph = ESP32_PERIPH_I2C_EXT1, .irq = ESP32_IRQ_I2C_EXT1, #endif @@ -421,7 +416,7 @@ static inline void esp32_i2c_reset_reg_bits(struct esp32_i2c_priv_s *priv, * ****************************************************************************/ -static void esp32_i2c_reset_fifo(FAR struct esp32_i2c_priv_s *priv) +static void esp32_i2c_reset_fifo(struct esp32_i2c_priv_s *priv) { esp32_i2c_set_reg_bits(priv, I2C_FIFO_CONF_OFFSET, I2C_TX_FIFO_RST); esp32_i2c_reset_reg_bits(priv, I2C_FIFO_CONF_OFFSET, I2C_TX_FIFO_RST); @@ -438,7 +433,7 @@ static void esp32_i2c_reset_fifo(FAR struct esp32_i2c_priv_s *priv) * ****************************************************************************/ -static void esp32_i2c_sendstart(FAR struct esp32_i2c_priv_s *priv) +static void esp32_i2c_sendstart(struct esp32_i2c_priv_s *priv) { struct i2c_msg_s *msg = &priv->msgv[priv->msgid]; @@ -476,7 +471,7 @@ static void esp32_i2c_sendstart(FAR struct esp32_i2c_priv_s *priv) * ****************************************************************************/ -static void esp32_i2c_senddata(FAR struct esp32_i2c_priv_s *priv) +static void esp32_i2c_senddata(struct esp32_i2c_priv_s *priv) { int i; struct i2c_msg_s *msg = &priv->msgv[priv->msgid]; @@ -493,7 +488,7 @@ static void esp32_i2c_senddata(FAR struct esp32_i2c_priv_s *priv) /* Transfer the data from the msg buffer to the TX FIFO */ - for (i = 0; i < n; i ++) + for (i = 0; i < n; i++) { esp32_i2c_set_reg(priv, I2C_DATA_OFFSET, msg->buffer[priv->bytes + i]); @@ -605,7 +600,7 @@ static void esp32_i2c_sendstop(struct esp32_i2c_priv_s *priv) * ****************************************************************************/ -static void esp32_i2c_init_clock(FAR struct esp32_i2c_priv_s *priv, +static void esp32_i2c_init_clock(struct esp32_i2c_priv_s *priv, uint32_t clk_freq) { uint32_t half_cycles = APB_CLK_FREQ / clk_freq / 2; @@ -637,7 +632,7 @@ static void esp32_i2c_init_clock(FAR struct esp32_i2c_priv_s *priv, * ****************************************************************************/ -static void esp32_i2c_init(FAR struct esp32_i2c_priv_s *priv) +static void esp32_i2c_init(struct esp32_i2c_priv_s *priv) { const struct esp32_i2c_config_s *config = priv->config; @@ -687,7 +682,7 @@ static void esp32_i2c_init(FAR struct esp32_i2c_priv_s *priv) * ****************************************************************************/ -static void esp32_i2c_deinit(FAR struct esp32_i2c_priv_s *priv) +static void esp32_i2c_deinit(struct esp32_i2c_priv_s *priv) { const struct esp32_i2c_config_s *config = priv->config; @@ -705,7 +700,7 @@ static void esp32_i2c_deinit(FAR struct esp32_i2c_priv_s *priv) * ****************************************************************************/ -static void esp32_i2c_reset_fsmc(FAR struct esp32_i2c_priv_s *priv) +static void esp32_i2c_reset_fsmc(struct esp32_i2c_priv_s *priv) { esp32_i2c_deinit(priv); esp32_i2c_init(priv); @@ -723,7 +718,7 @@ static void esp32_i2c_reset_fsmc(FAR struct esp32_i2c_priv_s *priv) * priv - Pointer to the internal driver state structure. ****************************************************************************/ #ifndef CONFIG_I2C_POLLED -static int esp32_i2c_sem_waitdone(FAR struct esp32_i2c_priv_s *priv) +static int esp32_i2c_sem_waitdone(struct esp32_i2c_priv_s *priv) { int ret; struct timespec abstime; @@ -732,8 +727,18 @@ static int esp32_i2c_sem_waitdone(FAR struct esp32_i2c_priv_s *priv) clock_gettime(CLOCK_REALTIME, &abstime); - abstime.tv_sec += 10; - abstime.tv_nsec += 0; +#if CONFIG_ESP32_I2CTIMEOSEC > 0 + abstime.tv_sec += CONFIG_ESP32_I2CTIMEOSEC; +#endif + +#if CONFIG_ESP32_I2CTIMEOMS > 0 + abstime.tv_nsec += CONFIG_ESP32_I2CTIMEOMS * NSEC_PER_MSEC; + if (abstime.tv_nsec >= 1000 * NSEC_PER_MSEC) + { + abstime.tv_sec++; + abstime.tv_nsec -= 1000 * NSEC_PER_MSEC; + } +#endif /* Wait on ISR semaphore */ @@ -761,7 +766,7 @@ static int esp32_i2c_sem_waitdone(FAR struct esp32_i2c_priv_s *priv) * ****************************************************************************/ #ifdef CONFIG_I2C_POLLED -static int esp32_i2c_polling_waitdone(FAR struct esp32_i2c_priv_s *priv) +static int esp32_i2c_polling_waitdone(struct esp32_i2c_priv_s *priv) { int ret; struct timespec current_time; @@ -864,7 +869,7 @@ static int esp32_i2c_polling_waitdone(FAR struct esp32_i2c_priv_s *priv) * ****************************************************************************/ -static int esp32_i2c_sem_wait(FAR struct esp32_i2c_priv_s *priv) +static int esp32_i2c_sem_wait(struct esp32_i2c_priv_s *priv) { return nxsem_wait_uninterruptible(&priv->sem_excl); } @@ -890,7 +895,7 @@ static void esp32_i2c_sem_post(struct esp32_i2c_priv_s *priv) * ****************************************************************************/ -static void esp32_i2c_sem_destroy(FAR struct esp32_i2c_priv_s *priv) +static void esp32_i2c_sem_destroy(struct esp32_i2c_priv_s *priv) { nxsem_destroy(&priv->sem_excl); #ifndef CONFIG_I2C_POLLED @@ -906,7 +911,7 @@ static void esp32_i2c_sem_destroy(FAR struct esp32_i2c_priv_s *priv) * ****************************************************************************/ -static inline void esp32_i2c_sem_init(FAR struct esp32_i2c_priv_s *priv) +static inline void esp32_i2c_sem_init(struct esp32_i2c_priv_s *priv) { nxsem_init(&priv->sem_excl, 0, 1); @@ -932,13 +937,13 @@ static inline void esp32_i2c_sem_init(FAR struct esp32_i2c_priv_s *priv) * ****************************************************************************/ -static int esp32_i2c_transfer(FAR struct i2c_master_s *dev, - FAR struct i2c_msg_s *msgs, +static int esp32_i2c_transfer(struct i2c_master_s *dev, + struct i2c_msg_s *msgs, int count) { int i; int ret = OK; - FAR struct esp32_i2c_priv_s *priv = (FAR struct esp32_i2c_priv_s *)dev; + struct esp32_i2c_priv_s *priv = (struct esp32_i2c_priv_s *)dev; DEBUGASSERT(count > 0); @@ -1158,10 +1163,10 @@ out: ****************************************************************************/ #ifdef CONFIG_I2C_RESET -static int esp32_i2c_reset(FAR struct i2c_master_s *dev) +static int esp32_i2c_reset(struct i2c_master_s *dev) { irqstate_t flags; - FAR struct esp32_i2c_priv_s *priv = (FAR struct esp32_i2c_priv_s *)dev; + struct esp32_i2c_priv_s *priv = (struct esp32_i2c_priv_s *)dev; DEBUGASSERT(dev); @@ -1375,7 +1380,7 @@ static void esp32_i2c_tracedump(struct esp32_i2c_priv_s *priv) ****************************************************************************/ #ifndef CONFIG_I2C_POLLED -static int esp32_i2c_irq(int cpuint, void *context, FAR void *arg) +static int esp32_i2c_irq(int cpuint, void *context, void *arg) { struct esp32_i2c_priv_s *priv = (struct esp32_i2c_priv_s *)arg; @@ -1523,7 +1528,7 @@ static inline void esp32_i2c_process(struct esp32_i2c_priv_s *priv, * ****************************************************************************/ -FAR struct i2c_master_s *esp32_i2cbus_initialize(int port) +struct i2c_master_s *esp32_i2cbus_initialize(int port) { irqstate_t flags; struct esp32_i2c_priv_s *priv; @@ -1559,7 +1564,12 @@ FAR struct i2c_master_s *esp32_i2cbus_initialize(int port) #ifndef CONFIG_I2C_POLLED config = priv->config; - priv->cpuint = esp32_alloc_levelint(1); + + /* Set up to receive peripheral interrupts on the current CPU */ + + priv->cpu = up_cpu_index(); + priv->cpuint = esp32_setup_irq(priv->cpu, config->periph, + 1, ESP32_CPUINT_LEVEL); if (priv->cpuint < 0) { /* Failed to allocate a CPU interrupt of this type */ @@ -1569,21 +1579,17 @@ FAR struct i2c_master_s *esp32_i2cbus_initialize(int port) return NULL; } - up_disable_irq(priv->cpuint); - esp32_attach_peripheral(config->cpu, config->periph, priv->cpuint); - ret = irq_attach(config->irq, esp32_i2c_irq, priv); if (ret != OK) { - esp32_detach_peripheral(config->cpu, config->periph, priv->cpuint); - esp32_free_cpuint(priv->cpuint); + esp32_teardown_irq(priv->cpu, config->periph, priv->cpuint); leave_critical_section(flags); return NULL; } - up_enable_irq(priv->cpuint); + up_enable_irq(config->irq); #endif esp32_i2c_sem_init(priv); @@ -1592,7 +1598,7 @@ FAR struct i2c_master_s *esp32_i2cbus_initialize(int port) leave_critical_section(flags); - return (FAR struct i2c_master_s *)priv; + return (struct i2c_master_s *)priv; } /**************************************************************************** @@ -1603,10 +1609,10 @@ FAR struct i2c_master_s *esp32_i2cbus_initialize(int port) * ****************************************************************************/ -int esp32_i2cbus_uninitialize(FAR struct i2c_master_s *dev) +int esp32_i2cbus_uninitialize(struct i2c_master_s *dev) { irqstate_t flags; - FAR struct esp32_i2c_priv_s *priv = (FAR struct esp32_i2c_priv_s *)dev; + struct esp32_i2c_priv_s *priv = (struct esp32_i2c_priv_s *)dev; DEBUGASSERT(dev); @@ -1626,11 +1632,8 @@ int esp32_i2cbus_uninitialize(FAR struct i2c_master_s *dev) leave_critical_section(flags); #ifndef CONFIG_I2C_POLLED - up_disable_irq(priv->cpuint); - esp32_detach_peripheral(priv->config->cpu, - priv->config->periph, - priv->cpuint); - esp32_free_cpuint(priv->cpuint); + up_disable_irq(priv->config->irq); + esp32_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint); #endif esp32_i2c_deinit(priv); diff --git a/arch/xtensa/src/esp32/esp32_i2c.h b/arch/xtensa/src/esp32/esp32_i2c.h index 6dbf1af7c15..6e0e46cbd67 100644 --- a/arch/xtensa/src/esp32/esp32_i2c.h +++ b/arch/xtensa/src/esp32/esp32_i2c.h @@ -64,7 +64,7 @@ extern "C" * ****************************************************************************/ -FAR struct i2c_master_s *esp32_i2cbus_initialize(int port); +struct i2c_master_s *esp32_i2cbus_initialize(int port); /**************************************************************************** * Name: esp32_i2cbus_uninitialize @@ -81,7 +81,7 @@ FAR struct i2c_master_s *esp32_i2cbus_initialize(int port); * ****************************************************************************/ -int esp32_i2cbus_uninitialize(FAR struct i2c_master_s *dev); +int esp32_i2cbus_uninitialize(struct i2c_master_s *dev); #ifdef __cplusplus } diff --git a/arch/xtensa/src/esp32/esp32_imm.c b/arch/xtensa/src/esp32/esp32_imm.c index 263ea535068..93f521eaba4 100644 --- a/arch/xtensa/src/esp32/esp32_imm.c +++ b/arch/xtensa/src/esp32/esp32_imm.c @@ -41,7 +41,7 @@ * Private Data ****************************************************************************/ -FAR struct mm_heap_s *g_iheap; +struct mm_heap_s *g_iheap; /**************************************************************************** * Public Functions @@ -60,7 +60,7 @@ void xtensa_imm_initialize(void) void *start; size_t size; - start = (FAR void *)ESP32_IMEM_START; + start = (void *)ESP32_IMEM_START; size = CONFIG_XTENSA_IMEM_REGION_SIZE; g_iheap = mm_initialize("esp32-imem", start, size); } @@ -126,7 +126,7 @@ void *xtensa_imm_zalloc(size_t size) * ****************************************************************************/ -void xtensa_imm_free(FAR void *mem) +void xtensa_imm_free(void *mem) { mm_free(g_iheap, mem); } @@ -163,7 +163,7 @@ void *xtensa_imm_memalign(size_t alignment, size_t size) * ****************************************************************************/ -bool xtensa_imm_heapmember(FAR void *mem) +bool xtensa_imm_heapmember(void *mem) { return mm_heapmember(g_iheap, mem); } @@ -177,7 +177,7 @@ bool xtensa_imm_heapmember(FAR void *mem) * ****************************************************************************/ -int xtensa_imm_mallinfo(FAR struct mallinfo *info) +int xtensa_imm_mallinfo(struct mallinfo *info) { return mm_mallinfo(g_iheap, info); } diff --git a/arch/xtensa/src/esp32/esp32_intdecode.c b/arch/xtensa/src/esp32/esp32_intdecode.c deleted file mode 100644 index 36dcc4c0446..00000000000 --- a/arch/xtensa/src/esp32/esp32_intdecode.c +++ /dev/null @@ -1,137 +0,0 @@ -/**************************************************************************** - * arch/xtensa/src/esp32/esp32_intdecode.c - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include - -#include -#include - -#include "xtensa.h" -#include "esp32_cpuint.h" - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: xtensa_intclear - ****************************************************************************/ - -static inline void xtensa_intclear(uint32_t mask) -{ - __asm__ __volatile__ - ( - "wsr %0, INTCLEAR\n" - : "=r"(mask) : : - ); -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: xtensa_int_decode - * - * Description: - * Determine the peripheral that generated the interrupt and dispatch - * handling to the registered interrupt handler via xtensa_irq_dispatch(). - * - * Input Parameters: - * cpuints - Set of pending interrupts valid for this level - * regs - Saves processor state on the stack - * - * Returned Value: - * Normally the same value as regs is returned. But, in the event of an - * interrupt level context switch, the returned value will, instead point - * to the saved processor state in the TCB of the newly started task. - * - ****************************************************************************/ - -uint32_t *xtensa_int_decode(uint32_t cpuints, uint32_t *regs) -{ - uint8_t *intmap; - uint32_t mask; - int bit; -#ifdef CONFIG_SMP - int cpu; -#endif - -#ifdef CONFIG_SMP - /* Select PRO or APP CPU interrupt mapping table */ - - cpu = up_cpu_index(); - if (cpu != 0) - { - intmap = g_cpu1_intmap; - } - else -#endif - { - intmap = g_cpu0_intmap; - } - - /* Skip over zero bits, eight at a time */ - - for (bit = 0, mask = 0xff; - bit < ESP32_NCPUINTS && (cpuints & mask) == 0; - bit += 8, mask <<= 8); - - /* Process each pending CPU interrupt */ - - for (; bit < ESP32_NCPUINTS && cpuints != 0; bit++) - { - mask = (1 << bit); - if ((cpuints & mask) != 0) - { - /* Extract the IRQ number from the mapping table */ - - uint8_t irq = intmap[bit]; - DEBUGASSERT(irq != CPUINT_UNASSIGNED); - - /* Clear software or edge-triggered interrupt */ - - xtensa_intclear(mask); - - /* Dispatch the CPU interrupt. - * - * NOTE that regs may be altered in the case of an interrupt - * level context switch. - */ - - regs = xtensa_irq_dispatch((int)irq, regs); - - /* Clear the bit in the pending interrupt so that perhaps - * we can exit the look early. - */ - - cpuints &= ~mask; - } - } - - return regs; -} diff --git a/arch/xtensa/src/esp32/esp32_intercpu_interrupt.c b/arch/xtensa/src/esp32/esp32_intercpu_interrupt.c index c2b5d69e7ed..09b2d216465 100644 --- a/arch/xtensa/src/esp32/esp32_intercpu_interrupt.c +++ b/arch/xtensa/src/esp32/esp32_intercpu_interrupt.c @@ -80,12 +80,12 @@ static int esp32_fromcpu_interrupt(int fromcpu) * ****************************************************************************/ -int esp32_fromcpu0_interrupt(int irq, FAR void *context, FAR void *arg) +int esp32_fromcpu0_interrupt(int irq, void *context, void *arg) { return esp32_fromcpu_interrupt(0); } -int esp32_fromcpu1_interrupt(int irq, FAR void *context, FAR void *arg) +int esp32_fromcpu1_interrupt(int irq, void *context, void *arg) { return esp32_fromcpu_interrupt(1); } diff --git a/arch/xtensa/src/esp32/esp32_irq.c b/arch/xtensa/src/esp32/esp32_irq.c index 617f7160017..bb3f1376734 100644 --- a/arch/xtensa/src/esp32/esp32_irq.c +++ b/arch/xtensa/src/esp32/esp32_irq.c @@ -25,7 +25,9 @@ #include #include +#include #include +#include #include #include @@ -33,10 +35,14 @@ #include #include "xtensa.h" -#include "esp32_cpuint.h" + +#include "hardware/esp32_dport.h" + #include "esp32_smp.h" #include "esp32_gpio.h" +#include "esp32_irq.h" + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -47,6 +53,55 @@ # define INTSTACK_ALLOC (CONFIG_SMP_NCPUS * INTSTACK_SIZE) #endif +/* IRQ to CPU and CPU interrupts mapping: + * + * Encoding: CIIIIIII + * C: CPU that enabled the interrupt (0 = PRO, 1 = APP). + * I: Associated CPU interrupt. + */ + +#define IRQ_UNMAPPED 0xff +#define IRQ_GETCPU(m) (((m) & 0x80) >> 0x07) +#define IRQ_GETCPUINT(m) ((m) & 0x7f) +#define IRQ_MKMAP(c, i) (((c) << 0x07) | (i)) + +/* CPU interrupts to peripheral mapping: + * + * Encoding: EPPPPPPP + * E: CPU interrupt status (0 = Disabled, 1 = Enabled). + * P: Attached peripheral. + */ + +#define CPUINT_UNASSIGNED 0x7f +#define CPUINT_GETEN(m) (((m) & 0x80) >> 0x07) +#define CPUINT_GETIRQ(m) ((m) & 0x7f) +#define CPUINT_ASSIGN(c) (((c) & 0x7f) | 0x80) +#define CPUINT_DISABLE(m) ((m) & 0x7f) +#define CPUINT_ENABLE(m) ((m) | 0x80) + +/* Mapping Peripheral IDs to map register addresses. */ + +#define DPORT_PRO_MAP_REGADDR(n) (DR_REG_DPORT_BASE + 0x104 + ((n) << 2)) +#define DPORT_APP_MAP_REGADDR(n) (DR_REG_DPORT_BASE + 0x218 + ((n) << 2)) + +/* CPU interrupts can be detached from any peripheral source by setting the + * map register to an internal CPU interrupt (6, 7, 11, 15, 16, or 29). + */ + +#define NO_CPUINT ESP32_CPUINT_TIMER0 + +/* Priority range is 1-5 */ + +#define ESP32_MIN_PRIORITY 1 +#define ESP32_MAX_PRIORITY 5 +#define ESP32_PRIO_INDEX(p) ((p) - ESP32_MIN_PRIORITY) + +#ifdef CONFIG_ESP32_WIRELESS +# define ESP32_WIRELESS_RESERVE_INT (1 << ESP32_CPUINT_MAC) +#else +# define ESP32_WIRELESS_RESERVE_INT 0 +#endif + /**************************************************************************** * Public Data ****************************************************************************/ @@ -88,6 +143,51 @@ uintptr_t g_cpu_intstack_top[CONFIG_SMP_NCPUS] = }; #endif /* defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 15 */ +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Maps a CPU interrupt to the IRQ of the attached peripheral interrupt */ + +static uint8_t g_cpu0_intmap[ESP32_NCPUINTS]; +#ifdef CONFIG_SMP +static uint8_t g_cpu1_intmap[ESP32_NCPUINTS]; +#endif + +static volatile uint8_t g_irqmap[NR_IRQS]; + +/* g_intenable[] is a shadow copy of the per-CPU INTENABLE register + * content. + */ + +#ifdef CONFIG_SMP +static uint32_t g_intenable[CONFIG_SMP_NCPUS]; +#else +static uint32_t g_intenable[1]; +#endif + +/* Bitsets for free, unallocated CPU interrupts available to peripheral + * devices. + */ + +static uint32_t g_cpu0_freeints = ESP32_CPUINT_PERIPHSET & + (~ESP32_WIRELESS_RESERVE_INT); +#ifdef CONFIG_SMP +static uint32_t g_cpu1_freeints = ESP32_CPUINT_PERIPHSET & + (~ESP32_WIRELESS_RESERVE_INT); +#endif + +/* Bitsets for each interrupt priority 1-5 */ + +static const uint32_t g_priority[5] = +{ + ESP32_INTPRI1_MASK, + ESP32_INTPRI2_MASK, + ESP32_INTPRI3_MASK, + ESP32_INTPRI4_MASK, + ESP32_INTPRI5_MASK +}; + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -122,15 +222,10 @@ static inline void xtensa_attach_fromcpu1_interrupt(void) { int cpuint; - /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */ - - cpuint = esp32_alloc_levelint(1); - DEBUGASSERT(cpuint >= 0); - /* Connect all CPU peripheral source to allocated CPU interrupt */ - up_disable_irq(cpuint); - esp32_attach_peripheral(0, ESP32_PERIPH_CPU_CPU1, cpuint); + cpuint = esp32_setup_irq(0, ESP32_PERIPH_CPU_CPU1, 1, ESP32_CPUINT_LEVEL); + DEBUGASSERT(cpuint >= 0); /* Attach the inter-CPU interrupt. */ @@ -138,10 +233,213 @@ static inline void xtensa_attach_fromcpu1_interrupt(void) /* Enable the inter 0 CPU interrupt. */ - up_enable_irq(cpuint); + up_enable_irq(ESP32_IRQ_CPU_CPU1); } #endif +/**************************************************************************** + * Name: esp32_intinfo + * + * Description: + * Return the CPU interrupt map of the given CPU and the register map + * of the given peripheral. + * + ****************************************************************************/ + +static void esp32_intinfo(int cpu, int periphid, + uintptr_t *regaddr, uint8_t **intmap) +{ +#ifdef CONFIG_SMP + DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS); + + if (cpu != 0) + { + *regaddr = DPORT_APP_MAP_REGADDR(periphid); + *intmap = g_cpu1_intmap; + } + else +#endif + { + *regaddr = DPORT_PRO_MAP_REGADDR(periphid); + *intmap = g_cpu0_intmap; + } +} + +/**************************************************************************** + * Name: esp32_getcpuint + * + * Description: + * Get a free CPU interrupt for a peripheral device. This function will + * not ignore all of the pre-allocated CPU interrupts for internal + * devices. + * + * Input Parameters: + * intmask - mask of candidate CPU interrupts. The CPU interrupt will be + * be allocated from free interrupts within this set + * + * Returned Value: + * On success, a CPU interrupt number is returned. + * A negated errno is returned on failure. + * + ****************************************************************************/ + +static int esp32_getcpuint(uint32_t intmask) +{ + uint32_t *freeints; + uint32_t bitmask; + uint32_t intset; + int cpuint; + int ret = -ENOMEM; + int cpu = 0; + + /* Check if there are CPU interrupts with the requested properties + * available. + */ + + cpu = up_cpu_index(); +#ifdef CONFIG_SMP + if (cpu != 0) + { + freeints = &g_cpu1_freeints; + } + else +#endif + { + freeints = &g_cpu0_freeints; + } + + intset = *freeints & intmask; + if (intset != 0) + { + /* Skip over initial unavailable CPU interrupts quickly in groups + * of 8 interrupt. + */ + + for (cpuint = 0, bitmask = 0xff; + cpuint <= ESP32_CPUINT_MAX && (intset & bitmask) == 0; + cpuint += 8, bitmask <<= 8); + + /* Search for an unallocated CPU interrupt number in the remaining + * intset. + */ + + for (; cpuint <= ESP32_CPUINT_MAX; cpuint++) + { + /* If the bit corresponding to the CPU interrupt is '1', then + * that CPU interrupt is available. + */ + + bitmask = (1ul << cpuint); + if ((intset & bitmask) != 0) + { + /* Got it! */ + + *freeints &= ~bitmask; + ret = cpuint; + break; + } + } + } + + /* Enable the CPU interrupt now. The interrupt is still not attached + * to any peripheral and thus has no effect. + */ + + if (ret >= 0) + { + xtensa_enable_cpuint(&g_intenable[cpu], (1ul << ret)); + } + + return ret; +} + +/**************************************************************************** + * Name: esp32_alloc_cpuint + * + * Description: + * Allocate a level CPU interrupt + * + * Input Parameters: + * priority - Priority of the CPU interrupt (1-5) + * type - Interrupt type (level or edge). + * + * Returned Value: + * On success, the allocated CPU interrupt number is returned. + * A negated errno is returned on failure. The only possible failure + * is that all CPU interrupts of the requested type have already been + * allocated. + * + ****************************************************************************/ + +static int esp32_alloc_cpuint(int priority, int type) +{ + uint32_t mask; + + DEBUGASSERT(priority >= ESP32_MIN_PRIORITY && + priority <= ESP32_MAX_PRIORITY); + DEBUGASSERT(type == ESP32_CPUINT_LEVEL || + type == ESP32_CPUINT_EDGE); + + if (type == ESP32_CPUINT_LEVEL) + { + /* Check if there are any level CPU interrupts available at the + * requested interrupt priority. + */ + + mask = g_priority[ESP32_PRIO_INDEX(priority)] & ESP32_CPUINT_LEVELSET; + } + else + { + /* Check if there are any edge CPU interrupts available at the + * requested interrupt priority. + */ + + mask = g_priority[ESP32_PRIO_INDEX(priority)] & ESP32_CPUINT_EDGESET; + } + + return esp32_getcpuint(mask); +} + +/**************************************************************************** + * Name: esp32_free_cpuint + * + * Description: + * Free a previously allocated CPU interrupt + * + * Input Parameters: + * The CPU interrupt number to be freed + * + * Returned Value: + * None + * + ****************************************************************************/ + +static void esp32_free_cpuint(int cpuint) +{ + uint32_t *freeints; + uint32_t bitmask; + + DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX); + + /* Mark the CPU interrupt as available */ + + bitmask = (1ul << cpuint); + +#ifdef CONFIG_SMP + if (up_cpu_index() != 0) + { + freeints = &g_cpu1_freeints; + } + else +#endif + { + freeints = &g_cpu0_freeints; + } + + DEBUGASSERT((*freeints & bitmask) == 0); + *freeints |= bitmask; +} + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -152,6 +450,20 @@ static inline void xtensa_attach_fromcpu1_interrupt(void) void up_irqinitialize(void) { + int i; + for (i = 0; i < NR_IRQS; i++) + { + g_irqmap[i] = IRQ_UNMAPPED; + } + + /* Hard code special cases. */ + + g_irqmap[XTENSA_IRQ_TIMER0] = IRQ_MKMAP(0, ESP32_CPUINT_TIMER0); + +#ifdef CONFIG_ESP32_WIRELESS + g_irqmap[ESP32_IRQ_MAC] = IRQ_MKMAP(0, ESP32_CPUINT_MAC); +#endif + /* Initialize CPU interrupts */ esp32_cpuint_initialize(); @@ -169,7 +481,7 @@ void up_irqinitialize(void) #ifdef CONFIG_ESP32_GPIO_IRQ /* Initialize GPIO interrupt support */ - esp32_gpioirqinitialize(); + esp32_gpioirqinitialize(0); #endif #ifndef CONFIG_SUPPRESS_INTERRUPTS @@ -179,6 +491,134 @@ void up_irqinitialize(void) #endif } +/**************************************************************************** + * Name: up_disable_irq + * + * Description: + * Disable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_disable_irq(int irq) +{ + int cpu = IRQ_GETCPU(g_irqmap[irq]); + int cpuint = IRQ_GETCPUINT(g_irqmap[irq]); + + if (g_irqmap[irq] == IRQ_UNMAPPED) + { + /* This interrupt is already disabled. */ + + return; + } + + DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX); +#ifdef CONFIG_SMP + DEBUGASSERT(cpu >= 0 && cpu <= CONFIG_SMP_NCPUS); +#else + DEBUGASSERT(cpu == 0); +#endif + + if (irq < XTENSA_NIRQ_INTERNAL) + { + /* This is an internal CPU interrupt, it cannot be disabled using + * the Interrupt Matrix. + */ + +#ifdef CONFIG_SMP + int me = up_cpu_index(); + if (me != cpu) + { + /* It was the other CPU that enabled this interrupt. */ + + return; + } +#endif + + xtensa_disable_cpuint(&g_intenable[cpu], (1ul << cpuint)); + } + else + { + /* A peripheral interrupt, use the Interrupt Matrix to disable it. */ + + int periph = ESP32_IRQ2PERIPH(irq); + uintptr_t regaddr; + uint8_t *intmap; + +#ifdef CONFIG_ESP32_GPIO_IRQ +#ifdef CONFIG_SMP + /* The APP's CPU GPIO is a special case. See esp32/irq.h */ + + if (periph == ESP32_IRQ_APPCPU_GPIO) + { + periph = ESP32_IRQ_CPU_GPIO; + } +#endif +#endif + + DEBUGASSERT(periph >= 0 && periph < ESP32_NPERIPHERALS); + esp32_intinfo(cpu, periph, ®addr, &intmap); + + intmap[cpuint] = CPUINT_DISABLE(intmap[cpuint]); + putreg32(NO_CPUINT, regaddr); + } +} + +/**************************************************************************** + * Name: up_enable_irq + * + * Description: + * Enable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_enable_irq(int irq) +{ + int cpu = IRQ_GETCPU(g_irqmap[irq]); + int cpuint = IRQ_GETCPUINT(g_irqmap[irq]); + + DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX); +#ifdef CONFIG_SMP + DEBUGASSERT(cpu >= 0 && cpu <= CONFIG_SMP_NCPUS); +#else + DEBUGASSERT(cpu == 0); +#endif + + if (irq < XTENSA_NIRQ_INTERNAL) + { + /* Enable the CPU interrupt now for internal CPU. */ + + xtensa_enable_cpuint(&g_intenable[cpu], (1ul << cpuint)); + } + else + { + /* For peripheral interrupts, attach the interrupt to the peripheral; + * the CPU interrupt was already enabled when allocated. + */ + + int periph = ESP32_IRQ2PERIPH(irq); + uintptr_t regaddr; + uint8_t *intmap; + +#ifdef CONFIG_ESP32_GPIO_IRQ +#ifdef CONFIG_SMP + /* The APP's CPU GPIO is a special case. See esp32/irq.h */ + + if (periph == ESP32_IRQ_APPCPU_GPIO) + { + periph = ESP32_IRQ_CPU_GPIO; + } +#endif +#endif + + DEBUGASSERT(periph >= 0 && periph < ESP32_NPERIPHERALS); + + esp32_intinfo(cpu, periph, ®addr, &intmap); + + intmap[cpuint] = CPUINT_ENABLE(intmap[cpuint]); + putreg32(cpuint, regaddr); + } +} + /**************************************************************************** * Name: xtensa_intstack_top * @@ -208,3 +648,302 @@ uintptr_t xtensa_intstack_alloc(void) return g_cpu_intstack_top[up_cpu_index()] - INTSTACK_SIZE; } #endif + +/**************************************************************************** + * Name: esp32_cpuint_initialize + * + * Description: + * Initialize CPU interrupts + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +int esp32_cpuint_initialize(void) +{ + uintptr_t regaddr; + uint8_t *intmap; +#ifdef CONFIG_SMP + int cpu; +#endif + int i; + +#ifdef CONFIG_SMP + /* Which CPU are we initializing */ + + cpu = up_cpu_index(); + DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS); +#endif + + /* Disable all CPU interrupts on this CPU */ + + xtensa_disable_all(); + + /* Detach all peripheral sources PRO CPU interrupts */ + + for (i = 0; i < ESP32_NPERIPHERALS; i++) + { +#ifdef CONFIG_SMP + if (cpu != 0) + { + regaddr = DPORT_APP_MAP_REGADDR(i); + } + else +#endif + { + regaddr = DPORT_PRO_MAP_REGADDR(i); + } + + putreg32(NO_CPUINT, regaddr); + } + + /* Initialize CPU interrupt-to-IRQ mapping table */ + +#ifdef CONFIG_SMP + if (cpu != 0) + { + intmap = g_cpu1_intmap; + } + else +#endif + { + intmap = g_cpu0_intmap; + } + + /* Indicate that no peripheral interrupts are assigned to CPU interrupts */ + + memset(intmap, CPUINT_UNASSIGNED, ESP32_NCPUINTS); + + /* Special case the 6 internal interrupts. + * + * CPU interrupt bit IRQ number + * --------------------------- --------------------- + * ESP32_CPUINT_MAC 0 ESP32_IRQ_MAC 4 + * ESP32_CPUINT_TIMER0 6 XTENSA_IRQ_TIMER0 0 + * ESP32_CPUINT_SOFTWARE0 7 Not yet defined + * ESP32_CPUINT_PROFILING 11 Not yet defined + * ESP32_CPUINT_TIMER1 15 XTENSA_IRQ_TIMER1 1 + * ESP32_CPUINT_TIMER2 16 XTENSA_IRQ_TIMER2 2 + * ESP32_CPUINT_SOFTWARE1 29 Not yet defined + */ + + intmap[ESP32_CPUINT_TIMER0] = CPUINT_ASSIGN(XTENSA_IRQ_TIMER0); + intmap[ESP32_CPUINT_TIMER1] = CPUINT_ASSIGN(XTENSA_IRQ_TIMER1); + intmap[ESP32_CPUINT_TIMER2] = CPUINT_ASSIGN(XTENSA_IRQ_TIMER2); + + /* Reserve CPU interrupt for some special drivers */ + +#ifdef CONFIG_ESP32_WIRELESS + intmap[ESP32_CPUINT_MAC] = CPUINT_ASSIGN(ESP32_IRQ_MAC); + xtensa_enable_cpuint(&g_intenable[0], 1 << ESP32_CPUINT_MAC); +#endif + + return OK; +} + +/**************************************************************************** + * Name: esp32_setup_irq + * + * Description: + * This function sets up the IRQ. It allocates a CPU interrupt of the given + * priority and type and attaches it to the given peripheral. + * + * Input Parameters: + * cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU + * periphid - The peripheral number from irq.h to be assigned to + * a CPU interrupt. + * priority - Interrupt's priority (1 - 5). + * type - Interrupt's type (level or edge). + * + * Returned Value: + * The allocated CPU interrupt on success, a negated errno value on + * failure. + * + ****************************************************************************/ + +int esp32_setup_irq(int cpu, int periphid, int priority, int type) +{ + irqstate_t irqstate; + uintptr_t regaddr; + uint8_t *intmap; + int irq; + int cpuint; + + irqstate = enter_critical_section(); + + /* Setting up an IRQ includes the following steps: + * 1. Allocate a CPU interrupt. + * 2. Attach that CPU interrupt to the peripheral. + * 3. Map the CPU interrupt to the IRQ to ease searching later. + */ + + cpuint = esp32_alloc_cpuint(priority, type); + if (cpuint < 0) + { + irqerr("Unable to allocate CPU interrupt for priority=%d and type=%d", + priority, type); + leave_critical_section(irqstate); + + return cpuint; + } + + irq = ESP32_PERIPH2IRQ(periphid); + + DEBUGASSERT(periphid >= 0 && periphid < ESP32_NPERIPHERALS); + DEBUGASSERT(cpuint >= 0 && cpuint <= ESP32_CPUINT_MAX); + + esp32_intinfo(cpu, periphid, ®addr, &intmap); + + DEBUGASSERT(intmap[cpuint] == CPUINT_UNASSIGNED); + + intmap[cpuint] = CPUINT_ASSIGN(periphid + XTENSA_IRQ_FIRSTPERIPH); + g_irqmap[irq] = IRQ_MKMAP(cpu, cpuint); + + putreg32(cpuint, regaddr); + + leave_critical_section(irqstate); + + return cpuint; +} + +/**************************************************************************** + * Name: esp32_teardown_irq + * + * Description: + * This function undoes the operations done by esp32_setup_irq. + * It detaches a peripheral interrupt from a CPU interrupt and frees the + * CPU interrupt. + * + * Input Parameters: + * cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU + * periphid - The peripheral number from irq.h to be detached from the + * CPU interrupt. + * cpuint - The CPU interrupt from which the peripheral interrupt will + * be detached. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void esp32_teardown_irq(int cpu, int periphid, int cpuint) +{ + irqstate_t irqstate; + uintptr_t regaddr; + uint8_t *intmap; + int irq; + + irqstate = enter_critical_section(); + + /* Tearing down an IRQ includes the following steps: + * 1. Free the previously allocated CPU interrupt. + * 2. Detach the interrupt from the peripheral. + * 3. Unmap the IRQ from the IRQ-to-cpuint map. + */ + + esp32_free_cpuint(cpuint); + + irq = ESP32_PERIPH2IRQ(periphid); + + DEBUGASSERT(periphid >= 0 && periphid < ESP32_NPERIPHERALS); + + esp32_intinfo(cpu, periphid, ®addr, &intmap); + + DEBUGASSERT(intmap[cpuint] != CPUINT_UNASSIGNED); + intmap[cpuint] = CPUINT_UNASSIGNED; + g_irqmap[irq] = IRQ_UNMAPPED; + + putreg32(NO_CPUINT, regaddr); + + leave_critical_section(irqstate); +} + +/**************************************************************************** + * Name: xtensa_int_decode + * + * Description: + * Determine the peripheral that generated the interrupt and dispatch + * handling to the registered interrupt handler via xtensa_irq_dispatch(). + * + * Input Parameters: + * cpuints - Set of pending interrupts valid for this level + * regs - Saves processor state on the stack + * + * Returned Value: + * Normally the same value as regs is returned. But, in the event of an + * interrupt level context switch, the returned value will, instead point + * to the saved processor state in the TCB of the newly started task. + * + ****************************************************************************/ + +uint32_t *xtensa_int_decode(uint32_t cpuints, uint32_t *regs) +{ + uint8_t *intmap; + uint32_t mask; + int bit; +#ifdef CONFIG_SMP + int cpu; +#endif + +#ifdef CONFIG_SMP + /* Select PRO or APP CPU interrupt mapping table */ + + cpu = up_cpu_index(); + if (cpu != 0) + { + intmap = g_cpu1_intmap; + } + else +#endif + { + intmap = g_cpu0_intmap; + } + + /* Skip over zero bits, eight at a time */ + + for (bit = 0, mask = 0xff; + bit < ESP32_NCPUINTS && (cpuints & mask) == 0; + bit += 8, mask <<= 8); + + /* Process each pending CPU interrupt */ + + for (; bit < ESP32_NCPUINTS && cpuints != 0; bit++) + { + mask = (1 << bit); + if ((cpuints & mask) != 0) + { + /* Extract the IRQ number from the mapping table */ + + uint8_t irq = CPUINT_GETIRQ(intmap[bit]); + + DEBUGASSERT(CPUINT_GETEN(intmap[bit])); + DEBUGASSERT(irq != CPUINT_UNASSIGNED); + + /* Clear software or edge-triggered interrupt */ + + xtensa_intclear(mask); + + /* Dispatch the CPU interrupt. + * + * NOTE that regs may be altered in the case of an interrupt + * level context switch. + */ + + regs = xtensa_irq_dispatch((int)irq, regs); + + /* Clear the bit in the pending interrupt so that perhaps + * we can exit the look early. + */ + + cpuints &= ~mask; + } + } + + return regs; +} + diff --git a/arch/xtensa/src/esp32/esp32_irq.h b/arch/xtensa/src/esp32/esp32_irq.h new file mode 100644 index 00000000000..f1141a95c42 --- /dev/null +++ b/arch/xtensa/src/esp32/esp32_irq.h @@ -0,0 +1,123 @@ +/**************************************************************************** + * arch/xtensa/src/esp32/esp32_irq.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_IRQ_H +#define __ARCH_XTENSA_SRC_ESP32_ESP32_IRQ_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* CPU interrupt types. */ + +#define ESP32_CPUINT_LEVEL 0 +#define ESP32_CPUINT_EDGE 1 + +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32_cpuint_initialize + * + * Description: + * Initialize CPU interrupts + * + * Input Parameters: + * None + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +int esp32_cpuint_initialize(void); + +/**************************************************************************** + * Name: esp32_setup_irq + * + * Description: + * This function sets up the IRQ. It allocates a CPU interrupt of the given + * priority and type and attaches it to the given peripheral. + * + * Input Parameters: + * cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU + * periphid - The peripheral number from irq.h to be assigned to + * a CPU interrupt. + * priority - Interrupt's priority (1 - 5). + * type - Interrupt's type (level or edge). + * + * Returned Value: + * The allocated CPU interrupt on success, a negated errno value on + * failure. + * + ****************************************************************************/ + +int esp32_setup_irq(int cpu, int periphid, int priority, int type); + +/**************************************************************************** + * Name: esp32_teardown_irq + * + * Description: + * This function undoes the operations done by esp32_setup_irq. + * It detaches a peripheral interrupt from a CPU interrupt and frees the + * CPU interrupt. + * + * Input Parameters: + * cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU + * periphid - The peripheral number from irq.h to be detached from the + * CPU interrupt. + * cpuint - The CPU interrupt from which the peripheral interrupt will + * be detached. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void esp32_teardown_irq(int cpu, int periphid, int cpuint); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_IRQ_H */ diff --git a/arch/xtensa/src/esp32/esp32_oneshot.h b/arch/xtensa/src/esp32/esp32_oneshot.h index 784130b1052..4ab25ce9a14 100644 --- a/arch/xtensa/src/esp32/esp32_oneshot.h +++ b/arch/xtensa/src/esp32/esp32_oneshot.h @@ -60,7 +60,7 @@ struct esp32_oneshot_s { uint8_t chan; /* The timer/counter in use */ volatile bool running; /* True: the timer is running */ - FAR struct esp32_tim_dev_s *tim; /* Pointer returned by + struct esp32_tim_dev_s *tim; /* Pointer returned by * esp32_tim_init() */ volatile oneshot_handler_t handler; /* Oneshot expiration callback */ volatile void *arg; /* The argument that will accompany diff --git a/arch/xtensa/src/esp32/esp32_oneshot_lowerhalf.c b/arch/xtensa/src/esp32/esp32_oneshot_lowerhalf.c index 7e4949c04fc..3c911fe4b54 100644 --- a/arch/xtensa/src/esp32/esp32_oneshot_lowerhalf.c +++ b/arch/xtensa/src/esp32/esp32_oneshot_lowerhalf.c @@ -58,7 +58,7 @@ struct esp32_oneshot_lowerhalf_s struct oneshot_lowerhalf_s lh; /* Lower half instance */ struct esp32_oneshot_s oneshot; /* ESP32-specific oneshot state */ oneshot_callback_t callback; /* Upper half Interrupt callback */ - FAR void *arg; /* Argument passed to handler */ + void *arg; /* Argument passed to handler */ uint16_t resolution; }; @@ -70,16 +70,16 @@ static void esp32_oneshot_lh_handler(void *arg); /* "Lower half" driver methods **********************************************/ -static int esp32_max_lh_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts); -static int esp32_lh_start(FAR struct oneshot_lowerhalf_s *lower, +static int esp32_max_lh_delay(struct oneshot_lowerhalf_s *lower, + struct timespec *ts); +static int esp32_lh_start(struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, - FAR void *arg, - FAR const struct timespec *ts); -static int esp32_lh_cancel(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts); -static int esp32_lh_current(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts); + void *arg, + const struct timespec *ts); +static int esp32_lh_cancel(struct oneshot_lowerhalf_s *lower, + struct timespec *ts); +static int esp32_lh_current(struct oneshot_lowerhalf_s *lower, + struct timespec *ts); /**************************************************************************** * Private Data @@ -113,8 +113,8 @@ static const struct oneshot_operations_s g_esp32_timer_ops = static void esp32_oneshot_lh_handler(void *arg) { - FAR struct esp32_oneshot_lowerhalf_s *priv = - (FAR struct esp32_oneshot_lowerhalf_s *)arg; + struct esp32_oneshot_lowerhalf_s *priv = + (struct esp32_oneshot_lowerhalf_s *)arg; DEBUGASSERT(priv != NULL); DEBUGASSERT(priv->callback != NULL); @@ -149,8 +149,8 @@ static void esp32_oneshot_lh_handler(void *arg) * ****************************************************************************/ -static int esp32_max_lh_delay(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts) +static int esp32_max_lh_delay(struct oneshot_lowerhalf_s *lower, + struct timespec *ts) { DEBUGASSERT(ts != NULL); @@ -191,13 +191,13 @@ static int esp32_max_lh_delay(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32_lh_start(FAR struct oneshot_lowerhalf_s *lower, +static int esp32_lh_start(struct oneshot_lowerhalf_s *lower, oneshot_callback_t callback, - FAR void *arg, - FAR const struct timespec *ts) + void *arg, + const struct timespec *ts) { - FAR struct esp32_oneshot_lowerhalf_s *priv = - (FAR struct esp32_oneshot_lowerhalf_s *)lower; + struct esp32_oneshot_lowerhalf_s *priv = + (struct esp32_oneshot_lowerhalf_s *)lower; int ret; irqstate_t flags; @@ -247,11 +247,11 @@ static int esp32_lh_start(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32_lh_cancel(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts) +static int esp32_lh_cancel(struct oneshot_lowerhalf_s *lower, + struct timespec *ts) { - FAR struct esp32_oneshot_lowerhalf_s *priv = - (FAR struct esp32_oneshot_lowerhalf_s *)lower; + struct esp32_oneshot_lowerhalf_s *priv = + (struct esp32_oneshot_lowerhalf_s *)lower; irqstate_t flags; int ret; @@ -292,11 +292,11 @@ static int esp32_lh_cancel(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32_lh_current(FAR struct oneshot_lowerhalf_s *lower, - FAR struct timespec *ts) +static int esp32_lh_current(struct oneshot_lowerhalf_s *lower, + struct timespec *ts) { - FAR struct esp32_oneshot_lowerhalf_s *priv = - (FAR struct esp32_oneshot_lowerhalf_s *)lower; + struct esp32_oneshot_lowerhalf_s *priv = + (struct esp32_oneshot_lowerhalf_s *)lower; uint64_t current_us; DEBUGASSERT(priv != NULL); @@ -333,15 +333,15 @@ static int esp32_lh_current(FAR struct oneshot_lowerhalf_s *lower, * ****************************************************************************/ -FAR struct oneshot_lowerhalf_s *oneshot_initialize(int chan, +struct oneshot_lowerhalf_s *oneshot_initialize(int chan, uint16_t resolution) { - FAR struct esp32_oneshot_lowerhalf_s *priv; + struct esp32_oneshot_lowerhalf_s *priv; int ret; /* Allocate an instance of the lower half driver */ - priv = (FAR struct esp32_oneshot_lowerhalf_s *)kmm_zalloc( + priv = (struct esp32_oneshot_lowerhalf_s *)kmm_zalloc( sizeof(struct esp32_oneshot_lowerhalf_s)); if (priv == NULL) diff --git a/arch/xtensa/src/esp32/esp32_partition.c b/arch/xtensa/src/esp32/esp32_partition.c index e3b595ba61f..fa6b1dd4b15 100644 --- a/arch/xtensa/src/esp32/esp32_partition.c +++ b/arch/xtensa/src/esp32/esp32_partition.c @@ -362,7 +362,7 @@ static int ota_set_bootseq(struct mtd_dev_priv *dev, int num) * ****************************************************************************/ -static int esp32_part_erase(FAR struct mtd_dev_s *dev, off_t startblock, +static int esp32_part_erase(struct mtd_dev_s *dev, off_t startblock, size_t nblocks) { struct mtd_dev_priv *mtd_priv = (struct mtd_dev_priv *)dev; @@ -387,8 +387,8 @@ static int esp32_part_erase(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -static ssize_t esp32_part_read(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR uint8_t *buffer) +static ssize_t esp32_part_read(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, uint8_t *buffer) { struct mtd_dev_priv *mtd_priv = (struct mtd_dev_priv *)dev; @@ -412,8 +412,8 @@ static ssize_t esp32_part_read(FAR struct mtd_dev_s *dev, off_t offset, * ****************************************************************************/ -static ssize_t esp32_part_bread(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR uint8_t *buffer) +static ssize_t esp32_part_bread(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, uint8_t *buffer) { struct mtd_dev_priv *mtd_priv = (struct mtd_dev_priv *)dev; @@ -437,8 +437,8 @@ static ssize_t esp32_part_bread(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -static ssize_t esp32_part_write(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR const uint8_t *buffer) +static ssize_t esp32_part_write(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, const uint8_t *buffer) { struct mtd_dev_priv *mtd_priv = (struct mtd_dev_priv *)dev; @@ -463,8 +463,8 @@ static ssize_t esp32_part_write(FAR struct mtd_dev_s *dev, off_t offset, * ****************************************************************************/ -static ssize_t esp32_part_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR const uint8_t *buffer) +static ssize_t esp32_part_bwrite(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, const uint8_t *buffer) { struct mtd_dev_priv *mtd_priv = (struct mtd_dev_priv *)dev; @@ -487,7 +487,7 @@ static ssize_t esp32_part_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -static int esp32_part_ioctl(FAR struct mtd_dev_s *dev, int cmd, +static int esp32_part_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg) { int ret; diff --git a/arch/xtensa/src/esp32/esp32_psram.c b/arch/xtensa/src/esp32/esp32_psram.c index 87672d003ba..7ecda4981f2 100644 --- a/arch/xtensa/src/esp32/esp32_psram.c +++ b/arch/xtensa/src/esp32/esp32_psram.c @@ -52,10 +52,6 @@ * Pre-processor Definitions ****************************************************************************/ -#ifndef MIN -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif - #define RTC_VDDSDIO_TIEH_1_8V 0 /* TIEH field value for 1.8V VDDSDIO */ #define RTC_VDDSDIO_TIEH_3_3V 1 /* TIEH field value for 3.3V VDDSDIO */ @@ -337,12 +333,6 @@ psram_2t_mode_enable(psram_spi_num_t spi_num); static int psram_2t_mode_check(psram_spi_num_t spi_num); #endif -/**************************************************************************** - * ROM function prototypes - ****************************************************************************/ - -extern void ets_delay_us(int delay_us); - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -426,6 +416,217 @@ static int IRAM_ATTR esp32_get_vddsdio_config( return OK; } +/* register initialization for sram cache params and r/w commands */ + +static void IRAM_ATTR + psram_cache_init(int psram_cache_mode, int vaddrmode) +{ + uint32_t regval; + + switch (psram_cache_mode) + { + case PSRAM_CACHE_F80M_S80M: + + /* flash 1 div clk,80+40; */ + + modifyreg32(SPI_DATE_REG(0), BIT(31), 0); + + /* pre clk div , ONLY IF SPI/SRAM@ DIFFERENT SPEED,JUST FOR SPI0. + * FLASH DIV 2+SRAM DIV4 + */ + + modifyreg32(SPI_DATE_REG(0), BIT(30), 0); + break; + + case PSRAM_CACHE_F80M_S40M: + modifyreg32(SPI_CLOCK_REG(0), SPI_CLK_EQU_SYSCLK_M, 0); + SET_PERI_REG_BITS(SPI_CLOCK_REG(0), SPI_CLKDIV_PRE_V, 0, + SPI_CLKDIV_PRE_S); + SET_PERI_REG_BITS(SPI_CLOCK_REG(0), SPI_CLKCNT_N, 1, SPI_CLKCNT_N_S); + SET_PERI_REG_BITS(SPI_CLOCK_REG(0), SPI_CLKCNT_H, 0, SPI_CLKCNT_H_S); + SET_PERI_REG_BITS(SPI_CLOCK_REG(0), SPI_CLKCNT_L, 1, SPI_CLKCNT_L_S); + modifyreg32(SPI_DATE_REG(0), BIT(31), 0); /* flash 1 div clk */ + + /* pre clk div , ONLY IF SPI/SRAM@ DIFFERENT SPEED,JUST FOR SPI0. */ + + modifyreg32(SPI_DATE_REG(0), BIT(30), 0); + break; + case PSRAM_CACHE_F40M_S40M: + default: + + /* flash 1 div clk */ + + modifyreg32(SPI_DATE_REG(0), BIT(31), 0); + + /* pre clk div */ + + modifyreg32(SPI_DATE_REG(0), BIT(30), 0); + break; + } + + /* disable dio mode for cache command */ + + modifyreg32(SPI_CACHE_SCTRL_REG(0), SPI_USR_SRAM_DIO_M, 0); + + /* enable qio mode for cache command */ + + modifyreg32(SPI_CACHE_SCTRL_REG(0), 0, SPI_USR_SRAM_QIO_M); + + /* enable cache read command */ + + modifyreg32(SPI_CACHE_SCTRL_REG(0), 0, SPI_CACHE_SRAM_USR_RCMD_M); + + /* enable cache write command */ + + modifyreg32(SPI_CACHE_SCTRL_REG(0), 0, SPI_CACHE_SRAM_USR_WCMD_M); + + /* write address for cache command */ + + SET_PERI_REG_BITS(SPI_CACHE_SCTRL_REG(0), SPI_SRAM_ADDR_BITLEN_V, 23, + SPI_SRAM_ADDR_BITLEN_S); + + /* enable cache read dummy */ + + modifyreg32(SPI_CACHE_SCTRL_REG(0), 0, SPI_USR_RD_SRAM_DUMMY_M); + + /* config sram cache r/w command */ + + SET_PERI_REG_BITS(SPI_SRAM_DRD_CMD_REG(0), + SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_V, 7, + SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_S); + + SET_PERI_REG_BITS(SPI_SRAM_DRD_CMD_REG(0), + SPI_CACHE_SRAM_USR_RD_CMD_VALUE_V, + PSRAM_FAST_READ_QUAD, + SPI_CACHE_SRAM_USR_RD_CMD_VALUE_S); /* 0xEB */ + + SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), + SPI_CACHE_SRAM_USR_WR_CMD_BITLEN, 7, + SPI_CACHE_SRAM_USR_WR_CMD_BITLEN_S); + + SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), + SPI_CACHE_SRAM_USR_WR_CMD_VALUE, + PSRAM_QUAD_WRITE, + SPI_CACHE_SRAM_USR_WR_CMD_VALUE_S); /* 0x38 */ + + /* dummy, psram cache : 40m--+1dummy; 80m--+2dummy */ + + SET_PERI_REG_BITS(SPI_CACHE_SCTRL_REG(0), SPI_SRAM_DUMMY_CYCLELEN_V, + PSRAM_FAST_READ_QUAD_DUMMY + extra_dummy, + SPI_SRAM_DUMMY_CYCLELEN_S); + + switch (psram_cache_mode) + { + /* in this mode , no delay is needed */ + + case PSRAM_CACHE_F80M_S80M: + break; + + /* if sram is @40M, need 2 cycles of delay */ + + case PSRAM_CACHE_F80M_S40M: + case PSRAM_CACHE_F40M_S40M: + default: + if (s_clk_mode == PSRAM_CLK_MODE_DCLK) + { + /* read command length, 2 bytes(1byte for delay), sending in qio + * mode in cache + */ + + SET_PERI_REG_BITS(SPI_SRAM_DRD_CMD_REG(0), + SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_V, 15, + SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_S); + + /* 0xEB, read command value,(0x00 for delay,0xeb for cmd) */ + + SET_PERI_REG_BITS(SPI_SRAM_DRD_CMD_REG(0), + SPI_CACHE_SRAM_USR_RD_CMD_VALUE_V, + ((PSRAM_FAST_READ_QUAD) << 8), + SPI_CACHE_SRAM_USR_RD_CMD_VALUE_S); + + /* write command length,2 bytes(1byte for delay,send in qio mode + * in cache) + */ + + SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), + SPI_CACHE_SRAM_USR_WR_CMD_BITLEN, 15, + SPI_CACHE_SRAM_USR_WR_CMD_BITLEN_S); + + /* 0x38, write command value,(0x00 for delay) */ + + SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), + SPI_CACHE_SRAM_USR_WR_CMD_VALUE, + ((PSRAM_QUAD_WRITE) << 8), + SPI_CACHE_SRAM_USR_WR_CMD_VALUE_S); + + /* dummy, psram cache : 40m--+1dummy; 80m--+2dummy */ + + SET_PERI_REG_BITS(SPI_CACHE_SCTRL_REG(0), + SPI_SRAM_DUMMY_CYCLELEN_V, + PSRAM_FAST_READ_QUAD_DUMMY + extra_dummy, + SPI_SRAM_DUMMY_CYCLELEN_S); + } + break; + } + + modifyreg32(DPORT_PRO_CACHE_CTRL_REG, + DPORT_PRO_DRAM_HL | DPORT_PRO_DRAM_SPLIT, 0); + modifyreg32(DPORT_APP_CACHE_CTRL_REG, + DPORT_APP_DRAM_HL | DPORT_APP_DRAM_SPLIT, 0); + if (vaddrmode == PSRAM_VADDR_MODE_LOWHIGH) + { + modifyreg32(DPORT_PRO_CACHE_CTRL_REG, 0, DPORT_PRO_DRAM_HL); + modifyreg32(DPORT_APP_CACHE_CTRL_REG, 0, DPORT_APP_DRAM_HL); + } + else + { + if (vaddrmode == PSRAM_VADDR_MODE_EVENODD) + { + modifyreg32(DPORT_PRO_CACHE_CTRL_REG, 0, DPORT_PRO_DRAM_SPLIT); + modifyreg32(DPORT_APP_CACHE_CTRL_REG, 0, DPORT_APP_DRAM_SPLIT); + } + } + + /* use Dram1 to visit ext sram. */ + + modifyreg32(DPORT_PRO_CACHE_CTRL1_REG, + DPORT_PRO_CACHE_MASK_DRAM1 | DPORT_PRO_CACHE_MASK_OPSDRAM, 0); + + /* cache page mode : + * 1 -->16k + * 4 -->2k + * 0 -->32k,(accord with the settings in cache_sram_mmu_set) + */ + + /* get into unknown exception if not comment */ + + regval = getreg32(DPORT_PRO_CACHE_CTRL1_REG); + regval &= ~(DPORT_PRO_CMMU_SRAM_PAGE_MODE << + DPORT_PRO_CMMU_SRAM_PAGE_MODE_S); + putreg32(regval, DPORT_PRO_CACHE_CTRL1_REG); + + /* use DRAM1 to visit ext sram. */ + + modifyreg32(DPORT_APP_CACHE_CTRL1_REG, + DPORT_APP_CACHE_MASK_DRAM1 | + DPORT_APP_CACHE_MASK_OPSDRAM, 0); + + /* cache page mode : + * 1 -->16k + * 4 -->2k + * 0 -->32k, (accord with the settings in cache_sram_mmu_set) + */ + + regval = getreg32(DPORT_APP_CACHE_CTRL1_REG); + regval &= ~(DPORT_APP_CMMU_SRAM_PAGE_MODE << + DPORT_APP_CMMU_SRAM_PAGE_MODE_S); + putreg32(regval, DPORT_APP_CACHE_CTRL1_REG); + + /* ENABLE SPI0 CS1 TO PSRAM(CS0--FLASH; CS1--SRAM) */ + + modifyreg32(SPI_PIN_REG(0), SPI_CS1_DIS_M, 0); +} + static void psram_clear_spi_fifo(psram_spi_num_t spi_num) { int i; @@ -1571,215 +1772,4 @@ psram_enable(int mode, int vaddrmode) /* psram init */ return OK; } -/* register initialization for sram cache params and r/w commands */ - -static void IRAM_ATTR -psram_cache_init(int psram_cache_mode, int vaddrmode) -{ - uint32_t regval; - - switch (psram_cache_mode) - { - case PSRAM_CACHE_F80M_S80M: - - /* flash 1 div clk,80+40; */ - - modifyreg32(SPI_DATE_REG(0), BIT(31), 0); - - /* pre clk div , ONLY IF SPI/SRAM@ DIFFERENT SPEED,JUST FOR SPI0. - * FLASH DIV 2+SRAM DIV4 - */ - - modifyreg32(SPI_DATE_REG(0), BIT(30), 0); - break; - - case PSRAM_CACHE_F80M_S40M: - modifyreg32(SPI_CLOCK_REG(0), SPI_CLK_EQU_SYSCLK_M, 0); - SET_PERI_REG_BITS(SPI_CLOCK_REG(0), SPI_CLKDIV_PRE_V, 0, - SPI_CLKDIV_PRE_S); - SET_PERI_REG_BITS(SPI_CLOCK_REG(0), SPI_CLKCNT_N, 1, SPI_CLKCNT_N_S); - SET_PERI_REG_BITS(SPI_CLOCK_REG(0), SPI_CLKCNT_H, 0, SPI_CLKCNT_H_S); - SET_PERI_REG_BITS(SPI_CLOCK_REG(0), SPI_CLKCNT_L, 1, SPI_CLKCNT_L_S); - modifyreg32(SPI_DATE_REG(0), BIT(31), 0); /* flash 1 div clk */ - - /* pre clk div , ONLY IF SPI/SRAM@ DIFFERENT SPEED,JUST FOR SPI0. */ - - modifyreg32(SPI_DATE_REG(0), BIT(30), 0); - break; - case PSRAM_CACHE_F40M_S40M: - default: - - /* flash 1 div clk */ - - modifyreg32(SPI_DATE_REG(0), BIT(31), 0); - - /* pre clk div */ - - modifyreg32(SPI_DATE_REG(0), BIT(30), 0); - break; - } - - /* disable dio mode for cache command */ - - modifyreg32(SPI_CACHE_SCTRL_REG(0), SPI_USR_SRAM_DIO_M, 0); - - /* enable qio mode for cache command */ - - modifyreg32(SPI_CACHE_SCTRL_REG(0), 0, SPI_USR_SRAM_QIO_M); - - /* enable cache read command */ - - modifyreg32(SPI_CACHE_SCTRL_REG(0), 0, SPI_CACHE_SRAM_USR_RCMD_M); - - /* enable cache write command */ - - modifyreg32(SPI_CACHE_SCTRL_REG(0), 0, SPI_CACHE_SRAM_USR_WCMD_M); - - /* write address for cache command */ - - SET_PERI_REG_BITS(SPI_CACHE_SCTRL_REG(0), SPI_SRAM_ADDR_BITLEN_V, 23, - SPI_SRAM_ADDR_BITLEN_S); - - /* enable cache read dummy */ - - modifyreg32(SPI_CACHE_SCTRL_REG(0), 0, SPI_USR_RD_SRAM_DUMMY_M); - - /* config sram cache r/w command */ - - SET_PERI_REG_BITS(SPI_SRAM_DRD_CMD_REG(0), - SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_V, 7, - SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_S); - - SET_PERI_REG_BITS(SPI_SRAM_DRD_CMD_REG(0), - SPI_CACHE_SRAM_USR_RD_CMD_VALUE_V, - PSRAM_FAST_READ_QUAD, - SPI_CACHE_SRAM_USR_RD_CMD_VALUE_S); /* 0xEB */ - - SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), - SPI_CACHE_SRAM_USR_WR_CMD_BITLEN, 7, - SPI_CACHE_SRAM_USR_WR_CMD_BITLEN_S); - - SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), - SPI_CACHE_SRAM_USR_WR_CMD_VALUE, - PSRAM_QUAD_WRITE, - SPI_CACHE_SRAM_USR_WR_CMD_VALUE_S); /* 0x38 */ - - /* dummy, psram cache : 40m--+1dummy; 80m--+2dummy */ - - SET_PERI_REG_BITS(SPI_CACHE_SCTRL_REG(0), SPI_SRAM_DUMMY_CYCLELEN_V, - PSRAM_FAST_READ_QUAD_DUMMY + extra_dummy, - SPI_SRAM_DUMMY_CYCLELEN_S); - - switch (psram_cache_mode) - { - /* in this mode , no delay is needed */ - - case PSRAM_CACHE_F80M_S80M: - break; - - /* if sram is @40M, need 2 cycles of delay */ - - case PSRAM_CACHE_F80M_S40M: - case PSRAM_CACHE_F40M_S40M: - default: - if (s_clk_mode == PSRAM_CLK_MODE_DCLK) - { - /* read command length, 2 bytes(1byte for delay), sending in qio - * mode in cache - */ - - SET_PERI_REG_BITS(SPI_SRAM_DRD_CMD_REG(0), - SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_V, 15, - SPI_CACHE_SRAM_USR_RD_CMD_BITLEN_S); - - /* 0xEB, read command value,(0x00 for delay,0xeb for cmd) */ - - SET_PERI_REG_BITS(SPI_SRAM_DRD_CMD_REG(0), - SPI_CACHE_SRAM_USR_RD_CMD_VALUE_V, - ((PSRAM_FAST_READ_QUAD) << 8), - SPI_CACHE_SRAM_USR_RD_CMD_VALUE_S); - - /* write command length,2 bytes(1byte for delay,send in qio mode - * in cache) - */ - - SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), - SPI_CACHE_SRAM_USR_WR_CMD_BITLEN, 15, - SPI_CACHE_SRAM_USR_WR_CMD_BITLEN_S); - - /* 0x38, write command value,(0x00 for delay) */ - - SET_PERI_REG_BITS(SPI_SRAM_DWR_CMD_REG(0), - SPI_CACHE_SRAM_USR_WR_CMD_VALUE, - ((PSRAM_QUAD_WRITE) << 8), - SPI_CACHE_SRAM_USR_WR_CMD_VALUE_S); - - /* dummy, psram cache : 40m--+1dummy; 80m--+2dummy */ - - SET_PERI_REG_BITS(SPI_CACHE_SCTRL_REG(0), - SPI_SRAM_DUMMY_CYCLELEN_V, - PSRAM_FAST_READ_QUAD_DUMMY + extra_dummy, - SPI_SRAM_DUMMY_CYCLELEN_S); - } - break; - } - - modifyreg32(DPORT_PRO_CACHE_CTRL_REG, - DPORT_PRO_DRAM_HL | DPORT_PRO_DRAM_SPLIT, 0); - modifyreg32(DPORT_APP_CACHE_CTRL_REG, - DPORT_APP_DRAM_HL | DPORT_APP_DRAM_SPLIT, 0); - if (vaddrmode == PSRAM_VADDR_MODE_LOWHIGH) - { - modifyreg32(DPORT_PRO_CACHE_CTRL_REG, 0, DPORT_PRO_DRAM_HL); - modifyreg32(DPORT_APP_CACHE_CTRL_REG, 0, DPORT_APP_DRAM_HL); - } - else - { - if (vaddrmode == PSRAM_VADDR_MODE_EVENODD) - { - modifyreg32(DPORT_PRO_CACHE_CTRL_REG, 0, DPORT_PRO_DRAM_SPLIT); - modifyreg32(DPORT_APP_CACHE_CTRL_REG, 0, DPORT_APP_DRAM_SPLIT); - } - } - - /* use Dram1 to visit ext sram. */ - - modifyreg32(DPORT_PRO_CACHE_CTRL1_REG, - DPORT_PRO_CACHE_MASK_DRAM1 | DPORT_PRO_CACHE_MASK_OPSDRAM, 0); - - /* cache page mode : - * 1 -->16k - * 4 -->2k - * 0 -->32k,(accord with the settings in cache_sram_mmu_set) - */ - - /* get into unknown exception if not comment */ - - regval = getreg32(DPORT_PRO_CACHE_CTRL1_REG); - regval &= ~(DPORT_PRO_CMMU_SRAM_PAGE_MODE << - DPORT_PRO_CMMU_SRAM_PAGE_MODE_S); - putreg32(regval, DPORT_PRO_CACHE_CTRL1_REG); - - /* use DRAM1 to visit ext sram. */ - - modifyreg32(DPORT_APP_CACHE_CTRL1_REG, - DPORT_APP_CACHE_MASK_DRAM1 | - DPORT_APP_CACHE_MASK_OPSDRAM, 0); - - /* cache page mode : - * 1 -->16k - * 4 -->2k - * 0 -->32k, (accord with the settings in cache_sram_mmu_set) - */ - - regval = getreg32(DPORT_APP_CACHE_CTRL1_REG); - regval &= ~(DPORT_APP_CMMU_SRAM_PAGE_MODE << - DPORT_APP_CMMU_SRAM_PAGE_MODE_S); - putreg32(regval, DPORT_APP_CACHE_CTRL1_REG); - - /* ENABLE SPI0 CS1 TO PSRAM(CS0--FLASH; CS1--SRAM) */ - - modifyreg32(SPI_PIN_REG(0), SPI_CS1_DIS_M, 0); -} - #endif /* CONFIG_ESP32_SPIRAM */ diff --git a/arch/xtensa/src/esp32/esp32_psram.h b/arch/xtensa/src/esp32/esp32_psram.h index abb5cbae895..c081d0da8e1 100644 --- a/arch/xtensa/src/esp32/esp32_psram.h +++ b/arch/xtensa/src/esp32/esp32_psram.h @@ -22,7 +22,7 @@ #define __ARCH_XTENSA_SRC_ESP32_ESP32_PSRAM_H /**************************************************************************** - * Included Files + * Pre-processor Definitions ****************************************************************************/ #define PSRAM_CACHE_F80M_S40M 0 @@ -55,6 +55,10 @@ * odd ones. */ +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ + /* Description: Get PSRAM size * return: * - PSRAM_SIZE_MAX if psram not enabled or not valid diff --git a/arch/xtensa/src/esp32/esp32_rng.c b/arch/xtensa/src/esp32/esp32_rng.c index 1a1da920dcd..f3cef48433c 100644 --- a/arch/xtensa/src/esp32/esp32_rng.c +++ b/arch/xtensa/src/esp32/esp32_rng.c @@ -59,9 +59,9 @@ ****************************************************************************/ static int esp32_rng_initialize(void); -static ssize_t esp32_rng_read(FAR struct file *filep, FAR char *buffer, +static ssize_t esp32_rng_read(struct file *filep, char *buffer, size_t buflen); -static int esp32_rng_open(FAR struct file *filep); +static int esp32_rng_open(struct file *filep); /**************************************************************************** * Private Types @@ -166,7 +166,7 @@ static int esp32_rng_initialize(void) * Name: esp32_rng_open ****************************************************************************/ -static int esp32_rng_open(FAR struct file *filep) +static int esp32_rng_open(struct file *filep) { /* O_NONBLOCK is not supported */ @@ -183,10 +183,10 @@ static int esp32_rng_open(FAR struct file *filep) * Name: esp32_rng_read ****************************************************************************/ -static ssize_t esp32_rng_read(FAR struct file *filep, FAR char *buffer, +static ssize_t esp32_rng_read(struct file *filep, char *buffer, size_t buflen) { - FAR struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev; + struct rng_dev_s *priv = (struct rng_dev_s *)&g_rngdev; ssize_t read_len; uint8_t *rd_buf = (uint8_t *)buffer; @@ -241,7 +241,7 @@ static ssize_t esp32_rng_read(FAR struct file *filep, FAR char *buffer, void devrandom_register(void) { esp32_rng_initialize(); - register_driver("/dev/random", FAR & g_rngops, 0444, NULL); + register_driver("/dev/random", &g_rngops, 0444, NULL); } #endif @@ -265,7 +265,7 @@ void devurandom_register(void) #ifndef CONFIG_DEV_RANDOM esp32_rng_initialize(); #endif - register_driver("dev/urandom", FAR & g_rngops, 0444, NULL); + register_driver("dev/urandom", &g_rngops, 0444, NULL); } #endif diff --git a/arch/xtensa/src/esp32/esp32_rt_timer.c b/arch/xtensa/src/esp32/esp32_rt_timer.c index 2d1ae3d1172..9c8988dbf96 100644 --- a/arch/xtensa/src/esp32/esp32_rt_timer.c +++ b/arch/xtensa/src/esp32/esp32_rt_timer.c @@ -93,7 +93,7 @@ static struct esp32_tim_dev_s *s_esp32_tim_dev; * ****************************************************************************/ -static void start_rt_timer(FAR struct rt_timer_s *timer, +static void start_rt_timer(struct rt_timer_s *timer, uint64_t timeout, bool repeat) { @@ -178,7 +178,7 @@ static void start_rt_timer(FAR struct rt_timer_s *timer, * ****************************************************************************/ -static void stop_rt_timer(FAR struct rt_timer_s *timer) +static void stop_rt_timer(struct rt_timer_s *timer) { irqstate_t flags; bool ishead; @@ -252,7 +252,7 @@ static void stop_rt_timer(FAR struct rt_timer_s *timer) * ****************************************************************************/ -static void delete_rt_timer(FAR struct rt_timer_s *timer) +static void delete_rt_timer(struct rt_timer_s *timer) { irqstate_t flags; @@ -294,7 +294,7 @@ exit: * ****************************************************************************/ -static int rt_timer_thread(int argc, FAR char *argv[]) +static int rt_timer_thread(int argc, char *argv[]) { int ret; irqstate_t flags; @@ -464,8 +464,8 @@ static int rt_timer_isr(int irq, void *context, void *arg) * ****************************************************************************/ -int rt_timer_create(FAR const struct rt_timer_args_s *args, - FAR struct rt_timer_s **timer_handle) +int rt_timer_create(const struct rt_timer_args_s *args, + struct rt_timer_s **timer_handle) { struct rt_timer_s *timer; @@ -503,7 +503,7 @@ int rt_timer_create(FAR const struct rt_timer_args_s *args, * ****************************************************************************/ -void rt_timer_start(FAR struct rt_timer_s *timer, +void rt_timer_start(struct rt_timer_s *timer, uint64_t timeout, bool repeat) { @@ -526,7 +526,7 @@ void rt_timer_start(FAR struct rt_timer_s *timer, * ****************************************************************************/ -void rt_timer_stop(FAR struct rt_timer_s *timer) +void rt_timer_stop(struct rt_timer_s *timer) { stop_rt_timer(timer); } @@ -545,7 +545,7 @@ void rt_timer_stop(FAR struct rt_timer_s *timer) * ****************************************************************************/ -void rt_timer_delete(FAR struct rt_timer_s *timer) +void rt_timer_delete(struct rt_timer_s *timer) { delete_rt_timer(timer); } diff --git a/arch/xtensa/src/esp32/esp32_rt_timer.h b/arch/xtensa/src/esp32/esp32_rt_timer.h index 33fcbd7b482..64c2eb3129f 100644 --- a/arch/xtensa/src/esp32/esp32_rt_timer.h +++ b/arch/xtensa/src/esp32/esp32_rt_timer.h @@ -107,8 +107,8 @@ extern "C" * ****************************************************************************/ -int rt_timer_create(FAR const struct rt_timer_args_s *args, - FAR struct rt_timer_s **timer_handle); +int rt_timer_create(const struct rt_timer_args_s *args, + struct rt_timer_s **timer_handle); /**************************************************************************** * Name: rt_timer_start @@ -126,7 +126,7 @@ int rt_timer_create(FAR const struct rt_timer_args_s *args, * ****************************************************************************/ -void rt_timer_start(FAR struct rt_timer_s *timer, +void rt_timer_start(struct rt_timer_s *timer, uint64_t timeout, bool repeat); @@ -144,7 +144,7 @@ void rt_timer_start(FAR struct rt_timer_s *timer, * ****************************************************************************/ -void rt_timer_stop(FAR struct rt_timer_s *timer); +void rt_timer_stop(struct rt_timer_s *timer); /**************************************************************************** * Name: rt_timer_delete @@ -160,7 +160,7 @@ void rt_timer_stop(FAR struct rt_timer_s *timer); * ****************************************************************************/ -void rt_timer_delete(FAR struct rt_timer_s *timer); +void rt_timer_delete(struct rt_timer_s *timer); /**************************************************************************** * Name: rt_timer_time_us diff --git a/arch/xtensa/src/esp32/esp32_rtc.c b/arch/xtensa/src/esp32/esp32_rtc.c index b02c6d462ef..d1c59168e73 100644 --- a/arch/xtensa/src/esp32/esp32_rtc.c +++ b/arch/xtensa/src/esp32/esp32_rtc.c @@ -232,7 +232,7 @@ struct alm_cbinfo_s { struct rt_timer_s *alarm_hdl; /* Timer id point to here */ volatile alm_callback_t ac_cb; /* Client callback function */ - volatile FAR void *ac_arg; /* Argument to pass with the callback function */ + volatile void *ac_arg; /* Argument to pass with the callback function */ uint64_t deadline_us; uint8_t index; }; @@ -266,7 +266,7 @@ static void IRAM_ATTR esp32_rtc_clk_8m_enable(bool clk_8m_en, bool d256_en); static uint32_t IRAM_ATTR esp32_rtc_clk_slow_freq_get_hz(void); #ifdef CONFIG_RTC_DRIVER -static void IRAM_ATTR esp32_rt_cb_handler(FAR void *arg); +static void IRAM_ATTR esp32_rt_cb_handler(void *arg); #endif /**************************************************************************** @@ -760,11 +760,11 @@ static void esp32_select_rtc_slow_clk(enum esp32_slow_clk_sel_e slow_clk) * ****************************************************************************/ -static void IRAM_ATTR esp32_rt_cb_handler(FAR void *arg) +static void IRAM_ATTR esp32_rt_cb_handler(void *arg) { - FAR struct alm_cbinfo_s *cbinfo = (struct alm_cbinfo_s *)arg; + struct alm_cbinfo_s *cbinfo = (struct alm_cbinfo_s *)arg; alm_callback_t cb; - FAR void *cb_arg; + void *cb_arg; int alminfo_id; DEBUGASSERT(cbinfo != NULL); @@ -777,7 +777,7 @@ static void IRAM_ATTR esp32_rt_cb_handler(FAR void *arg) /* Alarm callback */ cb = cbinfo->ac_cb; - cb_arg = (FAR void *)cbinfo->ac_arg; + cb_arg = (void *)cbinfo->ac_arg; cbinfo->ac_cb = NULL; cbinfo->ac_arg = NULL; cbinfo->deadline_us = 0; @@ -1957,7 +1957,7 @@ time_t up_rtc_time(void) * ****************************************************************************/ -int up_rtc_settime(FAR const struct timespec *ts) +int up_rtc_settime(const struct timespec *ts) { irqstate_t flags; uint64_t now_us; @@ -2052,7 +2052,7 @@ int up_rtc_initialize(void) ****************************************************************************/ #ifdef CONFIG_RTC_HIRES -int up_rtc_gettime(FAR struct timespec *tp) +int up_rtc_gettime(struct timespec *tp) { irqstate_t flags; uint64_t time_us; @@ -2095,10 +2095,10 @@ int up_rtc_gettime(FAR struct timespec *tp) * ****************************************************************************/ -int up_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) +int up_rtc_setalarm(struct alm_setalarm_s *alminfo) { struct rt_timer_args_s rt_timer_args; - FAR struct alm_cbinfo_s *cbinfo; + struct alm_cbinfo_s *cbinfo; irqstate_t flags; int ret = -EBUSY; int id; @@ -2170,7 +2170,7 @@ int up_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) int up_rtc_cancelalarm(enum alm_id_e alarmid) { - FAR struct alm_cbinfo_s *cbinfo; + struct alm_cbinfo_s *cbinfo; irqstate_t flags; int ret = -ENODATA; @@ -2217,10 +2217,10 @@ int up_rtc_cancelalarm(enum alm_id_e alarmid) * ****************************************************************************/ -int up_rtc_rdalarm(FAR struct timespec *tp, uint32_t alarmid) +int up_rtc_rdalarm(struct timespec *tp, uint32_t alarmid) { irqstate_t flags; - FAR struct alm_cbinfo_s *cbinfo; + struct alm_cbinfo_s *cbinfo; DEBUGASSERT(tp != NULL); DEBUGASSERT((RTC_ALARM0 <= alarmid) && (alarmid < RTC_ALARM_LAST)); diff --git a/arch/xtensa/src/esp32/esp32_rtc.h b/arch/xtensa/src/esp32/esp32_rtc.h index 3ce469b5dfa..4653d486835 100644 --- a/arch/xtensa/src/esp32/esp32_rtc.h +++ b/arch/xtensa/src/esp32/esp32_rtc.h @@ -134,7 +134,7 @@ enum esp32_rtc_cal_sel_e /* The form of an alarm callback */ -typedef CODE void (*alm_callback_t)(FAR void *arg, unsigned int alarmid); +typedef void (*alm_callback_t)(void *arg, unsigned int alarmid); enum alm_id_e { @@ -150,7 +150,7 @@ struct alm_setalarm_s int as_id; /* enum alm_id_e */ struct timespec as_time; /* Alarm expiration time */ alm_callback_t as_cb; /* Callback (if non-NULL) */ - FAR void *as_arg; /* Argument for callback */ + void *as_arg; /* Argument for callback */ }; #endif /* CONFIG_RTC_ALARM */ @@ -562,7 +562,7 @@ time_t up_rtc_time(void); * ****************************************************************************/ -int up_rtc_settime(FAR const struct timespec *ts); +int up_rtc_settime(const struct timespec *ts); /**************************************************************************** * Name: up_rtc_initialize @@ -598,7 +598,7 @@ int up_rtc_initialize(void); ****************************************************************************/ #ifdef CONFIG_RTC_HIRES -int up_rtc_gettime(FAR struct timespec *tp); +int up_rtc_gettime(struct timespec *tp); #endif #ifdef CONFIG_RTC_ALARM @@ -617,7 +617,7 @@ int up_rtc_gettime(FAR struct timespec *tp); * ****************************************************************************/ -int up_rtc_setalarm(FAR struct alm_setalarm_s *alminfo); +int up_rtc_setalarm(struct alm_setalarm_s *alminfo); /**************************************************************************** * Name: up_rtc_cancelalarm @@ -650,7 +650,7 @@ int up_rtc_cancelalarm(enum alm_id_e alarmid); * ****************************************************************************/ -int up_rtc_rdalarm(FAR struct timespec *tp, uint32_t alarmid); +int up_rtc_rdalarm(struct timespec *tp, uint32_t alarmid); #endif /* CONFIG_RTC_ALARM */ diff --git a/arch/xtensa/src/esp32/esp32_rtc_lowerhalf.c b/arch/xtensa/src/esp32/esp32_rtc_lowerhalf.c index e2ca2edb973..b0a01b08310 100644 --- a/arch/xtensa/src/esp32/esp32_rtc_lowerhalf.c +++ b/arch/xtensa/src/esp32/esp32_rtc_lowerhalf.c @@ -46,7 +46,7 @@ struct esp32_cbinfo_s { volatile rtc_alarm_callback_t cb; /* Callback when the alarm expires */ - volatile FAR void *priv; /* Private argurment to accompany callback */ + volatile void *priv; /* Private argurment to accompany callback */ }; #endif @@ -60,7 +60,7 @@ struct esp32_lowerhalf_s * operations vtable (which may lie in FLASH or ROM) */ - FAR const struct rtc_ops_s *ops; + const struct rtc_ops_s *ops; #ifdef CONFIG_RTC_ALARM /* Alarm callback information */ @@ -74,22 +74,22 @@ struct esp32_lowerhalf_s /* Prototypes for static methods in struct rtc_ops_s */ -static int rtc_lh_rdtime(FAR struct rtc_lowerhalf_s *lower, - FAR struct rtc_time *rtctime); -static int rtc_lh_settime(FAR struct rtc_lowerhalf_s *lower, - FAR const struct rtc_time *rtctime); -static bool rtc_lh_havesettime(FAR struct rtc_lowerhalf_s *lower); +static int rtc_lh_rdtime(struct rtc_lowerhalf_s *lower, + struct rtc_time *rtctime); +static int rtc_lh_settime(struct rtc_lowerhalf_s *lower, + const struct rtc_time *rtctime); +static bool rtc_lh_havesettime(struct rtc_lowerhalf_s *lower); #ifdef CONFIG_RTC_ALARM -static void rtc_lh_alarm_callback(FAR void *arg, unsigned int alarmid); -static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setalarm_s *alarminfo); -static int rtc_lh_setrelative(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setrelative_s *alarminfo); -static int rtc_lh_cancelalarm(FAR struct rtc_lowerhalf_s *lower, +static void rtc_lh_alarm_callback(void *arg, unsigned int alarmid); +static int rtc_lh_setalarm(struct rtc_lowerhalf_s *lower, + const struct lower_setalarm_s *alarminfo); +static int rtc_lh_setrelative(struct rtc_lowerhalf_s *lower, + const struct lower_setrelative_s *alarminfo); +static int rtc_lh_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid); -static int rtc_lh_rdalarm(FAR struct rtc_lowerhalf_s *lower, - FAR struct lower_rdalarm_s *alarminfo); +static int rtc_lh_rdalarm(struct rtc_lowerhalf_s *lower, + struct lower_rdalarm_s *alarminfo); #endif /**************************************************************************** @@ -145,12 +145,12 @@ static struct esp32_lowerhalf_s g_rtc_lowerhalf = ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static void rtc_lh_alarm_callback(FAR void *arg, unsigned int alarmid) +static void rtc_lh_alarm_callback(void *arg, unsigned int alarmid) { - FAR struct esp32_lowerhalf_s *lower; - FAR struct esp32_cbinfo_s *cbinfo; + struct esp32_lowerhalf_s *lower; + struct esp32_cbinfo_s *cbinfo; rtc_alarm_callback_t cb; - FAR void *priv; + void *priv; DEBUGASSERT((RTC_ALARM0 <= alarmid) && (alarmid < RTC_ALARM_LAST)); @@ -162,7 +162,7 @@ static void rtc_lh_alarm_callback(FAR void *arg, unsigned int alarmid) */ cb = (rtc_alarm_callback_t)cbinfo->cb; - priv = (FAR void *)cbinfo->priv; + priv = (void *)cbinfo->priv; cbinfo->cb = NULL; cbinfo->priv = NULL; @@ -192,11 +192,11 @@ static void rtc_lh_alarm_callback(FAR void *arg, unsigned int alarmid) * ****************************************************************************/ -static int rtc_lh_rdtime(FAR struct rtc_lowerhalf_s *lower, - FAR struct rtc_time *rtctime) +static int rtc_lh_rdtime(struct rtc_lowerhalf_s *lower, + struct rtc_time *rtctime) { #if defined(CONFIG_RTC_HIRES) - FAR struct timespec ts; + struct timespec ts; int ret; /* Get the higher resolution time */ @@ -212,7 +212,7 @@ static int rtc_lh_rdtime(FAR struct rtc_lowerhalf_s *lower, * compatible. */ - if (!gmtime_r(&ts.tv_sec, (FAR struct tm *)rtctime)) + if (!gmtime_r(&ts.tv_sec, (struct tm *)rtctime)) { ret = -get_errno(); goto errout; @@ -233,7 +233,7 @@ errout: /* Convert the one second epoch time to a struct tm */ - if (gmtime_r(&timer, (FAR struct tm *)rtctime) == 0) + if (gmtime_r(&timer, (struct tm *)rtctime) == 0) { int errcode = get_errno(); DEBUGASSERT(errcode > 0); @@ -262,8 +262,8 @@ errout: * ****************************************************************************/ -static int rtc_lh_settime(FAR struct rtc_lowerhalf_s *lower, - FAR const struct rtc_time *rtctime) +static int rtc_lh_settime(struct rtc_lowerhalf_s *lower, + const struct rtc_time *rtctime) { struct timespec ts; @@ -271,7 +271,7 @@ static int rtc_lh_settime(FAR struct rtc_lowerhalf_s *lower, * rtc_time is cast compatible with struct tm. */ - ts.tv_sec = mktime((FAR struct tm *)rtctime); + ts.tv_sec = mktime((struct tm *)rtctime); ts.tv_nsec = 0; /* Now set the time (with a accuracy of seconds) */ @@ -293,7 +293,7 @@ static int rtc_lh_settime(FAR struct rtc_lowerhalf_s *lower, * ****************************************************************************/ -static bool rtc_lh_havesettime(FAR struct rtc_lowerhalf_s *lower) +static bool rtc_lh_havesettime(struct rtc_lowerhalf_s *lower) { if (esp32_rtc_get_boot_time() == 0) { @@ -321,11 +321,11 @@ static bool rtc_lh_havesettime(FAR struct rtc_lowerhalf_s *lower) ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setalarm_s *alarminfo) +static int rtc_lh_setalarm(struct rtc_lowerhalf_s *lower, + const struct lower_setalarm_s *alarminfo) { - FAR struct esp32_lowerhalf_s *priv; - FAR struct esp32_cbinfo_s *cbinfo; + struct esp32_lowerhalf_s *priv; + struct esp32_cbinfo_s *cbinfo; struct alm_setalarm_s lowerinfo; int ret; @@ -333,7 +333,7 @@ static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, DEBUGASSERT((RTC_ALARM0 <= alarminfo->id) && (alarminfo->id < RTC_ALARM_LAST)); - priv = (FAR struct esp32_lowerhalf_s *)lower; + priv = (struct esp32_lowerhalf_s *)lower; /* Remember the callback information */ @@ -349,7 +349,7 @@ static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, /* Convert the RTC time to a timespec (1 second accuracy) */ - lowerinfo.as_time.tv_sec = mktime((FAR struct tm *)&alarminfo->time); + lowerinfo.as_time.tv_sec = mktime((struct tm *)&alarminfo->time); lowerinfo.as_time.tv_nsec = 0; /* And set the alarm */ @@ -383,8 +383,8 @@ static int rtc_lh_setalarm(FAR struct rtc_lowerhalf_s *lower, ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int rtc_lh_setrelative(FAR struct rtc_lowerhalf_s *lower, - FAR const struct lower_setrelative_s *alarminfo) +static int rtc_lh_setrelative(struct rtc_lowerhalf_s *lower, + const struct lower_setrelative_s *alarminfo) { struct lower_setalarm_s setalarm; time_t seconds; @@ -400,7 +400,7 @@ static int rtc_lh_setrelative(FAR struct rtc_lowerhalf_s *lower, flags = spin_lock_irqsave(NULL); seconds = alarminfo->reltime; - gmtime_r(&seconds, (FAR struct tm *)&setalarm.time); + gmtime_r(&seconds, (struct tm *)&setalarm.time); /* The set the alarm using this absolute time */ @@ -434,15 +434,15 @@ static int rtc_lh_setrelative(FAR struct rtc_lowerhalf_s *lower, ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int rtc_lh_cancelalarm(FAR struct rtc_lowerhalf_s *lower, int alarmid) +static int rtc_lh_cancelalarm(struct rtc_lowerhalf_s *lower, int alarmid) { - FAR struct esp32_lowerhalf_s *priv; - FAR struct esp32_cbinfo_s *cbinfo; + struct esp32_lowerhalf_s *priv; + struct esp32_cbinfo_s *cbinfo; DEBUGASSERT(lower != NULL); DEBUGASSERT((RTC_ALARM0 <= alarmid) && (alarmid < RTC_ALARM_LAST)); - priv = (FAR struct esp32_lowerhalf_s *)lower; + priv = (struct esp32_lowerhalf_s *)lower; /* Nullify callback information to reduce window for race conditions */ @@ -473,8 +473,8 @@ static int rtc_lh_cancelalarm(FAR struct rtc_lowerhalf_s *lower, int alarmid) ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int rtc_lh_rdalarm(FAR struct rtc_lowerhalf_s *lower, - FAR struct lower_rdalarm_s *alarminfo) +static int rtc_lh_rdalarm(struct rtc_lowerhalf_s *lower, + struct lower_rdalarm_s *alarminfo) { struct timespec ts; int ret; @@ -487,8 +487,8 @@ static int rtc_lh_rdalarm(FAR struct rtc_lowerhalf_s *lower, flags = spin_lock_irqsave(NULL); ret = up_rtc_rdalarm(&ts, alarminfo->id); - localtime_r((FAR const time_t *)&ts.tv_sec, - (FAR struct tm *)alarminfo->time); + localtime_r((const time_t *)&ts.tv_sec, + (struct tm *)alarminfo->time); spin_unlock_irqrestore(NULL, flags); @@ -515,9 +515,9 @@ static int rtc_lh_rdalarm(FAR struct rtc_lowerhalf_s *lower, * ****************************************************************************/ -FAR struct rtc_lowerhalf_s *esp32_rtc_lowerhalf(void) +struct rtc_lowerhalf_s *esp32_rtc_lowerhalf(void) { - return (FAR struct rtc_lowerhalf_s *)&g_rtc_lowerhalf; + return (struct rtc_lowerhalf_s *)&g_rtc_lowerhalf; } /**************************************************************************** @@ -539,7 +539,7 @@ FAR struct rtc_lowerhalf_s *esp32_rtc_lowerhalf(void) int esp32_rtc_driverinit(void) { int ret; - FAR struct rtc_lowerhalf_s *lower; + struct rtc_lowerhalf_s *lower; /* Instantiate the ESP32 lower-half RTC driver */ diff --git a/arch/xtensa/src/esp32/esp32_serial.c b/arch/xtensa/src/esp32/esp32_serial.c index 452e7571db7..f56eb5a8456 100644 --- a/arch/xtensa/src/esp32/esp32_serial.c +++ b/arch/xtensa/src/esp32/esp32_serial.c @@ -41,6 +41,7 @@ #include #include #include +#include #include @@ -53,7 +54,7 @@ #include "hardware/esp32_dma.h" #include "esp32_config.h" #include "esp32_gpio.h" -#include "esp32_cpuint.h" +#include "esp32_irq.h" #include "esp32_dma.h" #include "hardware/esp32_dport.h" @@ -255,6 +256,7 @@ struct esp32_dev_s uint32_t baud; /* Configured baud */ uint32_t status; /* Saved status bits */ int cpuint; /* CPU interrupt assigned to this UART */ + uint8_t cpu; /* CPU ID */ uint8_t parity; /* 0=none, 1=odd, 2=even */ uint8_t bits; /* Number of bits (5-9) */ bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */ @@ -267,6 +269,7 @@ struct esp32_dev_s #ifdef CONFIG_SERIAL_OFLOWCONTROL bool oflow; /* Output flow control (CTS) enabled */ #endif + spinlock_t lock; }; /**************************************************************************** @@ -277,7 +280,7 @@ static int esp32_setup(struct uart_dev_s *dev); static void esp32_shutdown(struct uart_dev_s *dev); static int esp32_attach(struct uart_dev_s *dev); static void esp32_detach(struct uart_dev_s *dev); -static int esp32_interrupt(int cpuint, void *context, FAR void *arg); +static int esp32_interrupt(int cpuint, void *context, void *arg); static int esp32_ioctl(struct file *filep, int cmd, unsigned long arg); static int esp32_receive(struct uart_dev_s *dev, unsigned int *status); static void esp32_rxint(struct uart_dev_s *dev, bool enable); @@ -297,7 +300,7 @@ static void dma_config(uint8_t dma_chan); static void dma_attach(uint8_t dma_chan); static inline void dma_enable_int(uint8_t dma_chan); static inline void dma_disable_int(uint8_t dma_chan); -static int esp32_interrupt_dma(int cpuint, void *context, FAR void *arg); +static int esp32_interrupt_dma(int cpuint, void *context, void *arg); #endif /**************************************************************************** @@ -815,7 +818,7 @@ static void esp32_disableallints(struct esp32_dev_s *priv, uint32_t *intena) /* The following must be atomic */ - flags = enter_critical_section(); + flags = spin_lock_irqsave(&priv->lock); if (intena) { @@ -827,7 +830,7 @@ static void esp32_disableallints(struct esp32_dev_s *priv, uint32_t *intena) /* Disable all interrupts */ putreg32(0, UART_INT_ENA_REG(priv->config->id)); - leave_critical_section(flags); + spin_unlock_irqrestore(&priv->lock, flags); } /**************************************************************************** @@ -857,7 +860,7 @@ static int esp32_setup(struct uart_dev_s *dev) /* Set up the CONF0 register. */ - conf0 = UART_TICK_REF_ALWAYS_ON; + conf0 = UART_TICK_REF_ALWAYS_ON | UART_ERR_WR_MASK_M; #ifdef CONFIG_SERIAL_OFLOWCONTROL /* Check if output flow control is enabled for this UART controller. */ @@ -920,14 +923,6 @@ static int esp32_setup(struct uart_dev_s *dev) regval |= (clkdiv & 15) << UART_CLKDIV_FRAG_S; putreg32(regval, UART_CLKDIV_REG(priv->config->id)); - /* Enable RX and error interrupts. Clear and pending interrtupt */ - - regval = UART_RXFIFO_FULL_INT_ENA | UART_FRM_ERR_INT_ENA | - UART_RXFIFO_TOUT_INT_ENA; - putreg32(regval, UART_INT_ENA_REG(priv->config->id)); - - putreg32(UINT32_MAX, UART_INT_CLR_REG(priv->config->id)); - /* Reset the RX and TX FIFO */ esp32_reset_rx_fifo(priv); @@ -940,6 +935,14 @@ static int esp32_setup(struct uart_dev_s *dev) UART_RX_TOUT_EN; putreg32(regval, UART_CONF1_REG(priv->config->id)); + /* Enable RX and error interrupts. Clear and pending interrtupt */ + + regval = UART_RXFIFO_FULL_INT_ENA | UART_FRM_ERR_INT_ENA | + UART_RXFIFO_TOUT_INT_ENA; + putreg32(regval, UART_INT_ENA_REG(priv->config->id)); + + putreg32(UINT32_MAX, UART_INT_CLR_REG(priv->config->id)); + #ifdef CONFIG_SERIAL_IFLOWCONTROL /* Check if input flow control is enabled for this UART controller */ @@ -952,7 +955,7 @@ static int esp32_setup(struct uart_dev_s *dev) modifyreg32(UART_CONF1_REG(priv->config->id), 0, regval); } -#endif +#endif #endif return OK; @@ -988,13 +991,6 @@ static void esp32_shutdown(struct uart_dev_s *dev) /* Disable all UART interrupts */ esp32_disableallints(priv, NULL); - - /* Unconfigure and disable the UART */ - - putreg32(0, UART_CONF0_REG(priv->config->id)); - putreg32(0, UART_CONF1_REG(priv->config->id)); - - putreg32(0, UART_INT_ENA_REG(priv->config->id)); putreg32(UINT32_MAX, UART_INT_CLR_REG(priv->config->id)); } @@ -1017,12 +1013,13 @@ static void esp32_shutdown(struct uart_dev_s *dev) static int esp32_attach(struct uart_dev_s *dev) { struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv; - int cpu; int ret = OK; - /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */ + /* Set up to receive peripheral interrupts on the current CPU */ - priv->cpuint = esp32_alloc_levelint(1); + priv->cpu = up_cpu_index(); + priv->cpuint = esp32_setup_irq(priv->cpu, priv->config->periph, + 1, ESP32_CPUINT_LEVEL); if (priv->cpuint < 0) { /* Failed to allocate a CPU interrupt of this type */ @@ -1030,19 +1027,6 @@ static int esp32_attach(struct uart_dev_s *dev) return priv->cpuint; } - /* Set up to receive peripheral interrupts on the current CPU */ - -#ifdef CONFIG_SMP - cpu = up_cpu_index(); -#else - cpu = 0; -#endif - - /* Attach the GPIO peripheral to the allocated CPU interrupt */ - - up_disable_irq(priv->cpuint); - esp32_attach_peripheral(cpu, priv->config->periph, priv->cpuint); - /* Attach and enable the IRQ */ ret = irq_attach(priv->config->irq, esp32_interrupt, dev); @@ -1052,7 +1036,7 @@ static int esp32_attach(struct uart_dev_s *dev) * in the UART */ - up_enable_irq(priv->cpuint); + up_enable_irq(priv->config->irq); } return ret; @@ -1071,26 +1055,15 @@ static int esp32_attach(struct uart_dev_s *dev) static void esp32_detach(struct uart_dev_s *dev) { struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv; - int cpu; /* Disable and detach the CPU interrupt */ - up_disable_irq(priv->cpuint); + up_disable_irq(priv->config->irq); irq_detach(priv->config->irq); /* Disassociate the peripheral interrupt from the CPU interrupt */ -#ifdef CONFIG_SMP - cpu = up_cpu_index(); -#else - cpu = 0; -#endif - - esp32_detach_peripheral(cpu, priv->config->periph, priv->cpuint); - - /* And release the CPU interrupt */ - - esp32_free_cpuint(priv->cpuint); + esp32_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint); priv->cpuint = -1; } @@ -1150,14 +1123,32 @@ static void dma_attach(uint8_t dma_chan) int dma_cpuint; int cpu; int ret; + int periph; + int irq; /* Clear the interrupts */ putreg32(UINT32_MAX, UHCI_INT_CLR_REG(dma_chan)); - /* Allocate a level-sensitive, priority 1 CPU interrupt for the DMA */ + /* Attach the UHCI interrupt to the allocated CPU interrupt + * and attach and enable the IRQ. + */ - dma_cpuint = esp32_alloc_levelint(1); + if (dma_chan == 0) + { + periph = ESP32_PERIPH_UHCI0; + irq = ESP32_IRQ_UHCI0; + } + else + { + periph = ESP32_PERIPH_UHCI1; + irq = ESP32_IRQ_UHCI1; + } + + /* Set up to receive peripheral interrupts on the current CPU */ + + cpu = up_cpu_index(); + dma_cpuint = esp32_setup_irq(cpu, periph, 1, ESP32_CPUINT_LEVEL); if (dma_cpuint < 0) { /* Failed to allocate a CPU interrupt of this type */ @@ -1166,36 +1157,12 @@ static void dma_attach(uint8_t dma_chan) return; } - /* Set up to receive peripheral interrupts on the current CPU */ - -#ifdef CONFIG_SMP - cpu = up_cpu_index(); -#else - cpu = 0; -#endif - - /* Attach the UHCI interrupt to the allocated CPU interrupt - * and attach and enable the IRQ. - */ - - up_disable_irq(dma_cpuint); - - if (dma_chan == 0) - { - esp32_attach_peripheral(cpu, ESP32_PERIPH_UHCI0, dma_cpuint); - ret = irq_attach(ESP32_IRQ_UHCI0, esp32_interrupt_dma, NULL); - } - else - { - esp32_attach_peripheral(cpu, ESP32_PERIPH_UHCI1, dma_cpuint); - ret = irq_attach(ESP32_IRQ_UHCI1, esp32_interrupt_dma, NULL); - } - + ret = irq_attach(irq, esp32_interrupt_dma, NULL); if (ret == OK) { /* Enable the CPU interrupt */ - up_enable_irq(dma_cpuint); + up_enable_irq(irq); } else { @@ -1211,7 +1178,7 @@ static void dma_attach(uint8_t dma_chan) * ****************************************************************************/ -static int esp32_interrupt_dma(int irq, void *context, FAR void *arg) +static int esp32_interrupt_dma(int irq, void *context, void *arg) { uint32_t value; uint32_t status; @@ -1348,7 +1315,7 @@ static void dma_config(uint8_t dma_chan) * ****************************************************************************/ -static int esp32_interrupt(int cpuint, void *context, FAR void *arg) +static int esp32_interrupt(int cpuint, void *context, void *arg) { struct uart_dev_s *dev = (struct uart_dev_s *)arg; struct esp32_dev_s *priv; @@ -1676,7 +1643,7 @@ static void esp32_rxint(struct uart_dev_s *dev, bool enable) irqstate_t flags; int regval; - flags = enter_critical_section(); + flags = spin_lock_irqsave(&priv->lock); if (enable) { @@ -1701,7 +1668,7 @@ static void esp32_rxint(struct uart_dev_s *dev, bool enable) putreg32(regval, UART_INT_ENA_REG(priv->config->id)); } - leave_critical_section(flags); + spin_unlock_irqrestore(&priv->lock, flags); } /**************************************************************************** @@ -1749,7 +1716,7 @@ static void esp32_txint(struct uart_dev_s *dev, bool enable) if (priv->txdma == false) { #endif - flags = enter_critical_section(); + flags = spin_lock_irqsave(&priv->lock); if (enable) { @@ -1761,10 +1728,12 @@ static void esp32_txint(struct uart_dev_s *dev, bool enable) modifyreg32(UART_INT_ENA_REG(priv->config->id), 0, (UART_TX_DONE_INT_ENA | UART_TXFIFO_EMPTY_INT_ENA)); + #else /* Fake a TX interrupt here by just calling uart_xmitchars() with * interrupts disabled (note this may recurse). */ + spin_unlock_irqrestore(&priv->lock, flags); uart_xmitchars(dev); #endif } @@ -1776,7 +1745,7 @@ static void esp32_txint(struct uart_dev_s *dev, bool enable) (UART_TX_DONE_INT_ENA | UART_TXFIFO_EMPTY_INT_ENA), 0); } - leave_critical_section(flags); + spin_unlock_irqrestore(&priv->lock, flags); #ifdef CONFIG_SERIAL_TXDMA } #endif diff --git a/arch/xtensa/src/esp32/esp32_smp.h b/arch/xtensa/src/esp32/esp32_smp.h index dbb9ccd1acd..3b1d142e22c 100644 --- a/arch/xtensa/src/esp32/esp32_smp.h +++ b/arch/xtensa/src/esp32/esp32_smp.h @@ -64,8 +64,8 @@ extern uint32_t g_cpu1_idlestack[CPU1_IDLETHREAD_STACKWORDS]; * ****************************************************************************/ -int esp32_fromcpu0_interrupt(int irq, FAR void *context, FAR void *arg); -int esp32_fromcpu1_interrupt(int irq, FAR void *context, FAR void *arg); +int esp32_fromcpu0_interrupt(int irq, void *context, void *arg); +int esp32_fromcpu1_interrupt(int irq, void *context, void *arg); #endif /* CONFIG_SMP */ #endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_SMP_H */ diff --git a/arch/xtensa/src/esp32/esp32_spi.c b/arch/xtensa/src/esp32/esp32_spi.c index 2be5a3462a0..9a73b7777cb 100644 --- a/arch/xtensa/src/esp32/esp32_spi.c +++ b/arch/xtensa/src/esp32/esp32_spi.c @@ -45,7 +45,7 @@ #include "esp32_spi.h" #include "esp32_gpio.h" -#include "esp32_cpuint.h" +#include "esp32_irq.h" #include "esp32_dma.h" #include "xtensa.h" @@ -109,7 +109,6 @@ struct esp32_spi_config_s uint8_t miso_pin; /* GPIO configuration for MISO */ uint8_t clk_pin; /* GPIO configuration for CLK */ - uint8_t cpu; /* CPU ID */ uint8_t periph; /* peripher ID */ uint8_t irq; /* Interrupt ID */ @@ -153,6 +152,7 @@ struct esp32_spi_priv_s sem_t sem_isr; int cpuint; /* SPI interrupt ID */ + uint8_t cpu; /* CPU ID */ uint32_t frequency; /* Requested clock frequency */ uint32_t actual; /* Actual clock frequency */ @@ -168,37 +168,37 @@ struct esp32_spi_priv_s * Private Function Prototypes ****************************************************************************/ -static int esp32_spi_lock(FAR struct spi_dev_s *dev, bool lock); +static int esp32_spi_lock(struct spi_dev_s *dev, bool lock); #ifndef CONFIG_ESP32_SPI_UDCS -static void esp32_spi_select(FAR struct spi_dev_s *dev, +static void esp32_spi_select(struct spi_dev_s *dev, uint32_t devid, bool selected); #endif -static uint32_t esp32_spi_setfrequency(FAR struct spi_dev_s *dev, +static uint32_t esp32_spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency); -static void esp32_spi_setmode(FAR struct spi_dev_s *dev, +static void esp32_spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode); -static void esp32_spi_setbits(FAR struct spi_dev_s *dev, int nbits); +static void esp32_spi_setbits(struct spi_dev_s *dev, int nbits); #ifdef CONFIG_SPI_HWFEATURES -static int esp32_spi_hwfeatures(FAR struct spi_dev_s *dev, +static int esp32_spi_hwfeatures(struct spi_dev_s *dev, spi_hwfeatures_t features); #endif -static uint32_t esp32_spi_send(FAR struct spi_dev_s *dev, uint32_t wd); -static void esp32_spi_exchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, - FAR void *rxbuffer, size_t nwords); +static uint32_t esp32_spi_send(struct spi_dev_s *dev, uint32_t wd); +static void esp32_spi_exchange(struct spi_dev_s *dev, + const void *txbuffer, + void *rxbuffer, size_t nwords); #ifndef CONFIG_SPI_EXCHANGE -static void esp32_spi_sndblock(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, +static void esp32_spi_sndblock(struct spi_dev_s *dev, + const void *txbuffer, size_t nwords); -static void esp32_spi_recvblock(FAR struct spi_dev_s *dev, - FAR void *rxbuffer, +static void esp32_spi_recvblock(struct spi_dev_s *dev, + void *rxbuffer, size_t nwords); #endif #ifdef CONFIG_SPI_TRIGGER -static int esp32_spi_trigger(FAR struct spi_dev_s *dev); +static int esp32_spi_trigger(struct spi_dev_s *dev); #endif -static void esp32_spi_init(FAR struct spi_dev_s *dev); -static void esp32_spi_deinit(FAR struct spi_dev_s *dev); +static void esp32_spi_init(struct spi_dev_s *dev); +static void esp32_spi_deinit(struct spi_dev_s *dev); /**************************************************************************** * Private Data @@ -214,7 +214,6 @@ static const struct esp32_spi_config_s esp32_spi2_config = .mosi_pin = CONFIG_ESP32_SPI2_MOSIPIN, .miso_pin = CONFIG_ESP32_SPI2_MISOPIN, .clk_pin = CONFIG_ESP32_SPI2_CLKPIN, - .cpu = 0, .periph = ESP32_PERIPH_SPI2, .irq = ESP32_IRQ_SPI2, .clk_bit = DPORT_SPI_CLK_EN_2, @@ -289,7 +288,6 @@ static const struct esp32_spi_config_s esp32_spi3_config = .mosi_pin = CONFIG_ESP32_SPI3_MOSIPIN, .miso_pin = CONFIG_ESP32_SPI3_MISOPIN, .clk_pin = CONFIG_ESP32_SPI3_CLKPIN, - .cpu = 0, .periph = ESP32_PERIPH_SPI3, .irq = ESP32_IRQ_SPI3, .clk_bit = DPORT_SPI_CLK_EN, @@ -469,10 +467,10 @@ static inline bool esp32_spi_iomux(struct esp32_spi_priv_s *priv) * ****************************************************************************/ -static int esp32_spi_lock(FAR struct spi_dev_s *dev, bool lock) +static int esp32_spi_lock(struct spi_dev_s *dev, bool lock) { int ret; - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; if (lock) { @@ -494,7 +492,7 @@ static int esp32_spi_lock(FAR struct spi_dev_s *dev, bool lock) * ****************************************************************************/ -static int esp32_spi_sem_waitdone(FAR struct esp32_spi_priv_s *priv) +static int esp32_spi_sem_waitdone(struct esp32_spi_priv_s *priv) { int ret; struct timespec abstime; @@ -533,11 +531,11 @@ static int esp32_spi_sem_waitdone(FAR struct esp32_spi_priv_s *priv) ****************************************************************************/ #ifndef CONFIG_ESP32_SPI_UDCS -static void esp32_spi_select(FAR struct spi_dev_s *dev, +static void esp32_spi_select(struct spi_dev_s *dev, uint32_t devid, bool selected) { #ifdef CONFIG_ESP32_SPI_SWCS - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; bool value = selected ? false : true; esp32_gpiowrite(priv->config->cs_pin, value); @@ -563,11 +561,11 @@ static void esp32_spi_select(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static uint32_t esp32_spi_setfrequency(FAR struct spi_dev_s *dev, +static uint32_t esp32_spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency) { uint32_t reg_val; - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; const uint32_t duty_cycle = 128; if (priv->frequency == frequency) @@ -657,13 +655,13 @@ static uint32_t esp32_spi_setfrequency(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void esp32_spi_setmode(FAR struct spi_dev_s *dev, +static void esp32_spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode) { uint32_t ck_idle_edge; uint32_t ck_out_edge; uint32_t delay_mode; - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; spiinfo("mode=%d\n", mode); @@ -739,9 +737,9 @@ static void esp32_spi_setmode(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void esp32_spi_setbits(FAR struct spi_dev_s *dev, int nbits) +static void esp32_spi_setbits(struct spi_dev_s *dev, int nbits) { - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; spiinfo("nbits=%d\n", nbits); @@ -765,7 +763,7 @@ static void esp32_spi_setbits(FAR struct spi_dev_s *dev, int nbits) ****************************************************************************/ #ifdef CONFIG_SPI_HWFEATURES -static int esp32_spi_hwfeatures(FAR struct spi_dev_s *dev, +static int esp32_spi_hwfeatures(struct spi_dev_s *dev, spi_hwfeatures_t features) { /* Other H/W features are not supported */ @@ -795,9 +793,9 @@ static int esp32_spi_hwfeatures(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void esp32_spi_dma_exchange(FAR struct esp32_spi_priv_s *priv, - FAR const void *txbuffer, - FAR void *rxbuffer, +static void esp32_spi_dma_exchange(struct esp32_spi_priv_s *priv, + const void *txbuffer, + void *rxbuffer, uint32_t nwords) { const uint32_t total = nwords * (priv->nbits / 8); @@ -949,7 +947,7 @@ static void esp32_spi_dma_exchange(FAR struct esp32_spi_priv_s *priv, * ****************************************************************************/ -static uint32_t esp32_spi_poll_send(FAR struct esp32_spi_priv_s *priv, +static uint32_t esp32_spi_poll_send(struct esp32_spi_priv_s *priv, uint32_t wd) { uint32_t val; @@ -993,9 +991,9 @@ static uint32_t esp32_spi_poll_send(FAR struct esp32_spi_priv_s *priv, * ****************************************************************************/ -static uint32_t esp32_spi_send(FAR struct spi_dev_s *dev, uint32_t wd) +static uint32_t esp32_spi_send(struct spi_dev_s *dev, uint32_t wd) { - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; return esp32_spi_poll_send(priv, wd); } @@ -1021,9 +1019,9 @@ static uint32_t esp32_spi_send(FAR struct spi_dev_s *dev, uint32_t wd) * ****************************************************************************/ -static void esp32_spi_poll_exchange(FAR struct esp32_spi_priv_s *priv, - FAR const void *txbuffer, - FAR void *rxbuffer, +static void esp32_spi_poll_exchange(struct esp32_spi_priv_s *priv, + const void *txbuffer, + void *rxbuffer, size_t nwords) { const uintptr_t spi_user_reg = SPI_USER_REG(priv->config->id); @@ -1149,12 +1147,12 @@ static void esp32_spi_poll_exchange(FAR struct esp32_spi_priv_s *priv, * ****************************************************************************/ -static void esp32_spi_exchange(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, - FAR void *rxbuffer, +static void esp32_spi_exchange(struct spi_dev_s *dev, + const void *txbuffer, + void *rxbuffer, size_t nwords) { - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; #ifdef CONFIG_ESP32_SPI_DMATHRESHOLD size_t thld = CONFIG_ESP32_SPI_DMATHRESHOLD; @@ -1194,8 +1192,8 @@ static void esp32_spi_exchange(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void esp32_spi_sndblock(FAR struct spi_dev_s *dev, - FAR const void *txbuffer, +static void esp32_spi_sndblock(struct spi_dev_s *dev, + const void *txbuffer, size_t nwords) { spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords); @@ -1223,8 +1221,8 @@ static void esp32_spi_sndblock(FAR struct spi_dev_s *dev, * ****************************************************************************/ -static void esp32_spi_recvblock(FAR struct spi_dev_s *dev, - FAR void *rxbuffer, +static void esp32_spi_recvblock(struct spi_dev_s *dev, + void *rxbuffer, size_t nwords) { spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords); @@ -1250,7 +1248,7 @@ static void esp32_spi_recvblock(FAR struct spi_dev_s *dev, ****************************************************************************/ #ifdef CONFIG_SPI_TRIGGER -static int esp32_spi_trigger(FAR struct spi_dev_s *dev) +static int esp32_spi_trigger(struct spi_dev_s *dev) { return -ENOSYS; } @@ -1270,9 +1268,9 @@ static int esp32_spi_trigger(FAR struct spi_dev_s *dev) * ****************************************************************************/ -static void esp32_spi_init(FAR struct spi_dev_s *dev) +static void esp32_spi_init(struct spi_dev_s *dev) { - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; const struct esp32_spi_config_s *config = priv->config; uint32_t regval; @@ -1374,9 +1372,9 @@ static void esp32_spi_init(FAR struct spi_dev_s *dev) * ****************************************************************************/ -static void esp32_spi_deinit(FAR struct spi_dev_s *dev) +static void esp32_spi_deinit(struct spi_dev_s *dev) { - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; if (priv->config->use_dma) { @@ -1406,9 +1404,9 @@ static void esp32_spi_deinit(FAR struct spi_dev_s *dev) * ****************************************************************************/ -static int esp32_spi_interrupt(int irq, void *context, FAR void *arg) +static int esp32_spi_interrupt(int irq, void *context, void *arg) { - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)arg; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)arg; esp32_spi_reset_regbits(SPI_SLAVE_REG(priv->config->id), SPI_TRANS_DONE_M); nxsem_post(&priv->sem_isr); @@ -1430,22 +1428,22 @@ static int esp32_spi_interrupt(int irq, void *context, FAR void *arg) * ****************************************************************************/ -FAR struct spi_dev_s *esp32_spibus_initialize(int port) +struct spi_dev_s *esp32_spibus_initialize(int port) { int ret; - FAR struct spi_dev_s *spi_dev; - FAR struct esp32_spi_priv_s *priv; + struct spi_dev_s *spi_dev; + struct esp32_spi_priv_s *priv; irqstate_t flags; switch (port) { #ifdef CONFIG_ESP32_SPI2 - case 2: + case ESP32_SPI2: priv = &esp32_spi2_priv; break; #endif #ifdef CONFIG_ESP32_SPI3 - case 3: + case ESP32_SPI3: priv = &esp32_spi3_priv; break; #endif @@ -1453,7 +1451,7 @@ FAR struct spi_dev_s *esp32_spibus_initialize(int port) return NULL; } - spi_dev = (FAR struct spi_dev_s *)priv; + spi_dev = (struct spi_dev_s *)priv; flags = enter_critical_section(); @@ -1466,30 +1464,28 @@ FAR struct spi_dev_s *esp32_spibus_initialize(int port) if (priv->config->use_dma) { - priv->cpuint = esp32_alloc_levelint(1); + /* Set up to receive peripheral interrupts on the current CPU */ + + priv->cpu = up_cpu_index(); + priv->cpuint = esp32_setup_irq(priv->cpu, priv->config->periph, + 1, ESP32_CPUINT_LEVEL); if (priv->cpuint < 0) { leave_critical_section(flags); return NULL; } - up_disable_irq(priv->cpuint); - esp32_attach_peripheral(priv->config->cpu, - priv->config->periph, - priv->cpuint); ret = irq_attach(priv->config->irq, esp32_spi_interrupt, priv); if (ret != OK) { - esp32_detach_peripheral(priv->config->cpu, - priv->config->periph, - priv->cpuint); - esp32_free_cpuint(priv->cpuint); - + esp32_teardown_irq(priv->cpu, + priv->config->periph, + priv->cpuint); leave_critical_section(flags); return NULL; } - up_enable_irq(priv->cpuint); + up_enable_irq(priv->config->irq); } esp32_spi_init(spi_dev); @@ -1509,10 +1505,10 @@ FAR struct spi_dev_s *esp32_spibus_initialize(int port) * ****************************************************************************/ -int esp32_spibus_uninitialize(FAR struct spi_dev_s *dev) +int esp32_spibus_uninitialize(struct spi_dev_s *dev) { irqstate_t flags; - FAR struct esp32_spi_priv_s *priv = (FAR struct esp32_spi_priv_s *)dev; + struct esp32_spi_priv_s *priv = (struct esp32_spi_priv_s *)dev; DEBUGASSERT(dev); @@ -1533,11 +1529,10 @@ int esp32_spibus_uninitialize(FAR struct spi_dev_s *dev) if (priv->config->use_dma) { - up_disable_irq(priv->cpuint); - esp32_detach_peripheral(priv->config->cpu, - priv->config->periph, - priv->cpuint); - esp32_free_cpuint(priv->cpuint); + up_disable_irq(priv->config->irq); + esp32_teardown_irq(priv->cpu, + priv->config->periph, + priv->cpuint); nxsem_destroy(&priv->sem_isr); } diff --git a/arch/xtensa/src/esp32/esp32_spi.h b/arch/xtensa/src/esp32/esp32_spi.h index afd3946b8ce..682ab5f9745 100644 --- a/arch/xtensa/src/esp32/esp32_spi.h +++ b/arch/xtensa/src/esp32/esp32_spi.h @@ -46,6 +46,14 @@ extern "C" #include +#ifdef CONFIG_ESP32_SPI2 +# define ESP32_SPI2 2 +#endif + +#ifdef CONFIG_ESP32_SPI3 +# define ESP32_SPI3 3 +#endif + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ @@ -64,7 +72,7 @@ extern "C" * ****************************************************************************/ -FAR struct spi_dev_s *esp32_spibus_initialize(int port); +struct spi_dev_s *esp32_spibus_initialize(int port); /**************************************************************************** * Name: esp32_spi0/1/...select and esp32_spi0/1/...status @@ -97,17 +105,17 @@ FAR struct spi_dev_s *esp32_spibus_initialize(int port); ****************************************************************************/ #ifdef CONFIG_ESP32_SPI2 -void esp32_spi2_select(FAR struct spi_dev_s *dev, uint32_t devid, +void esp32_spi2_select(struct spi_dev_s *dev, uint32_t devid, bool selected); -uint8_t esp32_spi2_status(FAR struct spi_dev_s *dev, uint32_t devid); -int esp32_spi2_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd); +uint8_t esp32_spi2_status(struct spi_dev_s *dev, uint32_t devid); +int esp32_spi2_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd); #endif #ifdef CONFIG_ESP32_SPI3 -void esp32_spi3_select(FAR struct spi_dev_s *dev, uint32_t devid, +void esp32_spi3_select(struct spi_dev_s *dev, uint32_t devid, bool selected); -uint8_t esp32_spi3_status(FAR struct spi_dev_s *dev, uint32_t devid); -int esp32_spi3_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd); +uint8_t esp32_spi3_status(struct spi_dev_s *dev, uint32_t devid); +int esp32_spi3_cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd); #endif /**************************************************************************** @@ -118,7 +126,7 @@ int esp32_spi3_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd); * ****************************************************************************/ -int esp32_spibus_uninitialize(FAR struct spi_dev_s *dev); +int esp32_spibus_uninitialize(struct spi_dev_s *dev); /**************************************************************************** * Name: esp32_spislv_ctrlr_initialize @@ -134,7 +142,7 @@ int esp32_spibus_uninitialize(FAR struct spi_dev_s *dev); * ****************************************************************************/ -FAR struct spi_slave_ctrlr_s *esp32_spislv_ctrlr_initialize(int port); +struct spi_slave_ctrlr_s *esp32_spislv_ctrlr_initialize(int port); /**************************************************************************** * Name: esp32_spislv_ctrlr_uninitialize @@ -150,7 +158,7 @@ FAR struct spi_slave_ctrlr_s *esp32_spislv_ctrlr_initialize(int port); * ****************************************************************************/ -int esp32_spislv_ctrlr_uninitialize(FAR struct spi_slave_ctrlr_s *ctrlr); +int esp32_spislv_ctrlr_uninitialize(struct spi_slave_ctrlr_s *ctrlr); #endif /* CONFIG_ESP32_SPI */ diff --git a/arch/xtensa/src/esp32/esp32_spi_slave.c b/arch/xtensa/src/esp32/esp32_spi_slave.c index e16b6453ea6..269e4276e55 100644 --- a/arch/xtensa/src/esp32/esp32_spi_slave.c +++ b/arch/xtensa/src/esp32/esp32_spi_slave.c @@ -48,7 +48,7 @@ #include "esp32_spi.h" #include "esp32_gpio.h" -#include "esp32_cpuint.h" +#include "esp32_irq.h" #include "esp32_dma.h" #include "xtensa.h" @@ -101,7 +101,6 @@ struct esp32_spislv_config_s uint8_t miso_pin; /* GPIO configuration for MISO */ uint8_t clk_pin; /* GPIO configuration for CLK */ - uint8_t cpu; /* CPU ID */ uint8_t periph; /* peripher ID */ uint8_t irq; /* Interrupt ID */ @@ -136,6 +135,7 @@ struct esp32_spislv_priv_s const struct esp32_spislv_config_s *config; /* Port configuration */ + uint8_t cpu; /* CPU ID */ int cpuint; /* SPI interrupt ID */ enum spi_mode_e mode; /* Actual SPI hardware mode */ @@ -169,23 +169,23 @@ struct esp32_spislv_priv_s * Private Function Prototypes ****************************************************************************/ -static void esp32_spislv_setmode(FAR struct spi_slave_ctrlr_s *ctrlr, +static void esp32_spislv_setmode(struct spi_slave_ctrlr_s *ctrlr, enum spi_mode_e mode); -static void esp32_spislv_setbits(FAR struct spi_slave_ctrlr_s *ctrlr, +static void esp32_spislv_setbits(struct spi_slave_ctrlr_s *ctrlr, int nbits); -static int esp32_spislv_interrupt(int irq, void *context, FAR void *arg); -static void esp32_spislv_initialize(FAR struct spi_slave_ctrlr_s *ctrlr); +static int esp32_spislv_interrupt(int irq, void *context, void *arg); +static void esp32_spislv_initialize(struct spi_slave_ctrlr_s *ctrlr); static void esp32_spislv_bind(struct spi_slave_ctrlr_s *ctrlr, struct spi_slave_dev_s *dev, enum spi_slave_mode_e mode, int nbits); static void esp32_spislv_unbind(struct spi_slave_ctrlr_s *ctrlr); static int esp32_spislv_enqueue(struct spi_slave_ctrlr_s *ctrlr, - FAR const void *data, + const void *data, size_t nwords); static bool esp32_spislv_qfull(struct spi_slave_ctrlr_s *ctrlr); static void esp32_spislv_qflush(struct spi_slave_ctrlr_s *ctrlr); -static size_t esp32_spislv_qpoll(FAR struct spi_slave_ctrlr_s *ctrlr); +static size_t esp32_spislv_qpoll(struct spi_slave_ctrlr_s *ctrlr); /**************************************************************************** * Private Data @@ -200,7 +200,6 @@ static const struct esp32_spislv_config_s esp32_spi2_config = .mosi_pin = CONFIG_ESP32_SPI2_MOSIPIN, .miso_pin = CONFIG_ESP32_SPI2_MISOPIN, .clk_pin = CONFIG_ESP32_SPI2_CLKPIN, - .cpu = 0, .periph = ESP32_PERIPH_SPI2, .irq = ESP32_IRQ_SPI2, .clk_bit = DPORT_SPI_CLK_EN_2, @@ -254,7 +253,6 @@ static const struct esp32_spislv_config_s esp32_spi3_config = .mosi_pin = CONFIG_ESP32_SPI3_MOSIPIN, .miso_pin = CONFIG_ESP32_SPI3_MISOPIN, .clk_pin = CONFIG_ESP32_SPI3_CLKPIN, - .cpu = 0, .periph = ESP32_PERIPH_SPI3, .irq = ESP32_IRQ_SPI3, .clk_bit = DPORT_SPI_CLK_EN, @@ -460,7 +458,7 @@ static inline bool esp32_spi_iomux(struct esp32_spislv_priv_s *priv) * ****************************************************************************/ -static void esp32_spislv_setmode(FAR struct spi_slave_ctrlr_s *ctrlr, +static void esp32_spislv_setmode(struct spi_slave_ctrlr_s *ctrlr, enum spi_mode_e mode) { uint32_t ck_idle_edge; @@ -589,7 +587,7 @@ static void esp32_spislv_setmode(FAR struct spi_slave_ctrlr_s *ctrlr, * ****************************************************************************/ -static void esp32_spislv_setbits(FAR struct spi_slave_ctrlr_s *ctrlr, +static void esp32_spislv_setbits(struct spi_slave_ctrlr_s *ctrlr, int nbits) { struct esp32_spislv_priv_s *priv = (struct esp32_spislv_priv_s *)ctrlr; @@ -616,7 +614,7 @@ static void esp32_spislv_setbits(FAR struct spi_slave_ctrlr_s *ctrlr, * ****************************************************************************/ -static int esp32_io_interrupt(int irq, void *context, FAR void *arg) +static int esp32_io_interrupt(int irq, void *context, void *arg) { struct esp32_spislv_priv_s *priv = (struct esp32_spislv_priv_s *)arg; @@ -757,7 +755,7 @@ static void esp32_spislv_rx(struct esp32_spislv_priv_s *priv) * ****************************************************************************/ -static int esp32_spislv_interrupt(int irq, void *context, FAR void *arg) +static int esp32_spislv_interrupt(int irq, void *context, void *arg) { struct esp32_spislv_priv_s *priv = (struct esp32_spislv_priv_s *)arg; uint32_t n; @@ -848,7 +846,7 @@ static int esp32_spislv_interrupt(int irq, void *context, FAR void *arg) * ****************************************************************************/ -static void esp32_spislv_initialize(FAR struct spi_slave_ctrlr_s *ctrlr) +static void esp32_spislv_initialize(struct spi_slave_ctrlr_s *ctrlr) { struct esp32_spislv_priv_s *priv = (struct esp32_spislv_priv_s *)ctrlr; const struct esp32_spislv_config_s *config = priv->config; @@ -960,7 +958,7 @@ static void esp32_spislv_initialize(FAR struct spi_slave_ctrlr_s *ctrlr) * ****************************************************************************/ -static void esp32_spislv_deinit(FAR struct spi_slave_ctrlr_s *ctrlr) +static void esp32_spislv_deinit(struct spi_slave_ctrlr_s *ctrlr) { struct esp32_spislv_priv_s *priv = (struct esp32_spislv_priv_s *)ctrlr; @@ -1029,7 +1027,7 @@ static void esp32_spislv_bind(struct spi_slave_ctrlr_s *ctrlr, esp32_spislv_setmode(ctrlr, mode); esp32_spislv_setbits(ctrlr, nbits); - up_enable_irq(priv->cpuint); + up_enable_irq(priv->config->irq); esp32_spi_set_regbits(priv, SPI_CMD_OFFSET, SPI_USR_M); @@ -1065,7 +1063,7 @@ static void esp32_spislv_unbind(struct spi_slave_ctrlr_s *ctrlr) flags = enter_critical_section(); - up_disable_irq(priv->cpuint); + up_disable_irq(priv->config->irq); esp32_gpioirqdisable(ESP32_PIN2IRQ(priv->config->cs_pin)); esp32_spi_reset_regbits(priv, SPI_SLAVE_OFFSET, SPI_INT_EN_M); @@ -1103,7 +1101,7 @@ static void esp32_spislv_unbind(struct spi_slave_ctrlr_s *ctrlr) ****************************************************************************/ static int esp32_spislv_enqueue(struct spi_slave_ctrlr_s *ctrlr, - FAR const void *data, + const void *data, size_t nwords) { struct esp32_spislv_priv_s *priv = (struct esp32_spislv_priv_s *)ctrlr; @@ -1219,7 +1217,7 @@ static void esp32_spislv_qflush(struct spi_slave_ctrlr_s *ctrlr) * ****************************************************************************/ -static size_t esp32_spislv_qpoll(FAR struct spi_slave_ctrlr_s *ctrlr) +static size_t esp32_spislv_qpoll(struct spi_slave_ctrlr_s *ctrlr) { struct esp32_spislv_priv_s *priv = (struct esp32_spislv_priv_s *)ctrlr; irqstate_t flags; @@ -1251,11 +1249,11 @@ static size_t esp32_spislv_qpoll(FAR struct spi_slave_ctrlr_s *ctrlr) * ****************************************************************************/ -FAR struct spi_slave_ctrlr_s *esp32_spislv_ctrlr_initialize(int port) +struct spi_slave_ctrlr_s *esp32_spislv_ctrlr_initialize(int port) { int ret; - FAR struct spi_slave_ctrlr_s *spislv_dev; - FAR struct esp32_spislv_priv_s *priv; + struct spi_slave_ctrlr_s *spislv_dev; + struct esp32_spislv_priv_s *priv; irqstate_t flags; switch (port) @@ -1274,7 +1272,7 @@ FAR struct spi_slave_ctrlr_s *esp32_spislv_ctrlr_initialize(int port) return NULL; } - spislv_dev = (FAR struct spi_slave_ctrlr_s *)priv; + spislv_dev = (struct spi_slave_ctrlr_s *)priv; flags = enter_critical_section(); @@ -1298,26 +1296,16 @@ FAR struct spi_slave_ctrlr_s *esp32_spislv_ctrlr_initialize(int port) esp32_io_interrupt, priv)); - priv->cpuint = esp32_alloc_levelint(1); - if (priv->cpuint < 0) - { - leave_critical_section(flags); + /* Set up to receive peripheral interrupts on the current CPU */ - return NULL; - } - - up_disable_irq(priv->cpuint); - esp32_attach_peripheral(priv->config->cpu, - priv->config->periph, - priv->cpuint); + priv->cpu = up_cpu_index(); + priv->cpuint = esp32_setup_irq(priv->cpu, priv->config->periph, + 1, ESP32_CPUINT_LEVEL); ret = irq_attach(priv->config->irq, esp32_spislv_interrupt, priv); if (ret != OK) { - esp32_detach_peripheral(priv->config->cpu, - priv->config->periph, - priv->cpuint); - esp32_free_cpuint(priv->cpuint); + esp32_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint); leave_critical_section(flags); @@ -1345,7 +1333,7 @@ FAR struct spi_slave_ctrlr_s *esp32_spislv_ctrlr_initialize(int port) * ****************************************************************************/ -int esp32_spislv_ctrlr_uninitialize(FAR struct spi_slave_ctrlr_s *ctrlr) +int esp32_spislv_ctrlr_uninitialize(struct spi_slave_ctrlr_s *ctrlr) { irqstate_t flags; struct esp32_spislv_priv_s *priv = (struct esp32_spislv_priv_s *)ctrlr; @@ -1365,12 +1353,8 @@ int esp32_spislv_ctrlr_uninitialize(FAR struct spi_slave_ctrlr_s *ctrlr) return OK; } - up_disable_irq(priv->cpuint); - esp32_detach_peripheral(priv->config->cpu, - priv->config->periph, - priv->cpuint); - esp32_free_cpuint(priv->cpuint); - + up_disable_irq(priv->config->irq); + esp32_teardown_irq(priv->cpu, priv->config->periph, priv->cpuint); esp32_spislv_deinit(ctrlr); leave_critical_section(flags); diff --git a/arch/xtensa/src/esp32/esp32_spiflash.c b/arch/xtensa/src/esp32/esp32_spiflash.c index 877d0eab55a..295bfecffa2 100644 --- a/arch/xtensa/src/esp32/esp32_spiflash.c +++ b/arch/xtensa/src/esp32/esp32_spiflash.c @@ -71,10 +71,7 @@ #define SPI_FLASH_ENCRYPT_WORDS (32 / 4) #define SPI_FLASH_ERASED_STATE (0xff) -#define ESP32_MTD_OFFSET CONFIG_ESP32_MTD_OFFSET -#define ESP32_MTD_SIZE CONFIG_ESP32_MTD_SIZE - -#define MTD2PRIV(_dev) ((FAR struct esp32_spiflash_s *)_dev) +#define MTD2PRIV(_dev) ((struct esp32_spiflash_s *)_dev) #define MTD_SIZE(_priv) ((_priv)->chip->chip_size) #define MTD_BLKSIZE(_priv) ((_priv)->chip->page_size) #define MTD_ERASESIZE(_priv) ((_priv)->chip->sector_size) @@ -93,9 +90,6 @@ # define MIN(a, b) (((a) < (b)) ? (a) : (b)) #endif -#define DPORT_INTERRUPT_DISABLE() -#define DPORT_INTERRUPT_RESTORE() - /* Flash MMU table for PRO CPU */ #define PRO_MMU_TABLE ((volatile uint32_t *)DPORT_PRO_FLASH_MMU_TABLE_REG) @@ -195,63 +189,63 @@ static inline void spi_reset_regbits(struct esp32_spiflash_s *priv, /* Misc. helpers */ static inline void IRAM_ATTR - esp32_spiflash_opstart(FAR struct spiflash_cachestate_s *state); + esp32_spiflash_opstart(struct spiflash_cachestate_s *state); static inline void IRAM_ATTR - esp32_spiflash_opdone(FAR const struct spiflash_cachestate_s *state); + esp32_spiflash_opdone(const struct spiflash_cachestate_s *state); static bool IRAM_ATTR spiflash_pagecached(uint32_t phypage); static void IRAM_ATTR spiflash_flushmapped(size_t start, size_t size); /* Flash helpers */ -static void IRAM_ATTR esp32_set_read_opt(FAR struct esp32_spiflash_s *priv); +static void IRAM_ATTR esp32_set_read_opt(struct esp32_spiflash_s *priv); static void IRAM_ATTR esp32_set_write_opt(struct esp32_spiflash_s *priv); -static int IRAM_ATTR esp32_read_status(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_read_status(struct esp32_spiflash_s *priv, uint32_t *status); -static int IRAM_ATTR esp32_wait_idle(FAR struct esp32_spiflash_s *priv); -static int IRAM_ATTR esp32_enable_write(FAR struct esp32_spiflash_s *priv); -static int IRAM_ATTR esp32_erasesector(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_wait_idle(struct esp32_spiflash_s *priv); +static int IRAM_ATTR esp32_enable_write(struct esp32_spiflash_s *priv); +static int IRAM_ATTR esp32_erasesector(struct esp32_spiflash_s *priv, uint32_t addr, uint32_t size); -static int IRAM_ATTR esp32_writedata(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_writedata(struct esp32_spiflash_s *priv, uint32_t addr, const uint8_t *buffer, uint32_t size); -static int IRAM_ATTR esp32_readdata(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_readdata(struct esp32_spiflash_s *priv, uint32_t addr, uint8_t *buffer, uint32_t size); #if 0 -static int esp32_read_highstatus(FAR struct esp32_spiflash_s *priv, +static int esp32_read_highstatus(struct esp32_spiflash_s *priv, uint32_t *status); #endif #if 0 -static int esp32_write_status(FAR struct esp32_spiflash_s *priv, +static int esp32_write_status(struct esp32_spiflash_s *priv, uint32_t status); #endif /* MTD driver methods */ -static int esp32_erase(FAR struct mtd_dev_s *dev, off_t startblock, +static int esp32_erase(struct mtd_dev_s *dev, off_t startblock, size_t nblocks); -static ssize_t esp32_read(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR uint8_t *buffer); -static ssize_t esp32_read_decrypt(FAR struct mtd_dev_s *dev, +static ssize_t esp32_read(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, uint8_t *buffer); +static ssize_t esp32_read_decrypt(struct mtd_dev_s *dev, off_t offset, size_t nbytes, - FAR uint8_t *buffer); -static ssize_t esp32_bread(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR uint8_t *buffer); -static ssize_t esp32_bread_decrypt(FAR struct mtd_dev_s *dev, + uint8_t *buffer); +static ssize_t esp32_bread(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, uint8_t *buffer); +static ssize_t esp32_bread_decrypt(struct mtd_dev_s *dev, off_t startblock, size_t nblocks, - FAR uint8_t *buffer); -static ssize_t esp32_write(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR const uint8_t *buffer); -static ssize_t esp32_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR const uint8_t *buffer); -static ssize_t esp32_bwrite_encrypt(FAR struct mtd_dev_s *dev, + uint8_t *buffer); +static ssize_t esp32_write(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, const uint8_t *buffer); +static ssize_t esp32_bwrite(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, const uint8_t *buffer); +static ssize_t esp32_bwrite_encrypt(struct mtd_dev_s *dev, off_t startblock, size_t nblocks, - FAR const uint8_t *buffer); -static int esp32_ioctl(FAR struct mtd_dev_s *dev, int cmd, + const uint8_t *buffer); +static int esp32_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg); /**************************************************************************** @@ -409,7 +403,7 @@ static inline void spi_reset_regbits(struct esp32_spiflash_s *priv, ****************************************************************************/ static inline void IRAM_ATTR - esp32_spiflash_opstart(FAR struct spiflash_cachestate_s *state) + esp32_spiflash_opstart(struct spiflash_cachestate_s *state) { #ifdef CONFIG_SMP int other; @@ -429,7 +423,7 @@ static inline void IRAM_ATTR spi_disable_cache(state->cpu, &state->val[state->cpu]); #ifdef CONFIG_SMP - spi_disable_cache(state->cpu, &state->val[other]); + spi_disable_cache(other, &state->val[other]); #endif } @@ -442,7 +436,7 @@ static inline void IRAM_ATTR ****************************************************************************/ static inline void IRAM_ATTR - esp32_spiflash_opdone(FAR const struct spiflash_cachestate_s *state) + esp32_spiflash_opdone(const struct spiflash_cachestate_s *state) { #ifdef CONFIG_SMP int other; @@ -561,7 +555,7 @@ static void IRAM_ATTR spiflash_flushmapped(size_t start, size_t size) * ****************************************************************************/ -static void IRAM_ATTR esp32_set_read_opt(FAR struct esp32_spiflash_s *priv) +static void IRAM_ATTR esp32_set_read_opt(struct esp32_spiflash_s *priv) { uint32_t regval; uint32_t ctrl; @@ -701,7 +695,7 @@ static void IRAM_ATTR esp32_set_write_opt(struct esp32_spiflash_s *priv) * ****************************************************************************/ -static int IRAM_ATTR esp32_read_status(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_read_status(struct esp32_spiflash_s *priv, uint32_t *status) { esp32_spiflash_chip_t *chip = priv->chip; @@ -755,7 +749,7 @@ static int IRAM_ATTR esp32_read_status(FAR struct esp32_spiflash_s *priv, * ****************************************************************************/ -static int IRAM_ATTR esp32_wait_idle(FAR struct esp32_spiflash_s *priv) +static int IRAM_ATTR esp32_wait_idle(struct esp32_spiflash_s *priv) { uint32_t status; @@ -793,7 +787,7 @@ static int IRAM_ATTR esp32_wait_idle(FAR struct esp32_spiflash_s *priv) ****************************************************************************/ #if 0 -static int esp32_read_highstatus(FAR struct esp32_spiflash_s *priv, +static int esp32_read_highstatus(struct esp32_spiflash_s *priv, uint32_t *status) { uint32_t regval; @@ -830,7 +824,7 @@ static int esp32_read_highstatus(FAR struct esp32_spiflash_s *priv, ****************************************************************************/ #if 0 -static int esp32_write_status(FAR struct esp32_spiflash_s *priv, +static int esp32_write_status(struct esp32_spiflash_s *priv, uint32_t status) { if (esp32_wait_idle(priv)) @@ -868,7 +862,7 @@ static int esp32_write_status(FAR struct esp32_spiflash_s *priv, * ****************************************************************************/ -static int IRAM_ATTR esp32_enable_write(FAR struct esp32_spiflash_s *priv) +static int IRAM_ATTR esp32_enable_write(struct esp32_spiflash_s *priv) { uint32_t flags; uint32_t regval; @@ -914,7 +908,7 @@ static int IRAM_ATTR esp32_enable_write(FAR struct esp32_spiflash_s *priv) * ****************************************************************************/ -static int IRAM_ATTR esp32_erasesector(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_erasesector(struct esp32_spiflash_s *priv, uint32_t addr, uint32_t size) { uint32_t offset; @@ -979,7 +973,7 @@ static int IRAM_ATTR esp32_erasesector(FAR struct esp32_spiflash_s *priv, * ****************************************************************************/ -static int IRAM_ATTR esp32_writeonce(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_writeonce(struct esp32_spiflash_s *priv, uint32_t addr, const uint32_t *buffer, uint32_t size) @@ -1049,7 +1043,7 @@ static int IRAM_ATTR esp32_writeonce(FAR struct esp32_spiflash_s *priv, * ****************************************************************************/ -static int IRAM_ATTR esp32_writedata(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_writedata(struct esp32_spiflash_s *priv, uint32_t addr, const uint8_t *buffer, uint32_t size) @@ -1117,7 +1111,7 @@ static int IRAM_ATTR esp32_writedata(FAR struct esp32_spiflash_s *priv, ****************************************************************************/ static int IRAM_ATTR esp32_writedata_encrypted( - FAR struct esp32_spiflash_s *priv, + struct esp32_spiflash_s *priv, uint32_t addr, const uint8_t *buffer, uint32_t size) @@ -1206,7 +1200,7 @@ exit: * ****************************************************************************/ -static int IRAM_ATTR esp32_readonce(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_readonce(struct esp32_spiflash_s *priv, uint32_t addr, uint32_t *buffer, uint32_t size) @@ -1268,7 +1262,7 @@ static int IRAM_ATTR esp32_readonce(FAR struct esp32_spiflash_s *priv, * ****************************************************************************/ -static int IRAM_ATTR esp32_readdata(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_readdata(struct esp32_spiflash_s *priv, uint32_t addr, uint8_t *buffer, uint32_t size) @@ -1321,7 +1315,7 @@ static int IRAM_ATTR esp32_readdata(FAR struct esp32_spiflash_s *priv, * ****************************************************************************/ -static int IRAM_ATTR esp32_mmap(FAR struct esp32_spiflash_s *priv, +static int IRAM_ATTR esp32_mmap(struct esp32_spiflash_s *priv, struct spiflash_map_req *req) { int ret; @@ -1405,7 +1399,7 @@ static int IRAM_ATTR esp32_mmap(FAR struct esp32_spiflash_s *priv, * ****************************************************************************/ -static void IRAM_ATTR esp32_ummap(FAR struct esp32_spiflash_s *priv, +static void IRAM_ATTR esp32_ummap(struct esp32_spiflash_s *priv, const struct spiflash_map_req *req) { int i; @@ -1450,7 +1444,7 @@ static void IRAM_ATTR esp32_ummap(FAR struct esp32_spiflash_s *priv, ****************************************************************************/ static int IRAM_ATTR esp32_readdata_encrypted( - FAR struct esp32_spiflash_s *priv, + struct esp32_spiflash_s *priv, uint32_t addr, uint8_t *buffer, uint32_t size) @@ -1491,11 +1485,11 @@ static int IRAM_ATTR esp32_readdata_encrypted( * ****************************************************************************/ -static int esp32_erase(FAR struct mtd_dev_s *dev, off_t startblock, +static int esp32_erase(struct mtd_dev_s *dev, off_t startblock, size_t nblocks) { int ret; - FAR struct esp32_spiflash_s *priv = MTD2PRIV(dev); + struct esp32_spiflash_s *priv = MTD2PRIV(dev); uint32_t addr = startblock * MTD_ERASESIZE(priv); uint32_t size = nblocks * MTD_ERASESIZE(priv); @@ -1547,11 +1541,11 @@ static int esp32_erase(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -static ssize_t esp32_read(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR uint8_t *buffer) +static ssize_t esp32_read(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, uint8_t *buffer) { int ret; - FAR struct esp32_spiflash_s *priv = MTD2PRIV(dev); + struct esp32_spiflash_s *priv = MTD2PRIV(dev); #ifdef CONFIG_ESP32_SPIFLASH_DEBUG finfo("esp32_read(%p, 0x%x, %d, %p)\n", dev, offset, nbytes, buffer); @@ -1601,11 +1595,11 @@ error_with_buffer: * ****************************************************************************/ -static ssize_t esp32_bread(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR uint8_t *buffer) +static ssize_t esp32_bread(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, uint8_t *buffer) { int ret; - FAR struct esp32_spiflash_s *priv = MTD2PRIV(dev); + struct esp32_spiflash_s *priv = MTD2PRIV(dev); uint32_t addr = MTD_BLK2SIZE(priv, startblock); uint32_t size = MTD_BLK2SIZE(priv, nblocks); @@ -1645,14 +1639,14 @@ static ssize_t esp32_bread(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -static ssize_t esp32_read_decrypt(FAR struct mtd_dev_s *dev, +static ssize_t esp32_read_decrypt(struct mtd_dev_s *dev, off_t offset, size_t nbytes, - FAR uint8_t *buffer) + uint8_t *buffer) { int ret; uint8_t *tmpbuff = buffer; - FAR struct esp32_spiflash_s *priv = MTD2PRIV(dev); + struct esp32_spiflash_s *priv = MTD2PRIV(dev); #ifdef CONFIG_ESP32_SPIFLASH_DEBUG finfo("esp32_read_decrypt(%p, 0x%x, %d, %p)\n", @@ -1702,13 +1696,13 @@ error_with_buffer: * ****************************************************************************/ -static ssize_t esp32_bread_decrypt(FAR struct mtd_dev_s *dev, +static ssize_t esp32_bread_decrypt(struct mtd_dev_s *dev, off_t startblock, size_t nblocks, - FAR uint8_t *buffer) + uint8_t *buffer) { int ret; - FAR struct esp32_spiflash_s *priv = MTD2PRIV(dev); + struct esp32_spiflash_s *priv = MTD2PRIV(dev); uint32_t addr = MTD_BLK2SIZE(priv, startblock); uint32_t size = MTD_BLK2SIZE(priv, nblocks); @@ -1747,11 +1741,11 @@ static ssize_t esp32_bread_decrypt(FAR struct mtd_dev_s *dev, * ****************************************************************************/ -static ssize_t esp32_write(FAR struct mtd_dev_s *dev, off_t offset, - size_t nbytes, FAR const uint8_t *buffer) +static ssize_t esp32_write(struct mtd_dev_s *dev, off_t offset, + size_t nbytes, const uint8_t *buffer) { int ret; - FAR struct esp32_spiflash_s *priv = MTD2PRIV(dev); + struct esp32_spiflash_s *priv = MTD2PRIV(dev); ASSERT(buffer); @@ -1808,11 +1802,11 @@ error_with_buffer: * ****************************************************************************/ -static ssize_t esp32_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, - size_t nblocks, FAR const uint8_t *buffer) +static ssize_t esp32_bwrite(struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, const uint8_t *buffer) { ssize_t ret; - FAR struct esp32_spiflash_s *priv = MTD2PRIV(dev); + struct esp32_spiflash_s *priv = MTD2PRIV(dev); uint32_t addr = MTD_BLK2SIZE(priv, startblock); uint32_t size = MTD_BLK2SIZE(priv, nblocks); @@ -1852,13 +1846,13 @@ static ssize_t esp32_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, * ****************************************************************************/ -static ssize_t esp32_bwrite_encrypt(FAR struct mtd_dev_s *dev, +static ssize_t esp32_bwrite_encrypt(struct mtd_dev_s *dev, off_t startblock, size_t nblocks, - FAR const uint8_t *buffer) + const uint8_t *buffer) { ssize_t ret; - FAR struct esp32_spiflash_s *priv = MTD2PRIV(dev); + struct esp32_spiflash_s *priv = MTD2PRIV(dev); uint32_t addr = MTD_BLK2SIZE(priv, startblock); uint32_t size = MTD_BLK2SIZE(priv, nblocks); @@ -1907,11 +1901,11 @@ error_with_buffer: * ****************************************************************************/ -static int esp32_ioctl(FAR struct mtd_dev_s *dev, int cmd, +static int esp32_ioctl(struct mtd_dev_s *dev, int cmd, unsigned long arg) { int ret = -EINVAL; - FAR struct esp32_spiflash_s *priv = MTD2PRIV(dev); + struct esp32_spiflash_s *priv = MTD2PRIV(dev); finfo("cmd: %d \n", cmd); @@ -1919,7 +1913,7 @@ static int esp32_ioctl(FAR struct mtd_dev_s *dev, int cmd, { case MTDIOC_GEOMETRY: { - FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)arg; + struct mtd_geometry_s *geo = (struct mtd_geometry_s *)arg; if (geo) { geo->blocksize = MTD_BLKSIZE(priv); @@ -1935,8 +1929,8 @@ static int esp32_ioctl(FAR struct mtd_dev_s *dev, int cmd, case BIOC_PARTINFO: { - FAR struct partition_info_s *info = - (FAR struct partition_info_s *)arg; + struct partition_info_s *info = + (struct partition_info_s *)arg; if (info != NULL) { info->numsectors = MTD_SIZE(priv) / MTD_BLKSIZE(priv); @@ -1950,7 +1944,7 @@ static int esp32_ioctl(FAR struct mtd_dev_s *dev, int cmd, case MTDIOC_ERASESTATE: { - FAR uint8_t *result = (FAR uint8_t *)arg; + uint8_t *result = (uint8_t *)arg; *result = SPI_FLASH_ERASED_STATE; ret = OK; @@ -1974,28 +1968,30 @@ static int esp32_ioctl(FAR struct mtd_dev_s *dev, int cmd, * Name: esp32_spiflash_alloc_mtdpart * * Description: - * Alloc ESP32 SPI Flash MTD + * Allocate an MTD partition from the ESP32 SPI Flash. * * Input Parameters: - * None + * mtd_offset - MTD Partition offset from the base address in SPI Flash. + * mtd_size - Size for the MTD partition. * * Returned Value: * ESP32 SPI Flash MTD data pointer if success or NULL if fail * ****************************************************************************/ -FAR struct mtd_dev_s *esp32_spiflash_alloc_mtdpart(void) +struct mtd_dev_s *esp32_spiflash_alloc_mtdpart(uint32_t mtd_offset, + uint32_t mtd_size) { struct esp32_spiflash_s *priv = &g_esp32_spiflash1; esp32_spiflash_chip_t *chip = priv->chip; - FAR struct mtd_dev_s *mtd_part; + struct mtd_dev_s *mtd_part; uint32_t blocks; uint32_t startblock; uint32_t size; - ASSERT((ESP32_MTD_OFFSET + ESP32_MTD_SIZE) <= chip->chip_size); - ASSERT((ESP32_MTD_OFFSET % chip->sector_size) == 0); - ASSERT((ESP32_MTD_SIZE % chip->sector_size) == 0); + ASSERT((mtd_offset + mtd_size) <= chip->chip_size); + ASSERT((mtd_offset % chip->sector_size) == 0); + ASSERT((mtd_size % chip->sector_size) == 0); finfo("ESP32 SPI Flash information:\n"); finfo("\tID = 0x%x\n", chip->device_id); @@ -2005,16 +2001,19 @@ FAR struct mtd_dev_s *esp32_spiflash_alloc_mtdpart(void) finfo("\tSector size = %d KB\n", chip->sector_size / 1024); finfo("\tBlock size = %d KB\n", chip->block_size / 1024); -#if ESP32_MTD_SIZE == 0 - size = chip->chip_size - ESP32_MTD_OFFSET; -#else - size = ESP32_MTD_SIZE; -#endif + if (mtd_size == 0) + { + size = chip->chip_size - mtd_offset; + } + else + { + size = mtd_size; + } - finfo("\tMTD offset = 0x%x\n", ESP32_MTD_OFFSET); + finfo("\tMTD offset = 0x%x\n", mtd_offset); finfo("\tMTD size = 0x%x\n", size); - startblock = MTD_SIZE2BLK(priv, ESP32_MTD_OFFSET); + startblock = MTD_SIZE2BLK(priv, mtd_offset); blocks = MTD_SIZE2BLK(priv, size); mtd_part = mtd_partition(&priv->mtd, startblock, blocks); @@ -2041,7 +2040,7 @@ FAR struct mtd_dev_s *esp32_spiflash_alloc_mtdpart(void) * ****************************************************************************/ -FAR struct mtd_dev_s *esp32_spiflash_get_mtd(void) +struct mtd_dev_s *esp32_spiflash_get_mtd(void) { struct esp32_spiflash_s *priv = &g_esp32_spiflash1; @@ -2062,7 +2061,7 @@ FAR struct mtd_dev_s *esp32_spiflash_get_mtd(void) * ****************************************************************************/ -FAR struct mtd_dev_s *esp32_spiflash_encrypt_get_mtd(void) +struct mtd_dev_s *esp32_spiflash_encrypt_get_mtd(void) { struct esp32_spiflash_s *priv = &g_esp32_spiflash1_encrypt; diff --git a/arch/xtensa/src/esp32/esp32_spiflash.h b/arch/xtensa/src/esp32/esp32_spiflash.h index cda155d8f19..b814e18c05b 100644 --- a/arch/xtensa/src/esp32/esp32_spiflash.h +++ b/arch/xtensa/src/esp32/esp32_spiflash.h @@ -49,20 +49,22 @@ extern "C" ****************************************************************************/ /**************************************************************************** - * Name: esp32_spiflash_init + * Name: esp32_spiflash_alloc_mtdpart * * Description: - * Alloc ESP32 SPI Flash MTD. + * Allocate an MTD partition from the ESP32 SPI Flash. * * Input Parameters: - * None + * mtd_offset - MTD Partition offset from the base address in SPI Flash. + * mtd_size - Size for the MTD partition. * * Returned Value: * ESP32 SPI Flash MTD data pointer if success or NULL if fail. * ****************************************************************************/ -FAR struct mtd_dev_s *esp32_spiflash_alloc_mtdpart(void); +struct mtd_dev_s *esp32_spiflash_alloc_mtdpart(uint32_t mtd_offset, + uint32_t mtd_size); /**************************************************************************** * Name: esp32_spiflash_get_mtd @@ -78,10 +80,10 @@ FAR struct mtd_dev_s *esp32_spiflash_alloc_mtdpart(void); * ****************************************************************************/ -FAR struct mtd_dev_s *esp32_spiflash_get_mtd(void); +struct mtd_dev_s *esp32_spiflash_get_mtd(void); /**************************************************************************** - * Name: esp32_spiflash_get_mtd + * Name: esp32_spiflash_encrypt_get_mtd * * Description: * Get ESP32 SPI Flash encryption raw MTD. @@ -94,7 +96,7 @@ FAR struct mtd_dev_s *esp32_spiflash_get_mtd(void); * ****************************************************************************/ -FAR struct mtd_dev_s *esp32_spiflash_encrypt_get_mtd(void); +struct mtd_dev_s *esp32_spiflash_encrypt_get_mtd(void); #ifdef __cplusplus } diff --git a/arch/xtensa/src/esp32/esp32_spiram.c b/arch/xtensa/src/esp32/esp32_spiram.c index 4276219cbd3..c2b9f358e55 100644 --- a/arch/xtensa/src/esp32/esp32_spiram.c +++ b/arch/xtensa/src/esp32/esp32_spiram.c @@ -47,10 +47,6 @@ * Pre-processor Definitions ****************************************************************************/ -#ifndef MIN -#define MIN(a, b) (((a) < (b)) ? (a) : (b)) -#endif - #ifndef CONFIG_SMP # define PSRAM_MODE PSRAM_VADDR_MODE_NORMAL #else @@ -61,10 +57,6 @@ #endif #endif -/**************************************************************************** - * Private Data - ****************************************************************************/ - /* Let's to assume SPIFLASH SPEED == SPIRAM SPEED for now */ #if defined(CONFIG_ESP32_SPIRAM_SPEED_40M) @@ -75,25 +67,11 @@ # error "FLASH speed can only be equal to or higher than SRAM speed while SRAM is enabled!" #endif -#if defined(CONFIG_BOOT_SDRAM_DATA) -extern uint8_t _ext_ram_bss_start; -extern uint8_t _ext_ram_bss_end; -#endif -static bool spiram_inited = false; - /**************************************************************************** - * Private Functions + * Private Data ****************************************************************************/ -/* If no function in esp_himem.c is used, this function will be linked into - * the binary instead of the one in esp_himem.c, automatically making sure - * no memory is reserved if no himem function is used. - */ - -size_t __attribute__((weak)) esp_himem_reserved_area_size(void) -{ - return 0; -} +static bool spiram_inited = false; /**************************************************************************** * Public Functions @@ -324,58 +302,6 @@ int esp_spiram_init(void) return OK; } -#if 0 -/* DMA is not supported yet */ - -static uint8_t *dma_heap; - -int esp_spiram_reserve_dma_pool(size_t size) -{ - minfo("Reserving pool of %dK of internal memory for DMA/internal\ - allocations", size / 1024); - - /* Pool may be allocated in multiple non-contiguous chunks, depending on - * available RAM - */ - - while (size > 0) - { - size_t next_size = heap_caps_get_largest_free_block(MALLOC_CAP_DMA | - MALLOC_CAP_INTERNAL); - - next_size = MIN(next_size, size); - - minfo("Allocating block of size %d bytes", next_size); - - dma_heap = heap_caps_malloc(next_size, MALLOC_CAP_DMA | - MALLOC_CAP_INTERNAL); - - if (!dma_heap || next_size == 0) - { - return ESP_ERR_NO_MEM; - } - - uint32_t caps[] = - { - 0, MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL, - MALLOC_CAP_8BIT | MALLOC_CAP_32BIT - }; - - int e = heap_caps_add_region_with_caps(caps, (intptr_t) dma_heap, - (intptr_t) dma_heap + next_size - 1); - - if (e != ESP_OK) - { - return e; - } - - size -= next_size; - } - - return OK; -} -#endif - size_t esp_spiram_get_size(void) { int size = esp_spiram_get_chip_size(); diff --git a/arch/xtensa/src/esp32/esp32_spiram.h b/arch/xtensa/src/esp32/esp32_spiram.h index 28734a9f16b..3ae3e27aa88 100644 --- a/arch/xtensa/src/esp32/esp32_spiram.h +++ b/arch/xtensa/src/esp32/esp32_spiram.h @@ -30,6 +30,10 @@ #include #include "xtensa_attr.h" +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + #define ESP_SPIRAM_SIZE_16MBITS 0 /* SPI RAM size is 16 MBits */ #define ESP_SPIRAM_SIZE_32MBITS 1 /* SPI RAM size is 32 MBits */ #define ESP_SPIRAM_SIZE_64MBITS 2 /* SPI RAM size is 64 MBits */ @@ -74,6 +78,10 @@ #define SRAM_MMU_EDGE_CHECK(mmu_val,num,psize) (((mmu_val) + (num)) > ((8*1024)/(psize))) +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ + /* Description: get SPI RAM size * return * - ESP_SPIRAM_SIZE_INVALID if SPI RAM not enabled or not valid diff --git a/arch/xtensa/src/esp32/esp32_start.c b/arch/xtensa/src/esp32/esp32_start.c index 6d97e54db16..ee4ec46a3c5 100644 --- a/arch/xtensa/src/esp32/esp32_start.c +++ b/arch/xtensa/src/esp32/esp32_start.c @@ -40,17 +40,88 @@ #include "esp32_region.h" #include "esp32_start.h" #include "esp32_spiram.h" +#include "esp32_wdt.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ #ifdef CONFIG_DEBUG_FEATURES -# define showprogress(c) up_puts(c) +# define showprogress(c) up_puts(c) #else # define showprogress(c) #endif +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT + +#define PRIMARY_SLOT_OFFSET CONFIG_ESP32_OTA_PRIMARY_SLOT_OFFSET + +#define HDR_ATTR __attribute__((section(".entry_addr"))) \ + __attribute__((used)) + +/* Cache MMU block size */ + +#define MMU_BLOCK_SIZE 0x00010000 /* 64 KB */ + +/* Cache MMU address mask (MMU tables ignore bits which are zero) */ + +#define MMU_FLASH_MASK (~(MMU_BLOCK_SIZE - 1)) + +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT +extern uint32_t _image_irom_vma; +extern uint32_t _image_irom_lma; +extern uint32_t _image_irom_size; + +extern uint32_t _image_drom_vma; +extern uint32_t _image_drom_lma; +extern uint32_t _image_drom_size; +#endif + +/**************************************************************************** + * ROM Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT +extern int ets_printf(const char *fmt, ...); +extern void cache_read_enable(int cpu); +extern void cache_read_disable(int cpu); +extern void cache_flush(int cpu); +extern unsigned int cache_flash_mmu_set(int cpu_no, int pid, + unsigned int vaddr, + unsigned int paddr, + int psize, int num); +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT +noreturn_function void __start(void); +#endif + +/**************************************************************************** + * Public Functions Prototypes + ****************************************************************************/ + +#ifndef CONFIG_SUPPRESS_UART_CONFIG +extern void esp32_lowsetup(void); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT +HDR_ATTR static void (*_entry_point)(void) = &__start; +#endif + /**************************************************************************** * Public Data ****************************************************************************/ @@ -58,30 +129,13 @@ /* Address of the CPU0 IDLE thread */ uint32_t g_idlestack[IDLETHREAD_STACKWORDS] - __attribute__((aligned(16), section(".noinit"))); + aligned_data(16) locate_data(".noinit"); /**************************************************************************** - * Public Functions + * Private Functions ****************************************************************************/ -#ifndef CONFIG_SUPPRESS_UART_CONFIG -extern void esp32_lowsetup(void); -#endif - -/**************************************************************************** - * Name: __start - * - * Description: - * We arrive here after the bootloader finished loading the program from - * flash. The hardware is mostly uninitialized, and the app CPU is in - * reset. We do have a stack, so we can do the initialization in C. - * - * The app CPU will remain in reset unless CONFIG_SMP is selected and - * up_cpu_start() is called later in the bring-up sequeuence. - * - ****************************************************************************/ - -void IRAM_ATTR __start(void) +static noreturn_function void __esp32_start(void) { uint32_t regval; uint32_t sp; @@ -126,11 +180,7 @@ void IRAM_ATTR __start(void) * start the NuttX environment. */ - putreg32(RTC_CNTL_WDT_WKEY_VALUE, RTC_CNTL_WDTWPROTECT_REG); - regval = getreg32(RTC_CNTL_WDTCONFIG0_REG); - regval &= ~RTC_CNTL_WDT_EN; - putreg32(regval, RTC_CNTL_WDTCONFIG0_REG); - putreg32(0, RTC_CNTL_WDTWPROTECT_REG); + esp32_wdt_early_deinit(); /* Set CPU frequency configured in board.h */ @@ -181,3 +231,136 @@ void IRAM_ATTR __start(void) nx_start(); for (; ; ); /* Should not return */ } + +/**************************************************************************** + * Name: calc_mmu_pages + * + * Description: + * Calculate the number of cache pages to map. + * + * Input Parameters: + * size - Size of data to map + * vaddr - Virtual address where data will be mapped + * + * Returned Value: + * Number of cache MMU pages required to do the mapping. + * + ****************************************************************************/ + +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT +static inline uint32_t calc_mmu_pages(uint32_t size, uint32_t vaddr) +{ + return (size + (vaddr - (vaddr & MMU_FLASH_MASK)) + MMU_BLOCK_SIZE - 1) / + MMU_BLOCK_SIZE; +} +#endif + +/**************************************************************************** + * Name: map_rom_segments + * + * Description: + * Configure the MMU and Cache peripherals for accessing ROM code and data. + * + * Input Parameters: + * None. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT +static int map_rom_segments(void) +{ + uint32_t rc = 0; + uint32_t regval; + uint32_t drom_lma_aligned; + uint32_t drom_vma_aligned; + uint32_t drom_page_count; + uint32_t irom_lma_aligned; + uint32_t irom_vma_aligned; + uint32_t irom_page_count; + + size_t partition_offset = PRIMARY_SLOT_OFFSET; + uint32_t app_irom_lma = partition_offset + (uint32_t)&_image_irom_lma; + uint32_t app_irom_size = (uint32_t)&_image_irom_size; + uint32_t app_irom_vma = (uint32_t)&_image_irom_vma; + uint32_t app_drom_lma = partition_offset + (uint32_t)&_image_drom_lma; + uint32_t app_drom_size = (uint32_t)&_image_drom_size; + uint32_t app_drom_vma = (uint32_t)&_image_drom_vma; + + volatile uint32_t *pro_flash_mmu_table = + (volatile uint32_t *)DPORT_PRO_FLASH_MMU_TABLE_REG; + + cache_read_disable(0); + cache_flush(0); + + /* Clear the MMU entries that are already set up, so the new app only has + * the mappings it creates. + */ + + for (int i = 0; i < DPORT_FLASH_MMU_TABLE_SIZE; i++) + { + putreg32(DPORT_FLASH_MMU_TABLE_INVALID_VAL, pro_flash_mmu_table++); + } + + drom_lma_aligned = app_drom_lma & MMU_FLASH_MASK; + drom_vma_aligned = app_drom_vma & MMU_FLASH_MASK; + drom_page_count = calc_mmu_pages(app_drom_size, app_drom_vma); + rc = cache_flash_mmu_set(0, 0, drom_vma_aligned, drom_lma_aligned, 64, + (int)drom_page_count); + rc |= cache_flash_mmu_set(1, 0, drom_vma_aligned, drom_lma_aligned, 64, + (int)drom_page_count); + + irom_lma_aligned = app_irom_lma & MMU_FLASH_MASK; + irom_vma_aligned = app_irom_vma & MMU_FLASH_MASK; + irom_page_count = calc_mmu_pages(app_irom_size, app_irom_vma); + rc |= cache_flash_mmu_set(0, 0, irom_vma_aligned, irom_lma_aligned, 64, + (int)irom_page_count); + rc |= cache_flash_mmu_set(1, 0, irom_vma_aligned, irom_lma_aligned, 64, + (int)irom_page_count); + + regval = getreg32(DPORT_PRO_CACHE_CTRL1_REG); + regval &= ~(DPORT_PRO_CACHE_MASK_IRAM0 | DPORT_PRO_CACHE_MASK_DROM0 | + DPORT_PRO_CACHE_MASK_DRAM1); + putreg32(regval, DPORT_PRO_CACHE_CTRL1_REG); + + regval = getreg32(DPORT_APP_CACHE_CTRL1_REG); + regval &= ~(DPORT_APP_CACHE_MASK_IRAM0 | DPORT_APP_CACHE_MASK_DROM0 | + DPORT_APP_CACHE_MASK_DRAM1); + putreg32(regval, DPORT_APP_CACHE_CTRL1_REG); + + cache_read_enable(0); + return (int)rc; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: __start + * + * Description: + * We arrive here after the bootloader finished loading the program from + * flash. The hardware is mostly uninitialized, and the app CPU is in + * reset. We do have a stack, so we can do the initialization in C. + * + * The app CPU will remain in reset unless CONFIG_SMP is selected and + * up_cpu_start() is called later in the bring-up sequence. + * + ****************************************************************************/ + +void __start(void) +{ +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT + if (map_rom_segments() != 0) + { + ets_printf("Failed to setup XIP, aborting\n"); + while (true); + } + +#endif + __esp32_start(); +} diff --git a/arch/xtensa/src/esp32/esp32_textheap.c b/arch/xtensa/src/esp32/esp32_textheap.c index 7e29c2f3617..486a3044137 100644 --- a/arch/xtensa/src/esp32/esp32_textheap.c +++ b/arch/xtensa/src/esp32/esp32_textheap.c @@ -60,9 +60,9 @@ * ****************************************************************************/ -FAR void *up_textheap_memalign(size_t align, size_t size) +void *up_textheap_memalign(size_t align, size_t size) { - FAR void *ret = NULL; + void *ret = NULL; /* Prioritise allocating from RTC. If that fails, allocate from the * main heap. @@ -88,7 +88,7 @@ FAR void *up_textheap_memalign(size_t align, size_t size) * ****************************************************************************/ -void up_textheap_free(FAR void *p) +void up_textheap_free(void *p) { if (p) { diff --git a/arch/xtensa/src/esp32/esp32_tickless.c b/arch/xtensa/src/esp32/esp32_tickless.c index 382c82c0d59..e5e3230e244 100644 --- a/arch/xtensa/src/esp32/esp32_tickless.c +++ b/arch/xtensa/src/esp32/esp32_tickless.c @@ -27,10 +27,10 @@ * * void up_timer_initialize(void): Initializes the timer facilities. * Called early in the initialization sequence (by up_initialize()). - * int up_timer_gettime(FAR struct timespec *ts): Returns the current + * int up_timer_gettime(struct timespec *ts): Returns the current * time from the platform specific time source. * int up_timer_cancel(void): Cancels the interval timer. - * int up_timer_start(FAR const struct timespec *ts): Start (or re-starts) + * int up_timer_start(const struct timespec *ts): Start (or re-starts) * the interval timer. * * The RTOS will provide the following interfaces for use by the platform- @@ -92,7 +92,7 @@ static inline uint64_t up_tmr_total_count(void); static inline uint64_t up_tmr_getcount(void); static void IRAM_ATTR up_tmr_setcompare(uint32_t ticks); static void IRAM_ATTR up_tmr_setcount(uint64_t ticks); -static int up_timer_expire(int irq, void *regs, FAR void *arg); +static int up_timer_expire(int irq, void *regs, void *arg); /**************************************************************************** * Private Data @@ -234,7 +234,7 @@ static void IRAM_ATTR up_tmr_setcount(uint64_t ticks) * ****************************************************************************/ -static int up_timer_expire(int irq, void *regs, FAR void *arg) +static int up_timer_expire(int irq, void *regs, void *arg) { irqstate_t flags; bool do_sched = false; @@ -295,7 +295,7 @@ static int up_timer_expire(int irq, void *regs, FAR void *arg) * up_timer_initialize() was called). This function is functionally * equivalent to: * - * int clock_gettime(clockid_t clockid, FAR struct timespec *ts); + * int clock_gettime(clockid_t clockid, struct timespec *ts); * * when clockid is CLOCK_MONOTONIC. * @@ -320,7 +320,7 @@ static int up_timer_expire(int irq, void *regs, FAR void *arg) * ****************************************************************************/ -int IRAM_ATTR up_timer_gettime(FAR struct timespec *ts) +int IRAM_ATTR up_timer_gettime(struct timespec *ts) { uint64_t ticks; irqstate_t flags; @@ -371,7 +371,7 @@ int IRAM_ATTR up_timer_gettime(FAR struct timespec *ts) * ****************************************************************************/ -int IRAM_ATTR up_timer_cancel(FAR struct timespec *ts) +int IRAM_ATTR up_timer_cancel(struct timespec *ts) { uint64_t rst_ticks; uint64_t cur_ticks; @@ -437,7 +437,7 @@ int IRAM_ATTR up_timer_cancel(FAR struct timespec *ts) * ****************************************************************************/ -int IRAM_ATTR up_timer_start(FAR const struct timespec *ts) +int IRAM_ATTR up_timer_start(const struct timespec *ts) { uint64_t cpu_ticks; irqstate_t flags; @@ -499,7 +499,7 @@ void up_timer_initialize(void) /* Enable the timer 0 CPU interrupt. */ - up_enable_irq(ESP32_CPUINT_TIMER0); + up_enable_irq(XTENSA_IRQ_TIMER0); return; } @@ -586,4 +586,4 @@ void IRAM_ATTR up_step_idletime(uint32_t us) leave_critical_section(flags); } -#endif /* CONFIG_SCHED_TICKLESS */ \ No newline at end of file +#endif /* CONFIG_SCHED_TICKLESS */ diff --git a/arch/xtensa/src/esp32/esp32_tim.c b/arch/xtensa/src/esp32/esp32_tim.c index e62973d10b7..564ced637f9 100644 --- a/arch/xtensa/src/esp32/esp32_tim.c +++ b/arch/xtensa/src/esp32/esp32_tim.c @@ -33,8 +33,9 @@ #include "hardware/esp32_tim.h" +#include "esp32_irq.h" + #include "esp32_tim.h" -#include "esp32_cpuint.h" /**************************************************************************** * Private Types @@ -42,7 +43,7 @@ struct esp32_tim_priv_s { - FAR struct esp32_tim_ops_s *ops; + struct esp32_tim_ops_s *ops; uint32_t base; /* Timer register base address */ uint8_t periph; /* Peripheral ID */ uint8_t irq; /* Interrupt ID */ @@ -58,12 +59,12 @@ struct esp32_tim_priv_s /* TIM registers access *****************************************************/ -static uint32_t esp32_tim_getreg(FAR struct esp32_tim_dev_s *dev, +static uint32_t esp32_tim_getreg(struct esp32_tim_dev_s *dev, uint32_t offset); -static void esp32_tim_putreg(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_putreg(struct esp32_tim_dev_s *dev, uint32_t offset, uint32_t value); -static void esp32_tim_modifyreg32(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_modifyreg32(struct esp32_tim_dev_s *dev, uint32_t offset, uint32_t clearbits, uint32_t setbits); @@ -72,29 +73,29 @@ static void esp32_tim_modifyreg32(FAR struct esp32_tim_dev_s *dev, /* TIM operations ***********************************************************/ -static void esp32_tim_start(FAR struct esp32_tim_dev_s *dev); -static void esp32_tim_stop(FAR struct esp32_tim_dev_s *dev); -static void esp32_tim_clear(FAR struct esp32_tim_dev_s *dev); -static void esp32_tim_setmode(FAR struct esp32_tim_dev_s *dev, uint8_t mode); -static void esp32_tim_setpre(FAR struct esp32_tim_dev_s *dev, uint16_t pre); -static void esp32_tim_getcounter(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_start(struct esp32_tim_dev_s *dev); +static void esp32_tim_stop(struct esp32_tim_dev_s *dev); +static void esp32_tim_clear(struct esp32_tim_dev_s *dev); +static void esp32_tim_setmode(struct esp32_tim_dev_s *dev, uint8_t mode); +static void esp32_tim_setpre(struct esp32_tim_dev_s *dev, uint16_t pre); +static void esp32_tim_getcounter(struct esp32_tim_dev_s *dev, uint64_t *value); -static void esp32_tim_setcounter(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_setcounter(struct esp32_tim_dev_s *dev, uint64_t value); -static void esp32_tim_reload_now(FAR struct esp32_tim_dev_s *dev); -static void esp32_tim_getalarmvalue(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_reload_now(struct esp32_tim_dev_s *dev); +static void esp32_tim_getalarmvalue(struct esp32_tim_dev_s *dev, uint64_t *value); -static void esp32_tim_setalarmvalue(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_setalarmvalue(struct esp32_tim_dev_s *dev, uint64_t value); -static void esp32_tim_setalarm(FAR struct esp32_tim_dev_s *dev, bool enable); -static void esp32_tim_setautoreload(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_setalarm(struct esp32_tim_dev_s *dev, bool enable); +static void esp32_tim_setautoreload(struct esp32_tim_dev_s *dev, bool enable); -static int esp32_tim_setisr(FAR struct esp32_tim_dev_s *dev, xcpt_t handler, - FAR void * arg); -static void esp32_tim_enableint(FAR struct esp32_tim_dev_s *dev); -static void esp32_tim_disableint(FAR struct esp32_tim_dev_s *dev); -static void esp32_tim_ackint(FAR struct esp32_tim_dev_s *dev); -static int esp32_tim_checkint(FAR struct esp32_tim_dev_s *dev); +static int esp32_tim_setisr(struct esp32_tim_dev_s *dev, xcpt_t handler, + void * arg); +static void esp32_tim_enableint(struct esp32_tim_dev_s *dev); +static void esp32_tim_disableint(struct esp32_tim_dev_s *dev); +static void esp32_tim_ackint(struct esp32_tim_dev_s *dev); +static int esp32_tim_checkint(struct esp32_tim_dev_s *dev); /**************************************************************************** * Private Data @@ -199,7 +200,7 @@ struct esp32_tim_priv_s g_esp32_tim3_priv = * ****************************************************************************/ -static uint32_t esp32_tim_getreg(FAR struct esp32_tim_dev_s *dev, +static uint32_t esp32_tim_getreg(struct esp32_tim_dev_s *dev, uint32_t offset) { DEBUGASSERT(dev); @@ -215,7 +216,7 @@ static uint32_t esp32_tim_getreg(FAR struct esp32_tim_dev_s *dev, * ****************************************************************************/ -static void esp32_tim_putreg(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_putreg(struct esp32_tim_dev_s *dev, uint32_t offset, uint32_t value) { @@ -232,7 +233,7 @@ static void esp32_tim_putreg(FAR struct esp32_tim_dev_s *dev, * ****************************************************************************/ -static void esp32_tim_modifyreg32(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_modifyreg32(struct esp32_tim_dev_s *dev, uint32_t offset, uint32_t clearbits, uint32_t setbits) @@ -251,7 +252,7 @@ static void esp32_tim_modifyreg32(FAR struct esp32_tim_dev_s *dev, * ****************************************************************************/ -static void esp32_tim_start(FAR struct esp32_tim_dev_s *dev) +static void esp32_tim_start(struct esp32_tim_dev_s *dev) { DEBUGASSERT(dev); esp32_tim_modifyreg32(dev, TIM_CONFIG_OFFSET, 0, TIMG_T0_EN); @@ -265,7 +266,7 @@ static void esp32_tim_start(FAR struct esp32_tim_dev_s *dev) * ****************************************************************************/ -static void esp32_tim_stop(FAR struct esp32_tim_dev_s *dev) +static void esp32_tim_stop(struct esp32_tim_dev_s *dev) { DEBUGASSERT(dev); esp32_tim_modifyreg32(dev, TIM_CONFIG_OFFSET, TIMG_T0_EN, 0); @@ -279,7 +280,7 @@ static void esp32_tim_stop(FAR struct esp32_tim_dev_s *dev) * ****************************************************************************/ -static void esp32_tim_clear(FAR struct esp32_tim_dev_s *dev) +static void esp32_tim_clear(struct esp32_tim_dev_s *dev) { uint64_t clear_value = 0; DEBUGASSERT(dev); @@ -295,7 +296,7 @@ static void esp32_tim_clear(FAR struct esp32_tim_dev_s *dev) * ****************************************************************************/ -static void esp32_tim_setmode(FAR struct esp32_tim_dev_s *dev, uint8_t mode) +static void esp32_tim_setmode(struct esp32_tim_dev_s *dev, uint8_t mode) { DEBUGASSERT(dev); @@ -319,7 +320,7 @@ static void esp32_tim_setmode(FAR struct esp32_tim_dev_s *dev, uint8_t mode) * ****************************************************************************/ -static void esp32_tim_setpre(FAR struct esp32_tim_dev_s *dev, uint16_t pre) +static void esp32_tim_setpre(struct esp32_tim_dev_s *dev, uint16_t pre) { uint32_t mask = (uint32_t)pre << TIMG_T0_DIVIDER_S; DEBUGASSERT(dev); @@ -334,7 +335,7 @@ static void esp32_tim_setpre(FAR struct esp32_tim_dev_s *dev, uint16_t pre) * ****************************************************************************/ -static void esp32_tim_getcounter(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_getcounter(struct esp32_tim_dev_s *dev, uint64_t *value) { uint32_t value_32; @@ -368,7 +369,7 @@ static void esp32_tim_getcounter(FAR struct esp32_tim_dev_s *dev, * ****************************************************************************/ -static void esp32_tim_setcounter(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_setcounter(struct esp32_tim_dev_s *dev, uint64_t value) { uint64_t low_64 = value & LOW_32_MASK; @@ -390,7 +391,7 @@ static void esp32_tim_setcounter(FAR struct esp32_tim_dev_s *dev, * ****************************************************************************/ -static void esp32_tim_reload_now(FAR struct esp32_tim_dev_s *dev) +static void esp32_tim_reload_now(struct esp32_tim_dev_s *dev) { DEBUGASSERT(dev); @@ -407,7 +408,7 @@ static void esp32_tim_reload_now(FAR struct esp32_tim_dev_s *dev) * ****************************************************************************/ -static void esp32_tim_getalarmvalue(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_getalarmvalue(struct esp32_tim_dev_s *dev, uint64_t *value) { uint32_t value_32; @@ -434,7 +435,7 @@ static void esp32_tim_getalarmvalue(FAR struct esp32_tim_dev_s *dev, * ****************************************************************************/ -static void esp32_tim_setalarmvalue(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_setalarmvalue(struct esp32_tim_dev_s *dev, uint64_t value) { uint64_t low_64 = value & LOW_32_MASK; @@ -456,7 +457,7 @@ static void esp32_tim_setalarmvalue(FAR struct esp32_tim_dev_s *dev, * ****************************************************************************/ -static void esp32_tim_setalarm(FAR struct esp32_tim_dev_s *dev, bool enable) +static void esp32_tim_setalarm(struct esp32_tim_dev_s *dev, bool enable) { DEBUGASSERT(dev); @@ -481,7 +482,7 @@ static void esp32_tim_setalarm(FAR struct esp32_tim_dev_s *dev, bool enable) * ****************************************************************************/ -static void esp32_tim_setautoreload(FAR struct esp32_tim_dev_s *dev, +static void esp32_tim_setautoreload(struct esp32_tim_dev_s *dev, bool enable) { DEBUGASSERT(dev); @@ -506,15 +507,15 @@ static void esp32_tim_setautoreload(FAR struct esp32_tim_dev_s *dev, * ****************************************************************************/ -static int esp32_tim_setisr(FAR struct esp32_tim_dev_s *dev, xcpt_t handler, - FAR void *arg) +static int esp32_tim_setisr(struct esp32_tim_dev_s *dev, xcpt_t handler, + void *arg) { - FAR struct esp32_tim_priv_s *tim = NULL; + struct esp32_tim_priv_s *tim = NULL; int ret = OK; DEBUGASSERT(dev); - tim = (FAR struct esp32_tim_priv_s *)dev; + tim = (struct esp32_tim_priv_s *)dev; /* Disable interrupt when callback is removed */ @@ -528,9 +529,8 @@ static int esp32_tim_setisr(FAR struct esp32_tim_dev_s *dev, xcpt_t handler, * CPU Interrupt */ - up_disable_irq(tim->cpuint); - esp32_detach_peripheral(tim->core, tim->periph, tim->cpuint); - esp32_free_cpuint(tim->cpuint); + up_disable_irq(tim->irq); + esp32_teardown_irq(tim->core, tim->periph, tim->cpuint); irq_detach(tim->irq); tim->cpuint = -ENOMEM; tim->core = -ENODEV; @@ -543,20 +543,16 @@ static int esp32_tim_setisr(FAR struct esp32_tim_dev_s *dev, xcpt_t handler, { if (tim->cpuint != -ENOMEM) { - /* Disable the previous CPU Interrupt */ + /* Disable the previous IRQ */ - up_disable_irq(tim->cpuint); - - /* Free cpu interrupt - * because we will get another from esp32_alloc_levelint - */ - - esp32_free_cpuint(tim->cpuint); + up_disable_irq(tim->irq); } - /* Verify the available level CPU Interrupt */ + /* Set up to receive peripheral interrupts on the current CPU */ - tim->cpuint = esp32_alloc_levelint(tim->priority); + tim->core = up_cpu_index(); + tim->cpuint = esp32_setup_irq(tim->core, tim->periph, + tim->priority, ESP32_CPUINT_LEVEL); if (tim->cpuint < 0) { tmrerr("ERROR: No CPU Interrupt available"); @@ -564,28 +560,19 @@ static int esp32_tim_setisr(FAR struct esp32_tim_dev_s *dev, xcpt_t handler, goto errout; } - /* Attach a peripheral interrupt to the available CPU interrupt in - * the current core - */ - - tim->core = up_cpu_index(); - esp32_attach_peripheral(tim->core, tim->periph, tim->cpuint); - /* Associate an IRQ Number (from the timer) to an ISR */ ret = irq_attach(tim->irq, handler, arg); - if (ret != OK) { - esp32_detach_peripheral(tim->core, tim->periph, tim->cpuint); - esp32_free_cpuint(tim->cpuint); + esp32_teardown_irq(tim->core, tim->periph, tim->cpuint); tmrerr("ERROR: Failed to associate an IRQ Number"); goto errout; } /* Enable the CPU Interrupt that is linked to the timer */ - up_enable_irq(tim->cpuint); + up_enable_irq(tim->irq); } errout: @@ -600,7 +587,7 @@ errout: * ****************************************************************************/ -static void esp32_tim_enableint(FAR struct esp32_tim_dev_s *dev) +static void esp32_tim_enableint(struct esp32_tim_dev_s *dev) { DEBUGASSERT(dev); @@ -633,7 +620,7 @@ static void esp32_tim_enableint(FAR struct esp32_tim_dev_s *dev) * ****************************************************************************/ -static void esp32_tim_disableint(FAR struct esp32_tim_dev_s *dev) +static void esp32_tim_disableint(struct esp32_tim_dev_s *dev) { DEBUGASSERT(dev); @@ -664,7 +651,7 @@ static void esp32_tim_disableint(FAR struct esp32_tim_dev_s *dev) * ****************************************************************************/ -static void esp32_tim_ackint(FAR struct esp32_tim_dev_s *dev) +static void esp32_tim_ackint(struct esp32_tim_dev_s *dev) { DEBUGASSERT(dev); @@ -692,7 +679,7 @@ static void esp32_tim_ackint(FAR struct esp32_tim_dev_s *dev) * ****************************************************************************/ -static int esp32_tim_checkint(FAR struct esp32_tim_dev_s *dev) +static int esp32_tim_checkint(struct esp32_tim_dev_s *dev) { int ret = 0; uint32_t reg_value; @@ -737,9 +724,9 @@ static int esp32_tim_checkint(FAR struct esp32_tim_dev_s *dev) * ****************************************************************************/ -FAR struct esp32_tim_dev_s *esp32_tim_init(int timer) +struct esp32_tim_dev_s *esp32_tim_init(int timer) { - FAR struct esp32_tim_priv_s *tim = NULL; + struct esp32_tim_priv_s *tim = NULL; /* First, take the data structure associated with the timer instance */ @@ -797,7 +784,7 @@ FAR struct esp32_tim_dev_s *esp32_tim_init(int timer) } errout: - return (FAR struct esp32_tim_dev_s *)tim; + return (struct esp32_tim_dev_s *)tim; } /**************************************************************************** @@ -808,13 +795,13 @@ FAR struct esp32_tim_dev_s *esp32_tim_init(int timer) * ****************************************************************************/ -void esp32_tim_deinit(FAR struct esp32_tim_dev_s *dev) +void esp32_tim_deinit(struct esp32_tim_dev_s *dev) { - FAR struct esp32_tim_priv_s *tim = NULL; + struct esp32_tim_priv_s *tim = NULL; DEBUGASSERT(dev); - tim = (FAR struct esp32_tim_priv_s *)dev; + tim = (struct esp32_tim_priv_s *)dev; tim->inuse = false; } diff --git a/arch/xtensa/src/esp32/esp32_tim.h b/arch/xtensa/src/esp32/esp32_tim.h index f3dcaa07d49..ed6136bb443 100644 --- a/arch/xtensa/src/esp32/esp32_tim.h +++ b/arch/xtensa/src/esp32/esp32_tim.h @@ -82,39 +82,39 @@ struct esp32_tim_ops_s { /* Timer tasks */ - CODE void (*start)(FAR struct esp32_tim_dev_s *dev); - CODE void (*stop)(FAR struct esp32_tim_dev_s *dev); - CODE void (*clear)(FAR struct esp32_tim_dev_s *dev); + void (*start)(struct esp32_tim_dev_s *dev); + void (*stop)(struct esp32_tim_dev_s *dev); + void (*clear)(struct esp32_tim_dev_s *dev); /* Timer operations */ - CODE void (*setmode)(FAR struct esp32_tim_dev_s *dev, uint8_t mode); - CODE void (*setpre)(FAR struct esp32_tim_dev_s *dev, uint16_t pre); - CODE void (*getcounter)(FAR struct esp32_tim_dev_s *dev, uint64_t *value); - CODE void (*setcounter)(FAR struct esp32_tim_dev_s *dev, uint64_t value); - CODE void (*reloadnow)(FAR struct esp32_tim_dev_s *dev); - CODE void (*getalarmvalue)(FAR struct esp32_tim_dev_s *dev, + void (*setmode)(struct esp32_tim_dev_s *dev, uint8_t mode); + void (*setpre)(struct esp32_tim_dev_s *dev, uint16_t pre); + void (*getcounter)(struct esp32_tim_dev_s *dev, uint64_t *value); + void (*setcounter)(struct esp32_tim_dev_s *dev, uint64_t value); + void (*reloadnow)(struct esp32_tim_dev_s *dev); + void (*getalarmvalue)(struct esp32_tim_dev_s *dev, uint64_t *value); - CODE void (*setalarmvalue)(FAR struct esp32_tim_dev_s *dev, + void (*setalarmvalue)(struct esp32_tim_dev_s *dev, uint64_t value); - CODE void (*setalarm)(FAR struct esp32_tim_dev_s *dev, bool enable); - CODE void (*setautoreload)(FAR struct esp32_tim_dev_s *dev, bool enable); + void (*setalarm)(struct esp32_tim_dev_s *dev, bool enable); + void (*setautoreload)(struct esp32_tim_dev_s *dev, bool enable); /* Timer interrupts */ - CODE int (*setisr)(FAR struct esp32_tim_dev_s *dev, xcpt_t handler, - FAR void * arg); - CODE void (*enableint)(FAR struct esp32_tim_dev_s *dev); - CODE void (*disableint)(FAR struct esp32_tim_dev_s *dev); - CODE void (*ackint)(FAR struct esp32_tim_dev_s *dev); - CODE int (*checkint)(FAR struct esp32_tim_dev_s *dev); + int (*setisr)(struct esp32_tim_dev_s *dev, xcpt_t handler, + void * arg); + void (*enableint)(struct esp32_tim_dev_s *dev); + void (*disableint)(struct esp32_tim_dev_s *dev); + void (*ackint)(struct esp32_tim_dev_s *dev); + int (*checkint)(struct esp32_tim_dev_s *dev); }; /**************************************************************************** * Public Function Prototypes ****************************************************************************/ -FAR struct esp32_tim_dev_s *esp32_tim_init(int timer); -void esp32_tim_deinit(FAR struct esp32_tim_dev_s *dev); +struct esp32_tim_dev_s *esp32_tim_init(int timer); +void esp32_tim_deinit(struct esp32_tim_dev_s *dev); #endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_TIM_H */ diff --git a/arch/xtensa/src/esp32/esp32_tim_lowerhalf.c b/arch/xtensa/src/esp32/esp32_tim_lowerhalf.c index 7483f66d0c1..30e9c2c97d8 100644 --- a/arch/xtensa/src/esp32/esp32_tim_lowerhalf.c +++ b/arch/xtensa/src/esp32/esp32_tim_lowerhalf.c @@ -53,12 +53,12 @@ struct esp32_timer_lowerhalf_s { - FAR const struct timer_ops_s *ops; /* Lower half operations */ - FAR struct esp32_tim_dev_s *tim; /* esp32 timer driver */ - tccb_t callback; /* Current user interrupt callback */ - FAR void *arg; /* Argument passed to upper half callback */ - bool started; /* True: Timer has been started */ - void *upper; /* Pointer to watchdog_upperhalf_s */ + const struct timer_ops_s *ops; /* Lower half operations */ + struct esp32_tim_dev_s *tim; /* esp32 timer driver */ + tccb_t callback; /* Current user interrupt callback */ + void *arg; /* Argument passed to upper half callback */ + bool started; /* True: Timer has been started */ + void *upper; /* Pointer to watchdog_upperhalf_s */ }; /**************************************************************************** @@ -69,16 +69,16 @@ static int esp32_timer_handler(int irq, void *context, void *arg); /* "Lower half" driver methods **********************************************/ -static int esp32_timer_start(FAR struct timer_lowerhalf_s *lower); -static int esp32_timer_stop(FAR struct timer_lowerhalf_s *lower); -static int esp32_timer_getstatus(FAR struct timer_lowerhalf_s *lower, - FAR struct timer_status_s *status); -static int esp32_timer_settimeout(FAR struct timer_lowerhalf_s *lower, +static int esp32_timer_start(struct timer_lowerhalf_s *lower); +static int esp32_timer_stop(struct timer_lowerhalf_s *lower); +static int esp32_timer_getstatus(struct timer_lowerhalf_s *lower, + struct timer_status_s *status); +static int esp32_timer_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout); -static int esp32_timer_maxtimeout(FAR struct timer_lowerhalf_s *lower, +static int esp32_timer_maxtimeout(struct timer_lowerhalf_s *lower, uint32_t *timeout); -static void esp32_timer_setcallback(FAR struct timer_lowerhalf_s *lower, - tccb_t callback, FAR void *arg); +static void esp32_timer_setcallback(struct timer_lowerhalf_s *lower, + tccb_t callback, void *arg); /**************************************************************************** * Private Data @@ -151,8 +151,8 @@ static struct esp32_timer_lowerhalf_s g_esp32_timer3_lowerhalf = static int esp32_timer_handler(int irq, void *context, void *arg) { - FAR struct esp32_timer_lowerhalf_s *priv = - (FAR struct esp32_timer_lowerhalf_s *)arg; + struct esp32_timer_lowerhalf_s *priv = + (struct esp32_timer_lowerhalf_s *)arg; uint32_t next_interval_us = 0; if (priv->callback(&next_interval_us, priv->upper)) @@ -189,10 +189,10 @@ static int esp32_timer_handler(int irq, void *context, void *arg) * ****************************************************************************/ -static int esp32_timer_start(FAR struct timer_lowerhalf_s *lower) +static int esp32_timer_start(struct timer_lowerhalf_s *lower) { - FAR struct esp32_timer_lowerhalf_s *priv = - (FAR struct esp32_timer_lowerhalf_s *)lower; + struct esp32_timer_lowerhalf_s *priv = + (struct esp32_timer_lowerhalf_s *)lower; int ret = OK; uint16_t pre; irqstate_t flags; @@ -282,10 +282,10 @@ errout: * ****************************************************************************/ -static int esp32_timer_stop(FAR struct timer_lowerhalf_s *lower) +static int esp32_timer_stop(struct timer_lowerhalf_s *lower) { - FAR struct esp32_timer_lowerhalf_s *priv = - (FAR struct esp32_timer_lowerhalf_s *)lower; + struct esp32_timer_lowerhalf_s *priv = + (struct esp32_timer_lowerhalf_s *)lower; int ret = OK; irqstate_t flags; @@ -328,11 +328,11 @@ errout: * ****************************************************************************/ -static int esp32_timer_getstatus(FAR struct timer_lowerhalf_s *lower, - FAR struct timer_status_s *status) +static int esp32_timer_getstatus(struct timer_lowerhalf_s *lower, + struct timer_status_s *status) { - FAR struct esp32_timer_lowerhalf_s *priv = - (FAR struct esp32_timer_lowerhalf_s *)lower; + struct esp32_timer_lowerhalf_s *priv = + (struct esp32_timer_lowerhalf_s *)lower; int ret = OK; uint64_t current_counter_value; uint64_t alarm_value; @@ -390,11 +390,11 @@ static int esp32_timer_getstatus(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32_timer_settimeout(FAR struct timer_lowerhalf_s *lower, +static int esp32_timer_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout) { - FAR struct esp32_timer_lowerhalf_s *priv = - (FAR struct esp32_timer_lowerhalf_s *)lower; + struct esp32_timer_lowerhalf_s *priv = + (struct esp32_timer_lowerhalf_s *)lower; int ret = OK; DEBUGASSERT(priv); @@ -422,7 +422,7 @@ static int esp32_timer_settimeout(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32_timer_maxtimeout(FAR struct timer_lowerhalf_s *lower, +static int esp32_timer_maxtimeout(struct timer_lowerhalf_s *lower, uint32_t *max_timeout) { DEBUGASSERT(max_timeout); @@ -452,11 +452,11 @@ static int esp32_timer_maxtimeout(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -static void esp32_timer_setcallback(FAR struct timer_lowerhalf_s *lower, - tccb_t callback, FAR void *arg) +static void esp32_timer_setcallback(struct timer_lowerhalf_s *lower, + tccb_t callback, void *arg) { - FAR struct esp32_timer_lowerhalf_s *priv = - (FAR struct esp32_timer_lowerhalf_s *)lower; + struct esp32_timer_lowerhalf_s *priv = + (struct esp32_timer_lowerhalf_s *)lower; irqstate_t flags; int ret = OK; @@ -508,7 +508,7 @@ static void esp32_timer_setcallback(FAR struct timer_lowerhalf_s *lower, * ****************************************************************************/ -int esp32_timer_initialize(FAR const char *devpath, uint8_t timer) +int esp32_timer_initialize(const char *devpath, uint8_t timer) { struct esp32_timer_lowerhalf_s *lower = NULL; int ret = OK; @@ -582,7 +582,7 @@ int esp32_timer_initialize(FAR const char *devpath, uint8_t timer) */ lower->upper = timer_register(devpath, - (FAR struct timer_lowerhalf_s *)lower); + (struct timer_lowerhalf_s *)lower); if (lower->upper == NULL) { /* The actual cause of the failure may have been a failure to allocate diff --git a/arch/xtensa/src/esp32/esp32_tim_lowerhalf.h b/arch/xtensa/src/esp32/esp32_tim_lowerhalf.h index 57f12f59e4e..3c367297f0d 100644 --- a/arch/xtensa/src/esp32/esp32_tim_lowerhalf.h +++ b/arch/xtensa/src/esp32/esp32_tim_lowerhalf.h @@ -37,6 +37,6 @@ * Name: esp32_timer_initialize ****************************************************************************/ -int esp32_timer_initialize(FAR const char *devpath, uint8_t timer); +int esp32_timer_initialize(const char *devpath, uint8_t timer); #endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_TIM_LOWERHALF_H */ diff --git a/arch/xtensa/src/esp32/esp32_timerisr.c b/arch/xtensa/src/esp32/esp32_timerisr.c index 01e3fee7379..f0fce0ea21d 100644 --- a/arch/xtensa/src/esp32/esp32_timerisr.c +++ b/arch/xtensa/src/esp32/esp32_timerisr.c @@ -65,7 +65,7 @@ static uint32_t g_tick_divisor; * ****************************************************************************/ -static int esp32_timerisr(int irq, uint32_t *regs, FAR void *arg) +static int esp32_timerisr(int irq, uint32_t *regs, void *arg) { uint32_t divisor; uint32_t compare; @@ -135,5 +135,5 @@ void up_timer_initialize(void) /* Enable the timer 0 CPU interrupt. */ - up_enable_irq(ESP32_CPUINT_TIMER0); + up_enable_irq(XTENSA_IRQ_TIMER0); } diff --git a/arch/xtensa/src/esp32/esp32_user.c b/arch/xtensa/src/esp32/esp32_user.c index 95620a26d79..c699d2d0e36 100644 --- a/arch/xtensa/src/esp32/esp32_user.c +++ b/arch/xtensa/src/esp32/esp32_user.c @@ -347,7 +347,7 @@ uint32_t *xtensa_user(int exccause, uint32_t *regs) uint8_t t; binfo("XCHAL_EXCCAUSE_LOAD_STORE_ERROR at %p, pc=%p\n", - (FAR void *)regs[REG_EXCVADDR], + (void *)regs[REG_EXCVADDR], pc); if (decode_s8i(pc, &imm8, &s, &t)) diff --git a/arch/xtensa/src/esp32/esp32_wdt.c b/arch/xtensa/src/esp32/esp32_wdt.c index 1fff28787f5..c8b5d6342f1 100644 --- a/arch/xtensa/src/esp32/esp32_wdt.c +++ b/arch/xtensa/src/esp32/esp32_wdt.c @@ -31,7 +31,7 @@ #include "hardware/esp32_tim.h" #include "hardware/esp32_rtccntl.h" #include "esp32_wdt.h" -#include "esp32_cpuint.h" +#include "esp32_irq.h" #include "esp32_rtc.h" /**************************************************************************** @@ -49,8 +49,9 @@ struct esp32_wdt_priv_s { - FAR struct esp32_wdt_ops_s *ops; + struct esp32_wdt_ops_s *ops; uint32_t base; /* WDT register base address */ + uint8_t cpu; /* CPU ID */ uint8_t periph; /* Peripheral ID */ uint8_t irq; /* Interrupt ID */ int cpuint; /* CPU interrupt assigned to this wdt */ @@ -63,34 +64,34 @@ struct esp32_wdt_priv_s /* WDT registers access *****************************************************/ -static void esp32_wdt_putreg(FAR struct esp32_wdt_dev_s *dev, +static void esp32_wdt_putreg(struct esp32_wdt_dev_s *dev, uint32_t offset, uint32_t value); -static void esp32_wdt_modifyreg32(FAR struct esp32_wdt_dev_s *dev, +static void esp32_wdt_modifyreg32(struct esp32_wdt_dev_s *dev, uint32_t offset, uint32_t clearbits, uint32_t setbits); -static uint32_t esp32_wdt_getreg(FAR struct esp32_wdt_dev_s *dev, +static uint32_t esp32_wdt_getreg(struct esp32_wdt_dev_s *dev, uint32_t offset); /* WDT operations ***********************************************************/ -static int esp32_wdt_start(FAR struct esp32_wdt_dev_s *dev); -static int esp32_wdt_stop(FAR struct esp32_wdt_dev_s *dev); -static int esp32_wdt_enablewp(FAR struct esp32_wdt_dev_s *dev); -static int esp32_wdt_disablewp(FAR struct esp32_wdt_dev_s *dev); -static int esp32_wdt_pre(FAR struct esp32_wdt_dev_s *dev, uint16_t value); -static int esp32_wdt_settimeout(FAR struct esp32_wdt_dev_s *dev, +static int esp32_wdt_start(struct esp32_wdt_dev_s *dev); +static int esp32_wdt_stop(struct esp32_wdt_dev_s *dev); +static int esp32_wdt_enablewp(struct esp32_wdt_dev_s *dev); +static int esp32_wdt_disablewp(struct esp32_wdt_dev_s *dev); +static int esp32_wdt_pre(struct esp32_wdt_dev_s *dev, uint16_t value); +static int esp32_wdt_settimeout(struct esp32_wdt_dev_s *dev, uint32_t value, uint8_t stage); -static int esp32_wdt_feed_dog(FAR struct esp32_wdt_dev_s *dev); -static int esp32_wdt_set_stg_conf(FAR struct esp32_wdt_dev_s *dev, +static int esp32_wdt_feed_dog(struct esp32_wdt_dev_s *dev); +static int esp32_wdt_set_stg_conf(struct esp32_wdt_dev_s *dev, uint8_t stage, uint8_t conf); -static uint16_t esp32_rtc_clk(FAR struct esp32_wdt_dev_s *dev); -static int esp32_wdt_setisr(FAR struct esp32_wdt_dev_s *dev, xcpt_t handler, - FAR void * arg); -static int esp32_wdt_enableint(FAR struct esp32_wdt_dev_s *dev); -static int esp32_wdt_disableint(FAR struct esp32_wdt_dev_s *dev); -static int esp32_wdt_ackint(FAR struct esp32_wdt_dev_s *dev); +static uint16_t esp32_rtc_clk(struct esp32_wdt_dev_s *dev); +static int esp32_wdt_setisr(struct esp32_wdt_dev_s *dev, xcpt_t handler, + void * arg); +static int esp32_wdt_enableint(struct esp32_wdt_dev_s *dev); +static int esp32_wdt_disableint(struct esp32_wdt_dev_s *dev); +static int esp32_wdt_ackint(struct esp32_wdt_dev_s *dev); /**************************************************************************** * Private Data @@ -183,7 +184,7 @@ struct esp32_wdt_priv_s g_esp32_rwdt_priv = * ****************************************************************************/ -static void esp32_wdt_putreg(FAR struct esp32_wdt_dev_s *dev, +static void esp32_wdt_putreg(struct esp32_wdt_dev_s *dev, uint32_t offset, uint32_t value) { @@ -200,7 +201,7 @@ static void esp32_wdt_putreg(FAR struct esp32_wdt_dev_s *dev, * ****************************************************************************/ -static void esp32_wdt_modifyreg32(FAR struct esp32_wdt_dev_s *dev, +static void esp32_wdt_modifyreg32(struct esp32_wdt_dev_s *dev, uint32_t offset, uint32_t clearbits, uint32_t setbits) @@ -219,7 +220,7 @@ static void esp32_wdt_modifyreg32(FAR struct esp32_wdt_dev_s *dev, * ****************************************************************************/ -static uint32_t esp32_wdt_getreg(FAR struct esp32_wdt_dev_s *dev, +static uint32_t esp32_wdt_getreg(struct esp32_wdt_dev_s *dev, uint32_t offset) { DEBUGASSERT(dev); @@ -235,7 +236,7 @@ static uint32_t esp32_wdt_getreg(FAR struct esp32_wdt_dev_s *dev, * ****************************************************************************/ -static int esp32_wdt_start(FAR struct esp32_wdt_dev_s *dev) +static int esp32_wdt_start(struct esp32_wdt_dev_s *dev) { DEBUGASSERT(dev); @@ -271,7 +272,7 @@ static int esp32_wdt_start(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -static int esp32_wdt_set_stg_conf(FAR struct esp32_wdt_dev_s *dev, +static int esp32_wdt_set_stg_conf(struct esp32_wdt_dev_s *dev, uint8_t stage, uint8_t conf) { int ret = OK; @@ -392,7 +393,7 @@ static int esp32_wdt_set_stg_conf(FAR struct esp32_wdt_dev_s *dev, * ****************************************************************************/ -static int esp32_wdt_stop(FAR struct esp32_wdt_dev_s *dev) +static int esp32_wdt_stop(struct esp32_wdt_dev_s *dev) { DEBUGASSERT(dev); @@ -425,7 +426,7 @@ static int esp32_wdt_stop(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -static int esp32_wdt_enablewp(FAR struct esp32_wdt_dev_s *dev) +static int esp32_wdt_enablewp(struct esp32_wdt_dev_s *dev) { DEBUGASSERT(dev); @@ -458,7 +459,7 @@ static int esp32_wdt_enablewp(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -static int esp32_wdt_disablewp(FAR struct esp32_wdt_dev_s *dev) +static int esp32_wdt_disablewp(struct esp32_wdt_dev_s *dev) { DEBUGASSERT(dev); @@ -489,7 +490,7 @@ static int esp32_wdt_disablewp(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -static int esp32_wdt_pre(FAR struct esp32_wdt_dev_s *dev, uint16_t pre) +static int esp32_wdt_pre(struct esp32_wdt_dev_s *dev, uint16_t pre) { uint32_t mask = (uint32_t)pre << TIMG_WDT_CLK_PRESCALE_S; @@ -510,7 +511,7 @@ static int esp32_wdt_pre(FAR struct esp32_wdt_dev_s *dev, uint16_t pre) * ****************************************************************************/ -static uint16_t esp32_rtc_clk(FAR struct esp32_wdt_dev_s *dev) +static uint16_t esp32_rtc_clk(struct esp32_wdt_dev_s *dev) { enum esp32_rtc_slow_freq_e slow_clk_rtc; uint32_t period_13q19; @@ -518,6 +519,17 @@ static uint16_t esp32_rtc_clk(FAR struct esp32_wdt_dev_s *dev) float cycles_ms; uint16_t cycles_ms_int; + /* Calibration map: Maps each RTC SLOW_CLK source to the number + * used to calibrate this source. + */ + + static const enum esp32_rtc_cal_sel_e cal_map[] = + { + RTC_CAL_RTC_MUX, + RTC_CAL_32K_XTAL, + RTC_CAL_8MD256 + }; + DEBUGASSERT(dev); /* Check which clock is sourcing the slow_clk_rtc */ @@ -526,7 +538,8 @@ static uint16_t esp32_rtc_clk(FAR struct esp32_wdt_dev_s *dev) /* Get the slow_clk_rtc period in us in Q13.19 fixed point format */ - period_13q19 = esp32_rtc_clk_cal(slow_clk_rtc, SLOW_CLK_CAL_CYCLES); + period_13q19 = esp32_rtc_clk_cal(cal_map[slow_clk_rtc], + SLOW_CLK_CAL_CYCLES); /* Assert no error happened during the calibration */ @@ -555,7 +568,7 @@ static uint16_t esp32_rtc_clk(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -static int esp32_wdt_settimeout(FAR struct esp32_wdt_dev_s *dev, +static int esp32_wdt_settimeout(struct esp32_wdt_dev_s *dev, uint32_t value, uint8_t stage) { int ret = OK; @@ -660,7 +673,7 @@ static int esp32_wdt_settimeout(FAR struct esp32_wdt_dev_s *dev, * ****************************************************************************/ -static int esp32_wdt_feed_dog(FAR struct esp32_wdt_dev_s *dev) +static int esp32_wdt_feed_dog(struct esp32_wdt_dev_s *dev) { DEBUGASSERT(dev); @@ -691,16 +704,15 @@ static int esp32_wdt_feed_dog(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -static int esp32_wdt_setisr(FAR struct esp32_wdt_dev_s *dev, xcpt_t handler, - FAR void *arg) +static int esp32_wdt_setisr(struct esp32_wdt_dev_s *dev, xcpt_t handler, + void *arg) { - FAR struct esp32_wdt_priv_s *wdt = NULL; + struct esp32_wdt_priv_s *wdt = NULL; int ret = OK; - uint8_t cpu; DEBUGASSERT(dev); - wdt = (FAR struct esp32_wdt_priv_s *)dev; + wdt = (struct esp32_wdt_priv_s *)dev; /* Disable interrupt when callback is removed */ @@ -714,10 +726,8 @@ static int esp32_wdt_setisr(FAR struct esp32_wdt_dev_s *dev, xcpt_t handler, * CPU Interrupt */ - up_disable_irq(wdt->cpuint); - cpu = up_cpu_index(); - esp32_detach_peripheral(cpu, wdt->periph, wdt->cpuint); - esp32_free_cpuint(wdt->cpuint); + up_disable_irq(wdt->irq); + esp32_teardown_irq(wdt->cpu, wdt->periph, wdt->cpuint); irq_detach(wdt->irq); } @@ -729,9 +739,11 @@ static int esp32_wdt_setisr(FAR struct esp32_wdt_dev_s *dev, xcpt_t handler, else { - /* Verify the available CPU Interrupt */ + /* Set up to receive peripheral interrupts on the current CPU */ - wdt->cpuint = esp32_alloc_levelint(1); + wdt->cpu = up_cpu_index(); + wdt->cpuint = esp32_setup_irq(wdt->cpu, wdt->periph, + 1, ESP32_CPUINT_LEVEL); if (wdt->cpuint < 0) { tmrerr("ERROR: No CPU Interrupt available"); @@ -739,32 +751,20 @@ static int esp32_wdt_setisr(FAR struct esp32_wdt_dev_s *dev, xcpt_t handler, goto errout; } - /* Disable the provided CPU Interrupt to configure it */ - - up_disable_irq(wdt->cpuint); - - /* Attach a peripheral interrupt to the available CPU interrupt in - * the current core - */ - - cpu = up_cpu_index(); - esp32_attach_peripheral(cpu, wdt->periph, wdt->cpuint); - /* Associate an IRQ Number (from the WDT) to an ISR */ ret = irq_attach(wdt->irq, handler, arg); if (ret != OK) { - esp32_detach_peripheral(cpu, wdt->periph, wdt->cpuint); - esp32_free_cpuint(wdt->cpuint); + esp32_teardown_irq(wdt->cpu, wdt->periph, wdt->cpuint); tmrerr("ERROR: Failed to associate an IRQ Number"); goto errout; } /* Enable the CPU Interrupt that is linked to the wdt */ - up_enable_irq(wdt->cpuint); + up_enable_irq(wdt->irq); } errout: @@ -779,7 +779,7 @@ errout: * ****************************************************************************/ -static int esp32_wdt_enableint(FAR struct esp32_wdt_dev_s *dev) +static int esp32_wdt_enableint(struct esp32_wdt_dev_s *dev) { DEBUGASSERT(dev); @@ -826,7 +826,7 @@ static int esp32_wdt_enableint(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -static int esp32_wdt_disableint(FAR struct esp32_wdt_dev_s *dev) +static int esp32_wdt_disableint(struct esp32_wdt_dev_s *dev) { DEBUGASSERT(dev); @@ -871,7 +871,7 @@ static int esp32_wdt_disableint(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -static int esp32_wdt_ackint(FAR struct esp32_wdt_dev_s *dev) +static int esp32_wdt_ackint(struct esp32_wdt_dev_s *dev) { DEBUGASSERT(dev); @@ -904,9 +904,9 @@ static int esp32_wdt_ackint(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -FAR struct esp32_wdt_dev_s *esp32_wdt_init(uint8_t wdt_id) +struct esp32_wdt_dev_s *esp32_wdt_init(uint8_t wdt_id) { - FAR struct esp32_wdt_priv_s *wdt = NULL; + struct esp32_wdt_priv_s *wdt = NULL; /* Get wdt instance */ @@ -932,6 +932,18 @@ FAR struct esp32_wdt_dev_s *esp32_wdt_init(uint8_t wdt_id) case 2: { wdt = &g_esp32_rwdt_priv; + + /* If RTC was not initialized in a previous + * stage by the PM or by clock_initialize() + * Then, init the RTC clock configuration here. + */ + +#if !defined(CONFIG_PM) && !defined(CONFIG_RTC) + /* Initialize RTC controller parameters */ + + esp32_rtc_init(); + esp32_rtc_clk_set(); +#endif break; } @@ -958,7 +970,25 @@ FAR struct esp32_wdt_dev_s *esp32_wdt_init(uint8_t wdt_id) } errout: - return (FAR struct esp32_wdt_dev_s *)wdt; + return (struct esp32_wdt_dev_s *)wdt; +} + +/**************************************************************************** + * Name: esp32_wdt_early_deinit + * + * Description: + * Disable the WDT(s) that was/were enabled by the bootloader. + * + ****************************************************************************/ + +void esp32_wdt_early_deinit(void) +{ + uint32_t regval; + putreg32(RTC_CNTL_WDT_WKEY_VALUE, RTC_CNTL_WDTWPROTECT_REG); + regval = getreg32(RTC_CNTL_WDTCONFIG0_REG); + regval &= ~RTC_CNTL_WDT_EN; + putreg32(regval, RTC_CNTL_WDTCONFIG0_REG); + putreg32(0, RTC_CNTL_WDTWPROTECT_REG); } /**************************************************************************** @@ -969,13 +999,13 @@ FAR struct esp32_wdt_dev_s *esp32_wdt_init(uint8_t wdt_id) * ****************************************************************************/ -int esp32_wdt_deinit(FAR struct esp32_wdt_dev_s *dev) +int esp32_wdt_deinit(struct esp32_wdt_dev_s *dev) { - FAR struct esp32_wdt_priv_s *wdt = NULL; + struct esp32_wdt_priv_s *wdt = NULL; DEBUGASSERT(dev); - wdt = (FAR struct esp32_wdt_priv_s *)dev; + wdt = (struct esp32_wdt_priv_s *)dev; wdt->inuse = false; @@ -991,7 +1021,7 @@ int esp32_wdt_deinit(FAR struct esp32_wdt_dev_s *dev) * ****************************************************************************/ -bool esp32_wdt_is_running(FAR struct esp32_wdt_dev_s *dev) +bool esp32_wdt_is_running(struct esp32_wdt_dev_s *dev) { uint32_t status = 0; DEBUGASSERT(dev); diff --git a/arch/xtensa/src/esp32/esp32_wdt.h b/arch/xtensa/src/esp32/esp32_wdt.h index 01719f8c84c..203530b343c 100644 --- a/arch/xtensa/src/esp32/esp32_wdt.h +++ b/arch/xtensa/src/esp32/esp32_wdt.h @@ -70,36 +70,37 @@ struct esp32_wdt_ops_s { /* WDT tasks */ - CODE int (*start)(FAR struct esp32_wdt_dev_s *dev); - CODE int (*stop)(FAR struct esp32_wdt_dev_s *dev); + int (*start)(struct esp32_wdt_dev_s *dev); + int (*stop)(struct esp32_wdt_dev_s *dev); /* WDT configuration */ - CODE int (*enablewp)(FAR struct esp32_wdt_dev_s *dev); - CODE int (*disablewp)(FAR struct esp32_wdt_dev_s *dev); - CODE int (*pre)(FAR struct esp32_wdt_dev_s *dev, uint16_t value); - CODE int (*settimeout)(FAR struct esp32_wdt_dev_s *dev, + int (*enablewp)(struct esp32_wdt_dev_s *dev); + int (*disablewp)(struct esp32_wdt_dev_s *dev); + int (*pre)(struct esp32_wdt_dev_s *dev, uint16_t value); + int (*settimeout)(struct esp32_wdt_dev_s *dev, uint32_t value, uint8_t stage); - CODE int (*feed)(FAR struct esp32_wdt_dev_s *dev); - CODE int (*stg_conf)(FAR struct esp32_wdt_dev_s *dev, + int (*feed)(struct esp32_wdt_dev_s *dev); + int (*stg_conf)(struct esp32_wdt_dev_s *dev, uint8_t stage, uint8_t conf); - CODE uint16_t (*rtc_clk)(FAR struct esp32_wdt_dev_s *dev); + uint16_t (*rtc_clk)(struct esp32_wdt_dev_s *dev); /* WDT interrupts */ - CODE int (*setisr)(FAR struct esp32_wdt_dev_s *dev, xcpt_t handler, - FAR void * arg); - CODE int (*enableint)(FAR struct esp32_wdt_dev_s *dev); - CODE int (*disableint)(FAR struct esp32_wdt_dev_s *dev); - CODE int (*ackint)(FAR struct esp32_wdt_dev_s *dev); + int (*setisr)(struct esp32_wdt_dev_s *dev, xcpt_t handler, + void * arg); + int (*enableint)(struct esp32_wdt_dev_s *dev); + int (*disableint)(struct esp32_wdt_dev_s *dev); + int (*ackint)(struct esp32_wdt_dev_s *dev); }; /**************************************************************************** * Public Function Prototypes ****************************************************************************/ -FAR struct esp32_wdt_dev_s *esp32_wdt_init(uint8_t wdt_id); -int esp32_wdt_deinit(FAR struct esp32_wdt_dev_s *dev); -bool esp32_wdt_is_running(FAR struct esp32_wdt_dev_s *dev); +struct esp32_wdt_dev_s *esp32_wdt_init(uint8_t wdt_id); +void esp32_wdt_early_deinit(void); +int esp32_wdt_deinit(struct esp32_wdt_dev_s *dev); +bool esp32_wdt_is_running(struct esp32_wdt_dev_s *dev); #endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_WDT_H */ diff --git a/arch/xtensa/src/esp32/esp32_wdt_lowerhalf.c b/arch/xtensa/src/esp32/esp32_wdt_lowerhalf.c index c92abe6fe39..109480dd3b4 100644 --- a/arch/xtensa/src/esp32/esp32_wdt_lowerhalf.c +++ b/arch/xtensa/src/esp32/esp32_wdt_lowerhalf.c @@ -72,14 +72,14 @@ struct esp32_wdt_lowerhalf_s { - FAR const struct watchdog_ops_s *ops; /* Lower half operations */ - FAR struct esp32_wdt_dev_s *wdt; /* esp32 watchdog driver */ - uint32_t timeout; /* The current timeout */ - enum wdt_peripherals peripheral; /* Indicates if it is from RTC or Timer Module */ - uint32_t lastreset; /* The last reset time */ - bool started; /* True: Timer has been started */ - xcpt_t handler; /* User Handler */ - void *upper; /* Pointer to watchdog_upperhalf_s */ + const struct watchdog_ops_s *ops; /* Lower half operations */ + struct esp32_wdt_dev_s *wdt; /* esp32 watchdog driver */ + uint32_t timeout; /* The current timeout */ + enum wdt_peripherals peripheral; /* Indicates if it is from RTC or Timer Module */ + uint32_t lastreset; /* The last reset time */ + bool started; /* True: Timer has been started */ + xcpt_t handler; /* User Handler */ + void *upper; /* Pointer to watchdog_upperhalf_s */ }; /**************************************************************************** @@ -88,18 +88,18 @@ struct esp32_wdt_lowerhalf_s /* Interrupt handling *******************************************************/ -static int esp32_wdt_handler(int irq, FAR void *context, FAR void *arg); +static int esp32_wdt_handler(int irq, void *context, void *arg); /* "Lower half" driver methods **********************************************/ -static int esp32_wdt_start(FAR struct watchdog_lowerhalf_s *lower); -static int esp32_wdt_stop(FAR struct watchdog_lowerhalf_s *lower); -static int esp32_wdt_keepalive(FAR struct watchdog_lowerhalf_s *lower); -static int esp32_wdt_getstatus(FAR struct watchdog_lowerhalf_s *lower, - FAR struct watchdog_status_s *status); -static int esp32_wdt_settimeout(FAR struct watchdog_lowerhalf_s *lower, +static int esp32_wdt_start(struct watchdog_lowerhalf_s *lower); +static int esp32_wdt_stop(struct watchdog_lowerhalf_s *lower); +static int esp32_wdt_keepalive(struct watchdog_lowerhalf_s *lower); +static int esp32_wdt_getstatus(struct watchdog_lowerhalf_s *lower, + struct watchdog_status_s *status); +static int esp32_wdt_settimeout(struct watchdog_lowerhalf_s *lower, uint32_t timeout); -static xcpt_t esp32_wdt_capture(FAR struct watchdog_lowerhalf_s *lower, +static xcpt_t esp32_wdt_capture(struct watchdog_lowerhalf_s *lower, xcpt_t handler); /**************************************************************************** @@ -163,10 +163,10 @@ static struct esp32_wdt_lowerhalf_s g_esp32_rwdt_lowerhalf = * ****************************************************************************/ -static int esp32_wdt_start(FAR struct watchdog_lowerhalf_s *lower) +static int esp32_wdt_start(struct watchdog_lowerhalf_s *lower) { - FAR struct esp32_wdt_lowerhalf_s *priv = - (FAR struct esp32_wdt_lowerhalf_s *)lower; + struct esp32_wdt_lowerhalf_s *priv = + (struct esp32_wdt_lowerhalf_s *)lower; int ret = OK; irqstate_t flags; @@ -248,10 +248,10 @@ static int esp32_wdt_start(FAR struct watchdog_lowerhalf_s *lower) * ****************************************************************************/ -static int esp32_wdt_stop(FAR struct watchdog_lowerhalf_s *lower) +static int esp32_wdt_stop(struct watchdog_lowerhalf_s *lower) { - FAR struct esp32_wdt_lowerhalf_s *priv = - (FAR struct esp32_wdt_lowerhalf_s *)lower; + struct esp32_wdt_lowerhalf_s *priv = + (struct esp32_wdt_lowerhalf_s *)lower; irqstate_t flags; /* Unlock WDT */ @@ -296,10 +296,10 @@ static int esp32_wdt_stop(FAR struct watchdog_lowerhalf_s *lower) * ****************************************************************************/ -static int esp32_wdt_keepalive(FAR struct watchdog_lowerhalf_s *lower) +static int esp32_wdt_keepalive(struct watchdog_lowerhalf_s *lower) { - FAR struct esp32_wdt_lowerhalf_s *priv = - (FAR struct esp32_wdt_lowerhalf_s *)lower; + struct esp32_wdt_lowerhalf_s *priv = + (struct esp32_wdt_lowerhalf_s *)lower; irqstate_t flags; wdinfo("Entry\n"); @@ -335,11 +335,11 @@ static int esp32_wdt_keepalive(FAR struct watchdog_lowerhalf_s *lower) * ****************************************************************************/ -static int esp32_wdt_getstatus(FAR struct watchdog_lowerhalf_s *lower, - FAR struct watchdog_status_s *status) +static int esp32_wdt_getstatus(struct watchdog_lowerhalf_s *lower, + struct watchdog_status_s *status) { - FAR struct esp32_wdt_lowerhalf_s *priv = - (FAR struct esp32_wdt_lowerhalf_s *)lower; + struct esp32_wdt_lowerhalf_s *priv = + (struct esp32_wdt_lowerhalf_s *)lower; uint32_t ticks; uint32_t elapsed; @@ -404,11 +404,11 @@ static int esp32_wdt_getstatus(FAR struct watchdog_lowerhalf_s *lower, * ****************************************************************************/ -static int esp32_wdt_settimeout(FAR struct watchdog_lowerhalf_s *lower, +static int esp32_wdt_settimeout(struct watchdog_lowerhalf_s *lower, uint32_t timeout) { - FAR struct esp32_wdt_lowerhalf_s *priv = - (FAR struct esp32_wdt_lowerhalf_s *)lower; + struct esp32_wdt_lowerhalf_s *priv = + (struct esp32_wdt_lowerhalf_s *)lower; uint16_t rtc_cycles = 0; uint32_t rtc_ms_max = 0; @@ -497,11 +497,11 @@ static int esp32_wdt_settimeout(FAR struct watchdog_lowerhalf_s *lower, * ****************************************************************************/ -static xcpt_t esp32_wdt_capture(FAR struct watchdog_lowerhalf_s *lower, +static xcpt_t esp32_wdt_capture(struct watchdog_lowerhalf_s *lower, xcpt_t handler) { - FAR struct esp32_wdt_lowerhalf_s *priv = - (FAR struct esp32_wdt_lowerhalf_s *)lower; + struct esp32_wdt_lowerhalf_s *priv = + (struct esp32_wdt_lowerhalf_s *)lower; irqstate_t flags; xcpt_t oldhandler; @@ -576,9 +576,9 @@ static xcpt_t esp32_wdt_capture(FAR struct watchdog_lowerhalf_s *lower, /* Interrupt handling *******************************************************/ -static int esp32_wdt_handler(int irq, FAR void *context, FAR void *arg) +static int esp32_wdt_handler(int irq, void *context, void *arg) { - FAR struct esp32_wdt_lowerhalf_s *priv = arg; + struct esp32_wdt_lowerhalf_s *priv = arg; ESP32_WDT_UNLOCK(priv->wdt); @@ -622,7 +622,7 @@ static int esp32_wdt_handler(int irq, FAR void *context, FAR void *arg) * ****************************************************************************/ -int esp32_wdt_initialize(FAR const char *devpath, uint8_t wdt) +int esp32_wdt_initialize(const char *devpath, uint8_t wdt) { struct esp32_wdt_lowerhalf_s *lower = NULL; int ret = OK; @@ -699,7 +699,7 @@ int esp32_wdt_initialize(FAR const char *devpath, uint8_t wdt) */ lower->upper = watchdog_register(devpath, - (FAR struct watchdog_lowerhalf_s *)lower); + (struct watchdog_lowerhalf_s *)lower); if (lower->upper == NULL) { /* The actual cause of the failure may have been a failure to allocate diff --git a/arch/xtensa/src/esp32/esp32_wdt_lowerhalf.h b/arch/xtensa/src/esp32/esp32_wdt_lowerhalf.h index eec1db9ceb5..ed4a89f8e46 100644 --- a/arch/xtensa/src/esp32/esp32_wdt_lowerhalf.h +++ b/arch/xtensa/src/esp32/esp32_wdt_lowerhalf.h @@ -47,6 +47,6 @@ enum wdt_peripherals * Name: esp32_timer_initialize ****************************************************************************/ -int esp32_wdt_initialize(FAR const char *devpath, uint8_t timer); +int esp32_wdt_initialize(const char *devpath, uint8_t timer); #endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_WDT_LOWERHALF_H */ diff --git a/arch/xtensa/src/esp32/esp32_wifi_adapter.c b/arch/xtensa/src/esp32/esp32_wifi_adapter.c index 056afab9db0..f49ac7bbb5e 100644 --- a/arch/xtensa/src/esp32/esp32_wifi_adapter.c +++ b/arch/xtensa/src/esp32/esp32_wifi_adapter.c @@ -56,7 +56,7 @@ #include "hardware/esp32_dport.h" #include "hardware/esp32_emac.h" #include "hardware/esp32_soc.h" -#include "esp32_cpuint.h" +#include "esp32_irq.h" #include "esp32_wifi_adapter.h" #include "esp32_rt_timer.h" #include "esp32_wifi_utils.h" @@ -673,7 +673,7 @@ static int32_t wifi_errno_trans(int ret) * ****************************************************************************/ -static int esp_int_adpt_cb(int irq, void *context, FAR void *arg) +static int esp_int_adpt_cb(int irq, void *context, void *arg) { struct irq_adpt *adapter = (struct irq_adpt *)arg; @@ -844,7 +844,7 @@ static void esp32_ints_on(uint32_t mask) wlinfo("INFO mask=%08x irq=%d\n", mask, irq); - up_enable_irq(irq); + up_enable_irq(ESP32_IRQ_MAC); } /**************************************************************************** @@ -867,7 +867,7 @@ static void esp32_ints_off(uint32_t mask) wlinfo("INFO mask=%08x irq=%d\n", mask, irq); - up_disable_irq(irq); + up_disable_irq(ESP32_IRQ_MAC); } /**************************************************************************** @@ -2094,7 +2094,7 @@ static int esp_event_id_map(int event_id) * ****************************************************************************/ -static void esp_evt_work_cb(FAR void *arg) +static void esp_evt_work_cb(void *arg) { int ret; irqstate_t flags; @@ -4787,7 +4787,7 @@ void esp_wifi_free_eb(void *eb) * ****************************************************************************/ -int esp_wifi_notify_subscribe(pid_t pid, FAR struct sigevent *event) +int esp_wifi_notify_subscribe(pid_t pid, struct sigevent *event) { int id; struct wifi_notify *notify; @@ -6297,9 +6297,17 @@ int esp_wifi_softap_password(struct iwreq *iwr, bool set) if (set) { + /* Clear the password field and copy the user password to it */ + memset(wifi_cfg.ap.password, 0x0, PWD_MAX_LEN); memcpy(wifi_cfg.ap.password, pdata, len); + /* Enable the WPA2 password by default */ + + wifi_cfg.ap.authmode = WIFI_AUTH_WPA_WPA2_PSK; + + /* Setup the config to the SoftAP */ + ret = esp_wifi_set_config(WIFI_IF_AP, &wifi_cfg); if (ret) { diff --git a/arch/xtensa/src/esp32/esp32_wifi_adapter.h b/arch/xtensa/src/esp32/esp32_wifi_adapter.h index f25ad053a81..dbe595bb5fd 100644 --- a/arch/xtensa/src/esp32/esp32_wifi_adapter.h +++ b/arch/xtensa/src/esp32/esp32_wifi_adapter.h @@ -134,7 +134,7 @@ void esp_wifi_free_eb(void *eb); * ****************************************************************************/ -int esp_wifi_notify_subscribe(pid_t pid, FAR struct sigevent *event); +int esp_wifi_notify_subscribe(pid_t pid, struct sigevent *event); #ifdef ESP32_WLAN_HAS_STA diff --git a/arch/xtensa/src/esp32/esp32_wifi_utils.c b/arch/xtensa/src/esp32/esp32_wifi_utils.c index 15ad8083206..ea409c67f45 100644 --- a/arch/xtensa/src/esp32/esp32_wifi_utils.c +++ b/arch/xtensa/src/esp32/esp32_wifi_utils.c @@ -442,7 +442,7 @@ void esp_wifi_scan_event_parse(void) * in pointer field. */ - iwe->u.essid.pointer = (FAR void *)sizeof(iwe->u.essid); + iwe->u.essid.pointer = (void *)sizeof(iwe->u.essid); memcpy(&iwe->u.essid + 1, ap_list_buffer[bss_count].ssid, essid_len); wlinfo("INFO: ssid %s\n", ap_list_buffer[bss_count].ssid); diff --git a/arch/xtensa/src/esp32/esp32_wlan.c b/arch/xtensa/src/esp32/esp32_wlan.c index 8f00a81fd56..27d7eb62302 100644 --- a/arch/xtensa/src/esp32/esp32_wlan.c +++ b/arch/xtensa/src/esp32/esp32_wlan.c @@ -128,7 +128,7 @@ struct wlan_ops int (*rssi)(struct iwreq *iwr, bool set); int (*connect)(void); int (*disconnect)(void); - int (*event)(pid_t pid, FAR struct sigevent *event); + int (*event)(pid_t pid, struct sigevent *event); int (*stop)(void); }; @@ -231,17 +231,17 @@ static const struct wlan_ops g_softap_ops = /* Common TX logic */ -static void wlan_transmit(FAR struct wlan_priv_s *priv); -static void wlan_rxpoll(FAR void *arg); -static int wlan_txpoll(FAR struct net_driver_s *dev); -static void wlan_dopoll(FAR struct wlan_priv_s *priv); +static void wlan_transmit(struct wlan_priv_s *priv); +static void wlan_rxpoll(void *arg); +static int wlan_txpoll(struct net_driver_s *dev); +static void wlan_dopoll(struct wlan_priv_s *priv); /* Watchdog timer expirations */ -static void wlan_txtimeout_work(FAR void *arg); +static void wlan_txtimeout_work(void *arg); static void wlan_txtimeout_expiry(wdparm_t arg); -static void wlan_poll_work(FAR void *arg); +static void wlan_poll_work(void *arg); static void wlan_poll_expiry(wdparm_t arg); /* NuttX callback functions */ @@ -249,15 +249,15 @@ static void wlan_poll_expiry(wdparm_t arg); static int wlan_ifup(struct net_driver_s *dev); static int wlan_ifdown(struct net_driver_s *dev); -static void wlan_txavail_work(FAR void *arg); +static void wlan_txavail_work(void *arg); static int wlan_txavail(struct net_driver_s *dev); #if defined(CONFIG_NET_MCASTGROUP) || defined(CONFIG_NET_ICMPv6) -static int wlan_addmac(struct net_driver_s *dev, FAR const uint8_t *mac); +static int wlan_addmac(struct net_driver_s *dev, const uint8_t *mac); #endif #ifdef CONFIG_NET_MCASTGROUP -static int wlan_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac); +static int wlan_rmmac(struct net_driver_s *dev, const uint8_t *mac); #endif #ifdef CONFIG_NETDEV_IOCTL @@ -446,7 +446,7 @@ static inline void wlan_add_txpkt_head(struct wlan_priv_s *priv, * ****************************************************************************/ -static struct wlan_pktbuf *wlan_recvframe(FAR struct wlan_priv_s *priv) +static struct wlan_pktbuf *wlan_recvframe(struct wlan_priv_s *priv) { irqstate_t flags; sq_entry_t *entry; @@ -479,7 +479,7 @@ static struct wlan_pktbuf *wlan_recvframe(FAR struct wlan_priv_s *priv) * ****************************************************************************/ -static struct wlan_pktbuf *wlan_txframe(FAR struct wlan_priv_s *priv) +static struct wlan_pktbuf *wlan_txframe(struct wlan_priv_s *priv) { irqstate_t flags; sq_entry_t *entry; @@ -513,7 +513,7 @@ static struct wlan_pktbuf *wlan_txframe(FAR struct wlan_priv_s *priv) * ****************************************************************************/ -static void wlan_transmit(FAR struct wlan_priv_s *priv) +static void wlan_transmit(struct wlan_priv_s *priv) { struct wlan_pktbuf *pktbuf; int ret; @@ -550,7 +550,7 @@ static void wlan_transmit(FAR struct wlan_priv_s *priv) * ****************************************************************************/ -static void wlan_tx_done(FAR struct wlan_priv_s *priv) +static void wlan_tx_done(struct wlan_priv_s *priv) { wd_cancel(&priv->txtimeout); @@ -575,7 +575,7 @@ static void wlan_tx_done(FAR struct wlan_priv_s *priv) * ****************************************************************************/ -static int wlan_rx_done(FAR struct wlan_priv_s *priv, void *buffer, +static int wlan_rx_done(struct wlan_priv_s *priv, void *buffer, uint16_t len, void *eb) { struct wlan_pktbuf *pktbuf; @@ -645,12 +645,12 @@ out: * ****************************************************************************/ -static void wlan_rxpoll(FAR void *arg) +static void wlan_rxpoll(void *arg) { struct wlan_pktbuf *pktbuf; struct eth_hdr_s *eth_hdr; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)arg; - FAR struct net_driver_s *dev = &priv->dev; + struct wlan_priv_s *priv = (struct wlan_priv_s *)arg; + struct net_driver_s *dev = &priv->dev; #ifdef WLAN_RX_THRESHOLD uint32_t rbytes = 0; #endif @@ -868,10 +868,10 @@ static void wlan_rxpoll(FAR void *arg) * ****************************************************************************/ -static int wlan_txpoll(FAR struct net_driver_s *dev) +static int wlan_txpoll(struct net_driver_s *dev) { struct wlan_pktbuf *pktbuf; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; DEBUGASSERT(dev->d_buf != NULL); @@ -941,9 +941,9 @@ static int wlan_txpoll(FAR struct net_driver_s *dev) * ****************************************************************************/ -static void wlan_dopoll(FAR struct wlan_priv_s *priv) +static void wlan_dopoll(struct wlan_priv_s *priv) { - FAR struct net_driver_s *dev = &priv->dev; + struct net_driver_s *dev = &priv->dev; struct wlan_pktbuf *pktbuf; uint8_t *txbuf; int ret; @@ -1059,10 +1059,10 @@ static void wlan_txtimeout_expiry(wdparm_t arg) * ****************************************************************************/ -static void wlan_poll_work(FAR void *arg) +static void wlan_poll_work(void *arg) { int32_t delay = WLAN_WDDELAY; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)arg; + struct wlan_priv_s *priv = (struct wlan_priv_s *)arg; struct net_driver_s *dev = &priv->dev; struct wlan_pktbuf *pktbuf; @@ -1129,7 +1129,7 @@ exit: static void wlan_poll_expiry(wdparm_t arg) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)arg; + struct wlan_priv_s *priv = (struct wlan_priv_s *)arg; if (priv->ifup) { @@ -1154,9 +1154,9 @@ static void wlan_poll_expiry(wdparm_t arg) * ****************************************************************************/ -static void wlan_txavail_work(FAR void *arg) +static void wlan_txavail_work(void *arg) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)arg; + struct wlan_priv_s *priv = (struct wlan_priv_s *)arg; /* Try to send all cached TX packets even if net is down */ @@ -1197,10 +1197,10 @@ static void wlan_txavail_work(FAR void *arg) * ****************************************************************************/ -static int wlan_ifup(FAR struct net_driver_s *dev) +static int wlan_ifup(struct net_driver_s *dev) { int ret; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; #ifdef CONFIG_NET_IPv4 ninfo("Bringing up: %d.%d.%d.%d\n", @@ -1264,10 +1264,10 @@ static int wlan_ifup(FAR struct net_driver_s *dev) * ****************************************************************************/ -static int wlan_ifdown(FAR struct net_driver_s *dev) +static int wlan_ifdown(struct net_driver_s *dev) { int ret; - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; net_lock(); @@ -1316,9 +1316,9 @@ static int wlan_ifdown(FAR struct net_driver_s *dev) * ****************************************************************************/ -static int wlan_txavail(FAR struct net_driver_s *dev) +static int wlan_txavail(struct net_driver_s *dev) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; if (work_available(&priv->txwork)) { @@ -1347,9 +1347,9 @@ static int wlan_txavail(FAR struct net_driver_s *dev) ****************************************************************************/ #if defined(CONFIG_NET_MCASTGROUP) || defined(CONFIG_NET_ICMPv6) -static int wlan_addmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac) +static int wlan_addmac(struct net_driver_s *dev, const uint8_t *mac) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; /* Add the MAC address to the hardware multicast routing table */ @@ -1374,9 +1374,9 @@ static int wlan_addmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac) ****************************************************************************/ #ifdef CONFIG_NET_MCASTGROUP -static int wlan_rmmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac) +static int wlan_rmmac(struct net_driver_s *dev, const uint8_t *mac) { - FAR struct wlan_priv_s *priv = (FAR struct wlan_priv_s *)dev->d_private; + struct wlan_priv_s *priv = (struct wlan_priv_s *)dev->d_private; /* Add the MAC address to the hardware multicast routing table */ @@ -1399,9 +1399,9 @@ static int wlan_rmmac(FAR struct net_driver_s *dev, FAR const uint8_t *mac) ****************************************************************************/ #ifdef CONFIG_NET_ICMPv6 -static void wlan_ipv6multicast(FAR struct wlan_priv_s *priv) +static void wlan_ipv6multicast(struct wlan_priv_s *priv) { - FAR struct net_driver_s *dev; + struct net_driver_s *dev; uint16_t tmp16; uint8_t mac[6]; @@ -1471,7 +1471,7 @@ static void wlan_ipv6multicast(FAR struct wlan_priv_s *priv) ****************************************************************************/ #ifdef CONFIG_NETDEV_IOCTL -static int wlan_ioctl(FAR struct net_driver_s *dev, +static int wlan_ioctl(struct net_driver_s *dev, int cmd, unsigned long arg) { @@ -1659,8 +1659,8 @@ static int esp32_net_initialize(int devno, uint8_t *mac_addr, const struct wlan_ops *ops) { int ret; - FAR struct wlan_priv_s *priv; - FAR struct net_driver_s *netdev; + struct wlan_priv_s *priv; + struct net_driver_s *netdev; priv = &g_wlan_priv[devno]; if (priv->ref) @@ -1728,7 +1728,7 @@ static int esp32_net_initialize(int devno, uint8_t *mac_addr, #ifdef ESP32_WLAN_HAS_STA static int wlan_sta_rx_done(void *buffer, uint16_t len, void *eb) { - FAR struct wlan_priv_s *priv = &g_wlan_priv[ESP32_WLAN_STA_DEVNO]; + struct wlan_priv_s *priv = &g_wlan_priv[ESP32_WLAN_STA_DEVNO]; return wlan_rx_done(priv, buffer, len, eb); } @@ -1753,7 +1753,7 @@ static int wlan_sta_rx_done(void *buffer, uint16_t len, void *eb) static void wlan_sta_tx_done(uint8_t *data, uint16_t *len, bool status) { - FAR struct wlan_priv_s *priv = &g_wlan_priv[ESP32_WLAN_STA_DEVNO]; + struct wlan_priv_s *priv = &g_wlan_priv[ESP32_WLAN_STA_DEVNO]; wlan_tx_done(priv); } @@ -1779,7 +1779,7 @@ static void wlan_sta_tx_done(uint8_t *data, uint16_t *len, bool status) #ifdef ESP32_WLAN_HAS_SOFTAP static int wlan_softap_rx_done(void *buffer, uint16_t len, void *eb) { - FAR struct wlan_priv_s *priv = &g_wlan_priv[ESP32_WLAN_SOFTAP_DEVNO]; + struct wlan_priv_s *priv = &g_wlan_priv[ESP32_WLAN_SOFTAP_DEVNO]; return wlan_rx_done(priv, buffer, len, eb); } @@ -1804,7 +1804,7 @@ static int wlan_softap_rx_done(void *buffer, uint16_t len, void *eb) static void wlan_softap_tx_done(uint8_t *data, uint16_t *len, bool status) { - FAR struct wlan_priv_s *priv = &g_wlan_priv[ESP32_WLAN_SOFTAP_DEVNO]; + struct wlan_priv_s *priv = &g_wlan_priv[ESP32_WLAN_SOFTAP_DEVNO]; wlan_tx_done(priv); } diff --git a/arch/xtensa/src/esp32/hardware/esp32_dport.h b/arch/xtensa/src/esp32/hardware/esp32_dport.h index de9e1609afd..6aa829d6cf1 100644 --- a/arch/xtensa/src/esp32/hardware/esp32_dport.h +++ b/arch/xtensa/src/esp32/hardware/esp32_dport.h @@ -4398,4 +4398,10 @@ #define DPORT_APP_FLASH_MMU_TABLE_REG (DR_REG_DPORT_BASE + 0x12000) +#define DPORT_FLASH_MMU_TABLE_SIZE 0x100 + +#define DPORT_FLASH_MMU_TABLE_INVALID_VAL 0x100 + +#define DPORT_MMU_ADDRESS_MASK 0xff + #endif /* __ARCH_XTENSA_SRC_ESP32_HARDWARE_ESP32_DPORT_H */ diff --git a/arch/xtensa/src/esp32s2/Kconfig b/arch/xtensa/src/esp32s2/Kconfig index e4ccd9a151b..c529b522c56 100644 --- a/arch/xtensa/src/esp32s2/Kconfig +++ b/arch/xtensa/src/esp32s2/Kconfig @@ -173,6 +173,7 @@ endchoice # On-board Crystal Frequency config ESP32S2_RT_TIMER bool "Real-time Timer" + select ESP32S2_TIMER default n config ESP32S2_PARTITION @@ -855,6 +856,13 @@ config ESP32S2_ONESHOT Enable a wrapper around the low level timer/counter functions to support one-shot timer. +config ESP32S2_FREERUN + bool "Freerun timer wrapper" + default n + ---help--- + Enable a wrapper around the low level timer/counter functions to + support freerun timer. + endmenu # Timer/counter Configuration endif # ESP32S2_TIMER diff --git a/arch/xtensa/src/esp32s2/Make.defs b/arch/xtensa/src/esp32s2/Make.defs index 7074f98d367..b375737e3b3 100644 --- a/arch/xtensa/src/esp32s2/Make.defs +++ b/arch/xtensa/src/esp32s2/Make.defs @@ -22,7 +22,7 @@ HEAD_ASRC = xtensa_vectors.S xtensa_window_vector.S xtensa_windowspill.S HEAD_ASRC += xtensa_int_handlers.S xtensa_user_handler.S -HEAD_CSRC = esp32s2_start.c +HEAD_CSRC = esp32s2_start.c esp32s2_wdt.c # Common XTENSA files (arch/xtensa/src/common) @@ -50,10 +50,6 @@ ifeq ($(CONFIG_DEBUG_ALERT),y) CMN_CSRCS += xtensa_dumpstate.c endif -ifeq ($(CONFIG_XTENSA_DUMPBT_ON_ASSERT),y) - CMN_ASRCS += xtensa_backtrace.S -endif - ifeq ($(CONFIG_SPINLOCK),y) CMN_CSRCS += xtensa_testset.c endif @@ -79,3 +75,24 @@ ifeq ($(CONFIG_ESP32S2_UART),y) CMN_CSRCS += esp32s2_serial.c endif +ifeq ($(CONFIG_ESP32S2_TIMER),y) +CHIP_CSRCS += esp32s2_tim.c +ifeq ($(CONFIG_TIMER),y) +CHIP_CSRCS += esp32s2_tim_lowerhalf.c +endif +endif + +ifeq ($(CONFIG_ESP32S2_FREERUN),y) +CHIP_CSRCS += esp32s2_freerun.c +endif + +ifeq ($(CONFIG_ESP32S2_RT_TIMER),y) +CHIP_CSRCS += esp32s2_rt_timer.c +endif + +ifeq ($(CONFIG_ESP32S2_ONESHOT),y) +CHIP_CSRCS += esp32s2_oneshot.c +ifeq ($(CONFIG_ONESHOT),y) +CHIP_CSRCS += esp32s2_oneshot_lowerhalf.c +endif +endif diff --git a/arch/xtensa/src/esp32s2/esp32s2_allocateheap.c b/arch/xtensa/src/esp32s2/esp32s2_allocateheap.c index 471bd93363a..d603c4d6ba8 100644 --- a/arch/xtensa/src/esp32s2/esp32s2_allocateheap.c +++ b/arch/xtensa/src/esp32s2/esp32s2_allocateheap.c @@ -57,13 +57,13 @@ * ****************************************************************************/ -void up_allocate_heap(FAR void **heap_start, size_t *heap_size) +void up_allocate_heap(void **heap_start, size_t *heap_size) { extern uint32_t *_dram0_rtos_reserved_start; board_autoled_on(LED_HEAPALLOCATE); - *heap_start = (FAR void *)&_sheap; + *heap_start = (void *)&_sheap; *heap_size = (size_t)((uintptr_t)&_dram0_rtos_reserved_start - (uintptr_t)&_sheap); } diff --git a/arch/xtensa/src/esp32s2/esp32s2_cpuint.c b/arch/xtensa/src/esp32s2/esp32s2_cpuint.c index ce1c3447b35..c22c38f2a8d 100644 --- a/arch/xtensa/src/esp32s2/esp32s2_cpuint.c +++ b/arch/xtensa/src/esp32s2/esp32s2_cpuint.c @@ -206,23 +206,6 @@ static const uint32_t g_priority[5] = * Private Functions ****************************************************************************/ -/**************************************************************************** - * Name: xtensa_disable_all - * - * Description: - * Disable all CPU interrupts. - ****************************************************************************/ - -static inline void xtensa_disable_all(void) -{ - __asm__ __volatile__ - ( - "movi a2, 0\n" - "xsr a2, INTENABLE\n" - : : : "a2" - ); -} - /**************************************************************************** * Name: esp32s2_alloc_cpuint * diff --git a/arch/xtensa/src/esp32s2/esp32s2_freerun.c b/arch/xtensa/src/esp32s2/esp32s2_freerun.c new file mode 100644 index 00000000000..bce3ab00d39 --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_freerun.c @@ -0,0 +1,353 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_freerun.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "esp32s2_freerun.h" +#include "esp32s2_clockconfig.h" +#include "esp32s2_gpio.h" + +#ifdef CONFIG_ESP32S2_FREERUN + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define MAX_TIMERS 4 +#define MAX_US_RESOLUTION 819 /* MAX_US = (PREmax * USEC_PER_SEC) / CLKmin */ +#define TIMER_WIDTH 64 + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_freerun_handler + * + * Description: + * Timer interrupt callback. When the freerun timer counter overflows, + * this interrupt will occur. It will just increment an overflow counter. + * + * Input Parameters: + * irq - IRQ associated to that interrupt. + * arg - An opaque argument provided when the interrupt + * was registered. + * + * Returned Value: + * OK + * + ****************************************************************************/ + +#ifndef CONFIG_CLOCK_TIMEKEEPING +static int esp32s2_freerun_handler(int irq, void *context, void *arg) +{ + struct esp32s2_freerun_s *freerun = (struct esp32s2_freerun_s *) arg; + + DEBUGASSERT(freerun != NULL); + + freerun->overflow++; + ESP32S2_TIM_SETALRM(freerun->tch, true); /* Re-enables the alarm */ + ESP32S2_TIM_ACKINT(freerun->tch); /* Clear the Interrupt */ + return OK; +} +#endif /* CONFIG_CLOCK_TIMEKEEPING */ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_freerun_initialize + * + * Description: + * Initialize the freerun timer wrapper. + * + * Input Parameters: + * freerun - A pointer to an allocated instance of the freerun + * state structure + * chan - Timer counter channel to be used. + * resolution - The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to + * the range of uint16_t (excluding zero). + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_freerun_initialize(struct esp32s2_freerun_s *freerun, + int chan, uint16_t resolution) +{ + uint16_t pre; + int ret = OK; + + tmrinfo("chan=%d resolution=%d usecs\n", chan, resolution); + + DEBUGASSERT(freerun != NULL); + DEBUGASSERT(chan >= 0); + DEBUGASSERT(chan < MAX_TIMERS); + DEBUGASSERT(resolution > 0); + + /* We can't have a resolution bigger than this. + * The ESP32-C3 prescaler doesn't support. + * max resolution = (max prescaler * USEC_PER_SEC) / esp32s2_clk_apb_freq() + */ + + DEBUGASSERT(resolution <= MAX_US_RESOLUTION); + + freerun->tch = esp32s2_tim_init(chan); + if (freerun->tch == NULL) + { + tmrerr("ERROR: Failed to allocate TIM %d\n", chan); + ret = -EBUSY; + } + else + { + /* Initialize the remaining fields in the state structure. */ + + freerun->chan = chan; + freerun->resolution = resolution; + freerun->max_timeout = (UINT64_C(1) << (TIMER_WIDTH - 1)); + + /* Ensure timer is disabled. + * Change the prescaler divider with the timer enabled can lead to + * unpredictable results. + */ + + ESP32S2_TIM_STOP(freerun->tch); + + /* Configure clock source */ + + ESP32S2_TIM_CLK_SRC(freerun->tch, ESP32S2_TIM_APB_CLK); + + /* Calculate the suitable prescaler for a period + * for the requested resolution. + */ + + pre = esp_clk_apb_freq() * resolution / USEC_PER_SEC; + + tmrinfo("pre= %" PRIu16 " clk=%d \n", pre, esp_clk_apb_freq()); + + /* Configure TIMER prescaler */ + + ESP32S2_TIM_SETPRE(freerun->tch, pre); + + /* Configure TIMER mode */ + + ESP32S2_TIM_SETMODE(freerun->tch, ESP32S2_TIM_MODE_UP); + + /* Clear TIMER counter value */ + + ESP32S2_TIM_CLEAR(freerun->tch); + + /* Set the maximum timeout */ + + ESP32S2_TIM_SETALRVL(freerun->tch, freerun->max_timeout); + +#ifndef CONFIG_CLOCK_TIMEKEEPING + + /* Set the interrupt */ + + freerun->overflow = 0; + + /* Enable autoreload */ + + ESP32S2_TIM_SETARLD(freerun->tch, true); + + /* Enable TIMER alarm */ + + ESP32S2_TIM_SETALRM(freerun->tch, true); + + /* Clear Interrupt Bits Status */ + + ESP32S2_TIM_ACKINT(freerun->tch); + + /* Register the handler */ + + { + irqstate_t flags = enter_critical_section(); + ret = ESP32S2_TIM_SETISR(freerun->tch, esp32s2_freerun_handler, + freerun); + leave_critical_section(flags); + } + + if (ret == OK) + { + ESP32S2_TIM_ENABLEINT(freerun->tch); + } + +#endif + /* Finally, start the TIMER */ + + ESP32S2_TIM_START(freerun->tch); + } + + return ret; +} + +/**************************************************************************** + * Name: esp32s2_freerun_counter + * + * Description: + * Read the counter register of the free-running timer. + * + * Input Parameters: + * freerun - Caller allocated instance of the freerun state + * structure. This structure must have been previously + * initialized via a call to + * esp32s2_freerun_initialize(); + * ts - The location in which to return the time from the + * free-running timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +#ifndef CONFIG_CLOCK_TIMEKEEPING + +int esp32s2_freerun_counter(struct esp32s2_freerun_s *freerun, + struct timespec *ts) +{ + uint64_t usec; + uint64_t counter; + uint64_t verify; + uint32_t overflow; + uint32_t sec; + int pending; + irqstate_t flags; + + DEBUGASSERT(freerun != NULL); + DEBUGASSERT(ts != NULL); + + /* Temporarily disable the overflow counter. */ + + flags = enter_critical_section(); + + overflow = freerun->overflow; + ESP32S2_TIM_GETCTR(freerun->tch, &counter); + pending = ESP32S2_TIM_CHECKINT(freerun->tch); + ESP32S2_TIM_GETCTR(freerun->tch, &verify); + + /* If an interrupt was pending before we re-enabled interrupts, + * then the overflow needs to be incremented. + */ + + if (pending) + { + ESP32S2_TIM_ACKINT(freerun->tch); + + /* Increment the overflow count and use the value of the + * guaranteed to be AFTER the overflow occurred. + */ + + overflow++; + counter = verify; + + /* Update freerun overflow counter. */ + + freerun->overflow = overflow; + } + + leave_critical_section(flags); + + tmrinfo("counter=%" PRIu64 " (%" PRIu64 ") overflow=%" PRIu32 + ", pending=%i\n", + counter, verify, overflow, pending); + + usec = (uint64_t)(((overflow * freerun->max_timeout) + counter) + * freerun->resolution); + + /* And return the value of the timer */ + + sec = (uint32_t)(usec / USEC_PER_SEC); + ts->tv_sec = sec; + ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC; + + tmrinfo(" usec=%" PRIu64 " ts=(%lu, %lu)\n", + usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec); + + return OK; +} + +#endif /* CONFIG_CLOCK_TIMEKEEPING */ + +/**************************************************************************** + * Name: esp32s2_freerun_uninitialize + * + * Description: + * Stop the free-running timer and release all resources that it uses. + * + * Input Parameters: + * freerun - Caller allocated instance of the freerun state + * structure. This structure must have been previously + * initialized via a call to + * esp32s2_freerun_initialize(); + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_freerun_uninitialize(struct esp32s2_freerun_s *freerun) +{ + int ret; + DEBUGASSERT(freerun != NULL); + DEBUGASSERT(freerun->tch != NULL); + + /* Stop timer */ + + ESP32S2_TIM_STOP(freerun->tch); + + /* Disable timer interrupt */ + + ESP32S2_TIM_DISABLEINT(freerun->tch); + + /* Detach handler */ + + ret = ESP32S2_TIM_SETISR(freerun->tch, NULL, NULL); + + /* Free the timer */ + + esp32s2_tim_deinit(freerun->tch); + freerun->tch = NULL; + + return ret; +} + +#endif /* CONFIG_ESP32S2_FREERUN */ diff --git a/arch/xtensa/src/esp32s2/esp32s2_freerun.h b/arch/xtensa/src/esp32s2/esp32s2_freerun.h new file mode 100644 index 00000000000..f61b42e0e8e --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_freerun.h @@ -0,0 +1,145 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_freerun.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_XTENSA_SRC_ESP32S2_FREERUN_H +#define __ARCH_XTENSA_SRC_ESP32S2_FREERUN_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "esp32s2_tim.h" + +#ifdef CONFIG_ESP32S2_FREERUN + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* The freerun client must allocate an instance of this structure and called + * esp32s2_freerun_initialize() before using the freerun facilities. The + * client should not access the contents of this structure directly since + * the contents are subject to change. + */ + +struct esp32s2_freerun_s +{ + uint8_t chan; /* The timer/counter in use */ + uint32_t overflow; /* Timer counter overflow */ + uint16_t resolution; /* Timer resolution */ + uint64_t max_timeout; /* Maximum timeout to overflow */ + struct esp32s2_tim_dev_s *tch; /* Handle returned by esp32s2_tim_init() */ +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_freerun_initialize + * + * Description: + * Initialize the freerun timer wrapper. + * + * Input Parameters: + * freerun - Caller allocated instance of the freerun + * state structure + * chan - Timer counter channel to be used. + * resolution - The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to + * the range of uint16_t (excluding zero). + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_freerun_initialize(struct esp32s2_freerun_s *freerun, + int chan, uint16_t resolution); + +/**************************************************************************** + * Name: esp32s2_freerun_counter + * + * Description: + * Read the counter register of the free-running timer. + * + * Input Parameters: + * freerun - Caller allocated instance of the freerun state + * structure. This structure must have been previously + * initialized via a call to + * esp32s2_freerun_initialize(); + * ts - The location in which to return the time from the + * free-running timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_freerun_counter(struct esp32s2_freerun_s *freerun, + struct timespec *ts); + +/**************************************************************************** + * Name: esp32s2_freerun_uninitialize + * + * Description: + * Stop the free-running timer and release all resources that it uses. + * + * Input Parameters: + * freerun - Caller allocated instance of the freerun state + * structure. This structure must have been previously + * initialized via a call to + * esp32s2_freerun_initialize(); + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_freerun_uninitialize(struct esp32s2_freerun_s *freerun); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_ESP32S2_FREERUN */ +#endif /* __ARCH_XTENSA_SRC_ESP32S2_FREERUN_H */ diff --git a/arch/xtensa/src/esp32s2/esp32s2_gpio.c b/arch/xtensa/src/esp32s2/esp32s2_gpio.c index 265160c74ce..2f5f3b7d5c6 100644 --- a/arch/xtensa/src/esp32s2/esp32s2_gpio.c +++ b/arch/xtensa/src/esp32s2/esp32s2_gpio.c @@ -105,7 +105,7 @@ static void gpio_dispatch(int irq, uint32_t status, uint32_t *regs) ****************************************************************************/ #ifdef CONFIG_ESP32S2_GPIO_IRQ -static int gpio_interrupt(int irq, FAR void *context, FAR void *arg) +static int gpio_interrupt(int irq, void *context, void *arg) { uint32_t status; diff --git a/arch/xtensa/src/esp32s2/esp32s2_intdecode.c b/arch/xtensa/src/esp32s2/esp32s2_intdecode.c index 5f6ac7e05b6..6e7e0d618eb 100644 --- a/arch/xtensa/src/esp32s2/esp32s2_intdecode.c +++ b/arch/xtensa/src/esp32s2/esp32s2_intdecode.c @@ -37,19 +37,6 @@ * Private Functions ****************************************************************************/ -/**************************************************************************** - * Name: xtensa_intclear - ****************************************************************************/ - -static inline void xtensa_intclear(uint32_t mask) -{ - __asm__ __volatile__ - ( - "wsr %0, INTCLEAR\n" - : "=r"(mask) : : - ); -} - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/arch/xtensa/src/esp32s2/esp32s2_oneshot.c b/arch/xtensa/src/esp32s2/esp32s2_oneshot.c new file mode 100644 index 00000000000..ced51d210f1 --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_oneshot.c @@ -0,0 +1,465 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_oneshot.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "hardware/esp32s2_soc.h" + +#include "esp32s2_tim.h" +#include "esp32s2_clockconfig.h" +#include "esp32s2_oneshot.h" + +#ifdef CONFIG_ESP32S2_ONESHOT + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define MAX_TIMER_COUNTER UINT64_MAX + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int esp32s2_oneshot_handler(int irq, void *context, void *arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_oneshot_handler + * + * Description: + * Oneshot interrupt Handler. When any oneshot timer interrupt + * expires, this function will be triggered. It will forward the call to + * the next level up. + * + * Input Parameters: + * irq - IRQ associated to that interrupt + * arg - A pointer to the argument provided when the interrupt was + * registered. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int esp32s2_oneshot_handler(int irq, void *context, void *arg) +{ + int ret = OK; + struct esp32s2_oneshot_s *oneshot = + (struct esp32s2_oneshot_s *)arg; + + DEBUGASSERT(oneshot != NULL && oneshot->handler != NULL); + + tmrinfo("Oneshot handler triggered\n"); + + /* Stop timer + * Note: It's not necessary to disable the alarm because + * it automatically disables each time it expires. + */ + + ESP32S2_TIM_STOP(oneshot->tim); + + /* Disable interrupts */ + + ESP32S2_TIM_DISABLEINT(oneshot->tim); + + /* Detach handler */ + + ret = ESP32S2_TIM_SETISR(oneshot->tim, NULL, NULL); + + /* Call the callback */ + + oneshot->handler((void *)oneshot->arg); + + /* Restore state */ + + oneshot->running = false; + oneshot->handler = NULL; + oneshot->arg = NULL; + + /* Clear the Interrupt */ + + ESP32S2_TIM_ACKINT(oneshot->tim); + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_oneshot_initialize + * + * Description: + * Initialize the oneshot timer wrapper. + * + * Input Parameters: + * oneshot Caller allocated instance of the oneshot state structure. + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_oneshot_initialize(struct esp32s2_oneshot_s *oneshot, + int chan, uint16_t resolution) +{ + int ret = OK; + + tmrinfo("chan=%d resolution=%d usecs\n", chan, resolution); + + DEBUGASSERT(oneshot != NULL); + DEBUGASSERT(resolution > 0); + + oneshot->chan = chan; + + oneshot->tim = esp32s2_tim_init(chan); + if (oneshot->tim == NULL) + { + tmrerr("ERROR: Failed to allocate TIM %d\n", chan); + ret = -EBUSY; + } + else + { + uint16_t pre; + + /* Initialize the remaining fields in the state structure. */ + + oneshot->running = false; + oneshot->handler = NULL; + oneshot->arg = NULL; + oneshot->resolution = resolution; + + /* Ensure timer is disabled. + * Change the prescaler divider with the timer enabled can lead to + * unpredictable results. + */ + + ESP32S2_TIM_STOP(oneshot->tim); + + ESP32S2_TIM_CLK_SRC(oneshot->tim, ESP32S2_TIM_APB_CLK); + + /* Calculate the suitable prescaler according to the current apb + * frequency to generate a period equals to resolution. + */ + + pre = (esp_clk_apb_freq() * resolution) / USEC_PER_SEC; + + /* Configure TIMER prescaler */ + + ESP32S2_TIM_SETPRE(oneshot->tim, pre); + } + + return ret; +} + +/**************************************************************************** + * Name: esp32s2_oneshot_max_delay + * + * Description: + * Return the maximum delay supported by the timer. + * + * Input Parameters: + * oneshot Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * esp32s2_oneshot_initialize(); + * + * Output Parameters: + * usec The location in which to return the maximum delay in us. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +int esp32s2_oneshot_max_delay(struct esp32s2_oneshot_s *oneshot, + uint64_t *usec) +{ + DEBUGASSERT(oneshot != NULL && usec != NULL); + + /* In theory, Maximum delay (us) = resolution (us) * MAX_TIMER_COUNTER + * But if the resolution is bigger than 1 us, the value will not fit + * in a uint64_t. So, this function assumes the max delay using a + * resolution of 1 us. + */ + + *usec = MAX_TIMER_COUNTER; + + return OK; +} + +/**************************************************************************** + * Name: esp32s2_oneshot_start + * + * Description: + * Start the oneshot timer + * + * Input Parameters: + * oneshot Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * esp32s2_oneshot_initialize(); + * handler The function to call when when the oneshot timer expires. + * arg An opaque argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_oneshot_start(struct esp32s2_oneshot_s *oneshot, + oneshot_handler_t handler, void *arg, + const struct timespec *ts) +{ + uint64_t timeout_us; + int ret = OK; + + tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n", + handler, arg, (unsigned long)ts->tv_sec, + (unsigned long)ts->tv_nsec); + DEBUGASSERT(oneshot != NULL); + DEBUGASSERT(handler != NULL); + DEBUGASSERT(ts != NULL); + + if (oneshot->running) + { + tmrinfo("One shot timer already in use. Cancelling it ...\n"); + + /* If the oneshot timer was already started, cancel it and then + * restart. + */ + + esp32s2_oneshot_cancel(oneshot, NULL); + } + + /* Save the new callback and its argument */ + + oneshot->handler = handler; + oneshot->arg = arg; + + /* Retrieve the duration from timespec in microsecond */ + + timeout_us = (uint64_t)ts->tv_sec * USEC_PER_SEC + + (uint64_t)(ts->tv_nsec / NSEC_PER_USEC); + + /* Verify if it is a multiple of the configured resolution. + * In case it isn't, warn the user. + */ + + if ((timeout_us % oneshot->resolution) != 0) + { + tmrwarn("Warning: The interval is not multiple of the resolution.\n" + "Adjust the resolution in your bringup file.\n"); + } + + /* Set the timer */ + + /* Ensure timer is stopped */ + + ESP32S2_TIM_STOP(oneshot->tim); + + /* Configure TIMER mode */ + + ESP32S2_TIM_SETMODE(oneshot->tim, ESP32S2_TIM_MODE_UP); + + /* Clear TIMER counter value */ + + ESP32S2_TIM_CLEAR(oneshot->tim); + + /* Disable autoreload */ + + ESP32S2_TIM_SETARLD(oneshot->tim, false); + + /* Set the timeout */ + + ESP32S2_TIM_SETALRVL(oneshot->tim, timeout_us / oneshot->resolution); + + /* Enable TIMER alarm */ + + ESP32S2_TIM_SETALRM(oneshot->tim, true); + + /* Clear Interrupt Bits Status */ + + ESP32S2_TIM_ACKINT(oneshot->tim); + + /* Set the interrupt */ + + /* Register the handler that calls the callback */ + + ret = ESP32S2_TIM_SETISR(oneshot->tim, esp32s2_oneshot_handler, oneshot); + if (ret == OK) + { + ESP32S2_TIM_ENABLEINT(oneshot->tim); + + /* Finally, start the TIMER */ + + ESP32S2_TIM_START(oneshot->tim); + + oneshot->running = true; + } + + return ret; +} + +/**************************************************************************** + * Name: esp32s2_oneshot_cancel + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * Input Parameters: + * oneshot Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * esp32s2_oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. ts may be zero in which case the time remaining + * is not returned. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +int esp32s2_oneshot_cancel(struct esp32s2_oneshot_s *oneshot, + struct timespec *ts) +{ + int ret = OK; + uint64_t current_us; + uint64_t remaining_us; + uint64_t timeout_us; + uint64_t counter_value; + uint64_t alarm_value; + + DEBUGASSERT(oneshot); + + if (oneshot->running == false) + { + tmrinfo("Trying to cancel a non started oneshot timer.\n"); + ts->tv_sec = 0; + ts->tv_nsec = 0; + } + else + { + /* Stop timer */ + + ESP32S2_TIM_STOP(oneshot->tim); + + /* Disable int */ + + ESP32S2_TIM_DISABLEINT(oneshot->tim); + + /* Detach handler */ + + ret = ESP32S2_TIM_SETISR(oneshot->tim, NULL, NULL); + + if (ts != NULL) + { + /* Get the current counter value */ + + ESP32S2_TIM_GETCTR(oneshot->tim, &counter_value); + + /* Get the current configured timeout */ + + ESP32S2_TIM_GETALRVL(oneshot->tim, &alarm_value); + + current_us = counter_value * oneshot->resolution; + timeout_us = alarm_value * oneshot->resolution; + + /* Remaining time (us) = timeout (us) - current (us) */ + + remaining_us = timeout_us - current_us; + ts->tv_sec = remaining_us / USEC_PER_SEC; + remaining_us = remaining_us - ts->tv_sec * USEC_PER_SEC; + ts->tv_nsec = remaining_us * NSEC_PER_USEC; + } + + oneshot->running = false; + oneshot->handler = NULL; + oneshot->arg = NULL; + } + + return ret; +} + +/**************************************************************************** + * Name: esp32s2_oneshot_current + * + * Description: + * Get the current time. + * + * Input Parameters: + * oneshot Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * esp32s2_oneshot_initialize(); + * + * Output Parameters: + * usec The location in which to return the current time in us. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +int esp32s2_oneshot_current(struct esp32s2_oneshot_s *oneshot, + uint64_t *usec) +{ + /* Get the current counter value */ + + ESP32S2_TIM_GETCTR(oneshot->tim, usec); + + *usec = *usec * (uint64_t)oneshot->resolution; + + return OK; +} + +#endif /* CONFIG_ESP32S2_ONESHOT */ diff --git a/arch/xtensa/src/esp32s2/esp32s2_oneshot.h b/arch/xtensa/src/esp32s2/esp32s2_oneshot.h new file mode 100644 index 00000000000..97344aff1dc --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_oneshot.h @@ -0,0 +1,208 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_oneshot.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_XTENSA_SRC_ESP32S2_ONESHOT_H +#define __ARCH_XTENSA_SRC_ESP32S2_ONESHOT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "esp32s2_tim.h" + +#ifdef CONFIG_ESP32S2_ONESHOT + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* This describes the callback function that will be invoked when the oneshot + * timer expires. The oneshot fires, the client will receive: + * + * arg - The opaque argument provided when the interrupt was registered + */ + +typedef void (*oneshot_handler_t)(void *arg); + +/* The oneshot client must allocate an instance of this structure and call + * esp32s2_oneshot_initialize() before using the oneshot facilities. The + * client should not access the contents of this structure directly since + * the contents are subject to change. + */ + +struct esp32s2_oneshot_s +{ + uint8_t chan; /* The timer/counter in use */ + volatile bool running; /* True: the timer is running */ + struct esp32s2_tim_dev_s *tim; /* Pointer returned by + * esp32s2_tim_init() */ + volatile oneshot_handler_t handler; /* Oneshot expiration callback */ + volatile void *arg; /* The argument that will accompany + * the callback */ + uint32_t resolution; /* us */ +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_oneshot_initialize + * + * Description: + * Initialize the oneshot timer wrapper. + * + * Input Parameters: + * oneshot Allocated instance of the oneshot state structure. + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_oneshot_initialize(struct esp32s2_oneshot_s *oneshot, + int chan, uint16_t resolution); + +/**************************************************************************** + * Name: esp32s2_oneshot_max_delay + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds). + * + * Input Parameters: + * oneshot Allocated instance of the oneshot state structure. + * + * Output Parameters: + * usec The location in which to return the maximum delay in us. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_oneshot_max_delay(struct esp32s2_oneshot_s *oneshot, + uint64_t *usec); + +/**************************************************************************** + * Name: esp32s2_oneshot_start + * + * Description: + * Start the oneshot timer + * + * Input Parameters: + * oneshot Allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * esp32s2_oneshot_initialize(); + * handler The function to call when the oneshot timer expires. + * arg An opaque argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +int esp32s2_oneshot_start(struct esp32s2_oneshot_s *oneshot, + oneshot_handler_t handler, void *arg, + const struct timespec *ts); + +/**************************************************************************** + * Name: esp32s2_oneshot_cancel + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * + * Input Parameters: + * oneshot Allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * esp32s2_oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +int esp32s2_oneshot_cancel(struct esp32s2_oneshot_s *oneshot, + struct timespec *ts); + +/**************************************************************************** + * Name: esp32s2_oneshot_current + * + * Description: + * Get the current time. + * + * Input Parameters: + * oneshot Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * esp32s2_oneshot_initialize(); + * + * Output Parameters: + * usec The location in which to return the current time in us. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +int esp32s2_oneshot_current(struct esp32s2_oneshot_s *oneshot, + uint64_t *usec); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_ESP32S2_ONESHOT */ +#endif /* __ARCH_XTENSA_SRC_ESP32S2_ONESHOT_H */ diff --git a/arch/xtensa/src/esp32s2/esp32s2_oneshot_lowerhalf.c b/arch/xtensa/src/esp32s2/esp32s2_oneshot_lowerhalf.c new file mode 100644 index 00000000000..935779d1f8a --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_oneshot_lowerhalf.c @@ -0,0 +1,370 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_oneshot_lowerhalf.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "esp32s2_oneshot.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct esp32s2_oneshot_lowerhalf_s +{ + /* This is the part of the lower half driver that is visible to the upper- + * half client of the driver. This must be the first thing in this + * struct so that pointers to struct oneshot_lowerhalf_s are cast + * compatible to struct esp32s2_oneshot_lowerhalf_s and vice versa. + */ + + struct oneshot_lowerhalf_s lh; /* Lower half instance */ + struct esp32s2_oneshot_s oneshot; /* ESP32-S2-specific oneshot state */ + oneshot_callback_t callback; /* Upper half Interrupt callback */ + void *arg; /* Argument passed to handler */ + uint16_t resolution; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static void esp32s2_oneshot_lh_handler(void *arg); + +/* "Lower half" driver methods **********************************************/ + +static int oneshot_lh_max_delay(struct oneshot_lowerhalf_s *lower, + struct timespec *ts); +static int oneshot_lh_start(struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, + void *arg, + const struct timespec *ts); +static int oneshot_lh_cancel(struct oneshot_lowerhalf_s *lower, + struct timespec *ts); +static int oneshot_lh_current(struct oneshot_lowerhalf_s *lower, + struct timespec *ts); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* "Lower half" driver methods */ + +static const struct oneshot_operations_s g_esp32s2_timer_ops = +{ + .max_delay = oneshot_lh_max_delay, + .start = oneshot_lh_start, + .cancel = oneshot_lh_cancel, + .current = oneshot_lh_current +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_oneshot_lh_handler + * + * Description: + * Timer expiration handler. + * + * Input Parameters: + * arg - Should be the same argument provided when esp32s2_oneshot_start() + * was called. + * + ****************************************************************************/ + +static void esp32s2_oneshot_lh_handler(void *arg) +{ + struct esp32s2_oneshot_lowerhalf_s *priv = + (struct esp32s2_oneshot_lowerhalf_s *)arg; + + DEBUGASSERT(priv != NULL); + DEBUGASSERT(priv->callback != NULL); + + tmrinfo("Oneshot LH handler triggered\n"); + + /* Call the callback */ + + priv->callback(&priv->lh, priv->arg); + + /* Restore state */ + + priv->callback = NULL; + priv->arg = NULL; +} + +/**************************************************************************** + * Name: oneshot_lh_max_delay + * + * Description: + * Determine the maximum delay of the one-shot timer (in microseconds). + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the maximum delay. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int oneshot_lh_max_delay(struct oneshot_lowerhalf_s *lower, + struct timespec *ts) +{ + DEBUGASSERT(ts != NULL); + + /* The real maximum delay surpass the limit that timespec can + * represent. Even using the better case: a resolution of + * 1 us. + * Therefore, here, set the timespec with the + * maximum value it can represent. + */ + + ts->tv_sec = UINT32_MAX; + ts->tv_nsec = NSEC_PER_SEC - 1; + + tmrinfo("max sec=%" PRIu32 "\n", ts->tv_sec); + tmrinfo("max nsec=%ld\n", ts->tv_nsec); + + return OK; +} + +/**************************************************************************** + * Name: oneshot_lh_start + * + * Description: + * Start the oneshot timer. + * + * Input Parameters: + * lower An instance of the lower-half oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * callback The function to call when when the oneshot timer expires. + * Inside the handler scope. + * arg A pointer to the argument that will accompany the callback. + * ts Provides the duration of the one shot timer. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned + * on failure. + * + ****************************************************************************/ + +static int oneshot_lh_start(struct oneshot_lowerhalf_s *lower, + oneshot_callback_t callback, + void *arg, + const struct timespec *ts) +{ + struct esp32s2_oneshot_lowerhalf_s *priv = + (struct esp32s2_oneshot_lowerhalf_s *)lower; + int ret; + irqstate_t flags; + + DEBUGASSERT(priv != NULL); + DEBUGASSERT(callback != NULL); + DEBUGASSERT(arg != NULL); + DEBUGASSERT(ts != NULL); + + /* Save the callback information and start the timer */ + + flags = enter_critical_section(); + priv->callback = callback; + priv->arg = arg; + ret = esp32s2_oneshot_start(&priv->oneshot, + esp32s2_oneshot_lh_handler, + priv, + ts); + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: esp32s2_oneshot_start failed: %d\n", ret); + } + + return ret; +} + +/**************************************************************************** + * Name: oneshot_lh_cancel + * + * Description: + * Cancel the oneshot timer and return the time remaining on the timer. + * + * NOTE: This function may execute at a high rate with no timer running (as + * when pre-emption is enabled and disabled). + * + * Input Parameters: + * lower Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the time remaining on the + * oneshot timer. A time of zero is returned if the timer is + * not running. + * + * Returned Value: + * Zero (OK) is returned on success. A call to up_timer_cancel() when + * the timer is not active should also return success; a negated errno + * value is returned on any failure. + * + ****************************************************************************/ + +static int oneshot_lh_cancel(struct oneshot_lowerhalf_s *lower, + struct timespec *ts) +{ + struct esp32s2_oneshot_lowerhalf_s *priv = + (struct esp32s2_oneshot_lowerhalf_s *)lower; + irqstate_t flags; + int ret; + + DEBUGASSERT(priv != NULL); + + /* Cancel the timer */ + + flags = enter_critical_section(); + ret = esp32s2_oneshot_cancel(&priv->oneshot, ts); + priv->callback = NULL; + priv->arg = NULL; + leave_critical_section(flags); + + if (ret < 0) + { + tmrerr("ERROR: esp32s2_oneshot_cancel failed: %d\n", flags); + } + + return ret; +} + +/**************************************************************************** + * Name: oneshot_lh_current + * + * Description: + * Get the current time. + * + * Input Parameters: + * lower Caller allocated instance of the oneshot state structure. This + * structure must have been previously initialized via a call to + * oneshot_initialize(); + * ts The location in which to return the current time. A time of zero + * is returned for the initialization moment. + * + * Returned Value: + * Zero (OK) is returned on success, a negated errno value is returned on + * any failure. + * + ****************************************************************************/ + +static int oneshot_lh_current(struct oneshot_lowerhalf_s *lower, + struct timespec *ts) +{ + struct esp32s2_oneshot_lowerhalf_s *priv = + (struct esp32s2_oneshot_lowerhalf_s *)lower; + uint64_t current_us; + + DEBUGASSERT(priv != NULL); + DEBUGASSERT(ts != NULL); + + esp32s2_oneshot_current(&priv->oneshot, ¤t_us); + ts->tv_sec = current_us / USEC_PER_SEC; + current_us = current_us - ts->tv_sec * USEC_PER_SEC; + ts->tv_nsec = current_us * NSEC_PER_USEC; + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: oneshot_initialize + * + * Description: + * Initialize the oneshot timer and return a oneshot lower half driver + * instance. + * + * Input Parameters: + * chan Timer counter channel to be used. + * resolution The required resolution of the timer in units of + * microseconds. NOTE that the range is restricted to the + * range of uint16_t (excluding zero). + * + * Returned Value: + * On success, a non-NULL instance of the oneshot lower-half driver is + * returned. NULL is return on any failure. + * + ****************************************************************************/ + +struct oneshot_lowerhalf_s *oneshot_initialize(int chan, + uint16_t resolution) +{ + struct esp32s2_oneshot_lowerhalf_s *priv; + int ret; + + /* Allocate an instance of the lower half driver */ + + priv = (struct esp32s2_oneshot_lowerhalf_s *)kmm_zalloc( + sizeof(struct esp32s2_oneshot_lowerhalf_s)); + + if (priv == NULL) + { + tmrerr("ERROR: Failed to initialize oneshot state structure\n"); + return NULL; + } + + priv->lh.ops = &g_esp32s2_timer_ops; /* Pointer to the LH operations */ + priv->callback = NULL; /* No callback yet */ + priv->arg = NULL; /* No arg yet */ + priv->resolution = resolution; /* Configured resolution */ + + /* Initialize esp32s2_oneshot_s structure */ + + ret = esp32s2_oneshot_initialize(&priv->oneshot, chan, resolution); + if (ret < 0) + { + tmrerr("ERROR: esp32s2_oneshot_initialize failed: %d\n", ret); + kmm_free(priv); + return NULL; + } + + return &priv->lh; +} diff --git a/arch/xtensa/src/esp32s2/esp32s2_rt_timer.c b/arch/xtensa/src/esp32s2/esp32s2_rt_timer.c new file mode 100644 index 00000000000..5c7664c38f8 --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_rt_timer.c @@ -0,0 +1,838 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_rt_timer.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this args for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "xtensa.h" +#include "xtensa_attr.h" + +#include "hardware/esp32s2_soc.h" +#include "hardware/esp32s2_system.h" +#include "hardware/esp32s2_systimer.h" +#include "esp32s2_tim.h" +#include "esp32s2_rt_timer.h" +#include "esp32s2_clockconfig.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_SCHED_HPWORKPRIORITY +# if CONFIG_ESP32S2_RT_TIMER_TASK_PRIORITY >= CONFIG_SCHED_HPWORKPRIORITY +# error "RT timer priority should be smaller than high-prio workqueue" +# endif +#endif + +#define RT_TIMER_TASK_NAME CONFIG_ESP32S2_RT_TIMER_TASK_NAME +#define RT_TIMER_TASK_PRIORITY CONFIG_ESP32S2_RT_TIMER_TASK_PRIORITY +#define RT_TIMER_TASK_STACK_SIZE CONFIG_ESP32S2_RT_TIMER_TASK_STACK_SIZE + +/* Timer running at 80 MHz */ + +#define CYCLES_PER_USEC 80 +#define USEC_TO_CYCLES(u) ((u) * CYCLES_PER_USEC) +#define CYCLES_TO_USEC(c) ((c) / CYCLES_PER_USEC) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct esp32s2_rt_priv_s +{ + int pid; + sem_t toutsem; + struct list_node runlist; + struct list_node toutlist; + struct esp32s2_tim_dev_s *timer; +}; + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct esp32s2_rt_priv_s g_rt_priv = +{ + .pid = -EINVAL, +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: start_rt_timer + * + * Description: + * Start the timer by inserting it into the running list and reset the + * hardware timer alarm value if this timer is at the head of the list. + * Larger timeouts go to the end of the list (tail). + * + * Input Parameters: + * timer - RT timer pointer + * timeout - Timeout value + * repeat - repeat mode (true: enabled, false: disabled) + * + * Returned Value: + * None. + * + ****************************************************************************/ + +static void start_rt_timer(struct rt_timer_s *timer, + uint64_t timeout, + bool repeat) +{ + irqstate_t flags; + struct rt_timer_s *temp_p; + bool inserted = false; + uint64_t counter; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + + flags = enter_critical_section(); + + /* Only idle timer can be started */ + + if (timer->state == RT_TIMER_IDLE) + { + /* Calculate the timer's alarm value */ + + ESP32S2_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); + timer->timeout = timeout; + timer->alarm = timer->timeout + counter; + + if (repeat) + { + timer->flags |= RT_TIMER_REPEAT; + } + else + { + timer->flags &= ~RT_TIMER_REPEAT; + } + + /* Scan the timer list and insert the new timer into previous + * node of timer whose alarm value is larger than new one + */ + + list_for_every_entry(&priv->runlist, temp_p, struct rt_timer_s, list) + { + if (temp_p->alarm > timer->alarm) + { + list_add_before(&temp_p->list, &timer->list); + inserted = true; + break; + } + } + + /* If we didn't find a larger one, insert the new timer at the tail + * of the list. + */ + + if (!inserted) + { + list_add_tail(&priv->runlist, &timer->list); + } + + timer->state = RT_TIMER_READY; + + /* If this timer is at the head of the list */ + + if (timer == container_of(priv->runlist.next, + struct rt_timer_s, list)) + { + /* Reset the hardware timer alarm */ + + ESP32S2_TIM_SETALRVL(priv->timer, USEC_TO_CYCLES(timer->alarm)); + ESP32S2_TIM_SETALRM(priv->timer, true); + } + } + else + { + tmrwarn("WARN: Timer not in idle mode.\n"\ + "Only idle timer can be started!\n"); + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: stop_rt_timer + * + * Description: + * Stop the timer by removing it from the running list and reset the + * hardware timer alarm value if this timer is at the head of list. + * + * Input Parameters: + * timer - RT timer pointer + * + * Returned Value: + * None. + * + ****************************************************************************/ + +static void stop_rt_timer(struct rt_timer_s *timer) +{ + irqstate_t flags; + bool ishead; + struct rt_timer_s *next_timer; + uint64_t alarm; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + + flags = enter_critical_section(); + + /* "start" function can set the timer's repeat flag, and "stop" function + * should remove this flag. + */ + + timer->flags &= ~RT_TIMER_REPEAT; + + /* Only timers in "ready" state can be stopped */ + + if (timer->state == RT_TIMER_READY) + { + /* Check if the timer is at the head of the list */ + + if (timer == container_of(priv->runlist.next, + struct rt_timer_s, list)) + { + ishead = true; + } + else + { + ishead = false; + } + + list_delete(&timer->list); + timer->state = RT_TIMER_IDLE; + + /* If the timer is at the head of the list */ + + if (ishead) + { + if (!list_is_empty(&priv->runlist)) + { + /* Set the value from the next timer as the new hardware timer + * alarm value. + */ + + next_timer = container_of(priv->runlist.next, + struct rt_timer_s, + list); + alarm = next_timer->alarm; + + ESP32S2_TIM_SETALRVL(priv->timer, USEC_TO_CYCLES(alarm)); + ESP32S2_TIM_SETALRM(priv->timer, true); + } + } + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: delete_rt_timer + * + * Description: + * Delete the timer by removing it from the list, then set the timer's + * state to "RT_TIMER_DELETE" and finally insert it into the work list + * to let the rt-timer's thread to delete it and free the resources. + * + * Input Parameters: + * timer - RT timer pointer + * + * Returned Value: + * None. + * + ****************************************************************************/ + +static void delete_rt_timer(struct rt_timer_s *timer) +{ + int ret; + irqstate_t flags; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + + flags = enter_critical_section(); + + if (timer->state == RT_TIMER_READY) + { + stop_rt_timer(timer); + } + else if (timer->state == RT_TIMER_TIMEOUT) + { + list_delete(&timer->list); + } + else if (timer->state == RT_TIMER_DELETE) + { + goto exit; + } + + list_add_after(&priv->toutlist, &timer->list); + timer->state = RT_TIMER_DELETE; + + /* Wake up the thread to process deleted timers */ + + ret = nxsem_post(&priv->toutsem); + if (ret < 0) + { + tmrerr("ERROR: Failed to post sem ret=%d\n", ret); + } + +exit: + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: rt_timer_thread + * + * Description: + * RT timer working thread: Waits for a timeout semaphore, scans + * the timeout list and processes all the timers in the list. + * + * Input Parameters: + * argc - Not used + * argv - Not used + * + * Returned Value: + * 0. + * + ****************************************************************************/ + +static int rt_timer_thread(int argc, char *argv[]) +{ + int ret; + irqstate_t flags; + struct rt_timer_s *timer; + enum rt_timer_state_e raw_state; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + + while (1) + { + /* Waiting for all timers to time out */ + + ret = nxsem_wait(&priv->toutsem); + if (ret) + { + tmrerr("ERROR: Wait priv->toutsem error=%d\n", ret); + assert(0); + } + + flags = enter_critical_section(); + + /* Process all the timers in list */ + + while (!list_is_empty(&priv->toutlist)) + { + /* Get the first timer in the list */ + + timer = container_of(priv->toutlist.next, + struct rt_timer_s, list); + + /* Cache the raw state to decide how to deal with this timer */ + + raw_state = timer->state; + + /* Delete the timer from the list */ + + list_delete(&timer->list); + + /* Set timer's state to idle so it can be restarted by the user. */ + + timer->state = RT_TIMER_IDLE; + + leave_critical_section(flags); + + if (raw_state == RT_TIMER_TIMEOUT) + { + timer->callback(timer->arg); + } + else if (raw_state == RT_TIMER_DELETE) + { + kmm_free(timer); + } + + /* Enter critical section for next scanning list */ + + flags = enter_critical_section(); + + if (raw_state == RT_TIMER_TIMEOUT) + { + /* Check if the timer is in "repeat" mode */ + + if (timer->flags & RT_TIMER_REPEAT) + { + start_rt_timer(timer, timer->timeout, true); + } + } + } + + leave_critical_section(flags); + } + + return 0; +} + +/**************************************************************************** + * Name: rt_timer_isr + * + * Description: + * Hardware timer interrupt service routine. + * + * Input Parameters: + * irq - Not used + * context - Not used + * arg - Not used + * + * Returned Value: + * 0. + * + ****************************************************************************/ + +static int rt_timer_isr(int irq, void *context, void *arg) +{ + int ret; + irqstate_t flags; + struct rt_timer_s *timer; + uint64_t alarm; + uint64_t counter; + bool wake = false; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + + /* Clear interrupt register status */ + + ESP32S2_TIM_ACKINT(priv->timer); + + flags = enter_critical_section(); + + /* Check if there is a timer running */ + + if (!list_is_empty(&priv->runlist)) + { + /** + * When stop/delete timer, in the same time the hardware timer + * interrupt triggers, function "stop/delete" remove the timer + * from running list, so the 1st timer is not which triggers. + */ + + timer = container_of(priv->runlist.next, struct rt_timer_s, list); + ESP32S2_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); + if (timer->alarm <= counter) + { + /* Remove the first timer from the running list and add it to + * the timeout list. + * + * Set the timer's state to be RT_TIMER_TIMEOUT to avoid + * other operations. + */ + + list_delete(&timer->list); + timer->state = RT_TIMER_TIMEOUT; + list_add_after(&priv->toutlist, &timer->list); + wake = true; + + /* Check if there is a timer running */ + + if (!list_is_empty(&priv->runlist)) + { + /* Reset hardware timer alarm with next timer's alarm value */ + + timer = container_of(priv->runlist.next, + struct rt_timer_s, list); + alarm = timer->alarm; + ESP32S2_TIM_SETALRVL(priv->timer, USEC_TO_CYCLES(alarm)); + } + } + + /* If there is a timer in the list, the alarm should be enabled */ + + ESP32S2_TIM_SETALRM(priv->timer, true); + } + + if (wake) + { + /* Wake up the thread to process timed-out timers */ + + ret = nxsem_post(&priv->toutsem); + if (ret < 0) + { + tmrerr("ERROR: Failed to post sem ret=%d\n", ret); + } + } + + leave_critical_section(flags); + + return 0; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: rt_timer_create + * + * Description: + * Create a RT timer from the provided arguments. + * + * Input Parameters: + * args - Input RT timer creation arguments + * timer_handle - Output RT timer handle pointer + * + * Returned Value: + * 0 is returned on success. Otherwise, a negated errno value is returned. + * + ****************************************************************************/ + +int rt_timer_create(const struct rt_timer_args_s *args, + struct rt_timer_s **timer_handle) +{ + struct rt_timer_s *timer; + + timer = (struct rt_timer_s *)kmm_malloc(sizeof(*timer)); + if (!timer) + { + tmrerr("ERROR: Failed to allocate %d bytes\n", sizeof(*timer)); + return -ENOMEM; + } + + timer->callback = args->callback; + timer->arg = args->arg; + timer->flags = RT_TIMER_NOFLAGS; + timer->state = RT_TIMER_IDLE; + list_initialize(&timer->list); + + *timer_handle = timer; + + return 0; +} + +/**************************************************************************** + * Name: rt_timer_start + * + * Description: + * Start the RT timer. + * + * Input Parameters: + * timer - RT timer pointer + * timeout - Timeout value + * repeat - repeat mode (true: enabled, false: disabled) + * + * Returned Value: + * None + * + ****************************************************************************/ + +void rt_timer_start(struct rt_timer_s *timer, + uint64_t timeout, + bool repeat) +{ + stop_rt_timer(timer); + + start_rt_timer(timer, timeout, repeat); +} + +/**************************************************************************** + * Name: rt_timer_stop + * + * Description: + * Stop the RT timer. + * + * Input Parameters: + * timer - RT timer pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +void rt_timer_stop(struct rt_timer_s *timer) +{ + stop_rt_timer(timer); +} + +/**************************************************************************** + * Name: rt_timer_delete + * + * Description: + * Stop and delete the RT timer. + * + * Input Parameters: + * timer - RT timer pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +void rt_timer_delete(struct rt_timer_s *timer) +{ + delete_rt_timer(timer); +} + +/**************************************************************************** + * Name: rt_timer_time_us + * + * Description: + * Get current counter value of the RT timer in microseconds. + * + * Input Parameters: + * None + * + * Returned Value: + * Time of the RT timer in microseconds. + * + ****************************************************************************/ + +uint64_t IRAM_ATTR rt_timer_time_us(void) +{ + uint64_t counter; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + + ESP32S2_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); + + return counter; +} + +/**************************************************************************** + * Name: rt_timer_get_alarm + * + * Description: + * Get the remaining time to the next timeout. + * + * Input Parameters: + * None + * + * Returned Value: + * Timestamp of the nearest timer event in microseconds. + * + ****************************************************************************/ + +uint64_t IRAM_ATTR rt_timer_get_alarm(void) +{ + irqstate_t flags; + uint64_t counter; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + uint64_t alarm_value = 0; + + flags = enter_critical_section(); + + ESP32S2_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); + ESP32S2_TIM_GETALRVL(priv->timer, &alarm_value); + alarm_value = CYCLES_TO_USEC(alarm_value); + + if (alarm_value <= counter) + { + alarm_value = 0; + } + else + { + alarm_value -= counter; + } + + leave_critical_section(flags); + + return alarm_value; +} + +/**************************************************************************** + * Name: rt_timer_calibration + * + * Description: + * Adjust current RT timer by a certain value. + * + * Input Parameters: + * time_us - adjustment to apply to the RT timer in microseconds. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void IRAM_ATTR rt_timer_calibration(uint64_t time_us) +{ + uint64_t counter; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + irqstate_t flags; + + flags = enter_critical_section(); + ESP32S2_TIM_GETCTR(priv->timer, &counter); + counter = CYCLES_TO_USEC(counter); + counter += time_us; + ESP32S2_TIM_SETCTR(priv->timer, USEC_TO_CYCLES(counter)); + ESP32S2_TIM_RLD_NOW(priv->timer); + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: esp32s2_rt_timer_init + * + * Description: + * Initialize ESP32-S2 RT timer. + * + * Input Parameters: + * None + * + * Returned Value: + * 0 is returned on success. Otherwise, a negated errno value is returned. + * + ****************************************************************************/ + +int esp32s2_rt_timer_init(void) +{ + int pid; + irqstate_t flags; + struct esp32s2_tim_dev_s *tim; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + uint32_t xtal_clk; + uint16_t pre; + uint16_t ticks; + + tim = esp32s2_tim_init(SYSTIMER_COMP0); + + if (tim == NULL) + { + tmrerr("ERROR: Failed to initialize ESP32-S2 Systimer 0\n"); + return -EINVAL; + } + + nxsem_init(&priv->toutsem, 0, 0); + + pid = kthread_create(RT_TIMER_TASK_NAME, + RT_TIMER_TASK_PRIORITY, + RT_TIMER_TASK_STACK_SIZE, + rt_timer_thread, + NULL); + if (pid < 0) + { + tmrerr("ERROR: Failed to create RT timer task error=%d\n", pid); + esp32s2_tim_deinit(tim); + return pid; + } + + list_initialize(&priv->runlist); + list_initialize(&priv->toutlist); + + priv->pid = pid; + priv->timer = tim; + + flags = enter_critical_section(); + + /* ESP32-S2 hardware timer configuration, acc. TRM V1.0 + * Systimer is clocked by APB_CLK. + * APB_CLK is determined by the source clock of CPU_CLK: + * CPU_CLK source | APB_CLK + * PLL_CLK | 80 MHz + * XTAL_CLK | CPU_CLK = XTAL_CLK / (SYSTEM_PRE_DIV_CNT + 1) + * The systimer period is determined by the step value. + * The step value is 1/(APB_CLK*ticks). + * On ESP32-S2, systimer has a mechanism that automatically + * detects which is the APB_CLK source and uses the step value + * configured for that specific source clock. + */ + + /* PLL step = 1/(80 MHz * t) s, t = 1 -> 80 cycles per us */ + + ESP32S2_TIM_SETSTEP(priv->timer, ESP32S2_TIM_PLL_CLK, 1); + + /* XTAL step = 1/((XTAL_CLK/(DIV +1)) * t) s + * To achieve the same 80 cycles per us, + * t = [(80 MHz * (DIV+1)) / XTAL_CLK] + * Example: XTAL_CLK = 40 MHz and DIV = 3, then t should be + * = ((80 MHz * 4) / 40 MHz) = 8. + */ + + xtal_clk = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_CLK_XTAL_FREQ); + pre = REG_GET_FIELD(SYSTEM_SYSCLK_CONF_REG, SYSTEM_PRE_DIV_CNT); + ticks = ((80 * (pre + 1)) / (xtal_clk)); + ESP32S2_TIM_SETSTEP(priv->timer, ESP32S2_TIM_XTAL_CLK, ticks); + + /* 1) Set Time-Delay work mode. + * 2) Clear the counter. + * 3) Set the ISR. + * 4) Enable timeout interrupt. + * 5) Start the counter. + * NOTE: No interrupt will be triggered until ESP32S2_TIM_SETALRM is set. + */ + + ESP32S2_TIM_SETWORKMODE(priv->timer, ESP32S2_TIM_DELAY_ALRM); + ESP32S2_TIM_CLEAR(priv->timer); + ESP32S2_TIM_SETISR(priv->timer, rt_timer_isr, NULL); + ESP32S2_TIM_ENABLEINT(priv->timer); + + leave_critical_section(flags); + + return 0; +} + +/**************************************************************************** + * Name: esp32s2_rt_timer_deinit + * + * Description: + * Deinitialize ESP32-S2 RT timer. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void esp32s2_rt_timer_deinit(void) +{ + irqstate_t flags; + struct esp32s2_rt_priv_s *priv = &g_rt_priv; + + flags = enter_critical_section(); + + ESP32S2_TIM_DISABLEINT(priv->timer); + ESP32S2_TIM_SETISR(priv->timer, NULL, NULL); + esp32s2_tim_deinit(priv->timer); + priv->timer = NULL; + + leave_critical_section(flags); + + if (priv->pid != -EINVAL) + { + kthread_delete(priv->pid); + priv->pid = -EINVAL; + } + + nxsem_destroy(&priv->toutsem); +} diff --git a/arch/xtensa/src/esp32s2/esp32s2_rt_timer.h b/arch/xtensa/src/esp32s2/esp32s2_rt_timer.h new file mode 100644 index 00000000000..74c6286bcc3 --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_rt_timer.h @@ -0,0 +1,250 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_rt_timer.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_RT_TIMER_H +#define __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_RT_TIMER_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define RT_TIMER_NOFLAGS (0) /* Timer supports no feature */ +#define RT_TIMER_REPEAT (1 << 0) /* Timer supports repeat mode */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/** + * RT timer state + */ + +enum rt_timer_state_e +{ + RT_TIMER_IDLE, /* Timer is not counting */ + RT_TIMER_READY, /* Timer is counting */ + RT_TIMER_TIMEOUT, /* Timer timed out */ + RT_TIMER_DELETE /* Timer is to be delete */ +}; + +/** + * RT timer data structure + */ + +struct rt_timer_s +{ + uint64_t timeout; /* Timeout value */ + uint64_t alarm; /* Timeout period */ + void (*callback)(void *arg); /* Callback function */ + void *arg; /* Private data */ + uint16_t flags; /* Supported features */ + enum rt_timer_state_e state; /* Timer state */ + struct list_node list; /* Working list */ +}; + +/** + * RT timer creation arguments data structure + */ + +struct rt_timer_args_s +{ + void (*callback)(void *arg); /* Callback function */ + void *arg; /* Private data */ +}; + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: rt_timer_create + * + * Description: + * Create a RT timer from the provided arguments. + * + * Input Parameters: + * args - Input RT timer creation arguments + * timer_handle - Output RT timer handle pointer + * + * Returned Value: + * 0 is returned on success. Otherwise, a negated errno value is returned. + * + ****************************************************************************/ + +int rt_timer_create(const struct rt_timer_args_s *args, + struct rt_timer_s **timer_handle); + +/**************************************************************************** + * Name: rt_timer_start + * + * Description: + * Start the RT timer. + * + * Input Parameters: + * timer - RT timer pointer + * timeout - Timeout value + * repeat - repeat mode (true: enabled, false: disabled) + * + * Returned Value: + * None + * + ****************************************************************************/ + +void rt_timer_start(struct rt_timer_s *timer, + uint64_t timeout, + bool repeat); + +/**************************************************************************** + * Name: rt_timer_stop + * + * Description: + * Stop the RT timer. + * + * Input Parameters: + * timer - RT timer pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +void rt_timer_stop(struct rt_timer_s *timer); + +/**************************************************************************** + * Name: rt_timer_delete + * + * Description: + * Stop and delete the RT timer. + * + * Input Parameters: + * timer - RT timer pointer + * + * Returned Value: + * None + * + ****************************************************************************/ + +void rt_timer_delete(struct rt_timer_s *timer); + +/**************************************************************************** + * Name: rt_timer_time_us + * + * Description: + * Get time of the RT timer in microseconds. + * + * Input Parameters: + * None + * + * Returned Value: + * Time of the RT timer in microseconds. + * + ****************************************************************************/ + +uint64_t rt_timer_time_us(void); + +/**************************************************************************** + * Name: rt_timer_get_alarm + * + * Description: + * Get the timestamp when the next timeout is expected to occur. + * + * Input Parameters: + * None + * + * Returned Value: + * Timestamp of the nearest timer event in microseconds. + * + ****************************************************************************/ + +uint64_t rt_timer_get_alarm(void); + +/**************************************************************************** + * Name: rt_timer_calibration + * + * Description: + * Adjust current RT timer by a certain value. + * + * Input Parameters: + * time_us - adjustment to apply to the RT timer in microseconds. + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void rt_timer_calibration(uint64_t time_us); + +/**************************************************************************** + * Name: esp32s2_rt_timer_init + * + * Description: + * Initialize ESP32-S2 RT timer. + * + * Input Parameters: + * None + * + * Returned Value: + * 0 is returned on success. Otherwise, a negated errno value is returned. + * + ****************************************************************************/ + +int esp32s2_rt_timer_init(void); + +/**************************************************************************** + * Name: esp32s2_rt_timer_deinit + * + * Description: + * Deinitialize ESP32-S2 RT timer. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +void esp32s2_rt_timer_deinit(void); + +#ifdef __cplusplus +} +#endif +#undef EXTERN + +#endif /* __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_RT_TIMER_H */ diff --git a/arch/xtensa/src/esp32s2/esp32s2_serial.c b/arch/xtensa/src/esp32s2/esp32s2_serial.c index 76aa0252505..ca733f9d12f 100644 --- a/arch/xtensa/src/esp32s2/esp32s2_serial.c +++ b/arch/xtensa/src/esp32s2/esp32s2_serial.c @@ -229,7 +229,7 @@ static uart_dev_t g_uart1_dev = * ****************************************************************************/ -static int uart_handler(int irq, FAR void *context, FAR void *arg) +static int uart_handler(int irq, void *context, void *arg) { struct uart_dev_s *dev = (struct uart_dev_s *)arg; struct esp32s2_uart_s *priv = dev->priv; diff --git a/arch/xtensa/src/esp32s2/esp32s2_start.c b/arch/xtensa/src/esp32s2/esp32s2_start.c index 76f73d8cd81..a6a883a65ab 100644 --- a/arch/xtensa/src/esp32s2/esp32s2_start.c +++ b/arch/xtensa/src/esp32s2/esp32s2_start.c @@ -38,6 +38,7 @@ #include "esp32s2_region.h" #include "esp32s2_start.h" #include "esp32s2_lowputc.h" +#include "esp32s2_wdt.h" /**************************************************************************** * Pre-processor Definitions @@ -56,7 +57,7 @@ /* Address of the CPU0 IDLE thread */ uint32_t g_idlestack[IDLETHREAD_STACKWORDS] - __attribute__((aligned(16), section(".noinit"))); + aligned_data(16) locate_data(".noinit"); /**************************************************************************** * Public Functions @@ -78,11 +79,9 @@ void IRAM_ATTR __start(void) uint32_t regval; uint32_t sp; - /* Kill the watchdog timer */ + /* Disable any wdt enabled by bootloader */ - regval = getreg32(RTC_CNTL_WDTCONFIG0_REG); - regval &= ~RTC_CNTL_WDT_FLASHBOOT_MOD_EN; - putreg32(regval, RTC_CNTL_WDTCONFIG0_REG); + esp32s2_wdt_early_deinit(); regval = getreg32(DR_REG_BB_BASE + 0x48); /* DR_REG_BB_BASE+48 */ regval &= ~(1 << 14); diff --git a/arch/xtensa/src/esp32s2/esp32s2_tim.c b/arch/xtensa/src/esp32s2/esp32s2_tim.c new file mode 100644 index 00000000000..2b09b55ee92 --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_tim.c @@ -0,0 +1,1300 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_tim.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include + +#include "xtensa.h" + +#include "hardware/esp32s2_tim.h" +#include "hardware/esp32s2_system.h" +#include "hardware/esp32s2_systimer.h" + +#include "esp32s2_tim.h" +#include "esp32s2_cpuint.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define GROUP0 0 +#define GROUP1 1 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct esp32s2_tim_priv_s +{ + struct esp32s2_tim_ops_s *ops; + uint8_t gid; /* Group instance */ + uint8_t tid; /* Timer instance */ + uint8_t int_pri; + uint8_t periph; /* Peripheral ID */ + uint8_t irq; /* Interrupt ID */ + int cpuint; /* CPU interrupt assigned to this timer */ + bool inuse; /* Flag indicating if the timer is in use */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* TIM operations ***********************************************************/ + +static void esp32s2_tim_start(struct esp32s2_tim_dev_s *dev); +static void esp32s2_tim_stop(struct esp32s2_tim_dev_s *dev); +static void esp32s2_tim_clear(struct esp32s2_tim_dev_s *dev); +static void esp32s2_tim_setmode(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_mode_e mode); +static void esp32s2_tim_setclksrc(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_clksrc_e src); +static void esp32s2_tim_setpre(struct esp32s2_tim_dev_s *dev, + uint16_t pre); +static void esp32s2_tim_setstep(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_clksrc_e src, + uint16_t ticks); +static void esp32s2_tim_getcounter(struct esp32s2_tim_dev_s *dev, + uint64_t *value); +static void esp32s2_tim_setcounter(struct esp32s2_tim_dev_s *dev, + uint64_t value); +static void esp32s2_tim_reload_now(struct esp32s2_tim_dev_s *dev); +static void esp32s2_tim_getalarmvalue(struct esp32s2_tim_dev_s *dev, + uint64_t *value); +static void esp32s2_tim_getperiod(struct esp32s2_tim_dev_s *dev, + uint32_t *value); +static void esp32s2_tim_setalarmvalue(struct esp32s2_tim_dev_s *dev, + uint64_t value); +static void esp32s2_tim_setperiod(struct esp32s2_tim_dev_s *dev, + uint32_t value); +static void esp32s2_tim_setworkmode(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_work_mode_e mode); +static void esp32s2_tim_setalarm(struct esp32s2_tim_dev_s *dev, + bool enable); +static void esp32s2_tim_setautoreload(struct esp32s2_tim_dev_s *dev, + bool enable); +static int esp32s2_tim_setisr(struct esp32s2_tim_dev_s *dev, + xcpt_t handler, void * arg); +static void esp32s2_tim_enableint(struct esp32s2_tim_dev_s *dev); +static void esp32s2_tim_disableint(struct esp32s2_tim_dev_s *dev); +static void esp32s2_tim_ackint(struct esp32s2_tim_dev_s *dev); +static int esp32s2_tim_checkint(struct esp32s2_tim_dev_s *dev); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* ESP32-S2 TIM ops */ + +struct esp32s2_tim_ops_s esp32s2_tim_ops = +{ + .start = esp32s2_tim_start, + .stop = esp32s2_tim_stop, + .clear = esp32s2_tim_clear, + .setmode = esp32s2_tim_setmode, + .getcounter = esp32s2_tim_getcounter, + .setclksrc = esp32s2_tim_setclksrc, + .setpre = esp32s2_tim_setpre, + .setstep = NULL, + .setcounter = esp32s2_tim_setcounter, + .reloadnow = esp32s2_tim_reload_now, + .getalarmvalue = esp32s2_tim_getalarmvalue, + .getperiod = NULL, + .setalarmvalue = esp32s2_tim_setalarmvalue, + .setperiod = NULL, + .setworkmode = NULL, + .setalarm = esp32s2_tim_setalarm, + .setautoreload = esp32s2_tim_setautoreload, + .setisr = esp32s2_tim_setisr, + .enableint = esp32s2_tim_enableint, + .disableint = esp32s2_tim_disableint, + .ackint = esp32s2_tim_ackint, + .checkint = esp32s2_tim_checkint +}; + +/* ESP32S2 SYSTIMER ops */ + +struct esp32s2_tim_ops_s esp32s2_systim_ops = +{ + .start = NULL, /* Systimer doesn't support releasing counter */ + .stop = NULL, /* Systimer doesn't support halting counter */ + .clear = esp32s2_tim_clear, + .setmode = NULL, + .getcounter = esp32s2_tim_getcounter, + .setclksrc = NULL, + .setpre = NULL, + .setstep = esp32s2_tim_setstep, + .setcounter = esp32s2_tim_setcounter, + .reloadnow = esp32s2_tim_reload_now, + .getalarmvalue = esp32s2_tim_getalarmvalue, + .getperiod = esp32s2_tim_getperiod, + .setalarmvalue = esp32s2_tim_setalarmvalue, + .setperiod = esp32s2_tim_setperiod, + .setworkmode = esp32s2_tim_setworkmode, + .setalarm = esp32s2_tim_setalarm, + .setautoreload = NULL, + .setisr = esp32s2_tim_setisr, + .enableint = esp32s2_tim_enableint, + .disableint = esp32s2_tim_disableint, + .ackint = esp32s2_tim_ackint, + .checkint = esp32s2_tim_checkint +}; + +#ifdef CONFIG_ESP32S2_TIMER0 + +/* TIMER0 */ + +struct esp32s2_tim_priv_s g_esp32s2_tim0_priv = +{ + .ops = &esp32s2_tim_ops, + .gid = GROUP0, + .tid = TIMER0, + .int_pri = ESP32S2_INT_PRIO_DEF, + .periph = ESP32S2_PERI_TG_T0_LEVEL, /* Peripheral ID */ + .irq = ESP32S2_IRQ_TG_T0_LEVEL, /* Interrupt ID */ + .cpuint = -ENOMEM, /* CPU interrupt assigned to this timer */ + .inuse = false, +}; +#endif + +#ifdef CONFIG_ESP32S2_TIMER1 +/* TIMER1 */ + +struct esp32s2_tim_priv_s g_esp32s2_tim1_priv = +{ + .ops = &esp32s2_tim_ops, + .gid = GROUP0, + .tid = TIMER1, + .int_pri = ESP32S2_INT_PRIO_DEF, + .periph = ESP32S2_PERI_TG_T1_LEVEL, /* Peripheral ID */ + .irq = ESP32S2_IRQ_TG_T1_LEVEL, /* Interrupt ID */ + .cpuint = -ENOMEM, /* CPU interrupt assigned to this timer */ + .inuse = false, +}; +#endif + +#ifdef CONFIG_ESP32S2_TIMER2 +/* TIMER2 */ + +struct esp32s2_tim_priv_s g_esp32s2_tim2_priv = +{ + .ops = &esp32s2_tim_ops, + .gid = GROUP1, + .tid = TIMER0, + .int_pri = ESP32S2_INT_PRIO_DEF, + .periph = ESP32S2_PERI_TG1_T0_LEVEL, /* Peripheral ID */ + .irq = ESP32S2_IRQ_TG1_T0_LEVEL, /* Interrupt ID */ + .cpuint = -ENOMEM, /* CPU interrupt assigned to this timer */ + .inuse = false, +}; +#endif + +#ifdef CONFIG_ESP32S2_TIMER3 +/* TIMER3 */ + +struct esp32s2_tim_priv_s g_esp32s2_tim3_priv = +{ + .ops = &esp32s2_tim_ops, + .gid = GROUP1, + .tid = TIMER1, + .int_pri = ESP32S2_INT_PRIO_DEF, + .periph = ESP32S2_PERI_TG1_T1_LEVEL, /* Peripheral ID */ + .irq = ESP32S2_IRQ_TG1_T1_LEVEL, /* Interrupt ID */ + .cpuint = -ENOMEM, /* CPU interrupt assigned to this timer */ + .inuse = false, +}; +#endif + +#ifdef CONFIG_ESP32S2_RT_TIMER +/* SYSTIMER */ + +struct esp32s2_tim_priv_s g_esp32s2_tim4_priv = +{ + .ops = &esp32s2_systim_ops, + .gid = -ENODEV, /* There's no group in systimer */ + .tid = SYSTIMER_COMP0, /* Systimer contains 1 counter and 3 comps */ + .int_pri = ESP32S2_INT_PRIO_DEF, + .periph = ESP32S2_PERI_SYSTIMER_TARGET0, /* Peripheral ID */ + .irq = ESP32S2_IRQ_SYSTIMER_TARGET0, /* Interrupt ID */ + .cpuint = -ENOMEM, /* CPU interrupt assigned to this timer */ + .inuse = false, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_tim_start + * + * Description: + * Release the counter. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * + ****************************************************************************/ + +static void esp32s2_tim_start(struct esp32s2_tim_dev_s *dev) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + if (priv->tid == TIMER0) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), 0, TIMG_T0_EN_M); + } + else + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), 0, TIMG_T1_EN_M); + } +} + +/**************************************************************************** + * Name: esp32s2_tim_stop + * + * Description: + * Halt the counter. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * + ****************************************************************************/ + +static void esp32s2_tim_stop(struct esp32s2_tim_dev_s *dev) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + if (priv->tid == TIMER0) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), TIMG_T0_EN_M, 0); + } + else + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), TIMG_T1_EN_M, 0); + } +} + +/**************************************************************************** + * Name: esp32s2_tim_clear + * + * Description: + * Set the counter to zero instantly. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * + ****************************************************************************/ + +static void esp32s2_tim_clear(struct esp32s2_tim_dev_s *dev) +{ + uint64_t clear_value = 0; + + DEBUGASSERT(dev); + + esp32s2_tim_setcounter(dev, clear_value); + esp32s2_tim_reload_now(dev); +} + +/**************************************************************************** + * Name: esp32s2_tim_setmode + * + * Description: + * Set counter mode. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * mode - Variable indicating the counting direction (up/down). + * + ****************************************************************************/ + +static void esp32s2_tim_setmode(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_mode_e mode) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + if (mode == ESP32S2_TIM_MODE_DOWN) + { + if (priv->tid == TIMER0) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), TIMG_T0_INCREASE_M, 0); + } + else + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), TIMG_T1_INCREASE_M, 0); + } + } + else if (mode == ESP32S2_TIM_MODE_UP) + { + if (priv->tid == TIMER0) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), 0, TIMG_T0_INCREASE_M); + } + else + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), 0, TIMG_T1_INCREASE_M); + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setclksrc + * + * Description: + * Set CLK source. + * NOTE: It's not necessary to configure each timer's register for clock, + * because it doesn't matter which timer is configured, the clock + * configuration will apply to the timer group. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * src - The source, it may be APB_CLK or XTAL_CLK. + * + ****************************************************************************/ + +static void esp32s2_tim_setclksrc(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_clksrc_e src) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + if (src == ESP32S2_TIM_APB_CLK) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), TIMG_T0_USE_XTAL_M, 0); + } + else if(src == ESP32S2_TIM_XTAL_CLK) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), 0, TIMG_T0_USE_XTAL_M); + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setpre + * + * Description: + * Set the prescaler. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * pre - This is the division factor. This variable accepts + * values from 0 to 65535. If pre = 0, the division factor + * is 65536, if pre = 1 or 2, the division factor is 2. + * + ****************************************************************************/ + +static void esp32s2_tim_setpre(struct esp32s2_tim_dev_s *dev, + uint16_t pre) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + uint32_t mask = (uint32_t)pre << TIMG_T0_DIVIDER_S; + + DEBUGASSERT(dev); + + if (priv->tid == TIMER0) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), TIMG_T0_DIVIDER_M, mask); + } + else + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), TIMG_T1_DIVIDER_M, mask); + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setstep + * + * Description: + * Set the timer increment step, i.e, defines the time interval in ticks + * used by the counter. + * NOTE: dev pointer is not used because this feature is not available + * for Generic Timers and it doesn't rely in any systimer comparator. + * + * Parameters: + * src - Define the clock source for the ticks. + * ticks - Number of ticks to define 1 increment step. + * + ****************************************************************************/ + +static void esp32s2_tim_setstep(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_clksrc_e src, + uint16_t ticks) +{ + if (src == ESP32S2_TIM_PLL_CLK) + { + REG_SET_FIELD(SYSTIMER_STEP_REG, SYSTIMER_TIMER_PLL_STEP, + ticks & SYSTIMER_TIMER_PLL_STEP_V); + } + else if(src == ESP32S2_TIM_XTAL_CLK) + { + REG_SET_FIELD(SYSTIMER_STEP_REG, SYSTIMER_TIMER_XTAL_STEP, + ticks & SYSTIMER_TIMER_XTAL_STEP_V); + } +} + +/**************************************************************************** + * Name: esp32s2_tim_getcounter + * + * Description: + * Get the current counter value. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * value - A pointer to a variable to store the current read + * value from counter. + * + ****************************************************************************/ + +static void esp32s2_tim_getcounter(struct esp32s2_tim_dev_s *dev, + uint64_t *value) +{ + uint32_t value_32; + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + *value = 0; + if (priv->tid == SYSTIMER_COMP0) + { + /* Latch counter */ + + modifyreg32(SYSTIMER_UPDATE_REG, 0, SYSTIMER_TIMER_UPDATE); + + /* Wait until result is ready */ + + while (!REG_GET_FIELD(SYSTIMER_UPDATE_REG, + SYSTIMER_TIMER_VALUE_VALID)); + + /* Read value */ + + value_32 = getreg32(SYSTIMER_VALUE_HI_REG); /* High 32 bits */ + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(SYSTIMER_VALUE_LO_REG); /* Low 32 bits */ + *value |= (uint64_t)value_32; + } + else + { + if (priv->tid == TIMER0) + { + /* Dummy value (0 or 1) to latch the counter value to read it */ + + putreg32(BIT(0), TIMG_T0UPDATE_REG(priv->gid)); + + /* Read value */ + + value_32 = getreg32(TIMG_T0HI_REG(priv->gid)); /* High 32 bits */ + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(TIMG_T0LO_REG(priv->gid)); /* Low 32 bits */ + *value |= (uint64_t)value_32; + } + else + { + /* Dummy value (0 or 1) to latch the counter value to read it */ + + putreg32(BIT(0), TIMG_T1UPDATE_REG(priv->gid)); + + /* Read value */ + + value_32 = getreg32(TIMG_T1HI_REG(priv->gid)); /* High 32 bits */ + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(TIMG_T1LO_REG(priv->gid)); /* Low 32 bits */ + *value |= (uint64_t)value_32; + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setcounter + * + * Description: + * Set the value to be loaded to the counter. + * If you want the counter to be loaded at an alarm, enable the alarm and + * the auto-reload before. + * If you want the counter to be loaded instantly, call + * esp32s2_tim_reload_now() after this function. + * NOTE: Systimer has 1 counter for 3 comparators. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * value - The value to be loaded the counter. + * + ****************************************************************************/ + +static void esp32s2_tim_setcounter(struct esp32s2_tim_dev_s *dev, + uint64_t value) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + uint64_t low_64 = value & UINT32_MAX; + uint64_t high_64 = (value >> SHIFT_32); + + DEBUGASSERT(dev); + + /* Set the counter value */ + + if (priv->tid == SYSTIMER_COMP0) + { + putreg32((uint32_t)low_64, SYSTIMER_LOAD_LO_REG); + putreg32((uint32_t)high_64, SYSTIMER_LOAD_HI_REG); + } + else + { + if (priv->tid == TIMER0) + { + putreg32((uint32_t)low_64, TIMG_T0LOADLO_REG(priv->gid)); + putreg32((uint32_t)high_64, TIMG_T0LOADHI_REG(priv->gid)); + } + else + { + putreg32((uint32_t)low_64, TIMG_T1LOADLO_REG(priv->gid)); + putreg32((uint32_t)high_64, TIMG_T1LOADHI_REG(priv->gid)); + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_reload_now + * + * Description: + * Reload the counter instantly. It may be called after + * esp32s2_tim_setcounter(). + * + * Parameters: + * dev - Pointer to the timer driver struct. + * + ****************************************************************************/ + +static void esp32s2_tim_reload_now(struct esp32s2_tim_dev_s *dev) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + /* Dummy value to trigger reloading */ + + if (priv->tid == SYSTIMER_COMP0) + { + putreg32(BIT(31), SYSTIMER_LOAD_REG); + } + else + { + if (priv->tid == TIMER0) + { + putreg32(BIT(0), TIMG_T0LOAD_REG(priv->gid)); + } + else + { + putreg32(BIT(0), TIMG_T1LOAD_REG(priv->gid)); + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_getalarmvalue + * + * Description: + * Get the alarm value. + * NOTE: For systimer, the returned alarm value is the Time-Delay Alarm. + * See TRM for more details. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * value - Pointer to retrieve the current configured alarm value. + * + ****************************************************************************/ + +static void esp32s2_tim_getalarmvalue(struct esp32s2_tim_dev_s *dev, + uint64_t *value) +{ + uint32_t value_32; + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + *value = 0; + + /* Read value */ + + if (priv->tid == SYSTIMER_COMP0) + { + value_32 = getreg32(SYSTIMER_TARGET0_HI_REG); /* High 32 bits */ + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(SYSTIMER_TARGET0_LO_REG); /* Low 32 bits */ + *value |= (uint64_t)value_32; + } + else + { + if (priv->tid == TIMER0) + { + value_32 = getreg32(TIMG_T0ALARMHI_REG(priv->gid)); /* High 32 bits */ + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(TIMG_T0ALARMLO_REG(priv->gid)); /* Low 32 bits */ + *value |= (uint64_t)value_32; + } + else + { + value_32 = getreg32(TIMG_T1ALARMHI_REG(priv->gid)); /* High 32 bits */ + *value |= (uint64_t)value_32; + *value <<= SHIFT_32; + value_32 = getreg32(TIMG_T1ALARMLO_REG(priv->gid)); /* Low 32 bits */ + *value |= (uint64_t)value_32; + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_getperiod + * + * Description: + * This function is only available for Systimer. And it's intended to get + * the alarm when it's working on periodic mode. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * value - Pointer to retrieve the current configured alarm value. + * + ****************************************************************************/ + +static void esp32s2_tim_getperiod(struct esp32s2_tim_dev_s *dev, + uint32_t *value) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + *value = 0; + + /* Read value */ + + if (priv->tid == SYSTIMER_COMP0) + { + *value = REG_GET_FIELD(SYSTIMER_TARGET0_CONF_REG, + SYSTIMER_TARGET0_PERIOD); + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setalarmvalue + * + * Description: + * Set the value that will trigger an alarm when the + * counter value matches this value. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * value - The alarm value. + * + ****************************************************************************/ + +static void esp32s2_tim_setalarmvalue(struct esp32s2_tim_dev_s *dev, + uint64_t value) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + uint64_t low_64 = value & UINT32_MAX; + uint64_t high_64 = (value >> SHIFT_32); + + DEBUGASSERT(dev); + + /* Set an alarm value */ + + if (priv->tid == SYSTIMER_COMP0) + { + putreg32((uint32_t)low_64, SYSTIMER_TARGET0_LO_REG); + putreg32((uint32_t)high_64, SYSTIMER_TARGET0_HI_REG); + } + else + { + if (priv->tid == TIMER0) + { + putreg32((uint32_t)low_64, TIMG_T0ALARMLO_REG(priv->gid)); + putreg32((uint32_t)high_64, TIMG_T0ALARMHI_REG(priv->gid)); + } + else + { + putreg32((uint32_t)low_64, TIMG_T1ALARMLO_REG(priv->gid)); + putreg32((uint32_t)high_64, TIMG_T1ALARMHI_REG(priv->gid)); + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setperiod + * + * Description: + * This function is only available for Systimer. And it's intended to set + * the alarm when it's working on periodic mode. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * value - Period value. + * + ****************************************************************************/ + +static void esp32s2_tim_setperiod(struct esp32s2_tim_dev_s *dev, + uint32_t value) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + /* Read value */ + + if (priv->tid == SYSTIMER_COMP0) + { + REG_SET_FIELD(SYSTIMER_TARGET0_CONF_REG, + SYSTIMER_TARGET0_PERIOD, value); + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setworkmode + * + * Description: + * This function is only available for Systimer. And it's intended to set + * the work mode: Time-Delay alarm mode or periodic alarm mode. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * value - Period value. + * + ****************************************************************************/ + +static void esp32s2_tim_setworkmode(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_work_mode_e mode) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + /* Read value */ + + if (priv->tid == SYSTIMER_COMP0) + { + REG_SET_FIELD(SYSTIMER_TARGET0_CONF_REG, + SYSTIMER_TARGET0_PERIOD_MODE, mode); + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setalarm + * + * Description: + * Enable/Disable the alarm. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * enable - A variable to indicate the action. If true, enable + * the alarm, if false, disable it. + * + ****************************************************************************/ + +static void esp32s2_tim_setalarm(struct esp32s2_tim_dev_s *dev, + bool enable) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + if (priv->tid == SYSTIMER_COMP0) + { + if (enable) + { + modifyreg32(SYSTIMER_TARGET0_CONF_REG, 0, + SYSTIMER_TARGET0_WORK_EN); + } + else + { + modifyreg32(SYSTIMER_TARGET0_CONF_REG, + SYSTIMER_TARGET0_WORK_EN, 0); + } + } + else + { + if (priv->tid == TIMER0) + { + if (enable) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), 0, + TIMG_T0_ALARM_EN_M); + } + else + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), + TIMG_T0_ALARM_EN_M, 0); + } + } + else + { + if (enable) + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), + 0, TIMG_T1_ALARM_EN_M); + } + else + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), + TIMG_T1_ALARM_EN_M, 0); + } + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setautoreload + * + * Description: + * Enable or disable the auto reload. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * enable - A variable to indicate the action. If it is true, + * enable the auto reload, if false, + * disable auto reload. + * + ****************************************************************************/ + +static void esp32s2_tim_setautoreload(struct esp32s2_tim_dev_s *dev, + bool enable) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + if (priv->tid == TIMER0) + { + if (enable) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), 0, TIMG_T0_AUTORELOAD_M); + } + else + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), TIMG_T0_AUTORELOAD_M, 0); + } + } + else + { + if (enable) + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), 0, TIMG_T1_AUTORELOAD_M); + } + else + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), TIMG_T1_AUTORELOAD_M, 0); + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_setisr + * + * Description: + * Allocate a CPU Interrupt, connect the peripheral source to this + * Interrupt, register the callback and enable the CPU Interruption. + * In case a NULL handler is provided, deallocate the interrupt and + * unregister the previously provided handler. + * + * Parameters: + * dev - Pointer to the driver state structure. + * handler - Callback to be invoked on timer interrupt. + * arg - Argument to be passed to the handler callback. + * + * Returned Values: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +static int esp32s2_tim_setisr(struct esp32s2_tim_dev_s *dev, + xcpt_t handler, void *arg) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + int ret = OK; + + DEBUGASSERT(dev); + + /* Disable interrupt when callback is removed. */ + + if (handler == NULL) + { + if (priv->cpuint != -ENOMEM) + { + /* Disable cpu interrupt */ + + up_disable_irq(priv->cpuint); + + /* Dissociate the IRQ from the ISR */ + + irq_detach(priv->irq); + + /* Free cpu interrupt that is attached to this peripheral */ + + esp32s2_free_cpuint(priv->periph); + priv->cpuint = -ENOMEM; + } + } + + /* Otherwise set callback and enable interrupt */ + + else + { + if (priv->cpuint != -ENOMEM) + { + /* Disable the provided CPU interrupt to configure it. */ + + up_disable_irq(priv->cpuint); + + /* Free cpu interrupt that is attached to this peripheral + * because we will get another from esp32s2_request_irq() + */ + + esp32s2_free_cpuint(priv->periph); + } + + if (priv->tid == SYSTIMER_COMP0) + { + priv->cpuint = esp32s2_alloc_edgeint(priv->int_pri); + } + else + { + priv->cpuint = esp32s2_alloc_levelint(priv->int_pri); + } + + if (priv->cpuint < 0) + { + tmrerr("ERROR: Failed to get a CPU interrupt"); + ret = priv->cpuint; + goto errout; + } + + /* Attach a peripheral interrupt to a CPU interrupt */ + + esp32s2_attach_peripheral(priv->periph, priv->cpuint); + + /* Associate an IRQ Number (from the timer) to an ISR */ + + ret = irq_attach(priv->irq, handler, arg); + if (ret != OK) + { + tmrerr("ERROR: Failed to associate an IRQ Number to and ISR"); + esp32s2_free_cpuint(priv->periph); + goto errout; + } + + /* Enable the CPU Interrupt that is linked to the timer */ + + up_enable_irq(priv->cpuint); + } + +errout: + return ret; +} + +/**************************************************************************** + * Name: esp32s2_tim_enableint + * + * Description: + * Enable Interrupt at the alarm if it is set. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * + ****************************************************************************/ + +static void esp32s2_tim_enableint(struct esp32s2_tim_dev_s *dev) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + if (priv->tid == SYSTIMER_COMP0) + { + modifyreg32(SYSTIMER_INT_ENA_REG, 0, SYSTIMER_SYSTIMER_INT0_ENA_M); + } + else + { + if (priv->tid == TIMER0) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), 0, + TIMG_T0_LEVEL_INT_EN_M); + modifyreg32(TIMG_INT_ENA_TIMERS_REG(priv->gid), 0, + TIMG_T0_INT_ENA_M); + } + else + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), 0, + TIMG_T1_LEVEL_INT_EN_M); + modifyreg32(TIMG_INT_ENA_TIMERS_REG(priv->gid), 0, + TIMG_T1_INT_ENA_M); + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_disableint + * + * Description: + * Disable a Interrupt at the alarm if it is set. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * + ****************************************************************************/ + +static void esp32s2_tim_disableint(struct esp32s2_tim_dev_s *dev) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + if (priv->tid == SYSTIMER_COMP0) + { + modifyreg32(SYSTIMER_INT_ENA_REG, SYSTIMER_SYSTIMER_INT0_ENA_M, 0); + } + else + { + if (priv->tid == TIMER0) + { + modifyreg32(TIMG_T0CONFIG_REG(priv->gid), + TIMG_T0_LEVEL_INT_EN_M, 0); + modifyreg32(TIMG_INT_ENA_TIMERS_REG(priv->gid), + TIMG_T0_INT_ENA_M, 0); + } + else + { + modifyreg32(TIMG_T1CONFIG_REG(priv->gid), + TIMG_T1_LEVEL_INT_EN_M, 0); + modifyreg32(TIMG_INT_ENA_TIMERS_REG(priv->gid), + TIMG_T1_INT_ENA_M, 0); + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_ackint + * + * Description: + * Acknowledge an interrupt, that means, clear the interrupt. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * + ****************************************************************************/ + +static void esp32s2_tim_ackint(struct esp32s2_tim_dev_s *dev) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + + DEBUGASSERT(dev); + + if (priv->tid == SYSTIMER_COMP0) + { + modifyreg32(SYSTIMER_INT_CLR_REG, 0, SYSTIMER_SYSTIMER_INT0_CLR_M); + } + else + { + if (priv->tid == TIMER0) + { + modifyreg32(TIMG_INT_CLR_TIMERS_REG(priv->gid), 0, + TIMG_T0_INT_CLR_M); + } + else + { + modifyreg32(TIMG_INT_CLR_TIMERS_REG(priv->gid), 0, + TIMG_T1_INT_CLR_M); + } + } +} + +/**************************************************************************** + * Name: esp32s2_tim_checkint + * + * Description: + * Check the interrupt status bit. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * + * Returned Values: + * Return 1 in case of an interrupt is triggered, otherwise 0. + * + ****************************************************************************/ + +static int esp32s2_tim_checkint(struct esp32s2_tim_dev_s *dev) +{ + struct esp32s2_tim_priv_s *priv = (struct esp32s2_tim_priv_s *)dev; + uint32_t reg_value; + int ret; + + DEBUGASSERT(dev); + + if (priv->tid == SYSTIMER_COMP0) + { + reg_value = getreg32(SYSTIMER_INT_RAW_REG); + ret = REG_MASK(reg_value, SYSTIMER_SYSTIMER_INT0_RAW); + } + else + { + if (priv->tid == TIMER0) + { + reg_value = getreg32(TIMG_INT_ST_TIMERS_REG(priv->gid)); + ret = REG_MASK(reg_value, TIMG_T0_INT_ST); + } + else + { + reg_value = getreg32(TIMG_INT_ST_TIMERS_REG(priv->gid)); + ret = REG_MASK(reg_value, TIMG_T1_INT_ST); + } + } + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_tim_init + * + * Description: + * Initialize TIMER device. + * + * Parameters: + * timer - Timer instance to be initialized. + * Valid values: 0 or 1. + * + * Returned Values: + * If the initialization is successful, return a pointer to the timer + * driver struct associated to that timer instance. + * In case it fails, return NULL. + * + ****************************************************************************/ + +struct esp32s2_tim_dev_s *esp32s2_tim_init(int timer) +{ + struct esp32s2_tim_priv_s *tim = NULL; + + /* First, take the data structure associated with the timer instance */ + + switch (timer) + { +#ifdef CONFIG_ESP32S2_TIMER0 + case TIMER0: + { + tim = &g_esp32s2_tim0_priv; + break; + } +#endif + +#ifdef CONFIG_ESP32S2_TIMER1 + case TIMER1: + { + tim = &g_esp32s2_tim1_priv; + break; + } +#endif + +#ifdef CONFIG_ESP32S2_TIMER2 + case TIMER2: + { + tim = &g_esp32s2_tim2_priv; + break; + } +#endif + +#ifdef CONFIG_ESP32S2_TIMER3 + case TIMER3: + { + tim = &g_esp32s2_tim3_priv; + break; + } +#endif + +#ifdef CONFIG_ESP32S2_RT_TIMER + case SYSTIMER_COMP0: + { + tim = &g_esp32s2_tim4_priv; + + /* Enable Systimer peripheral clock and reset it */ + + modifyreg32(SYSTEM_PERIP_CLK_EN0_REG, 0, SYSTEM_SYSTIMER_CLK_EN); + modifyreg32(SYSTEM_PERIP_RST_EN0_REG, 0, SYSTEM_SYSTIMER_RST); + modifyreg32(SYSTEM_PERIP_RST_EN0_REG, SYSTEM_SYSTIMER_RST, 0); + modifyreg32(SYSTIMER_CONF_REG, 0, SYSTIMER_CLK_EN + | SYSTIMER_CLK_FO); + break; + } +#endif + } + + /* Verify if it is in use */ + + if (tim->inuse == false) + { + tim->inuse = true; /* If it was not, now it is */ + } + else + { + tmrerr("ERROR: TIMER %d is already in use\n", timer); + tim = NULL; + } + + return (struct esp32s2_tim_dev_s *)tim; +} + +/**************************************************************************** + * Name: esp32s2_tim_deinit + * + * Description: + * Deinit TIMER device. + * + * Parameters: + * dev - Pointer to the timer driver struct. + * + ****************************************************************************/ + +void esp32s2_tim_deinit(struct esp32s2_tim_dev_s *dev) +{ + struct esp32s2_tim_priv_s *tim = NULL; + + DEBUGASSERT(dev); + + tim = (struct esp32s2_tim_priv_s *)dev; + tim->inuse = false; +} diff --git a/arch/xtensa/src/esp32s2/esp32s2_tim.h b/arch/xtensa/src/esp32s2/esp32s2_tim.h new file mode 100644 index 00000000000..30d373b19b2 --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_tim.h @@ -0,0 +1,161 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_tim.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_TIM_H +#define __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_TIM_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Helpers ******************************************************************/ + +#define ESP32S2_TIM_START(d) ((d)->ops->start(d)) +#define ESP32S2_TIM_STOP(d) ((d)->ops->stop(d)) +#define ESP32S2_TIM_CLEAR(d) ((d)->ops->clear(d)) +#define ESP32S2_TIM_SETMODE(d, m) ((d)->ops->setmode(d, m)) +#define ESP32S2_TIM_SETPRE(d, p) ((d)->ops->setpre(d, p)) +#define ESP32S2_TIM_SETSTEP(d, s, t) ((d)->ops->setstep(d, s, t)) +#define ESP32S2_TIM_GETCTR(d, v) ((d)->ops->getcounter(d, v)) +#define ESP32S2_TIM_CLK_SRC(d, s) ((d)->ops->setclksrc(d, s)) +#define ESP32S2_TIM_SETCTR(d, v) ((d)->ops->setcounter(d, v)) +#define ESP32S2_TIM_RLD_NOW(d) ((d)->ops->reloadnow(d)) +#define ESP32S2_TIM_GETALRVL(d, v) ((d)->ops->getalarmvalue(d, v)) +#define ESP32S2_TIM_GETPERIOD(d, v) ((d)->ops->getperiod(d, v)) +#define ESP32S2_TIM_SETALRVL(d, v) ((d)->ops->setalarmvalue(d, v)) +#define ESP32S2_TIM_SETPERIOD(d, v) ((d)->ops->setperiod(d, v)) +#define ESP32S2_TIM_SETWORKMODE(d, v) ((d)->ops->setworkmode(d, v)) +#define ESP32S2_TIM_SETALRM(d, e) ((d)->ops->setalarm(d, e)) +#define ESP32S2_TIM_SETARLD(d, e) ((d)->ops->setautoreload(d, e)) +#define ESP32S2_TIM_SETISR(d, hnd, arg) ((d)->ops->setisr(d, hnd, arg)) +#define ESP32S2_TIM_ENABLEINT(d) ((d)->ops->enableint(d)) +#define ESP32S2_TIM_DISABLEINT(d) ((d)->ops->disableint(d)) +#define ESP32S2_TIM_ACKINT(d) ((d)->ops->ackint(d)) +#define ESP32S2_TIM_CHECKINT(d) ((d)->ops->checkint(d)) + +#define TIMER0 0 /* Timer group 0 timer 0 */ +#define TIMER1 1 /* Timer group 0 timer 1 */ +#define TIMER2 2 /* Timer group 1 timer 0 */ +#define TIMER3 3 /* Timer group 1 timer 1 */ +#define SYSTIMER_COMP0 4 /* Systimer comparator 0 */ +#define SYSTIMER_COMP1 5 /* Systimer comparator 1 */ +#define SYSTIMER_COMP2 6 /* Systimer comparator 2 */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* Timer mode */ + +enum esp32s2_tim_mode_e +{ + ESP32S2_TIM_MODE_DOWN, + ESP32S2_TIM_MODE_UP, +}; + +/* Systimer Work modes */ + +enum esp32s2_tim_work_mode_e +{ + ESP32S2_TIM_DELAY_ALRM, + ESP32S2_TIM_PERIOD_ALRM, +}; + +/* Timer mode */ + +enum esp32s2_tim_clksrc_e +{ + ESP32S2_TIM_APB_CLK, /* Available only for Generic Timers */ + ESP32S2_TIM_XTAL_CLK, /* Available for both Generic Timers and Systimer */ + ESP32S2_TIM_PLL_CLK /* Available only for Systimer */ +}; + +/* ESP32-S2 TIM device */ + +struct esp32s2_tim_dev_s +{ + struct esp32s2_tim_ops_s *ops; +}; + +/* ESP32-S2 TIM ops */ + +/* This is a struct containing the pointers to the timer operations */ + +struct esp32s2_tim_ops_s +{ + /* Timer tasks */ + + void (*start)(struct esp32s2_tim_dev_s *dev); + void (*stop)(struct esp32s2_tim_dev_s *dev); + void (*clear)(struct esp32s2_tim_dev_s *dev); + + /* Timer operations */ + + void (*setmode)(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_mode_e mode); + void (*setpre)(struct esp32s2_tim_dev_s *dev, uint16_t pre); + void (*setstep)(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_clksrc_e src, + uint16_t ticks); + void (*getcounter)(struct esp32s2_tim_dev_s *dev, + uint64_t *value); + void (*setclksrc)(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_clksrc_e src); + void (*setcounter)(struct esp32s2_tim_dev_s *dev, uint64_t value); + void (*reloadnow)(struct esp32s2_tim_dev_s *dev); + void (*getalarmvalue)(struct esp32s2_tim_dev_s *dev, + uint64_t *value); + void (*getperiod)(struct esp32s2_tim_dev_s *dev, uint32_t *value); + void (*setalarmvalue)(struct esp32s2_tim_dev_s *dev, + uint64_t value); + void (*setperiod)(struct esp32s2_tim_dev_s *dev, uint32_t value); + void (*setworkmode)(struct esp32s2_tim_dev_s *dev, + enum esp32s2_tim_work_mode_e); + void (*setalarm)(struct esp32s2_tim_dev_s *dev, bool enable); + void (*setautoreload)(struct esp32s2_tim_dev_s *dev, bool enable); + + /* Timer interrupts */ + + int (*setisr)(struct esp32s2_tim_dev_s *dev, xcpt_t handler, + void * arg); + void (*enableint)(struct esp32s2_tim_dev_s *dev); + void (*disableint)(struct esp32s2_tim_dev_s *dev); + void (*ackint)(struct esp32s2_tim_dev_s *dev); + int (*checkint)(struct esp32s2_tim_dev_s *dev); +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +struct esp32s2_tim_dev_s *esp32s2_tim_init(int timer); +void esp32s2_tim_deinit(struct esp32s2_tim_dev_s *dev); + +#endif /* __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_TIM_H */ diff --git a/arch/xtensa/src/esp32s2/esp32s2_tim_lowerhalf.c b/arch/xtensa/src/esp32s2/esp32s2_tim_lowerhalf.c new file mode 100644 index 00000000000..2c83d90beae --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_tim_lowerhalf.c @@ -0,0 +1,595 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_tim_lowerhalf.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "hardware/esp32s2_soc.h" + +#include "esp32s2_tim.h" +#include "esp32s2_clockconfig.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct esp32s2_timer_lowerhalf_s +{ + const struct timer_ops_s *ops; /* Lower half operations */ + struct esp32s2_tim_dev_s *tim; /* esp32s2 timer driver */ + tccb_t callback; /* Interrupt callback */ + void *arg; /* Argument passed to upper half callback */ + bool started; /* True: Timer has been started */ + void *upper; /* Pointer to watchdog_upperhalf_s */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int esp32s2_timer_handler(int irq, void *context, void *arg); + +/* "Lower half" driver methods **********************************************/ + +static int esp32s2_timer_start(struct timer_lowerhalf_s *lower); +static int esp32s2_timer_stop(struct timer_lowerhalf_s *lower); +static int esp32s2_timer_getstatus(struct timer_lowerhalf_s *lower, + struct timer_status_s *status); +static int esp32s2_timer_settimeout(struct timer_lowerhalf_s *lower, + uint32_t timeout); +static int esp32s2_timer_maxtimeout(struct timer_lowerhalf_s *lower, + uint32_t *timeout); +static void esp32s2_timer_setcallback(struct timer_lowerhalf_s *lower, + tccb_t callback, void *arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* "Lower half" driver methods */ + +static const struct timer_ops_s g_esp32s2_timer_ops = +{ + .start = esp32s2_timer_start, + .stop = esp32s2_timer_stop, + .getstatus = esp32s2_timer_getstatus, + .settimeout = esp32s2_timer_settimeout, + .setcallback = esp32s2_timer_setcallback, + .maxtimeout = esp32s2_timer_maxtimeout, + .ioctl = NULL, +}; + +#ifdef CONFIG_ESP32S2_TIMER0 + +/* TIMER0 lower-half */ + +static struct esp32s2_timer_lowerhalf_s g_esp32s2_timer0_lowerhalf = +{ + .ops = &g_esp32s2_timer_ops, +}; +#endif + +#ifdef CONFIG_ESP32S2_TIMER1 + +/* TIMER1 lower-half */ + +static struct esp32s2_timer_lowerhalf_s g_esp32s2_timer1_lowerhalf = +{ + .ops = &g_esp32s2_timer_ops, +}; +#endif + +#ifdef CONFIG_ESP32S2_TIMER2 + +/* TIMER2 lower-half */ + +static struct esp32s2_timer_lowerhalf_s g_esp32s2_timer2_lowerhalf = +{ + .ops = &g_esp32s2_timer_ops, +}; +#endif + +#ifdef CONFIG_ESP32S2_TIMER3 + +/* TIMER3 lower-half */ + +static struct esp32s2_timer_lowerhalf_s g_esp32s2_timer3_lowerhalf = +{ + .ops = &g_esp32s2_timer_ops, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_timer_handler + * + * Description: + * Timer interrupt handler + * + ****************************************************************************/ + +static int esp32s2_timer_handler(int irq, void *context, void *arg) +{ + struct esp32s2_timer_lowerhalf_s *priv = + (struct esp32s2_timer_lowerhalf_s *)arg; + uint32_t next_interval_us = 0; + + if (priv->callback(&next_interval_us, priv->upper)) + { + if (next_interval_us > 0) + { + /* Set a value to the alarm */ + + ESP32S2_TIM_SETALRVL(priv->tim, next_interval_us); + } + } + else + { + esp32s2_timer_stop((struct timer_lowerhalf_s *)priv); + } + + ESP32S2_TIM_SETALRM(priv->tim, true); /* Re-enables the alarm */ + ESP32S2_TIM_ACKINT(priv->tim); /* Clear the Interrupt */ + return OK; +} + +/**************************************************************************** + * Name: esp32s2_timer_start + * + * Description: + * Start the timer, resetting the time to the current timeout + * + * Input Parameters: + * lower - A pointer to the representation of + * the "lower-half" driver state structure. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int esp32s2_timer_start(struct timer_lowerhalf_s *lower) +{ + struct esp32s2_timer_lowerhalf_s *priv = + (struct esp32s2_timer_lowerhalf_s *)lower; + int ret = OK; + uint16_t pre; + irqstate_t flags; + + DEBUGASSERT(priv); + + if (priv->started == true) + { + /* Return EBUSY to indicate that the timer is already running */ + + ret = -EBUSY; + goto errout; + } + + /* Make sure the timer is stopped to avoid unpredictable behavior */ + + ESP32S2_TIM_STOP(priv->tim); + + /* Configure clock source */ + + ESP32S2_TIM_CLK_SRC(priv->tim, ESP32S2_TIM_APB_CLK); + + /* Calculate the suitable prescaler according to the current APB + * frequency to generate a period of 1 us. + */ + + pre = esp_clk_apb_freq() / 1000000; + + /* Configure TIMER prescaler */ + + ESP32S2_TIM_SETPRE(priv->tim, pre); + + /* Configure TIMER mode */ + + ESP32S2_TIM_SETMODE(priv->tim, ESP32S2_TIM_MODE_UP); + + /* Clear TIMER counter value */ + + ESP32S2_TIM_CLEAR(priv->tim); + + /* Enable autoreload */ + + ESP32S2_TIM_SETARLD(priv->tim, true); + + /* Enable TIMER alarm */ + + ESP32S2_TIM_SETALRM(priv->tim, true); + + /* Clear Interrupt Bits Status */ + + ESP32S2_TIM_ACKINT(priv->tim); + + /* Configure callback, in case a handler was provided before */ + + if (priv->callback != NULL) + { + flags = enter_critical_section(); + ret = ESP32S2_TIM_SETISR(priv->tim, esp32s2_timer_handler, priv); + leave_critical_section(flags); + if (ret != OK) + { + goto errout; + } + + ESP32S2_TIM_ENABLEINT(priv->tim); + } + + /* Finally, start the TIMER */ + + ESP32S2_TIM_START(priv->tim); + priv->started = true; + +errout: + return ret; +} + +/**************************************************************************** + * Name: esp32s2_timer_stop + * + * Description: + * Stop the timer + * + * Input Parameters: + * lower - A pointer the publicly visible representation of + * the "lower-half" driver state structure. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int esp32s2_timer_stop(struct timer_lowerhalf_s *lower) +{ + struct esp32s2_timer_lowerhalf_s *priv = + (struct esp32s2_timer_lowerhalf_s *)lower; + int ret = OK; + irqstate_t flags; + + DEBUGASSERT(priv); + + if (priv->started == false) + { + /* Return ENODEV to indicate that the timer was not running */ + + ret = -ENODEV; + goto errout; + } + + if (priv->callback != NULL) + { + flags = enter_critical_section(); + ESP32S2_TIM_DISABLEINT(priv->tim); + ret = ESP32S2_TIM_SETISR(priv->tim, NULL, NULL); + leave_critical_section(flags); + priv->callback = NULL; + } + + ESP32S2_TIM_STOP(priv->tim); + priv->started = false; + +errout: + return ret; +} + +/**************************************************************************** + * Name: esp32s2_timer_getstatus + * + * Description: + * Get timer status. + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower- + * half" driver state structure. + * status - The location to return the status information. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int esp32s2_timer_getstatus(struct timer_lowerhalf_s *lower, + struct timer_status_s *status) +{ + struct esp32s2_timer_lowerhalf_s *priv = + (struct esp32s2_timer_lowerhalf_s *)lower; + int ret = OK; + uint64_t current_counter_value; + uint64_t alarm_value; + + DEBUGASSERT(priv); + DEBUGASSERT(status); + + /* Return the status bit */ + + status->flags = 0; + + if (priv->started == true) + { + /* TIMER is running */ + + status->flags |= TCFLAGS_ACTIVE; + } + + if (priv->callback != NULL) + { + /* TIMER has a user callback function to be called when + * expiration happens + */ + + status->flags |= TCFLAGS_HANDLER; + } + + /* Get the current counter value */ + + ESP32S2_TIM_GETCTR(priv->tim, ¤t_counter_value); + + /* Get the current configured timeout */ + + ESP32S2_TIM_GETALRVL(priv->tim, &alarm_value); + + status->timeout = (uint32_t)(alarm_value); + status->timeleft = (uint32_t)(alarm_value - current_counter_value); + + return ret; +} + +/**************************************************************************** + * Name: esp32s2_timer_settimeout + * + * Description: + * Set a new timeout value. + * + * Input Parameters: + * lower - A pointer the publicly visible representation of + * the "lower-half" driver state structure. + * timeout - The new timeout value in microseconds. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int esp32s2_timer_settimeout(struct timer_lowerhalf_s *lower, + uint32_t timeout) +{ + struct esp32s2_timer_lowerhalf_s *priv = + (struct esp32s2_timer_lowerhalf_s *)lower; + int ret = OK; + + DEBUGASSERT(priv); + + /* Set the timeout */ + + ESP32S2_TIM_SETALRVL(priv->tim, (uint64_t)timeout); + + return ret; +} + +/**************************************************************************** + * Name: esp32s2_timer_maxtimeout + * + * Description: + * Get the maximum timeout value + * + * Input Parameters: + * lower - A pointer the publicly visible representation of + * the "lower-half" driver state structure. + * maxtimeout - A pointer to the variable that will store the max timeout. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int esp32s2_timer_maxtimeout(struct timer_lowerhalf_s *lower, + uint32_t *max_timeout) +{ + DEBUGASSERT(max_timeout); + + *max_timeout = UINT32_MAX; + + return OK; +} + +/**************************************************************************** + * Name: esp32s2_setcallback + * + * Description: + * Set the provided callback to be called at timeout from withing the + * ISR. + * + * Input Parameters: + * lower - A pointer to the publicly visible representation of + * the "lower-half" driver state structure. + * callback - A pointer to the callback. If this function pointer + * is NULL, then the reset-on-expiration behavior is restored. + * arg - A pointer to the argument that will be provided to + * the callback + * + ****************************************************************************/ + +static void esp32s2_timer_setcallback(struct timer_lowerhalf_s *lower, + tccb_t callback, void *arg) +{ + struct esp32s2_timer_lowerhalf_s *priv = + (struct esp32s2_timer_lowerhalf_s *)lower; + irqstate_t flags; + int ret = OK; + + DEBUGASSERT(priv); + + /* Save the new callback */ + + priv->callback = callback; + priv->arg = arg; + + flags = enter_critical_section(); + + /* There is a user callback and the timer has already been started */ + + if (callback != NULL && priv->started == true) + { + ret = ESP32S2_TIM_SETISR(priv->tim, esp32s2_timer_handler, priv); + ESP32S2_TIM_ENABLEINT(priv->tim); + } + else + { + ESP32S2_TIM_DISABLEINT(priv->tim); + ret = ESP32S2_TIM_SETISR(priv->tim, NULL, NULL); + } + + leave_critical_section(flags); + if (ret != OK) + { + tmrerr("Error to set ISR: %d", ret); + } +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_timer_initialize + * + * Description: + * Bind the configuration timer to a timer lower half instance and + * register the timer drivers at 'devpath' + * + * Input Parameters: + * devpath - The full path to the timer device. This should be of the + * form /dev/timerx. + * timer - the timer's number. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int esp32s2_timer_initialize(const char *devpath, uint8_t timer) +{ + struct esp32s2_timer_lowerhalf_s *lower = NULL; + int ret = OK; + + DEBUGASSERT(devpath); + + switch (timer) + { +#ifdef CONFIG_ESP32S2_TIMER0 + case TIMER0: + { + lower = &g_esp32s2_timer0_lowerhalf; + break; + } +#endif + +#ifdef CONFIG_ESP32S2_TIMER1 + case TIMER1: + { + lower = &g_esp32s2_timer1_lowerhalf; + break; + } +#endif + +#ifdef CONFIG_ESP32S2_TIMER2 + case TIMER2: + { + lower = &g_esp32s2_timer2_lowerhalf; + break; + } +#endif + +#ifdef CONFIG_ESP32S2_TIMER3 + case TIMER3: + { + lower = &g_esp32s2_timer3_lowerhalf; + break; + } +#endif + + default: + { + ret = -ENODEV; + goto errout; + } + } + + /* Initialize the elements of lower half state structure */ + + lower->started = false; + lower->callback = NULL; + lower->tim = esp32s2_tim_init(timer); + + if (lower->tim == NULL) + { + ret = -EINVAL; + goto errout; + } + + /* Register the timer driver as /dev/timerX. The returned value from + * timer_register is a handle that could be used with timer_unregister(). + * REVISIT: The returned handle is discarded here. + */ + + lower->upper = timer_register(devpath, + (struct timer_lowerhalf_s *)lower); + if (lower->upper == NULL) + { + /* The actual cause of the failure may have been a failure to allocate + * perhaps a failure to register the timer driver (such as if the + * 'devpath' were not unique). We know here but we return EEXIST to + * indicate the failure (implying the non-unique devpath). + */ + + ret = -EEXIST; + goto errout; + } + +errout: + return ret; +} diff --git a/arch/xtensa/src/esp32s2/esp32s2_tim_lowerhalf.h b/arch/xtensa/src/esp32s2/esp32s2_tim_lowerhalf.h new file mode 100644 index 00000000000..3a4198e58a1 --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_tim_lowerhalf.h @@ -0,0 +1,42 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_tim_lowerhalf.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_TIM_LOWERHALF_H +#define __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_TIM_LOWERHALF_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_timer_initialize + ****************************************************************************/ + +int esp32s2_timer_initialize(const char *devpath, uint8_t timer); + +#endif /* __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_TIM_LOWERHALF_H */ diff --git a/arch/xtensa/src/esp32s2/esp32s2_timerisr.c b/arch/xtensa/src/esp32s2/esp32s2_timerisr.c index 070842b6548..bd86a6242a6 100644 --- a/arch/xtensa/src/esp32s2/esp32s2_timerisr.c +++ b/arch/xtensa/src/esp32s2/esp32s2_timerisr.c @@ -111,7 +111,7 @@ static inline void xtensa_setcompare(uint32_t compare) * ****************************************************************************/ -static int esp32s2_timerisr(int irq, uint32_t *regs, FAR void *arg) +static int esp32s2_timerisr(int irq, uint32_t *regs, void *arg) { uint32_t divisor; uint32_t compare; diff --git a/arch/xtensa/src/esp32s2/esp32s2_user.c b/arch/xtensa/src/esp32s2/esp32s2_user.c index d0540b61678..5ea29e59199 100644 --- a/arch/xtensa/src/esp32s2/esp32s2_user.c +++ b/arch/xtensa/src/esp32s2/esp32s2_user.c @@ -317,7 +317,7 @@ uint32_t *xtensa_user(int exccause, uint32_t *regs) uint8_t t; binfo("XCHAL_EXCCAUSE_LOAD_STORE_ERROR at %p, pc=%p\n", - (FAR void *)regs[REG_EXCVADDR], + (void *)regs[REG_EXCVADDR], pc); if (decode_s8i(pc, &imm8, &s, &t)) diff --git a/arch/xtensa/src/esp32s2/esp32s2_wdt.c b/arch/xtensa/src/esp32s2/esp32s2_wdt.c new file mode 100644 index 00000000000..60addbd988d --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_wdt.c @@ -0,0 +1,50 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_wdt.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "xtensa.h" +#include "hardware/esp32s2_rtccntl.h" + +#include "esp32s2_wdt.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_wdt_early_deinit + * + * Description: + * Disable the WDT(s) that was/were enabled by the bootloader. + * + ****************************************************************************/ + +void esp32s2_wdt_early_deinit(void) +{ + uint32_t regval; + putreg32(RTC_CNTL_WDT_WKEY_VALUE, RTC_CNTL_WDTWPROTECT_REG); + regval = getreg32(RTC_CNTL_WDTCONFIG0_REG); + regval &= ~RTC_CNTL_WDT_EN; + putreg32(regval, RTC_CNTL_WDTCONFIG0_REG); + putreg32(0, RTC_CNTL_WDTWPROTECT_REG); +} diff --git a/arch/xtensa/src/esp32s2/esp32s2_wdt.h b/arch/xtensa/src/esp32s2/esp32s2_wdt.h new file mode 100644 index 00000000000..bd33075b53f --- /dev/null +++ b/arch/xtensa/src/esp32s2/esp32s2_wdt.h @@ -0,0 +1,34 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/esp32s2_wdt.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_WDT_H +#define __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_WDT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +void esp32s2_wdt_early_deinit(void); + +#endif /* __ARCH_XTENSA_SRC_ESP32S2_ESP32S2_WDT_H */ diff --git a/arch/xtensa/src/esp32s2/hardware/esp32s2_rtccntl.h b/arch/xtensa/src/esp32s2/hardware/esp32s2_rtccntl.h index 7b7f7b37c56..482beadbf5d 100644 --- a/arch/xtensa/src/esp32s2/hardware/esp32s2_rtccntl.h +++ b/arch/xtensa/src/esp32s2/hardware/esp32s2_rtccntl.h @@ -31,6 +31,12 @@ * Pre-processor Definitions ****************************************************************************/ +/* The value that needs to be written to RTC_CNTL_WDT_WKEY to + * write-enable the wdt registers + */ + +#define RTC_CNTL_WDT_WKEY_VALUE 0x50d83aa1 + #define DPORT_CPUPERIOD_SEL_80 0 #define DPORT_CPUPERIOD_SEL_160 1 #define DPORT_CPUPERIOD_SEL_240 2 diff --git a/arch/xtensa/src/esp32s2/hardware/esp32s2_systimer.h b/arch/xtensa/src/esp32s2/hardware/esp32s2_systimer.h new file mode 100644 index 00000000000..112e2807154 --- /dev/null +++ b/arch/xtensa/src/esp32s2/hardware/esp32s2_systimer.h @@ -0,0 +1,484 @@ +/**************************************************************************** + * arch/xtensa/src/esp32s2/hardware/esp32s2_systimer.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __ARCH_XTENSA_SRC_ESP32S2_HARDWARE_ESP32S2_SYSTIMER_H +#define __ARCH_XTENSA_SRC_ESP32S2_HARDWARE_ESP32S2_SYSTIMER_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "esp32s2_soc.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* SYSTIMER_CONF_REG register + * Configure system timer clock + */ + +#define SYSTIMER_CONF_REG (DR_REG_SYSTIMER_BASE + 0x0) + +/* SYSTIMER_CLK_EN : R/W; bitpos: [31]; default: 0; + * register clock enable + */ + +#define SYSTIMER_CLK_EN (BIT(31)) +#define SYSTIMER_CLK_EN_M (SYSTIMER_CLK_EN_V << SYSTIMER_CLK_EN_S) +#define SYSTIMER_CLK_EN_V 0x00000001 +#define SYSTIMER_CLK_EN_S 31 + +/* SYSTIMER_CLK_FO : R/W; bitpos: [0]; default: 0; + * system timer force clock enable + */ + +#define SYSTIMER_CLK_FO (BIT(0)) +#define SYSTIMER_CLK_FO_M (SYSTIMER_CLK_FO_V << SYSTIMER_CLK_FO_S) +#define SYSTIMER_CLK_FO_V 0x00000001 +#define SYSTIMER_CLK_FO_S 0 + +/* SYSTIMER_LOAD_REG register + * load value to system timer + */ + +#define SYSTIMER_LOAD_REG (DR_REG_SYSTIMER_BASE + 0x4) + +/* SYSTIMER_TIMER_LOAD : WO; bitpos: [31]; default: 0; + * load value to system timer + */ + +#define SYSTIMER_TIMER_LOAD (BIT(31)) +#define SYSTIMER_TIMER_LOAD_M (SYSTIMER_TIMER_LOAD_V << SYSTIMER_TIMER_LOAD_S) +#define SYSTIMER_TIMER_LOAD_V 0x00000001 +#define SYSTIMER_TIMER_LOAD_S 31 + +/* SYSTIMER_LOAD_HI_REG register + * High 32-bit load to system timer + */ + +#define SYSTIMER_LOAD_HI_REG (DR_REG_SYSTIMER_BASE + 0x8) + +/* SYSTIMER_TIMER_LOAD_HI : R/W; bitpos: [31:0]; default: 0; + * High 32-bit load to system timer + */ + +#define SYSTIMER_TIMER_LOAD_HI 0xFFFFFFFF +#define SYSTIMER_TIMER_LOAD_HI_M (SYSTIMER_TIMER_LOAD_HI_V << SYSTIMER_TIMER_LOAD_HI_S) +#define SYSTIMER_TIMER_LOAD_HI_V 0xFFFFFFFF +#define SYSTIMER_TIMER_LOAD_HI_S 0 + +/* SYSTIMER_LOAD_LO_REG register + * Low 32-bit load to system timer + */ + +#define SYSTIMER_LOAD_LO_REG (DR_REG_SYSTIMER_BASE + 0xc) + +/* SYSTIMER_TIMER_LOAD_LO : R/W; bitpos: [31:0]; default: 0; + * Low 32-bit load to system timer + */ + +#define SYSTIMER_TIMER_LOAD_LO 0xFFFFFFFF +#define SYSTIMER_TIMER_LOAD_LO_M (SYSTIMER_TIMER_LOAD_LO_V << SYSTIMER_TIMER_LOAD_LO_S) +#define SYSTIMER_TIMER_LOAD_LO_V 0xFFFFFFFF +#define SYSTIMER_TIMER_LOAD_LO_S 0 + +/* SYSTIMER_STEP_REG register + * system timer accumulation step + */ + +#define SYSTIMER_STEP_REG (DR_REG_SYSTIMER_BASE + 0x10) + +/* SYSTIMER_TIMER_PLL_STEP : R/W; bitpos: [19:10]; default: 1; + * system timer accumulation step when using PLL + */ + +#define SYSTIMER_TIMER_PLL_STEP 0x000003FF +#define SYSTIMER_TIMER_PLL_STEP_M (SYSTIMER_TIMER_PLL_STEP_V << SYSTIMER_TIMER_PLL_STEP_S) +#define SYSTIMER_TIMER_PLL_STEP_V 0x000003FF +#define SYSTIMER_TIMER_PLL_STEP_S 10 + +/* SYSTIMER_TIMER_XTAL_STEP : R/W; bitpos: [9:0]; default: 80; + * system timer accumulation step when using XTAL + */ + +#define SYSTIMER_TIMER_XTAL_STEP 0x000003FF +#define SYSTIMER_TIMER_XTAL_STEP_M (SYSTIMER_TIMER_XTAL_STEP_V << SYSTIMER_TIMER_XTAL_STEP_S) +#define SYSTIMER_TIMER_XTAL_STEP_V 0x000003FF +#define SYSTIMER_TIMER_XTAL_STEP_S 0 + +/* SYSTIMER_TARGET0_HI_REG register + * System timer target0 high 32-bit + */ + +#define SYSTIMER_TARGET0_HI_REG (DR_REG_SYSTIMER_BASE + 0x14) + +/* SYSTIMER_TIMER_TARGET0_HI : R/W; bitpos: [31:0]; default: 0; + * System timer target0 high 32-bit + */ + +#define SYSTIMER_TIMER_TARGET0_HI 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET0_HI_M (SYSTIMER_TIMER_TARGET0_HI_V << SYSTIMER_TIMER_TARGET0_HI_S) +#define SYSTIMER_TIMER_TARGET0_HI_V 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET0_HI_S 0 + +/* SYSTIMER_TARGET0_LO_REG register + * System timer target0 low 32-bit + */ + +#define SYSTIMER_TARGET0_LO_REG (DR_REG_SYSTIMER_BASE + 0x18) + +/* SYSTIMER_TIMER_TARGET0_LO : R/W; bitpos: [31:0]; default: 0; + * System timer target0 low 32-bit + */ + +#define SYSTIMER_TIMER_TARGET0_LO 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET0_LO_M (SYSTIMER_TIMER_TARGET0_LO_V << SYSTIMER_TIMER_TARGET0_LO_S) +#define SYSTIMER_TIMER_TARGET0_LO_V 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET0_LO_S 0 + +/* SYSTIMER_TARGET1_HI_REG register + * System timer target1 high 32-bit + */ + +#define SYSTIMER_TARGET1_HI_REG (DR_REG_SYSTIMER_BASE + 0x1c) + +/* SYSTIMER_TIMER_TARGET1_HI : R/W; bitpos: [31:0]; default: 0; + * System timer target1 high 32-bit + */ + +#define SYSTIMER_TIMER_TARGET1_HI 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET1_HI_M (SYSTIMER_TIMER_TARGET1_HI_V << SYSTIMER_TIMER_TARGET1_HI_S) +#define SYSTIMER_TIMER_TARGET1_HI_V 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET1_HI_S 0 + +/* SYSTIMER_TARGET1_LO_REG register + * System timer target1 low 32-bit + */ + +#define SYSTIMER_TARGET1_LO_REG (DR_REG_SYSTIMER_BASE + 0x20) + +/* SYSTIMER_TIMER_TARGET1_LO : R/W; bitpos: [31:0]; default: 0; + * System timer target1 low 32-bit + */ + +#define SYSTIMER_TIMER_TARGET1_LO 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET1_LO_M (SYSTIMER_TIMER_TARGET1_LO_V << SYSTIMER_TIMER_TARGET1_LO_S) +#define SYSTIMER_TIMER_TARGET1_LO_V 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET1_LO_S 0 + +/* SYSTIMER_TARGET2_HI_REG register + * System timer target2 high 32-bit + */ + +#define SYSTIMER_TARGET2_HI_REG (DR_REG_SYSTIMER_BASE + 0x24) + +/* SYSTIMER_TIMER_TARGET2_HI : R/W; bitpos: [31:0]; default: 0; + * System timer target2 high 32-bit + */ + +#define SYSTIMER_TIMER_TARGET2_HI 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET2_HI_M (SYSTIMER_TIMER_TARGET2_HI_V << SYSTIMER_TIMER_TARGET2_HI_S) +#define SYSTIMER_TIMER_TARGET2_HI_V 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET2_HI_S 0 + +/* SYSTIMER_TARGET2_LO_REG register + * System timer target2 low 32-bit + */ + +#define SYSTIMER_TARGET2_LO_REG (DR_REG_SYSTIMER_BASE + 0x28) + +/* SYSTIMER_TIMER_TARGET2_LO : R/W; bitpos: [31:0]; default: 0; + * System timer target2 low 32-bit + */ + +#define SYSTIMER_TIMER_TARGET2_LO 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET2_LO_M (SYSTIMER_TIMER_TARGET2_LO_V << SYSTIMER_TIMER_TARGET2_LO_S) +#define SYSTIMER_TIMER_TARGET2_LO_V 0xFFFFFFFF +#define SYSTIMER_TIMER_TARGET2_LO_S 0 + +/* SYSTIMER_TARGET0_CONF_REG register + * Configure system timer target0 work mode + */ + +#define SYSTIMER_TARGET0_CONF_REG (DR_REG_SYSTIMER_BASE + 0x2c) + +/* SYSTIMER_TARGET0_WORK_EN : R/W; bitpos: [31]; default: 0; + * system timer target0 work enable + */ + +#define SYSTIMER_TARGET0_WORK_EN (BIT(31)) +#define SYSTIMER_TARGET0_WORK_EN_M (SYSTIMER_TARGET0_WORK_EN_V << SYSTIMER_TARGET0_WORK_EN_S) +#define SYSTIMER_TARGET0_WORK_EN_V 0x00000001 +#define SYSTIMER_TARGET0_WORK_EN_S 31 + +/* SYSTIMER_TARGET0_PERIOD_MODE : R/W; bitpos: [30]; default: 0; + * Whether system timer target0 work in period mode + */ + +#define SYSTIMER_TARGET0_PERIOD_MODE (BIT(30)) +#define SYSTIMER_TARGET0_PERIOD_MODE_M (SYSTIMER_TARGET0_PERIOD_MODE_V << SYSTIMER_TARGET0_PERIOD_MODE_S) +#define SYSTIMER_TARGET0_PERIOD_MODE_V 0x00000001 +#define SYSTIMER_TARGET0_PERIOD_MODE_S 30 + +/* SYSTIMER_TARGET0_PERIOD : R/W; bitpos: [29:0]; default: 0; + * System timer target0 alarm period + */ + +#define SYSTIMER_TARGET0_PERIOD 0x3FFFFFFF +#define SYSTIMER_TARGET0_PERIOD_M (SYSTIMER_TARGET0_PERIOD_V << SYSTIMER_TARGET0_PERIOD_S) +#define SYSTIMER_TARGET0_PERIOD_V 0x3FFFFFFF +#define SYSTIMER_TARGET0_PERIOD_S 0 + +/* SYSTIMER_TARGET1_CONF_REG register + * Configure system timer target1 work mode + */ + +#define SYSTIMER_TARGET1_CONF_REG (DR_REG_SYSTIMER_BASE + 0x30) + +/* SYSTIMER_TARGET1_WORK_EN : R/W; bitpos: [31]; default: 0; + * system timer target1 work enable + */ + +#define SYSTIMER_TARGET1_WORK_EN (BIT(31)) +#define SYSTIMER_TARGET1_WORK_EN_M (SYSTIMER_TARGET1_WORK_EN_V << SYSTIMER_TARGET1_WORK_EN_S) +#define SYSTIMER_TARGET1_WORK_EN_V 0x00000001 +#define SYSTIMER_TARGET1_WORK_EN_S 31 + +/* SYSTIMER_TARGET1_PERIOD_MODE : R/W; bitpos: [30]; default: 0; + * Whether system timer target1 work in period mode + */ + +#define SYSTIMER_TARGET1_PERIOD_MODE (BIT(30)) +#define SYSTIMER_TARGET1_PERIOD_MODE_M (SYSTIMER_TARGET1_PERIOD_MODE_V << SYSTIMER_TARGET1_PERIOD_MODE_S) +#define SYSTIMER_TARGET1_PERIOD_MODE_V 0x00000001 +#define SYSTIMER_TARGET1_PERIOD_MODE_S 30 + +/* SYSTIMER_TARGET1_PERIOD : R/W; bitpos: [29:0]; default: 0; + * System timer target1 alarm period + */ + +#define SYSTIMER_TARGET1_PERIOD 0x3FFFFFFF +#define SYSTIMER_TARGET1_PERIOD_M (SYSTIMER_TARGET1_PERIOD_V << SYSTIMER_TARGET1_PERIOD_S) +#define SYSTIMER_TARGET1_PERIOD_V 0x3FFFFFFF +#define SYSTIMER_TARGET1_PERIOD_S 0 + +/* SYSTIMER_TARGET2_CONF_REG register + * Configure system timer target2 work mode + */ + +#define SYSTIMER_TARGET2_CONF_REG (DR_REG_SYSTIMER_BASE + 0x34) + +/* SYSTIMER_TARGET2_WORK_EN : R/W; bitpos: [31]; default: 0; + * system timer target2 work enable + */ + +#define SYSTIMER_TARGET2_WORK_EN (BIT(31)) +#define SYSTIMER_TARGET2_WORK_EN_M (SYSTIMER_TARGET2_WORK_EN_V << SYSTIMER_TARGET2_WORK_EN_S) +#define SYSTIMER_TARGET2_WORK_EN_V 0x00000001 +#define SYSTIMER_TARGET2_WORK_EN_S 31 + +/* SYSTIMER_TARGET2_PERIOD_MODE : R/W; bitpos: [30]; default: 0; + * Whether system timer target2 work in period mode + */ + +#define SYSTIMER_TARGET2_PERIOD_MODE (BIT(30)) +#define SYSTIMER_TARGET2_PERIOD_MODE_M (SYSTIMER_TARGET2_PERIOD_MODE_V << SYSTIMER_TARGET2_PERIOD_MODE_S) +#define SYSTIMER_TARGET2_PERIOD_MODE_V 0x00000001 +#define SYSTIMER_TARGET2_PERIOD_MODE_S 30 + +/* SYSTIMER_TARGET2_PERIOD : R/W; bitpos: [29:0]; default: 0; + * System timer target2 alarm period + */ + +#define SYSTIMER_TARGET2_PERIOD 0x3FFFFFFF +#define SYSTIMER_TARGET2_PERIOD_M (SYSTIMER_TARGET2_PERIOD_V << SYSTIMER_TARGET2_PERIOD_S) +#define SYSTIMER_TARGET2_PERIOD_V 0x3FFFFFFF +#define SYSTIMER_TARGET2_PERIOD_S 0 + +/* SYSTIMER_UPDATE_REG register + * Read out system timer value + */ + +#define SYSTIMER_UPDATE_REG (DR_REG_SYSTIMER_BASE + 0x38) + +/* SYSTIMER_TIMER_UPDATE : WO; bitpos: [31]; default: 0; + * Update system timer value to register + */ + +#define SYSTIMER_TIMER_UPDATE (BIT(31)) +#define SYSTIMER_TIMER_UPDATE_M (SYSTIMER_TIMER_UPDATE_V << SYSTIMER_TIMER_UPDATE_S) +#define SYSTIMER_TIMER_UPDATE_V 0x00000001 +#define SYSTIMER_TIMER_UPDATE_S 31 + +/* SYSTIMER_TIMER_VALUE_VALID : RO; bitpos: [30]; default: 0; + * If it is valid to read out timer value from register + */ + +#define SYSTIMER_TIMER_VALUE_VALID (BIT(30)) +#define SYSTIMER_TIMER_VALUE_VALID_M (SYSTIMER_TIMER_VALUE_VALID_V << SYSTIMER_TIMER_VALUE_VALID_S) +#define SYSTIMER_TIMER_VALUE_VALID_V 0x00000001 +#define SYSTIMER_TIMER_VALUE_VALID_S 30 + +/* SYSTIMER_VALUE_HI_REG register + * system timer high 32-bit + */ + +#define SYSTIMER_VALUE_HI_REG (DR_REG_SYSTIMER_BASE + 0x3c) + +/* SYSTIMER_TIMER_VALUE_HI : RO; bitpos: [31:0]; default: 0; + * system timer high 32-bit + */ + +#define SYSTIMER_TIMER_VALUE_HI 0xFFFFFFFF +#define SYSTIMER_TIMER_VALUE_HI_M (SYSTIMER_TIMER_VALUE_HI_V << SYSTIMER_TIMER_VALUE_HI_S) +#define SYSTIMER_TIMER_VALUE_HI_V 0xFFFFFFFF +#define SYSTIMER_TIMER_VALUE_HI_S 0 + +/* SYSTIMER_VALUE_LO_REG register + * system timer low 32-bit + */ + +#define SYSTIMER_VALUE_LO_REG (DR_REG_SYSTIMER_BASE + 0x40) + +/* SYSTIMER_TIMER_VALUE_LO : RO; bitpos: [31:0]; default: 0; + * system timer low 32-bit + */ + +#define SYSTIMER_TIMER_VALUE_LO 0xFFFFFFFF +#define SYSTIMER_TIMER_VALUE_LO_M (SYSTIMER_TIMER_VALUE_LO_V << SYSTIMER_TIMER_VALUE_LO_S) +#define SYSTIMER_TIMER_VALUE_LO_V 0xFFFFFFFF +#define SYSTIMER_TIMER_VALUE_LO_S 0 + +/* SYSTIMER_INT_ENA_REG register + * system timer interrupt enable + */ + +#define SYSTIMER_INT_ENA_REG (DR_REG_SYSTIMER_BASE + 0x44) + +/* SYSTIMER_SYSTIMER_INT2_ENA : R/W; bitpos: [2]; default: 0; + * system timer target2 interrupt enable + */ + +#define SYSTIMER_SYSTIMER_INT2_ENA (BIT(2)) +#define SYSTIMER_SYSTIMER_INT2_ENA_M (SYSTIMER_SYSTIMER_INT2_ENA_V << SYSTIMER_SYSTIMER_INT2_ENA_S) +#define SYSTIMER_SYSTIMER_INT2_ENA_V 0x00000001 +#define SYSTIMER_SYSTIMER_INT2_ENA_S 2 + +/* SYSTIMER_SYSTIMER_INT1_ENA : R/W; bitpos: [1]; default: 0; + * system timer target1 interrupt enable + */ + +#define SYSTIMER_SYSTIMER_INT1_ENA (BIT(1)) +#define SYSTIMER_SYSTIMER_INT1_ENA_M (SYSTIMER_SYSTIMER_INT1_ENA_V << SYSTIMER_SYSTIMER_INT1_ENA_S) +#define SYSTIMER_SYSTIMER_INT1_ENA_V 0x00000001 +#define SYSTIMER_SYSTIMER_INT1_ENA_S 1 + +/* SYSTIMER_SYSTIMER_INT0_ENA : R/W; bitpos: [0]; default: 0; + * system timer target0 interrupt enable + */ + +#define SYSTIMER_SYSTIMER_INT0_ENA (BIT(0)) +#define SYSTIMER_SYSTIMER_INT0_ENA_M (SYSTIMER_SYSTIMER_INT0_ENA_V << SYSTIMER_SYSTIMER_INT0_ENA_S) +#define SYSTIMER_SYSTIMER_INT0_ENA_V 0x00000001 +#define SYSTIMER_SYSTIMER_INT0_ENA_S 0 + +/* SYSTIMER_INT_RAW_REG register + * system timer interrupt raw + */ + +#define SYSTIMER_INT_RAW_REG (DR_REG_SYSTIMER_BASE + 0x48) + +/* SYSTIMER_SYSTIMER_INT2_RAW : RO; bitpos: [2]; default: 0; + * system timer target2 interrupt raw + */ + +#define SYSTIMER_SYSTIMER_INT2_RAW (BIT(2)) +#define SYSTIMER_SYSTIMER_INT2_RAW_M (SYSTIMER_SYSTIMER_INT2_RAW_V << SYSTIMER_SYSTIMER_INT2_RAW_S) +#define SYSTIMER_SYSTIMER_INT2_RAW_V 0x00000001 +#define SYSTIMER_SYSTIMER_INT2_RAW_S 2 + +/* SYSTIMER_SYSTIMER_INT1_RAW : RO; bitpos: [1]; default: 0; + * system timer target1 interrupt raw + */ + +#define SYSTIMER_SYSTIMER_INT1_RAW (BIT(1)) +#define SYSTIMER_SYSTIMER_INT1_RAW_M (SYSTIMER_SYSTIMER_INT1_RAW_V << SYSTIMER_SYSTIMER_INT1_RAW_S) +#define SYSTIMER_SYSTIMER_INT1_RAW_V 0x00000001 +#define SYSTIMER_SYSTIMER_INT1_RAW_S 1 + +/* SYSTIMER_SYSTIMER_INT0_RAW : RO; bitpos: [0]; default: 0; + * system timer target0 interrupt raw + */ + +#define SYSTIMER_SYSTIMER_INT0_RAW (BIT(0)) +#define SYSTIMER_SYSTIMER_INT0_RAW_M (SYSTIMER_SYSTIMER_INT0_RAW_V << SYSTIMER_SYSTIMER_INT0_RAW_S) +#define SYSTIMER_SYSTIMER_INT0_RAW_V 0x00000001 +#define SYSTIMER_SYSTIMER_INT0_RAW_S 0 + +/* SYSTIMER_INT_CLR_REG register + * system timer interrupt clear + */ + +#define SYSTIMER_INT_CLR_REG (DR_REG_SYSTIMER_BASE + 0x4c) + +/* SYSTIMER_SYSTIMER_INT2_CLR : WO; bitpos: [2]; default: 0; + * system timer target2 interrupt clear + */ + +#define SYSTIMER_SYSTIMER_INT2_CLR (BIT(2)) +#define SYSTIMER_SYSTIMER_INT2_CLR_M (SYSTIMER_SYSTIMER_INT2_CLR_V << SYSTIMER_SYSTIMER_INT2_CLR_S) +#define SYSTIMER_SYSTIMER_INT2_CLR_V 0x00000001 +#define SYSTIMER_SYSTIMER_INT2_CLR_S 2 + +/* SYSTIMER_SYSTIMER_INT1_CLR : WO; bitpos: [1]; default: 0; + * system timer target1 interrupt clear + */ + +#define SYSTIMER_SYSTIMER_INT1_CLR (BIT(1)) +#define SYSTIMER_SYSTIMER_INT1_CLR_M (SYSTIMER_SYSTIMER_INT1_CLR_V << SYSTIMER_SYSTIMER_INT1_CLR_S) +#define SYSTIMER_SYSTIMER_INT1_CLR_V 0x00000001 +#define SYSTIMER_SYSTIMER_INT1_CLR_S 1 + +/* SYSTIMER_SYSTIMER_INT0_CLR : WO; bitpos: [0]; default: 0; + * system timer target0 interrupt clear + */ + +#define SYSTIMER_SYSTIMER_INT0_CLR (BIT(0)) +#define SYSTIMER_SYSTIMER_INT0_CLR_M (SYSTIMER_SYSTIMER_INT0_CLR_V << SYSTIMER_SYSTIMER_INT0_CLR_S) +#define SYSTIMER_SYSTIMER_INT0_CLR_V 0x00000001 +#define SYSTIMER_SYSTIMER_INT0_CLR_S 0 + +/* SYSTIMER_DATE_REG register + * system timer register version + */ + +#define SYSTIMER_DATE_REG (DR_REG_SYSTIMER_BASE + 0xfc) + +/* SYSTIMER_DATE : R/W; bitpos: [31:0]; default: 25194848; + * system timer register version + */ + +#define SYSTIMER_DATE 0xFFFFFFFF +#define SYSTIMER_DATE_M (SYSTIMER_DATE_V << SYSTIMER_DATE_S) +#define SYSTIMER_DATE_V 0xFFFFFFFF +#define SYSTIMER_DATE_S 0 + +#endif /* __ARCH_XTENSA_SRC_ESP32S2_HARDWARE_ESP32S2_SYSTIMER_H */ diff --git a/arch/xtensa/src/esp32s2/hardware/esp32s2_tim.h b/arch/xtensa/src/esp32s2/hardware/esp32s2_tim.h index 52bfe4d6295..03479c4d712 100644 --- a/arch/xtensa/src/esp32s2/hardware/esp32s2_tim.h +++ b/arch/xtensa/src/esp32s2/hardware/esp32s2_tim.h @@ -31,11 +31,13 @@ * Pre-processor Definitions ****************************************************************************/ -/* TIMG_T0CONFIG_REG register +#define SHIFT_32 32 + +/* TIMG_T0CONFIG_REG(i) register * Timer 0 configuration register */ -#define TIMG_T0CONFIG_REG (DR_REG_TIMG_BASE + 0x0) +#define TIMG_T0CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x0) /* TIMG_T0_EN : R/W; bitpos: [31]; default: 0; * When set, the timer 0 time-base counter is enabled. @@ -115,14 +117,14 @@ #define TIMG_T0_USE_XTAL_V 0x00000001 #define TIMG_T0_USE_XTAL_S 9 -/* TIMG_T0LO_REG register +/* TIMG_T0LO_REG(i) register * Timer 0 current value, low 32 bits */ -#define TIMG_T0LO_REG (DR_REG_TIMG_BASE + 0x4) +#define TIMG_T0LO_REG(i) (REG_TIMG_BASE(i) + 0x4) /* TIMG_T0_LO : RO; bitpos: [31:0]; default: 0; - * After writing to TIMG_T0UPDATE_REG, the low 32 bits of the time-base + * After writing to TIMG_T0UPDATE_REG(i), the low 32 bits of the time-base * counter * * of timer 0 can be read here. @@ -133,14 +135,14 @@ #define TIMG_T0_LO_V 0xFFFFFFFF #define TIMG_T0_LO_S 0 -/* TIMG_T0HI_REG register +/* TIMG_T0HI_REG(i) register * Timer 0 current value, high 32 bits */ -#define TIMG_T0HI_REG (DR_REG_TIMG_BASE + 0x8) +#define TIMG_T0HI_REG(i) (REG_TIMG_BASE(i) + 0x8) /* TIMG_T0_HI : RO; bitpos: [31:0]; default: 0; - * After writing to TIMG_T0UPDATE_REG, the high 32 bits of the time-base + * After writing to TIMG_T0UPDATE_REG(i), the high 32 bits of the time-base * counter * * of timer 0 can be read here. @@ -151,14 +153,15 @@ #define TIMG_T0_HI_V 0xFFFFFFFF #define TIMG_T0_HI_S 0 -/* TIMG_T0UPDATE_REG register - * Write to copy current timer value to TIMGn_T0_(LO/HI)_REG +/* TIMG_T0UPDATE_REG(i) register + * Write to copy current timer value to TIMGn_T0_(LO/HI)_REG(i) */ -#define TIMG_T0UPDATE_REG (DR_REG_TIMG_BASE + 0xc) +#define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0xc) /* TIMG_T0_UPDATE : R/W; bitpos: [31]; default: 0; - * After writing 0 or 1 to TIMG_T0UPDATE_REG, the counter value is latched. + * After writing 0 or 1 to TIMG_T0UPDATE_REG(i), the counter value + * is latched. */ #define TIMG_T0_UPDATE (BIT(31)) @@ -166,11 +169,11 @@ #define TIMG_T0_UPDATE_V 0x00000001 #define TIMG_T0_UPDATE_S 31 -/* TIMG_T0ALARMLO_REG register +/* TIMG_T0ALARMLO_REG(i) register * Timer 0 alarm value, low 32 bits */ -#define TIMG_T0ALARMLO_REG (DR_REG_TIMG_BASE + 0x10) +#define TIMG_T0ALARMLO_REG(i) (REG_TIMG_BASE(i) + 0x10) /* TIMG_T0_ALARM_LO : R/W; bitpos: [31:0]; default: 0; * Timer 0 alarm trigger time-base counter value, low 32 bits. @@ -181,11 +184,11 @@ #define TIMG_T0_ALARM_LO_V 0xFFFFFFFF #define TIMG_T0_ALARM_LO_S 0 -/* TIMG_T0ALARMHI_REG register +/* TIMG_T0ALARMHI_REG(i) register * Timer 0 alarm value, high bits */ -#define TIMG_T0ALARMHI_REG (DR_REG_TIMG_BASE + 0x14) +#define TIMG_T0ALARMHI_REG(i) (REG_TIMG_BASE(i) + 0x14) /* TIMG_T0_ALARM_HI : R/W; bitpos: [31:0]; default: 0; * @@ -198,11 +201,11 @@ #define TIMG_T0_ALARM_HI_V 0xFFFFFFFF #define TIMG_T0_ALARM_HI_S 0 -/* TIMG_T0LOADLO_REG register +/* TIMG_T0LOADLO_REG(i) register * Timer 0 reload value, low 32 bits */ -#define TIMG_T0LOADLO_REG (DR_REG_TIMG_BASE + 0x18) +#define TIMG_T0LOADLO_REG(i) (REG_TIMG_BASE(i) + 0x18) /* TIMG_T0_LOAD_LO : R/W; bitpos: [31:0]; default: 0; * @@ -217,11 +220,11 @@ #define TIMG_T0_LOAD_LO_V 0xFFFFFFFF #define TIMG_T0_LOAD_LO_S 0 -/* TIMG_T0LOADHI_REG register +/* TIMG_T0LOADHI_REG(i) register * Timer 0 reload value, high 32 bits */ -#define TIMG_T0LOADHI_REG (DR_REG_TIMG_BASE + 0x1c) +#define TIMG_T0LOADHI_REG(i) (REG_TIMG_BASE(i) + 0x1c) /* TIMG_T0_LOAD_HI : R/W; bitpos: [31:0]; default: 0; * @@ -236,11 +239,11 @@ #define TIMG_T0_LOAD_HI_V 0xFFFFFFFF #define TIMG_T0_LOAD_HI_S 0 -/* TIMG_T0LOAD_REG register - * Write to reload timer from TIMG_T0_(LOADLOLOADHI)_REG +/* TIMG_T0LOAD_REG(i) register + * Write to reload timer from TIMG_T0_(LOADLOLOADHI)_REG(i) */ -#define TIMG_T0LOAD_REG (DR_REG_TIMG_BASE + 0x20) +#define TIMG_T0LOAD_REG(i) (REG_TIMG_BASE(i) + 0x20) /* TIMG_T0_LOAD : WO; bitpos: [31:0]; default: 0; * @@ -253,11 +256,11 @@ #define TIMG_T0_LOAD_V 0xFFFFFFFF #define TIMG_T0_LOAD_S 0 -/* TIMG_T1CONFIG_REG register +/* TIMG_T1CONFIG_REG(i) register * Timer 1 configuration register */ -#define TIMG_T1CONFIG_REG (DR_REG_TIMG_BASE + 0x24) +#define TIMG_T1CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x24) /* TIMG_T1_EN : R/W; bitpos: [31]; default: 0; * When set, the timer 1 time-base counter is enabled. @@ -337,14 +340,14 @@ #define TIMG_T1_USE_XTAL_V 0x00000001 #define TIMG_T1_USE_XTAL_S 9 -/* TIMG_T1LO_REG register +/* TIMG_T1LO_REG(i) register * Timer 1 current value, low 32 bits */ -#define TIMG_T1LO_REG (DR_REG_TIMG_BASE + 0x28) +#define TIMG_T1LO_REG(i) (REG_TIMG_BASE(i) + 0x28) /* TIMG_T1_LO : RO; bitpos: [31:0]; default: 0; - * After writing to TIMG_T1UPDATE_REG, the low 32 bits of the time-base + * After writing to TIMG_T1UPDATE_REG(i), the low 32 bits of the time-base * counter * * of timer 1 can be read here. @@ -355,14 +358,14 @@ #define TIMG_T1_LO_V 0xFFFFFFFF #define TIMG_T1_LO_S 0 -/* TIMG_T1HI_REG register +/* TIMG_T1HI_REG(i) register * Timer 1 current value, high 32 bits */ -#define TIMG_T1HI_REG (DR_REG_TIMG_BASE + 0x2c) +#define TIMG_T1HI_REG(i) (REG_TIMG_BASE(i) + 0x2c) /* TIMG_T1_HI : RO; bitpos: [31:0]; default: 0; - * After writing to TIMG_T1UPDATE_REG, the high 32 bits of the time-base + * After writing to TIMG_T1UPDATE_REG(i), the high 32 bits of the time-base * counter * * of timer 1 can be read here. @@ -373,14 +376,15 @@ #define TIMG_T1_HI_V 0xFFFFFFFF #define TIMG_T1_HI_S 0 -/* TIMG_T1UPDATE_REG register - * Write to copy current timer value to TIMGn_T1_(LO/HI)_REG +/* TIMG_T1UPDATE_REG(i) register + * Write to copy current timer value to TIMGn_T1_(LO/HI)_REG(i) */ -#define TIMG_T1UPDATE_REG (DR_REG_TIMG_BASE + 0x30) +#define TIMG_T1UPDATE_REG(i) (REG_TIMG_BASE(i) + 0x30) /* TIMG_T1_UPDATE : R/W; bitpos: [31]; default: 0; - * After writing 0 or 1 to TIMG_T1UPDATE_REG, the counter value is latched. + * After writing 0 or 1 to TIMG_T1UPDATE_REG(i), the counter value + * is latched. */ #define TIMG_T1_UPDATE (BIT(31)) @@ -388,11 +392,11 @@ #define TIMG_T1_UPDATE_V 0x00000001 #define TIMG_T1_UPDATE_S 31 -/* TIMG_T1ALARMLO_REG register +/* TIMG_T1ALARMLO_REG(i) register * Timer 1 alarm value, low 32 bits */ -#define TIMG_T1ALARMLO_REG (DR_REG_TIMG_BASE + 0x34) +#define TIMG_T1ALARMLO_REG(i) (REG_TIMG_BASE(i) + 0x34) /* TIMG_T1_ALARM_LO : R/W; bitpos: [31:0]; default: 0; * Timer 1 alarm trigger time-base counter value, low 32 bits. @@ -403,11 +407,11 @@ #define TIMG_T1_ALARM_LO_V 0xFFFFFFFF #define TIMG_T1_ALARM_LO_S 0 -/* TIMG_T1ALARMHI_REG register +/* TIMG_T1ALARMHI_REG(i) register * Timer 1 alarm value, high bits */ -#define TIMG_T1ALARMHI_REG (DR_REG_TIMG_BASE + 0x38) +#define TIMG_T1ALARMHI_REG(i) (REG_TIMG_BASE(i) + 0x38) /* TIMG_T1_ALARM_HI : R/W; bitpos: [31:0]; default: 0; * @@ -420,11 +424,11 @@ #define TIMG_T1_ALARM_HI_V 0xFFFFFFFF #define TIMG_T1_ALARM_HI_S 0 -/* TIMG_T1LOADLO_REG register +/* TIMG_T1LOADLO_REG(i) register * Timer 1 reload value, low 32 bits */ -#define TIMG_T1LOADLO_REG (DR_REG_TIMG_BASE + 0x3c) +#define TIMG_T1LOADLO_REG(i) (REG_TIMG_BASE(i) + 0x3c) /* TIMG_T1_LOAD_LO : R/W; bitpos: [31:0]; default: 0; * @@ -439,11 +443,11 @@ #define TIMG_T1_LOAD_LO_V 0xFFFFFFFF #define TIMG_T1_LOAD_LO_S 0 -/* TIMG_T1LOADHI_REG register +/* TIMG_T1LOADHI_REG(i) register * Timer 1 reload value, high 32 bits */ -#define TIMG_T1LOADHI_REG (DR_REG_TIMG_BASE + 0x40) +#define TIMG_T1LOADHI_REG(i) (REG_TIMG_BASE(i) + 0x40) /* TIMG_T1_LOAD_HI : R/W; bitpos: [31:0]; default: 0; * @@ -458,11 +462,11 @@ #define TIMG_T1_LOAD_HI_V 0xFFFFFFFF #define TIMG_T1_LOAD_HI_S 0 -/* TIMG_T1LOAD_REG register - * Write to reload timer from TIMG_T0_(LOADLOLOADHI)_REG +/* TIMG_T1LOAD_REG(i) register + * Write to reload timer from TIMG_T0_(LOADLOLOADHI)_REG(i) */ -#define TIMG_T1LOAD_REG (DR_REG_TIMG_BASE + 0x44) +#define TIMG_T1LOAD_REG(i) (REG_TIMG_BASE(i) + 0x44) /* TIMG_T1_LOAD : WO; bitpos: [31:0]; default: 0; * @@ -475,11 +479,11 @@ #define TIMG_T1_LOAD_V 0xFFFFFFFF #define TIMG_T1_LOAD_S 0 -/* TIMG_WDTCONFIG0_REG register +/* TIMG_WDTCONFIG0_REG(i) register * Watchdog timer configuration register */ -#define TIMG_WDTCONFIG0_REG (DR_REG_TIMG_BASE + 0x48) +#define TIMG_WDTCONFIG0_REG(i) (REG_TIMG_BASE(i) + 0x48) /* TIMG_WDT_EN : R/W; bitpos: [31]; default: 0; * When set, MWDT is enabled. @@ -605,11 +609,11 @@ #define TIMG_WDT_APPCPU_RESET_EN_V 0x00000001 #define TIMG_WDT_APPCPU_RESET_EN_S 12 -/* TIMG_WDTCONFIG1_REG register +/* TIMG_WDTCONFIG1_REG(i) register * Watchdog timer prescaler register */ -#define TIMG_WDTCONFIG1_REG (DR_REG_TIMG_BASE + 0x4c) +#define TIMG_WDTCONFIG1_REG(i) (REG_TIMG_BASE(i) + 0x4c) /* TIMG_WDT_CLK_PRESCALER : R/W; bitpos: [31:16]; default: 1; * MWDT clock prescaler value. MWDT clock period = 12.5 ns * @@ -622,11 +626,11 @@ #define TIMG_WDT_CLK_PRESCALER_V 0x0000FFFF #define TIMG_WDT_CLK_PRESCALER_S 16 -/* TIMG_WDTCONFIG2_REG register +/* TIMG_WDTCONFIG2_REG(i) register * Watchdog timer stage 0 timeout value */ -#define TIMG_WDTCONFIG2_REG (DR_REG_TIMG_BASE + 0x50) +#define TIMG_WDTCONFIG2_REG(i) (REG_TIMG_BASE(i) + 0x50) /* TIMG_WDT_STG0_HOLD : R/W; bitpos: [31:0]; default: 26000000; * Stage 0 timeout value, in MWDT clock cycles. @@ -637,11 +641,11 @@ #define TIMG_WDT_STG0_HOLD_V 0xFFFFFFFF #define TIMG_WDT_STG0_HOLD_S 0 -/* TIMG_WDTCONFIG3_REG register +/* TIMG_WDTCONFIG3_REG(i) register * Watchdog timer stage 1 timeout value */ -#define TIMG_WDTCONFIG3_REG (DR_REG_TIMG_BASE + 0x54) +#define TIMG_WDTCONFIG3_REG(i) (REG_TIMG_BASE(i) + 0x54) /* TIMG_WDT_STG1_HOLD : R/W; bitpos: [31:0]; default: 134217727; * Stage 1 timeout value, in MWDT clock cycles. @@ -652,11 +656,11 @@ #define TIMG_WDT_STG1_HOLD_V 0xFFFFFFFF #define TIMG_WDT_STG1_HOLD_S 0 -/* TIMG_WDTCONFIG4_REG register +/* TIMG_WDTCONFIG4_REG(i) register * Watchdog timer stage 2 timeout value */ -#define TIMG_WDTCONFIG4_REG (DR_REG_TIMG_BASE + 0x58) +#define TIMG_WDTCONFIG4_REG(i) (REG_TIMG_BASE(i) + 0x58) /* TIMG_WDT_STG2_HOLD : R/W; bitpos: [31:0]; default: 1048575; * Stage 2 timeout value, in MWDT clock cycles. @@ -667,11 +671,11 @@ #define TIMG_WDT_STG2_HOLD_V 0xFFFFFFFF #define TIMG_WDT_STG2_HOLD_S 0 -/* TIMG_WDTCONFIG5_REG register +/* TIMG_WDTCONFIG5_REG(i) register * Watchdog timer stage 3 timeout value */ -#define TIMG_WDTCONFIG5_REG (DR_REG_TIMG_BASE + 0x5c) +#define TIMG_WDTCONFIG5_REG(i) (REG_TIMG_BASE(i) + 0x5c) /* TIMG_WDT_STG3_HOLD : R/W; bitpos: [31:0]; default: 1048575; * Stage 3 timeout value, in MWDT clock cycles. @@ -682,11 +686,11 @@ #define TIMG_WDT_STG3_HOLD_V 0xFFFFFFFF #define TIMG_WDT_STG3_HOLD_S 0 -/* TIMG_WDTFEED_REG register +/* TIMG_WDTFEED_REG(i) register * Write to feed the watchdog timer */ -#define TIMG_WDTFEED_REG (DR_REG_TIMG_BASE + 0x60) +#define TIMG_WDTFEED_REG(i) (REG_TIMG_BASE(i) + 0x60) /* TIMG_WDT_FEED : WO; bitpos: [31:0]; default: 0; * Write any value to feed the MWDT. (WO) @@ -697,11 +701,11 @@ #define TIMG_WDT_FEED_V 0xFFFFFFFF #define TIMG_WDT_FEED_S 0 -/* TIMG_WDTWPROTECT_REG register +/* TIMG_WDTWPROTECT_REG(i) register * Watchdog write protect register */ -#define TIMG_WDTWPROTECT_REG (DR_REG_TIMG_BASE + 0x64) +#define TIMG_WDTWPROTECT_REG(i) (REG_TIMG_BASE(i) + 0x64) /* TIMG_WDT_WKEY : R/W; bitpos: [31:0]; default: 1356348065; * If the register contains a different value than its reset value, write @@ -714,86 +718,11 @@ #define TIMG_WDT_WKEY_V 0xFFFFFFFF #define TIMG_WDT_WKEY_S 0 -/* TIMG_RTCCALICFG_REG register - * RTC calibration configuration register - */ - -#define TIMG_RTCCALICFG_REG (DR_REG_TIMG_BASE + 0x68) - -/* TIMG_RTC_CALI_START : R/W; bitpos: [31]; default: 0; - * Reserved - */ - -#define TIMG_RTC_CALI_START (BIT(31)) -#define TIMG_RTC_CALI_START_M (TIMG_RTC_CALI_START_V << TIMG_RTC_CALI_START_S) -#define TIMG_RTC_CALI_START_V 0x00000001 -#define TIMG_RTC_CALI_START_S 31 - -/* TIMG_RTC_CALI_MAX : R/W; bitpos: [30:16]; default: 1; - * Reserved - */ - -#define TIMG_RTC_CALI_MAX 0x00007FFF -#define TIMG_RTC_CALI_MAX_M (TIMG_RTC_CALI_MAX_V << TIMG_RTC_CALI_MAX_S) -#define TIMG_RTC_CALI_MAX_V 0x00007FFF -#define TIMG_RTC_CALI_MAX_S 16 - -/* TIMG_RTC_CALI_RDY : RO; bitpos: [15]; default: 0; - * Reserved - */ - -#define TIMG_RTC_CALI_RDY (BIT(15)) -#define TIMG_RTC_CALI_RDY_M (TIMG_RTC_CALI_RDY_V << TIMG_RTC_CALI_RDY_S) -#define TIMG_RTC_CALI_RDY_V 0x00000001 -#define TIMG_RTC_CALI_RDY_S 15 - -/* TIMG_RTC_CALI_CLK_SEL : R/W; bitpos: [14:13]; default: 1; - * 0:rtcslowclock. 1:clk_80m. 2:xtal_32k. - */ - -#define TIMG_RTC_CALI_CLK_SEL 0x00000003 -#define TIMG_RTC_CALI_CLK_SEL_M (TIMG_RTC_CALI_CLK_SEL_V << TIMG_RTC_CALI_CLK_SEL_S) -#define TIMG_RTC_CALI_CLK_SEL_V 0x00000003 -#define TIMG_RTC_CALI_CLK_SEL_S 13 - -/* TIMG_RTC_CALI_START_CYCLING : R/W; bitpos: [12]; default: 1; - * Reserved - */ - -#define TIMG_RTC_CALI_START_CYCLING (BIT(12)) -#define TIMG_RTC_CALI_START_CYCLING_M (TIMG_RTC_CALI_START_CYCLING_V << TIMG_RTC_CALI_START_CYCLING_S) -#define TIMG_RTC_CALI_START_CYCLING_V 0x00000001 -#define TIMG_RTC_CALI_START_CYCLING_S 12 - -/* TIMG_RTCCALICFG1_REG register - * RTC calibration configuration1 register - */ - -#define TIMG_RTCCALICFG1_REG (DR_REG_TIMG_BASE + 0x6c) - -/* TIMG_RTC_CALI_VALUE : RO; bitpos: [31:7]; default: 0; - * Reserved - */ - -#define TIMG_RTC_CALI_VALUE 0x01FFFFFF -#define TIMG_RTC_CALI_VALUE_M (TIMG_RTC_CALI_VALUE_V << TIMG_RTC_CALI_VALUE_S) -#define TIMG_RTC_CALI_VALUE_V 0x01FFFFFF -#define TIMG_RTC_CALI_VALUE_S 7 - -/* TIMG_RTC_CALI_CYCLING_DATA_VLD : RO; bitpos: [0]; default: 0; - * Reserved - */ - -#define TIMG_RTC_CALI_CYCLING_DATA_VLD (BIT(0)) -#define TIMG_RTC_CALI_CYCLING_DATA_VLD_M (TIMG_RTC_CALI_CYCLING_DATA_VLD_V << TIMG_RTC_CALI_CYCLING_DATA_VLD_S) -#define TIMG_RTC_CALI_CYCLING_DATA_VLD_V 0x00000001 -#define TIMG_RTC_CALI_CYCLING_DATA_VLD_S 0 - -/* TIMG_LACTCONFIG_REG register +/* TIMG_LACTCONFIG_REG(i) register * LACT configuration register */ -#define TIMG_LACTCONFIG_REG (DR_REG_TIMG_BASE + 0x70) +#define TIMG_LACTCONFIG_REG(i) (REG_TIMG_BASE(i) + 0x70) /* TIMG_LACT_EN : R/W; bitpos: [31]; default: 0; * Reserved @@ -894,11 +823,11 @@ #define TIMG_LACT_USE_REFTICK_V 0x00000001 #define TIMG_LACT_USE_REFTICK_S 6 -/* TIMG_LACTRTC_REG register +/* TIMG_LACTRTC_REG(i) register * LACT RTC register */ -#define TIMG_LACTRTC_REG (DR_REG_TIMG_BASE + 0x74) +#define TIMG_LACTRTC_REG(i) (REG_TIMG_BASE(i) + 0x74) /* TIMG_LACT_RTC_STEP_LEN : R/W; bitpos: [31:6]; default: 0; * Reserved @@ -909,11 +838,11 @@ #define TIMG_LACT_RTC_STEP_LEN_V 0x03FFFFFF #define TIMG_LACT_RTC_STEP_LEN_S 6 -/* TIMG_LACTLO_REG register +/* TIMG_LACTLO_REG(i) register * LACT low register */ -#define TIMG_LACTLO_REG (DR_REG_TIMG_BASE + 0x78) +#define TIMG_LACTLO_REG(i) (REG_TIMG_BASE(i) + 0x78) /* TIMG_LACT_LO : RO; bitpos: [31:0]; default: 0; * Reserved @@ -924,11 +853,11 @@ #define TIMG_LACT_LO_V 0xFFFFFFFF #define TIMG_LACT_LO_S 0 -/* TIMG_LACTHI_REG register +/* TIMG_LACTHI_REG(i) register * LACT high register */ -#define TIMG_LACTHI_REG (DR_REG_TIMG_BASE + 0x7c) +#define TIMG_LACTHI_REG(i) (REG_TIMG_BASE(i) + 0x7c) /* TIMG_LACT_HI : RO; bitpos: [31:0]; default: 0; * Reserved @@ -939,11 +868,11 @@ #define TIMG_LACT_HI_V 0xFFFFFFFF #define TIMG_LACT_HI_S 0 -/* TIMG_LACTUPDATE_REG register +/* TIMG_LACTUPDATE_REG(i) register * LACT update register */ -#define TIMG_LACTUPDATE_REG (DR_REG_TIMG_BASE + 0x80) +#define TIMG_LACTUPDATE_REG(i) (REG_TIMG_BASE(i) + 0x80) /* TIMG_LACT_UPDATE : WO; bitpos: [31:0]; default: 0; * Reserved @@ -954,11 +883,11 @@ #define TIMG_LACT_UPDATE_V 0xFFFFFFFF #define TIMG_LACT_UPDATE_S 0 -/* TIMG_LACTALARMLO_REG register +/* TIMG_LACTALARMLO_REG(i) register * LACT alarm low register */ -#define TIMG_LACTALARMLO_REG (DR_REG_TIMG_BASE + 0x84) +#define TIMG_LACTALARMLO_REG(i) (REG_TIMG_BASE(i) + 0x84) /* TIMG_LACT_ALARM_LO : R/W; bitpos: [31:0]; default: 0; * Reserved @@ -969,11 +898,11 @@ #define TIMG_LACT_ALARM_LO_V 0xFFFFFFFF #define TIMG_LACT_ALARM_LO_S 0 -/* TIMG_LACTALARMHI_REG register +/* TIMG_LACTALARMHI_REG(i) register * LACT alarm high register */ -#define TIMG_LACTALARMHI_REG (DR_REG_TIMG_BASE + 0x88) +#define TIMG_LACTALARMHI_REG(i) (REG_TIMG_BASE(i) + 0x88) /* TIMG_LACT_ALARM_HI : R/W; bitpos: [31:0]; default: 0; * Reserved @@ -984,11 +913,11 @@ #define TIMG_LACT_ALARM_HI_V 0xFFFFFFFF #define TIMG_LACT_ALARM_HI_S 0 -/* TIMG_LACTLOADLO_REG register +/* TIMG_LACTLOADLO_REG(i) register * LACT load low register */ -#define TIMG_LACTLOADLO_REG (DR_REG_TIMG_BASE + 0x8c) +#define TIMG_LACTLOADLO_REG(i) (REG_TIMG_BASE(i) + 0x8c) /* TIMG_LACT_LOAD_LO : R/W; bitpos: [31:0]; default: 0; * Reserved @@ -999,11 +928,11 @@ #define TIMG_LACT_LOAD_LO_V 0xFFFFFFFF #define TIMG_LACT_LOAD_LO_S 0 -/* TIMG_LACTLOADHI_REG register +/* TIMG_LACTLOADHI_REG(i) register * Timer LACT load high register */ -#define TIMG_LACTLOADHI_REG (DR_REG_TIMG_BASE + 0x90) +#define TIMG_LACTLOADHI_REG(i) (REG_TIMG_BASE(i) + 0x90) /* TIMG_LACT_LOAD_HI : R/W; bitpos: [31:0]; default: 0; * Reserved @@ -1014,11 +943,11 @@ #define TIMG_LACT_LOAD_HI_V 0xFFFFFFFF #define TIMG_LACT_LOAD_HI_S 0 -/* TIMG_LACTLOAD_REG register +/* TIMG_LACTLOAD_REG(i) register * Timer LACT load register */ -#define TIMG_LACTLOAD_REG (DR_REG_TIMG_BASE + 0x94) +#define TIMG_LACTLOAD_REG(i) (REG_TIMG_BASE(i) + 0x94) /* TIMG_LACT_LOAD : WO; bitpos: [31:0]; default: 0; * Reserved @@ -1029,11 +958,11 @@ #define TIMG_LACT_LOAD_V 0xFFFFFFFF #define TIMG_LACT_LOAD_S 0 -/* TIMG_INT_ENA_TIMERS_REG register +/* TIMG_INT_ENA_TIMERS_REG(i) register * Interrupt enable bits */ -#define TIMG_INT_ENA_TIMERS_REG (DR_REG_TIMG_BASE + 0x98) +#define TIMG_INT_ENA_TIMERS_REG(i) (REG_TIMG_BASE(i) + 0x98) /* TIMG_LACT_INT_ENA : R/W; bitpos: [3]; default: 0; * The interrupt enable bit for the TIMG_LACT_INT interrupt. @@ -1071,11 +1000,11 @@ #define TIMG_T0_INT_ENA_V 0x00000001 #define TIMG_T0_INT_ENA_S 0 -/* TIMG_INT_RAW_TIMERS_REG register +/* TIMG_INT_RAW_TIMERS_REG(i) register * Raw interrupt status */ -#define TIMG_INT_RAW_TIMERS_REG (DR_REG_TIMG_BASE + 0x9c) +#define TIMG_INT_RAW_TIMERS_REG(i) (REG_TIMG_BASE(i) + 0x9c) /* TIMG_LACT_INT_RAW : RO; bitpos: [3]; default: 0; * The raw interrupt status bit for the TIMG_LACT_INT interrupt. @@ -1113,11 +1042,11 @@ #define TIMG_T0_INT_RAW_V 0x00000001 #define TIMG_T0_INT_RAW_S 0 -/* TIMG_INT_ST_TIMERS_REG register +/* TIMG_INT_ST_TIMERS_REG(i) register * Masked interrupt status */ -#define TIMG_INT_ST_TIMERS_REG (DR_REG_TIMG_BASE + 0xa0) +#define TIMG_INT_ST_TIMERS_REG(i) (REG_TIMG_BASE(i) + 0xa0) /* TIMG_LACT_INT_ST : RO; bitpos: [3]; default: 0; * The masked interrupt status bit for the TIMG_LACT_INT interrupt. @@ -1155,11 +1084,11 @@ #define TIMG_T0_INT_ST_V 0x00000001 #define TIMG_T0_INT_ST_S 0 -/* TIMG_INT_CLR_TIMERS_REG register +/* TIMG_INT_CLR_TIMERS_REG(i) register * Interrupt clear bits */ -#define TIMG_INT_CLR_TIMERS_REG (DR_REG_TIMG_BASE + 0xa4) +#define TIMG_INT_CLR_TIMERS_REG(i) (REG_TIMG_BASE(i) + 0xa4) /* TIMG_LACT_INT_CLR : WO; bitpos: [3]; default: 0; * Set this bit to clear the TIMG_LACT_INT interrupt. @@ -1197,11 +1126,11 @@ #define TIMG_T0_INT_CLR_V 0x00000001 #define TIMG_T0_INT_CLR_S 0 -/* TIMG_RTCCALICFG2_REG register +/* TIMG_RTCCALICFG2_REG(i) register * Timer group calibration register */ -#define TIMG_RTCCALICFG2_REG (DR_REG_TIMG_BASE + 0xa8) +#define TIMG_RTCCALICFG2_REG(i) (REG_TIMG_BASE(i) + 0xa8) /* TIMG_RTC_CALI_TIMEOUT_THRES : R/W; bitpos: [31:7]; default: 33554431; * Threshold value for the RTC calibration timer. If the calibration timer's @@ -1231,11 +1160,11 @@ #define TIMG_RTC_CALI_TIMEOUT_V 0x00000001 #define TIMG_RTC_CALI_TIMEOUT_S 0 -/* TIMG_TIMERS_DATE_REG register +/* TIMG_TIMERS_DATE_REG(i) register * Version control register */ -#define TIMG_TIMERS_DATE_REG (DR_REG_TIMG_BASE + 0xf8) +#define TIMG_TIMERS_DATE_REG(i) (REG_TIMG_BASE(i) + 0xf8) /* TIMG_TIMERS_DATE : R/W; bitpos: [27:0]; default: 26243681; * Version control register. @@ -1246,11 +1175,11 @@ #define TIMG_TIMERS_DATE_V 0x0FFFFFFF #define TIMG_TIMERS_DATE_S 0 -/* TIMG_REGCLK_REG register +/* TIMG_REG(i)CLK_REG(i) register * Timer group clock gate register */ -#define TIMG_REGCLK_REG (DR_REG_TIMG_BASE + 0xfc) +#define TIMG_REG(i)CLK_REG(i) (REG_TIMG_BASE(i) + 0xfc) /* TIMG_CLK_EN : R/W; bitpos: [31]; default: 0; * Register clock gate signal. 1: Registers can be read and written to by diff --git a/arch/xtensa/src/lx7/Toolchain.defs b/arch/xtensa/src/lx7/Toolchain.defs index 1c1bab48d07..1c39d64128c 100644 --- a/arch/xtensa/src/lx7/Toolchain.defs +++ b/arch/xtensa/src/lx7/Toolchain.defs @@ -39,7 +39,7 @@ ifeq ($(CONFIG_XTENSA_TOOLCHAIN_XCLANG), y) endif ifeq ($(CONFIG_XTENSA_TOOLCHAIN_ESP), y) - CROSSDEV = xtensa-esp32-elf- + CROSSDEV = xtensa-esp32s2-elf- endif ARCHCPUFLAGS = diff --git a/arch/z16/src/Makefile b/arch/z16/src/Makefile index 0e8286cecd9..10c89d9f4a1 100644 --- a/arch/z16/src/Makefile +++ b/arch/z16/src/Makefile @@ -19,7 +19,7 @@ ############################################################################ include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs COMPILER = ${shell basename "$(CC)"} ARCHSRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src @@ -140,8 +140,6 @@ depend: .depend context:: -clean_context:: - clean: ifeq ($(CONFIG_WINDOWS_NATIVE),y) $(Q) if exist board$(DELIM)Makefile ( $(MAKE) -C board clean ) @@ -159,7 +157,7 @@ endif $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean ifeq ($(CONFIG_WINDOWS_NATIVE),y) $(Q) if exist board$(DELIM)Makefile ( $(MAKE) -C board distclean ) else diff --git a/arch/z16/src/common/z16_reprioritizertr.c b/arch/z16/src/common/z16_reprioritizertr.c index c688493d741..15a9124b7ad 100644 --- a/arch/z16/src/common/z16_reprioritizertr.c +++ b/arch/z16/src/common/z16_reprioritizertr.c @@ -52,8 +52,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -111,7 +110,6 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/z80/src/Makefile b/arch/z80/src/Makefile index 270233b3c9a..b99edba0e25 100644 --- a/arch/z80/src/Makefile +++ b/arch/z80/src/Makefile @@ -21,7 +21,7 @@ # Makefile fragments include $(TOPDIR)/Make.defs --include chip/Make.defs +include chip/Make.defs # Compiler-Dependent Make: SDCC, Clang, or ZiLOG ZDS-II diff --git a/arch/z80/src/Makefile.clang b/arch/z80/src/Makefile.clang index 93d8d918890..5a8893cc202 100644 --- a/arch/z80/src/Makefile.clang +++ b/arch/z80/src/Makefile.clang @@ -90,7 +90,7 @@ NUTTX = "$(TOPDIR)$(DELIM)nuttx$(EXEEXT)" nuttx$(EXEEXT): $(HEAD_OBJ) board$(DELIM)libboard$(LIBEXT) $(LINKCMD) $(Q) echo "LD: nuttx into $(NUTTX)" $(Q) "$(LD)" -o $(NUTTX) $(HEAD_OBJ) -T $(LINKCMD) --orphan-handling=error --print-memory-usage \ - $(LIBPATHS) "-(" $(LDLIBS) "-)" $(LDFLAGS) -Wl,-Map="$(TOPDIR)$(DELIM)nuttx.map" + $(LIBPATHS) "-(" $(LDLIBS) "-)" $(LDFLAGS) -Map="$(TOPDIR)$(DELIM)nuttx.map" .depend: Makefile chip$(DELIM)Make.defs $(DEPSRCS) $(TOPDIR)$(DELIM).config $(Q) if [ -e board$(DELIM)Makefile ]; then \ @@ -115,8 +115,6 @@ depend: .depend context:: -clean_context:: - clean: $(Q) if [ -e board$(DELIM)Makefile ]; then \ $(MAKE) -C board clean ; \ @@ -125,7 +123,7 @@ clean: $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean $(Q) if [ -e board$(DELIM)Makefile ]; then \ $(MAKE) -C board distclean ; \ fi diff --git a/arch/z80/src/Makefile.sdccl b/arch/z80/src/Makefile.sdccl index d8fa0201cb3..07c4bc4266b 100644 --- a/arch/z80/src/Makefile.sdccl +++ b/arch/z80/src/Makefile.sdccl @@ -203,8 +203,6 @@ depend: .depend context:: -clean_context:: - clean: $(Q) if [ -e board/Makefile ]; then \ $(MAKE) -C board clean ; \ @@ -214,7 +212,7 @@ clean: $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean $(Q) if [ -e board/Makefile ]; then \ $(MAKE) -C board distclean ; \ fi diff --git a/arch/z80/src/Makefile.sdccw b/arch/z80/src/Makefile.sdccw index f864ae6fb1c..f8a48a66b8f 100644 --- a/arch/z80/src/Makefile.sdccw +++ b/arch/z80/src/Makefile.sdccw @@ -195,8 +195,6 @@ depend: .depend context:: -clean_context:: - clean: $(Q) if exist board\Makefile ( $(MAKE) -C board clean ) $(call DELFILE, asm_mem.h) @@ -204,7 +202,7 @@ clean: $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean $(Q) if exist board\Makefile ( $(MAKE) -C board distclean ) $(call DELFILE, Make.dep) $(call DELFILE, .depend) diff --git a/arch/z80/src/Makefile.zdsiil b/arch/z80/src/Makefile.zdsiil index 73fe8013184..9e9bb4e7c39 100644 --- a/arch/z80/src/Makefile.zdsiil +++ b/arch/z80/src/Makefile.zdsiil @@ -144,8 +144,6 @@ depend: .depend context:: -clean_context:: - clean: $(Q) if [ -e board$(DELIM)Makefile ]; then \ $(MAKE) -C board clean ; \ @@ -157,7 +155,7 @@ clean: $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean $(Q) if [ -e board$(DELIM)Makefile ]; then \ $(MAKE) -C board distclean ; \ fi diff --git a/arch/z80/src/Makefile.zdsiiw b/arch/z80/src/Makefile.zdsiiw index 7a2d8e72340..4492544c9d4 100644 --- a/arch/z80/src/Makefile.zdsiiw +++ b/arch/z80/src/Makefile.zdsiiw @@ -126,8 +126,6 @@ depend: .depend context:: -clean_context:: - clean: $(Q) if exist board$(DELIM)Makefile ( $(MAKE) -C board clean ) $(call DELFILE, nuttx.linkcmd) @@ -137,7 +135,7 @@ clean: $(call DELFILE, libarch$(LIBEXT)) $(call CLEAN) -distclean: clean +distclean:: clean $(Q) if exist board$(DELIM)Makefile ( $(MAKE) -C board distclean ) $(call DELFILE, Make.dep) $(call DELFILE, .depend) diff --git a/arch/z80/src/common/z80_reprioritizertr.c b/arch/z80/src/common/z80_reprioritizertr.c index fe8ba0e8452..5ceb2ca57d1 100644 --- a/arch/z80/src/common/z80_reprioritizertr.c +++ b/arch/z80/src/common/z80_reprioritizertr.c @@ -54,8 +54,7 @@ * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * Input Parameters: * tcb: The TCB of the task that has been reprioritized @@ -113,7 +112,6 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority) { /* If we are going to do a context switch, then now is the right * time to add any pending tasks back into the ready-to-run list. - * task list now */ if (g_pendingtasks.head) diff --git a/arch/z80/src/ez80/Toolchain.defs b/arch/z80/src/ez80/Toolchain.defs index eedd6d4dcd1..f546288575a 100644 --- a/arch/z80/src/ez80/Toolchain.defs +++ b/arch/z80/src/ez80/Toolchain.defs @@ -64,7 +64,7 @@ ARCHASMINCLUDES = -include chip/clang-compat.asm ARCHASMLIST = ARCHASMWARNINGS = -W -LDFLAGS += -Wl,-gc-sections +LDFLAGS += -gc-sections # Tool names/paths. @@ -72,7 +72,7 @@ CROSSDEV = ez80-none-elf- CC = $(CROSSDEV)clang CPP = $(CC) -E -P -x c STRIP = $(CROSSDEV)strip --strip-unneeded -LD = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld AS = $(CROSSDEV)as AR = $(CROSSDEV)ar -r OBJCOPY= $(CROSSDEV)objcopy diff --git a/arch/z80/src/z180/Make.defs b/arch/z80/src/z180/Make.defs index 6e49d093101..e7045734e41 100644 --- a/arch/z80/src/z180/Make.defs +++ b/arch/z80/src/z180/Make.defs @@ -30,7 +30,7 @@ CMN_CSRCS = z80_allocateheap.c z80_assert.c z80_blocktask.c z80_createstack.c CMN_CSRCS += z80_doirq.c z80_exit.c z80_idle.c z80_initialize.c CMN_CSRCS += z80_interruptcontext.c z80_mdelay.c z80_releasepending.c CMN_CSRCS += z80_releasestack.c z80_stackframe.c z80_reprioritizertr.c -CMN_CSRCS += z80_unblocktask.c z80_udelay.c z80_usestack.c +CMN_CSRCS += z80_unblocktask.c z80_udelay.c z80_usestack.c z80_puts.c CHIP_ASRCS = z180_restoreusercontext.asm z180_saveusercontext.asm CHIP_ASRCS += z180_vectcommon.asm diff --git a/arch/z80/src/z8/Make.defs b/arch/z80/src/z8/Make.defs index de17c55c986..7fa8e49f21f 100644 --- a/arch/z80/src/z8/Make.defs +++ b/arch/z80/src/z8/Make.defs @@ -25,6 +25,7 @@ CMN_CSRCS += z80_releasestack.c z80_interruptcontext.c z80_blocktask.c CMN_CSRCS += z80_unblocktask.c z80_exit.c z80_releasepending.c CMN_CSRCS += z80_reprioritizertr.c z80_idle.c z80_assert.c z80_doirq.c CMN_CSRCS += z80_mdelay.c z80_stackframe.c z80_udelay.c z80_usestack.c +CMN_CSRCS += z80_puts.c CHIP_SSRCS = z8_vector.S z8_saveusercontext.S z8_restorecontext.S CHIP_CSRCS = z8_initialstate.c z8_irq.c z8_saveirqcontext.c diff --git a/boards/Kconfig b/boards/Kconfig index 76524b6599e..d04a65b0fa5 100644 --- a/boards/Kconfig +++ b/boards/Kconfig @@ -249,6 +249,18 @@ config ARCH_BOARD_ESP32_WROVERKIT LCD screen MicroSD card slot +config ARCH_BOARD_TTGO_LORA_ESP32 + bool "TTGO LoRa SX1276 ESP32" + depends on ARCH_CHIP_ESP32WROOM32 + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS if ESP32_GPIO_IRQ + ---help--- + TTGO-LoRa-SX1276-ESP32 is an ESP32 board with LoRa. Usually it + comes with an OLED display, but there are options without + display. This port is for board version 1.0, more info: + https://github.com/Xinyuan-LilyGO/TTGO-LoRa-Series + config ARCH_BOARD_ESP32C3_DEVKIT bool "Espressif ESP32-C3 DevKit" depends on ARCH_CHIP_ESP32C3MINI1 || ARCH_CHIP_ESP32C3WROOM02 @@ -306,6 +318,17 @@ config ARCH_BOARD_FIRE_STM32 and 3 of the boards are supported but only version 2 has been tested. +config ARCH_BOARD_CHIPKIT_WIFIRE + bool "chipKIT Wi-FIRE" + depends on ARCH_CHIP_PIC32MZ2048EFG + select ARCH_HAVE_LEDS + select ARCH_HAVE_BUTTONS + select ARCH_HAVE_IRQBUTTONS + ---help--- + This options selects the chipKIT Wi-FIRE board. This + board is a chipKIT Arduino-compatible board. This board + features the Microchip PIC32MZ2048EFG100 MCU running at 200 MHz. + config ARCH_BOARD_FLIPNCLICK_PIC32MZ bool "Mikroe Flip&Click PIC32MZ" depends on ARCH_CHIP_PIC32MZ2048EFH @@ -1432,24 +1455,14 @@ config ARCH_BOARD_S32K144EVB This options selects support for NuttX on the NXP S32K144EVB board featuring the S32K144 Cortex-M4F. -config ARCH_BOARD_RDDRONE_UAVCAN144 - bool "NXP RDDRONE-UAVCAN144" - depends on ARCH_CHIP_S32K144 - select ARCH_HAVE_LEDS - select ARCH_HAVE_BUTTONS - select ARCH_HAVE_IRQBUTTONS - ---help--- - This options selects support for NuttX on the NXP RDDRONE-UAVCAN board - featuring the S32K144 Cortex-M4F. - -config ARCH_BOARD_RDDRONE_UAVCAN146 - bool "NXP RDDRONE-UAVCAN146" +config ARCH_BOARD_UCANS32K146 + bool "NXP UCANS32K146" depends on ARCH_CHIP_S32K146 select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS ---help--- - This options selects support for NuttX on the NXP RDDRONE-UAVCAN board + This options selects support for NuttX on the NXP UCANS32K board featuring the S32K146 Cortex-M4F. config ARCH_BOARD_S32K146EVB @@ -1692,7 +1705,7 @@ config ARCH_BOARD_STM32_BUTTERFLY2 select ARCH_HAVE_BUTTONS ---help--- A configuration for the Kamami STM32Butterfly2 development board - based on STM32F107VC micro-controler chip with optional ETH + based on STM32F107VC micro-controller chip with optional ETH board. See https://kamami.pl/zestawy-uruchomieniowe-stm32/178507-stm32butterfly2.html @@ -2340,6 +2353,7 @@ config ARCH_BOARD default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG default "ez80f910200zco" if ARCH_BOARD_EZ80F910200ZCO default "fire-stm32v2" if ARCH_BOARD_FIRE_STM32 + default "chipkit-wifire" if ARCH_BOARD_CHIPKIT_WIFIRE default "flipnclick-pic32mz" if ARCH_BOARD_FLIPNCLICK_PIC32MZ default "flipnclick-sam3x" if ARCH_BOARD_FLIPNCLICK_SAM3X default "freedom-k28f" if ARCH_BOARD_FREEDOM_K28F @@ -2450,8 +2464,7 @@ config ARCH_BOARD default "rx65n-grrose" if ARCH_BOARD_RX65N_GRROSE default "s32k118evb" if ARCH_BOARD_S32K118EVB default "s32k144evb" if ARCH_BOARD_S32K144EVB - default "rddrone-uavcan144" if ARCH_BOARD_RDDRONE_UAVCAN144 - default "rddrone-uavcan146" if ARCH_BOARD_RDDRONE_UAVCAN146 + default "ucans32k146" if ARCH_BOARD_UCANS32K146 default "rv32m1-vega" if ARCH_BOARD_RV32M1_VEGA default "s32k146evb" if ARCH_BOARD_S32K146EVB default "s32k148evb" if ARCH_BOARD_S32K148EVB @@ -2516,6 +2529,7 @@ config ARCH_BOARD default "tm4c123g-launchpad" if ARCH_BOARD_TM4C123G_LAUNCHPAD default "tm4c1294-launchpad" if ARCH_BOARD_TM4C1294_LAUNCHPAD default "tms570ls31x-usb-kit" if ARCH_BOARD_TMS570LS31X_USB_KIT + default "ttgo_lora_esp32" if ARCH_BOARD_TTGO_LORA_ESP32 default "twr-k60n512" if ARCH_BOARD_TWR_K60N512 default "twr-k64f120m" if ARCH_BOARD_TWR_K64F120M default "u-blox-c027" if ARCH_BOARD_U_BLOX_C027 @@ -2609,11 +2623,8 @@ endif if ARCH_BOARD_S32K144EVB source "boards/arm/s32k1xx/s32k144evb/Kconfig" endif -if ARCH_BOARD_RDDRONE_UAVCAN144 -source "boards/arm/s32k1xx/rddrone-uavcan144/Kconfig" -endif -if ARCH_BOARD_RDDRONE_UAVCAN146 -source "boards/arm/s32k1xx/rddrone-uavcan146/Kconfig" +if ARCH_BOARD_UCANS32K146 +source "boards/arm/s32k1xx/ucans32k146/Kconfig" endif if ARCH_BOARD_S32K146EVB source "boards/arm/s32k1xx/s32k146evb/Kconfig" @@ -3152,6 +3163,9 @@ endif if ARCH_BOARD_UBW32 source "boards/mips/pic32mx/ubw32/Kconfig" endif +if ARCH_BOARD_CHIPKIT_WIFIRE +source "boards/mips/pic32mz/chipkit-wifire/Kconfig" +endif if ARCH_BOARD_FLIPNCLICK_PIC32MZ source "boards/mips/pic32mz/flipnclick-pic32mz/Kconfig" endif @@ -3191,6 +3205,9 @@ endif if ARCH_BOARD_ESP32C3_DEVKIT source "boards/risc-v/esp32c3/esp32c3-devkit/Kconfig" endif +if ARCH_CHIP_ESP32S2 && !ARCH_BOARD_CUSTOM +source "boards/xtensa/esp32s2/common/Kconfig" +endif if ARCH_BOARD_ESP32S2_SAOLA_1 source "boards/xtensa/esp32s2/esp32s2-saola-1/Kconfig" endif @@ -3227,6 +3244,9 @@ endif if ARCH_BOARD_ESP32_WROVERKIT source "boards/xtensa/esp32/esp32-wrover-kit/Kconfig" endif +if ARCH_BOARD_TTGO_LORA_ESP32 +source "boards/xtensa/esp32/ttgo_lora_esp32/Kconfig" +endif if ARCH_BOARD_Z16F2800100ZCOG source "boards/z16/z16f/z16f2800100zcog/Kconfig" endif @@ -3399,6 +3419,17 @@ config BOARDCTL_SWITCH_BOOT once a firmware updated successfully, this boardctl can be used to modify FLASH bank selection. +config BOARDCTL_BOOT_IMAGE + bool "Boot a new application firmware image" + default n + ---help--- + Boot a new application firmware image. + Architecture-specific logic must provide the board_boot_image() + interface for executing the required actions for booting a new + application firmware image (e.g. deinitialize peripherals, load the + Program Counter register with the application firmware image entry + point address). + config BOARDCTL_MKRD bool "Enable application space creation of RAM disks" default n diff --git a/boards/README.txt b/boards/README.txt index aa571000f6e..015ee905f8f 100644 --- a/boards/README.txt +++ b/boards/README.txt @@ -292,6 +292,11 @@ boards/mips/pic32mz/flipnclick-pic32mz standard Arduino connectors. This board features the Microchip PIC32MZ2048EFH100 MCU running at 200 MHz (252 MHz capable). +boards/mips/pic32mz/chipkit-wifire + Board support for the chipKIT Wi-FIRE board. This board is a chipKIT + Arduino-compatible board. This board features + the Microchip PIC32MZ2048EFG100 MCU running at 200 MHz. + boards/arm/sam34/flipnclick-sam3x Board support for the Mikroe Flip&Click STM32X board. This board is an Arduino-Due work-alike with four Mikroe Click bus interfaces. Like the diff --git a/boards/arm/a1x/pcduino-a10/scripts/Make.defs b/boards/arm/a1x/pcduino-a10/scripts/Make.defs index 487a6447643..75b2550d557 100644 --- a/boards/arm/a1x/pcduino-a10/scripts/Make.defs +++ b/boards/arm/a1x/pcduino-a10/scripts/Make.defs @@ -52,13 +52,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/am335x/beaglebone-black/scripts/Make.defs b/boards/arm/am335x/beaglebone-black/scripts/Make.defs index 59475a7539d..0219e39d9cc 100644 --- a/boards/arm/am335x/beaglebone-black/scripts/Make.defs +++ b/boards/arm/am335x/beaglebone-black/scripts/Make.defs @@ -70,13 +70,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/c5471/c5471evm/scripts/Make.defs b/boards/arm/c5471/c5471evm/scripts/Make.defs index bbbd85dd142..55e52aceed9 100644 --- a/boards/arm/c5471/c5471evm/scripts/Make.defs +++ b/boards/arm/c5471/c5471evm/scripts/Make.defs @@ -74,15 +74,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common +NXFLATLDFLAGS1 = -r -d -warn-common NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ - -Wl,-no-check-sections + -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_FEATURES),y) LDFLAGS += -g endif diff --git a/boards/arm/cxd56xx/common/src/cxd56_imageproc.c b/boards/arm/cxd56xx/common/src/cxd56_imageproc.c index 72a1112982b..abafe482a8d 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_imageproc.c +++ b/boards/arm/cxd56xx/common/src/cxd56_imageproc.c @@ -136,7 +136,7 @@ /* Copy command (32 bytes) */ -struct __attribute__ ((aligned(16))) ge2d_copycmd_s +struct aligned_data(16) ge2d_copycmd_s { uint32_t cmd; /* 0x00 */ uint16_t srch; /* 0x04 */ @@ -150,7 +150,7 @@ struct __attribute__ ((aligned(16))) ge2d_copycmd_s /* Raster operation (ROP) command (48 bytes) */ -struct __attribute__ ((aligned(16))) ge2d_ropcmd_s +struct aligned_data(16) ge2d_ropcmd_s { uint16_t cmd; /* 0x00 */ uint8_t rop; /* 0x02 */ @@ -183,7 +183,7 @@ struct __attribute__ ((aligned(16))) ge2d_ropcmd_s /* Alpha blending (AB) command (32 bytes) */ -struct __attribute__ ((aligned(16))) ge2d_abcmd_s +struct aligned_data(16) ge2d_abcmd_s { uint16_t cmd; /* 0x00 */ uint16_t mode; /* 0x02 */ @@ -210,7 +210,7 @@ static sem_t g_geexc; static sem_t g_abexc; static struct file g_gfile; -static char g_gcmdbuf[256] __attribute__ ((aligned(16))); +static char g_gcmdbuf[256] aligned_data(16); /**************************************************************************** * Private Functions diff --git a/boards/arm/cxd56xx/common/src/cxd56_isx012.c b/boards/arm/cxd56xx/common/src/cxd56_isx012.c index a36d9bc28c8..f8f5f7c0e52 100644 --- a/boards/arm/cxd56xx/common/src/cxd56_isx012.c +++ b/boards/arm/cxd56xx/common/src/cxd56_isx012.c @@ -184,10 +184,10 @@ int board_isx012_initialize(int i2c_bus_num) return -ENODEV; } - ret = isx012_register(i2c); + ret = isx012_initialize(i2c); if (ret < 0) { - _err("Error registering ISX012.\n"); + _err("Failed to initialize ISX012.\n"); } return ret; @@ -201,10 +201,10 @@ int board_isx012_uninitialize(void) /* Initialize i2c device */ - ret = isx012_unregister(); + ret = isx012_uninitialize(); if (ret < 0) { - _err("Error unregistering ISX012.\n"); + _err("Failed to uninitialize ISX012.\n"); } if (!i2c) diff --git a/boards/arm/cxd56xx/drivers/Kconfig b/boards/arm/cxd56xx/drivers/Kconfig index 0c9ede04720..d336be81027 100644 --- a/boards/arm/cxd56xx/drivers/Kconfig +++ b/boards/arm/cxd56xx/drivers/Kconfig @@ -6,5 +6,4 @@ if SPECIFIC_DRIVERS source "drivers/platform/audio/Kconfig" source "drivers/platform/sensors/Kconfig" -source "drivers/platform/camera/Kconfig" endif diff --git a/boards/arm/cxd56xx/drivers/Make.defs b/boards/arm/cxd56xx/drivers/Make.defs index 16578f9850d..39073bd44bf 100644 --- a/boards/arm/cxd56xx/drivers/Make.defs +++ b/boards/arm/cxd56xx/drivers/Make.defs @@ -20,4 +20,3 @@ include platform/audio/Make.defs include platform/sensors/Make.defs -include platform/camera/Make.defs diff --git a/boards/arm/cxd56xx/drivers/camera/Kconfig b/boards/arm/cxd56xx/drivers/camera/Kconfig deleted file mode 100644 index fc563dfd509..00000000000 --- a/boards/arm/cxd56xx/drivers/camera/Kconfig +++ /dev/null @@ -1,9 +0,0 @@ -# -# For a description of the syntax of this configuration file, -# see the file kconfig-language.txt in the NuttX tools repository. -# - -config VIDEO_ISX012 - bool "ISX012 Image sensor" - default n - select I2C diff --git a/boards/arm/cxd56xx/drivers/camera/isx012.c b/boards/arm/cxd56xx/drivers/camera/isx012.c deleted file mode 100644 index bbda6d3cf8c..00000000000 --- a/boards/arm/cxd56xx/drivers/camera/isx012.c +++ /dev/null @@ -1,3869 +0,0 @@ -/**************************************************************************** - * boards/arm/cxd56xx/drivers/camera/isx012.c - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* The following macro is enabled because - * it is to make stable startup. (other case) - */ - -/* #define ISX012_NOT_USE_NSTBY */ - -/* The following macro is disabled because it is to see detailed control. */ - -/* #define ISX012_CHECK_IN_DETAIL */ - -/* Skip invalid frame because it occurs first due to the spec of isx012. */ - -#define ISX012_FRAME_SKIP_EN - -#define OUT_HSIZE_QVGA (320) -#define OUT_VSIZE_QVGA (240) -#define OUT_HSIZE_VGA (640) -#define OUT_VSIZE_VGA (480) -#define OUT_HSIZE_HD (1280) -#define OUT_VSIZE_HD (720) -#define OUT_HSIZE_QUADVGA (1280) -#define OUT_VSIZE_QUADVGA (960) -#define OUT_HSIZE_FULLHD (1920) -#define OUT_VSIZE_FULLHD (1080) -#define OUT_HSIZE_3M (2048) -#define OUT_VSIZE_3M (1536) -#define OUT_HSIZE_5M (2560) -#define OUT_VSIZE_5M (1920) - -#define OUT_YUV_VSIZE_MIN (64) -#define OUT_YUV_HSIZE_MIN (96) -#define OUT_JPG_VSIZE_MIN (64) -#define OUT_JPG_HSIZE_MIN (96) -#define OUT_YUV_15FPS_VSIZE_MAX (360) -#define OUT_YUV_15FPS_HSIZE_MAX (480) -#define OUT_YUV_30FPS_VSIZE_MAX (360) -#define OUT_YUV_30FPS_HSIZE_MAX (480) -#define OUT_YUV_60FPS_VSIZE_MAX (360) -#define OUT_YUV_60FPS_HSIZE_MAX (480) -#define OUT_YUV_120FPS_VSIZE_MAX (240) -#define OUT_YUV_120FPS_HSIZE_MAX (320) -#define OUT_JPG_15FPS_VSIZE_MAX (1944) -#define OUT_JPG_15FPS_HSIZE_MAX (2592) -#define OUT_JPG_30FPS_VSIZE_MAX (960) -#define OUT_JPG_30FPS_HSIZE_MAX (1280) -#define OUT_JPG_60FPS_VSIZE_MAX (480) -#define OUT_JPG_60FPS_HSIZE_MAX (640) -#define OUT_JPG_120FPS_VSIZE_MAX (240) -#define OUT_JPG_120FPS_HSIZE_MAX (320) - -#define OUT_YUVINT_30FPS_VSIZE_MAX (240) -#define OUT_YUVINT_30FPS_HSIZE_MAX (400) -#define OUT_JPGINT_30FPS_VSIZE_MAX (960) -#define OUT_JPGINT_30FPS_HSIZE_MAX (1280) -#define OUT_JPGINT_15FPS_VSIZE_MAX (1224) -#define OUT_JPGINT_15FPS_HSIZE_MAX (1632) - -#define VINT_TIMEOUT (400) /* ms */ -#define VINT_WAIT_TIME (5) /* ms */ -#define VINT_DELAY_TIME (0) /* ms */ -#define CAMERA_MODE_TIMEOUT (800) /* ms */ -#define CAMERA_MODE_WAIT_TIME (10) /* ms */ -#define CAMERA_MODE_DELAY_TIME (0) /* ms */ -#define DEVICE_STATE_TIMEOUT (100) /* ms */ -#define DEVICE_STATE_WAIT_TIME (1) /* ms */ -#define DEVICE_STATE_DELAY_TIME (2) /* ms */ - -#define I2CFREQ_STANDARD (100000) /* Standard mode : 100kHz */ -#define I2CFREQ_FAST (400000) /* Fast mode : 400kHz */ - -#define ISX012_SIZE_STEP (2) - -#define CXC_RGB_DATA_UNIT_NUM (27) -#define CXC_RGB_DATA_UNIT_SIZE (7) -#define CXC_GRB_DATA_UNIT_NUM (27) -#define CXC_GRB_DATA_UNIT_SIZE (7) -#define SHD_RGB_DATA_UNIT_NUM (27) -#define SHD_RGB_DATA_UNIT_SIZE (11) -#define SHD_GRB_DATA_UNIT_NUM (27) -#define SHD_GRB_DATA_UNIT_SIZE (11) -#define SHD_R1_DATA_UNIT_NUM (14) -#define SHD_R1_DATA_UNIT_SIZE (11) -#define SHD_R2_DATA_UNIT_NUM (14) -#define SHD_R2_DATA_UNIT_SIZE (11) -#define SHD_B2_DATA_UNIT_NUM (14) -#define SHD_B2_DATA_UNIT_SIZE (11) - -#ifdef CONFIG_DEBUG_IMAGER_ERROR -#define imagererr(format, ...) _err(format, ##__VA_ARGS__) -#else -#define imagererr(x...) -#endif - -#ifdef CONFIG_DEBUG_IMAGER_WARN -#define imagerwarn(format, ...) _warn(format, ##__VA_ARGS__) -#else -#define imagerwarn(x...) -#endif - -#ifdef CONFIG_DEBUG_IMAGER_INFO -#define imagerinfo(format, ...) _info(format, ##__VA_ARGS__) -#else -#define imagerinfo(x...) -#endif - -#define CHECK_RANGE(value,min,max,step) do { \ - if ((value < min) || \ - (value > max) || \ - ((value - min) % step != 0)) \ - { \ - return -EINVAL;\ - } \ - } while (0) - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -enum isx012_state_e -{ - STATE_ISX012_PRESLEEP, - STATE_ISX012_SLEEP, - STATE_ISX012_ACTIVE, - STATE_ISX012_POWEROFF, -}; - -typedef enum isx012_state_e isx012_state_t; - -struct isx012_reg_s -{ - uint16_t regaddr; - uint16_t regval; - uint8_t regsize; -}; - -typedef struct isx012_reg_s isx012_reg_t; - -struct isx012_conv_v4l2_to_regval_s -{ - int32_t v4l2; - int16_t regval; -}; - -typedef struct isx012_conv_v4l2_to_regval_s isx012_conv_v4l2_to_regval_t; - -struct isx012_modeparam_s -{ - uint8_t fps; /* use ISX012 register setting value */ - uint32_t format; /* use V4L2 definition */ - uint16_t hsize; - uint16_t vsize; - uint16_t int_hsize; - uint16_t int_vsize; -}; - -typedef struct isx012_modeparam_s isx012_modeparam_t; - -struct isx012_param_s -{ - isx012_modeparam_t video; /* Parameter for video capture mode */ - isx012_modeparam_t still; /* Parameter for still capture mode */ -}; - -typedef struct isx012_param_s isx012_param_t; - -struct isx012_dev_s -{ - FAR struct i2c_master_s *i2c; /* I2C interface */ - uint8_t i2c_addr; /* I2C address */ - int i2c_freq; /* Frequency */ - isx012_state_t state; /* ISX012 status */ - bool dma_state; /* true means "in DMA" */ - uint8_t mode; /* ISX012 mode */ - isx012_param_t param; /* ISX012 parameters */ - void *video_priv; /* pointer to video private data */ -}; - -typedef struct isx012_dev_s isx012_dev_t; - -#define ARRAY_NENTRIES(a) (sizeof(a)/sizeof(isx012_reg_t)) - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/* register operations */ - -static uint16_t isx012_getreg(isx012_dev_t *priv, - uint16_t regaddr, uint16_t regsize); -static int isx012_putreg(isx012_dev_t *priv, uint16_t regaddr, - uint16_t regval, uint16_t regsize); -static int isx012_putreglist(isx012_dev_t *priv, - FAR const isx012_reg_t *reglist, size_t nentries); -#ifdef ISX012_CHECK_IN_DETAIL -static int isx012_putregs(isx012_dev_t *priv, uint16_t regaddr, - uint8_t *regvals, uint8_t regsize); -static int isx012_chipid(FAR struct i2c_master_s *i2c); -#endif - -static int isx012_chk_int_state(isx012_dev_t *priv, - uint8_t sts, uint32_t delay_time, - uint32_t wait_time, uint32_t timeout); -static int isx012_set_mode_param(isx012_dev_t *priv, - enum v4l2_buf_type type, - isx012_modeparam_t *param); -static int isx012_change_camera_mode(isx012_dev_t *priv, uint8_t mode); -static int isx012_change_device_state(isx012_dev_t *priv, - isx012_state_t state); -static int isx012_set_supported_frminterval(uint32_t fps_index, - FAR struct v4l2_fract *interval); -static int8_t isx012_get_maximum_fps(FAR struct v4l2_frmivalenum *frmival); -static int isx012_set_shd(FAR isx012_dev_t *priv); - -static bool is_movie_needed(isx012_modeparam_t *param); - -/* video driver HAL infterface */ - -static int isx012_open(FAR void *video_private); -static int isx012_close(void); -static int isx012_do_halfpush(bool enable); -static int isx012_set_buftype(enum v4l2_buf_type type); -static int isx012_set_buf(uint32_t bufaddr, uint32_t bufsize); -static int isx012_cancel_dma(void); -static int isx012_check_fmt(enum v4l2_buf_type buf_type, - uint32_t pixel_format); -static int isx012_get_range_of_fmt(FAR struct v4l2_fmtdesc *format); -static int isx012_get_range_of_framesize(FAR struct v4l2_frmsizeenum - *frmsize); -static int isx012_try_format(FAR struct v4l2_format *format); -static int isx012_set_format(FAR struct v4l2_format *format); -static int isx012_get_range_of_frameinterval(FAR struct v4l2_frmivalenum - *frmival); -static int isx012_set_frameinterval(FAR struct v4l2_streamparm *parm); -static int isx012_get_range_of_ctrlval(FAR struct v4l2_query_ext_ctrl - *range); -static int isx012_get_menu_of_ctrlval(FAR struct v4l2_querymenu *menu); -static int isx012_get_ctrlval(uint16_t ctrl_class, - FAR struct v4l2_ext_control *control); -static int isx012_set_ctrlval(uint16_t ctrl_class, - FAR struct v4l2_ext_control *control); -static int isx012_refresh(void); - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static isx012_dev_t g_isx012_private; - -#ifndef ISX012_NOT_USE_NSTBY -static const isx012_reg_t g_isx012_presleep[] = -{ - {PLL_CKSEL, 0x00, 0x01}, /* PLL_CKSEL */ - {SRCCK_DIV, 0x00, 0x01}, /* SRCCK_DIV */ - {INCK_SET, 0x17, 0x01}, /* INCK_SET */ -}; -#define ISX012_PRESLEEP_NENTRIES ARRAY_NENTRIES(g_isx012_presleep) -#endif - -static const isx012_reg_t g_isx012_def_init[] = -{ -#ifdef ISX012_NOT_USE_NSTBY - {PLL_CKSEL, 0x00, 0x01}, - {SRCCK_DIV, 0x00, 0x01}, -#endif - {DRIVABILITY, 0xaa, 0x01}, - {VIFCONFIG, 0x0200, 0x02}, - {YUVCONFIG_TN, 0xff0a, 0x02}, - {ILCODELEN, 0x00, 0x01}, - {AFMODE_MONI, 0x01, 0x01}, - {YUVCONFIG, 0xff6a, 0x02}, - {VIF_REC601_Y, 0x10fe, 0x02}, - {VIF_REC601_C, 0x10f0, 0x02}, - {HSENS_MODE_SEL, 0x11, 0x01}, - {VIF_CLKCONFIG1, 0x30, 0x01}, - {VIF_CLKCONFIG2, 0x30, 0x01}, - {VIF_CLKCONFIG3, 0x30, 0x01}, - {VIF_CLKCONFIG4, 0x30, 0x01}, - {VIF_CLKCONFIG5, 0x30, 0x01}, - {VIF_CLKCONFIG6, 0x30, 0x01}, - {VIF_CLKCONFIG7, 0x30, 0x01}, - {VIF_CLKCONFIG8, 0x30, 0x01}, - {VIF_CLKCONFIG9, 0x30, 0x01}, - {VIF_CLKCONFIG10, 0x30, 0x01}, - {VIF_CLKCONFIG11, 0x30, 0x01}, - {VIF_CLKCONFIG12, 0x30, 0x01}, - {VIF_CLKCONFIG13, 0x11, 0x01}, - {VIF_CLKCONFIG14, 0x11, 0x01}, - {VIF_CLKCONFIG15, 0x11, 0x01}, - {VIF_CLKCONFIG16, 0x11, 0x01}, -#ifdef ISX012_NOT_USE_NSTBY - {INCK_SET, 0x17, 0x01}, /* INCK_SET */ -#endif - {FRM_FIX_SN1_2, 0xff, 0x01}, /* Fix framerate */ - {FAST_MODECHG_EN, 0x01, 0x01}, - {FAST_SHT_MODE_SEL, 0x01, 0x01}, - {CAP_HALF_AE_CTRL, 0x07, 0x01}, /* HAFREL=HIGHSPEED, CAP=Auto */ - {HALF_AWB_CTRL, 0x01, 0x01}, - {AESPEED_FAST, 0x0f, 0x01}, - {FASTMOVE_TIMEOUT, 0x2d, 0x01}, - {YGAMMA_MODE, 0x01, 0x01}, - {INT_QLTY2, 0x50, 0x01}, -}; -#define ISX012_RESET_NENTRIES ARRAY_NENTRIES(g_isx012_def_init) - -static const uint8_t g_isx012_cxc_rgb_data[CXC_RGB_DATA_UNIT_NUM] - [CXC_RGB_DATA_UNIT_SIZE] = -{ - {0x01, 0x43, 0xc0, 0xf0, 0x4f, 0xfc, 0x13}, /* CXC_RGB_UNIT0 */ - {0x80, 0x44, 0x20, 0x21, 0x48, 0x04, 0x0e}, /* CXC_RGB_UNIT1 */ - {0x81, 0x43, 0xc0, 0x10, 0x30, 0xfc, 0x13}, /* CXC_RGB_UNIT2 */ - {0xff, 0x04, 0x20, 0x11, 0x48, 0x08, 0x12}, /* CXC_RGB_UNIT3 */ - {0x81, 0x43, 0xe0, 0x20, 0x48, 0x08, 0x12}, /* CXC_RGB_UNIT4 */ - {0x80, 0x03, 0xe0, 0x00, 0x38, 0x04, 0x10}, /* CXC_RGB_UNIT5 */ - {0x01, 0x84, 0x20, 0x21, 0x48, 0x04, 0x10}, /* CXC_RGB_UNIT6 */ - {0x01, 0x04, 0xc0, 0x10, 0x20, 0x00, 0x08}, /* CXC_RGB_UNIT7 */ - {0x81, 0x82, 0xc0, 0x20, 0x38, 0x08, 0x0e}, /* CXC_RGB_UNIT8 */ - {0x01, 0x43, 0xc0, 0x10, 0x20, 0x04, 0x04}, /* CXC_RGB_UNIT9 */ - {0x01, 0x41, 0x40, 0x10, 0x20, 0x08, 0x0a}, /* CXC_RGB_UNIT10 */ - {0x82, 0x82, 0x80, 0x20, 0x20, 0x04, 0x04}, /* CXC_RGB_UNIT11 */ - {0x82, 0x80, 0x20, 0x20, 0x08, 0x04, 0x06}, /* CXC_RGB_UNIT12 */ - {0x81, 0x42, 0xa0, 0x10, 0x20, 0x04, 0x08}, /* CXC_RGB_UNIT13 */ - {0x81, 0x80, 0x00, 0x00, 0x00, 0x04, 0x00}, /* CXC_RGB_UNIT14 */ - {0x01, 0x41, 0x80, 0x10, 0x20, 0x00, 0x08}, /* CXC_RGB_UNIT15 */ - {0x00, 0x42, 0x20, 0x20, 0x08, 0x08, 0x00}, /* CXC_RGB_UNIT16 */ - {0x82, 0xc0, 0x40, 0x20, 0x20, 0x08, 0x08}, /* CXC_RGB_UNIT17 */ - {0x80, 0x02, 0xa0, 0x10, 0x20, 0x08, 0x04}, /* CXC_RGB_UNIT18 */ - {0x02, 0x81, 0x60, 0x30, 0x20, 0x08, 0x0a}, /* CXC_RGB_UNIT19 */ - {0x82, 0x42, 0xc0, 0x10, 0x30, 0x04, 0x0a}, /* CXC_RGB_UNIT20 */ - {0x03, 0xc3, 0xa0, 0x40, 0x28, 0x0c, 0x0a}, /* CXC_RGB_UNIT21 */ - {0x03, 0xc3, 0xc0, 0x20, 0x20, 0x08, 0x08}, /* CXC_RGB_UNIT22 */ - {0x82, 0xc2, 0xc0, 0x30, 0x40, 0x10, 0x0e}, /* CXC_RGB_UNIT23 */ - {0x84, 0x03, 0xa1, 0x40, 0x28, 0x08, 0x08}, /* CXC_RGB_UNIT24 */ - {0x02, 0x82, 0xa0, 0x30, 0x30, 0x0c, 0x10}, /* CXC_RGB_UNIT25 */ - {0x84, 0x03, 0xe1, 0x40, 0x28, 0x10, 0x0a}, /* CXC_RGB_UNIT26 */ -}; - -static const uint8_t g_isx012_cxc_grb_data[CXC_GRB_DATA_UNIT_NUM] - [CXC_GRB_DATA_UNIT_SIZE] = -{ - {0x00, 0x3d, 0x40, 0x0f, 0xc0, 0x03, 0xf2}, /* CXC_GRB_UNIT0 */ - {0x80, 0x7c, 0x80, 0x1f, 0xd8, 0x03, 0xf0}, /* CXC_GRB_UNIT1 */ - {0x00, 0x3c, 0x40, 0x0f, 0xd0, 0x03, 0xf0}, /* CXC_GRB_UNIT2 */ - {0x80, 0x3c, 0x20, 0x1f, 0xe0, 0x07, 0xf6}, /* CXC_GRB_UNIT3 */ - {0x00, 0x3c, 0x00, 0x1f, 0xd0, 0x07, 0xf4}, /* CXC_GRB_UNIT4 */ - {0x00, 0x3d, 0x40, 0x0f, 0xc8, 0x03, 0xf2}, /* CXC_GRB_UNIT5 */ - {0x80, 0xfc, 0x5f, 0xff, 0xd7, 0x07, 0xf4}, /* CXC_GRB_UNIT6 */ - {0x01, 0x7d, 0x40, 0x0f, 0xd0, 0xff, 0xf3}, /* CXC_GRB_UNIT7 */ - {0x7f, 0xfd, 0x3f, 0x0f, 0xc8, 0x03, 0xf2}, /* CXC_GRB_UNIT8 */ - {0x81, 0x7c, 0x20, 0x0f, 0xd0, 0xff, 0xf7}, /* CXC_GRB_UNIT9 */ - {0x7e, 0xfe, 0x5f, 0x0f, 0xd8, 0x03, 0xf6}, /* CXC_GRB_UNIT10 */ - {0x80, 0xbd, 0xa0, 0x2f, 0xe8, 0x07, 0xfa}, /* CXC_GRB_UNIT11 */ - {0x80, 0xfe, 0xbf, 0x0f, 0xe8, 0xff, 0xf9}, /* CXC_GRB_UNIT12 */ - {0x00, 0x3e, 0x80, 0x3f, 0xe8, 0x0f, 0xfa}, /* CXC_GRB_UNIT13 */ - {0x02, 0x40, 0xe0, 0x0f, 0xf8, 0x03, 0xfe}, /* CXC_GRB_UNIT14 */ - {0x80, 0x7f, 0xe0, 0x1f, 0xf8, 0x17, 0xfe}, /* CXC_GRB_UNIT15 */ - {0x85, 0xff, 0xe0, 0x2f, 0x08, 0x04, 0x04}, /* CXC_GRB_UNIT16 */ - {0x81, 0x40, 0x20, 0x20, 0x00, 0x08, 0x00}, /* CXC_GRB_UNIT17 */ - {0x84, 0x00, 0x21, 0x30, 0x10, 0x0c, 0x06}, /* CXC_GRB_UNIT18 */ - {0x02, 0x82, 0x40, 0x20, 0x10, 0x0c, 0x02}, /* CXC_GRB_UNIT19 */ - {0x83, 0x00, 0x21, 0x40, 0x08, 0x10, 0x06}, /* CXC_GRB_UNIT20 */ - {0x83, 0x82, 0xa0, 0x20, 0x20, 0x08, 0x08}, /* CXC_GRB_UNIT21 */ - {0x02, 0x81, 0x40, 0x30, 0x18, 0x0c, 0x06}, /* CXC_GRB_UNIT22 */ - {0x03, 0x81, 0x80, 0x10, 0x20, 0x04, 0x08}, /* CXC_GRB_UNIT23 */ - {0x82, 0x82, 0x80, 0x20, 0x20, 0x0c, 0x06}, /* CXC_GRB_UNIT24 */ - {0x83, 0xc1, 0x40, 0x20, 0x20, 0x04, 0x08}, /* CXC_GRB_UNIT25 */ - {0x01, 0x82, 0xa0, 0x20, 0x20, 0x08, 0x08}, /* CXC_GRB_UNIT26 */ -}; - -static const uint8_t g_isx012_shd_rgb_data[SHD_RGB_DATA_UNIT_NUM] - [SHD_RGB_DATA_UNIT_SIZE] = -{ - {0xf1, 0x59, 0x52, 0x7b, 0x98, 0xc4, 0x9d, 0x23, 0x29, 0x87, 0x46}, /* SHD_RGB_UNIT0 */ - {0xc6, 0x81, 0xd1, 0x70, 0x56, 0xe4, 0x9c, 0x1b, 0x6d, 0x07, 0x48}, /* SHD_RGB_UNIT1 */ - {0xdd, 0xf1, 0x51, 0x7d, 0xa8, 0xb4, 0x1e, 0x25, 0x49, 0xc7, 0x46}, /* SHD_RGB_UNIT2 */ - {0xbd, 0xf1, 0x50, 0x6d, 0x2a, 0x44, 0x1b, 0x0a, 0x01, 0x87, 0x44}, /* SHD_RGB_UNIT3 */ - {0xd0, 0xa9, 0x51, 0x77, 0x84, 0xd4, 0x9d, 0x1f, 0x2d, 0xc7, 0x44}, /* SHD_RGB_UNIT4 */ - {0xa8, 0xa9, 0xcf, 0x62, 0x98, 0xa3, 0x17, 0xdb, 0xfc, 0x05, 0x38}, /* SHD_RGB_UNIT5 */ - {0x90, 0xe1, 0x8e, 0x6a, 0x08, 0xc4, 0x9b, 0x0e, 0x11, 0x07, 0x43}, /* SHD_RGB_UNIT6 */ - {0xac, 0xa9, 0x4f, 0x5d, 0x4e, 0x13, 0x15, 0xb9, 0xf8, 0x44, 0x2b}, /* SHD_RGB_UNIT7 */ - {0x44, 0x21, 0xcb, 0x56, 0x0e, 0x63, 0x98, 0xe3, 0x78, 0x86, 0x3d}, /* SHD_RGB_UNIT8 */ - {0xab, 0x81, 0x4f, 0x62, 0x7c, 0xc3, 0x94, 0xb4, 0x98, 0x84, 0x26}, /* SHD_RGB_UNIT9 */ - {0x14, 0xe9, 0x48, 0x46, 0x4a, 0x12, 0x93, 0xa4, 0x84, 0xc5, 0x31}, /* SHD_RGB_UNIT10 */ - {0x81, 0xe9, 0x4d, 0x67, 0xac, 0x73, 0x17, 0xd0, 0xdc, 0x24, 0x29}, /* SHD_RGB_UNIT11 */ - {0x12, 0xb9, 0x08, 0x40, 0x02, 0x52, 0x10, 0x84, 0x6c, 0x64, 0x25}, /* SHD_RGB_UNIT12 */ - {0x4c, 0x91, 0xcb, 0x5b, 0x4c, 0xe3, 0x19, 0xec, 0xdc, 0x05, 0x34}, /* SHD_RGB_UNIT13 */ - {0x37, 0x39, 0x8a, 0x44, 0x2a, 0x02, 0x10, 0x80, 0x14, 0xe4, 0x20}, /* SHD_RGB_UNIT14 */ - {0x1c, 0x51, 0x49, 0x53, 0xe4, 0x02, 0x17, 0xd3, 0xb8, 0xe6, 0x3d}, /* SHD_RGB_UNIT15 */ - {0x8b, 0xd9, 0x8d, 0x53, 0xc8, 0x72, 0x12, 0x98, 0x50, 0x24, 0x23}, /* SHD_RGB_UNIT16 */ - {0x19, 0x11, 0x89, 0x4c, 0x8c, 0x32, 0x16, 0xc7, 0x14, 0x06, 0x38}, /* SHD_RGB_UNIT17 */ - {0xca, 0xc1, 0x10, 0x6c, 0xe0, 0x83, 0x97, 0xd0, 0x4c, 0xa5, 0x2d}, /* SHD_RGB_UNIT18 */ - {0x3e, 0x99, 0x0a, 0x51, 0xbc, 0xc2, 0x15, 0xc2, 0x28, 0x26, 0x39}, /* SHD_RGB_UNIT19 */ - {0xa5, 0x89, 0x0f, 0x7b, 0x8c, 0x64, 0x9d, 0x14, 0xb9, 0x46, 0x3e}, /* SHD_RGB_UNIT20 */ - {0x8f, 0x41, 0xce, 0x5e, 0x5e, 0x03, 0x98, 0xdc, 0x50, 0xe6, 0x3a}, /* SHD_RGB_UNIT21 */ - {0xb4, 0x49, 0x90, 0x72, 0x50, 0x74, 0xa1, 0x3a, 0x05, 0x88, 0x4b}, /* SHD_RGB_UNIT22 */ - {0xe1, 0xd1, 0x91, 0x71, 0x38, 0xc4, 0x1b, 0x0a, 0xed, 0x86, 0x42}, /* SHD_RGB_UNIT23 */ - {0xcb, 0x49, 0xd1, 0x78, 0x86, 0x74, 0x9f, 0x2d, 0xb9, 0x88, 0x51}, /* SHD_RGB_UNIT24 */ - {0x11, 0x62, 0x93, 0x7c, 0x9c, 0x94, 0x1d, 0x1b, 0x41, 0x67, 0x46}, /* SHD_RGB_UNIT25 */ - {0xcf, 0x81, 0x91, 0x77, 0x82, 0x54, 0x9f, 0x2a, 0x21, 0xa8, 0x4d}, /* SHD_RGB_UNIT26 */ -}; - -static const uint8_t g_isx012_shd_grb_data[SHD_GRB_DATA_UNIT_NUM] - [SHD_GRB_DATA_UNIT_SIZE] = -{ - {0xe8, 0xa9, 0x0f, 0x78, 0xe4, 0x13, 0x9d, 0xf0, 0x04, 0xe7, 0x39}, /* SHD_GRB_UNIT0 */ - {0xbd, 0x51, 0x0e, 0x6f, 0x94, 0x63, 0x1c, 0xea, 0x4c, 0x27, 0x3c}, /* SHD_GRB_UNIT1 */ - {0xd7, 0x19, 0x4f, 0x7a, 0xf4, 0xd3, 0x1d, 0xf7, 0x20, 0xe7, 0x3a}, /* SHD_GRB_UNIT2 */ - {0xb6, 0x11, 0x0e, 0x6c, 0x76, 0x03, 0x9b, 0xdd, 0xf0, 0x06, 0x39}, /* SHD_GRB_UNIT3 */ - {0xc9, 0xc1, 0x8e, 0x75, 0xc8, 0xe3, 0x9c, 0xef, 0xf8, 0xa6, 0x39}, /* SHD_GRB_UNIT4 */ - {0xa0, 0x69, 0x0d, 0x62, 0x20, 0x93, 0x97, 0xbf, 0xf4, 0xa5, 0x30}, /* SHD_GRB_UNIT5 */ - {0x8c, 0xb1, 0x8c, 0x68, 0x60, 0x13, 0x9b, 0xe0, 0xcc, 0xa6, 0x38}, /* SHD_GRB_UNIT6 */ - {0x9f, 0x71, 0x0d, 0x5c, 0xf4, 0x12, 0x15, 0xab, 0x00, 0x65, 0x28}, /* SHD_GRB_UNIT7 */ - {0x44, 0x41, 0x0a, 0x56, 0xbc, 0x02, 0x98, 0xc4, 0x50, 0x26, 0x34}, /* SHD_GRB_UNIT8 */ - {0x9a, 0x59, 0x4d, 0x5f, 0x16, 0x83, 0x14, 0xa8, 0x9c, 0x64, 0x25}, /* SHD_GRB_UNIT9 */ - {0x15, 0xc1, 0xc8, 0x46, 0x38, 0x22, 0x13, 0x9a, 0x74, 0x65, 0x2c}, /* SHD_GRB_UNIT10 */ - {0x78, 0x11, 0x4c, 0x63, 0x36, 0xb3, 0x96, 0xbb, 0xcc, 0x44, 0x27}, /* SHD_GRB_UNIT11 */ - {0x11, 0xa1, 0x48, 0x40, 0x04, 0x72, 0x10, 0x83, 0x70, 0x84, 0x23}, /* SHD_GRB_UNIT12 */ - {0x4a, 0x69, 0xca, 0x59, 0xe0, 0xf2, 0x98, 0xcc, 0xb0, 0xa5, 0x2e}, /* SHD_GRB_UNIT13 */ - {0x33, 0xc1, 0x09, 0x44, 0x24, 0x02, 0x10, 0x80, 0x14, 0x84, 0x20}, /* SHD_GRB_UNIT14 */ - {0x1b, 0xd1, 0x48, 0x52, 0x98, 0x72, 0x96, 0xb7, 0x8c, 0x06, 0x35}, /* SHD_GRB_UNIT15 */ - {0x81, 0x39, 0xcc, 0x51, 0x96, 0x32, 0x92, 0x92, 0x48, 0x44, 0x22}, /* SHD_GRB_UNIT16 */ - {0x17, 0xb9, 0x48, 0x4b, 0x5e, 0xa2, 0x15, 0xb0, 0xd8, 0x45, 0x30}, /* SHD_GRB_UNIT17 */ - {0xc0, 0x19, 0xce, 0x69, 0x56, 0x23, 0x97, 0xba, 0x38, 0x05, 0x2a}, /* SHD_GRB_UNIT18 */ - {0x3b, 0xe1, 0x09, 0x50, 0x82, 0x42, 0x95, 0xac, 0xf8, 0x05, 0x31}, /* SHD_GRB_UNIT19 */ - {0x94, 0x19, 0x4d, 0x78, 0xca, 0xe3, 0x9c, 0xe8, 0xa8, 0xa6, 0x35}, /* SHD_GRB_UNIT20 */ - {0x8b, 0x71, 0xcc, 0x5d, 0xf8, 0xa2, 0x97, 0xc0, 0x24, 0xa6, 0x32}, /* SHD_GRB_UNIT21 */ - {0xa4, 0xb1, 0x8d, 0x6d, 0x96, 0xd3, 0xa0, 0x09, 0xe1, 0xa7, 0x3f}, /* SHD_GRB_UNIT22 */ - {0xde, 0x09, 0xcf, 0x70, 0x92, 0x73, 0x9b, 0xe0, 0xcc, 0x06, 0x38}, /* SHD_GRB_UNIT23 */ - {0xc0, 0x89, 0x4e, 0x74, 0xcc, 0x13, 0x1e, 0xfc, 0x84, 0x48, 0x45}, /* SHD_GRB_UNIT24 */ - {0x06, 0x7a, 0xd0, 0x7a, 0xe6, 0x33, 0x1d, 0xef, 0x24, 0x07, 0x3b}, /* SHD_GRB_UNIT25 */ - {0xc4, 0xb1, 0x0e, 0x74, 0xca, 0x33, 0x1e, 0xfc, 0xc4, 0x07, 0x41}, /* SHD_GRB_UNIT26 */ -}; - -static const uint8_t g_isx012_shd_r1_data[SHD_R1_DATA_UNIT_NUM] - [SHD_R1_DATA_UNIT_SIZE] = -{ - {0x10, 0x92, 0x10, 0x82, 0xf8, 0x43, 0x1f, 0xfb, 0xf0, 0xe7, 0x40}, /* SHD_R1_UNIT0 */ - {0x07, 0x92, 0xd0, 0x82, 0xec, 0x33, 0x9e, 0xed, 0x68, 0xe7, 0x3c}, /* SHD_R1_UNIT1 */ - {0xfa, 0x21, 0xd0, 0x7e, 0xce, 0xa3, 0x1b, 0xcd, 0x20, 0xe6, 0x31}, /* SHD_R1_UNIT2 */ - {0xa6, 0x69, 0xce, 0x78, 0xbc, 0xa3, 0x1b, 0xbe, 0x44, 0x25, 0x28}, /* SHD_R1_UNIT3 */ - {0x45, 0x19, 0xcb, 0x65, 0x78, 0xe3, 0x1b, 0xc8, 0x3c, 0xa5, 0x24}, /* SHD_R1_UNIT4 */ - {0x15, 0xc1, 0x48, 0x4d, 0xd6, 0x72, 0x99, 0xd3, 0xdc, 0x25, 0x27}, /* SHD_R1_UNIT5 */ - {0x11, 0x01, 0x08, 0x41, 0x42, 0x42, 0x15, 0xc1, 0xa4, 0x06, 0x2f}, /* SHD_R1_UNIT6 */ - {0x39, 0x89, 0x08, 0x40, 0x0a, 0x22, 0x12, 0xab, 0x0c, 0x26, 0x38}, /* SHD_R1_UNIT7 */ - {0x91, 0x71, 0x4a, 0x49, 0x2c, 0xa2, 0x11, 0x9c, 0xc4, 0xa5, 0x33}, /* SHD_R1_UNIT8 */ - {0xe2, 0xe1, 0x4d, 0x5f, 0xa4, 0x22, 0x94, 0xa3, 0xa0, 0x05, 0x34}, /* SHD_R1_UNIT9 */ - {0xc7, 0x41, 0x50, 0x7c, 0x7e, 0xd3, 0x19, 0xc5, 0x48, 0x86, 0x35}, /* SHD_R1_UNIT10 */ - {0xda, 0xa9, 0xcf, 0x8c, 0x42, 0x24, 0x20, 0xf5, 0x8c, 0x67, 0x3c}, /* SHD_R1_UNIT11 */ - {0xf6, 0x89, 0xd0, 0x88, 0x90, 0x34, 0x23, 0x0b, 0x15, 0xa8, 0x3f}, /* SHD_R1_UNIT12 */ - {0x00, 0x72, 0x10, 0x89, 0x68, 0x04, 0x69, 0x00, 0x00, 0x19, 0x26}, /* SHD_R1_UNIT13 */ -}; - -static const uint8_t g_isx012_shd_r2_data[SHD_R2_DATA_UNIT_NUM] - [SHD_R2_DATA_UNIT_SIZE] = -{ - {0x3a, 0xe2, 0x11, 0x8c, 0x42, 0x74, 0xa1, 0x0c, 0x89, 0x08, 0x46}, /* SHD_R2_UNIT0 */ - {0x30, 0xe2, 0xd1, 0x8c, 0x36, 0x54, 0x20, 0xfe, 0xec, 0x47, 0x41}, /* SHD_R2_UNIT1 */ - {0x20, 0x5a, 0x91, 0x88, 0x16, 0x94, 0x1d, 0xda, 0x80, 0x26, 0x35}, /* SHD_R2_UNIT2 */ - {0xc2, 0x69, 0x0f, 0x81, 0x00, 0x94, 0x9d, 0xc9, 0x84, 0xe5, 0x29}, /* SHD_R2_UNIT3 */ - {0x54, 0xb1, 0x0b, 0x6c, 0xb2, 0xb3, 0x9d, 0xd4, 0x74, 0x85, 0x25}, /* SHD_R2_UNIT4 */ - {0x1a, 0xf1, 0x08, 0x50, 0xfc, 0xe2, 0x1a, 0xe0, 0x2c, 0x66, 0x28}, /* SHD_R2_UNIT5 */ - {0x14, 0x01, 0x88, 0x41, 0x4e, 0x32, 0x16, 0xcb, 0x08, 0x87, 0x31}, /* SHD_R2_UNIT6 */ - {0x42, 0x99, 0x08, 0x40, 0x0c, 0x72, 0x92, 0xb1, 0x58, 0x86, 0x3b}, /* SHD_R2_UNIT7 */ - {0xa8, 0xd9, 0xca, 0x4a, 0x32, 0xe2, 0x91, 0xa0, 0x04, 0x66, 0x36}, /* SHD_R2_UNIT8 */ - {0x02, 0xc2, 0x4e, 0x64, 0xbe, 0xd2, 0x94, 0xa9, 0xe0, 0xc5, 0x36}, /* SHD_R2_UNIT9 */ - {0xe1, 0x61, 0x91, 0x84, 0xb6, 0x43, 0x9b, 0xcf, 0x9c, 0x66, 0x38}, /* SHD_R2_UNIT10 */ - {0xf6, 0xa1, 0x50, 0x97, 0x8e, 0x34, 0x22, 0x04, 0x01, 0x08, 0x40}, /* SHD_R2_UNIT11 */ - {0x15, 0x9a, 0x51, 0x92, 0xf2, 0xd4, 0xa5, 0x1d, 0x99, 0xa8, 0x43}, /* SHD_R2_UNIT12 */ - {0x21, 0x82, 0x91, 0x92, 0xbe, 0xf4, 0x9e, 0xf3, 0x4c, 0x87, 0x38}, /* SHD_R2_UNIT13 */ -}; - -static const uint8_t g_isx012_shd_b2_data[SHD_B2_DATA_UNIT_NUM] - [SHD_B2_DATA_UNIT_SIZE] = -{ - {0xef, 0x39, 0xcf, 0x74, 0x88, 0xb3, 0x1b, 0xdf, 0x20, 0x47, 0x3b}, /* SHD_B2_UNIT0 */ - {0xdf, 0x59, 0xcf, 0x77, 0x8c, 0x43, 0x1b, 0xd7, 0xb8, 0x46, 0x37}, /* SHD_B2_UNIT1 */ - {0xcc, 0xc1, 0x0e, 0x73, 0x78, 0xa3, 0x99, 0xc1, 0xd0, 0x25, 0x2f}, /* SHD_B2_UNIT2 */ - {0x87, 0x09, 0x0d, 0x6c, 0x64, 0x93, 0x99, 0xb6, 0x30, 0xc5, 0x27}, /* SHD_B2_UNIT3 */ - {0x3f, 0xb1, 0x0a, 0x5f, 0x2a, 0x93, 0x99, 0xbc, 0x1c, 0x85, 0x24}, /* SHD_B2_UNIT4 */ - {0x16, 0xc9, 0x48, 0x4c, 0xb6, 0x92, 0x17, 0xc4, 0x94, 0x85, 0x26}, /* SHD_B2_UNIT5 */ - {0x10, 0x09, 0x88, 0x41, 0x3a, 0x52, 0x94, 0xb2, 0x2c, 0xc6, 0x2c}, /* SHD_B2_UNIT6 */ - {0x33, 0x79, 0x08, 0x40, 0x08, 0xc2, 0x11, 0xa2, 0x94, 0x65, 0x34}, /* SHD_B2_UNIT7 */ - {0x7e, 0x39, 0x4a, 0x48, 0x26, 0x52, 0x91, 0x96, 0x64, 0x05, 0x2f}, /* SHD_B2_UNIT8 */ - {0xbf, 0x09, 0x8d, 0x5b, 0x92, 0xa2, 0x93, 0x9d, 0x4c, 0x65, 0x2f}, /* SHD_B2_UNIT9 */ - {0x95, 0xf9, 0x0e, 0x73, 0x48, 0x63, 0x98, 0xb9, 0xd8, 0xa5, 0x30}, /* SHD_B2_UNIT10 */ - {0xa5, 0xb1, 0x8d, 0x83, 0xf4, 0xa3, 0x1d, 0xe0, 0xd0, 0x06, 0x36}, /* SHD_B2_UNIT11 */ - {0xbe, 0xa9, 0x4e, 0x79, 0x50, 0xd4, 0x20, 0xf6, 0x54, 0xa7, 0x38}, /* SHD_B2_UNIT12 */ - {0xc5, 0x91, 0xce, 0x7a, 0xf4, 0x03, 0x44, 0x00, 0x60, 0x60, 0x00}, /* SHD_B2_UNIT13 */ -}; - -static const isx012_reg_t g_isx012_shd_thresholds[] = -{ - {SHD_INP_TH_HB_H_R2, 0x1478, 2}, - {SHD_INP_TH_HB_L_R2, 0x1380, 2}, - {SHD_INP_TH_LB_H_R2, 0x10cc, 2}, - {SHD_INP_TH_LB_L_R2, 0x1004, 2}, - {SHD_INP_TH_HB_H_RB, 0x10cc, 2}, - {SHD_INP_TH_HB_L_RB, 0x1004, 2}, - {SHD_INP_TH_LB_H_RB, 0x0000, 2}, - {SHD_INP_TH_LB_L_RB, 0x0000, 2}, -}; - -#define ISX012_SHD_THRESHOLDS_NENTRIES ARRAY_NENTRIES(g_isx012_shd_thresholds) - -static const isx012_reg_t g_isx012_shd_wb[] = -{ - {NORMR, 0x1101, 2}, - {NORMB, 0x0f7b, 2}, - {AWBPRER, 0x0147, 2}, - {AWBPREB, 0x022a, 2}, - {SHD_PRER_OFFSET_R2, 0x001b, 2}, - {SHD_PRER_OFFSET_RB, 0x000b, 2}, - {SHD_PREB_OFFSET_RB, 0x0003, 2}, -}; - -#define ISX012_SHD_WB_NENTRIES ARRAY_NENTRIES(g_isx012_shd_wb) - -static isx012_conv_v4l2_to_regval_t - g_isx012_supported_colorfx[ISX012_MAX_COLOREFFECT + 1] = -{ - {V4L2_COLORFX_NONE, REGVAL_EFFECT_NONE}, - {V4L2_COLORFX_BW, REGVAL_EFFECT_MONOTONE}, - {V4L2_COLORFX_SEPIA, REGVAL_EFFECT_SEPIA}, - {V4L2_COLORFX_NEGATIVE, REGVAL_EFFECT_NEGPOS}, - {V4L2_COLORFX_SKETCH, REGVAL_EFFECT_SKETCH}, - {V4L2_COLORFX_SOLARIZATION, REGVAL_EFFECT_SOLARIZATION}, - {V4L2_COLORFX_PASTEL, REGVAL_EFFECT_PASTEL}, -}; - -static isx012_conv_v4l2_to_regval_t - g_isx012_supported_presetwb[ISX012_MAX_PRESETWB + 1] = -{ - {V4L2_WHITE_BALANCE_AUTO, REGVAL_AWB_ATM}, - {V4L2_WHITE_BALANCE_INCANDESCENT, REGVAL_AWB_LIGHTBULB}, - {V4L2_WHITE_BALANCE_FLUORESCENT, REGVAL_AWB_FLUORESCENTLIGHT}, - {V4L2_WHITE_BALANCE_DAYLIGHT, REGVAL_AWB_CLEARWEATHER}, - {V4L2_WHITE_BALANCE_CLOUDY, REGVAL_AWB_CLOUDYWEATHER}, - {V4L2_WHITE_BALANCE_SHADE, REGVAL_AWB_SHADE}, -}; - -static isx012_conv_v4l2_to_regval_t - g_isx012_supported_photometry[ISX012_MAX_PHOTOMETRY + 1] = -{ - {V4L2_EXPOSURE_METERING_AVERAGE, REGVAL_PHOTOMETRY_AVERAGE}, - {V4L2_EXPOSURE_METERING_CENTER_WEIGHTED, REGVAL_PHOTOMETRY_CENTERWEIGHT}, - {V4L2_EXPOSURE_METERING_SPOT, REGVAL_PHOTOMETRY_SPOT}, - {V4L2_EXPOSURE_METERING_MATRIX, REGVAL_PHOTOMETRY_MULTIPATTERN}, -}; - -static isx012_conv_v4l2_to_regval_t - g_isx012_supported_iso[ISX012_MAX_ISO + 1] = -{ - {25 * 1000, REGVAL_ISO_25}, - {32 * 1000, REGVAL_ISO_32}, - {40 * 1000, REGVAL_ISO_40}, - {50 * 1000, REGVAL_ISO_50}, - {64 * 1000, REGVAL_ISO_64}, - {80 * 1000, REGVAL_ISO_80}, - {100 * 1000, REGVAL_ISO_100}, - {125 * 1000, REGVAL_ISO_125}, - {160 * 1000, REGVAL_ISO_160}, - {200 * 1000, REGVAL_ISO_200}, - {250 * 1000, REGVAL_ISO_250}, - {320 * 1000, REGVAL_ISO_320}, - {400 * 1000, REGVAL_ISO_400}, - {500 * 1000, REGVAL_ISO_500}, - {640 * 1000, REGVAL_ISO_640}, - {800 * 1000, REGVAL_ISO_800}, - {1000 * 1000, REGVAL_ISO_1000}, - {1250 * 1000, REGVAL_ISO_1250}, - {1600 * 1000, REGVAL_ISO_1600}, -}; - -static struct video_devops_s g_isx012_video_devops = -{ - .open = isx012_open, - .close = isx012_close, - .do_halfpush = isx012_do_halfpush, - .set_buftype = isx012_set_buftype, - .set_buf = isx012_set_buf, - .cancel_dma = isx012_cancel_dma, - .get_range_of_fmt = isx012_get_range_of_fmt, - .get_range_of_framesize = isx012_get_range_of_framesize, - .try_format = isx012_try_format, - .set_format = isx012_set_format, - .get_range_of_frameinterval = isx012_get_range_of_frameinterval, - .set_frameinterval = isx012_set_frameinterval, - .get_range_of_ctrlvalue = isx012_get_range_of_ctrlval, - .get_menu_of_ctrlvalue = isx012_get_menu_of_ctrlval, - .get_ctrlvalue = isx012_get_ctrlval, - .set_ctrlvalue = isx012_set_ctrlval, - .refresh = isx012_refresh, -}; - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -static uint16_t isx012_getreg(isx012_dev_t *priv, - uint16_t regaddr, uint16_t regsize) -{ - struct i2c_config_s config; - volatile uint16_t regval = 0; - volatile uint8_t buffer[2]; - int ret; - - /* Set up the I2C configuration */ - - config.frequency = priv->i2c_freq; - config.address = priv->i2c_addr; - config.addrlen = 7; - buffer[0] = regaddr >> 8; - buffer[1] = regaddr & 0xff; - - /* Write the register address */ - - ret = i2c_write(priv->i2c, &config, (uint8_t *)buffer, 2); - if (ret < 0) - { - imagererr("i2c_write failed: %d\n", ret); - return 0; - } - - /* Restart and read 16bits from the register */ - - ret = i2c_read(priv->i2c, &config, (uint8_t *)buffer, regsize); - if (ret < 0) - { - imagererr("i2c_read failed: %d\n", ret); - return 0; - } - - memcpy((uint8_t *)®val, (uint8_t *)buffer, regsize); - - return regval; -} - -static int isx012_putreg(isx012_dev_t *priv, - uint16_t regaddr, uint16_t regval, uint16_t regsize) -{ - struct i2c_config_s config; - volatile uint8_t buffer[4]; - int ret; - - /* Set up the I2C configuration */ - - config.frequency = priv->i2c_freq; - config.address = priv->i2c_addr; - config.addrlen = 7; - - /* Set up for the transfer */ - - buffer[0] = regaddr >> 8; /* RegAddr Hi */ - buffer[1] = regaddr & 0xff; /* RegAddr Low */ - - memcpy((uint8_t *)&buffer[2], (uint8_t *)®val, regsize); - - /* And do it */ - - ret = i2c_write(priv->i2c, &config, - (uint8_t *)buffer, regsize + 2); - if (ret < 0) - { - imagererr("i2c_write failed: %d\n", ret); - } - - return ret; -} - -static int isx012_putreglist(isx012_dev_t *priv, - FAR const isx012_reg_t *reglist, - size_t nentries) -{ - FAR const isx012_reg_t *entry; - int ret = OK; - - for (entry = reglist; nentries > 0; nentries--, entry++) - { - ret = isx012_putreg(priv, entry->regaddr, - entry->regval, entry->regsize); - if (ret < 0) - { - imagererr("isx012_putreg failed: %d\n", ret); - return ret; - } - } - - return ret; -} - -static int isx012_chk_int_state(isx012_dev_t *priv, - uint8_t sts, uint32_t delay_time, - uint32_t wait_time, uint32_t timeout) -{ - int ret = 0; - volatile uint8_t data; - uint32_t time = 0; - - nxsig_usleep(delay_time * 1000); - while (time < timeout) - { - data = isx012_getreg(priv, INTSTS0, sizeof(data)); - data = data & sts; - if (data != 0) - { - ret = isx012_putreg(priv, INTCLR0, data, sizeof(data)); - return ret; - } - - nxsig_usleep(wait_time * 1000); - time += wait_time; - } - - return ERROR; -} - -static int isx012_replace_fmt_v4l2val_to_regval(uint32_t v4l2val, - uint8_t *regval) -{ - if (regval == NULL) - { - return -EINVAL; - } - - switch (v4l2val) - { - case V4L2_PIX_FMT_UYVY: - *regval = REGVAL_OUTFMT_YUV; - break; - - case V4L2_PIX_FMT_JPEG: - *regval = REGVAL_OUTFMT_JPEG; - break; - - case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: - *regval = REGVAL_OUTFMT_INTERLEAVE; - break; - - default: /* Unsupported format */ - - return -EINVAL; - } - - return OK; -} - -static bool is_movie_needed(isx012_modeparam_t *param) -{ - bool need = true; - - if (param->format == V4L2_PIX_FMT_UYVY) - { - if (param->fps >= REGVAL_FPSTYPE_30FPS) /* This means fps <= 30 */ - { - need = false; - } - } - - return need; -} - -static int isx012_set_mode_param(isx012_dev_t *priv, - enum v4l2_buf_type type, - isx012_modeparam_t *param) -{ - int ret = 0; - uint8_t format; - uint16_t fps_regaddr; - uint16_t fmt_regaddr; - uint16_t sensmode_regaddr; - uint16_t hsize_regaddr; - uint16_t vsize_regaddr; - uint8_t sensmode; - - /* Get register address for type */ - - if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE) - { - if (is_movie_needed(param)) - { - if (priv->mode == REGVAL_MODESEL_HREL) - { - /* In Half release state, - * the setting which need movie mode is prohibited. - */ - - return -EPERM; - } - - fps_regaddr = FPSTYPE_MOVIE; - fmt_regaddr = OUTFMT_MOVIE; - sensmode_regaddr = SENSMODE_MOVIE; - hsize_regaddr = HSIZE_MOVIE; - vsize_regaddr = VSIZE_MOVIE; - } - else - { - fps_regaddr = FPSTYPE_MONI; - fmt_regaddr = OUTFMT_MONI; - sensmode_regaddr = SENSMODE_MONI; - hsize_regaddr = HSIZE_MONI; - vsize_regaddr = VSIZE_MONI; - } - } - else - { - fps_regaddr = FPSTYPE_CAP; - fmt_regaddr = OUTFMT_CAP; - sensmode_regaddr = SENSMODE_CAP; - hsize_regaddr = HSIZE_CAP; - vsize_regaddr = VSIZE_CAP; - } - - ret = isx012_putreg(priv, fps_regaddr, param->fps, sizeof(uint8_t)); - if (ret < 0) - { - return ret; - } - - ret = isx012_replace_fmt_v4l2val_to_regval(param->format, &format); - if (ret < 0) - { - return ret; - } - - ret = isx012_putreg(priv, fmt_regaddr, format, sizeof(uint8_t)); - if (ret < 0) - { - return ret; - } - - switch (param->fps) - { - case REGVAL_FPSTYPE_120FPS: - sensmode = REGVAL_SENSMODE_1_8; - break; - - case REGVAL_FPSTYPE_60FPS: - sensmode = REGVAL_SENSMODE_1_4; - break; - - case REGVAL_FPSTYPE_30FPS: - sensmode = REGVAL_SENSMODE_1_2; - break; - - default: - sensmode = REGVAL_SENSMODE_ALLPIX; - break; - } - - ret = isx012_putreg(priv, sensmode_regaddr, - sensmode, sizeof(uint8_t)); - if (ret < 0) - { - return ret; - } - - ret = isx012_putreg(priv, hsize_regaddr, - param->hsize, sizeof(uint16_t)); - if (ret < 0) - { - return ret; - } - - ret = isx012_putreg(priv, vsize_regaddr, - param->vsize, sizeof(uint16_t)); - if (ret < 0) - { - return ret; - } - - if (format == REGVAL_OUTFMT_INTERLEAVE) - { - ret = isx012_putreg(priv, HSIZE_TN, - param->int_hsize, sizeof(uint16_t)); - if (ret < 0) - { - return ret; - } - - ret = isx012_putreg(priv, VSIZE_TN, - param->int_vsize, sizeof(uint16_t)); - if (ret < 0) - { - return ret; - } - } - - return ret; -} - -void isx012_callback(uint8_t code, uint32_t size, uint32_t addr) -{ - enum v4l2_buf_type type; - FAR struct isx012_dev_s *priv = &g_isx012_private; - - if (priv->mode == REGVAL_MODESEL_CAP) - { - /* ISX012 capture mode => still capture */ - - type = V4L2_BUF_TYPE_STILL_CAPTURE; - } - else - { - /* ISX012 monitor/halfrelease/movie mode => video capture */ - - type = V4L2_BUF_TYPE_VIDEO_CAPTURE; - } - - video_common_notify_dma_done(code, type, size, priv->video_priv); - - return; -} - -/**************************************************************************** - * isx012_change_camera_mode - ****************************************************************************/ - -static int isx012_change_camera_mode(isx012_dev_t *priv, uint8_t mode) -{ - int ret = 0; - uint16_t format_addr; - uint8_t format_data; - uint32_t vifmode; -#ifdef ISX012_FRAME_SKIP_EN - uint8_t mask_num; - int i; -#endif /* ISX012_FRAME_SKIP_EN */ - - if (priv->state != STATE_ISX012_ACTIVE) - { - return -EPERM; - } - - switch (mode) - { - case REGVAL_MODESEL_MON: - case REGVAL_MODESEL_HREL: - format_addr = OUTFMT_MONI; - break; - - case REGVAL_MODESEL_MOV: - format_addr = OUTFMT_MOVIE; - break; - - case REGVAL_MODESEL_CAP: - format_addr = OUTFMT_CAP; - break; - - default: - return -EPERM; - } - - format_data = isx012_getreg(priv, format_addr, 1); - - switch (format_data) /* mode parallel */ - { - case REGVAL_OUTFMT_YUV: - vifmode = REGVAL_VIFMODE_YUV_PARALLEL; - break; - case REGVAL_OUTFMT_JPEG: - vifmode = REGVAL_VIFMODE_JPEG_PARALLEL; - break; - case REGVAL_OUTFMT_INTERLEAVE: - vifmode = REGVAL_VIFMODE_INTERLEAVE_PARALLEL; - break; - case REGVAL_OUTFMT_RGB: - vifmode = REGVAL_VIFMODE_RGB_PARALLEL; - break; - default: - vifmode = REGVAL_VIFMODE_YUV_PARALLEL; - break; - } - - ret = isx012_putreg(priv, VIFMODE, vifmode, sizeof(vifmode)); - if (ret < 0) - { - return ret; - } - - isx012_putreg(priv, INTCLR0, CM_CHANGED_STS, 1); - - ret = isx012_putreg(priv, MODESEL, mode, sizeof(mode)); - if (ret < 0) - { - return ret; - } - - /* Wait CM_CHANGED */ - - ret = isx012_chk_int_state(priv, CM_CHANGED_STS, - CAMERA_MODE_DELAY_TIME, - CAMERA_MODE_WAIT_TIME, - CAMERA_MODE_TIMEOUT); - if (ret != 0) - { - return ret; - } - -#ifdef ISX012_FRAME_SKIP_EN - if (mode != REGVAL_MODESEL_HREL) - { - isx012_putreg(priv, INTCLR0, VINT_STS, 1); - mask_num = isx012_getreg(priv, RO_MASK_NUM, sizeof(mask_num)); - for (i = 0; i < mask_num; i++) - { - /* Wait Next VINT */ - - ret = isx012_chk_int_state(priv, VINT_STS, VINT_DELAY_TIME, - VINT_WAIT_TIME, VINT_TIMEOUT); - if (ret != 0) - { - return ret; - } - } - } -#endif /* ISX012_FRAME_SKIP_EN */ - - return OK; -} - -/**************************************************************************** - * isx012_change_device_state - ****************************************************************************/ - -static int isx012_change_device_state(isx012_dev_t *priv, - isx012_state_t state) -{ - int ret = 0; -#ifdef ISX012_FRAME_SKIP_EN - int i; - uint8_t mute_cnt; -#endif /* ISX012_FRAME_SKIP_EN */ - - if (priv->state == STATE_ISX012_PRESLEEP || priv->state == state) - { - return -EPERM; - } - - switch (state) - { - case STATE_ISX012_SLEEP: - isx012_putreg(priv, INTCLR0, OM_CHANGED_STS, 1); - board_isx012_set_sleep(1); - break; - case STATE_ISX012_ACTIVE: - isx012_putreg(priv, INTCLR0, OM_CHANGED_STS | CM_CHANGED_STS, 1); - board_isx012_release_sleep(); - break; - case STATE_ISX012_PRESLEEP: - return -EPERM; - default: - return -EPERM; - } - - /* Wait OM_CHANGED */ - - ret = isx012_chk_int_state(priv, OM_CHANGED_STS, - DEVICE_STATE_DELAY_TIME, - DEVICE_STATE_WAIT_TIME, - DEVICE_STATE_TIMEOUT); - if (ret != 0) - { - return ret; - } - - priv->state = state; - - if (state == STATE_ISX012_ACTIVE) - { - /* Wait CM_CHANGED -> Monitoring */ - - ret = isx012_chk_int_state(priv, CM_CHANGED_STS, - CAMERA_MODE_DELAY_TIME, - CAMERA_MODE_WAIT_TIME, - CAMERA_MODE_TIMEOUT); - if (ret != 0) - { - return ret; - } - -#ifdef ISX012_FRAME_SKIP_EN - mute_cnt = isx012_getreg(priv, MUTECNT, sizeof(mute_cnt)); - isx012_putreg(priv, INTCLR0, VINT_STS, 1); - for (i = 0; i < mute_cnt; i++) - { - /* Wait Next VINT */ - - ret = isx012_chk_int_state(priv, VINT_STS, VINT_DELAY_TIME, - VINT_WAIT_TIME, VINT_TIMEOUT); - if (ret != 0) - { - return ret; - } - } -#endif /* ISX012_FRAME_SKIP_EN */ - } - - priv->mode = REGVAL_MODESEL_MON; - - return OK; -} - -int init_isx012(FAR struct isx012_dev_s *priv) -{ - int ret; - -#ifdef ISX012_NOT_USE_NSTBY - board_isx012_release_sleep(); - board_isx012_release_reset(); - nxsig_usleep(6000); -#else - board_isx012_release_reset(); - nxsig_usleep(6000); -#endif - -#ifdef ISX012_CHECK_IN_DETAIL - /* check the chip id */ - - ret = isx012_chipid(priv); - if (ret < 0) - { - imagererr("isx012_chipid failed: %d\n", ret); - board_isx012_set_reset(); - return ret; - } -#endif - - /* Wait OM_CHANGED Power OFF -> PreSleep */ - - ret = isx012_chk_int_state(priv, OM_CHANGED_STS, DEVICE_STATE_DELAY_TIME, - DEVICE_STATE_WAIT_TIME, DEVICE_STATE_TIMEOUT); - if (ret != OK) - { - imagererr("OM_CHANGED_STS(PreSleep) is Not occurred: %d\n", ret); - return ret; - } - - priv->state = STATE_ISX012_PRESLEEP; - -#ifndef ISX012_NOT_USE_NSTBY - /* set the isx012 clock */ - - /* Write INCK_SET register ISX012 change state PreSleep -> Sleep */ - - ret = isx012_putreglist(priv, g_isx012_presleep, ISX012_PRESLEEP_NENTRIES); - if (ret != OK) - { - imagererr("isx012_putreglist(INCK_SET) failed: %d\n", ret); - return ret; - } - - /* Wait OM_CHANGED PreSleep -> Sleep */ - - ret = isx012_chk_int_state(priv, OM_CHANGED_STS, DEVICE_STATE_DELAY_TIME, - DEVICE_STATE_WAIT_TIME, DEVICE_STATE_TIMEOUT); - if (ret != OK) - { - imagererr("OM_CHANGED_STS(Sleep) is Not occurred: %d\n", ret); - return ret; - } -#endif - - priv->state = STATE_ISX012_SLEEP; - priv->i2c_freq = I2CFREQ_FAST; - - /* initialize the isx012 hardware */ - - ret = isx012_putreglist(priv, g_isx012_def_init, ISX012_RESET_NENTRIES); - if (ret < 0) - { - imagererr("isx012_putreglist failed: %d\n", ret); - board_isx012_set_reset(); - return ret; - } - - /* Set shading adjustment */ - - ret = isx012_set_shd(priv); - if (ret < 0) - { - imagererr("isx012_set_shd failed: %d\n", ret); - board_isx012_set_reset(); - return ret; - } - - /* monitor mode default format: YUV4:2:2 QVGA */ - - priv->param.video.fps = REGVAL_FPSTYPE_30FPS; - priv->param.video.format = V4L2_PIX_FMT_UYVY; - priv->param.video.hsize = VIDEO_HSIZE_QVGA; - priv->param.video.vsize = VIDEO_VSIZE_QVGA; - priv->param.video.int_hsize = 0; - priv->param.video.int_vsize = 0; - - ret = isx012_set_mode_param(priv, - V4L2_BUF_TYPE_VIDEO_CAPTURE, - &priv->param.video); - if (ret < 0) - { - board_isx012_set_reset(); - return ret; - } - - /* capture mode default format: JPEG FULLHD */ - - priv->param.still.fps = REGVAL_FPSTYPE_15FPS; - priv->param.still.format = V4L2_PIX_FMT_JPEG; - priv->param.still.hsize = VIDEO_HSIZE_FULLHD; - priv->param.still.vsize = VIDEO_VSIZE_FULLHD; - priv->param.still.int_hsize = 0; - priv->param.still.int_vsize = 0; - - ret = isx012_set_mode_param(priv, - V4L2_BUF_TYPE_STILL_CAPTURE, - &priv->param.still); - if (ret < 0) - { - board_isx012_set_reset(); - return ret; - } - - return ret; -} - -static int isx012_open(FAR void *video_private) -{ - FAR struct isx012_dev_s *priv = &g_isx012_private; - int ret = 0; - - ret = board_isx012_power_on(); - if (ret < 0) - { - imagererr("Failed to power on %d\n", ret); - return ret; - } - - ret = init_isx012(priv); - if (ret < 0) - { - imagererr("Failed to init_isx012 %d\n", ret); - board_isx012_set_reset(); - board_isx012_power_off(); - return ret; - } - - ret = cxd56_cisifinit(); - if (ret < 0) - { - imagererr("Fail cxd56_cisifinit %d\n", ret); - return ret; - } - - /* Save video private information address */ - - g_isx012_private.video_priv = video_private; - - return ret; -} - -static int isx012_close(void) -{ - FAR struct isx012_dev_s *priv = &g_isx012_private; - - g_isx012_private.video_priv = NULL; - - int ret = 0; - - if (priv->state == STATE_ISX012_ACTIVE) - { - board_isx012_set_sleep(1); - } - - board_isx012_set_reset(); - - ret = board_isx012_power_off(); - if (ret < 0) - { - imagererr("Failed to power off %d\n", ret); - return ret; - } - - ret = cxd56_cisifstopcapture(); - if (ret < 0) - { - imagererr("Fail cxd56_cisifstopcapture %d\n", ret); - return ret; - } - - ret = cxd56_cisiffinalize(); - if (ret < 0) - { - imagererr("Fail cxd56_cisiffinalize %d\n", ret); - return ret; - } - - priv->i2c_freq = I2CFREQ_STANDARD; - priv->state = STATE_ISX012_POWEROFF; - - return ret; -} - -static int isx012_do_halfpush(bool enable) -{ - FAR struct isx012_dev_s *priv = &g_isx012_private; - uint8_t mode; - int ret = -EPERM; - - if (enable) - { - /* state transition : MONITORING -> HALFRELEASE */ - - if (priv->mode == REGVAL_MODESEL_MON) - { - mode = REGVAL_MODESEL_HREL; - ret = OK; - } - } - else - { - /* state transition : HALFRELEASE -> MONITORING */ - - if (priv->mode == REGVAL_MODESEL_HREL) - { - mode = REGVAL_MODESEL_MON; - ret = OK; - } - } - - if (ret == OK) - { - ret = isx012_change_camera_mode(priv, mode); - if (ret == OK) - { - priv->mode = mode; - } - } - - return ret; -} - -static int isx012_set_buftype(enum v4l2_buf_type type) -{ - FAR struct isx012_dev_s *priv = &g_isx012_private; - uint8_t mode; - int ret = OK; - - if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE) - { - if (priv->mode == REGVAL_MODESEL_HREL) - { - /* state transition : HALFRELEASE -> HALFRELEASE */ - - mode = REGVAL_MODESEL_HREL; - } - else - { - /* state transition : CAPTURE -> MONITORING - * or MONITORING -> MONITORING - */ - - if (is_movie_needed(&priv->param.video)) - { - mode = REGVAL_MODESEL_MOV; - } - else - { - mode = REGVAL_MODESEL_MON; - } - } - } - else - { - /* state transition : any -> CAPTURE */ - - mode = REGVAL_MODESEL_CAP; - } - - /* In no active case, activate */ - - if (priv->state != STATE_ISX012_ACTIVE) - { - isx012_change_device_state(priv, STATE_ISX012_ACTIVE); - } - - if (mode != priv->mode) - { - ret = isx012_change_camera_mode(priv, mode); - if (ret == OK) - { - priv->mode = mode; - } - } - - return ret; -} - -static int isx012_set_buf(uint32_t bufaddr, uint32_t bufsize) -{ - int ret; - FAR struct isx012_dev_s *priv = &g_isx012_private; - isx012_modeparam_t *mode_param = NULL; - - cisif_param_t cis_param = - { - 0 - }; - - cisif_sarea_t sarea = - { - 0 - }; - - sarea.strg_addr = (uint8_t *)bufaddr; - sarea.strg_size = bufsize; - - if (priv->dma_state) - { - ret = cxd56_cisifsetdmabuf(&sarea); - } - else - { - if (priv->mode == REGVAL_MODESEL_CAP) - { - mode_param = &priv->param.still; - } - else - { - mode_param = &priv->param.video; - } - - switch (mode_param->format) - { - case V4L2_PIX_FMT_UYVY: /* Set YUV 4:2:2 information */ - - cis_param.yuv_param.hsize = mode_param->hsize; - cis_param.yuv_param.vsize = mode_param->vsize; - - break; - - case V4L2_PIX_FMT_JPEG: /* Set JPEG information */ - - /* no setting */ - - break; - - case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: /* Set JPEG + YUV 4:2:2 information */ - - cis_param.yuv_param.hsize = mode_param->int_hsize; - cis_param.yuv_param.vsize = mode_param->int_vsize; - - break; - - default: /* Unsupported format */ - - return -EINVAL; - } - - cis_param.format = mode_param->format; - cis_param.comp_func = isx012_callback; - - ret = cxd56_cisifstartcapture(&cis_param, &sarea); - if (ret != OK) - { - return ret; - } - - priv->dma_state = true; - } - - return ret; -} - -static int isx012_cancel_dma(void) -{ - int ret; - FAR struct isx012_dev_s *priv = &g_isx012_private; - - ret = cxd56_cisifstopcapture(); - if (ret != OK) - { - return ret; - } - - priv->dma_state = false; - return ret; -} - -static int isx012_check_fmt(enum v4l2_buf_type buf_type, - uint32_t pixel_format) -{ - switch (buf_type) - { - case V4L2_BUF_TYPE_VIDEO_CAPTURE: - case V4L2_BUF_TYPE_STILL_CAPTURE: - if ((pixel_format != V4L2_PIX_FMT_JPEG) && - (pixel_format != V4L2_PIX_FMT_JPEG_WITH_SUBIMG) && - (pixel_format != V4L2_PIX_FMT_UYVY)) - { - /* Unsupported format */ - - return -EINVAL; - } - - break; - - default: /* Unsupported type */ - - return -EINVAL; - } - - return OK; -} - -static int isx012_get_range_of_fmt(FAR struct v4l2_fmtdesc *format) -{ - if (format == NULL) - { - return -EINVAL; - } - - switch (format->type) - { - case V4L2_BUF_TYPE_VIDEO_CAPTURE: - case V4L2_BUF_TYPE_STILL_CAPTURE: - switch (format->index) - { - case 0: /* JPEG */ - - strncpy(format->description, "JPEG", V4L2_FMT_DSC_MAX); - format->pixelformat = V4L2_PIX_FMT_JPEG; - - break; - - case 1: /* JPEG + YUV 4:2:2 */ - - strncpy(format->description, - "JPEG + YUV 4:2:2", - V4L2_FMT_DSC_MAX); - format->pixelformat = V4L2_PIX_FMT_JPEG_WITH_SUBIMG; - format->subimg_pixelformat = V4L2_PIX_FMT_UYVY; - - break; - - case 2: /* YUV 4:2:2 */ - - strncpy(format->description, "YUV 4:2:2", V4L2_FMT_DSC_MAX); - format->pixelformat = V4L2_PIX_FMT_UYVY; - - break; - - default: /* 3, 4, ... */ - return -EINVAL; - } - - break; - - default: /* Unsupported type */ - - return -EINVAL; - } - - return OK; -} - -static int isx012_get_range_of_framesize( - FAR struct v4l2_frmsizeenum *frmsize) -{ - int ret; - - if (frmsize == NULL) - { - return -EINVAL; - } - - if (frmsize->index != 0) - { - return -EINVAL; - } - - ret = isx012_check_fmt(frmsize->buf_type, frmsize->pixel_format); - if (ret != OK) - { - return ret; - } - - switch (frmsize->pixel_format) - { - case V4L2_PIX_FMT_UYVY: /* YUV 4:2:2 */ - frmsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; - frmsize->stepwise.min_width = OUT_YUV_HSIZE_MIN; - frmsize->stepwise.max_width = OUT_YUV_15FPS_HSIZE_MAX; - frmsize->stepwise.step_width = ISX012_SIZE_STEP; - frmsize->stepwise.min_height = OUT_YUV_VSIZE_MIN; - frmsize->stepwise.max_height = OUT_YUV_15FPS_VSIZE_MAX; - frmsize->stepwise.step_height = ISX012_SIZE_STEP; - - break; - - case V4L2_PIX_FMT_JPEG: /* JPEG */ - frmsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; - frmsize->stepwise.min_width = OUT_JPG_HSIZE_MIN; - frmsize->stepwise.max_width = OUT_JPG_15FPS_HSIZE_MAX; - frmsize->stepwise.step_width = ISX012_SIZE_STEP; - frmsize->stepwise.min_height = OUT_JPG_VSIZE_MIN; - frmsize->stepwise.max_height = OUT_JPG_15FPS_VSIZE_MAX; - frmsize->stepwise.step_height = ISX012_SIZE_STEP; - - break; - - case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: /* JPEG + YUV 4:2:2 */ - if (frmsize->subimg_pixel_format != V4L2_PIX_FMT_UYVY) - { - /* Unsupported pixel format */ - - return -EINVAL; - } - - frmsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; - frmsize->stepwise.min_width = OUT_JPG_HSIZE_MIN; - frmsize->stepwise.max_width = OUT_JPGINT_15FPS_HSIZE_MAX; - frmsize->stepwise.step_width = ISX012_SIZE_STEP; - frmsize->stepwise.min_height = OUT_JPG_VSIZE_MIN; - frmsize->stepwise.max_height = OUT_JPGINT_15FPS_VSIZE_MAX; - frmsize->stepwise.step_height = ISX012_SIZE_STEP; - - frmsize->subimg_type = V4L2_FRMSIZE_TYPE_STEPWISE; - frmsize->subimg.stepwise.min_width = OUT_YUV_HSIZE_MIN; - frmsize->subimg.stepwise.max_width = OUT_YUVINT_30FPS_HSIZE_MAX; - frmsize->subimg.stepwise.step_width = ISX012_SIZE_STEP; - frmsize->subimg.stepwise.min_height = OUT_YUV_VSIZE_MIN; - frmsize->subimg.stepwise.max_height = OUT_YUVINT_30FPS_VSIZE_MAX; - frmsize->subimg.stepwise.step_height = ISX012_SIZE_STEP; - - break; - - default: /* Unsupported pixel format */ - - return -EINVAL; - } - - return OK; -} - -static int isx012_try_format(FAR struct v4l2_format *format) -{ - int ret; - FAR struct v4l2_frmsizeenum support; - - if (format == NULL) - { - return -EINVAL; - } - - /* Get supported frame size information */ - - support.index = 0; - support.buf_type = format->type; - support.pixel_format = format->fmt.pix.pixelformat; - support.subimg_pixel_format = format->fmt.pix.subimg_pixelformat; - - ret = isx012_get_range_of_framesize(&support); - if (ret != OK) - { - return ret; - } - - CHECK_RANGE(format->fmt.pix.width, - support.stepwise.min_width, - support.stepwise.max_width, - support.stepwise.step_width); - - CHECK_RANGE(format->fmt.pix.height, - support.stepwise.min_height, - support.stepwise.max_height, - support.stepwise.step_height); - - if (support.pixel_format == V4L2_PIX_FMT_JPEG_WITH_SUBIMG) - { - CHECK_RANGE(format->fmt.pix.subimg_width, - support.subimg.stepwise.min_width, - support.subimg.stepwise.max_width, - support.subimg.stepwise.step_width); - - CHECK_RANGE(format->fmt.pix.subimg_height, - support.subimg.stepwise.min_height, - support.subimg.stepwise.max_height, - support.subimg.stepwise.step_height); - } - - return OK; -} - -static int isx012_set_format(FAR struct v4l2_format *format) -{ - int ret; - int8_t max_fps; - struct v4l2_frmivalenum frmival; - isx012_modeparam_t mode_param; - FAR isx012_modeparam_t *current_param; - FAR struct isx012_dev_s *priv = &g_isx012_private; - - ret = isx012_try_format(format); - if (ret < 0) - { - return ret; - } - - frmival.index = 0; - frmival.buf_type = format->type; - frmival.pixel_format = format->fmt.pix.pixelformat; - frmival.width = format->fmt.pix.width; - frmival.height = format->fmt.pix.height; - frmival.subimg_pixel_format = format->fmt.pix.subimg_pixelformat; - frmival.subimg_width = format->fmt.pix.subimg_width; - frmival.subimg_height = format->fmt.pix.subimg_height; - - max_fps = isx012_get_maximum_fps(&frmival); - if (max_fps < 0) - { - return max_fps; - } - - switch (format->type) - { - case V4L2_BUF_TYPE_VIDEO_CAPTURE: - current_param = &priv->param.video; - break; - - case V4L2_BUF_TYPE_STILL_CAPTURE: - current_param = &priv->param.still; - break; - - default: - return -EINVAL; - } - - memcpy(&mode_param, current_param, sizeof(mode_param)); - - mode_param.format = format->fmt.pix.pixelformat; - mode_param.hsize = format->fmt.pix.width; - mode_param.vsize = format->fmt.pix.height; - mode_param.int_hsize = format->fmt.pix.subimg_width; - mode_param.int_vsize = format->fmt.pix.subimg_height; - - if (mode_param.fps < max_fps) - { - mode_param.fps = max_fps; - } - - ret = isx012_set_mode_param(priv, - format->type, - &mode_param); - if (ret != OK) - { - return ret; - } - - memcpy(current_param, &mode_param, sizeof(mode_param)); - - return OK; -} - -static int isx012_set_supported_frminterval(uint32_t fps_index, - FAR struct v4l2_fract *interval) -{ - switch (fps_index) - { - case REGVAL_FPSTYPE_120FPS: - interval->numerator = 1; - interval->denominator = 120; - - break; - - case REGVAL_FPSTYPE_60FPS: - interval->numerator = 1; - interval->denominator = 60; - - break; - - case REGVAL_FPSTYPE_30FPS: - interval->numerator = 1; - interval->denominator = 30; - - break; - - case REGVAL_FPSTYPE_15FPS: - interval->numerator = 1; - interval->denominator = 15; - - break; - - case REGVAL_FPSTYPE_7_5FPS: - interval->numerator = 2; - interval->denominator = 15; - - break; - - case REGVAL_FPSTYPE_6FPS: - interval->numerator = 1; - interval->denominator = 6; - - break; - - case REGVAL_FPSTYPE_5FPS: - interval->numerator = 1; - interval->denominator = 5; - - break; - - default: - return -EINVAL; - } - - return OK; -} - -static int8_t isx012_get_maximum_fps(FAR struct v4l2_frmivalenum *frmival) -{ - int ret; - uint8_t max_fps = REGVAL_FPSTYPE_120FPS; - - if (frmival == NULL) - { - return -EINVAL; - } - - ret = isx012_check_fmt(frmival->buf_type, frmival->pixel_format); - if (ret != OK) - { - return ret; - } - - switch (frmival->pixel_format) - { - case V4L2_PIX_FMT_UYVY: /* YUV 4:2:2 */ - if ((frmival->width < OUT_YUV_HSIZE_MIN) || - (frmival->height < OUT_YUV_VSIZE_MIN) || - (frmival->width > OUT_YUV_15FPS_HSIZE_MAX) || - (frmival->height > OUT_YUV_15FPS_VSIZE_MAX)) - { - /* IN frame size is out of range */ - - return -EINVAL; - } - else if ((frmival->width <= OUT_YUV_120FPS_HSIZE_MAX) && - (frmival->height <= OUT_YUV_120FPS_VSIZE_MAX)) - { - /* support 120FPS, 60FPS, 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ - - max_fps = REGVAL_FPSTYPE_120FPS; - } - else - { - /* support 60FPS, 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ - - max_fps = REGVAL_FPSTYPE_60FPS; - } - - break; - - case V4L2_PIX_FMT_JPEG: /* JPEG */ - if ((frmival->width < OUT_JPG_HSIZE_MIN) || - (frmival->height < OUT_JPG_VSIZE_MIN) || - (frmival->width > OUT_JPG_15FPS_HSIZE_MAX) || - (frmival->height > OUT_JPG_15FPS_VSIZE_MAX)) - { - /* IN frame size is out of range */ - - return -EINVAL; - } - else if ((frmival->width <= OUT_JPG_120FPS_HSIZE_MAX) && - (frmival->height <= OUT_JPG_120FPS_VSIZE_MAX)) - { - /* support 120FPS, 60FPS, 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ - - max_fps = REGVAL_FPSTYPE_120FPS; - } - else if ((frmival->width <= OUT_JPG_60FPS_HSIZE_MAX) && - (frmival->height <= OUT_JPG_60FPS_VSIZE_MAX)) - { - /* support 60FPS, 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ - - max_fps = REGVAL_FPSTYPE_60FPS; - } - else if ((frmival->width <= OUT_JPG_30FPS_HSIZE_MAX) && - (frmival->height <= OUT_JPG_30FPS_VSIZE_MAX)) - { - /* support 30FPS, 15FPS, 7.5FPS, 6FPS, and 5FPS */ - - max_fps = REGVAL_FPSTYPE_30FPS; - } - else - { - /* support 15FPS, 7.5FPS, 6FPS, and 5FPS */ - - max_fps = REGVAL_FPSTYPE_15FPS; - } - - break; - - case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: /* JPEG + YUV 4:2:2 */ - if (frmival->subimg_pixel_format != V4L2_PIX_FMT_UYVY) - { - /* Unsupported pixel format */ - - return -EINVAL; - } - - if ((frmival->width < OUT_JPG_HSIZE_MIN) || - (frmival->height < OUT_JPG_VSIZE_MIN) || - (frmival->width > OUT_JPGINT_15FPS_HSIZE_MAX) || - (frmival->height > OUT_JPGINT_15FPS_VSIZE_MAX) || - (frmival->subimg_width < OUT_YUV_HSIZE_MIN) || - (frmival->subimg_height < OUT_YUV_VSIZE_MIN) || - (frmival->subimg_width > OUT_YUVINT_30FPS_HSIZE_MAX) || - (frmival->subimg_height > OUT_YUVINT_30FPS_VSIZE_MAX)) - { - /* IN frame size is out of range */ - - return -EINVAL; - } - else if ((frmival->width <= OUT_JPGINT_30FPS_HSIZE_MAX) && - (frmival->height <= OUT_JPGINT_30FPS_VSIZE_MAX)) - { - /* support 30FPS, 15FPS, 7.5FPS, 6FPS, 5FPS */ - - max_fps = REGVAL_FPSTYPE_30FPS; - } - else - { - /* support 15FPS, 7.5FPS, 6FPS, 5FPS */ - - max_fps = REGVAL_FPSTYPE_15FPS; - } - - break; - - default: - return -EINVAL; - } - - return (int8_t)max_fps; -} - -static int isx012_get_range_of_frameinterval - (FAR struct v4l2_frmivalenum *frmival) -{ - int ret; - int8_t max_fps; - - max_fps = isx012_get_maximum_fps(frmival); - if (max_fps < 0) - { - return max_fps; - } - - frmival->type = V4L2_FRMIVAL_TYPE_DISCRETE; - ret = isx012_set_supported_frminterval(frmival->index + max_fps, - &frmival->discrete); - return ret; -} - -static int isx012_change_fraction_to_fps(FAR struct v4l2_fract *interval) -{ - if (interval->denominator == interval->numerator * 120) /* 120FPS */ - { - return REGVAL_FPSTYPE_120FPS; - } - else if(interval->denominator == interval->numerator * 60) /* 60FPS */ - { - return REGVAL_FPSTYPE_60FPS; - } - else if(interval->denominator == interval->numerator * 30) /* 30FPS */ - { - return REGVAL_FPSTYPE_30FPS; - } - else if(interval->denominator == interval->numerator * 15) /* 15FPS */ - { - return REGVAL_FPSTYPE_15FPS; - } - else if(interval->denominator * 10 == interval->numerator * 75) /* 7.5FPS */ - { - return REGVAL_FPSTYPE_7_5FPS; - } - else if(interval->denominator == interval->numerator * 6) /* 6FPS */ - { - return REGVAL_FPSTYPE_6FPS; - } - else if(interval->denominator == interval->numerator * 5) /* 5FPS */ - { - return REGVAL_FPSTYPE_5FPS; - } - else - { - return -EINVAL; - } -} - -static int isx012_set_frameinterval(FAR struct v4l2_streamparm *parm) -{ - int ret; - int8_t fps; - int8_t max_fps; - isx012_modeparam_t mode_param; - FAR isx012_modeparam_t *current_param; - struct v4l2_frmivalenum frmival; - FAR struct isx012_dev_s *priv = &g_isx012_private; - - fps = isx012_change_fraction_to_fps(&parm->parm.capture.timeperframe); - if (fps < 0) - { - return fps; - } - - frmival.buf_type = parm->type; - switch (frmival.buf_type) - { - case V4L2_BUF_TYPE_VIDEO_CAPTURE: - current_param = &priv->param.video; - break; - - case V4L2_BUF_TYPE_STILL_CAPTURE: - current_param = &priv->param.still; - break; - - default: - return -EINVAL; - } - - memcpy(&mode_param, current_param, sizeof(mode_param)); - - /* Get maximum fps settable value in current image format */ - - frmival.pixel_format = mode_param.format; - frmival.height = mode_param.vsize; - frmival.width = mode_param.hsize; - frmival.subimg_pixel_format = V4L2_PIX_FMT_UYVY; - frmival.subimg_height = mode_param.int_vsize; - frmival.subimg_width = mode_param.int_hsize; - max_fps = isx012_get_maximum_fps(&frmival); - if (max_fps < 0) - { - return fps; - } - - if (fps < max_fps) - { - return -EINVAL; - } - - mode_param.fps = fps; - - ret = isx012_set_mode_param(priv, - parm->type, - &mode_param); - if (ret != OK) - { - return ret; - } - - memcpy(current_param, &mode_param, sizeof(mode_param)); - - return OK; -} - -static int isx012_get_range_of_ctrlval(FAR struct v4l2_query_ext_ctrl *range) -{ - if (range == NULL) - { - return -EINVAL; - } - - switch (range->ctrl_class) - { - case V4L2_CTRL_CLASS_USER: - switch (range->id) - { - case V4L2_CID_BRIGHTNESS: - range->type = ISX012_TYPE_BRIGHTNESS; - range->minimum = ISX012_MIN_BRIGHTNESS; - range->maximum = ISX012_MAX_BRIGHTNESS; - range->step = ISX012_STEP_BRIGHTNESS; - range->default_value = ISX012_DEF_BRIGHTNESS; - strncpy(range->name, - ISX012_NAME_BRIGHTNESS, - sizeof(range->name)); - - break; - - case V4L2_CID_CONTRAST: - range->type = ISX012_TYPE_CONTRAST; - range->minimum = ISX012_MIN_CONTRAST; - range->maximum = ISX012_MAX_CONTRAST; - range->step = ISX012_STEP_CONTRAST; - range->default_value = ISX012_DEF_CONTRAST; - strncpy(range->name, - ISX012_NAME_CONTRAST, - sizeof(range->name)); - - break; - - case V4L2_CID_SATURATION: - range->type = ISX012_TYPE_SATURATION; - range->minimum = ISX012_MIN_SATURATION; - range->maximum = ISX012_MAX_SATURATION; - range->step = ISX012_STEP_SATURATION; - range->default_value = ISX012_DEF_SATURATION; - strncpy(range->name, - ISX012_NAME_SATURATION, - sizeof(range->name)); - - break; - - case V4L2_CID_HUE: - range->type = ISX012_TYPE_HUE; - range->minimum = ISX012_MIN_HUE; - range->maximum = ISX012_MAX_HUE; - range->step = ISX012_STEP_HUE; - range->default_value = ISX012_DEF_HUE; - strncpy(range->name, - ISX012_NAME_HUE, - sizeof(range->name)); - - break; - - case V4L2_CID_AUTO_WHITE_BALANCE: - range->type = ISX012_TYPE_AUTOWB; - range->minimum = ISX012_MIN_AUTOWB; - range->maximum = ISX012_MAX_AUTOWB; - range->step = ISX012_STEP_AUTOWB; - range->default_value = ISX012_DEF_AUTOWB; - strncpy(range->name, - ISX012_NAME_AUTOWB, - sizeof(range->name)); - - break; - case V4L2_CID_GAMMA_CURVE: - range->type = ISX012_TYPE_GAMMACURVE; - range->minimum = ISX012_MIN_GAMMACURVE; - range->maximum = ISX012_MAX_GAMMACURVE; - range->step = ISX012_STEP_GAMMACURVE; - range->default_value = ISX012_DEF_GAMMACURVE; - strncpy(range->name, - ISX012_NAME_GAMMACURVE, - sizeof(range->name)); - - break; - - case V4L2_CID_EXPOSURE: - range->type = ISX012_TYPE_EXPOSURE; - range->minimum = ISX012_MIN_EXPOSURE; - range->maximum = ISX012_MAX_EXPOSURE; - range->step = ISX012_STEP_EXPOSURE; - range->default_value = ISX012_DEF_EXPOSURE; - strncpy(range->name, - ISX012_NAME_EXPOSURE, - sizeof(range->name)); - - break; - - case V4L2_CID_HFLIP: - range->type = ISX012_TYPE_HFLIP; - range->minimum = ISX012_MIN_HFLIP; - range->maximum = ISX012_MAX_HFLIP; - range->step = ISX012_STEP_HFLIP; - range->default_value = ISX012_DEF_HFLIP; - strncpy(range->name, - ISX012_NAME_HFLIP, - sizeof(range->name)); - - break; - - case V4L2_CID_VFLIP: - range->type = ISX012_TYPE_VFLIP; - range->minimum = ISX012_MIN_VFLIP; - range->maximum = ISX012_MAX_VFLIP; - range->step = ISX012_STEP_VFLIP; - range->default_value = ISX012_DEF_VFLIP; - strncpy(range->name, - ISX012_NAME_VFLIP, - sizeof(range->name)); - - break; - - case V4L2_CID_HFLIP_STILL: - range->type = ISX012_TYPE_HFLIP_STILL; - range->minimum = ISX012_MIN_HFLIP_STILL; - range->maximum = ISX012_MAX_HFLIP_STILL; - range->step = ISX012_STEP_HFLIP_STILL; - range->default_value = ISX012_DEF_HFLIP_STILL; - strncpy(range->name, - ISX012_NAME_HFLIP_STILL, - sizeof(range->name)); - - break; - - case V4L2_CID_VFLIP_STILL: - range->type = ISX012_TYPE_VFLIP_STILL; - range->minimum = ISX012_MIN_VFLIP_STILL; - range->maximum = ISX012_MAX_VFLIP_STILL; - range->step = ISX012_STEP_VFLIP_STILL; - range->default_value = ISX012_DEF_VFLIP_STILL; - strncpy(range->name, - ISX012_NAME_VFLIP_STILL, - sizeof(range->name)); - - break; - - case V4L2_CID_SHARPNESS: - range->type = ISX012_TYPE_SHARPNESS; - range->minimum = ISX012_MIN_SHARPNESS; - range->maximum = ISX012_MAX_SHARPNESS; - range->step = ISX012_STEP_SHARPNESS; - range->default_value = ISX012_DEF_SHARPNESS; - strncpy(range->name, - ISX012_NAME_SHARPNESS, - sizeof(range->name)); - - break; - - case V4L2_CID_COLOR_KILLER: - range->type = ISX012_TYPE_COLORKILLER; - range->minimum = ISX012_MIN_COLORKILLER; - range->maximum = ISX012_MAX_COLORKILLER; - range->step = ISX012_STEP_COLORKILLER; - range->default_value = ISX012_DEF_COLORKILLER; - strncpy(range->name, - ISX012_NAME_COLORKILLER, - sizeof(range->name)); - - break; - - case V4L2_CID_COLORFX: - range->type = ISX012_TYPE_COLOREFFECT; - range->minimum = ISX012_MIN_COLOREFFECT; - range->maximum = ISX012_MAX_COLOREFFECT; - range->step = ISX012_STEP_COLOREFFECT; - range->default_value = ISX012_DEF_COLOREFFECT; - strncpy(range->name, - ISX012_NAME_COLOREFFECT, - sizeof(range->name)); - - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - case V4L2_CTRL_CLASS_CAMERA: - switch (range->id) - { - case V4L2_CID_EXPOSURE_AUTO: - range->type = ISX012_TYPE_EXPOSUREAUTO; - range->minimum = ISX012_MIN_EXPOSUREAUTO; - range->maximum = ISX012_MAX_EXPOSUREAUTO; - range->step = ISX012_STEP_EXPOSUREAUTO; - range->default_value = ISX012_DEF_EXPOSUREAUTO; - strncpy(range->name, - ISX012_NAME_EXPOSUREAUTO, - sizeof(range->name)); - - break; - - case V4L2_CID_EXPOSURE_ABSOLUTE: - range->type = ISX012_TYPE_EXPOSURETIME; - range->minimum = ISX012_MIN_EXPOSURETIME; - range->maximum = ISX012_MAX_EXPOSURETIME; - range->step = ISX012_STEP_EXPOSURETIME; - range->default_value = ISX012_DEF_EXPOSURETIME; - strncpy(range->name, - ISX012_NAME_EXPOSURETIME, - sizeof(range->name)); - - break; - - case V4L2_CID_EXPOSURE_METERING: - range->type = ISX012_TYPE_PHOTOMETRY; - range->minimum = ISX012_MIN_PHOTOMETRY; - range->maximum = ISX012_MAX_PHOTOMETRY; - range->step = ISX012_STEP_PHOTOMETRY; - range->default_value = ISX012_DEF_PHOTOMETRY; - strncpy(range->name, - ISX012_NAME_PHOTOMETRY, - sizeof(range->name)); - - break; - - case V4L2_CID_ZOOM_ABSOLUTE: - range->type = ISX012_TYPE_ZOOM; - range->minimum = ISX012_MIN_ZOOM; - range->maximum = ISX012_MAX_ZOOM; - range->step = ISX012_STEP_ZOOM; - range->default_value = ISX012_DEF_ZOOM; - strncpy(range->name, - ISX012_NAME_ZOOM, - sizeof(range->name)); - - break; - - case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: - range->type = ISX012_TYPE_PRESETWB; - range->minimum = ISX012_MIN_PRESETWB; - range->maximum = ISX012_MAX_PRESETWB; - range->step = ISX012_STEP_PRESETWB; - range->default_value = ISX012_DEF_PRESETWB; - strncpy(range->name, - ISX012_NAME_PRESETWB, - sizeof(range->name)); - - break; - - case V4L2_CID_WIDE_DYNAMIC_RANGE: - range->type = ISX012_TYPE_YGAMMA; - range->minimum = ISX012_MIN_YGAMMA; - range->maximum = ISX012_MAX_YGAMMA; - range->step = ISX012_STEP_YGAMMA; - range->default_value = ISX012_DEF_YGAMMA; - strncpy(range->name, - ISX012_NAME_YGAMMA, - sizeof(range->name)); - - break; - - case V4L2_CID_ISO_SENSITIVITY: - range->type = ISX012_TYPE_ISO; - range->minimum = ISX012_MIN_ISO; - range->maximum = ISX012_MAX_ISO; - range->step = ISX012_STEP_ISO; - range->default_value = ISX012_DEF_ISO; - strncpy(range->name, - ISX012_NAME_ISO, - sizeof(range->name)); - - break; - - case V4L2_CID_ISO_SENSITIVITY_AUTO: - range->type = ISX012_TYPE_ISOAUTO; - range->minimum = ISX012_MIN_ISOAUTO; - range->maximum = ISX012_MAX_ISOAUTO; - range->step = ISX012_STEP_ISOAUTO; - range->default_value = ISX012_DEF_ISOAUTO; - strncpy(range->name, - ISX012_NAME_ISOAUTO, - sizeof(range->name)); - - break; - - case V4L2_CID_3A_LOCK: - range->type = ISX012_TYPE_3ALOCK; - range->minimum = ISX012_MIN_3ALOCK; - range->maximum = ISX012_MAX_3ALOCK; - range->step = ISX012_STEP_3ALOCK; - range->default_value = ISX012_DEF_3ALOCK; - strncpy(range->name, - ISX012_NAME_3ALOCK, - sizeof(range->name)); - - break; - - case V4L2_CID_3A_PARAMETER: - range->type = V4L2_CTRL_TYPE_U16; - range->minimum = 0; - range->maximum = 65535; - range->step = 1; - range->elems = 3; - strncpy(range->name, - "AWB/AE parameter", - sizeof(range->name)); - - break; - - case V4L2_CID_3A_STATUS: - range->type = V4L2_CTRL_TYPE_INTEGER; - range->minimum = 0; - range->maximum = 3; - range->step = 1; - strncpy(range->name, - "AWB/AE status", - sizeof(range->name)); - - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - case V4L2_CTRL_CLASS_JPEG: - switch (range->id) - { - case V4L2_CID_JPEG_COMPRESSION_QUALITY: - range->type = ISX012_TYPE_JPGQUALITY; - range->minimum = ISX012_MIN_JPGQUALITY; - range->maximum = ISX012_MAX_JPGQUALITY; - range->step = ISX012_STEP_JPGQUALITY; - range->default_value = ISX012_DEF_JPGQUALITY; - strncpy(range->name, - ISX012_NAME_JPGQUALITY, - sizeof(range->name)); - - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - default: /* Unsupported control class */ - - return -EINVAL; - } - - return OK; -} - -static int isx012_get_menu_of_ctrlval(FAR struct v4l2_querymenu *menu) -{ - if (menu == NULL) - { - return -EINVAL; - } - - switch (menu->ctrl_class) - { - case V4L2_CTRL_CLASS_USER: - switch (menu->id) - { - case V4L2_CID_COLORFX: - if (menu->index > ISX012_MAX_COLOREFFECT) - { - return -EINVAL; - } - - menu->value = g_isx012_supported_colorfx[menu->index].v4l2; - - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - case V4L2_CTRL_CLASS_CAMERA: - switch (menu->id) - { - case V4L2_CID_EXPOSURE_METERING: - if (menu->index > ISX012_MAX_PHOTOMETRY) - { - return -EINVAL; - } - - menu->value = g_isx012_supported_photometry[menu->index].v4l2; - - break; - - case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: - if (menu->index > ISX012_MAX_PRESETWB) - { - return -EINVAL; - } - - menu->value = g_isx012_supported_presetwb[menu->index].v4l2; - - break; - - case V4L2_CID_ISO_SENSITIVITY: - if (menu->index > ISX012_MAX_ISO) - { - return -EINVAL; - } - - menu->value = g_isx012_supported_iso[menu->index].v4l2; - - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - default: /* Unsupported control class */ - - return -EINVAL; - } - - return OK; -} - -static int isx012_get_ctrlval(uint16_t ctrl_class, - FAR struct v4l2_ext_control *control) -{ - FAR struct isx012_dev_s *priv = &g_isx012_private; - int16_t readvalue; - uint8_t cnt; - uint8_t threea_enable; - uint16_t read_src; - uint16_t *read_dst; - int ret = -EINVAL; - - if (control == NULL) - { - return -EINVAL; - } - - switch (ctrl_class) - { - case V4L2_CTRL_CLASS_USER: - switch (control->id) - { - case V4L2_CID_BRIGHTNESS: - control->value = isx012_getreg(priv, - ISX012_REG_BRIGHTNESS, - ISX012_SIZE_BRIGHTNESS); - break; - - case V4L2_CID_CONTRAST: - control->value = isx012_getreg(priv, - ISX012_REG_CONTRAST, - ISX012_SIZE_CONTRAST); - break; - - case V4L2_CID_SATURATION: - control->value = isx012_getreg(priv, - ISX012_REG_SATURATION, - ISX012_SIZE_SATURATION); - break; - - case V4L2_CID_HUE: - control->value = isx012_getreg(priv, - ISX012_REG_HUE, - ISX012_SIZE_HUE); - break; - - case V4L2_CID_AUTO_WHITE_BALANCE: - readvalue = isx012_getreg(priv, - ISX012_REG_AUTOWB, - ISX012_SIZE_AUTOWB); - - /* Convert to V4L2 value */ - - if (readvalue & REGVAL_CPUEXT_BIT_AWBSTOP) - { - control->value = false; - } - else - { - control->value = true; - } - - break; - - case V4L2_CID_GAMMA_CURVE: - if (control->p_u16 == NULL) - { - return -EINVAL; - } - - read_src = ISX012_REG_GAMMACURVE; - read_dst = control->p_u16; - - for (cnt = 0; cnt < ISX012_ELEMS_GAMMACURVE; cnt++) - { - *read_dst = isx012_getreg(priv, - read_src, - ISX012_SIZE_GAMMACURVE); - read_src += ISX012_SIZE_GAMMACURVE; - read_dst++; - } - - break; - - case V4L2_CID_EXPOSURE: - control->value = isx012_getreg(priv, - ISX012_REG_EXPOSURE, - ISX012_SIZE_EXPOSURE); - break; - - case V4L2_CID_HFLIP: - readvalue = isx012_getreg(priv, - ISX012_REG_HFLIP, - ISX012_SIZE_HFLIP); - - if (readvalue & REGVAL_READVECT_BIT_H) - { - control->value = true; - } - else - { - control->value = false; - } - - break; - - case V4L2_CID_VFLIP: - readvalue = isx012_getreg(priv, - ISX012_REG_VFLIP, - ISX012_SIZE_VFLIP); - - if (readvalue & REGVAL_READVECT_BIT_V) - { - control->value = true; - } - else - { - control->value = false; - } - - break; - - case V4L2_CID_HFLIP_STILL: - readvalue = isx012_getreg(priv, - ISX012_REG_HFLIP_STILL, - ISX012_SIZE_HFLIP_STILL); - - if (readvalue & REGVAL_READVECT_BIT_H) - { - control->value = true; - } - else - { - control->value = false; - } - - break; - - case V4L2_CID_VFLIP_STILL: - readvalue = isx012_getreg(priv, - ISX012_REG_VFLIP_STILL, - ISX012_SIZE_VFLIP_STILL); - - if (readvalue & REGVAL_READVECT_BIT_V) - { - control->value = true; - } - else - { - control->value = false; - } - - break; - - case V4L2_CID_SHARPNESS: - control->value = isx012_getreg(priv, - ISX012_REG_SHARPNESS, - ISX012_SIZE_SHARPNESS); - break; - - case V4L2_CID_COLOR_KILLER: - readvalue = isx012_getreg(priv, - ISX012_REG_COLORKILLER, - ISX012_SIZE_COLORKILLER); - - if (readvalue == REGVAL_EFFECT_MONOTONE) - { - control->value = true; - } - else - { - control->value = false; - } - - break; - - case V4L2_CID_COLORFX: - readvalue = isx012_getreg(priv, - ISX012_REG_COLOREFFECT, - ISX012_SIZE_COLOREFFECT); - - for (cnt = 0; cnt <= ISX012_MAX_COLOREFFECT; cnt++) - { - if (g_isx012_supported_colorfx[cnt].regval == readvalue) - { - ret = OK; - break; - } - } - - if (ret != OK) - { - return ret; - } - - control->value = g_isx012_supported_colorfx[cnt].v4l2; - - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - case V4L2_CTRL_CLASS_CAMERA: - switch (control->id) - { - case V4L2_CID_EXPOSURE_AUTO: - readvalue = isx012_getreg(priv, - ISX012_REG_EXPOSURETIME, - ISX012_SIZE_EXPOSURETIME); - - if (readvalue) - { - control->value = V4L2_EXPOSURE_MANUAL; - } - else - { - control->value = V4L2_EXPOSURE_AUTO; - } - - break; - - case V4L2_CID_EXPOSURE_ABSOLUTE: - control->value = isx012_getreg(priv, - ISX012_REG_EXPOSURETIME, - ISX012_SIZE_EXPOSURETIME); - - break; - - case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: - readvalue = isx012_getreg(priv, - ISX012_REG_PRESETWB, - ISX012_SIZE_PRESETWB); - - for (cnt = 0; cnt <= ISX012_MAX_PRESETWB; cnt++) - { - if (g_isx012_supported_presetwb[cnt].regval == readvalue) - { - ret = OK; - break; - } - } - - if (ret != OK) - { - return ret; - } - - control->value = g_isx012_supported_presetwb[cnt].v4l2; - - break; - - case V4L2_CID_WIDE_DYNAMIC_RANGE: - readvalue = isx012_getreg(priv, - ISX012_REG_YGAMMA, - ISX012_SIZE_YGAMMA); - if (readvalue) - { - control->value = false; - } - else - { - control->value = true; - } - - break; - - case V4L2_CID_ISO_SENSITIVITY: - readvalue = isx012_getreg(priv, - ISX012_REG_ISO, - ISX012_SIZE_ISO); - - for (cnt = 0; cnt <= ISX012_MAX_ISO; cnt++) - { - if (g_isx012_supported_iso[cnt].regval == readvalue) - { - ret = OK; - break; - } - } - - if (ret != OK) - { - return ret; - } - - control->value = g_isx012_supported_iso[cnt].v4l2; - - break; - - case V4L2_CID_ISO_SENSITIVITY_AUTO: - readvalue = isx012_getreg(priv, - ISX012_REG_ISOAUTO, - ISX012_SIZE_ISOAUTO); - if (readvalue == REGVAL_ISO_AUTO) - { - control->value = V4L2_ISO_SENSITIVITY_AUTO; - } - else - { - control->value = V4L2_ISO_SENSITIVITY_MANUAL; - } - break; - - case V4L2_CID_EXPOSURE_METERING: - readvalue = isx012_getreg(priv, - ISX012_REG_PHOTOMETRY, - ISX012_SIZE_PHOTOMETRY); - - for (cnt = 0; cnt <= ISX012_MAX_PHOTOMETRY; cnt++) - { - if (g_isx012_supported_photometry[cnt].regval == readvalue) - { - ret = OK; - break; - } - } - - if (ret != OK) - { - return ret; - } - - control->value = g_isx012_supported_photometry[cnt].v4l2; - - break; - - case V4L2_CID_3A_PARAMETER: - if (control->p_u16 == NULL) - { - return -EINVAL; - } - - /* Get AWB parameter */ - - control->p_u16[0] = isx012_getreg(priv, - RATIO_R, - 2); - control->p_u16[1] = isx012_getreg(priv, - RATIO_B, - 2); - - /* Get AE parameter */ - - control->p_u16[2] = isx012_getreg(priv, - AELEVEL, - 2); - - break; - - case V4L2_CID_3A_STATUS: - - /* Initialize returned status */ - - control->value = V4L2_3A_STATUS_STABLE; - - /* Get AWB/AE enable or not */ - - threea_enable = isx012_getreg(priv, - CPUEXT, - 1); - - /* Check AWB */ - - if ((threea_enable & REGVAL_CPUEXT_BIT_AWBSTOP) - != REGVAL_CPUEXT_BIT_AWBSTOP) - { - /* Check AWB status */ - - readvalue = isx012_getreg(priv, - AWBSTS, - 1); - if (readvalue != REGVAL_AWBSTS_STOP) /* AWB is not stopped */ - { - control->value |= V4L2_3A_STATUS_AWB_OPERATING; - } - } - - /* Check AE */ - - if ((threea_enable & REGVAL_CPUEXT_BIT_AESTOP) - != REGVAL_CPUEXT_BIT_AESTOP) - { - /* Check AE status */ - - readvalue = isx012_getreg(priv, - AESTS, - 1); - if (readvalue != REGVAL_AESTS_STOP) /* AE is not stopped */ - { - control->value |= V4L2_3A_STATUS_AE_OPERATING; - } - } - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - case V4L2_CTRL_CLASS_JPEG: - switch (control->id) - { - case V4L2_CID_JPEG_COMPRESSION_QUALITY: - control->value = isx012_getreg(priv, - ISX012_REG_JPGQUALITY, - ISX012_SIZE_JPGQUALITY); - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - default: /* Unsupported control class */ - - return -EINVAL; - } - - return OK; -} - -static int isx012_set_ctrlval(uint16_t ctrl_class, - FAR struct v4l2_ext_control *control) -{ - FAR struct isx012_dev_s *priv = &g_isx012_private; - int ret = -EINVAL; - uint8_t cnt; - uint16_t *write_src; - uint16_t write_dst; - uint16_t regval; - uint16_t exposure_time_lsb; - uint16_t exposure_time_msb; - - if (control == NULL) - { - return -EINVAL; - } - - switch (ctrl_class) - { - case V4L2_CTRL_CLASS_USER: - switch (control->id) - { - case V4L2_CID_BRIGHTNESS: - CHECK_RANGE(control->value, - ISX012_MIN_BRIGHTNESS, - ISX012_MAX_BRIGHTNESS, - ISX012_STEP_BRIGHTNESS); - - ret = isx012_putreg(priv, - ISX012_REG_BRIGHTNESS, - control->value, - ISX012_SIZE_BRIGHTNESS); - - break; - - case V4L2_CID_CONTRAST: - CHECK_RANGE(control->value, - ISX012_MIN_CONTRAST, - ISX012_MAX_CONTRAST, - ISX012_STEP_CONTRAST); - - ret = isx012_putreg(priv, - ISX012_REG_CONTRAST, - control->value, - ISX012_SIZE_CONTRAST); - - break; - - case V4L2_CID_SATURATION: - CHECK_RANGE(control->value, - ISX012_MIN_SATURATION, - ISX012_MAX_SATURATION, - ISX012_STEP_SATURATION); - - ret = isx012_putreg(priv, - ISX012_REG_SATURATION, - control->value, - ISX012_SIZE_SATURATION); - - break; - - case V4L2_CID_HUE: - CHECK_RANGE(control->value, - ISX012_MIN_HUE, - ISX012_MAX_HUE, - ISX012_STEP_HUE); - - ret = isx012_putreg(priv, - ISX012_REG_HUE, - control->value, - ISX012_SIZE_HUE); - - break; - - case V4L2_CID_AUTO_WHITE_BALANCE: - CHECK_RANGE(control->value, - ISX012_MIN_AUTOWB, - ISX012_MAX_AUTOWB, - ISX012_STEP_AUTOWB); - - regval = isx012_getreg(priv, - ISX012_REG_AUTOWB, - ISX012_SIZE_AUTOWB); - - if (control->value) - { - /* Because true means setting auto white balance - * turn off the stop bit - */ - - regval &= ~REGVAL_CPUEXT_BIT_AWBSTOP; - } - else - { - /* Because false means stopping auto white balance, - * turn on the stop bit. - */ - - regval |= REGVAL_CPUEXT_BIT_AWBSTOP; - } - - ret = isx012_putreg(priv, - ISX012_REG_AUTOWB, - regval, - ISX012_SIZE_AUTOWB); - - break; - - case V4L2_CID_GAMMA_CURVE: - if (control->p_u16 == NULL) - { - return -EINVAL; - } - - write_src = control->p_u16; - write_dst = ISX012_REG_GAMMACURVE; - - for (cnt = 0; cnt < ISX012_ELEMS_GAMMACURVE; cnt++) - { - CHECK_RANGE(*write_src, - ISX012_MIN_GAMMACURVE, - ISX012_MAX_GAMMACURVE, - ISX012_STEP_GAMMACURVE); - - ret = isx012_putreg(priv, - write_dst, - *write_src, - ISX012_SIZE_GAMMACURVE); - - write_src++; - write_dst += ISX012_SIZE_GAMMACURVE; - } - - break; - - case V4L2_CID_EXPOSURE: - CHECK_RANGE(control->value, - ISX012_MIN_EXPOSURE, - ISX012_MAX_EXPOSURE, - ISX012_STEP_EXPOSURE); - - ret = isx012_putreg(priv, - ISX012_REG_EXPOSURE, - control->value, - ISX012_SIZE_EXPOSURE); - - break; - - case V4L2_CID_HFLIP: - CHECK_RANGE(control->value, - ISX012_MIN_HFLIP, - ISX012_MAX_HFLIP, - ISX012_STEP_HFLIP); - - regval = isx012_getreg(priv, - ISX012_REG_HFLIP, - ISX012_SIZE_HFLIP); - - if (control->value) - { - regval |= REGVAL_READVECT_BIT_H; - } - else - { - regval &= ~REGVAL_READVECT_BIT_H; - } - - ret = isx012_putreg(priv, - ISX012_REG_HFLIP, - regval, - ISX012_SIZE_HFLIP); - - break; - - case V4L2_CID_VFLIP: - CHECK_RANGE(control->value, - ISX012_MIN_VFLIP, - ISX012_MAX_VFLIP, - ISX012_STEP_VFLIP); - - regval = isx012_getreg(priv, - ISX012_REG_VFLIP, - ISX012_SIZE_VFLIP); - - if (control->value) - { - regval |= REGVAL_READVECT_BIT_V; - } - else - { - regval &= ~REGVAL_READVECT_BIT_V; - } - - ret = isx012_putreg(priv, - ISX012_REG_VFLIP, - regval, - ISX012_SIZE_VFLIP); - - break; - - case V4L2_CID_HFLIP_STILL: - CHECK_RANGE(control->value, - ISX012_MIN_HFLIP_STILL, - ISX012_MAX_HFLIP_STILL, - ISX012_STEP_HFLIP_STILL); - - regval = isx012_getreg(priv, - ISX012_REG_HFLIP_STILL, - ISX012_SIZE_HFLIP_STILL); - - if (control->value) - { - regval |= REGVAL_READVECT_BIT_H; - } - else - { - regval &= ~REGVAL_READVECT_BIT_H; - } - - ret = isx012_putreg(priv, - ISX012_REG_HFLIP_STILL, - regval, - ISX012_SIZE_HFLIP_STILL); - - break; - - case V4L2_CID_VFLIP_STILL: - CHECK_RANGE(control->value, - ISX012_MIN_VFLIP_STILL, - ISX012_MAX_VFLIP_STILL, - ISX012_STEP_VFLIP_STILL); - - regval = isx012_getreg(priv, - ISX012_REG_VFLIP_STILL, - ISX012_SIZE_VFLIP_STILL); - - if (control->value) - { - regval |= REGVAL_READVECT_BIT_V; - } - else - { - regval &= ~REGVAL_READVECT_BIT_V; - } - - ret = isx012_putreg(priv, - ISX012_REG_VFLIP_STILL, - regval, - ISX012_SIZE_VFLIP_STILL); - - break; - - case V4L2_CID_SHARPNESS: - CHECK_RANGE(control->value, - ISX012_MIN_SHARPNESS, - ISX012_MAX_SHARPNESS, - ISX012_STEP_SHARPNESS); - - ret = isx012_putreg(priv, - ISX012_REG_SHARPNESS, - control->value, - ISX012_SIZE_SHARPNESS); - - break; - - case V4L2_CID_COLOR_KILLER: - CHECK_RANGE(control->value, - ISX012_MIN_COLORKILLER, - ISX012_MAX_COLORKILLER, - ISX012_STEP_COLORKILLER); - - if (control->value) - { - regval = REGVAL_EFFECT_MONOTONE; - } - else - { - regval = REGVAL_EFFECT_NONE; - } - - ret = isx012_putreg(priv, - ISX012_REG_COLORKILLER, - regval, - ISX012_SIZE_COLORKILLER); - - break; - - case V4L2_CID_COLORFX: - for (cnt = 0; cnt <= ISX012_MAX_COLOREFFECT; cnt++) - { - if (g_isx012_supported_colorfx[cnt].v4l2 == control->value) - { - ret = OK; - break; - } - } - - if (ret != OK) - { - return ret; - } - - ret = isx012_putreg(priv, - ISX012_REG_COLOREFFECT, - g_isx012_supported_colorfx[cnt].regval, - ISX012_SIZE_COLOREFFECT); - - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - case V4L2_CTRL_CLASS_CAMERA: - switch (control->id) - { - case V4L2_CID_EXPOSURE_AUTO: - CHECK_RANGE(control->value, - ISX012_MIN_EXPOSUREAUTO, - ISX012_MAX_EXPOSUREAUTO, - ISX012_STEP_EXPOSUREAUTO); - - if (control->value == V4L2_EXPOSURE_AUTO) - { - /* Register is the same as V4L2_CID_EXPOSURE_ABSOLUTE. - * If this register value = REGVAL_EXPOSURETIME_AUTO(=0), - * it means auto. Otherwise, it means manual. - */ - - ret = isx012_putreg(priv, - ISX012_REG_EXPOSURETIME, - REGVAL_EXPOSURETIME_AUTO, - ISX012_SIZE_EXPOSURETIME); - } - else - { - /* In manual case, read current value of register which - * value adjusted automatically by ISX012 HW is set to. - * It has 32bits length which is composed of LSB 16bits - * and MSB 16bits. - */ - - exposure_time_lsb = isx012_getreg - (priv, - ISX012_REG_EXPOSUREAUTOVALUE_LSB, - ISX012_SIZE_EXPOSUREAUTOVALUE); - exposure_time_msb = isx012_getreg - (priv, - ISX012_REG_EXPOSUREAUTOVALUE_MSB, - ISX012_SIZE_EXPOSUREAUTOVALUE); - - /* Register value adjusted automatically by ISX012 HW - * has the different unit from manual value register. - * automatic value register : 1 microsec unit - * manual value register : 100 microsec unit - */ - - regval = (uint16_t)(((exposure_time_msb << 16) - | exposure_time_lsb) - / ISX012_UNIT_EXPOSURETIME_US); - ret = isx012_putreg(priv, - ISX012_REG_EXPOSURETIME, - regval, - ISX012_SIZE_EXPOSURETIME); - } - - break; - - case V4L2_CID_EXPOSURE_ABSOLUTE: - CHECK_RANGE(control->value, - ISX012_MIN_EXPOSURETIME, - ISX012_MAX_EXPOSURETIME, - ISX012_STEP_EXPOSURETIME); - - ret = isx012_putreg(priv, - ISX012_REG_EXPOSURETIME, - control->value, - ISX012_SIZE_EXPOSURETIME); - break; - - case V4L2_CID_WIDE_DYNAMIC_RANGE: - CHECK_RANGE(control->value, - ISX012_MIN_YGAMMA, - ISX012_MAX_YGAMMA, - ISX012_STEP_YGAMMA); - - if (control->value) - { - regval = REGVAL_YGAMMA_AUTO; - } - else - { - regval = REGVAL_YGAMMA_OFF; - } - - ret = isx012_putreg(priv, - ISX012_REG_YGAMMA, - regval, - ISX012_SIZE_YGAMMA); - - break; - - case V4L2_CID_ISO_SENSITIVITY: - for (cnt = 0; cnt <= ISX012_MAX_ISO; cnt++) - { - if (g_isx012_supported_iso[cnt].v4l2 - == control->value) - { - ret = OK; - break; - } - } - - if (ret != OK) - { - return ret; - } - - ret = isx012_putreg(priv, - ISX012_REG_ISO, - g_isx012_supported_iso[cnt].regval, - ISX012_SIZE_ISO); - - break; - - case V4L2_CID_ISO_SENSITIVITY_AUTO: - CHECK_RANGE(control->value, - ISX012_MIN_ISOAUTO, - ISX012_MAX_ISOAUTO, - ISX012_STEP_ISOAUTO); - - if (control->value == V4L2_ISO_SENSITIVITY_AUTO) - { - ret = isx012_putreg(priv, - ISX012_REG_ISOAUTO, - REGVAL_ISO_AUTO, - ISX012_SIZE_ISOAUTO); - } - else - { - /* In manual case, read auto adjust value and set it */ - - regval = isx012_getreg(priv, - ISX012_REG_ISOAUTOVALUE, - ISX012_SIZE_ISOAUTOVALUE); - ret = isx012_putreg(priv, - ISX012_REG_ISO, - regval, - ISX012_SIZE_ISO); - } - - break; - - case V4L2_CID_EXPOSURE_METERING: - for (cnt = 0; cnt <= ISX012_MAX_PHOTOMETRY; cnt++) - { - if (g_isx012_supported_photometry[cnt].v4l2 - == control->value) - { - ret = OK; - break; - } - } - - if (ret != OK) - { - return ret; - } - - ret = isx012_putreg(priv, - ISX012_REG_PHOTOMETRY, - g_isx012_supported_photometry[cnt].regval, - ISX012_SIZE_PHOTOMETRY); - - break; - - case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE: - for (cnt = 0; cnt <= ISX012_MAX_PRESETWB; cnt++) - { - if (g_isx012_supported_presetwb[cnt].v4l2 - == control->value) - { - ret = OK; - break; - } - } - - if (ret != OK) - { - return ret; - } - - ret = isx012_putreg(priv, - ISX012_REG_PRESETWB, - g_isx012_supported_presetwb[cnt].regval, - ISX012_SIZE_PRESETWB); - - break; - - case V4L2_CID_3A_LOCK: - CHECK_RANGE(control->value, - ISX012_MIN_3ALOCK, - ISX012_MAX_3ALOCK, - ISX012_STEP_3ALOCK); - - regval = 0; - - if ((control->value & V4L2_LOCK_EXPOSURE) - == V4L2_LOCK_EXPOSURE) - { - regval |= REGVAL_CPUEXT_BIT_AESTOP; - } - - if ((control->value & V4L2_LOCK_WHITE_BALANCE) - == V4L2_LOCK_WHITE_BALANCE) - { - regval |= REGVAL_CPUEXT_BIT_AWBSTOP; - } - - ret = isx012_putreg(priv, - ISX012_REG_3ALOCK, - regval, - ISX012_SIZE_3ALOCK); - - break; - - case V4L2_CID_3A_PARAMETER: - - /* AWB parameter : red */ - - ret = isx012_putreg(priv, - INIT_CONT_INR, - control->p_u16[0], - 2); - ret = isx012_putreg(priv, - INIT_CONT_OUTR, - control->p_u16[0], - 2); - - /* AWB parameter : blue */ - - ret = isx012_putreg(priv, - INIT_CONT_INB, - control->p_u16[1], - 2); - ret = isx012_putreg(priv, - INIT_CONT_OUTB, - control->p_u16[1], - 2); - - /* AE parameter */ - - ret = isx012_putreg(priv, - AE_START_LEVEL, - control->p_u16[2], - 2); - - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - case V4L2_CTRL_CLASS_JPEG: - switch (control->id) - { - case V4L2_CID_JPEG_COMPRESSION_QUALITY: - CHECK_RANGE(control->value, - ISX012_MIN_JPGQUALITY, - ISX012_MAX_JPGQUALITY, - ISX012_STEP_JPGQUALITY); - - ret = isx012_putreg(priv, - ISX012_REG_JPGQUALITY, - control->value, - ISX012_SIZE_JPGQUALITY); - break; - - default: /* Unsupported control id */ - - return -EINVAL; - } - - break; - - default: /* Unsupported control class */ - - return -EINVAL; - } - - return ret; -} - -static int isx012_refresh(void) -{ - int ret = 0; - uint8_t mask_num; - int i; - FAR struct isx012_dev_s *priv = &g_isx012_private; - - if (priv->state != STATE_ISX012_ACTIVE) - { - /* In inactive state, setting is reflected in activated timing */ - - return OK; - } - - if (priv->mode != REGVAL_MODESEL_MON) - { - return -EPERM; - } - - /* Set MONI_REFRESH */ - - isx012_putreg(priv, INTCLR0, CM_CHANGED_STS, 1); - ret = isx012_putreg(priv, MONI_REFRESH, 1, 1); - if (ret < 0) - { - return ret; - } - - /* Wait CM_CHANGED */ - - ret = isx012_chk_int_state(priv, CM_CHANGED_STS, - CAMERA_MODE_DELAY_TIME, - CAMERA_MODE_WAIT_TIME, - CAMERA_MODE_TIMEOUT); - if (ret != 0) - { - return ret; - } - - /* Invalid frame skip */ - - isx012_putreg(priv, INTCLR0, VINT_STS, 1); - mask_num = isx012_getreg(priv, RO_MASK_NUM, sizeof(mask_num)); - for (i = 0; i < mask_num; i++) - { - /* Wait Next VINT */ - - ret = isx012_chk_int_state(priv, VINT_STS, VINT_DELAY_TIME, - VINT_WAIT_TIME, VINT_TIMEOUT); - if (ret != 0) - { - return ret; - } - } - - return OK; -} - -static int isx012_set_shd(FAR isx012_dev_t *priv) -{ - int ret; - int unit_cnt; - int size_cnt; - - /* At first, disable CXC and SHD */ - - ret = isx012_putreg(priv, SHD_EN, 0x50, 1); - if (ret < 0) - { - imagererr("isx012_putreg(disable CXC/SHD) failed: %d\n", ret); - return ret; - } - - /* Set CXC Validity */ - - ret = isx012_putreg(priv, CXC_VALID, 0x8282, 2); - if (ret < 0) - { - imagererr("isx012_putreg(CXC_VALID) failed: %d\n", ret); - return ret; - } - - /* Set CXC R Gb data */ - - for (unit_cnt = 0; unit_cnt < CXC_RGB_DATA_UNIT_NUM; unit_cnt++) - { - for (size_cnt = 0; size_cnt < CXC_RGB_DATA_UNIT_SIZE; size_cnt++) - { - ret = isx012_putreg(priv, - CXC_RGB_UNIT(unit_cnt, size_cnt), - g_isx012_cxc_rgb_data[unit_cnt][size_cnt], - 1); - if (ret < 0) - { - imagererr("isx012_putreg(CXC R Gb) failed: %d\n", ret); - return ret; - } - } - } - - /* Set CXC G Rb data */ - - for (unit_cnt = 0; unit_cnt < CXC_GRB_DATA_UNIT_NUM; unit_cnt++) - { - for (size_cnt = 0; size_cnt < CXC_GRB_DATA_UNIT_SIZE; size_cnt++) - { - ret = isx012_putreg(priv, - CXC_GRB_UNIT(unit_cnt, size_cnt), - g_isx012_cxc_grb_data[unit_cnt][size_cnt], - 1); - if (ret < 0) - { - imagererr("isx012_putreg(CXC G Rb) failed: %d\n", ret); - return ret; - } - } - } - - /* Set SHD Validity */ - - ret = isx012_putreg(priv, SHD_VALID, 0x9191, 2); - if (ret < 0) - { - imagererr("isx012_putreg(SHD_VALID) failed: %d\n", ret); - return ret; - } - - /* Set SHD R Gb data */ - - for (unit_cnt = 0; unit_cnt < SHD_RGB_DATA_UNIT_NUM; unit_cnt++) - { - for (size_cnt = 0; size_cnt < SHD_RGB_DATA_UNIT_SIZE; size_cnt++) - { - ret = isx012_putreg(priv, - SHD_RGB_UNIT(unit_cnt, size_cnt), - g_isx012_shd_rgb_data[unit_cnt][size_cnt], - 1); - if (ret < 0) - { - imagererr("isx012_putreg(SHD R Gb) failed: %d\n", ret); - return ret; - } - } - } - - /* Set SHD G Rb data */ - - for (unit_cnt = 0; unit_cnt < SHD_GRB_DATA_UNIT_NUM; unit_cnt++) - { - for (size_cnt = 0; size_cnt < SHD_GRB_DATA_UNIT_SIZE; size_cnt++) - { - ret = isx012_putreg(priv, - SHD_GRB_UNIT(unit_cnt, size_cnt), - g_isx012_shd_grb_data[unit_cnt][size_cnt], - 1); - if (ret < 0) - { - imagererr("isx012_putreg(SHD G Rb) failed: %d\n", ret); - return ret; - } - } - } - - /* Set SHD R1 data */ - - for (unit_cnt = 0; unit_cnt < SHD_R1_DATA_UNIT_NUM; unit_cnt++) - { - for (size_cnt = 0; size_cnt < SHD_R1_DATA_UNIT_SIZE; size_cnt++) - { - ret = isx012_putreg(priv, - SHD_R1_UNIT(unit_cnt, size_cnt), - g_isx012_shd_r1_data[unit_cnt][size_cnt], - 1); - if (ret < 0) - { - imagererr("isx012_putreg(SHD R1) failed: %d\n", ret); - return ret; - } - } - } - - /* Set SHD R2 data */ - - for (unit_cnt = 0; unit_cnt < SHD_R2_DATA_UNIT_NUM; unit_cnt++) - { - for (size_cnt = 0; size_cnt < SHD_R2_DATA_UNIT_SIZE; size_cnt++) - { - ret = isx012_putreg(priv, - SHD_R2_UNIT(unit_cnt, size_cnt), - g_isx012_shd_r2_data[unit_cnt][size_cnt], - 1); - if (ret < 0) - { - imagererr("isx012_putreg(SHD R2) failed: %d\n", ret); - return ret; - } - } - } - - /* Set SHD B2 data */ - - for (unit_cnt = 0; unit_cnt < SHD_B2_DATA_UNIT_NUM; unit_cnt++) - { - for (size_cnt = 0; size_cnt < SHD_B2_DATA_UNIT_SIZE; size_cnt++) - { - ret = isx012_putreg(priv, - SHD_B2_UNIT(unit_cnt, size_cnt), - g_isx012_shd_b2_data[unit_cnt][size_cnt], - 1); - if (ret < 0) - { - imagererr("isx012_putreg(SHD B2) failed: %d\n", ret); - return ret; - } - } - } - - /* Set SHD thresholds data */ - - ret = isx012_putreglist(priv, g_isx012_shd_thresholds, - ISX012_SHD_THRESHOLDS_NENTRIES); - if (ret < 0) - { - imagererr("isx012_putreglist failed(SHD thresholds): %d\n", ret); - board_isx012_set_reset(); - return ret; - } - - /* Set SHD white balance data */ - - ret = isx012_putreglist(priv, g_isx012_shd_wb, ISX012_SHD_WB_NENTRIES); - if (ret < 0) - { - imagererr("isx012_putreglist(SHD white balance) failed: %d\n", ret); - board_isx012_set_reset(); - return ret; - } - - /* Enable CXC and SHD */ - - ret = isx012_putreg(priv, SHD_EN, 0x57, 1); - if (ret < 0) - { - imagererr("isx012_putreg(enable CXC/SHD) failed: %d\n", ret); - return ret; - } - - return OK; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -int isx012_register(FAR struct i2c_master_s *i2c) -{ - FAR struct isx012_dev_s *priv = &g_isx012_private; - - /* Save i2c information */ - - priv->i2c = i2c; - priv->i2c_addr = ISX012_I2C_SLV_ADDR; - priv->i2c_freq = I2CFREQ_STANDARD; - - /* Initialize other information */ - - priv->state = STATE_ISX012_POWEROFF; - - return OK; -} - -int isx012_unregister(void) -{ - /* no procedure */ - - return OK; -} - -FAR struct video_devops_s *isx012_initialize(void) -{ - /* return address of video operations variable */ - - return &g_isx012_video_devops; -} - -int isx012_uninitialize(void) -{ - /* No procedure */ - - return OK; -} diff --git a/boards/arm/cxd56xx/spresense/configs/example_camera/defconfig b/boards/arm/cxd56xx/spresense/configs/example_camera/defconfig index 96ac6328221..fae7fd73b05 100644 --- a/boards/arm/cxd56xx/spresense/configs/example_camera/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/example_camera/defconfig @@ -9,6 +9,8 @@ # CONFIG_MMCSD_HAVE_WRITEPROTECT is not set # CONFIG_MMCSD_SPI is not set # CONFIG_MTD_SMART_WEAR_LEVEL is not set +# CONFIG_NXFONTS_DISABLE_16BPP is not set +# CONFIG_NX_DISABLE_16BPP is not set # CONFIG_STANDARD_SERIAL is not set CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="spresense" @@ -26,7 +28,7 @@ CONFIG_CXD56_CISIF=y CONFIG_CXD56_I2C0=y CONFIG_CXD56_I2C2=y CONFIG_CXD56_I2C=y -CONFIG_CXD56_SPI4=y +CONFIG_CXD56_SDIO=y CONFIG_CXD56_SPI5=y CONFIG_CXD56_SPI=y CONFIG_CXD56_USBDEV=y @@ -34,6 +36,7 @@ CONFIG_DEBUG_FULLOPT=y CONFIG_DEBUG_SYMBOLS=y CONFIG_DRIVERS_VIDEO=y CONFIG_EXAMPLES_CAMERA=y +CONFIG_EXAMPLES_CAMERA_OUTPUT_LCD=y CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=255 @@ -43,8 +46,13 @@ CONFIG_FS_PROCFS_REGISTER=y CONFIG_FS_SMARTFS=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_LCD=y +CONFIG_LCD_ILI9340=y +CONFIG_LCD_ILI9340_IFACE0=y +CONFIG_LCD_ILI9340_IFACE0_RLANDSCAPE=y CONFIG_MMCSD=y CONFIG_MMCSD_SDIO=y +CONFIG_MQ_MAXMSGSIZE=64 CONFIG_MTD_BYTE_WRITE=y CONFIG_MTD_PARTITION=y CONFIG_MTD_SMART=y @@ -54,6 +62,9 @@ CONFIG_NAME_MAX=765 CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_READLINE=y +CONFIG_NX=y +CONFIG_NXFONT_SERIF22X29=y +CONFIG_NX_BLOCKING=y CONFIG_PREALLOC_TIMERS=4 CONFIG_RAM_SIZE=1572864 CONFIG_RAM_START=0x0d000000 diff --git a/boards/arm/cxd56xx/spresense/configs/mpy/defconfig b/boards/arm/cxd56xx/spresense/configs/mpy/defconfig index ebd22f3aab5..9b98ef1055e 100644 --- a/boards/arm/cxd56xx/spresense/configs/mpy/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/mpy/defconfig @@ -43,6 +43,7 @@ CONFIG_CXD56_UART2=y CONFIG_CXD56_USBDEV=y CONFIG_DEBUG_FULLOPT=y CONFIG_DEBUG_SYMBOLS=y +CONFIG_DRIVERS_VIDEO=y CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=255 @@ -93,3 +94,4 @@ CONFIG_USBMSC=y CONFIG_USBMSC_EPBULKIN=1 CONFIG_USBMSC_REMOVABLE=y CONFIG_USER_ENTRYPOINT="spresense_main" +CONFIG_VIDEO_STREAM=y diff --git a/boards/arm/cxd56xx/spresense/configs/rndis/defconfig b/boards/arm/cxd56xx/spresense/configs/rndis/defconfig index 691ab42b78f..c79541111e5 100644 --- a/boards/arm/cxd56xx/spresense/configs/rndis/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/rndis/defconfig @@ -9,6 +9,7 @@ # CONFIG_MMCSD_SPI is not set # CONFIG_MTD_SMART_WEAR_LEVEL is not set # CONFIG_STANDARD_SERIAL is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="spresense" CONFIG_ARCH_BOARD_SPRESENSE=y diff --git a/boards/arm/cxd56xx/spresense/configs/rndis_smp/defconfig b/boards/arm/cxd56xx/spresense/configs/rndis_smp/defconfig index ece068fe223..cc4414f0279 100644 --- a/boards/arm/cxd56xx/spresense/configs/rndis_smp/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/rndis_smp/defconfig @@ -9,6 +9,7 @@ # CONFIG_MMCSD_SPI is not set # CONFIG_MTD_SMART_WEAR_LEVEL is not set # CONFIG_STANDARD_SERIAL is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="spresense" CONFIG_ARCH_BOARD_SPRESENSE=y @@ -104,7 +105,6 @@ CONFIG_NET_ROUTE=y CONFIG_NET_STATISTICS=y CONFIG_NET_TCP=y CONFIG_NET_TCPBACKLOG=y -CONFIG_NET_TCP_WRITE_BUFFERS=y CONFIG_NET_UDP=y CONFIG_NFS=y CONFIG_NSH_ARCHINIT=y @@ -132,7 +132,7 @@ CONFIG_RTC_HIRES=y CONFIG_SCHED_HPWORK=y CONFIG_SCHED_LPWORK=y CONFIG_SDCLONE_DISABLE=y -CONFIG_SENDFILE_BUFSIZE=1024 +CONFIG_SENDFILE_BUFSIZE=4096 CONFIG_SMARTFS_ALIGNED_ACCESS=y CONFIG_SMARTFS_MAXNAMLEN=30 CONFIG_SMARTFS_MULTI_ROOT_DIRS=y diff --git a/boards/arm/cxd56xx/spresense/configs/wifi/defconfig b/boards/arm/cxd56xx/spresense/configs/wifi/defconfig index c4a8fe8d10e..94817f098b1 100644 --- a/boards/arm/cxd56xx/spresense/configs/wifi/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/wifi/defconfig @@ -10,6 +10,7 @@ # CONFIG_NXFONTS_DISABLE_16BPP is not set # CONFIG_NX_DISABLE_16BPP is not set # CONFIG_STANDARD_SERIAL is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="spresense" CONFIG_ARCH_BOARD_SPRESENSE=y diff --git a/boards/arm/cxd56xx/spresense/configs/wifi_smp/defconfig b/boards/arm/cxd56xx/spresense/configs/wifi_smp/defconfig index d7c371e5021..b744255e130 100644 --- a/boards/arm/cxd56xx/spresense/configs/wifi_smp/defconfig +++ b/boards/arm/cxd56xx/spresense/configs/wifi_smp/defconfig @@ -10,6 +10,7 @@ # CONFIG_NXFONTS_DISABLE_16BPP is not set # CONFIG_NX_DISABLE_16BPP is not set # CONFIG_STANDARD_SERIAL is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="spresense" CONFIG_ARCH_BOARD_SPRESENSE=y diff --git a/boards/arm/cxd56xx/spresense/scripts/Make.defs b/boards/arm/cxd56xx/spresense/scripts/Make.defs index 03001a31dae..87c4acfdfb3 100644 --- a/boards/arm/cxd56xx/spresense/scripts/Make.defs +++ b/boards/arm/cxd56xx/spresense/scripts/Make.defs @@ -61,8 +61,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -88,11 +88,8 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -LDFLAGS += -Wl,--gc-sections +LDFLAGS += --gc-sections -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) CFLAGS += -gdwarf-3 CXXFLAGS += -gdwarf-3 @@ -102,11 +99,11 @@ endif # Output map file with cross reference table ifeq ($(CONFIG_CYGWIN_WINTOOL),y) - LDFLAGS += -Wl,-Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" -Wl,--cref + LDFLAGS += -Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" --cref else - LDFLAGS += -Wl,-Map=$(TOPDIR)/nuttx.map -Wl,--cref + LDFLAGS += -Map=$(TOPDIR)/nuttx.map --cref endif ifneq ($(CONFIG_ASMP_MEMSIZE),) - LDFLAGS += -Wl,--defsym=__reserved_ramsize=$(CONFIG_ASMP_MEMSIZE) + LDFLAGS += --defsym=__reserved_ramsize=$(CONFIG_ASMP_MEMSIZE) endif diff --git a/boards/arm/cxd56xx/spresense/src/cxd56_bringup.c b/boards/arm/cxd56xx/spresense/src/cxd56_bringup.c index b9a81a5a7b7..4c78f6ec781 100644 --- a/boards/arm/cxd56xx/spresense/src/cxd56_bringup.c +++ b/boards/arm/cxd56xx/spresense/src/cxd56_bringup.c @@ -109,6 +109,10 @@ # include #endif +#ifdef CONFIG_CXD56_CISIF +# include +#endif + #include "spresense.h" /**************************************************************************** @@ -191,9 +195,6 @@ int cxd56_bringup(void) { struct pm_cpu_wakelock_s wlock; int ret; -#ifdef CONFIG_VIDEO_ISX012 - FAR const struct video_devops_s *devops; -#endif ret = nsh_cpucom_initialize(); if (ret < 0) @@ -375,17 +376,19 @@ int cxd56_bringup(void) ret = board_isx012_initialize(IMAGER_I2C); if (ret < 0) { - _err("ERROR: Failed to initialize ISX012 board. %d\n", ret); - } - - devops = isx012_initialize(); - if (devops == NULL) - { - _err("ERROR: Failed to populate ISX012 devops. %d\n", ret); - ret = ERROR; + _err("ERROR: Failed to initialize ISX012 board. %d\n", errno); } #endif /* CONFIG_VIDEO_ISX012 */ +#ifdef CONFIG_CXD56_CISIF + ret = cxd56_cisif_initialize(); + if (ret < 0) + { + _err("ERROR: Failed to initialize CISIF. %d\n", errno); + ret = ERROR; + } +#endif /* CONFIG_CXD56_CISIF */ + #if defined(CONFIG_CXD56_SDIO) /* In order to prevent Hi-Z from being input to the SD Card controller, * Initialize SDIO pins to GPIO low output with internal pull-down. diff --git a/boards/arm/dm320/ntosd-dm320/scripts/Make.defs b/boards/arm/dm320/ntosd-dm320/scripts/Make.defs index 532f80bef29..c864faeb7a9 100644 --- a/boards/arm/dm320/ntosd-dm320/scripts/Make.defs +++ b/boards/arm/dm320/ntosd-dm320/scripts/Make.defs @@ -71,15 +71,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common +NXFLATLDFLAGS1 = -r -d -warn-common NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ - -Wl,-no-check-sections + -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/efm32/efm32-g8xx-stk/scripts/Make.defs b/boards/arm/efm32/efm32-g8xx-stk/scripts/Make.defs index f4f9a45845f..f6d0450665d 100644 --- a/boards/arm/efm32/efm32-g8xx-stk/scripts/Make.defs +++ b/boards/arm/efm32/efm32-g8xx-stk/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/efm32/efm32gg-stk3700/scripts/Make.defs b/boards/arm/efm32/efm32gg-stk3700/scripts/Make.defs index ba1e40083e7..ecb70d6a52e 100644 --- a/boards/arm/efm32/efm32gg-stk3700/scripts/Make.defs +++ b/boards/arm/efm32/efm32gg-stk3700/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/efm32/olimex-efm32g880f128-stk/scripts/Make.defs b/boards/arm/efm32/olimex-efm32g880f128-stk/scripts/Make.defs index 2df3d322d2d..21a78982c99 100644 --- a/boards/arm/efm32/olimex-efm32g880f128-stk/scripts/Make.defs +++ b/boards/arm/efm32/olimex-efm32g880f128-stk/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/eoss3/quickfeather/scripts/Make.defs b/boards/arm/eoss3/quickfeather/scripts/Make.defs index 68a8c9f155f..0f9a6105d0b 100644 --- a/boards/arm/eoss3/quickfeather/scripts/Make.defs +++ b/boards/arm/eoss3/quickfeather/scripts/Make.defs @@ -63,10 +63,6 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS = -nostartfiles -nodefaultlibs -endif - -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/arm/imx6/sabre-6quad/configs/netnsh/defconfig b/boards/arm/imx6/sabre-6quad/configs/netnsh/defconfig index 758edcc0a39..106629d7a69 100644 --- a/boards/arm/imx6/sabre-6quad/configs/netnsh/defconfig +++ b/boards/arm/imx6/sabre-6quad/configs/netnsh/defconfig @@ -6,6 +6,7 @@ # modifications. # # CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="sabre-6quad" CONFIG_ARCH_BOARD_SABRE_6QUAD=y diff --git a/boards/arm/imx6/sabre-6quad/configs/netnsh_smp/defconfig b/boards/arm/imx6/sabre-6quad/configs/netnsh_smp/defconfig index 1555ee7deb6..88cdd84ce12 100644 --- a/boards/arm/imx6/sabre-6quad/configs/netnsh_smp/defconfig +++ b/boards/arm/imx6/sabre-6quad/configs/netnsh_smp/defconfig @@ -6,6 +6,7 @@ # modifications. # # CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="sabre-6quad" CONFIG_ARCH_BOARD_SABRE_6QUAD=y diff --git a/boards/arm/imx6/sabre-6quad/scripts/Make.defs b/boards/arm/imx6/sabre-6quad/scripts/Make.defs index 8617cf732fe..56346a1ecf6 100644 --- a/boards/arm/imx6/sabre-6quad/scripts/Make.defs +++ b/boards/arm/imx6/sabre-6quad/scripts/Make.defs @@ -54,8 +54,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 @@ -71,11 +71,8 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -LDFLAGS += -Wl,--gc-sections +LDFLAGS += --gc-sections -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1020-evk/include/board.h b/boards/arm/imxrt/imxrt1020-evk/include/board.h index 0a343d35a89..7d0feb961a6 100644 --- a/boards/arm/imxrt/imxrt1020-evk/include/board.h +++ b/boards/arm/imxrt/imxrt1020-evk/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1020-evk/include/board.h * - * Copyright (C) 2018-2019 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * David Sidrane - * Dave Marples + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1020-evk/scripts/Make.defs b/boards/arm/imxrt/imxrt1020-evk/scripts/Make.defs index 19ea5694365..bf25f3f5b53 100644 --- a/boards/arm/imxrt/imxrt1020-evk/scripts/Make.defs +++ b/boards/arm/imxrt/imxrt1020-evk/scripts/Make.defs @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,9 +70,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt1020-evk.h b/boards/arm/imxrt/imxrt1020-evk/src/imxrt1020-evk.h index 7ed1c4982e5..44e986ddf70 100644 --- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt1020-evk.h +++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt1020-evk.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1020-evk/src/imxrt1020-evk.h * - * Copyright (C) 2018-2019 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Dave Marples + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_bringup.c b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_bringup.c index b7b6e046516..996b268151d 100644 --- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_bringup.c +++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_bringup.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1020-evk/src/imxrt_bringup.c * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Dave Marples + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.c b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.c index 9a4c0fc3865..1c0f2e0c766 100644 --- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.c +++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_boot.c @@ -28,7 +28,7 @@ * Public Data ****************************************************************************/ -__attribute__((section(".boot_hdr.ivt"))) +locate_data(".boot_hdr.ivt") const struct ivt_s g_image_vector_table = { IVT_HEADER, /* IVT Header */ @@ -41,7 +41,7 @@ const struct ivt_s g_image_vector_table = IVT_RSVD /* Reserved = 0 */ }; -__attribute__((section(".boot_hdr.boot_data"))) +locate_data(".boot_hdr.boot_data") const struct boot_data_s g_boot_data = { FLASH_BASE, /* boot start location */ diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.c b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.c index e19673d1504..9f156a6208d 100644 --- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.c +++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1020-evk/src/imxrt_flexspi_nor_flash.c * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Ivan Ucherdzhiev - * Dave Marples + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -58,7 +42,7 @@ */ #if defined (CONFIG_IMXRT1020_EVK_HYPER_FLASH) -__attribute__((section(".boot_hdr.conf"))) +locate_data(".boot_hdr.conf") const struct flexspi_nor_config_s g_flash_config = { .mem_config = @@ -115,7 +99,7 @@ const struct flexspi_nor_config_s g_flash_config = .is_uniform_blocksize = 1, }; #elif defined (CONFIG_IMXRT1020_EVK_QSPI_FLASH) -__attribute__((section(".boot_hdr.conf"))) +locate_data(".boot_hdr.conf") const struct flexspi_nor_config_s g_flash_config = { .mem_config = diff --git a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_gpio.c b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_gpio.c index dd36f86c2b0..4b7d08e29f7 100644 --- a/boards/arm/imxrt/imxrt1020-evk/src/imxrt_gpio.c +++ b/boards/arm/imxrt/imxrt1020-evk/src/imxrt_gpio.c @@ -1,41 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1020-evk/src/imxrt_gpio.c * - * Copyright (C) 2017-2018 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved. - * Author: Alan Carvalho de Assis + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: configs/imxrt1050-evk/src/imxrt_gpio.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Author: Pavlina Koleva - * Modified by: Ivan Ucherdzhiev - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1050-evk/configs/knsh/Make.defs b/boards/arm/imxrt/imxrt1050-evk/configs/knsh/Make.defs index 21e8f75e0d7..d7d4d99e798 100644 --- a/boards/arm/imxrt/imxrt1050-evk/configs/knsh/Make.defs +++ b/boards/arm/imxrt/imxrt1050-evk/configs/knsh/Make.defs @@ -54,8 +54,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -69,9 +69,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1050-evk/configs/libcxxtest/Make.defs b/boards/arm/imxrt/imxrt1050-evk/configs/libcxxtest/Make.defs index 27b25fecbaf..0297166b33d 100644 --- a/boards/arm/imxrt/imxrt1050-evk/configs/libcxxtest/Make.defs +++ b/boards/arm/imxrt/imxrt1050-evk/configs/libcxxtest/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/imxrt/imxrt1050-evk/configs/libcxxtest/Make.defs # -# Copyright (C) 2018 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Daniel Pereira Volpato +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -81,8 +65,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -96,9 +80,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1050-evk/include/board.h b/boards/arm/imxrt/imxrt1050-evk/include/board.h index c0c52a0540a..16b836e9f97 100644 --- a/boards/arm/imxrt/imxrt1050-evk/include/board.h +++ b/boards/arm/imxrt/imxrt1050-evk/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1050-evk/include/board.h * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * David Sidrane - * Dave Marples + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1050-evk/kernel/Makefile b/boards/arm/imxrt/imxrt1050-evk/kernel/Makefile index 01b45b59e76..8c41c6e49b7 100644 --- a/boards/arm/imxrt/imxrt1050-evk/kernel/Makefile +++ b/boards/arm/imxrt/imxrt1050-evk/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/imxrt/imxrt1050-evk/kernel/imxrt_userspace.c b/boards/arm/imxrt/imxrt1050-evk/kernel/imxrt_userspace.c index 3b6570bc00e..084da3c4a0a 100644 --- a/boards/arm/imxrt/imxrt1050-evk/kernel/imxrt_userspace.c +++ b/boards/arm/imxrt/imxrt1050-evk/kernel/imxrt_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/imxrt/imxrt1050-evk/scripts/Make.defs b/boards/arm/imxrt/imxrt1050-evk/scripts/Make.defs index aa4c48a9891..a735bef619c 100644 --- a/boards/arm/imxrt/imxrt1050-evk/scripts/Make.defs +++ b/boards/arm/imxrt/imxrt1050-evk/scripts/Make.defs @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,9 +70,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.c b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.c index d624a849fe3..847f5720011 100644 --- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.c +++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_boot.c @@ -28,7 +28,7 @@ * Public Data ****************************************************************************/ -__attribute__((section(".boot_hdr.ivt"))) +locate_data(".boot_hdr.ivt") const struct ivt_s g_image_vector_table = { IVT_HEADER, /* IVT Header */ @@ -41,7 +41,7 @@ const struct ivt_s g_image_vector_table = IVT_RSVD /* Reserved = 0 */ }; -__attribute__((section(".boot_hdr.boot_data"))) +locate_data(".boot_hdr.boot_data") const struct boot_data_s g_boot_data = { FLASH_BASE, /* boot start location */ diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.c b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.c index 08513589dc8..194bc219a23 100644 --- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.c +++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_flexspi_nor_flash.c @@ -29,7 +29,7 @@ ****************************************************************************/ #if defined (CONFIG_IMXRT1050_EVK_HYPER_FLASH) -__attribute__((section(".boot_hdr.conf"))) +locate_data(".boot_hdr.conf") const struct flexspi_nor_config_s g_flash_config = { .mem_config = @@ -76,7 +76,7 @@ const struct flexspi_nor_config_s g_flash_config = }; #elif defined (CONFIG_IMXRT1050_EVK_QSPI_FLASH) -__attribute__((section(".boot_hdr.conf"))) +locate_data(".boot_hdr.conf") const struct flexspi_nor_config_s g_flash_config = { .mem_config = diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_gpio.c b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_gpio.c index 1f1da26ef98..23bb43e7f14 100644 --- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_gpio.c +++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_gpio.c @@ -1,41 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1050-evk/src/imxrt_gpio.c * - * Copyright (C) 2017-2018 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved. - * Author: Alan Carvalho de Assis + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/imxrt1050-evk/src/imxrt_gpio.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Author: Pavlina Koleva - * Modified by: Ivan Ucherdzhiev - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_sdram_ini_dcd.c b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_sdram_ini_dcd.c index 12566433ed4..bcffc91d609 100644 --- a/boards/arm/imxrt/imxrt1050-evk/src/imxrt_sdram_ini_dcd.c +++ b/boards/arm/imxrt/imxrt1050-evk/src/imxrt_sdram_ini_dcd.c @@ -37,7 +37,7 @@ #include "imxrt_flexspi_nor_boot.h" -__attribute__((section(".boot_hdr.dcd_data"))) +locate_data(".boot_hdr.dcd_data") /**************************************************************************** * Public Data diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/knsh/Make.defs b/boards/arm/imxrt/imxrt1060-evk/configs/knsh/Make.defs index 90a487e5d4f..4deba0e03fc 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/knsh/Make.defs +++ b/boards/arm/imxrt/imxrt1060-evk/configs/knsh/Make.defs @@ -54,8 +54,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -69,9 +69,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1060-evk/configs/libcxxtest/Make.defs b/boards/arm/imxrt/imxrt1060-evk/configs/libcxxtest/Make.defs index 10954e43451..c3f5d3a6669 100644 --- a/boards/arm/imxrt/imxrt1060-evk/configs/libcxxtest/Make.defs +++ b/boards/arm/imxrt/imxrt1060-evk/configs/libcxxtest/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/imxrt/imxrt1060-evk/configs/libcxxtest/Make.defs # -# Copyright (C) 2018 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Daniel Pereira Volpato +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -81,8 +65,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -96,9 +80,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1060-evk/include/board.h b/boards/arm/imxrt/imxrt1060-evk/include/board.h index 20cc18df1c1..2b150d80816 100644 --- a/boards/arm/imxrt/imxrt1060-evk/include/board.h +++ b/boards/arm/imxrt/imxrt1060-evk/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1060-evk/include/board.h * - * Copyright (C) 2018-2019 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * David Sidrane - * Dave Marples + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1060-evk/kernel/Makefile b/boards/arm/imxrt/imxrt1060-evk/kernel/Makefile index 7f514050145..f1f49268a48 100644 --- a/boards/arm/imxrt/imxrt1060-evk/kernel/Makefile +++ b/boards/arm/imxrt/imxrt1060-evk/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/imxrt/imxrt1060-evk/kernel/imxrt_userspace.c b/boards/arm/imxrt/imxrt1060-evk/kernel/imxrt_userspace.c index 574e28eafb1..88c30e27793 100644 --- a/boards/arm/imxrt/imxrt1060-evk/kernel/imxrt_userspace.c +++ b/boards/arm/imxrt/imxrt1060-evk/kernel/imxrt_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/imxrt/imxrt1060-evk/scripts/Make.defs b/boards/arm/imxrt/imxrt1060-evk/scripts/Make.defs index dde6d3b8a6e..193c5a1778c 100644 --- a/boards/arm/imxrt/imxrt1060-evk/scripts/Make.defs +++ b/boards/arm/imxrt/imxrt1060-evk/scripts/Make.defs @@ -29,9 +29,9 @@ else ifeq ($(CONFIG_BOOT_RUNFROMISRAM),y) endif ifeq ($(CONFIG_CYGWIN_WINTOOL),y) - ARCHSCRIPT = -Wl,-T"${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" + ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" else - ARCHSCRIPT = -Wl,-T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) + ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,14 +70,12 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs ifeq ($(CONFIG_CYGWIN_WINTOOL),y) - LDFLAGS += -Wl,-Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" + LDFLAGS += -Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" else - LDFLAGS += -Wl,-Map=$(TOPDIR)/nuttx.map -endif + LDFLAGS += -Map=$(TOPDIR)/nuttx.map endif + ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_buttons.c b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_buttons.c index ae38e0c0594..5fa50b435ce 100644 --- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_buttons.c +++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_buttons.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1060-evk/src/imxrt_buttons.c * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * David Sidrane - * Dave Marples + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.c b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.c index d80573c6772..09cec412cbb 100644 --- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.c +++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_boot.c @@ -28,7 +28,7 @@ * Public Data ****************************************************************************/ -__attribute__((section(".boot_hdr.ivt"))) +locate_data(".boot_hdr.ivt") const struct ivt_s g_image_vector_table = { IVT_HEADER, /* IVT Header */ @@ -41,7 +41,7 @@ const struct ivt_s g_image_vector_table = IVT_RSVD /* Reserved = 0 */ }; -__attribute__((section(".boot_hdr.boot_data"))) +locate_data(".boot_hdr.boot_data") const struct boot_data_s g_boot_data = { IMAGE_DEST, /* boot start location */ diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.c b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.c index 801c131b96a..635b82aff0e 100644 --- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.c +++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_flexspi_nor_flash.c @@ -29,7 +29,7 @@ ****************************************************************************/ #if defined (CONFIG_IMXRT1060_EVK_HYPER_FLASH) -__attribute__((section(".boot_hdr.conf"))) +locate_data(".boot_hdr.conf") const struct flexspi_nor_config_s g_flash_config = { .mem_config = @@ -75,7 +75,7 @@ const struct flexspi_nor_config_s g_flash_config = }; #elif defined (CONFIG_IMXRT1060_EVK_QSPI_FLASH) -__attribute__((section(".boot_hdr.conf"))) +locate_data(".boot_hdr.conf") const struct flexspi_nor_config_s g_flash_config = { .mem_config = diff --git a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_gpio.c b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_gpio.c index a50b13f6991..75d60f7b82e 100644 --- a/boards/arm/imxrt/imxrt1060-evk/src/imxrt_gpio.c +++ b/boards/arm/imxrt/imxrt1060-evk/src/imxrt_gpio.c @@ -1,41 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1060-evk/src/imxrt_gpio.c * - * Copyright (C) 2017-2018 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved. - * Author: Alan Carvalho de Assis + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/imxrt1050-evk/src/imxrt_gpio.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Author: Pavlina Koleva - * Modified by: Ivan Ucherdzhiev - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/knsh/Make.defs b/boards/arm/imxrt/imxrt1064-evk/configs/knsh/Make.defs index 90a487e5d4f..4deba0e03fc 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/knsh/Make.defs +++ b/boards/arm/imxrt/imxrt1064-evk/configs/knsh/Make.defs @@ -54,8 +54,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -69,9 +69,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1064-evk/configs/libcxxtest/Make.defs b/boards/arm/imxrt/imxrt1064-evk/configs/libcxxtest/Make.defs index 10954e43451..c3f5d3a6669 100644 --- a/boards/arm/imxrt/imxrt1064-evk/configs/libcxxtest/Make.defs +++ b/boards/arm/imxrt/imxrt1064-evk/configs/libcxxtest/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/imxrt/imxrt1060-evk/configs/libcxxtest/Make.defs # -# Copyright (C) 2018 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Daniel Pereira Volpato +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -81,8 +65,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -96,9 +80,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/imxrt1064-evk/include/board.h b/boards/arm/imxrt/imxrt1064-evk/include/board.h index d318b3138fd..9ebeb139651 100644 --- a/boards/arm/imxrt/imxrt1064-evk/include/board.h +++ b/boards/arm/imxrt/imxrt1064-evk/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1064-evk/include/board.h * - * Copyright (C) 2018-2019 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * David Sidrane - * Dave Marples + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1064-evk/kernel/Makefile b/boards/arm/imxrt/imxrt1064-evk/kernel/Makefile index 675d07089f9..301e7d5fadf 100644 --- a/boards/arm/imxrt/imxrt1064-evk/kernel/Makefile +++ b/boards/arm/imxrt/imxrt1064-evk/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/imxrt/imxrt1064-evk/kernel/imxrt_userspace.c b/boards/arm/imxrt/imxrt1064-evk/kernel/imxrt_userspace.c index aed67cf2140..87ae5e0ebfc 100644 --- a/boards/arm/imxrt/imxrt1064-evk/kernel/imxrt_userspace.c +++ b/boards/arm/imxrt/imxrt1064-evk/kernel/imxrt_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/imxrt/imxrt1064-evk/scripts/Make.defs b/boards/arm/imxrt/imxrt1064-evk/scripts/Make.defs index e58d322e92f..d197efcd7a3 100644 --- a/boards/arm/imxrt/imxrt1064-evk/scripts/Make.defs +++ b/boards/arm/imxrt/imxrt1064-evk/scripts/Make.defs @@ -29,9 +29,9 @@ else ifeq ($(CONFIG_BOOT_RUNFROMISRAM),y) endif ifeq ($(CONFIG_CYGWIN_WINTOOL),y) - ARCHSCRIPT = -Wl,-T"${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" + ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" else - ARCHSCRIPT = -Wl,-T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) + ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,13 +70,10 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs ifeq ($(CONFIG_CYGWIN_WINTOOL),y) - LDFLAGS += -Wl,-Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" + LDFLAGS += -Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" else - LDFLAGS += -Wl,-Map=$(TOPDIR)/nuttx.map -endif + LDFLAGS += -Map=$(TOPDIR)/nuttx.map endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g diff --git a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_buttons.c b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_buttons.c index 66f47627674..c6a52204951 100644 --- a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_buttons.c +++ b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_buttons.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1064-evk/src/imxrt_buttons.c * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * David Sidrane - * Dave Marples + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_boot.c b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_boot.c index dfaf0051aaf..018994d9e46 100644 --- a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_boot.c +++ b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_boot.c @@ -28,7 +28,7 @@ * Public Data ****************************************************************************/ -__attribute__((section(".boot_hdr.ivt"))) +locate_data(".boot_hdr.ivt") const struct ivt_s g_image_vector_table = { IVT_HEADER, /* IVT Header */ @@ -41,7 +41,7 @@ const struct ivt_s g_image_vector_table = IVT_RSVD /* Reserved = 0 */ }; -__attribute__((section(".boot_hdr.boot_data"))) +locate_data(".boot_hdr.boot_data") const struct boot_data_s g_boot_data = { IMAGE_DEST, /* boot start location */ diff --git a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_flash.c b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_flash.c index a72ff4d0cbd..da1081dfd52 100644 --- a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_flash.c +++ b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_flexspi_nor_flash.c @@ -29,7 +29,7 @@ ****************************************************************************/ #if defined (CONFIG_IMXRT1060_EVK_HYPER_FLASH) -__attribute__((section(".boot_hdr.conf"))) +locate_data(".boot_hdr.conf") const struct flexspi_nor_config_s g_flash_config = { .mem_config = @@ -76,7 +76,7 @@ const struct flexspi_nor_config_s g_flash_config = }; #elif defined (CONFIG_IMXRT1064_EVK_QSPI_FLASH) -__attribute__((section(".boot_hdr.conf"))) +locate_data(".boot_hdr.conf") const struct flexspi_nor_config_s g_flash_config = { .mem_config = diff --git a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_gpio.c b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_gpio.c index 3070925a0ff..e83d6811265 100644 --- a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_gpio.c +++ b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_gpio.c @@ -1,41 +1,20 @@ /**************************************************************************** * boards/arm/imxrt/imxrt1064-evk/src/imxrt_gpio.c * - * Copyright (C) 2017-2018 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved. - * Author: Alan Carvalho de Assis + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/imxrt1050-evk/src/imxrt_gpio.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Author: Pavlina Koleva - * Modified by: Ivan Ucherdzhiev - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_sdram_ini_dcd.c b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_sdram_ini_dcd.c index 2aa831a6e8c..2d0c4114bcf 100644 --- a/boards/arm/imxrt/imxrt1064-evk/src/imxrt_sdram_ini_dcd.c +++ b/boards/arm/imxrt/imxrt1064-evk/src/imxrt_sdram_ini_dcd.c @@ -24,7 +24,7 @@ #include "imxrt_flexspi_nor_boot.h" -__attribute__((section(".boot_hdr.dcd_data"))) +locate_data(".boot_hdr.dcd_data") /**************************************************************************** * Public Data diff --git a/boards/arm/imxrt/teensy-4.x/Kconfig b/boards/arm/imxrt/teensy-4.x/Kconfig index 9b330f66afa..74faef1da76 100644 --- a/boards/arm/imxrt/teensy-4.x/Kconfig +++ b/boards/arm/imxrt/teensy-4.x/Kconfig @@ -24,4 +24,10 @@ config TEENSY_41 endchoice # Board configuration +config IMXRT_FLEXCAN3_AS_CAN0 + bool "Initialize CAN3 bus as can0" + ---help--- + This configuration option ensures that if more that one CAN bus is set on + that CAN 3 (with FD capability) will be initialized as can0. + endif diff --git a/boards/arm/imxrt/teensy-4.x/configs/pikron-bb/defconfig b/boards/arm/imxrt/teensy-4.x/configs/pikron-bb/defconfig index 8805f60e0f4..fb63dbaca12 100644 --- a/boards/arm/imxrt/teensy-4.x/configs/pikron-bb/defconfig +++ b/boards/arm/imxrt/teensy-4.x/configs/pikron-bb/defconfig @@ -9,6 +9,7 @@ # CONFIG_NSH_DISABLE_DATE is not set # CONFIG_NSH_DISABLE_PRINTF is not set # CONFIG_NSH_DISABLE_TRUNCATE is not set +CONFIG_ALLOW_GPL_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="teensy-4.x" CONFIG_ARCH_BOARD_TEENSY_4X=y @@ -31,11 +32,6 @@ CONFIG_CANUTILS_CANDUMP=y CONFIG_CANUTILS_CANSEND=y CONFIG_CAN_FD=y CONFIG_CLOCK_MONOTONIC=y -CONFIG_DEBUG_ERROR=y -CONFIG_DEBUG_FEATURES=y -CONFIG_DEBUG_FULLOPT=y -CONFIG_DEBUG_SYMBOLS=y -CONFIG_DEBUG_WARN=y CONFIG_DEV_LOOP=y CONFIG_DEV_ZERO=y CONFIG_DRIVERS_VIDEO=y @@ -58,7 +54,11 @@ CONFIG_IDLETHREAD_STACKSIZE=2048 CONFIG_IMXRT_ENET=y CONFIG_IMXRT_ENET_NRXBUFFERS=16 CONFIG_IMXRT_ENET_NTXBUFFERS=8 +CONFIG_IMXRT_FLEXCAN1=y +CONFIG_IMXRT_FLEXCAN2=y CONFIG_IMXRT_FLEXCAN3=y +CONFIG_IMXRT_FLEXCAN3_AS_CAN0=y +CONFIG_IMXRT_FLEXCAN_TXMB=1 CONFIG_IMXRT_LPSPI4=y CONFIG_IMXRT_LPUART1=y CONFIG_IMXRT_SNVS_LPSRTC=y @@ -146,5 +146,6 @@ CONFIG_SYSTEM_PING6=y CONFIG_SYSTEM_PING=y CONFIG_SYSTEM_TEE=y CONFIG_TEENSY_41=y +CONFIG_USEC_PER_TICK=1000 CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_VIDEO_FB=y diff --git a/boards/arm/imxrt/teensy-4.x/kernel/Makefile b/boards/arm/imxrt/teensy-4.x/kernel/Makefile index a1b7c5110af..9747245bbb8 100644 --- a/boards/arm/imxrt/teensy-4.x/kernel/Makefile +++ b/boards/arm/imxrt/teensy-4.x/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/imxrt/teensy-4.x/kernel/imxrt_userspace.c b/boards/arm/imxrt/teensy-4.x/kernel/imxrt_userspace.c index a34e930f7e0..02abff2eb3d 100644 --- a/boards/arm/imxrt/teensy-4.x/kernel/imxrt_userspace.c +++ b/boards/arm/imxrt/teensy-4.x/kernel/imxrt_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/imxrt/teensy-4.x/scripts/Make.defs b/boards/arm/imxrt/teensy-4.x/scripts/Make.defs index fbd6ea88d77..fa8a5b17c66 100644 --- a/boards/arm/imxrt/teensy-4.x/scripts/Make.defs +++ b/boards/arm/imxrt/teensy-4.x/scripts/Make.defs @@ -34,6 +34,16 @@ else ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) endif +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +STRIP = $(CROSSDEV)strip --strip-unneeded +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} @@ -58,8 +68,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS = $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -73,9 +83,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/imxrt/teensy-4.x/src/imxrt_flexcan.c b/boards/arm/imxrt/teensy-4.x/src/imxrt_flexcan.c index 8d08c464c8a..729ce7fe2a8 100644 --- a/boards/arm/imxrt/teensy-4.x/src/imxrt_flexcan.c +++ b/boards/arm/imxrt/teensy-4.x/src/imxrt_flexcan.c @@ -50,6 +50,19 @@ int imxrt_can_setup(void) { int ret; + +#ifdef CONFIG_IMXRT_FLEXCAN3_AS_CAN0 +# ifdef CONFIG_IMXRT_FLEXCAN3 + ret = imxrt_caninitialize(3); + if (ret < 0) + { + canerr("ERROR: Failed to get CAN interface\n"); + return -ENODEV; + } + +# endif +#endif + #ifdef CONFIG_IMXRT_FLEXCAN1 /* Call arm_caninitialize() to get an instance of the CAN interface */ @@ -70,7 +83,8 @@ int imxrt_can_setup(void) } #endif -#ifdef CONFIG_IMXRT_FLEXCAN3 +#ifndef CONFIG_IMXRT_FLEXCAN3_AS_CAN0 +# ifdef CONFIG_IMXRT_FLEXCAN3 ret = imxrt_caninitialize(3); if (ret < 0) { @@ -78,6 +92,7 @@ int imxrt_can_setup(void) return -ENODEV; } +# endif #endif UNUSED(ret); return OK; diff --git a/boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_boot.c b/boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_boot.c index 8bcf262866b..b962e4bf783 100644 --- a/boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_boot.c +++ b/boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_boot.c @@ -28,7 +28,7 @@ * Public Data ****************************************************************************/ -__attribute__((section(".boot_hdr.ivt"))) +locate_data(".boot_hdr.ivt") const struct ivt_s g_image_vector_table = { IVT_HEADER, /* IVT Header */ @@ -44,7 +44,7 @@ __attribute__((section(".boot_hdr.ivt"))) IVT_RSVD /* Reserved = 0 */ }; -__attribute__((section(".boot_hdr.boot_data"))) +locate_data(".boot_hdr.boot_data") const struct boot_data_s g_boot_data = { IMAGE_DEST, /* boot start location */ diff --git a/boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_flash.c b/boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_flash.c index c15367649f2..29b32d7ee47 100644 --- a/boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_flash.c +++ b/boards/arm/imxrt/teensy-4.x/src/imxrt_flexspi_nor_flash.c @@ -29,7 +29,7 @@ ****************************************************************************/ #if defined (CONFIG_TEENSY4_QSPI_FLASH) -__attribute__((section(".boot_hdr.conf"))) +locate_data(".boot_hdr.conf") const struct flexspi_nor_config_s g_flash_config = { .mem_config = diff --git a/boards/arm/kinetis/freedom-k28f/scripts/Make.defs b/boards/arm/kinetis/freedom-k28f/scripts/Make.defs index 98e92dc81f1..d9c4dbb15bf 100644 --- a/boards/arm/kinetis/freedom-k28f/scripts/Make.defs +++ b/boards/arm/kinetis/freedom-k28f/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/kinetis/freedom-k64f/scripts/Make.defs b/boards/arm/kinetis/freedom-k64f/scripts/Make.defs index ed625e238fd..1664e2fa51e 100644 --- a/boards/arm/kinetis/freedom-k64f/scripts/Make.defs +++ b/boards/arm/kinetis/freedom-k64f/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/kinetis/freedom-k64f/src/k64_pwm.c b/boards/arm/kinetis/freedom-k64f/src/k64_pwm.c index a4dadb3c5bf..e7ecdbdfb91 100644 --- a/boards/arm/kinetis/freedom-k64f/src/k64_pwm.c +++ b/boards/arm/kinetis/freedom-k64f/src/k64_pwm.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/kinetis/freedom-k64f/src/k64_pwm.c * - * Copyright (C) 2013, 2015, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Jordan MacIntyre + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/kinetis/freedom-k66f/scripts/Make.defs b/boards/arm/kinetis/freedom-k66f/scripts/Make.defs index bfa11ede568..e4942d7af37 100644 --- a/boards/arm/kinetis/freedom-k66f/scripts/Make.defs +++ b/boards/arm/kinetis/freedom-k66f/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/kinetis/freedom-k66f/src/k66_pwm.c b/boards/arm/kinetis/freedom-k66f/src/k66_pwm.c index e040a6afca2..0f42df7f28d 100644 --- a/boards/arm/kinetis/freedom-k66f/src/k66_pwm.c +++ b/boards/arm/kinetis/freedom-k66f/src/k66_pwm.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/kinetis/freedom-k66f/src/k66_pwm.c * - * Copyright (C) 2013, 2015, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Jordan MacIntyre + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/kinetis/kwikstik-k40/scripts/Make.defs b/boards/arm/kinetis/kwikstik-k40/scripts/Make.defs index b6a4b9eafda..ce4ab258d4e 100644 --- a/boards/arm/kinetis/kwikstik-k40/scripts/Make.defs +++ b/boards/arm/kinetis/kwikstik-k40/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/kinetis/teensy-3.x/scripts/Make.defs b/boards/arm/kinetis/teensy-3.x/scripts/Make.defs index 9413e57fe9f..d13d99a8096 100644 --- a/boards/arm/kinetis/teensy-3.x/scripts/Make.defs +++ b/boards/arm/kinetis/teensy-3.x/scripts/Make.defs @@ -55,13 +55,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/kinetis/teensy-3.x/src/k20_i2c.c b/boards/arm/kinetis/teensy-3.x/src/k20_i2c.c index 1fc288d0c6b..db1e2e579e0 100644 --- a/boards/arm/kinetis/teensy-3.x/src/k20_i2c.c +++ b/boards/arm/kinetis/teensy-3.x/src/k20_i2c.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/kinetis/teensy-3.x/src/k20_i2c.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Matias v01d + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/kinetis/twr-k60n512/scripts/Make.defs b/boards/arm/kinetis/twr-k60n512/scripts/Make.defs index 6520dc910f2..8aed4b9b0de 100644 --- a/boards/arm/kinetis/twr-k60n512/scripts/Make.defs +++ b/boards/arm/kinetis/twr-k60n512/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/kinetis/twr-k64f120m/scripts/Make.defs b/boards/arm/kinetis/twr-k64f120m/scripts/Make.defs index 748147ae71d..30735a628e9 100644 --- a/boards/arm/kinetis/twr-k64f120m/scripts/Make.defs +++ b/boards/arm/kinetis/twr-k64f120m/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/kl/freedom-kl25z/scripts/Make.defs b/boards/arm/kl/freedom-kl25z/scripts/Make.defs index 8efb86f5af0..0eed7723ece 100644 --- a/boards/arm/kl/freedom-kl25z/scripts/Make.defs +++ b/boards/arm/kl/freedom-kl25z/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/kl/freedom-kl26z/scripts/Make.defs b/boards/arm/kl/freedom-kl26z/scripts/Make.defs index 6c7b9b79209..ebe71845c9a 100644 --- a/boards/arm/kl/freedom-kl26z/scripts/Make.defs +++ b/boards/arm/kl/freedom-kl26z/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/kl/teensy-lc/scripts/Make.defs b/boards/arm/kl/teensy-lc/scripts/Make.defs index 42773157109..ee9561af224 100644 --- a/boards/arm/kl/teensy-lc/scripts/Make.defs +++ b/boards/arm/kl/teensy-lc/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lc823450/lc823450-xgevk/configs/rndis/defconfig b/boards/arm/lc823450/lc823450-xgevk/configs/rndis/defconfig index b3043c24d98..c082cae5d1b 100644 --- a/boards/arm/lc823450/lc823450-xgevk/configs/rndis/defconfig +++ b/boards/arm/lc823450/lc823450-xgevk/configs/rndis/defconfig @@ -9,6 +9,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NX_DISABLE_1BPP is not set # CONFIG_SPI_EXCHANGE is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_AQM_1248A=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="lc823450-xgevk" diff --git a/boards/arm/lc823450/lc823450-xgevk/kernel/Makefile b/boards/arm/lc823450/lc823450-xgevk/kernel/Makefile index a34a392aba4..384fde4c8d6 100644 --- a/boards/arm/lc823450/lc823450-xgevk/kernel/Makefile +++ b/boards/arm/lc823450/lc823450-xgevk/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/lc823450/lc823450-xgevk/kernel/lc823450_userspace.c b/boards/arm/lc823450/lc823450-xgevk/kernel/lc823450_userspace.c index c6b550920dc..981a65f4a34 100644 --- a/boards/arm/lc823450/lc823450-xgevk/kernel/lc823450_userspace.c +++ b/boards/arm/lc823450/lc823450-xgevk/kernel/lc823450_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/lc823450/lc823450-xgevk/scripts/Make.defs b/boards/arm/lc823450/lc823450-xgevk/scripts/Make.defs index 9ede77232b2..331eff189bd 100644 --- a/boards/arm/lc823450/lc823450-xgevk/scripts/Make.defs +++ b/boards/arm/lc823450/lc823450-xgevk/scripts/Make.defs @@ -61,8 +61,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -81,14 +81,11 @@ endif # Linker flags -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif -LDFLAGS += -Wl,--gc-sections +LDFLAGS += --gc-sections ifeq ($(CONFIG_LC823450_SDIF_PATCH),y) @@ -102,8 +99,8 @@ ifeq ($(CONFIG_CYGWIN_WINTOOL),y) else ARCH_SYMBOLS = $(TOPDIR)/arch/arm/src/lc823450/lc823450_symbols.ld endif - ARCH_LIBS += $(ARCH_LIBS_OPT) -Wl,--just-symbols=$(ARCH_SYMBOLS) - LDFLAGS += -Wl,--no-wchar-size-warning + ARCH_LIBS += $(ARCH_LIBS_OPT) --just-symbols=$(ARCH_SYMBOLS) + LDFLAGS += --no-wchar-size-warning endif diff --git a/boards/arm/lpc17xx_40xx/lincoln60/scripts/Make.defs b/boards/arm/lpc17xx_40xx/lincoln60/scripts/Make.defs index ef989576e06..749ce6e5b5b 100644 --- a/boards/arm/lpc17xx_40xx/lincoln60/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/lincoln60/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/lpc4088-devkit/configs/knsh/Make.defs b/boards/arm/lpc17xx_40xx/lpc4088-devkit/configs/knsh/Make.defs index d6009d86025..b9715a0545f 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-devkit/configs/knsh/Make.defs +++ b/boards/arm/lpc17xx_40xx/lpc4088-devkit/configs/knsh/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/lpc4088-devkit/kernel/Makefile b/boards/arm/lpc17xx_40xx/lpc4088-devkit/kernel/Makefile index 1d8508c0e9d..a302099439c 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-devkit/kernel/Makefile +++ b/boards/arm/lpc17xx_40xx/lpc4088-devkit/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/lpc17xx_40xx/lpc4088-devkit/kernel/lpc17_40_userspace.c b/boards/arm/lpc17xx_40xx/lpc4088-devkit/kernel/lpc17_40_userspace.c index 22995e4f676..e18acc2891d 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-devkit/kernel/lpc17_40_userspace.c +++ b/boards/arm/lpc17xx_40xx/lpc4088-devkit/kernel/lpc17_40_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/Make.defs b/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/Make.defs index dfab088e070..312df669619 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/ld.script b/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/ld.script index d296460dce8..b685684cc20 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/ld.script +++ b/boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/ld.script @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/lpc4088-devkit/scripts/ld.script * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Rommel Marcelo - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/configs/knsh/Make.defs b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/configs/knsh/Make.defs index 7102da2eb7a..ea54e53c1d2 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/configs/knsh/Make.defs +++ b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/configs/knsh/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/kernel/Makefile b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/kernel/Makefile index 53b2b48a72a..4f5babefe3f 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/kernel/Makefile +++ b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/kernel/lpc17_40_userspace.c b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/kernel/lpc17_40_userspace.c index ee15d8c4eb1..28c0e36113f 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/kernel/lpc17_40_userspace.c +++ b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/kernel/lpc17_40_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/Make.defs b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/Make.defs index e50770b0025..78e57727f64 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/ld.script b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/ld.script index b91ec46b21b..f25a843f6e5 100644 --- a/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/ld.script +++ b/boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/ld.script @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/lpc4088-quickstart/scripts/ld.script * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Rommel Marcelo - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/configs/thttpd/Make.defs b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/configs/thttpd/Make.defs index abd5dc35ea4..80417e6d8b3 100644 --- a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/configs/thttpd/Make.defs +++ b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/configs/thttpd/Make.defs @@ -54,13 +54,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common +NXFLATLDFLAGS1 = -r -d -warn-common NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) $(NXFLATLDSCRIPT) -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/scripts/Make.defs b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/scripts/Make.defs index f802798f3a0..eb0a20e2c05 100644 --- a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_adc.c b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_adc.c index 56375a9d149..87183adbf28 100644 --- a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_adc.c +++ b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_adc.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_adc.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/stm3220g-eval/src/lpc17_40_adc.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_dac.c b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_dac.c index 5ba4b30366f..b1a3851090e 100644 --- a/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_dac.c +++ b/boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_dac.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_dac.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/stm3220g-eval/src/lpc17_40_dac.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/configs/nsh/defconfig b/boards/arm/lpc17xx_40xx/lx_cpu/configs/nsh/defconfig index 9cb3c5f9362..9592b0b4dcf 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/configs/nsh/defconfig +++ b/boards/arm/lpc17xx_40xx/lx_cpu/configs/nsh/defconfig @@ -11,6 +11,7 @@ # CONFIG_NSH_DISABLE_SHUTDOWN is not set # CONFIG_NSH_DISABLE_TRUNCATE is not set # CONFIG_SPI_EXCHANGE is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="lx_cpu" CONFIG_ARCH_BOARD_LX_CPU=y diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/Make.defs b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/Make.defs index de893534d8f..5e6843722a1 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/Make.defs @@ -63,8 +63,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -94,9 +94,6 @@ endif # Linker flags -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-app.ld b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-app.ld index 85b50607909..621a9e120aa 100755 --- a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-app.ld +++ b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-app.ld @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-app.ld * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Rommel Marcelo - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-boot.ld b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-boot.ld index e9a80ef7234..be0d5527b9e 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-boot.ld +++ b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-boot.ld @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-flash-boot.ld * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Rommel Marcelo - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-sdram.ld b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-sdram.ld index cab2f728773..d88be474d8e 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-sdram.ld +++ b/boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-sdram.ld @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/lx_cpu/scripts/link-sdram.ld * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Rommel Marcelo - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_can.c b/boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_can.c index 7b86238ee13..12ee4aedf84 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_can.c +++ b/boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_can.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_can.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Raashid Muhammed + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/olimex-lpc1766stk/src/lpc17_40_can.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2012, 2016, 2019 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_ulan.c b/boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_ulan.c index 6ee90952f57..ba28cea69d0 100644 --- a/boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_ulan.c +++ b/boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_ulan.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/lx_cpu/src/lpc17_40_ulan.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Pavel Pisa + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/mbed/scripts/Make.defs b/boards/arm/lpc17xx_40xx/mbed/scripts/Make.defs index 30debf46edf..608a8dd2c69 100644 --- a/boards/arm/lpc17xx_40xx/mbed/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/mbed/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_adc.c b/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_adc.c index c7b3e01e81c..1eb3d559710 100644 --- a/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_adc.c +++ b/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_adc.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_adc.c * - * Based on boards/zkit-arm-176/src/up-adc + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on boards/lpc1720g-eval/src/lpc17_40_adc.c - * - * Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_dac.c b/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_dac.c index 94ce55c212c..62babfeca9a 100644 --- a/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_dac.c +++ b/boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_dac.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_dac.c * - * Based on boards/zkit-arm-1769/src/lpc17_40_dac.c + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on boards/stm3220g-eval/src/stm32_dac.c - * - * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/mcb1700/scripts/Make.defs b/boards/arm/lpc17xx_40xx/mcb1700/scripts/Make.defs index 1741c806168..69e608d9b54 100644 --- a/boards/arm/lpc17xx_40xx/mcb1700/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/mcb1700/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_adc.c b/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_adc.c index c1858514e7b..87acdbfdc59 100644 --- a/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_adc.c +++ b/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_adc.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_adc.c * - * Based on boards/zkit-arm-176/src/up-adc + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on boards/lpc1720g-eval/src/lpc17_40_adc.c - * - * Copyright (C) 2012, 2014, 2016-2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_dac.c b/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_dac.c index 6beeec5a314..8c8906e5b4c 100644 --- a/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_dac.c +++ b/boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_dac.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_dac.c * - * Based on boards/zkit-arm-1769/src/lpc17_40_dac.c + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on boards/stm3220g-eval/src/stm32_dac.c - * - * Copyright (C) 2012, 2014, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/configs/thttpd-binfs/Make.defs b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/configs/thttpd-binfs/Make.defs index 71c32dc40c3..05d7ef28d64 100644 --- a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/configs/thttpd-binfs/Make.defs +++ b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/configs/thttpd-binfs/Make.defs @@ -52,13 +52,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/configs/thttpd-nxflat/Make.defs b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/configs/thttpd-nxflat/Make.defs index 64771cca9fd..222b181d78f 100644 --- a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/configs/thttpd-nxflat/Make.defs +++ b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/configs/thttpd-nxflat/Make.defs @@ -52,13 +52,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/scripts/Make.defs b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/scripts/Make.defs index f72b0042c73..71bdb2a6172 100644 --- a/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/olimex-lpc1766stk/scripts/Make.defs @@ -52,13 +52,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/open1788/configs/fb/defconfig b/boards/arm/lpc17xx_40xx/open1788/configs/fb/defconfig index 5c6dcde02f6..855117cfe09 100644 --- a/boards/arm/lpc17xx_40xx/open1788/configs/fb/defconfig +++ b/boards/arm/lpc17xx_40xx/open1788/configs/fb/defconfig @@ -20,7 +20,6 @@ CONFIG_BUILTIN=y CONFIG_DEV_LOOP=y CONFIG_DRIVERS_VIDEO=y CONFIG_EXAMPLES_FB=y -CONFIG_HOST_WINDOWS=y CONFIG_LPC17_40_EXTDRAM=y CONFIG_LPC17_40_EXTDRAMSIZE=67108864 CONFIG_LPC17_40_GPDMA=y @@ -30,6 +29,7 @@ CONFIG_LPC17_40_UART0=y CONFIG_MMCSD=y CONFIG_MMCSD_SDIO=y CONFIG_MM_REGIONS=3 +CONFIG_MQ_MAXMSGSIZE=64 CONFIG_NX=y CONFIG_NXFONT_SANS23X27=y CONFIG_NXFONT_SANS28X37B=y diff --git a/boards/arm/lpc17xx_40xx/open1788/configs/knsh/Make.defs b/boards/arm/lpc17xx_40xx/open1788/configs/knsh/Make.defs index 55cefa438ae..f4125809348 100644 --- a/boards/arm/lpc17xx_40xx/open1788/configs/knsh/Make.defs +++ b/boards/arm/lpc17xx_40xx/open1788/configs/knsh/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/open1788/configs/knxterm/Make.defs b/boards/arm/lpc17xx_40xx/open1788/configs/knxterm/Make.defs index 9d8f6f1344a..5c1927edd80 100644 --- a/boards/arm/lpc17xx_40xx/open1788/configs/knxterm/Make.defs +++ b/boards/arm/lpc17xx_40xx/open1788/configs/knxterm/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/open1788/kernel/Makefile b/boards/arm/lpc17xx_40xx/open1788/kernel/Makefile index 44fb00071d1..fc2210758f7 100644 --- a/boards/arm/lpc17xx_40xx/open1788/kernel/Makefile +++ b/boards/arm/lpc17xx_40xx/open1788/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/lpc17xx_40xx/open1788/kernel/lpc17_40_userspace.c b/boards/arm/lpc17xx_40xx/open1788/kernel/lpc17_40_userspace.c index 78c7fc1a5d4..420f629c680 100644 --- a/boards/arm/lpc17xx_40xx/open1788/kernel/lpc17_40_userspace.c +++ b/boards/arm/lpc17xx_40xx/open1788/kernel/lpc17_40_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/lpc17xx_40xx/open1788/scripts/Make.defs b/boards/arm/lpc17xx_40xx/open1788/scripts/Make.defs index e8404f22db3..a4b1c7bf625 100644 --- a/boards/arm/lpc17xx_40xx/open1788/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/open1788/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/open1788/scripts/ld.script b/boards/arm/lpc17xx_40xx/open1788/scripts/ld.script index d3bf8e97564..3527d7bf1ee 100644 --- a/boards/arm/lpc17xx_40xx/open1788/scripts/ld.script +++ b/boards/arm/lpc17xx_40xx/open1788/scripts/ld.script @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/open1788/scripts/ld.script * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Rommel Marcelo - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/pnev5180b/configs/knsh/Make.defs b/boards/arm/lpc17xx_40xx/pnev5180b/configs/knsh/Make.defs index a5ee3a2611f..b88e33f5e15 100644 --- a/boards/arm/lpc17xx_40xx/pnev5180b/configs/knsh/Make.defs +++ b/boards/arm/lpc17xx_40xx/pnev5180b/configs/knsh/Make.defs @@ -56,16 +56,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) -ifneq ($(CROSSDEV),arm-nuttx-eabi-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif -endif - ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/pnev5180b/include/board.h b/boards/arm/lpc17xx_40xx/pnev5180b/include/board.h index 55c5de62266..0728be97ac1 100644 --- a/boards/arm/lpc17xx_40xx/pnev5180b/include/board.h +++ b/boards/arm/lpc17xx_40xx/pnev5180b/include/board.h @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/pnev5180b/include/board.h - * include/arch/board/board.h * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Michael Jung + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/zkit-arm-1769/include/board.h - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/pnev5180b/kernel/Makefile b/boards/arm/lpc17xx_40xx/pnev5180b/kernel/Makefile index af6f307f1b5..727ba43abc7 100644 --- a/boards/arm/lpc17xx_40xx/pnev5180b/kernel/Makefile +++ b/boards/arm/lpc17xx_40xx/pnev5180b/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/lpc17xx_40xx/pnev5180b/kernel/lpc17_40_userspace.c b/boards/arm/lpc17xx_40xx/pnev5180b/kernel/lpc17_40_userspace.c index e9106e842d9..c8ea4d3f9d0 100644 --- a/boards/arm/lpc17xx_40xx/pnev5180b/kernel/lpc17_40_userspace.c +++ b/boards/arm/lpc17xx_40xx/pnev5180b/kernel/lpc17_40_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/lpc17xx_40xx/pnev5180b/scripts/Make.defs b/boards/arm/lpc17xx_40xx/pnev5180b/scripts/Make.defs index 9abcc6d2a98..3753d87d2ad 100644 --- a/boards/arm/lpc17xx_40xx/pnev5180b/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/pnev5180b/scripts/Make.defs @@ -1,41 +1,20 @@ ############################################################################ # boards/arm/lpc17xx_40xx/pnev5180b/scripts/Make.defs # -# Copyright (C) 2019 Gregory Nutt. All rights reserved. -# Author: Michael Jung +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Based on boards/zkit-arm-1769/scripts/Make.defs +# http:#www.apache.org/licenses/LICENSE-2.0 # -# Copyright (C) 2013 Zilogic Systems. All rights reserved. -# Author: BabuSubashChandar -# Manikandan -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -75,16 +54,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) -ifneq ($(CROSSDEV),arm-nuttx-eabi-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif -endif - ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/pnev5180b/scripts/flash.ld b/boards/arm/lpc17xx_40xx/pnev5180b/scripts/flash.ld index a979ca48283..20f504c07b7 100644 --- a/boards/arm/lpc17xx_40xx/pnev5180b/scripts/flash.ld +++ b/boards/arm/lpc17xx_40xx/pnev5180b/scripts/flash.ld @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/pnev5180b/scripts/flash.ld * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Michael Jung + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/zkit-arm-1769/scripts/flash.ld + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.c b/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.c index 96616afd56c..65890ab6b15 100644 --- a/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.c +++ b/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.c @@ -1,41 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.c - * This file provides contents of an optional ROMFS volume, mounted at boot. * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Michael Jung + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/nucleo-144/src/stm32_romfs_initialize.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2017 Tomasz Wozniak. All rights reserved. - * Author: Tomasz Wozniak - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.h b/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.h index 1f340c8cd4a..900c43701f5 100644 --- a/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.h +++ b/boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.h @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/pnev5180b/src/lpc17_40_romfs.h * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Michael Jung (mijung@gmx.net) + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/nucleo-144/src/stm32_romfs.h + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2017 Tomasz Wozniak. All rights reserved. - * Author: Tomasz Wozniak - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/u-blox-c027/scripts/Make.defs b/boards/arm/lpc17xx_40xx/u-blox-c027/scripts/Make.defs index 227b9f0f737..b510e0dd825 100644 --- a/boards/arm/lpc17xx_40xx/u-blox-c027/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/u-blox-c027/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_adc.c b/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_adc.c index 23ddd6a277c..13f0c1f934c 100644 --- a/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_adc.c +++ b/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_adc.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_adc.c * - * Derives from boards/stm3220g-eval/src/lpc17_40_adc.c + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * http://www.apache.org/licenses/LICENSE-2.0 * - * which, in turn, was based on boards/stm3220g-eval/src/lpc17_40_adc.c - * - * Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_dac.c b/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_dac.c index 53c06a2ad7a..4aeeac1057b 100644 --- a/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_dac.c +++ b/boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_dac.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/u-blox-c027/src/lpc17_40_dac.c * - * Derives from boards/stm3220g-eval/src/lpc17_40_adc.c + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * http://www.apache.org/licenses/LICENSE-2.0 * - * which, in turn, was based on boards/stm3220g-eval/src/lpc17_40_adc.c - * - * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/include/board.h b/boards/arm/lpc17xx_40xx/zkit-arm-1769/include/board.h index d67f804aedc..c7a5d59cef6 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/include/board.h +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/include/board.h @@ -1,41 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/include/board.h - * include/arch/board/board.h * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lpcxpresso-lpc1768/include/board.h + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/Make.defs b/boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/Make.defs index d61858b7133..68118157162 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/Make.defs +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/Make.defs @@ -1,41 +1,20 @@ ############################################################################ # boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/Make.defs # -# Copyright (C) 2013 Zilogic Systems. All rights reserved. -# Author: BabuSubashChandar -# Manikandan +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Based on boards/lpcxpresso-lpc1768/scripts/Make.defs +# http://www.apache.org/licenses/LICENSE-2.0 # -# Copyright (C) 2011, 2017 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -75,16 +54,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common +NXFLATLDFLAGS1 = -r -d -warn-common NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) $(NXFLATLDSCRIPT) -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) -ifneq ($(CROSSDEV),arm-nuttx-eabi-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif -endif - ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/ld.script b/boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/ld.script index 69b205e0eae..1dedd4a1a15 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/ld.script +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/ld.script @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/scripts/ld.script * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lpcxpresso-lpc1768/thttpd/ld.script + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/Makefile b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/Makefile index 2e217bfe33b..22ae98f15a5 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/Makefile +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/Makefile @@ -1,40 +1,20 @@ ############################################################################ # boards/arm/lpc17xx_40xx/zkit-arm-1769/src/Makefile # -# Copyright (C) 2013 Zilogic Systems. All rights reserved. -# Author: BabuSubashChandar +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Based on boards/lpcxpresso-lpc1768/src/Makefile +# http:#www.apache.org/licenses/LICENSE-2.0 # -# Copyright (C) 201, 2016 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_adc.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_adc.c index cfa12ba243a..17754e28e71 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_adc.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_adc.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_adc.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/stm3220g-eval/src/lpc17_40_adc.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_appinit.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_appinit.c index fd39f655250..7029d04e8ec 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_appinit.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_appinit.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_appinit.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lpcxpresso-lpc1768/src/lpc17_40_appinit.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c index fa24892f4a0..c1d75d875c1 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lpcxpresso-lpc1768/src/lpc17_40_boot.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_buttons.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_buttons.c index 078dad7d3dc..0f0ddd3fb9c 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_buttons.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_buttons.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_buttons.c * - * Copyright (C) 2011 Zilogic Systems. All rights reserved. - * Author: Kannan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/stm3210e-eval/src/board_buttons.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2009, 2011, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_can.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_can.c index 0a45578ff84..e0492bb61f4 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_can.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_can.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_can.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Raashid Muhammed + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/olimex-lpc1766stk/src/lpc17_40_can.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_dac.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_dac.c index 72459c21051..c03f9c808f0 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_dac.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_dac.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_dac.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/stm3220g-eval/src/lpc17_40_dac.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_lcd.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_lcd.c index 5d68641d3ba..d2e7684aaa3 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_lcd.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_lcd.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_lcd.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lm3s6965-ek/src/up_oled.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2012, 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_leds.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_leds.c index 07cdc9a3d0f..276a2b91f84 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_leds.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_leds.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_leds.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lpcxpresso-lpc1768/src/lpc17_40_leds.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_spi.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_spi.c index cfced039b48..71d86ab7675 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_spi.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_spi.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_spi.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lpcxpresso-lpc1768/src/up_ssp.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_ssp.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_ssp.c index 339e7b10a1c..22b6e2a87f4 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_ssp.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_ssp.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_ssp.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lpcxpresso-lpc1768/src/lpc17_40_ssp.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_usbmsc.c b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_usbmsc.c index a4fe6ad9534..a1bd8032402 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_usbmsc.c +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_usbmsc.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_usbmsc.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lpcxpresso-lpc1768/src/lpc17_40_usbmsc.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Configure and register the LPC17xx/LPC40xx MMC/SD SPI block driver. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/zkit-arm-1769.h b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/zkit-arm-1769.h index 060d31fc7e4..5f4ffee9bdc 100644 --- a/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/zkit-arm-1769.h +++ b/boards/arm/lpc17xx_40xx/zkit-arm-1769/src/zkit-arm-1769.h @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc17xx_40xx/zkit-arm-1769/src/zkit-arm-1769.h * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: BabuSubashChandar + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/lpcxpresso-lpc1768/src/lpcxpresso.h + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc214x/mcu123-lpc214x/scripts/Make.defs b/boards/arm/lpc214x/mcu123-lpc214x/scripts/Make.defs index 1388a45e804..801ed242ae9 100644 --- a/boards/arm/lpc214x/mcu123-lpc214x/scripts/Make.defs +++ b/boards/arm/lpc214x/mcu123-lpc214x/scripts/Make.defs @@ -74,15 +74,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common +NXFLATLDFLAGS1 = -r -d -warn-common NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ - -Wl,-no-check-sections + -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_FEATURES),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc214x/zp214xpa/scripts/Make.defs b/boards/arm/lpc214x/zp214xpa/scripts/Make.defs index ce915cc53c7..df98871331f 100644 --- a/boards/arm/lpc214x/zp214xpa/scripts/Make.defs +++ b/boards/arm/lpc214x/zp214xpa/scripts/Make.defs @@ -74,15 +74,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common +NXFLATLDFLAGS1 = -r -d -warn-common NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ - -Wl,-no-check-sections + -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_FEATURES),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc2378/olimex-lpc2378/scripts/Make.defs b/boards/arm/lpc2378/olimex-lpc2378/scripts/Make.defs index 58eb123d3c8..344f5aa0451 100644 --- a/boards/arm/lpc2378/olimex-lpc2378/scripts/Make.defs +++ b/boards/arm/lpc2378/olimex-lpc2378/scripts/Make.defs @@ -94,15 +94,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common +NXFLATLDFLAGS1 = -r -d -warn-common NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ - -Wl,-no-check-sections + -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_FEATURES),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc31xx/ea3131/configs/pgnsh/Make.defs b/boards/arm/lpc31xx/ea3131/configs/pgnsh/Make.defs index 1a02f3f0941..221d9952e28 100644 --- a/boards/arm/lpc31xx/ea3131/configs/pgnsh/Make.defs +++ b/boards/arm/lpc31xx/ea3131/configs/pgnsh/Make.defs @@ -66,13 +66,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc31xx/ea3131/configs/pgnsh/defconfig b/boards/arm/lpc31xx/ea3131/configs/pgnsh/defconfig index 8264bac8a65..dee49858eb0 100644 --- a/boards/arm/lpc31xx/ea3131/configs/pgnsh/defconfig +++ b/boards/arm/lpc31xx/ea3131/configs/pgnsh/defconfig @@ -39,7 +39,7 @@ CONFIG_PAGING_NVPAGED=384 CONFIG_PAGING_PAGESIZE=1024 CONFIG_PAGING_STACKSIZE=2048 CONFIG_PASS1_BUILDIR="boards/arm/lpc31xx/ea3131/locked" -CONFIG_PASS1_OBJECT="-Wl,locked.r" +CONFIG_PASS1_OBJECT="locked.r" CONFIG_PREALLOC_TIMERS=4 CONFIG_RAM_SIZE=196608 CONFIG_RAM_START=0x11028000 diff --git a/boards/arm/lpc31xx/ea3131/locked/Makefile b/boards/arm/lpc31xx/ea3131/locked/Makefile index a7d835b54e6..98acb99a5c1 100644 --- a/boards/arm/lpc31xx/ea3131/locked/Makefile +++ b/boards/arm/lpc31xx/ea3131/locked/Makefile @@ -76,7 +76,7 @@ $(PASS1_LIBBOARD): locked.r: ld-locked.inc $(PASS1_LIBBOARD) @echo "LD: locked.r" - $(Q) $(LD) -o $@ $(PASS1_LDFLAGS) $(PASS1_LIBPATHS) -Wl,--start-group $(PASS1_LDLIBS) -Wl,--end-group $(PASS1_LIBGCC) + $(Q) $(LD) -o $@ $(PASS1_LDFLAGS) $(PASS1_LIBPATHS) --start-group $(PASS1_LDLIBS) --end-group $(PASS1_LIBGCC) $(Q) $(NM) $@ > locked.map $(Q) fgrep " U " locked.map | grep -v nx_start $(Q) $(CROSSDEV)size $@ diff --git a/boards/arm/lpc31xx/ea3131/scripts/Make.defs b/boards/arm/lpc31xx/ea3131/scripts/Make.defs index 352c266e4f8..88b8f127080 100644 --- a/boards/arm/lpc31xx/ea3131/scripts/Make.defs +++ b/boards/arm/lpc31xx/ea3131/scripts/Make.defs @@ -66,13 +66,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CONFIG_ARM_TOOLCHAIN),BUILDROOT) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc31xx/ea3152/scripts/Make.defs b/boards/arm/lpc31xx/ea3152/scripts/Make.defs index a60904abcf2..072a75e2a47 100644 --- a/boards/arm/lpc31xx/ea3152/scripts/Make.defs +++ b/boards/arm/lpc31xx/ea3152/scripts/Make.defs @@ -66,13 +66,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CONFIG_ARM_TOOLCHAIN_BUILDROOT),y) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc31xx/olimex-lpc-h3131/scripts/Make.defs b/boards/arm/lpc31xx/olimex-lpc-h3131/scripts/Make.defs index 7c959396970..1dfc2d36129 100644 --- a/boards/arm/lpc31xx/olimex-lpc-h3131/scripts/Make.defs +++ b/boards/arm/lpc31xx/olimex-lpc-h3131/scripts/Make.defs @@ -66,13 +66,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CONFIG_ARM_TOOLCHAIN),BUILDROOT) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc43xx/bambino-200e/configs/netnsh/Make.defs b/boards/arm/lpc43xx/bambino-200e/configs/netnsh/Make.defs index 9f44b674191..a71194621e3 100644 --- a/boards/arm/lpc43xx/bambino-200e/configs/netnsh/Make.defs +++ b/boards/arm/lpc43xx/bambino-200e/configs/netnsh/Make.defs @@ -1,37 +1,20 @@ ############################################################################ # boards/arm/lpc43xx/bambino-200e/configs/netnsh/Make.defs # -# Copyright (C) 2017 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Alan Carvalho de Assis acassis@gmail.com [nuttx] -# Daniel Pereira Volpato +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -91,15 +74,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 EXEEXT = .elf -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc43xx/bambino-200e/kernel/Makefile b/boards/arm/lpc43xx/bambino-200e/kernel/Makefile index 379cbfd219b..c151e6bf144 100644 --- a/boards/arm/lpc43xx/bambino-200e/kernel/Makefile +++ b/boards/arm/lpc43xx/bambino-200e/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/lpc43xx/bambino-200e/kernel/lpc43_userspace.c b/boards/arm/lpc43xx/bambino-200e/kernel/lpc43_userspace.c index 966daab9480..c724e690cd0 100644 --- a/boards/arm/lpc43xx/bambino-200e/kernel/lpc43_userspace.c +++ b/boards/arm/lpc43xx/bambino-200e/kernel/lpc43_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/lpc43xx/bambino-200e/scripts/Make.defs b/boards/arm/lpc43xx/bambino-200e/scripts/Make.defs index 1c490862574..732ffbda57c 100644 --- a/boards/arm/lpc43xx/bambino-200e/scripts/Make.defs +++ b/boards/arm/lpc43xx/bambino-200e/scripts/Make.defs @@ -67,15 +67,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 EXEEXT = .elf -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc43xx/bambino-200e/src/lpc43_timer.c b/boards/arm/lpc43xx/bambino-200e/src/lpc43_timer.c index aad3ac07972..df3cbc51549 100644 --- a/boards/arm/lpc43xx/bambino-200e/src/lpc43_timer.c +++ b/boards/arm/lpc43xx/bambino-200e/src/lpc43_timer.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/lpc43xx/bambino-200e/src/lpc43_timer.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc43xx/lpc4330-xplorer/scripts/Make.defs b/boards/arm/lpc43xx/lpc4330-xplorer/scripts/Make.defs index 6cb6d126bd4..25d507498db 100644 --- a/boards/arm/lpc43xx/lpc4330-xplorer/scripts/Make.defs +++ b/boards/arm/lpc43xx/lpc4330-xplorer/scripts/Make.defs @@ -67,13 +67,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc43xx/lpc4337-ws/scripts/Make.defs b/boards/arm/lpc43xx/lpc4337-ws/scripts/Make.defs index 7d9fa028f4e..70872871762 100644 --- a/boards/arm/lpc43xx/lpc4337-ws/scripts/Make.defs +++ b/boards/arm/lpc43xx/lpc4337-ws/scripts/Make.defs @@ -67,13 +67,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc43xx/lpc4337-ws/src/lpc43_adc.c b/boards/arm/lpc43xx/lpc4337-ws/src/lpc43_adc.c index 5573216d370..8240e5dc909 100644 --- a/boards/arm/lpc43xx/lpc4337-ws/src/lpc43_adc.c +++ b/boards/arm/lpc43xx/lpc4337-ws/src/lpc43_adc.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc43xx/lpc4337-ws/src/lpc43_adc.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/stm3220g-eval/src/lpc43_adc.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc43xx/lpc4357-evb/scripts/Make.defs b/boards/arm/lpc43xx/lpc4357-evb/scripts/Make.defs index 27c9de70ee0..d6ad75c6afc 100644 --- a/boards/arm/lpc43xx/lpc4357-evb/scripts/Make.defs +++ b/boards/arm/lpc43xx/lpc4357-evb/scripts/Make.defs @@ -67,13 +67,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc43xx/lpc4370-link2/scripts/Make.defs b/boards/arm/lpc43xx/lpc4370-link2/scripts/Make.defs index 5531c7322ab..57767078743 100644 --- a/boards/arm/lpc43xx/lpc4370-link2/scripts/Make.defs +++ b/boards/arm/lpc43xx/lpc4370-link2/scripts/Make.defs @@ -67,13 +67,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/lpc43xx/lpc4370-link2/src/lpc43_adc.c b/boards/arm/lpc43xx/lpc4370-link2/src/lpc43_adc.c index 78c9dd7e4f7..81d301ea9d2 100644 --- a/boards/arm/lpc43xx/lpc4370-link2/src/lpc43_adc.c +++ b/boards/arm/lpc43xx/lpc4370-link2/src/lpc43_adc.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/lpc43xx/lpc4370-link2/src/lpc43_adc.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Kannan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on boards/stm3220g-eval/src/lpc43_adc.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/lpc54xx/lpcxpresso-lpc54628/scripts/Make.defs b/boards/arm/lpc54xx/lpcxpresso-lpc54628/scripts/Make.defs index ed07e26d5fb..c6372453887 100644 --- a/boards/arm/lpc54xx/lpcxpresso-lpc54628/scripts/Make.defs +++ b/boards/arm/lpc54xx/lpcxpresso-lpc54628/scripts/Make.defs @@ -53,13 +53,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/max326xx/max32660-evsys/scripts/Make.defs b/boards/arm/max326xx/max32660-evsys/scripts/Make.defs index eda5bede1b2..ac3e42cc210 100644 --- a/boards/arm/max326xx/max32660-evsys/scripts/Make.defs +++ b/boards/arm/max326xx/max32660-evsys/scripts/Make.defs @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,9 +70,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/moxart/moxa/scripts/Make.defs b/boards/arm/moxart/moxa/scripts/Make.defs index d76526e4f0d..2928dbc6058 100644 --- a/boards/arm/moxart/moxa/scripts/Make.defs +++ b/boards/arm/moxart/moxa/scripts/Make.defs @@ -52,13 +52,10 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ MKNXFLAT = mknxflat LDNXFLAT = ldnxflat -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/moxart/moxa/src/moxart_appinit.c b/boards/arm/moxart/moxa/src/moxart_appinit.c index 5e32460f60c..f7e1bd81007 100644 --- a/boards/arm/moxart/moxa/src/moxart_appinit.c +++ b/boards/arm/moxart/moxa/src/moxart_appinit.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/moxart/moxa/src/moxart_appinit.c * - * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. - * Author: Anton D. Kachalov + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/moxart/moxa/src/moxart_boot.c b/boards/arm/moxart/moxa/src/moxart_boot.c index 5fce87e1d00..c79b8263678 100644 --- a/boards/arm/moxart/moxa/src/moxart_boot.c +++ b/boards/arm/moxart/moxa/src/moxart_boot.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/moxart/moxa/src/moxart_boot.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Anton D. Kachalov + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/nrf52/nrf52-feather/scripts/Make.defs b/boards/arm/nrf52/nrf52-feather/scripts/Make.defs index d33d95f918e..44214057f72 100644 --- a/boards/arm/nrf52/nrf52-feather/scripts/Make.defs +++ b/boards/arm/nrf52/nrf52-feather/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/nrf52/nrf52832-dk/scripts/Make.defs b/boards/arm/nrf52/nrf52832-dk/scripts/Make.defs index 0572eec751c..ba311d1906f 100644 --- a/boards/arm/nrf52/nrf52832-dk/scripts/Make.defs +++ b/boards/arm/nrf52/nrf52832-dk/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/nrf52/nrf52832-mdk/configs/sdc/defconfig b/boards/arm/nrf52/nrf52832-mdk/configs/sdc/defconfig deleted file mode 100644 index 7f97f26a000..00000000000 --- a/boards/arm/nrf52/nrf52832-mdk/configs/sdc/defconfig +++ /dev/null @@ -1,79 +0,0 @@ -# -# This file is autogenerated: PLEASE DO NOT EDIT IT. -# -# You can use "make menuconfig" to make any modifications to the installed .config file. -# You can then do "make savedefconfig" to generate a new defconfig file that includes your -# modifications. -# -# CONFIG_NET_ETHERNET is not set -# CONFIG_NET_IPv4 is not set -# CONFIG_NRF52_SDC_DLE is not set -# CONFIG_NRF52_SDC_LE_2M_PHY is not set -# CONFIG_NRF52_SDC_LE_CODED_PHY is not set -# CONFIG_WIRELESS_BLUETOOTH_HOST is not set -CONFIG_ARCH="arm" -CONFIG_ARCH_BOARD="nrf52832-mdk" -CONFIG_ARCH_BOARD_NRF52832_MDK=y -CONFIG_ARCH_CHIP="nrf52" -CONFIG_ARCH_CHIP_NRF52832=y -CONFIG_ARCH_CHIP_NRF52=y -CONFIG_ARCH_HIPRI_INTERRUPT=y -CONFIG_ARCH_RAMVECTORS=y -CONFIG_ARCH_STACKDUMP=y -CONFIG_ARCH_STDARG_H=y -CONFIG_ARMV7M_SYSTICK=y -CONFIG_BLUETOOTH_TXCMD_NMSGS=8 -CONFIG_BLUETOOTH_TXCMD_STACKSIZE=1024 -CONFIG_BLUETOOTH_TXCONN_NMSGS=8 -CONFIG_BLUETOOTH_TXCONN_STACKSIZE=1024 -CONFIG_BOARD_LOOPSPERMSEC=5500 -CONFIG_BUILTIN=y -CONFIG_CLOCK_MONOTONIC=y -CONFIG_FAT_LCNAMES=y -CONFIG_FAT_LFN=y -CONFIG_FS_FAT=y -CONFIG_FS_PROCFS=y -CONFIG_IDLETHREAD_STACKSIZE=2048 -CONFIG_MM_REGIONS=2 -CONFIG_NET=y -CONFIG_NETDEV_LATEINIT=y -CONFIG_NET_BLUETOOTH=y -CONFIG_NET_BLUETOOTH_BACKLOG=0 -CONFIG_NIMBLE=y -CONFIG_NIMBLE_REF="5fbb6660a433217b8eaf1b95de410379f868616c" -CONFIG_NRF52_DCDC=y -CONFIG_NRF52_HFCLK_XTAL=y -CONFIG_NRF52_RTC1=y -CONFIG_NRF52_SOFTDEVICE_CONTROLLER=y -CONFIG_NRF52_SYSTIMER_RTC=y -CONFIG_NRF52_UART0=y -CONFIG_NSH_ARCHINIT=y -CONFIG_NSH_BUILTIN_APPS=y -CONFIG_NSH_FILEIOSIZE=512 -CONFIG_NSH_LINELEN=64 -CONFIG_NSH_READLINE=y -CONFIG_PREALLOC_MQ_MSGS=16 -CONFIG_PREALLOC_TIMERS=4 -CONFIG_PTHREAD_MUTEX_TYPES=y -CONFIG_RAM_SIZE=65535 -CONFIG_RAM_START=0x20000000 -CONFIG_RAW_BINARY=y -CONFIG_RR_INTERVAL=200 -CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP=y -CONFIG_SCHED_WAITPID=y -CONFIG_SDCLONE_DISABLE=y -CONFIG_SIG_DEFAULT=y -CONFIG_SIG_EVTHREAD=y -CONFIG_SIG_SIGALRM_ACTION=y -CONFIG_SIG_SIGUSR1_ACTION=y -CONFIG_SIG_SIGUSR2_ACTION=y -CONFIG_START_DAY=26 -CONFIG_START_MONTH=3 -CONFIG_SYMTAB_ORDEREDBYNAME=y -CONFIG_SYSTEM_NSH=y -CONFIG_TIMER=y -CONFIG_UART0_SERIAL_CONSOLE=y -CONFIG_USEC_PER_TICK=10000 -CONFIG_USER_ENTRYPOINT="nsh_main" -CONFIG_WIRELESS=y -CONFIG_WIRELESS_BLUETOOTH=y diff --git a/boards/arm/nrf52/nrf52832-mdk/scripts/Make.defs b/boards/arm/nrf52/nrf52832-mdk/scripts/Make.defs index 58f3ceb7884..c60c69625ec 100644 --- a/boards/arm/nrf52/nrf52832-mdk/scripts/Make.defs +++ b/boards/arm/nrf52/nrf52832-mdk/scripts/Make.defs @@ -30,6 +30,16 @@ else ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) endif +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +STRIP = $(CROSSDEV)strip --strip-unneeded +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} @@ -54,13 +64,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/nrf52/nrf52832-sparkfun/scripts/Make.defs b/boards/arm/nrf52/nrf52832-sparkfun/scripts/Make.defs index 8271696e07b..8422215d59c 100644 --- a/boards/arm/nrf52/nrf52832-sparkfun/scripts/Make.defs +++ b/boards/arm/nrf52/nrf52832-sparkfun/scripts/Make.defs @@ -30,6 +30,16 @@ else ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) endif +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +STRIP = $(CROSSDEV)strip --strip-unneeded +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} @@ -54,13 +64,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/nrf52/nrf52840-dk/scripts/Make.defs b/boards/arm/nrf52/nrf52840-dk/scripts/Make.defs index 3760058bc6b..f438fdec501 100644 --- a/boards/arm/nrf52/nrf52840-dk/scripts/Make.defs +++ b/boards/arm/nrf52/nrf52840-dk/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/nrf52/nrf52840-dongle/scripts/Make.defs b/boards/arm/nrf52/nrf52840-dongle/scripts/Make.defs index f94f8d1682d..bd5ac2f84a1 100644 --- a/boards/arm/nrf52/nrf52840-dongle/scripts/Make.defs +++ b/boards/arm/nrf52/nrf52840-dongle/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/nuc1xx/nutiny-nuc120/scripts/Make.defs b/boards/arm/nuc1xx/nutiny-nuc120/scripts/Make.defs index c063d911496..7c98bed2928 100644 --- a/boards/arm/nuc1xx/nutiny-nuc120/scripts/Make.defs +++ b/boards/arm/nuc1xx/nutiny-nuc120/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/rp2040/common/include/rp2040_ina219.h b/boards/arm/rp2040/common/include/rp2040_ina219.h index 9e087533d9d..23fa26208b9 100644 --- a/boards/arm/rp2040/common/include/rp2040_ina219.h +++ b/boards/arm/rp2040/common/include/rp2040_ina219.h @@ -75,4 +75,4 @@ int board_ina219_initialize(int busno); } #endif -#endif // __BOARDS_ARM_RP2040_COMMON_INCLUDE_RP2040_INA219_H +#endif /* __BOARDS_ARM_RP2040_COMMON_INCLUDE_RP2040_INA219_H */ diff --git a/boards/arm/rp2040/common/src/Make.defs b/boards/arm/rp2040/common/src/Make.defs index 1b68a12ee41..752224b42c6 100644 --- a/boards/arm/rp2040/common/src/Make.defs +++ b/boards/arm/rp2040/common/src/Make.defs @@ -38,6 +38,10 @@ ifeq ($(CONFIG_LCD_ST7789),y) CSRCS += rp2040_st7789.c endif +ifeq ($(CONFIG_LCD_ST7735),y) +CSRCS += rp2040_st7735.c +endif + ifeq ($(CONFIG_USBMSC),y) CSRCS += rp2040_usbmsc.c endif diff --git a/boards/arm/rp2040/common/src/rp2040_lcd_backpack.c b/boards/arm/rp2040/common/src/rp2040_lcd_backpack.c index 7b1b8360c62..558c82a632a 100644 --- a/boards/arm/rp2040/common/src/rp2040_lcd_backpack.c +++ b/boards/arm/rp2040/common/src/rp2040_lcd_backpack.c @@ -84,7 +84,7 @@ int board_lcd_backpack_init(int devno, int busno, int rows, int cols) return -ENODEV; } - /* Regiter the Segment LCD */ + /* Register the Segment LCD */ snprintf(devpath, 12, "/dev/slcd%d", devno); ret = pcf8574_lcd_backpack_register(devpath, i2c, &cfg); diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/rddrone-uavcan144.h b/boards/arm/rp2040/common/src/rp2040_st7735.c similarity index 50% rename from boards/arm/s32k1xx/rddrone-uavcan144/src/rddrone-uavcan144.h rename to boards/arm/rp2040/common/src/rp2040_st7735.c index 89a2d757917..1f1f42fedb4 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/rddrone-uavcan144.h +++ b/boards/arm/rp2040/common/src/rp2040_st7735.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/rddrone-uavcan144.h + * boards/arm/rp2040/common/src/rp2040_st7735.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,107 +18,132 @@ * ****************************************************************************/ -#ifndef __BOARDS_ARM_S32K1XX_RDDRONE_UAVCAN144_SRC_RDDRONE_UAVCAN144_H -#define __BOARDS_ARM_S32K1XX_RDDRONE_UAVCAN144_SRC_RDDRONE_UAVCAN144_H - /**************************************************************************** * Included Files ****************************************************************************/ #include -#include -#include +#include +#include +#include +#include -#include "hardware/s32k1xx_pinmux.h" -#include "s32k1xx_periphclocks.h" +#include +#include +#include +#include +#include + +#include "rp2040_spi.h" +#include "rp2040_gpio.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -/* Configuration ************************************************************/ +#define LCD_SPI_PORTNO 1 -/* RDDRONE-UAVCAN144 GPIOs **************************************************/ - -/* LEDs. The RDDRONE-UAVCAN144 has one RGB LED: - * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) - * - * An output of '1' illuminates the LED. - */ - -#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_B (PIN_PTD0 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) - -/* Buttons. The RDDRONE-UAVCAN144 supports two buttons: - * - * SW2 PTC12 - * SW3 PTC13 - */ - -#define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH) -#define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH) - -/* SPI chip selects */ - -/* A71CH Reset */ - -#define GPIO_A71CH_RST (PIN_PTA6 | GPIO_LOWDRIVE) - -/* Count of peripheral clock user configurations */ - -#define NUM_OF_PERIPHERAL_CLOCKS_0 11 - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -#ifndef __ASSEMBLY__ - -/* User peripheral configuration structure 0 */ - -extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[]; - -/**************************************************************************** - * Public Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Name: s32k1xx_bringup - * - * Description: - * Perform architecture-specific initialization - * - * CONFIG_BOARD_LATE_INITIALIZE=y : - * Called from board_late_initialize(). - * - * CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y : - * Called from the NSH library - * - ****************************************************************************/ - -int s32k1xx_bringup(void); - -/**************************************************************************** - * Name: s32k1xx_spidev_initialize - * - * Description: - * Called to configure SPI chip select GPIO pins for the RDDRONE-UAVCAN144 - * board. - * - ****************************************************************************/ - -#ifdef CONFIG_S32K1XX_LPSPI -void s32k1xx_spidev_initialize(void); +#if LCD_SPI_PORTNO +#define LCD_DC CONFIG_RP2040_SPI1_GPIO +#define LCD_RST 10 +#define LCD_BL 11 +#else +#define LCD_DC CONFIG_RP2040_SPI0_GPIO #endif -#endif /* __ASSEMBLY__ */ -#endif /* __BOARDS_ARM_S32K1XX_RDDRONE_UAVCAN144_SRC_RDDRONE_UAVCAN144_H */ +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct spi_dev_s *g_spidev; +static struct lcd_dev_s *g_lcd = NULL; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is + * fully initialized, display memory cleared, and the LCD ready to use, but + * with the power setting at 0 (full off). + * + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + g_spidev = rp2040_spibus_initialize(LCD_SPI_PORTNO); + if (!g_spidev) + { + lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO); + return -ENODEV; + } + + /* SPI RX is not used. Same pin is used as LCD Data/Command control */ + + rp2040_gpio_init(LCD_DC); + rp2040_gpio_setdir(LCD_DC, true); + rp2040_gpio_put(LCD_DC, true); + +#if LCD_SPI_PORTNO + + /* Pull LCD_RESET high */ + + rp2040_gpio_init(LCD_RST); + rp2040_gpio_setdir(LCD_RST, true); + rp2040_gpio_put(LCD_RST, true); + + /* Set full brightness */ + + rp2040_gpio_init(LCD_BL); + rp2040_gpio_setdir(LCD_BL, true); + rp2040_gpio_put(LCD_BL, true); + +#endif + + return OK; +} + +/**************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This + * allows support for multiple LCD devices. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int devno) +{ + g_lcd = st7735_lcdinitialize(g_spidev); + if (!g_lcd) + { + lcderr("ERROR: Failed to bind SPI port %d to LCD %d\n", LCD_SPI_PORTNO, + devno); + } + else + { + lcdinfo("SPI port %d bound to LCD %d\n", LCD_SPI_PORTNO, devno); + return g_lcd; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_lcd->setpower(g_lcd, 0); +} diff --git a/boards/arm/rp2040/raspberrypi-pico/README.txt b/boards/arm/rp2040/raspberrypi-pico/README.txt index c043cd320a4..0eb73997195 100644 --- a/boards/arm/rp2040/raspberrypi-pico/README.txt +++ b/boards/arm/rp2040/raspberrypi-pico/README.txt @@ -106,6 +106,19 @@ Defconfigs DAT1 (NC) * Card hot swapping is not supported. +- st7735 + st7735 SPI LCD support + Connection: + st7735 Raspberry Pi Pico + GND ----- GND (Pin 3 or 38 or ...) + VCC ----- 5V Vbus (Pin 40) + SDA ----- GP15 (SPI1 TX) (Pin 20) + SCK ----- GP14 (SPI1 SCK) (Pin 19) + CS ----- GP13 (SPI1 CSn) (Pin 17) + AO(D/C) ----- GP12 (SPI1 RX) (Pin 16) + BL ----- GP11 (Pin 15) + RESET ----- GP10 (Pin 14) + - enc28j60 ENC28J60 SPI ethernet controller support - IP address is configured by DHCP. diff --git a/boards/arm/rp2040/raspberrypi-pico/configs/st7735/defconfig b/boards/arm/rp2040/raspberrypi-pico/configs/st7735/defconfig new file mode 100644 index 00000000000..9b70409ebfc --- /dev/null +++ b/boards/arm/rp2040/raspberrypi-pico/configs/st7735/defconfig @@ -0,0 +1,62 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_FS_PROCFS_EXCLUDE_ENVIRON is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_NSH_DISABLE_PRINTF is not set +# CONFIG_NSH_DISABLE_TRUNCATE is not set +# CONFIG_STANDARD_SERIAL is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="raspberrypi-pico" +CONFIG_ARCH_BOARD_RASPBERRYPI_PICO=y +CONFIG_ARCH_CHIP="rp2040" +CONFIG_ARCH_CHIP_RP2040=y +CONFIG_ARCH_RAMVECTORS=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=10450 +CONFIG_BUILTIN=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DRIVERS_VIDEO=y +CONFIG_EXAMPLES_FB=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FS_PROCFS=y +CONFIG_FS_PROCFS_REGISTER=y +CONFIG_LCD=y +CONFIG_LCD_FRAMEBUFFER=y +CONFIG_LCD_PORTRAIT=y +CONFIG_LCD_ST7735=y +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_READLINE=y +CONFIG_RAM_SIZE=270336 +CONFIG_RAM_START=0x20000000 +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_RP2040_SPI1=y +CONFIG_RP2040_SPI1_GPIO=12 +CONFIG_RP2040_SPI=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SPI_CMDDATA=y +CONFIG_START_DAY=9 +CONFIG_START_MONTH=2 +CONFIG_START_YEAR=2021 +CONFIG_SYSLOG_CONSOLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_VIDEO_FB=y diff --git a/boards/arm/rp2040/raspberrypi-pico/scripts/Make.defs b/boards/arm/rp2040/raspberrypi-pico/scripts/Make.defs index d04fbd408e6..1bf5c6369da 100644 --- a/boards/arm/rp2040/raspberrypi-pico/scripts/Make.defs +++ b/boards/arm/rp2040/raspberrypi-pico/scripts/Make.defs @@ -30,9 +30,9 @@ else endif ifeq ($(CONFIG_CYGWIN_WINTOOL),y) - ARCHSCRIPT = -Wl,-T"${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" + ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" else - ARCHSCRIPT = -Wl,-T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) + ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) @@ -56,13 +56,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/rp2040/raspberrypi-pico/src/rp2040_bringup.c b/boards/arm/rp2040/raspberrypi-pico/src/rp2040_bringup.c index 96ee4804618..750a93b1e57 100644 --- a/boards/arm/rp2040/raspberrypi-pico/src/rp2040_bringup.c +++ b/boards/arm/rp2040/raspberrypi-pico/src/rp2040_bringup.c @@ -34,11 +34,29 @@ #include "rp2040_pico.h" #ifdef CONFIG_LCD_BACKPACK -# include "rp2040_lcd_backpack.h" +#include "rp2040_lcd_backpack.h" +#endif + +#ifdef CONFIG_LCD +#include +#endif + +#ifdef CONFIG_LCD_DEV +#include #endif #ifdef CONFIG_VIDEO_FB -# include +#include +#endif + +#ifdef CONFIG_SENSORS_INA219 +#include +#include "rp2040_ina219.h" +#endif + +#ifdef CONFIG_SENSORS_BMP180 +#include +#include "rp2040_bmp180.h" #endif /**************************************************************************** @@ -136,6 +154,20 @@ int rp2040_bringup(void) { _err("ERROR: Failed to initialize Frame Buffer Driver.\n"); } +#elif defined(CONFIG_LCD) + ret = board_lcd_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize LCD.\n"); + } +#endif + +#ifdef CONFIG_LCD_DEV + ret = lcddev_register(0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: lcddev_register() failed: %d\n", ret); + } #endif #ifdef CONFIG_LCD_BACKPACK diff --git a/boards/arm/rp2040/raspberrypi-pico/src/rp2040_spi.c b/boards/arm/rp2040/raspberrypi-pico/src/rp2040_spi.c index a0c688366e2..2d21633aa81 100644 --- a/boards/arm/rp2040/raspberrypi-pico/src/rp2040_spi.c +++ b/boards/arm/rp2040/raspberrypi-pico/src/rp2040_spi.c @@ -131,7 +131,7 @@ uint8_t rp2040_spi1status(FAR struct spi_dev_s *dev, uint32_t devid) #ifdef CONFIG_SPI_CMDDATA int rp2040_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) { -#ifdef CONFIG_LCD_ST7789 +#if defined (CONFIG_LCD_ST7789) || (CONFIG_LCD_ST7735) if (devid == SPIDEV_DISPLAY(0)) { /* This is the Data/Command control pad which determines whether the diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/README.txt b/boards/arm/s32k1xx/rddrone-uavcan144/README.txt deleted file mode 100644 index be520051b88..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/README.txt +++ /dev/null @@ -1,15 +0,0 @@ -README -====== - -This directory holds the port to the NXP RDDRONE-UAVCAN board with S32K144 MCU. - -Contents -======== - - o Status - -Status -====== - - 2020-01-23: Configuration created (copy-paste from S32K146EVB). - Tested: Serial console, I2C, SPI diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/configs/nsh/defconfig b/boards/arm/s32k1xx/rddrone-uavcan144/configs/nsh/defconfig deleted file mode 100644 index d42c12f3d83..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/configs/nsh/defconfig +++ /dev/null @@ -1,63 +0,0 @@ -# -# This file is autogenerated: PLEASE DO NOT EDIT IT. -# -# You can use "make menuconfig" to make any modifications to the installed .config file. -# You can then do "make savedefconfig" to generate a new defconfig file that includes your -# modifications. -# -# CONFIG_ARCH_FPU is not set -# CONFIG_NSH_ARGCAT is not set -# CONFIG_NSH_CMDOPT_HEXDUMP is not set -# CONFIG_NSH_CMDPARMS is not set -CONFIG_ARCH="arm" -CONFIG_ARCH_BOARD="rddrone-uavcan144" -CONFIG_ARCH_BOARD_RDDRONE_UAVCAN144=y -CONFIG_ARCH_CHIP="s32k1xx" -CONFIG_ARCH_CHIP_S32K144=y -CONFIG_ARCH_CHIP_S32K14X=y -CONFIG_ARCH_CHIP_S32K1XX=y -CONFIG_ARCH_STACKDUMP=y -CONFIG_BOARD_LOOPSPERMSEC=3997 -CONFIG_BUILTIN=y -CONFIG_EXAMPLES_HELLO=y -CONFIG_FS_PROCFS=y -CONFIG_HAVE_CXX=y -CONFIG_HAVE_CXXINITIALIZE=y -CONFIG_I2C=y -CONFIG_I2CTOOL_DEFFREQ=100000 -CONFIG_I2CTOOL_MAXADDR=0x7f -CONFIG_I2CTOOL_MAXBUS=0 -CONFIG_I2CTOOL_MINADDR=0x00 -CONFIG_INTELHEX_BINARY=y -CONFIG_LPUART0_RXBUFSIZE=64 -CONFIG_LPUART0_TXBUFSIZE=64 -CONFIG_LPUART1_RXBUFSIZE=64 -CONFIG_LPUART1_SERIAL_CONSOLE=y -CONFIG_LPUART1_TXBUFSIZE=64 -CONFIG_MOTOROLA_SREC=y -CONFIG_NSH_ARCHINIT=y -CONFIG_NSH_BUILTIN_APPS=y -CONFIG_NSH_FILEIOSIZE=512 -CONFIG_NSH_READLINE=y -CONFIG_PREALLOC_TIMERS=4 -CONFIG_RAM_SIZE=61440 -CONFIG_RAM_START=0x1fff8000 -CONFIG_RAW_BINARY=y -CONFIG_RR_INTERVAL=200 -CONFIG_S32K1XX_LPI2C0=y -CONFIG_S32K1XX_LPSPI0=y -CONFIG_S32K1XX_LPUART0=y -CONFIG_S32K1XX_LPUART1=y -CONFIG_SCHED_WAITPID=y -CONFIG_SDCLONE_DISABLE=y -CONFIG_SPITOOL_DEFFREQ=400000 -CONFIG_SPITOOL_MAXBUS=0 -CONFIG_START_DAY=18 -CONFIG_START_MONTH=8 -CONFIG_START_YEAR=2019 -CONFIG_STDIO_DISABLE_BUFFERING=y -CONFIG_SYMTAB_ORDEREDBYNAME=y -CONFIG_SYSTEM_I2CTOOL=y -CONFIG_SYSTEM_NSH=y -CONFIG_SYSTEM_SPITOOL=y -CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/configs/nshdebug/defconfig b/boards/arm/s32k1xx/rddrone-uavcan144/configs/nshdebug/defconfig deleted file mode 100644 index 1b573c90adb..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/configs/nshdebug/defconfig +++ /dev/null @@ -1,65 +0,0 @@ -# -# This file is autogenerated: PLEASE DO NOT EDIT IT. -# -# You can use "make menuconfig" to make any modifications to the installed .config file. -# You can then do "make savedefconfig" to generate a new defconfig file that includes your -# modifications. -# -# CONFIG_ARCH_FPU is not set -# CONFIG_NSH_ARGCAT is not set -# CONFIG_NSH_CMDOPT_HEXDUMP is not set -# CONFIG_NSH_CMDPARMS is not set -CONFIG_ARCH="arm" -CONFIG_ARCH_BOARD="rddrone-uavcan144" -CONFIG_ARCH_BOARD_RDDRONE_UAVCAN144=y -CONFIG_ARCH_CHIP="s32k1xx" -CONFIG_ARCH_CHIP_S32K144=y -CONFIG_ARCH_CHIP_S32K14X=y -CONFIG_ARCH_CHIP_S32K1XX=y -CONFIG_ARCH_STACKDUMP=y -CONFIG_BOARD_LOOPSPERMSEC=3997 -CONFIG_BUILTIN=y -CONFIG_DEBUG_FEATURES=y -CONFIG_DEBUG_SYMBOLS=y -CONFIG_EXAMPLES_HELLO=y -CONFIG_FS_PROCFS=y -CONFIG_HAVE_CXX=y -CONFIG_HAVE_CXXINITIALIZE=y -CONFIG_I2C=y -CONFIG_I2CTOOL_DEFFREQ=100000 -CONFIG_I2CTOOL_MAXADDR=0x7f -CONFIG_I2CTOOL_MAXBUS=0 -CONFIG_I2CTOOL_MINADDR=0x00 -CONFIG_INTELHEX_BINARY=y -CONFIG_LPUART0_RXBUFSIZE=64 -CONFIG_LPUART0_TXBUFSIZE=64 -CONFIG_LPUART1_RXBUFSIZE=64 -CONFIG_LPUART1_SERIAL_CONSOLE=y -CONFIG_LPUART1_TXBUFSIZE=64 -CONFIG_MOTOROLA_SREC=y -CONFIG_NSH_ARCHINIT=y -CONFIG_NSH_BUILTIN_APPS=y -CONFIG_NSH_FILEIOSIZE=512 -CONFIG_NSH_READLINE=y -CONFIG_PREALLOC_TIMERS=4 -CONFIG_RAM_SIZE=61440 -CONFIG_RAM_START=0x1fff8000 -CONFIG_RAW_BINARY=y -CONFIG_RR_INTERVAL=200 -CONFIG_S32K1XX_LPI2C0=y -CONFIG_S32K1XX_LPSPI0=y -CONFIG_S32K1XX_LPUART0=y -CONFIG_S32K1XX_LPUART1=y -CONFIG_SCHED_WAITPID=y -CONFIG_SDCLONE_DISABLE=y -CONFIG_SPITOOL_DEFFREQ=400000 -CONFIG_SPITOOL_MAXBUS=0 -CONFIG_START_DAY=18 -CONFIG_START_MONTH=8 -CONFIG_START_YEAR=2019 -CONFIG_STDIO_DISABLE_BUFFERING=y -CONFIG_SYMTAB_ORDEREDBYNAME=y -CONFIG_SYSTEM_I2CTOOL=y -CONFIG_SYSTEM_NSH=y -CONFIG_SYSTEM_SPITOOL=y -CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/include/board.h b/boards/arm/s32k1xx/rddrone-uavcan144/include/board.h deleted file mode 100644 index 655ba39654d..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/include/board.h +++ /dev/null @@ -1,138 +0,0 @@ -/**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/include/board.h - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -#ifndef __BOARDS_ARM_RDDRONE_UAVCAN144_INCLUDE_BOARD_H -#define __BOARDS_ARM_RDDRONE_UAVCAN144_INCLUDE_BOARD_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#ifndef __ASSEMBLY__ -# include -# include -#endif - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Clocking *****************************************************************/ - -/* The RDDRONE-UAVCAN144 is fitted with a 8MHz Crystal */ - -#define BOARD_XTAL_FREQUENCY 8000000 - -/* The S32K144 will run at 112MHz */ - -/* LED definitions **********************************************************/ - -/* The RDDRONE-UAVCAN144 has one RGB LED: - * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) - * - * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in - * any way. The following definitions are used to access individual RGB - * components. - * - * The RGB components could, alternatively be controlled through PWM using - * the common RGB LED driver. - */ - -/* LED index values for use with board_userled() */ - -#define BOARD_LED_R 0 -#define BOARD_LED_G 1 -#define BOARD_LED_B 2 -#define BOARD_NLEDS 3 - -/* LED bits for use with board_userled_all() */ - -#define BOARD_LED_R_BIT (1 << BOARD_LED_R) -#define BOARD_LED_G_BIT (1 << BOARD_LED_G) -#define BOARD_LED_B_BIT (1 << BOARD_LED_B) - -/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board - * the RDDRONE-UAVCAN144. The following definitions describe how NuttX - * controls the LEDs: - * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ---------------------------- ----------------- - */ - -#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ -#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ -#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ -#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ -#define LED_INIRQ 0 /* In an interrupt (no change) */ -#define LED_SIGNAL 0 /* In a signal handler (no change) */ -#define LED_ASSERTION 0 /* An assertion failed (no change) */ -#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ -#undef LED_IDLE /* RDDRONE-UAVCAN144 in sleep mode (Not used) */ - -/* Button definitions *******************************************************/ - -/* The RDDRONE-UAVCAN144 supports two buttons: - * - * SW2 PTC12 - * SW3 PTC13 - */ - -#define BUTTON_SW2 0 -#define BUTTON_SW3 1 -#define NUM_BUTTONS 2 - -#define BUTTON_SW2_BIT (1 << BUTTON_SW2) -#define BUTTON_SW3_BIT (1 << BUTTON_SW3) - -/* Alternate function pin selections ****************************************/ - -/* By default, the serial console will be provided on the OpenSDA VCOM port: - * - * OpenSDA UART TX PTC7 (LPUART1_TX) - * OpenSDA UART RX PTC6 (LPUART1_RX) - */ - -#define PIN_LPUART0_CTS PIN_LPUART0_CTS_2 /* PTC8 */ -#define PIN_LPUART0_RTS PIN_LPUART0_RTS_2 /* PTC9 */ -#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */ -#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */ - -#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ -#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ - -/* SPI selections ***********************************************************/ - -#define PIN_LPSPI0_SCK PIN_LPSPI0_SCK_2 /* PTB2 */ -#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */ -#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_3 /* PTB4 */ -#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_2 /* PTB5 */ - -/* I2C selections ***********************************************************/ - -#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */ -#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */ - -#endif /* __BOARDS_ARM_RDDRONE_UAVCAN144_INCLUDE_BOARD_H */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/scripts/flash.ld b/boards/arm/s32k1xx/rddrone-uavcan144/scripts/flash.ld deleted file mode 100644 index 2c7ff297d2d..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/scripts/flash.ld +++ /dev/null @@ -1,137 +0,0 @@ -/**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/scripts/flash.ld - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/* The S32K144 has 512Kb of FLASH beginning at address 0x0000:0000 and - * 60Kb of SRAM beginning at address 0x1fff:8000 (plus 4Kb of FlexRAM) - * - * The on-chip RAM is split in two regions: SRAM_L and SRAM_U. The RAM is - * implemented such that the SRAM_L and SRAM_U ranges form a contiguous - * block in the memory map - * - * SRAM_L 1fff8000 - 1fffffff 32Kb - * SRAM_U 20000000 - 20006fff 28Kb - */ - -MEMORY -{ - vflash (rx) : ORIGIN = 0x00000000, LENGTH = 1K - pflash (rx) : ORIGIN = 0x00000400, LENGTH = 16 - dflash (rx) : ORIGIN = 0x00000410, LENGTH = 511K-16 - sram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 60K -} - -OUTPUT_ARCH(arm) -EXTERN(_vectors) -EXTERN(g_flashcfg) -ENTRY(_stext) - -SECTIONS -{ - .vectors : - { - _stext = ABSOLUTE(.); - *(.vectors) - } > vflash - - .flashcfg : - { - *(.flashcfg) - } > pflash - - .text : - { - *(.text .text.*) - *(.fixup) - *(.gnu.warning) - *(.rodata .rodata.*) - *(.gnu.linkonce.t.*) - *(.glue_7) - *(.glue_7t) - *(.got) - *(.gcc_except_table) - *(.gnu.linkonce.r.*) - _etext = ABSOLUTE(.); - } > dflash - - .init_section : - { - _sinit = ABSOLUTE(.); - KEEP(*(.init_array .init_array.*)) - _einit = ABSOLUTE(.); - } > dflash - - .ARM.extab : - { - *(.ARM.extab*) - } >dflash - - .ARM.exidx : - { - __exidx_start = ABSOLUTE(.); - *(.ARM.exidx*) - __exidx_end = ABSOLUTE(.); - } >dflash - - .data : - { - _sdata = ABSOLUTE(.); - *(.data .data.*) - *(.gnu.linkonce.d.*) - CONSTRUCTORS - . = ALIGN(4); - _edata = ABSOLUTE(.); - } > sram AT > dflash - - _eronly = LOADADDR(.data); - - .ramfunc ALIGN(4): - { - _sramfuncs = ABSOLUTE(.); - *(.ramfunc .ramfunc.*) - _eramfuncs = ABSOLUTE(.); - } > sram AT > dflash - - _framfuncs = LOADADDR(.ramfunc); - - .bss : - { - _sbss = ABSOLUTE(.); - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - _ebss = ABSOLUTE(.); - } > sram - - /* Stabs debugging sections. */ - - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_info 0 : { *(.debug_info) } - .debug_line 0 : { *(.debug_line) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_aranges 0 : { *(.debug_aranges) } -} diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/scripts/s32k144.cfg b/boards/arm/s32k1xx/rddrone-uavcan144/scripts/s32k144.cfg deleted file mode 100644 index 7d30a9f05f0..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/scripts/s32k144.cfg +++ /dev/null @@ -1,58 +0,0 @@ -# -# NXP S32K144 - 1x ARM Cortex-M4 @ up to 112 MHz -# - -adapter_khz 4000 -transport select swd - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME s32k144 -} - -# -# M4 JTAG mode TAP -# -if { [info exists M4_JTAG_TAPID] } { - set _M4_JTAG_TAPID $M4_JTAG_TAPID -} else { - set _M4_JTAG_TAPID 0x4ba00477 -} - -# -# M4 SWD mode TAP -# -if { [info exists M4_SWD_TAPID] } { - set _M4_SWD_TAPID $M4_SWD_TAPID -} else { - set _M4_SWD_TAPID 0x2ba01477 -} - -source [find target/swj-dp.tcl] - -if { [using_jtag] } { - set _M4_TAPID $_M4_JTAG_TAPID -} else { - set _M4_TAPID $_M4_SWD_TAPID -} - -swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \ - -expected-id $_M4_TAPID - -target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4 - -# S32K144 has 32+28 KB contiguous SRAM -if { [info exists WORKAREASIZE] } { - set _WORKAREASIZE $WORKAREASIZE -} else { - set _WORKAREASIZE 0xF000 -} -$_CHIPNAME.m4 configure -work-area-phys 0x1FFF8000 \ - -work-area-size $_WORKAREASIZE -work-area-backup 0 - -$_CHIPNAME.m4 configure -rtos nuttx - -if { ![using_hla] } { - cortex_m reset_config vectreset -} diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/scripts/sram.ld b/boards/arm/s32k1xx/rddrone-uavcan144/scripts/sram.ld deleted file mode 100644 index aaf324a5309..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/scripts/sram.ld +++ /dev/null @@ -1,114 +0,0 @@ -/**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/scripts/sram.ld - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/* The S32K144 has 512Kb of FLASH beginning at address 0x0000:0000 and - * 60Kb of SRAM beginning at address 0x1fff:8000 (plus 4Kb of FlexRAM) - * - * The on-chip RAM is split in two regions: SRAM_L and SRAM_U. The RAM is - * implemented such that the SRAM_L and SRAM_U ranges form a contiguous - * block in the memory map - * - * SRAM_L 1fff8000 - 1fffffff 32Kb - * SRAM_U 20000000 - 20006fff 28Kb - */ - -MEMORY -{ - flash (rx) : ORIGIN = 0x00000000, LENGTH = 512K - sram (rwx) : ORIGIN = 0x1fff8000, LENGTH = 60K -} - -OUTPUT_ARCH(arm) -EXTERN(_vectors) -ENTRY(_stext) - -SECTIONS -{ - .text : - { - _stext = ABSOLUTE(.); - *(.vectors) - *(.text .text.*) - *(.fixup) - *(.gnu.warning) - *(.rodata .rodata.*) - *(.gnu.linkonce.t.*) - *(.glue_7) - *(.glue_7t) - *(.got) - *(.gcc_except_table) - *(.gnu.linkonce.r.*) - _etext = ABSOLUTE(.); - } > sram - - .init_section : - { - _sinit = ABSOLUTE(.); - KEEP(*(.init_array .init_array.*)) - _einit = ABSOLUTE(.); - } > sram - - .ARM.extab : - { - *(.ARM.extab*) - } >sram - - .ARM.exidx : - { - __exidx_start = ABSOLUTE(.); - *(.ARM.exidx*) - __exidx_end = ABSOLUTE(.); - } >sram - - .data : - { - _sdata = ABSOLUTE(.); - *(.data .data.*) - *(.gnu.linkonce.d.*) - CONSTRUCTORS - . = ALIGN(4); - _edata = ABSOLUTE(.); - } > sram - - .bss : - { - _sbss = ABSOLUTE(.); - *(.bss .bss.*) - *(.gnu.linkonce.b.*) - *(COMMON) - . = ALIGN(4); - _ebss = ABSOLUTE(.); - } > sram - - /* Stabs debugging sections. */ - - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_info 0 : { *(.debug_info) } - .debug_line 0 : { *(.debug_line) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_aranges 0 : { *(.debug_aranges) } -} diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_autoleds.c b/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_autoleds.c deleted file mode 100644 index 378657404e6..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_autoleds.c +++ /dev/null @@ -1,150 +0,0 @@ -/**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_autoleds.c - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/* The RDDRONE-UAVCAN144 has one RGB LED: - * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) - * - * An output of '1' illuminates the LED. - * - * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board - * the Freedom K66F. The following definitions describe how NuttX controls - * the LEDs: - * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ----------------------- ----------------- - * LED_STARTED NuttX has been started OFF OFF OFF - * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON - * LED_IRQSENABLED Interrupts enabled OFF OFF ON - * LED_STACKCREATED Idle stack created OFF ON OFF - * LED_INIRQ In an interrupt (no change) - * LED_SIGNAL In a signal handler (no change) - * LED_ASSERTION An assertion failed (no change) - * LED_PANIC The system has crashed FLASH OFF OFF - * LED_IDLE K66 is in sleep mode (Optional, not used) - */ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include - -#include -#include - -#include "arm_arch.h" -#include "arm_internal.h" - -#include "s32k1xx_pin.h" -#include "rddrone-uavcan144.h" - -#include - -#ifdef CONFIG_ARCH_LEDS - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Summary of all possible settings */ - -#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ -#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ -#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ -#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ -#define LED_ON_OFF_OFF 4 /* LED_PANIC */ - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: board_autoled_initialize - ****************************************************************************/ - -void board_autoled_initialize(void) -{ - /* Configure LED GPIOs for output */ - - s32k1xx_pinconfig(GPIO_LED_R); - s32k1xx_pinconfig(GPIO_LED_G); - s32k1xx_pinconfig(GPIO_LED_B); -} - -/**************************************************************************** - * Name: board_autoled_on - ****************************************************************************/ - -void board_autoled_on(int led) -{ - if (led != LED_NOCHANGE) - { - bool redon = false; - bool greenon = false; - bool blueon = false; - - switch (led) - { - default: - case LED_OFF_OFF_OFF: - break; - - case LED_OFF_OFF_ON: - blueon = true; - break; - - case LED_OFF_ON_OFF: - greenon = true; - break; - - case LED_ON_OFF_OFF: - redon = true; - break; - } - - s32k1xx_gpiowrite(GPIO_LED_R, redon); - s32k1xx_gpiowrite(GPIO_LED_G, greenon); - s32k1xx_gpiowrite(GPIO_LED_B, blueon); - } -} - -/**************************************************************************** - * Name: board_autoled_off - ****************************************************************************/ - -void board_autoled_off(int led) -{ - if (led == LED_ON_OFF_OFF) - { - s32k1xx_gpiowrite(GPIO_LED_R, true); - s32k1xx_gpiowrite(GPIO_LED_G, false); - s32k1xx_gpiowrite(GPIO_LED_B, false); - } -} - -#endif /* CONFIG_ARCH_LEDS */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_bringup.c b/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_bringup.c deleted file mode 100644 index a4455bfff39..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_bringup.c +++ /dev/null @@ -1,154 +0,0 @@ -/**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_bringup.c - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include - -#include - -#ifdef CONFIG_INPUT_BUTTONS -# include -#endif - -#ifdef CONFIG_USERLED -# include -#endif - -#ifdef CONFIG_I2C_DRIVER -# include "s32k1xx_pin.h" -# include -# include "s32k1xx_lpi2c.h" -#endif - -#ifdef CONFIG_S32K1XX_EEEPROM -# include "s32k1xx_eeeprom.h" -#endif - -#include "rddrone-uavcan144.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: s32k1xx_bringup - * - * Description: - * Perform architecture-specific initialization - * - * CONFIG_BOARD_LATE_INITIALIZE=y : - * Called from board_late_initialize(). - * - * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y : - * Called from the NSH library - * - ****************************************************************************/ - -int s32k1xx_bringup(void) -{ - int ret = OK; - -#ifdef CONFIG_INPUT_BUTTONS - /* Register the BUTTON driver */ - - ret = btn_lower_initialize("/dev/buttons"); - if (ret < 0) - { - syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret); - } -#endif - -#ifdef CONFIG_USERLED - /* Register the LED driver */ - - ret = userled_lower_initialize("/dev/userleds"); - if (ret < 0) - { - syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret); - } -#endif - -#ifdef CONFIG_FS_PROCFS - /* Mount the procfs file system */ - - ret = nx_mount(NULL, "/proc", "procfs", 0, NULL); - if (ret < 0) - { - syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret); - } -#endif - -#ifdef CONFIG_S32K1XX_LPSPI - /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak - * function s32k1xx_spidev_initialize() has been brought into the link. - */ - - s32k1xx_spidev_initialize(); -#endif - -#if defined(CONFIG_S32K1XX_LPI2C0) - s32k1xx_pinconfig(GPIO_HIGHDRIVE | GPIO_OUTPUT_ONE | PIN_PORTA | PIN10); /* Set A71CH IF0 HIGH */ - s32k1xx_pinconfig(GPIO_HIGHDRIVE | GPIO_OUTPUT_ZERO | PIN_PORTA | PIN7); /* Set A71CH IF1 LOW */ - -#if defined(CONFIG_I2C_DRIVER) - FAR struct i2c_master_s *i2c; - i2c = s32k1xx_i2cbus_initialize(0); - - if (i2c == NULL) - { - serr("ERROR: Failed to get I2C interface\n"); - } - else - { - ret = i2c_register(i2c, 0); - if (ret < 0) - { - serr("ERROR: Failed to register I2C driver: %d\n", ret); - s32k1xx_i2cbus_uninitialize(i2c); - } - } -#endif -#endif - -#ifdef CONFIG_S32K1XX_PROGMEM - FAR struct mtd_dev_s *mtd; - int minor = 0; - - mtd = progmem_initialize(); - if (!mtd) - { - syslog(LOG_ERR, "ERROR: progmem_initialize failed\n"); - } -#endif - -#ifdef CONFIG_S32K1XX_EEEPROM - /* Register EEEPROM block device */ - - s32k1xx_eeeprom_register(0, 4096); -#endif - - return ret; -} diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_clockconfig.c b/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_clockconfig.c deleted file mode 100644 index 126904f4795..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_clockconfig.c +++ /dev/null @@ -1,217 +0,0 @@ -/**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_clockconfig.c - * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * Most of the settings within this file derives from NXP sample code for - * the S32K1XX MCUs. That sample code has this licensing information: - * - * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc. - * Copyright 2016-2018 NXP - * All rights reserved. - * - * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include - -#include "s32k1xx_clockconfig.h" -#include "s32k1xx_start.h" -#include "rddrone-uavcan144.h" - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/* Each S32K1XX board must provide the following initialized structure. - * This is needed to establish the initial board clocking. - */ - -const struct clock_configuration_s g_initial_clkconfig = -{ - .scg = - { - .sirc = - { - .range = SCG_SIRC_RANGE_HIGH, /* RANGE - High range (8 MHz) */ - .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SIRCDIV1 */ - .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SIRCDIV2 */ - .initialize = true, /* Initialize */ - .stopmode = false, /* SIRCSTEN */ - .lowpower = true, /* SIRCLPEN */ - .locked = false, /* LK */ - }, - .firc = - { - .range = SCG_FIRC_RANGE_48M, /* RANGE */ - .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* FIRCDIV1 */ - .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* FIRCDIV2 */ - .initialize = true, /* Initialize */ - .regulator = true, /* FIRCREGOFF */ - .locked = false, /* LK */ - }, - .sosc = - { - .mode = SCG_SOSC_MONITOR_DISABLE, /* SOSCCM */ - .gain = SCG_SOSC_GAIN_LOW, /* HGO */ - .range = SCG_SOSC_RANGE_HIGH, /* RANGE */ - .extref = SCG_SOSC_REF_OSC, /* EREFS */ - .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SOSCDIV1 */ - .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SOSCDIV2 */ - .initialize = true, /* Initialize */ - .locked = false, /* LK */ - }, - .spll = - { - .mode = SCG_SPLL_MONITOR_DISABLE, /* SPLLCM */ - .div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SPLLDIV1 */ - .div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SPLLDIV2 */ - .prediv = 1, /* PREDIV */ - .mult = 40, /* MULT */ - .src = 0, /* SOURCE */ - .initialize = true, /* Initialize */ - .locked = false, /* LK */ - }, - .rtc = - { - .initialize = true, /* Initialize */ - .clkin = 0, /* RTC_CLKIN */ - }, - .clockout = - { - .source = SCG_CLOCKOUT_SRC_FIRC, /* SCG CLKOUTSEL */ - .initialize = true, /* Initialize */ - }, - .clockmode = - { - .rccr = /* RCCR - Run Clock Control Register */ - { - .src = SCG_SYSTEM_CLOCK_SRC_SYS_PLL, /* SCS */ - .divslow = 3, /* DIVSLOW, range 1..16 */ - .divbus = 2, /* DIVBUS, range 1..16 */ - .divcore = 2, /* DIVCORE, range 1..16 */ - }, - .vccr = /* VCCR - VLPR Clock Control Register */ - { - .src = SCG_SYSTEM_CLOCK_SRC_SIRC, /* SCS */ - .divslow = 4, /* DIVSLOW, range 1..16 */ - .divbus = 1, /* DIVBUS, range 1..16 */ - .divcore = 2, /* DIVCORE, range 1..16 */ - }, - .hccr = - { - .src = SCG_SYSTEM_CLOCK_SRC_SYS_PLL, /* SCS */ - .divslow = 3, /* DIVSLOW, range 1..16 */ - .divbus = 2, /* DIVBUS, range 1..16 */ - .divcore = 2, /* DIVCORE, range 1..16 */ - }, - .initialize = true, /* Initialize */ - }, - }, - .sim = - { - .clockout = /* Clock Out configuration. */ - { - .source = SIM_CLKOUT_SEL_SYSTEM_SCG_CLKOUT, /* CLKOUTSEL */ - .divider = 1, /* CLKOUTDIV, range 1..8 */ - .initialize = true, /* Initialize */ - .enable = false, /* CLKOUTEN */ - }, - .lpoclk = /* Low Power Clock configuration. */ - { - .rtc_source = SIM_RTCCLK_SEL_LPO_32K, /* RTCCLKSEL */ - .lpo_source = SIM_LPO_CLK_SEL_LPO_128K, /* LPOCLKSEL */ - .initialize = true, /* Initialize */ - .lpo32k = true, /* LPO32KCLKEN */ - .lpo1k = true, /* LPO1KCLKEN */ - }, - .tclk = /* TCLK CLOCK configuration. */ - { - .tclkfreq[0] = 0, /* TCLK0 */ - .tclkfreq[1] = 0, /* TCLK1 */ - .tclkfreq[2] = 0, /* TCLK2 */ - .initialize = true, /* Initialize */ - }, - .platgate = /* Platform Gate Clock configuration. */ - { - .initialize = true, /* Initialize */ - .mscm = true, /* CGCMSCM */ - .mpu = true, /* CGCMPU */ - .dma = true, /* CGCDMA */ - .erm = true, /* CGCERM */ - .eim = true, /* CGCEIM */ - }, - .traceclk = /* Debug trace Clock Configuration. */ - { - .source = CLOCK_TRACE_SRC_CORE_CLK, /* TRACECLK_SEL */ - .divider = 1, /* TRACEDIV, range 1..8 */ - .initialize = true, /* Initialize */ - .enable = true, /* TRACEDIVEN */ - .fraction = false, /* TRACEFRAC */ - }, - }, - .pcc = - { - .count = NUM_OF_PERIPHERAL_CLOCKS_0, /* Number peripheral clock configurations */ - .pclks = g_peripheral_clockconfig0, /* Peripheral clock configurations */ - }, - .pmc = - { - .lpoclk = /* Low Power Clock configuration. */ - { - .trim = 0, /* Trimming value for LPO */ - .initialize = true, /* Initialize */ - .enable = true, /* Enable/disable LPO */ - }, - }, -}; - -/**************************************************************************** - * Public Functions - ****************************************************************************/ diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_periphclocks.c b/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_periphclocks.c deleted file mode 100644 index 373d405b8f6..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_periphclocks.c +++ /dev/null @@ -1,150 +0,0 @@ -/**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_periphclocks.c - * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - * Most of the settings within this file derives from NXP sample code for - * the S32K1XX MCUs. That sample code has this licensing information: - * - * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc. - * Copyright 2016-2018 NXP - * All rights reserved. - * - * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, - * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF - * THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include "s32k1xx_periphclocks.h" -#include "rddrone-uavcan144.h" - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/* Each S32K1XX board must provide the following initialized structure. - * This is needed to establish the initial peripheral clocking. - */ - -const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = -{ - { - .clkname = FLEXCAN0_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN - .clkgate = true, -#else - .clkgate = false, -#endif - }, - { - .clkname = FLEXCAN1_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN - .clkgate = true, -#else - .clkgate = false, -#endif - }, - { - .clkname = LPI2C0_CLK, -#ifdef CONFIG_S32K1XX_LPI2C0 - .clkgate = true, -#else - .clkgate = false, -#endif - .clksrc = CLK_SRC_SIRC_DIV2, - }, - { - .clkname = LPSPI0_CLK, -#ifdef CONFIG_S32K1XX_LPSPI0 - .clkgate = true, -#else - .clkgate = false, -#endif - .clksrc = CLK_SRC_SIRC_DIV2, - }, - { - .clkname = LPUART0_CLK, -#ifdef CONFIG_S32K1XX_LPUART0 - .clkgate = true, -#else - .clkgate = false, -#endif - .clksrc = CLK_SRC_SIRC_DIV2, - }, - { - .clkname = LPUART1_CLK, -#ifdef CONFIG_S32K1XX_LPUART1 - .clkgate = true, -#else - .clkgate = false, -#endif - .clksrc = CLK_SRC_SIRC_DIV2, - }, - { - .clkname = PORTA_CLK, - .clkgate = true, - }, - { - .clkname = PORTB_CLK, - .clkgate = true, - }, - { - .clkname = PORTC_CLK, - .clkgate = true, - }, - { - .clkname = PORTD_CLK, - .clkgate = true, - }, - { - .clkname = PORTE_CLK, - .clkgate = true, - }, -}; - -/**************************************************************************** - * Public Functions - ****************************************************************************/ diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/README.txt b/boards/arm/s32k1xx/rddrone-uavcan146/README.txt deleted file mode 100644 index 69f96c0a07c..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan146/README.txt +++ /dev/null @@ -1,15 +0,0 @@ -README -====== - -This directory holds the port to the NXP RDDRONE-UAVCAN board with S32K146 MCU. - -Contents -======== - - o Status - -Status -====== - - 2020-01-23: Configuration created (copy-paste from S32K146EVB). - Tested: Serial console diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/include/board.h b/boards/arm/s32k1xx/rddrone-uavcan146/include/board.h deleted file mode 100644 index 631684b1337..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan146/include/board.h +++ /dev/null @@ -1,152 +0,0 @@ -/**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/include/board.h - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -#ifndef __BOARDS_ARM_RDDRONE_UAVCAN146_INCLUDE_BOARD_H -#define __BOARDS_ARM_RDDRONE_UAVCAN146_INCLUDE_BOARD_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#ifndef __ASSEMBLY__ -# include -# include -#endif - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Clocking *****************************************************************/ - -/* The RDDRONE-UAVCAN146 is fitted with a 8MHz Crystal */ - -#define BOARD_XTAL_FREQUENCY 8000000 - -/* The S32K146 will run at 112MHz */ - -/* LED definitions **********************************************************/ - -/* The RDDRONE-UAVCAN146 has one RGB LED: - * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) - * - * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in - * any way. The following definitions are used to access individual RGB - * components. - * - * The RGB components could, alternatively be controlled through PWM using - * the common RGB LED driver. - */ - -/* LED index values for use with board_userled() */ - -#define BOARD_LED_R 0 -#define BOARD_LED_G 1 -#define BOARD_LED_B 2 -#define BOARD_NLEDS 3 - -/* LED bits for use with board_userled_all() */ - -#define BOARD_LED_R_BIT (1 << BOARD_LED_R) -#define BOARD_LED_G_BIT (1 << BOARD_LED_G) -#define BOARD_LED_B_BIT (1 << BOARD_LED_B) - -/* Board revision detection pin - * 0 equals UCANS32K146-01 - * 1 equals UCANS32K146B - */ -#define BOARD_REVISION_DETECT_PIN (GPIO_INPUT | PIN_PORTA | PIN10 ) - -/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board - * the RDDRONE-UAVCAN146. The following definitions describe how NuttX - * controls the LEDs: - * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ---------------------------- ----------------- - */ - -#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ -#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ -#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ -#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ -#define LED_INIRQ 0 /* In an interrupt (no change) */ -#define LED_SIGNAL 0 /* In a signal handler (no change) */ -#define LED_ASSERTION 0 /* An assertion failed (no change) */ -#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ -#undef LED_IDLE /* RDDRONE-UAVCAN146 in sleep mode (Not used) */ - -/* Button definitions *******************************************************/ - -/* The RDDRONE-UAVCAN146 supports two buttons: - * - * SW2 PTC12 - * SW3 PTC13 - */ - -#define BUTTON_SW2 0 -#define BUTTON_SW3 1 -#define NUM_BUTTONS 2 - -#define BUTTON_SW2_BIT (1 << BUTTON_SW2) -#define BUTTON_SW3_BIT (1 << BUTTON_SW3) - -/* Alternate function pin selections ****************************************/ - -/* By default, the serial console will be provided on the OpenSDA VCOM port: - * - * OpenSDA UART TX PTC7 (LPUART1_TX) - * OpenSDA UART RX PTC6 (LPUART1_RX) - */ - -#define PIN_LPUART0_CTS PIN_LPUART0_CTS_2 /* PTC8 */ -#define PIN_LPUART0_RTS PIN_LPUART0_RTS_2 /* PTC9 */ -#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */ -#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */ - -#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ -#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ - -/* SPI selections ***********************************************************/ - -#define PIN_LPSPI0_SCK PIN_LPSPI0_SCK_2 /* PTB2 */ -#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */ -#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_3 /* PTB4 */ -#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_2 /* PTB5 */ - -/* I2C selections ***********************************************************/ - -#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */ -#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */ - -/* CAN selections ***********************************************************/ -#define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */ -#define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */ -#define PIN_CAN0_STB (GPIO_OUTPUT | PIN_PORTE | PIN11 ) -#define PIN_CAN1_TX PIN_CAN1_TX_1 /* PTA13 */ -#define PIN_CAN1_RX PIN_CAN1_RX_1 /* PTA12 */ -#define PIN_CAN1_STB (GPIO_OUTPUT | PIN_PORTE | PIN10 ) - -#endif /* __BOARDS_ARM_RDDRONE_UAVCAN146_INCLUDE_BOARD_H */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_spi.c b/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_spi.c deleted file mode 100644 index f419ff7b2f9..00000000000 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_spi.c +++ /dev/null @@ -1,184 +0,0 @@ -/**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_spi.c - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include - -#include -#include -#include -#include - -#include -#include -#include - -#include "arm_arch.h" - -#include "s32k1xx_config.h" -#include "s32k1xx_lpspi.h" -#include "s32k1xx_pin.h" -#include "rddrone-uavcan146.h" - -#if defined(CONFIG_S32K1XX_LPSPI0) || defined(CONFIG_S32K1XX_LPSPI1) || \ - defined(CONFIG_S32K1XX_LPSPI2) - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: s32k1xx_spidev_initialize - * - * Description: - * Called to configure SPI chip select GPIO pins for the RDDRONE-UAVCAN146 - * board. - * - ****************************************************************************/ - -void weak_function s32k1xx_spidev_initialize(void) -{ -#ifdef CONFIG_S32K1XX_LPSPI0 - s32k1xx_pinconfig(PIN_LPSPI0_PCS); - -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi0; - g_lpspi0 = s32k1xx_lpspibus_initialize(0); - - if (!g_lpspi0) - { - spierr("ERROR: [boot] FAILED to initialize LPSPI0\n"); - } - - spi_register(g_lpspi0, 0); -#endif -#endif - -#ifdef CONFIG_S32K1XX_LPSPI1 - s32k1xx_pinconfig(PIN_LPSPI1_PCS); - -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi1; - g_lpspi1 = s32k1xx_lpspibus_initialize(1); - - if (!g_lpspi1) - { - spierr("ERROR: [boot] FAILED to initialize LPSPI1\n"); - } - - spi_register(g_lpspi1, 1); -#endif -#endif - -#ifdef CONFIG_S32K1XX_LPSPI2 - s32k1xx_pinconfig(PIN_LPSPI2_PCS); - -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi2; - g_lpspi2 = s32k1xx_lpspibus_initialize(2); - - if (!g_lpspi2) - { - spierr("ERROR: [boot] FAILED to initialize LPSPI2\n"); - } - - spi_register(g_lpspi2, 2); -#endif -#endif -} - -/**************************************************************************** - * Name: s32k1xx_lpspi0/1/2select and s32k1xx_lpspi0/1/2status - * - * Description: - * The external functions, s32k1xx_lpspi0/1/2select and - * s32k1xx_lpspi0/1/2status must be provided by board-specific logic. - * They are implementations of the select and status methods of the SPI - * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). - * All other methods (including s32k1xx_lpspibus_initialize()) are provided - * by common logic. To use this common SPI logic on your board: - * - * 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip - * select pins. - * 2. Provide s32k1xx_lpspi0/1/2select() and s32k1xx_lpspi0/1/2status() - * functions in your board-specific logic. These functions will perform - * chip selection and status operations using GPIOs in the way your - * board is configured. - * 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level - * application initialization logic - * 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used - * to bind the SPI driver to higher level logic (e.g., calling - * mmcsd_spislotinitialize(), for example, will bind the SPI driver to - * the SPI MMC/SD driver). - * - ****************************************************************************/ - -#ifdef CONFIG_S32K1XX_LPSPI0 -void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid, - bool selected) -{ - spiinfo("devid: %d CS: %s\n", (int)devid, - selected ? "assert" : "de-assert"); - - s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected); -} - -uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid) -{ - return 0; -} -#endif - -#ifdef CONFIG_S32K1XX_LPSPI1 -void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, - uint32_t devid, bool selected) -{ - spiinfo("devid: %d CS: %s\n", (int)devid, - selected ? "assert" : "de-assert"); - - s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected); -} - -uint8_t s32k1xx_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid) -{ - return 0; -} -#endif - -#ifdef CONFIG_S32K1XX_LPSPI2 -void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, - uint32_t devid, bool selected) -{ - spiinfo("devid: %d CS: %s\n", (int)devid, - selected ? "assert" : "de-assert"); - - s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected); -} - -uint8_t s32k1xx_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid) -{ - return 0; -} -#endif - -#endif /* CONFIG_S32K1XX_LPSPI0 || CONFIG_S32K1XX_LPSPI01 || CONFIG_S32K1XX_LPSPI2 */ diff --git a/boards/arm/s32k1xx/s32k118evb/README.txt b/boards/arm/s32k1xx/s32k118evb/README.txt index 7e1953f7545..04a0a02b99d 100644 --- a/boards/arm/s32k1xx/s32k118evb/README.txt +++ b/boards/arm/s32k1xx/s32k118evb/README.txt @@ -1,7 +1,7 @@ README ====== -This directory hold the port to the NXP S32K118EVB-Q064 Development board. +This directory holds the port to the NXP S32K118EVB-Q064 development board. Contents ======== @@ -20,16 +20,24 @@ Status 2019-08-17: The port is code complete. It compiles with no errors or warnings but is untested. Still waiting for hardware. - 2019-08-20: The very first image that I wrote to FLASH seems to - have "bricked" the board. The board is sensitive to (1) resetting - into a bad state and (2) incorrect flash configurations. It is - difficult to impossiblel to recover from these start-up errors. + 2019-08-20: The very first image that I wrote to FLASH seems to have + "bricked" the board. The board is sensitive to (1) resetting into a bad + state and (2) incorrect flash configurations. It is difficult to + impossible to recover from these start-up errors. - 2019-80-22: My S32K118EVB is still borked, but after some additional - changes, Fabio Balzano has verified that the NSH is functional on - that board. + 2019-08-22: My S32K118EVB is still borked, but after some additional + changes, Fabio Balzano has verified that the NSH is functional on that + board. - TODO: Need calibrate the delay loop. The current value of + 2019-10-19: The aforementioned fixes for the FLASH issues were converted + into a set of FLASH configuration options, with a proven default state. + + 2020-06-15: Added FlexCAN driver with SocketCAN support to the S32K1XX + arch. Might work on the S32K118EVB as well, but remains untested. + + 2020-06-16: Added Emulated EEPROM driver and initialization. + + TODO: Need to calibrate the delay loop. The current value of CONFIG_BOARD_LOOPSPERMSEC is a bogus value retained from a copy-paste (see apps/examples/calib_udelay). @@ -38,10 +46,10 @@ Serial Console By default, the serial console will be provided on the OpenSDA VCOM port: - OpenSDA UART TX PTB1(LPUART0_TX) - OpenSDA UART RX PTB0(LPUART0_RX) + OpenSDA UART RX PTB0 (LPUART0_RX) + OpenSDA UART TX PTB1 (LPUART0_TX) - USB drivers for the PEMIcro CDC Serial port are available here: + USB drivers for the PEmicro CDC Serial Port are available here: http://www.pemicro.com/opensda/ LEDs and Buttons @@ -51,17 +59,21 @@ LEDs and Buttons ---- The S32K118EVB has one RGB LED: - RedLED PTD16 (FTM0 CH1) - GreenLED PTD15 (FTM0 CH0) - BlueLED PTE8 (FTM0 CH6) + RedLED PTD16 (FTM0 CH1) + GreenLED PTD15 (FTM0 CH0) + BlueLED PTE8 (FTM0 CH6) An output of '1' illuminates the LED. If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. The following definitions are used to access individual RGB - components. + components (see s32k118evb.h): - The RGB components could, alternatively be controlled through PWM using + GPIO_LED_R + GPIO_LED_G + GPIO_LED_B + + The RGB components could, alternatively, be controlled through PWM using the common RGB LED driver. If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board @@ -80,7 +92,7 @@ LEDs and Buttons LED_SIGNAL In a signal handler (no change) LED_ASSERTION An assertion failed (no change) LED_PANIC The system has crashed FLASH OFF OFF - LED_IDLE S32K118EVB in sleep mode (no change) + LED_IDLE S32K118 in sleep mode (no change) ==========================================+========+========+========= Buttons @@ -93,7 +105,7 @@ LEDs and Buttons OpenSDA Notes ============= - - USB drivers for the PEMIcro CDC Serial port are available here: + - USB drivers for the PEmicro CDC Serial Port are available here: http://www.pemicro.com/opensda/ - The drag'n'drog interface expects files in .srec format. @@ -107,20 +119,20 @@ Configurations Common Information ------------------ - Each S32K118EVB configuration is maintained in a sub-directory and - can be selected as follow: + Each S32K118EVB configuration is maintained in a sub-directory and can be + selected as follows: tools/configure.sh s32k118evb: - Where is one of the sub-directories listed in the next paragraph + Where is one of the sub-directories listed in the next paragraph. NOTES (common for all configurations): - 1. This configuration uses the mconf-based configuration tool. To - change this configuration using that tool, you should: + 1. This configuration uses the mconf-based configuration tool. To change + this configuration using that tool, you should: - a. Build and install the kconfig-mconf tool. See nuttx/README.txt - see additional README.txt files in the NuttX tools repository. + a. Build and install the kconfig-mconf tool. See nuttx/README.txt. + Also see additional README.txt files in the NuttX tools repository. b. Execute 'make menuconfig' in nuttx/ in order to start the reconfiguration process. @@ -129,7 +141,7 @@ Configurations 115,200 8N1. This corresponds to the OpenSDA VCOM port. Configuration Sub-directories - ------------------------- + ----------------------------- nsh: --- diff --git a/boards/arm/s32k1xx/s32k118evb/configs/nsh/defconfig b/boards/arm/s32k1xx/s32k118evb/configs/nsh/defconfig index 28cb34fe6ac..ce83ba75254 100644 --- a/boards/arm/s32k1xx/s32k118evb/configs/nsh/defconfig +++ b/boards/arm/s32k1xx/s32k118evb/configs/nsh/defconfig @@ -45,13 +45,14 @@ CONFIG_PREALLOC_TIMERS=0 CONFIG_PTHREAD_STACK_DEFAULT=1536 CONFIG_RAM_SIZE=23552 CONFIG_RAM_START=0x1ffffc00 +CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_S32K1XX_LPUART0=y CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y -CONFIG_START_DAY=14 -CONFIG_START_MONTH=8 -CONFIG_START_YEAR=2019 +CONFIG_START_DAY=6 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2021 CONFIG_STDIO_DISABLE_BUFFERING=y CONFIG_SYMTAB_ORDEREDBYNAME=y CONFIG_SYSTEM_NSH=y diff --git a/boards/arm/s32k1xx/s32k118evb/include/board.h b/boards/arm/s32k1xx/s32k118evb/include/board.h index 6c17b96a008..a0061be6027 100644 --- a/boards/arm/s32k1xx/s32k118evb/include/board.h +++ b/boards/arm/s32k1xx/s32k118evb/include/board.h @@ -18,8 +18,8 @@ * ****************************************************************************/ -#ifndef __BOARDS_ARM_S32K118EVB_INCLUDE_BOARD_H -#define __BOARDS_ARM_S32K118EVB_INCLUDE_BOARD_H +#ifndef __BOARDS_ARM_S32K1XX_S32K118EVB_INCLUDE_BOARD_H +#define __BOARDS_ARM_S32K1XX_S32K118EVB_INCLUDE_BOARD_H /**************************************************************************** * Included Files @@ -27,30 +27,25 @@ #include -#ifndef __ASSEMBLY__ -# include -# include -#endif - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /* Clocking *****************************************************************/ -/* The S32K118EVB is fitted with a 40MHz Crystal */ +/* The S32K118EVB is fitted with a 40 MHz crystal */ -#define BOARD_XTAL_FREQUENCY 40000000 +#define BOARD_XTAL_FREQUENCY 40000000 -/* The S32K118 will run at 48MHz */ +/* The S32K118 will run at 48 MHz */ /* LED definitions **********************************************************/ /* The S32K118EVB has one RGB LED: * - * RedLED PTD16 (FTM0 CH1) - * GreenLED PTD15 (FTM0 CH0) - * BlueLED PTE8 (FTM0 CH6) + * RedLED PTD16 (FTM0 CH1) + * GreenLED PTD15 (FTM0 CH0) + * BlueLED PTE8 (FTM0 CH6) * * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in * any way. The following definitions are used to access individual RGB @@ -77,20 +72,20 @@ * the S32K118EVB. The following definitions describe how NuttX controls the * LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ---------------------------- ----------------- + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ----------------------------- ------------------- */ -#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ -#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ -#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ -#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ -#define LED_INIRQ 0 /* In an interrupt (no change) */ -#define LED_SIGNAL 0 /* In a signal handler (no change) */ -#define LED_ASSERTION 0 /* An assertion failed (no change) */ -#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ -#undef LED_IDLE /* S32K118EVB in sleep mode (Not used) */ +#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ +#define LED_INIRQ 0 /* In an interrupt (No change) */ +#define LED_SIGNAL 0 /* In a signal handler (No change) */ +#define LED_ASSERTION 0 /* An assertion failed (No change) */ +#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ +#undef LED_IDLE /* S32K118 is in sleep mode (Not used) */ /* Button definitions *******************************************************/ @@ -100,22 +95,38 @@ * SW3 PTD5 */ -#define BUTTON_SW2 0 -#define BUTTON_SW3 1 -#define NUM_BUTTONS 2 +#define BUTTON_SW2 0 +#define BUTTON_SW3 1 +#define NUM_BUTTONS 2 #define BUTTON_SW2_BIT (1 << BUTTON_SW2) #define BUTTON_SW3_BIT (1 << BUTTON_SW3) -/* Alternate function pin selections ****************************************/ +/* UART selections **********************************************************/ /* By default, the serial console will be provided on the OpenSDA VCOM port: * - * OpenSDA UART TX PTB1(LPUART0_TX) - * OpenSDA UART RX PTB0(LPUART0_RX) + * OpenSDA UART RX PTB0 (LPUART0_RX) + * OpenSDA UART TX PTB1 (LPUART0_TX) */ -#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */ -#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */ +#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */ +#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */ -#endif /* __BOARDS_ARM_S32K118EVB_INCLUDE_BOARD_H */ +/* SPI selections ***********************************************************/ + +/* UJA1169TK/F SBC SPI (LPSPI0) */ + +#define PIN_LPSPI0_SCK PIN_LPSPI0_SOUT_2 /* PTB2 */ +#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */ +#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_1 /* PTB4 */ +#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_2 /* PTB5 */ + +/* CAN selections ***********************************************************/ + +/* UJA1169TK/F SBC CAN (CAN0) */ + +#define PIN_CAN0_RX PIN_CAN0_RX_3 /* PTE4 */ +#define PIN_CAN0_TX PIN_CAN0_TX_3 /* PTE5 */ + +#endif /* __BOARDS_ARM_S32K1XX_S32K118EVB_INCLUDE_BOARD_H */ diff --git a/boards/arm/s32k1xx/s32k118evb/scripts/Make.defs b/boards/arm/s32k1xx/s32k118evb/scripts/Make.defs index e4dffca0ce7..42d069b9eb9 100644 --- a/boards/arm/s32k1xx/s32k118evb/scripts/Make.defs +++ b/boards/arm/s32k1xx/s32k118evb/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/s32k1xx/s32k118evb/src/Makefile b/boards/arm/s32k1xx/s32k118evb/src/Makefile index 5205831ab1d..4c38388eabb 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/Makefile +++ b/boards/arm/s32k1xx/s32k118evb/src/Makefile @@ -23,18 +23,26 @@ include $(TOPDIR)/Make.defs CSRCS = s32k1xx_boot.c s32k1xx_bringup.c s32k1xx_clockconfig.c CSRCS += s32k1xx_periphclocks.c +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += s32k1xx_buttons.c +endif + ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += s32k1xx_autoleds.c else CSRCS += s32k1xx_userleds.c endif -ifeq ($(CONFIG_ARCH_BUTTONS),y) -CSRCS += s32k1xx_buttons.c -endif - ifeq ($(CONFIG_BOARDCTL),y) CSRCS += s32k1xx_appinit.c endif +ifeq ($(CONFIG_S32K1XX_LPI2C),y) +CSRCS += s32k1xx_i2c.c +endif + +ifeq ($(CONFIG_S32K1XX_LPSPI),y) +CSRCS += s32k1xx_spi.c +endif + include $(TOPDIR)/boards/Board.mk diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k118evb.h b/boards/arm/s32k1xx/s32k118evb/src/s32k118evb.h index 38b25f2f5db..f4bd7af58f9 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/s32k118evb.h +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k118evb.h @@ -32,6 +32,7 @@ #include "hardware/s32k1xx_pinmux.h" #include "s32k1xx_periphclocks.h" +#include "s32k1xx_pin.h" /**************************************************************************** * Pre-processor Definitions @@ -43,16 +44,16 @@ /* LEDs. The S32K118EVB has one RGB LED: * - * RedLED PTD16 (FTM0CH1) - * GreenLED PTD15 (FTM0CH0) - * BlueLED PTE8 (FTM0CH6) + * RedLED PTD16 (FTM0 CH1) + * GreenLED PTD15 (FTM0 CH0) + * BlueLED PTE8 (FTM0 CH6) * * An output of '1' illuminates the LED. */ -#define GPIO_LED_R (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_G (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_B (PIN_PTE8 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_R (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_G (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_B (PIN_PTE8 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) /* Buttons. The S32K118EVB supports two buttons: * @@ -60,19 +61,13 @@ * SW3 PTD5 */ -#define GPIO_SW2 (PIN_PTD3 | PIN_INT_BOTH) -#define GPIO_SW3 (PIN_PTD5 | PIN_INT_BOTH) - -/* SPI chip selects */ +#define GPIO_SW2 (PIN_PTD3 | PIN_INT_BOTH) +#define GPIO_SW3 (PIN_PTD5 | PIN_INT_BOTH) /* Count of peripheral clock user configurations */ #define NUM_OF_PERIPHERAL_CLOCKS_0 11 -/**************************************************************************** - * Public Types - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -104,17 +99,25 @@ extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[]; int s32k1xx_bringup(void); /**************************************************************************** - * Name: s32k1xx_spidev_initialize + * Name: s32k1xx_i2cdev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the S32K118EVB - * board. + * Initialize I2C driver and register /dev/i2cN devices. * ****************************************************************************/ -#ifdef CONFIG_S32K1XX_SPI -void s32k1xx_spidev_initialize(void); -#endif +int s32k1xx_i2cdev_initialize(void); + +/**************************************************************************** + * Name: s32k1xx_spidev_initialize + * + * Description: + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. + * + ****************************************************************************/ + +int s32k1xx_spidev_initialize(void); #endif /* __ASSEMBLY__ */ #endif /* __BOARDS_ARM_S32K1XX_S32K118EVB_SRC_S32K118EVB_H */ diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_appinit.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_appinit.c index 970591d75d5..203c7a1c36b 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_appinit.c +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_appinit.c @@ -23,9 +23,10 @@ ****************************************************************************/ #include - #include +#include + #include "s32k118evb.h" /**************************************************************************** @@ -50,14 +51,14 @@ * * Input Parameters: * arg - The boardctl() argument is passed to the board_app_initialize() - * implementation without modification. The argument has no - * meaning to NuttX; the meaning of the argument is a contract - * between the board-specific initialization logic and the - * matching application logic. The value could be such things as a - * mode enumeration value, a set of DIP switch switch settings, a - * pointer to configuration data read from a file or serial FLASH, - * or whatever you would like to do with it. Every implementation - * should accept zero/NULL as a default configuration. + * implementation without modification. The argument has no meaning + * to NuttX; the meaning of the argument is a contract between the + * board-specific initialization logic and the matching application + * logic. The value could be such things as a mode enumeration + * value, a set of DIP switch settings, a pointer to configuration + * data read from a file or serial FLASH, or whatever you would like + * to do with it. Every implementation should accept zero/NULL as a + * default configuration. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned on diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_autoleds.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_autoleds.c index 6df73d9549b..d5dea325f1e 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_autoleds.c +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_autoleds.c @@ -20,28 +20,28 @@ /* The S32K118EVB has one RGB LED: * - * RedLED PTD16 (FTM0CH1) - * GreenLED PTD15 (FTM0CH0) - * BlueLED PTE8 (FTM0CH6) + * RedLED PTD16 (FTM0 CH1) + * GreenLED PTD15 (FTM0 CH0) + * BlueLED PTE8 (FTM0 CH6) * * An output of '1' illuminates the LED. * * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board - * the Freedom K66F. The following definitions describe how NuttX controls - * the LEDs: + * the S32K118EVB. The following definitions describe how NuttX controls the + * LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ----------------------- ----------------- - * LED_STARTED NuttX has been started OFF OFF OFF - * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON - * LED_IRQSENABLED Interrupts enabled OFF OFF ON - * LED_STACKCREATED Idle stack created OFF ON OFF - * LED_INIRQ In an interrupt (no change) - * LED_SIGNAL In a signal handler (no change) - * LED_ASSERTION An assertion failed (no change) - * LED_PANIC The system has crashed FLASH OFF OFF - * LED_IDLE K66 is in sleep mode (Optional, not used) + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ------------------------ -------------------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + * LED_IRQSENABLED Interrupts enabled OFF OFF ON + * LED_STACKCREATED Idle stack created OFF ON OFF + * LED_INIRQ In an interrupt (No change) + * LED_SIGNAL In a signal handler (No change) + * LED_ASSERTION An assertion failed (No change) + * LED_PANIC The system has crashed FLASH OFF OFF + * LED_IDLE S32K118 is in sleep mode (Optional, not used) */ /**************************************************************************** @@ -52,18 +52,12 @@ #include #include -#include #include -#include - -#include "arm_arch.h" -#include "arm_internal.h" #include "s32k1xx_pin.h" -#include "s32k118evb.h" -#include +#include "s32k118evb.h" #ifdef CONFIG_ARCH_LEDS @@ -73,11 +67,11 @@ /* Summary of all possible settings */ -#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ -#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ -#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ -#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ -#define LED_ON_OFF_OFF 4 /* LED_PANIC */ +#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ +#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ +#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ +#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ +#define LED_ON_OFF_OFF 4 /* LED_PANIC */ /**************************************************************************** * Public Functions @@ -127,6 +121,8 @@ void board_autoled_on(int led) break; } + /* An output of '1' illuminates the LED */ + s32k1xx_gpiowrite(GPIO_LED_R, redon); s32k1xx_gpiowrite(GPIO_LED_G, greenon); s32k1xx_gpiowrite(GPIO_LED_B, blueon); @@ -141,6 +137,8 @@ void board_autoled_off(int led) { if (led == LED_ON_OFF_OFF) { + /* An output of '1' illuminates the LED */ + s32k1xx_gpiowrite(GPIO_LED_R, true); s32k1xx_gpiowrite(GPIO_LED_G, false); s32k1xx_gpiowrite(GPIO_LED_B, false); diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_boot.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_boot.c index 531633c8e94..2851c6ed511 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_boot.c +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_boot.c @@ -23,9 +23,6 @@ ****************************************************************************/ #include - -#include - #include #include "s32k118evb.h" @@ -47,16 +44,8 @@ void s32k1xx_board_initialize(void) { -#ifdef CONFIG_S32K1XX_SPI - /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak - * function s32k1xx_spidev_initialize() has been brought into the link. - */ - - s32k1xx_spidev_initialize(); -#endif - #ifdef CONFIG_ARCH_LEDS - /* Configure on-board LEDs if LED support has been selected. */ + /* Configure on-board LEDs if LED support has been selected */ board_autoled_initialize(); #endif diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_bringup.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_bringup.c index ddd6f400577..378f421ffb7 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_bringup.c +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_bringup.c @@ -25,10 +25,9 @@ #include #include +#include #include -#include - #ifdef CONFIG_INPUT_BUTTONS # include #endif @@ -37,6 +36,14 @@ # include #endif +#ifdef CONFIG_FS_PROCFS +# include +#endif + +#ifdef CONFIG_S32K1XX_PROGMEM +# include +#endif + #ifdef CONFIG_S32K1XX_EEEPROM # include "s32k1xx_eeeprom.h" #endif @@ -97,19 +104,44 @@ int s32k1xx_bringup(void) #ifdef CONFIG_S32K1XX_PROGMEM FAR struct mtd_dev_s *mtd; - int minor = 0; mtd = progmem_initialize(); - if (!mtd) + if (mtd == NULL) { - syslog(LOG_ERR, "ERROR: progmem_initialize failed\n"); + syslog(LOG_ERR, "ERROR: progmem_initialize() failed\n"); } #endif #ifdef CONFIG_S32K1XX_EEEPROM /* Register EEEPROM block device */ - s32k1xx_eeeprom_register(0, 2048); + ret = s32k1xx_eeeprom_register(0, 4096); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_eeeprom_register() failed\n"); + } +#endif + +#ifdef CONFIG_S32K1XX_LPI2C + /* Initialize I2C driver */ + + ret = s32k1xx_i2cdev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_i2cdev_initialize() failed: %d\n", + ret); + } +#endif + +#ifdef CONFIG_S32K1XX_LPSPI + /* Initialize SPI driver */ + + ret = s32k1xx_spidev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_spidev_initialize() failed: %d\n", + ret); + } #endif return ret; diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_buttons.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_buttons.c index 73726eceb34..d90b9852682 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_buttons.c +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_buttons.c @@ -33,14 +33,14 @@ #include #include -#include #include #include "s32k1xx_pin.h" -#include "s32k118evb.h" #include +#include "s32k118evb.h" + #ifdef CONFIG_ARCH_BUTTONS /**************************************************************************** @@ -60,10 +60,11 @@ uint32_t board_button_initialize(void) { - /* Configure the GPIO pins as interrupting inputs. */ + /* Configure the GPIO pins as interrupting inputs */ s32k1xx_pinconfig(GPIO_SW2); s32k1xx_pinconfig(GPIO_SW3); + return NUM_BUTTONS; } @@ -88,6 +89,7 @@ uint32_t board_buttons(void) return ret; } +#ifdef CONFIG_ARCH_IRQBUTTONS /**************************************************************************** * Button support. * @@ -103,20 +105,19 @@ uint32_t board_buttons(void) * BUTTON_*_BIT definitions in board.h for the meaning of each bit. * * board_button_irq() may be called to register an interrupt handler that - * will be called when a button is depressed or released. The ID value is - * a button enumeration value that uniquely identifies a button resource. + * will be called when a button is pressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. * See the BUTTON_* definitions in board.h for the meaning of enumeration * value. * ****************************************************************************/ -#ifdef CONFIG_ARCH_IRQBUTTONS int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) { uint32_t pinset; int ret; - /* Map the button id to the GPIO bit set. */ + /* Map the button id to the GPIO bit set */ if (id == BUTTON_SW2) { @@ -147,5 +148,5 @@ int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) return ret; } -#endif +#endif /* CONFIG_ARCH_IRQBUTTONS */ #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_clockconfig.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_clockconfig.c index de666a4d742..78c2e4d76c5 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_clockconfig.c +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_clockconfig.c @@ -58,11 +58,9 @@ #include -#include -#include - #include "s32k1xx_clockconfig.h" #include "s32k1xx_start.h" + #include "s32k118evb.h" /**************************************************************************** diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_i2c.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_i2c.c new file mode 100644 index 00000000000..59a1d6bc9c5 --- /dev/null +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_i2c.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * boards/arm/s32k1xx/s32k118evb/src/s32k1xx_i2c.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include + +#include + +#include "s32k1xx_lpi2c.h" + +#include "s32k118evb.h" + +#ifdef CONFIG_S32K1XX_LPI2C + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_i2cdev_initialize + * + * Description: + * Initialize I2C driver and register /dev/i2cN devices. + * + ****************************************************************************/ + +int weak_function s32k1xx_i2cdev_initialize(void) +{ + int ret = OK; + +#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER) + /* LPI2C0 *****************************************************************/ + + /* Initialize the I2C driver for LPI2C0 */ + + struct i2c_master_s *lpi2c0 = s32k1xx_i2cbus_initialize(0); + if (lpi2c0 == NULL) + { + i2cerr("ERROR: FAILED to initialize LPI2C0\n"); + return -ENODEV; + } + + ret = i2c_register(lpi2c0, 0); + if (ret < 0) + { + i2cerr("ERROR: FAILED to register LPI2C0 driver\n"); + s32k1xx_i2cbus_uninitialize(lpi2c0); + return ret; + } +#endif /* CONFIG_S32K1XX_LPI2C0 && CONFIG_I2C_DRIVER */ + + return ret; +} + +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_periphclocks.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_periphclocks.c index 0a7669e31fc..ced57402249 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_periphclocks.c +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_periphclocks.c @@ -58,7 +58,9 @@ #include +#include "s32k11x/s32k11x_clocknames.h" #include "s32k1xx_periphclocks.h" + #include "s32k118evb.h" /**************************************************************************** @@ -73,7 +75,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = { { .clkname = FLEXCAN0_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN0 .clkgate = true, #else .clkgate = false, diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_spi.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_spi.c similarity index 53% rename from boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_spi.c rename to boards/arm/s32k1xx/s32k118evb/src/s32k1xx_spi.c index 888e5c19f23..00f66526d66 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_spi.c +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_spi.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_spi.c + * boards/arm/s32k1xx/s32k118evb/src/s32k1xx_spi.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -23,7 +23,9 @@ ****************************************************************************/ #include +#include +#include #include #include #include @@ -31,17 +33,15 @@ #include #include + +#include "s32k1xx_pin.h" +#include "s32k1xx_lpspi.h" + #include -#include "arm_arch.h" +#include "s32k118evb.h" -#include "s32k1xx_config.h" -#include "s32k1xx_lpspi.h" -#include "s32k1xx_pin.h" -#include "rddrone-uavcan144.h" - -#if defined(CONFIG_S32K1XX_LPSPI0) || defined(CONFIG_S32K1XX_LPSPI1) || \ - defined(CONFIG_S32K1XX_LPSPI2) +#ifdef CONFIG_S32K1XX_LPSPI /**************************************************************************** * Public Functions @@ -51,81 +51,89 @@ * Name: s32k1xx_spidev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the RDDRONE-UAVCAN144 - * board. + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. * ****************************************************************************/ -void weak_function s32k1xx_spidev_initialize(void) +int weak_function s32k1xx_spidev_initialize(void) { + int ret = OK; + #ifdef CONFIG_S32K1XX_LPSPI0 + /* LPSPI0 *****************************************************************/ + + /* Configure LPSPI0 peripheral chip select */ + s32k1xx_pinconfig(PIN_LPSPI0_PCS); -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi0; - g_lpspi0 = s32k1xx_lpspibus_initialize(0); +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI0 */ - if (!g_lpspi0) + struct spi_dev_s *g_lpspi0 = s32k1xx_lpspibus_initialize(0); + if (g_lpspi0 == NULL) { - spierr("ERROR: [boot] FAILED to initialize LPSPI0\n"); + spierr("ERROR: FAILED to initialize LPSPI0\n"); + return -ENODEV; } - spi_register(g_lpspi0, 0); -#endif -#endif + ret = spi_register(g_lpspi0, 0); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI0 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI0 */ #ifdef CONFIG_S32K1XX_LPSPI1 + /* LPSPI1 *****************************************************************/ + + /* Configure LPSPI1 peripheral chip select */ + s32k1xx_pinconfig(PIN_LPSPI1_PCS); -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi1; - g_lpspi1 = s32k1xx_lpspibus_initialize(1); +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI1 */ - if (!g_lpspi1) + struct spi_dev_s *g_lpspi1 = s32k1xx_lpspibus_initialize(1); + if (g_lpspi1 == NULL) { - spierr("ERROR: [boot] FAILED to initialize LPSPI1\n"); + spierr("ERROR: FAILED to initialize LPSPI1\n"); + return -ENODEV; } - spi_register(g_lpspi1, 1); -#endif -#endif - -#ifdef CONFIG_S32K1XX_LPSPI2 - s32k1xx_pinconfig(PIN_LPSPI2_PCS); - -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi2; - g_lpspi2 = s32k1xx_lpspibus_initialize(2); - - if (!g_lpspi2) + ret = spi_register(g_lpspi1, 1); + if (ret < 0) { - spierr("ERROR: [boot] FAILED to initialize LPSPI2\n"); + spierr("ERROR: FAILED to register LPSPI1 driver\n"); + return ret; } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI1 */ - spi_register(g_lpspi2, 2); -#endif -#endif + return ret; } /**************************************************************************** - * Name: s32k1xx_lpspi0/1/2select and s32k1xx_lpspi0/1/2status + * Name: s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus * * Description: - * The external functions, s32k1xx_lpspi0/1/2select and - * s32k1xx_lpspi0/1/2status must be provided by board-specific logic. - * They are implementations of the select and status methods of the SPI - * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). - * All other methods (including s32k1xx_lpspibus_initialize()) are provided - * by common logic. To use this common SPI logic on your board: + * The external functions, s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * s32k1xx_lpspibus_initialize()) are provided by common logic. To use + * this common SPI logic on your board: * * 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip * select pins. - * 2. Provide s32k1xx_lpspi0/1/2select() and s32k1xx_lpspi0/1/2status() - * functions in your board-specific logic. These functions will perform - * chip selection and status operations using GPIOs in the way your - * board is configured. + * 2. Provide s32k1xx_lpspiNselect() and s32k1xx_lpspiNstatus() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board is + * configured. * 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level - * application initialization logic + * application initialization logic. * 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used * to bind the SPI driver to higher level logic (e.g., calling * mmcsd_spislotinitialize(), for example, will bind the SPI driver to @@ -134,10 +142,12 @@ void weak_function s32k1xx_spidev_initialize(void) ****************************************************************************/ #ifdef CONFIG_S32K1XX_LPSPI0 +/* LPSPI0 *******************************************************************/ + void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid, - bool selected) + bool selected) { - spiinfo("devid: %d CS: %s\n", (int)devid, + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, selected ? "assert" : "de-assert"); s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected); @@ -147,13 +157,15 @@ uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid) { return 0; } -#endif +#endif /* CONFIG_S32K1XX_LPSPI0 */ #ifdef CONFIG_S32K1XX_LPSPI1 -void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, - uint32_t devid, bool selected) +/* LPSPI1 *******************************************************************/ + +void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) { - spiinfo("devid: %d CS: %s\n", (int)devid, + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, selected ? "assert" : "de-assert"); s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected); @@ -163,22 +175,5 @@ uint8_t s32k1xx_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid) { return 0; } -#endif - -#ifdef CONFIG_S32K1XX_LPSPI2 -void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, - uint32_t devid, bool selected) -{ - spiinfo("devid: %d CS: %s\n", (int)devid, - selected ? "assert" : "de-assert"); - - s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected); -} - -uint8_t s32k1xx_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid) -{ - return 0; -} -#endif - -#endif /* CONFIG_S32K1XX_LPSPI0 || CONFIG_S32K1XX_LPSPI01 || CONFIG_S32K1XX_LPSPI2 */ +#endif /* CONFIG_S32K1XX_LPSPI1 */ +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_userleds.c b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_userleds.c index 4c1fe036cb6..2950378c0a6 100644 --- a/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_userleds.c +++ b/boards/arm/s32k1xx/s32k118evb/src/s32k1xx_userleds.c @@ -26,18 +26,15 @@ #include #include -#include #include -#include "arm_arch.h" -#include "arm_internal.h" - #include "s32k1xx_pin.h" -#include "s32k118evb.h" #include +#include "s32k118evb.h" + #ifndef CONFIG_ARCH_LEDS /**************************************************************************** @@ -55,6 +52,7 @@ uint32_t board_userled_initialize(void) s32k1xx_pinconfig(GPIO_LED_R); s32k1xx_pinconfig(GPIO_LED_G); s32k1xx_pinconfig(GPIO_LED_B); + return BOARD_NLEDS; } @@ -83,7 +81,9 @@ void board_userled(int led, bool ledon) return; } - s32k1xx_gpiowrite(ledcfg, ledon); /* High illuminates */ + /* An output of '1' illuminates the LED */ + + s32k1xx_gpiowrite(ledcfg, ledon); } /**************************************************************************** @@ -92,7 +92,7 @@ void board_userled(int led, bool ledon) void board_userled_all(uint32_t ledset) { - /* Low illuminates */ + /* An output of '1' illuminates the LED */ s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0); s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0); diff --git a/boards/arm/s32k1xx/s32k144evb/README.txt b/boards/arm/s32k1xx/s32k144evb/README.txt index 5c97f767c4c..e0fdd29ad30 100644 --- a/boards/arm/s32k1xx/s32k144evb/README.txt +++ b/boards/arm/s32k1xx/s32k144evb/README.txt @@ -7,9 +7,151 @@ Contents ======== o Status + o Serial Console + o LEDs and Buttons + o OpenSDA Notes + o Thread-Aware Debugging with Eclipse + o Configurations Status ====== 2020-01-23: Configuration created (copy-paste from S32K146EVB). Tested: Serial console, I2C, SPI. + + 2020-06-15: Added FlexCAN driver with SocketCAN support to the S32K1XX + arch. Should work also on the S32K144EVB board, but remains untested. + + 2020-06-16: Added Emulated EEPROM driver and initialization. + +Serial Console +============== + + By default, the serial console will be provided on the OpenSDA VCOM port: + + OpenSDA UART RX PTC6 (LPUART1_RX) + OpenSDA UART TX PTC7 (LPUART1_TX) + + USB drivers for the PEmicro CDC Serial Port are available here: + http://www.pemicro.com/opensda/ + +LEDs and Buttons +================ + + LEDs + ---- + The S32K144EVB has one RGB LED: + + RedLED PTD15 (FTM0 CH0) + GreenLED PTD16 (FTM0 CH1) + BlueLED PTD0 (FTM0 CH2) + + An output of '0' illuminates the LED. + + If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + any way. The following definitions are used to access individual RGB + components (see s32k144evb.h): + + GPIO_LED_R + GPIO_LED_G + GPIO_LED_B + + The RGB components could, alternatively, be controlled through PWM using + the common RGB LED driver. + + If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board + the S32K144EVB. The following definitions describe how NuttX controls the + LEDs: + + ==========================================+========+========+========= + RED GREEN BLUE + ==========================================+========+========+========= + + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + LED_IRQSENABLED Interrupts enabled OFF OFF ON + LED_STACKCREATED Idle stack created OFF ON OFF + LED_INIRQ In an interrupt (no change) + LED_SIGNAL In a signal handler (no change) + LED_ASSERTION An assertion failed (no change) + LED_PANIC The system has crashed FLASH OFF OFF + LED_IDLE S32K144 in sleep mode (no change) + ==========================================+========+========+========= + + Buttons + ------- + The S32K144EVB supports two buttons: + + SW2 PTC12 + SW3 PTC13 + +OpenSDA Notes +============= + + - USB drivers for the PEmicro CDC Serial Port are available here: + http://www.pemicro.com/opensda/ + + - The drag'n'drog interface expects files in .srec format. + + - Using Segger J-Link: Easy... but remember to use the SWD connector J14 + in the center of the board and not the OpenSDA connector closer to the + OpenSDA USB connector J7. + +Thread-Aware Debugging with Eclipse +=================================== + + Thread-aware debugging is possible with openocd-nuttx + ( https://github.com/sony/openocd-nuttx ) and was tested together with the + Eclipse-based S32 Design Studio for Arm: + https://www.nxp.com/design/software/development-software/s32-design-studio-ide/s32-design-studio-for-arm:S32DS-ARM + + NOTE: This method was last tested with NuttX 8.2 and S32DS for Arm 2018.R1. + It may not work anymore with recent releases of NuttX and/or S32DS. + + 1. NuttX should be build with debug symbols enabled. + + 2. Build OpenOCD as described here (using the same parameters as well): + https://micro.ros.org/docs/tutorials/old/debugging/ + + 3. A s32k144.cfg file is available in the scripts/ folder. Start OpenOCD + with the following command (adapt the path info): + /usr/local/bin/openocd -f /usr/share/openocd/scripts/interface/jlink.cfg \ + -f boards/s32k1xx/s32k144evb/scripts/s32k144.cfg -c init -c "reset halt" + + 4. Setup a GDB debug session in Eclipse. The resulting debug window shows + the NuttX threads. The full stack details can be viewed. + +Configurations +============== + + Common Information + ------------------ + Each S32K144EVB configuration is maintained in a sub-directory and can be + selected as follows: + + tools/configure.sh s32k144evb: + + Where is one of the sub-directories listed in the next paragraph. + + NOTES (common for all configurations): + + 1. This configuration uses the mconf-based configuration tool. To change + this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt. + Also see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless otherwise stated, the serial console used is LPUART1 at + 115,200 8N1. This corresponds to the OpenSDA VCOM port. + + Configuration Sub-directories + ----------------------------- + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. Support + for builtin applications is enabled, but in the base configuration the + only application selected is the "Hello, World!" example. diff --git a/boards/arm/s32k1xx/s32k144evb/configs/nsh/defconfig b/boards/arm/s32k1xx/s32k144evb/configs/nsh/defconfig index ea1b9f78173..948b83488cd 100644 --- a/boards/arm/s32k1xx/s32k144evb/configs/nsh/defconfig +++ b/boards/arm/s32k1xx/s32k144evb/configs/nsh/defconfig @@ -17,15 +17,13 @@ CONFIG_ARCH_CHIP_S32K144=y CONFIG_ARCH_CHIP_S32K14X=y CONFIG_ARCH_CHIP_S32K1XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_BOARD_LOOPSPERMSEC=3997 +CONFIG_BOARD_LOOPSPERMSEC=6667 CONFIG_BUILTIN=y CONFIG_EXAMPLES_HELLO=y CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y -CONFIG_LPUART1_RXBUFSIZE=64 CONFIG_LPUART1_SERIAL_CONSOLE=y -CONFIG_LPUART1_TXBUFSIZE=64 CONFIG_MOTOROLA_SREC=y CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y @@ -34,14 +32,14 @@ CONFIG_NSH_READLINE=y CONFIG_PREALLOC_TIMERS=4 CONFIG_RAM_SIZE=61440 CONFIG_RAM_START=0x1fff8000 +CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_S32K1XX_LPUART1=y CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y -CONFIG_START_DAY=18 -CONFIG_START_MONTH=8 -CONFIG_START_YEAR=2019 -CONFIG_STDIO_DISABLE_BUFFERING=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2021 CONFIG_SYMTAB_ORDEREDBYNAME=y CONFIG_SYSTEM_NSH=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/s32k1xx/s32k144evb/include/board.h b/boards/arm/s32k1xx/s32k144evb/include/board.h index 99266627448..db93c2e4967 100644 --- a/boards/arm/s32k1xx/s32k144evb/include/board.h +++ b/boards/arm/s32k1xx/s32k144evb/include/board.h @@ -18,8 +18,8 @@ * ****************************************************************************/ -#ifndef __BOARDS_ARM_S32K144EVB_INCLUDE_BOARD_H -#define __BOARDS_ARM_S32K144EVB_INCLUDE_BOARD_H +#ifndef __BOARDS_ARM_S32K1XX_S32K144EVB_INCLUDE_BOARD_H +#define __BOARDS_ARM_S32K1XX_S32K144EVB_INCLUDE_BOARD_H /**************************************************************************** * Included Files @@ -27,30 +27,25 @@ #include -#ifndef __ASSEMBLY__ -# include -# include -#endif - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /* Clocking *****************************************************************/ -/* The S32K144EVB is fitted with a 8MHz Crystal */ +/* The S32K144EVB is fitted with a 8 MHz crystal */ -#define BOARD_XTAL_FREQUENCY 8000000 +#define BOARD_XTAL_FREQUENCY 8000000 -/* The S32K144 will run at 112MHz */ +/* The S32K144 will run at 80 MHz */ /* LED definitions **********************************************************/ /* The S32K144EVB has one RGB LED: * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) * * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in * any way. The following definitions are used to access individual RGB @@ -77,20 +72,20 @@ * the S32K144EVB. The following definitions describe how NuttX controls the * LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ---------------------------- ----------------- + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ----------------------------- ------------------- */ -#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ -#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ -#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ -#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ -#define LED_INIRQ 0 /* In an interrupt (no change) */ -#define LED_SIGNAL 0 /* In a signal handler (no change) */ -#define LED_ASSERTION 0 /* An assertion failed (no change) */ -#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ -#undef LED_IDLE /* S32K144EVB in sleep mode (Not used) */ +#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ +#define LED_INIRQ 0 /* In an interrupt (No change) */ +#define LED_SIGNAL 0 /* In a signal handler (No change) */ +#define LED_ASSERTION 0 /* An assertion failed (No change) */ +#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ +#undef LED_IDLE /* S32K144 is in sleep mode (Not used) */ /* Button definitions *******************************************************/ @@ -100,50 +95,38 @@ * SW3 PTC13 */ -#define BUTTON_SW2 0 -#define BUTTON_SW3 1 -#define NUM_BUTTONS 2 +#define BUTTON_SW2 0 +#define BUTTON_SW3 1 +#define NUM_BUTTONS 2 #define BUTTON_SW2_BIT (1 << BUTTON_SW2) #define BUTTON_SW3_BIT (1 << BUTTON_SW3) -/* Alternate function pin selections ****************************************/ +/* UART selections **********************************************************/ /* By default, the serial console will be provided on the OpenSDA VCOM port: * - * OpenSDA UART TX PTC7 (LPUART1_TX) - * OpenSDA UART RX PTC6 (LPUART1_RX) + * OpenSDA UART RX PTC6 (LPUART1_RX) + * OpenSDA UART TX PTC7 (LPUART1_TX) */ -#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */ -#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */ - -#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ -#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ - -#define PIN_LPUART2_RX PIN_LPUART2_RX_1 /* PTA8 */ -#define PIN_LPUART2_TX PIN_LPUART2_TX_1 /* PTA9 */ +#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ +#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ /* SPI selections ***********************************************************/ -#define PIN_LPSPI0_SCK PIN_LPSPI0_SCK_2 /* PTB2 */ -#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */ -#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_3 /* PTB4 */ -#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_1 /* PTB0 */ +/* UJA1169TK/F SBC SPI (LPSPI1) */ -#define PIN_LPSPI1_SCK PIN_LPSPI1_SCK_1 /* PTB14 */ -#define PIN_LPSPI1_MISO PIN_LPSPI1_SIN_1 /* PTB15 */ -#define PIN_LPSPI1_MOSI PIN_LPSPI1_SOUT_1 /* PTB16 */ -#define PIN_LPSPI1_PCS PIN_LPSPI1_PCS3 /* PTB17 */ +#define PIN_LPSPI1_SCK PIN_LPSPI1_SCK_1 /* PTB14 */ +#define PIN_LPSPI1_MISO PIN_LPSPI1_SIN_1 /* PTB15 */ +#define PIN_LPSPI1_MOSI PIN_LPSPI1_SOUT_1 /* PTB16 */ +#define PIN_LPSPI1_PCS PIN_LPSPI1_PCS3 /* PTB17 */ -#define PIN_LPSPI2_SCK PIN_LPSPI2_SCK_2 /* PTE15 */ -#define PIN_LPSPI2_MISO PIN_LPSPI2_SIN_2 /* PTE16 */ -#define PIN_LPSPI2_MOSI PIN_LPSPI2_SOUT_1 /* PTA8 */ -#define PIN_LPSPI2_PCS PIN_LPSPI2_PCS0_2 /* PTA9 */ +/* CAN selections ***********************************************************/ -/* I2C selections ***********************************************************/ +/* UJA1169TK/F SBC CAN (CAN0) */ -#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */ -#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */ +#define PIN_CAN0_RX PIN_CAN0_RX_3 /* PTE4 */ +#define PIN_CAN0_TX PIN_CAN0_TX_3 /* PTE5 */ -#endif /* __BOARDS_ARM_S32K144EVB_INCLUDE_BOARD_H */ +#endif /* __BOARDS_ARM_S32K1XX_S32K144EVB_INCLUDE_BOARD_H */ diff --git a/boards/arm/s32k1xx/s32k144evb/scripts/Make.defs b/boards/arm/s32k1xx/s32k144evb/scripts/Make.defs index 65674b4772e..c226fe88a9b 100644 --- a/boards/arm/s32k1xx/s32k144evb/scripts/Make.defs +++ b/boards/arm/s32k1xx/s32k144evb/scripts/Make.defs @@ -58,13 +58,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/s32k1xx/s32k144evb/src/Makefile b/boards/arm/s32k1xx/s32k144evb/src/Makefile index 62945e995aa..8239f43b85e 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/Makefile +++ b/boards/arm/s32k1xx/s32k144evb/src/Makefile @@ -23,20 +23,24 @@ include $(TOPDIR)/Make.defs CSRCS = s32k1xx_boot.c s32k1xx_bringup.c s32k1xx_clockconfig.c CSRCS += s32k1xx_periphclocks.c +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += s32k1xx_buttons.c +endif + ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += s32k1xx_autoleds.c else CSRCS += s32k1xx_userleds.c endif -ifeq ($(CONFIG_ARCH_BUTTONS),y) -CSRCS += s32k1xx_buttons.c -endif - ifeq ($(CONFIG_BOARDCTL),y) CSRCS += s32k1xx_appinit.c endif +ifeq ($(CONFIG_S32K1XX_LPI2C),y) +CSRCS += s32k1xx_i2c.c +endif + ifeq ($(CONFIG_S32K1XX_LPSPI),y) CSRCS += s32k1xx_spi.c endif diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k144evb.h b/boards/arm/s32k1xx/s32k144evb/src/s32k144evb.h index eec9107ef1b..7da255502b6 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k144evb.h +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k144evb.h @@ -32,6 +32,7 @@ #include "hardware/s32k1xx_pinmux.h" #include "s32k1xx_periphclocks.h" +#include "s32k1xx_pin.h" /**************************************************************************** * Pre-processor Definitions @@ -43,16 +44,16 @@ /* LEDs. The S32K144EVB has one RGB LED: * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) * - * An output of '1' illuminates the LED. + * An output of '0' illuminates the LED. */ -#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_B (PIN_PTD0 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) +#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) +#define GPIO_LED_B (PIN_PTD0 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) /* Buttons. The S32K144EVB supports two buttons: * @@ -60,19 +61,13 @@ * SW3 PTC13 */ -#define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH) -#define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH) - -/* SPI chip selects */ +#define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH) +#define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH) /* Count of peripheral clock user configurations */ #define NUM_OF_PERIPHERAL_CLOCKS_0 15 -/**************************************************************************** - * Public Types - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -104,17 +99,25 @@ extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[]; int s32k1xx_bringup(void); /**************************************************************************** - * Name: s32k1xx_spidev_initialize + * Name: s32k1xx_i2cdev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the S32K144EVB - * board. + * Initialize I2C driver and register /dev/i2cN devices. * ****************************************************************************/ -#ifdef CONFIG_S32K1XX_LPSPI -void s32k1xx_spidev_initialize(void); -#endif +int s32k1xx_i2cdev_initialize(void); + +/**************************************************************************** + * Name: s32k1xx_spidev_initialize + * + * Description: + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. + * + ****************************************************************************/ + +int s32k1xx_spidev_initialize(void); #endif /* __ASSEMBLY__ */ #endif /* __BOARDS_ARM_S32K1XX_S32K144EVB_SRC_S32K144EVB_H */ diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_appinit.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_appinit.c index b0c17815f25..c4c1cf110b7 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_appinit.c +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_appinit.c @@ -23,9 +23,10 @@ ****************************************************************************/ #include - #include +#include + #include "s32k144evb.h" /**************************************************************************** @@ -50,14 +51,14 @@ * * Input Parameters: * arg - The boardctl() argument is passed to the board_app_initialize() - * implementation without modification. The argument has no - * meaning to NuttX; the meaning of the argument is a contract - * between the board-specific initialization logic and the - * matching application logic. The value could be such things as a - * mode enumeration value, a set of DIP switch switch settings, a - * pointer to configuration data read from a file or serial FLASH, - * or whatever you would like to do with it. Every implementation - * should accept zero/NULL as a default configuration. + * implementation without modification. The argument has no meaning + * to NuttX; the meaning of the argument is a contract between the + * board-specific initialization logic and the matching application + * logic. The value could be such things as a mode enumeration + * value, a set of DIP switch settings, a pointer to configuration + * data read from a file or serial FLASH, or whatever you would like + * to do with it. Every implementation should accept zero/NULL as a + * default configuration. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned on diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_autoleds.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_autoleds.c index 327b8badf83..fbcc257bfd2 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_autoleds.c +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_autoleds.c @@ -20,28 +20,28 @@ /* The S32K144EVB has one RGB LED: * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) * - * An output of '1' illuminates the LED. + * An output of '0' illuminates the LED. * * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board - * the Freedom K66F. The following definitions describe how NuttX controls - * the LEDs: + * the S32K144EVB. The following definitions describe how NuttX controls the + * LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ----------------------- ----------------- - * LED_STARTED NuttX has been started OFF OFF OFF - * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON - * LED_IRQSENABLED Interrupts enabled OFF OFF ON - * LED_STACKCREATED Idle stack created OFF ON OFF - * LED_INIRQ In an interrupt (no change) - * LED_SIGNAL In a signal handler (no change) - * LED_ASSERTION An assertion failed (no change) - * LED_PANIC The system has crashed FLASH OFF OFF - * LED_IDLE K66 is in sleep mode (Optional, not used) + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ------------------------ -------------------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + * LED_IRQSENABLED Interrupts enabled OFF OFF ON + * LED_STACKCREATED Idle stack created OFF ON OFF + * LED_INIRQ In an interrupt (No change) + * LED_SIGNAL In a signal handler (No change) + * LED_ASSERTION An assertion failed (No change) + * LED_PANIC The system has crashed FLASH OFF OFF + * LED_IDLE S32K144 is in sleep mode (Optional, not used) */ /**************************************************************************** @@ -52,18 +52,12 @@ #include #include -#include #include -#include - -#include "arm_arch.h" -#include "arm_internal.h" #include "s32k1xx_pin.h" -#include "s32k144evb.h" -#include +#include "s32k144evb.h" #ifdef CONFIG_ARCH_LEDS @@ -73,11 +67,11 @@ /* Summary of all possible settings */ -#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ -#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ -#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ -#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ -#define LED_ON_OFF_OFF 4 /* LED_PANIC */ +#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ +#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ +#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ +#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ +#define LED_ON_OFF_OFF 4 /* LED_PANIC */ /**************************************************************************** * Public Functions @@ -127,9 +121,11 @@ void board_autoled_on(int led) break; } - s32k1xx_gpiowrite(GPIO_LED_R, redon); - s32k1xx_gpiowrite(GPIO_LED_G, greenon); - s32k1xx_gpiowrite(GPIO_LED_B, blueon); + /* Invert output, an output of '0' illuminates the LED */ + + s32k1xx_gpiowrite(GPIO_LED_R, !redon); + s32k1xx_gpiowrite(GPIO_LED_G, !greenon); + s32k1xx_gpiowrite(GPIO_LED_B, !blueon); } } @@ -141,9 +137,11 @@ void board_autoled_off(int led) { if (led == LED_ON_OFF_OFF) { - s32k1xx_gpiowrite(GPIO_LED_R, true); - s32k1xx_gpiowrite(GPIO_LED_G, false); - s32k1xx_gpiowrite(GPIO_LED_B, false); + /* Invert outputs, an output of '0' illuminates the LED */ + + s32k1xx_gpiowrite(GPIO_LED_R, !true); + s32k1xx_gpiowrite(GPIO_LED_G, !false); + s32k1xx_gpiowrite(GPIO_LED_B, !false); } } diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_boot.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_boot.c index 944f01ddd40..6c387fd61e3 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_boot.c +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_boot.c @@ -23,9 +23,6 @@ ****************************************************************************/ #include - -#include - #include #include "s32k144evb.h" @@ -48,7 +45,7 @@ void s32k1xx_board_initialize(void) { #ifdef CONFIG_ARCH_LEDS - /* Configure on-board LEDs if LED support has been selected. */ + /* Configure on-board LEDs if LED support has been selected */ board_autoled_initialize(); #endif diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_bringup.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_bringup.c index 4bae76ccca7..9ce12ffc785 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_bringup.c +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_bringup.c @@ -25,10 +25,9 @@ #include #include +#include #include -#include - #ifdef CONFIG_INPUT_BUTTONS # include #endif @@ -37,9 +36,12 @@ # include #endif -#ifdef CONFIG_I2C_DRIVER -# include -# include "s32k1xx_lpi2c.h" +#ifdef CONFIG_FS_PROCFS +# include +#endif + +#ifdef CONFIG_S32K1XX_PROGMEM +# include #endif #ifdef CONFIG_S32K1XX_EEEPROM @@ -100,48 +102,46 @@ int s32k1xx_bringup(void) } #endif -#ifdef CONFIG_S32K1XX_LPSPI - /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak - * function s32k1xx_spidev_initialize() has been brought into the link. - */ - - s32k1xx_spidev_initialize(); -#endif - -#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER) - FAR struct i2c_master_s *i2c; - - i2c = s32k1xx_i2cbus_initialize(0); - if (i2c == NULL) - { - serr("ERROR: Failed to get I2C%d interface\n", bus); - } - else - { - ret = i2c_register(i2c, 0); - if (ret < 0) - { - serr("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); - s32k1xx_i2cbus_uninitialize(i2c); - } - } -#endif - #ifdef CONFIG_S32K1XX_PROGMEM FAR struct mtd_dev_s *mtd; - int minor = 0; mtd = progmem_initialize(); - if (!mtd) + if (mtd == NULL) { - syslog(LOG_ERR, "ERROR: progmem_initialize failed\n"); + syslog(LOG_ERR, "ERROR: progmem_initialize() failed\n"); } #endif #ifdef CONFIG_S32K1XX_EEEPROM /* Register EEEPROM block device */ - s32k1xx_eeeprom_register(0, 4096); + ret = s32k1xx_eeeprom_register(0, 4096); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_eeeprom_register() failed\n"); + } +#endif + +#ifdef CONFIG_S32K1XX_LPI2C + /* Initialize I2C driver */ + + ret = s32k1xx_i2cdev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_i2cdev_initialize() failed: %d\n", + ret); + } +#endif + +#ifdef CONFIG_S32K1XX_LPSPI + /* Initialize SPI driver */ + + ret = s32k1xx_spidev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_spidev_initialize() failed: %d\n", + ret); + } #endif return ret; diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_buttons.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_buttons.c index 0f4498d10f7..0bb933216a4 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_buttons.c +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_buttons.c @@ -33,14 +33,14 @@ #include #include -#include #include #include "s32k1xx_pin.h" -#include "s32k144evb.h" #include +#include "s32k144evb.h" + #ifdef CONFIG_ARCH_BUTTONS /**************************************************************************** @@ -60,10 +60,11 @@ uint32_t board_button_initialize(void) { - /* Configure the GPIO pins as interrupting inputs. */ + /* Configure the GPIO pins as interrupting inputs */ s32k1xx_pinconfig(GPIO_SW2); s32k1xx_pinconfig(GPIO_SW3); + return NUM_BUTTONS; } @@ -88,6 +89,7 @@ uint32_t board_buttons(void) return ret; } +#ifdef CONFIG_ARCH_IRQBUTTONS /**************************************************************************** * Button support. * @@ -103,20 +105,19 @@ uint32_t board_buttons(void) * BUTTON_*_BIT definitions in board.h for the meaning of each bit. * * board_button_irq() may be called to register an interrupt handler that - * will be called when a button is depressed or released. The ID value is - * a button enumeration value that uniquely identifies a button resource. + * will be called when a button is pressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. * See the BUTTON_* definitions in board.h for the meaning of enumeration * value. * ****************************************************************************/ -#ifdef CONFIG_ARCH_IRQBUTTONS int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) { uint32_t pinset; int ret; - /* Map the button id to the GPIO bit set. */ + /* Map the button id to the GPIO bit set */ if (id == BUTTON_SW2) { @@ -147,5 +148,5 @@ int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) return ret; } -#endif +#endif /* CONFIG_ARCH_IRQBUTTONS */ #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_clockconfig.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_clockconfig.c index fe3e26363f6..8ecd105dc0e 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_clockconfig.c +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_clockconfig.c @@ -58,11 +58,9 @@ #include -#include -#include - #include "s32k1xx_clockconfig.h" #include "s32k1xx_start.h" + #include "s32k144evb.h" /**************************************************************************** diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_i2c.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_i2c.c new file mode 100644 index 00000000000..98b9c1f7d39 --- /dev/null +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_i2c.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * boards/arm/s32k1xx/s32k144evb/src/s32k1xx_i2c.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include + +#include + +#include "s32k1xx_lpi2c.h" + +#include "s32k144evb.h" + +#ifdef CONFIG_S32K1XX_LPI2C + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_i2cdev_initialize + * + * Description: + * Initialize I2C driver and register /dev/i2cN devices. + * + ****************************************************************************/ + +int weak_function s32k1xx_i2cdev_initialize(void) +{ + int ret = OK; + +#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER) + /* LPI2C0 *****************************************************************/ + + /* Initialize the I2C driver for LPI2C0 */ + + struct i2c_master_s *lpi2c0 = s32k1xx_i2cbus_initialize(0); + if (lpi2c0 == NULL) + { + i2cerr("ERROR: FAILED to initialize LPI2C0\n"); + return -ENODEV; + } + + ret = i2c_register(lpi2c0, 0); + if (ret < 0) + { + i2cerr("ERROR: FAILED to register LPI2C0 driver\n"); + s32k1xx_i2cbus_uninitialize(lpi2c0); + return ret; + } +#endif /* CONFIG_S32K1XX_LPI2C0 && CONFIG_I2C_DRIVER */ + + return ret; +} + +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_periphclocks.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_periphclocks.c index 38eaa4a651d..81829504ad0 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_periphclocks.c +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_periphclocks.c @@ -58,7 +58,9 @@ #include +#include "s32k14x/s32k14x_clocknames.h" #include "s32k1xx_periphclocks.h" + #include "s32k144evb.h" /**************************************************************************** @@ -73,7 +75,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = { { .clkname = FLEXCAN0_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN0 .clkgate = true, #else .clkgate = false, @@ -81,7 +83,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = }, { .clkname = FLEXCAN1_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN1 .clkgate = true, #else .clkgate = false, @@ -89,7 +91,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = }, { .clkname = FLEXCAN2_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN2 .clkgate = true, #else .clkgate = false, diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_spi.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_spi.c index 72bf035df16..eca5ec04443 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_spi.c +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_spi.c @@ -23,7 +23,9 @@ ****************************************************************************/ #include +#include +#include #include #include #include @@ -31,17 +33,15 @@ #include #include + +#include "s32k1xx_pin.h" +#include "s32k1xx_lpspi.h" + #include -#include "arm_arch.h" - -#include "s32k1xx_config.h" -#include "s32k1xx_lpspi.h" -#include "s32k1xx_pin.h" #include "s32k144evb.h" -#if defined(CONFIG_S32K1XX_LPSPI0) || defined(CONFIG_S32K1XX_LPSPI1) || \ - defined(CONFIG_S32K1XX_LPSPI2) +#ifdef CONFIG_S32K1XX_LPSPI /**************************************************************************** * Public Functions @@ -51,80 +51,115 @@ * Name: s32k1xx_spidev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the S32K144EVB board. + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. * ****************************************************************************/ -void weak_function s32k1xx_spidev_initialize(void) +int weak_function s32k1xx_spidev_initialize(void) { + int ret = OK; + #ifdef CONFIG_S32K1XX_LPSPI0 + /* LPSPI0 *****************************************************************/ + + /* Configure LPSPI0 peripheral chip select */ + s32k1xx_pinconfig(PIN_LPSPI0_PCS); -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi0; - g_lpspi0 = s32k1xx_lpspibus_initialize(0); +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI0 */ - if (!g_lpspi0) + struct spi_dev_s *g_lpspi0 = s32k1xx_lpspibus_initialize(0); + if (g_lpspi0 == NULL) { - spierr("ERROR: [boot] FAILED to initialize LPSPI0\n"); + spierr("ERROR: FAILED to initialize LPSPI0\n"); + return -ENODEV; } - spi_register(g_lpspi0, 0); -#endif -#endif + ret = spi_register(g_lpspi0, 0); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI0 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI0 */ #ifdef CONFIG_S32K1XX_LPSPI1 + /* LPSPI1 *****************************************************************/ + + /* Configure LPSPI1 peripheral chip select */ + s32k1xx_pinconfig(PIN_LPSPI1_PCS); -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi1; - g_lpspi1 = s32k1xx_lpspibus_initialize(1); +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI1 */ - if (!g_lpspi1) + struct spi_dev_s *g_lpspi1 = s32k1xx_lpspibus_initialize(1); + if (g_lpspi1 == NULL) { - spierr("ERROR: [boot] FAILED to initialize LPSPI1\n"); + spierr("ERROR: FAILED to initialize LPSPI1\n"); + return -ENODEV; } - spi_register(g_lpspi1, 1); -#endif -#endif + ret = spi_register(g_lpspi1, 1); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI1 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI1 */ #ifdef CONFIG_S32K1XX_LPSPI2 + /* LPSPI2 *****************************************************************/ + + /* Configure LPSPI2 peripheral chip select */ + s32k1xx_pinconfig(PIN_LPSPI2_PCS); -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi2; - g_lpspi2 = s32k1xx_lpspibus_initialize(2); +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI2 */ - if (!g_lpspi2) + struct spi_dev_s *g_lpspi2 = s32k1xx_lpspibus_initialize(2); + if (g_lpspi2 == NULL) { - spierr("ERROR: [boot] FAILED to initialize LPSPI2\n"); + spierr("ERROR: FAILED to initialize LPSPI2\n"); + return -ENODEV; } - spi_register(g_lpspi2, 2); -#endif -#endif + ret = spi_register(g_lpspi2, 2); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI2 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI2 */ + + return ret; } /**************************************************************************** - * Name: s32k1xx_lpspi0/1/2select and s32k1xx_lpspi0/1/2status + * Name: s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus * * Description: - * The external functions, s32k1xx_lpspi0/1/2select and - * s32k1xx_lpspi0/1/2status must be provided by board-specific logic. - * They are implementations of the select and status methods of the SPI - * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). - * All other methods (including s32k1xx_lpspibus_initialize()) are provided - * by common logic. To use this common SPI logic on your board: + * The external functions, s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * s32k1xx_lpspibus_initialize()) are provided by common logic. To use + * this common SPI logic on your board: * * 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip * select pins. - * 2. Provide s32k1xx_lpspi0/1/2select() and s32k1xx_lpspi0/1/2status() - * functions in your board-specific logic. These functions will perform - * chip selection and status operations using GPIOs in the way your - * board is configured. + * 2. Provide s32k1xx_lpspiNselect() and s32k1xx_lpspiNstatus() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board is + * configured. * 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level - * application initialization logic + * application initialization logic. * 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used * to bind the SPI driver to higher level logic (e.g., calling * mmcsd_spislotinitialize(), for example, will bind the SPI driver to @@ -133,10 +168,12 @@ void weak_function s32k1xx_spidev_initialize(void) ****************************************************************************/ #ifdef CONFIG_S32K1XX_LPSPI0 +/* LPSPI0 *******************************************************************/ + void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid, - bool selected) + bool selected) { - spiinfo("devid: %d CS: %s\n", (int)devid, + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, selected ? "assert" : "de-assert"); s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected); @@ -146,13 +183,15 @@ uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid) { return 0; } -#endif +#endif /* CONFIG_S32K1XX_LPSPI0 */ #ifdef CONFIG_S32K1XX_LPSPI1 -void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, - uint32_t devid, bool selected) +/* LPSPI1 *******************************************************************/ + +void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) { - spiinfo("devid: %d CS: %s\n", (int)devid, + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, selected ? "assert" : "de-assert"); s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected); @@ -162,14 +201,16 @@ uint8_t s32k1xx_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid) { return 0; } -#endif +#endif /* CONFIG_S32K1XX_LPSPI1 */ #ifdef CONFIG_S32K1XX_LPSPI2 -void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, - uint32_t devid, bool selected) +/* LPSPI2 *******************************************************************/ + +void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) { - spiinfo("devid: %d CS: %s\n", (int)devid, - selected ? "assert" : "de-assert"); + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, + selected ? "assert" : "de-assert"); s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected); } @@ -178,6 +219,5 @@ uint8_t s32k1xx_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid) { return 0; } -#endif - -#endif /* CONFIG_S32K1XX_LPSPI0 || CONFIG_S32K1XX_LPSPI01 || CONFIG_S32K1XX_LPSPI2 */ +#endif /* CONFIG_S32K1XX_LPSPI2 */ +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_userleds.c b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_userleds.c index 5705b33294d..3fbba8bb113 100644 --- a/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_userleds.c +++ b/boards/arm/s32k1xx/s32k144evb/src/s32k1xx_userleds.c @@ -26,18 +26,15 @@ #include #include -#include #include -#include "arm_arch.h" -#include "arm_internal.h" - #include "s32k1xx_pin.h" -#include "s32k144evb.h" #include +#include "s32k144evb.h" + #ifndef CONFIG_ARCH_LEDS /**************************************************************************** @@ -55,6 +52,7 @@ uint32_t board_userled_initialize(void) s32k1xx_pinconfig(GPIO_LED_R); s32k1xx_pinconfig(GPIO_LED_G); s32k1xx_pinconfig(GPIO_LED_B); + return BOARD_NLEDS; } @@ -83,7 +81,9 @@ void board_userled(int led, bool ledon) return; } - s32k1xx_gpiowrite(ledcfg, ledon); /* High illuminates */ + /* Invert output, an output of '0' illuminates the LED */ + + s32k1xx_gpiowrite(ledcfg, !ledon); } /**************************************************************************** @@ -92,11 +92,11 @@ void board_userled(int led, bool ledon) void board_userled_all(uint32_t ledset) { - /* Low illuminates */ + /* Invert output, an output of '0' illuminates the LED */ - s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0); - s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0); - s32k1xx_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) != 0); + s32k1xx_gpiowrite(GPIO_LED_R, !((ledset & BOARD_LED_R_BIT) != 0)); + s32k1xx_gpiowrite(GPIO_LED_G, !((ledset & BOARD_LED_G_BIT) != 0)); + s32k1xx_gpiowrite(GPIO_LED_B, !((ledset & BOARD_LED_B_BIT) != 0)); } #endif /* !CONFIG_ARCH_LEDS */ diff --git a/boards/arm/s32k1xx/s32k146evb/README.txt b/boards/arm/s32k1xx/s32k146evb/README.txt index 8a769ad14c2..bdfadd51a8c 100644 --- a/boards/arm/s32k1xx/s32k146evb/README.txt +++ b/boards/arm/s32k1xx/s32k146evb/README.txt @@ -1,7 +1,7 @@ README ====== -This directory hold the port to the NXP S32K146EVB-Q144 Development board. +This directory holds the port to the NXP S32K146EVB-Q144 development board. Contents ======== @@ -21,22 +21,36 @@ Status 2019-08-20: For initial testing, I ran out of SRAM to avoid the brickage problems I had with the S32K118EVB (i.e., with CONFIG_BOOT_RUNFROMISRAM=y). In this mode, the NSH configuration - appears worked correctly. + appears to work correctly. - 2019-18-21: Writing a relocated version of that same functional binary + 2019-08-21: Writing a relocated version of that same functional binary into FLASH, however, did not work and, in fact, bricked my S32K146EVB. That is because the first version of the FLASH image that I used clobbered the FLASH Configuration bytes at address 0x0400 (I didn't even know about these!). I have since modified the linker script - to skip this are in FLASH. There is some fragmentary discussion - for recovery from this condition at: https://community.nxp.com/thread/505593 . - But none of those options are working for me. - - Give the success running of SRAM and the success of the same fixes + to skip this address in FLASH. There is some fragmentary discussion + for recovery from this condition at the NXP Community Forums, but none of + those options are working for me: + https://community.nxp.com/thread/505593 + + Given the success running from SRAM and the success of the same fixes on the S32K118, I believe that the NSH configuration should now run out of FLASH. Unfortunately, I cannot demonstrate that. - TODO: Need calibrate the delay loop. The current value of + 2019-10-19: The NXP Mobile Robotics team has demonstrated that the basic + NSH configuration runs out of FLASH without issues. The aforementioned + fixes for the FLASH issues were converted into a set of FLASH + configuration options, with a proven default state. + + 2019-11-07: A s32k146.cfg configuration file (for OpenOCD) was added to + the scripts/ folder. + + 2020-06-15: Added FlexCAN driver with SocketCAN support to the S32K1XX + arch. Should work also on the S32K146EVB board, but remains untested. + + 2020-06-16: Added Emulated EEPROM driver and initialization. + + TODO: Need to calibrate the delay loop. The current value of CONFIG_BOARD_LOOPSPERMSEC is a bogus value retained from a copy-paste (see apps/examples/calib_udelay). @@ -45,10 +59,10 @@ Serial Console By default, the serial console will be provided on the OpenSDA VCOM port: - OpenSDA UART TX PTC7 (LPUART1_TX) - OpenSDA UART RX PTC6 (LPUART1_RX) + OpenSDA UART RX PTC6 (LPUART1_RX) + OpenSDA UART TX PTC7 (LPUART1_TX) - USB drivers for the PEMIcro CDC Serial port are available here: + USB drivers for the PEmicro CDC Serial Port are available here: http://www.pemicro.com/opensda/ LEDs and Buttons @@ -58,17 +72,21 @@ LEDs and Buttons ---- The S32K146EVB has one RGB LED: - RedLED PTD15 (FTM0 CH0) - GreenLED PTD16 (FTM0 CH1) - BlueLED PTD0 (FTM0 CH2) + RedLED PTD15 (FTM0 CH0) + GreenLED PTD16 (FTM0 CH1) + BlueLED PTD0 (FTM0 CH2) An output of '1' illuminates the LED. If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. The following definitions are used to access individual RGB - components. + components (see s32k146evb.h): - The RGB components could, alternatively be controlled through PWM using + GPIO_LED_R + GPIO_LED_G + GPIO_LED_B + + The RGB components could, alternatively, be controlled through PWM using the common RGB LED driver. If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board @@ -87,7 +105,7 @@ LEDs and Buttons LED_SIGNAL In a signal handler (no change) LED_ASSERTION An assertion failed (no change) LED_PANIC The system has crashed FLASH OFF OFF - LED_IDLE S32K146EVB in sleep mode (no change) + LED_IDLE S32K146 in sleep mode (no change) ==========================================+========+========+========= Buttons @@ -100,57 +118,58 @@ LEDs and Buttons OpenSDA Notes ============= - - USB drivers for the PEMIcro CDC Serial port are available here: + - USB drivers for the PEmicro CDC Serial Port are available here: http://www.pemicro.com/opensda/ - The drag'n'drog interface expects files in .srec format. - - Using Segger J-Link: Easy... but remember to use the SWD J14 connector + - Using Segger J-Link: Easy... but remember to use the SWD connector J14 in the center of the board and not the OpenSDA connector closer to the OpenSDA USB connector J7. Thread-Aware Debugging with Eclipse =================================== - Based on correspondence with Han Raaijmakers + Thread-aware debugging is possible with openocd-nuttx + ( https://github.com/sony/openocd-nuttx ) and was tested together with the + Eclipse-based S32 Design Studio for Arm: + https://www.nxp.com/design/software/development-software/s32-design-studio-ide/s32-design-studio-for-arm:S32DS-ARM - OpenOCD-nuttx build on Linux (NXW00504) making use of S32DS for ARM 2018R1. NuttX is built with debug symbols. + NOTE: This method was last tested with NuttX 8.2 and S32DS for Arm 2018.R1. + It may not work anymore with recent releases of NuttX and/or S32DS. - Resulting debug window gives nuttx threads. The full stack details can be viewed. + 1. NuttX should be build with debug symbols enabled. - HOW TO GET THERE: + 2. Build OpenOCD as described here (using the same parameters as well): + https://micro.ros.org/docs/tutorials/old/debugging/ - First we build openocd as described in: - https://micro-ros.github.io/docs/tutorials/advanced/debugging_gdb_openocd/ + 3. A s32k146.cfg file is available in the scripts/ folder. Start OpenOCD + with the following command (adapt the path info): + /usr/local/bin/openocd -f /usr/share/openocd/scripts/interface/jlink.cfg \ + -f boards/s32k1xx/s32k146evb/scripts/s32k146.cfg -c init -c "reset halt" - The nuttx parameters where exactly the same as found on this page - - I've added a s32k146.cfg file in the scripts/ folder - - Start openocd with following command (adapt the path info) - - /usr/local/bin/openocd -f /usr/share/openocd/scripts/interface/jlink.cfg \ - -f /home/han/data1Ta/s32k146/openocd-nuttx/tcl/target/s32k146.cfg -c init -c "reset halt" + 4. Setup a GDB debug session in Eclipse. The resulting debug window shows + the NuttX threads. The full stack details can be viewed. Configurations ============== Common Information ------------------ - Each S32K146EVB configuration is maintained in a sub-directory and - can be selected as follow: + Each S32K146EVB configuration is maintained in a sub-directory and can be + selected as follows: tools/configure.sh s32k146evb: - Where is one of the sub-directories listed in the next paragraph + Where is one of the sub-directories listed in the next paragraph. NOTES (common for all configurations): - 1. This configuration uses the mconf-based configuration tool. To - change this configuration using that tool, you should: + 1. This configuration uses the mconf-based configuration tool. To change + this configuration using that tool, you should: - a. Build and install the kconfig-mconf tool. See nuttx/README.txt - see additional README.txt files in the NuttX tools repository. + a. Build and install the kconfig-mconf tool. See nuttx/README.txt. + Also see additional README.txt files in the NuttX tools repository. b. Execute 'make menuconfig' in nuttx/ in order to start the reconfiguration process. @@ -164,5 +183,5 @@ Configurations nsh: --- Configures the NuttShell (nsh) located at apps/examples/nsh. Support - for builtin applications is enabled, but in the base configuration but - the builtin applications selected is the "Hello, World!" example. + for builtin applications is enabled, but in the base configuration the + only application selected is the "Hello, World!" example. diff --git a/boards/arm/s32k1xx/s32k146evb/configs/nsh/defconfig b/boards/arm/s32k1xx/s32k146evb/configs/nsh/defconfig index c17992fd3a2..6fe3c514c9f 100644 --- a/boards/arm/s32k1xx/s32k146evb/configs/nsh/defconfig +++ b/boards/arm/s32k1xx/s32k146evb/configs/nsh/defconfig @@ -17,15 +17,13 @@ CONFIG_ARCH_CHIP_S32K146=y CONFIG_ARCH_CHIP_S32K14X=y CONFIG_ARCH_CHIP_S32K1XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_BOARD_LOOPSPERMSEC=3997 +CONFIG_BOARD_LOOPSPERMSEC=6667 CONFIG_BUILTIN=y CONFIG_EXAMPLES_HELLO=y CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y -CONFIG_LPUART1_RXBUFSIZE=64 CONFIG_LPUART1_SERIAL_CONSOLE=y -CONFIG_LPUART1_TXBUFSIZE=64 CONFIG_MOTOROLA_SREC=y CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y @@ -34,14 +32,14 @@ CONFIG_NSH_READLINE=y CONFIG_PREALLOC_TIMERS=4 CONFIG_RAM_SIZE=126976 CONFIG_RAM_START=0x1fff0000 +CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_S32K1XX_LPUART1=y CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y -CONFIG_START_DAY=18 -CONFIG_START_MONTH=8 -CONFIG_START_YEAR=2019 -CONFIG_STDIO_DISABLE_BUFFERING=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2021 CONFIG_SYMTAB_ORDEREDBYNAME=y CONFIG_SYSTEM_NSH=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/s32k1xx/s32k146evb/include/board.h b/boards/arm/s32k1xx/s32k146evb/include/board.h index a54bb2fc5e1..549065b5c13 100644 --- a/boards/arm/s32k1xx/s32k146evb/include/board.h +++ b/boards/arm/s32k1xx/s32k146evb/include/board.h @@ -18,8 +18,8 @@ * ****************************************************************************/ -#ifndef __BOARDS_ARM_S32K146EVB_INCLUDE_BOARD_H -#define __BOARDS_ARM_S32K146EVB_INCLUDE_BOARD_H +#ifndef __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H +#define __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H /**************************************************************************** * Included Files @@ -27,30 +27,25 @@ #include -#ifndef __ASSEMBLY__ -# include -# include -#endif - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /* Clocking *****************************************************************/ -/* The S32K146EVB is fitted with a 8MHz Crystal */ +/* The S32K146EVB is fitted with a 8 MHz crystal */ -#define BOARD_XTAL_FREQUENCY 8000000 +#define BOARD_XTAL_FREQUENCY 8000000 -/* The S32K146 will run at 112MHz */ +/* The S32K146 will run at 80 MHz */ /* LED definitions **********************************************************/ /* The S32K146EVB has one RGB LED: * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) * * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in * any way. The following definitions are used to access individual RGB @@ -77,20 +72,20 @@ * the S32K146EVB. The following definitions describe how NuttX controls the * LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ---------------------------- ----------------- + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ----------------------------- ------------------- */ -#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ -#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ -#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ -#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ -#define LED_INIRQ 0 /* In an interrupt (no change) */ -#define LED_SIGNAL 0 /* In a signal handler (no change) */ -#define LED_ASSERTION 0 /* An assertion failed (no change) */ -#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ -#undef LED_IDLE /* S32K146EVB in sleep mode (Not used) */ +#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ +#define LED_INIRQ 0 /* In an interrupt (No change) */ +#define LED_SIGNAL 0 /* In a signal handler (No change) */ +#define LED_ASSERTION 0 /* An assertion failed (No change) */ +#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ +#undef LED_IDLE /* S32K146 is in sleep mode (Not used) */ /* Button definitions *******************************************************/ @@ -100,50 +95,38 @@ * SW3 PTC13 */ -#define BUTTON_SW2 0 -#define BUTTON_SW3 1 -#define NUM_BUTTONS 2 +#define BUTTON_SW2 0 +#define BUTTON_SW3 1 +#define NUM_BUTTONS 2 #define BUTTON_SW2_BIT (1 << BUTTON_SW2) #define BUTTON_SW3_BIT (1 << BUTTON_SW3) -/* Alternate function pin selections ****************************************/ +/* UART selections **********************************************************/ /* By default, the serial console will be provided on the OpenSDA VCOM port: * - * OpenSDA UART TX PTC7 (LPUART1_TX) - * OpenSDA UART RX PTC6 (LPUART1_RX) + * OpenSDA UART RX PTC6 (LPUART1_RX) + * OpenSDA UART TX PTC7 (LPUART1_TX) */ -#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */ -#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */ - -#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ -#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ - -#define PIN_LPUART2_RX PIN_LPUART2_RX_1 /* PTA8 */ -#define PIN_LPUART2_TX PIN_LPUART2_TX_1 /* PTA9 */ +#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ +#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ /* SPI selections ***********************************************************/ -#define PIN_LPSPI0_SCK PIN_LPSPI0_SCK_2 /* PTB2 */ -#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */ -#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_3 /* PTB4 */ -#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_1 /* PTB0 */ +/* UJA1169TK/F SBC SPI (LPSPI1) */ -#define PIN_LPSPI1_SCK PIN_LPSPI1_SCK_1 /* PTB14 */ -#define PIN_LPSPI1_MISO PIN_LPSPI1_SIN_1 /* PTB15 */ -#define PIN_LPSPI1_MOSI PIN_LPSPI1_SOUT_1 /* PTB16 */ -#define PIN_LPSPI1_PCS PIN_LPSPI1_PCS3 /* PTB17 */ +#define PIN_LPSPI1_SCK PIN_LPSPI1_SCK_2 /* PTB14 */ +#define PIN_LPSPI1_MISO PIN_LPSPI1_SIN_1 /* PTB15 */ +#define PIN_LPSPI1_MOSI PIN_LPSPI1_SOUT_2 /* PTB16 */ +#define PIN_LPSPI1_PCS PIN_LPSPI1_PCS3 /* PTB17 */ -#define PIN_LPSPI2_SCK PIN_LPSPI2_SCK_2 /* PTE15 */ -#define PIN_LPSPI2_MISO PIN_LPSPI2_SIN_2 /* PTE16 */ -#define PIN_LPSPI2_MOSI PIN_LPSPI2_SOUT_1 /* PTA8 */ -#define PIN_LPSPI2_PCS PIN_LPSPI2_PCS0_2 /* PTA9 */ +/* CAN selections ***********************************************************/ -/* I2C selections ***********************************************************/ +/* UJA1169TK/F SBC CAN (CAN0) */ -#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */ -#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */ +#define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */ +#define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */ -#endif /* __BOARDS_ARM_S32K146EVB_INCLUDE_BOARD_H */ +#endif /* __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H */ diff --git a/boards/arm/s32k1xx/s32k146evb/scripts/Make.defs b/boards/arm/s32k1xx/s32k146evb/scripts/Make.defs index 999cdd14535..c3371d73b32 100644 --- a/boards/arm/s32k1xx/s32k146evb/scripts/Make.defs +++ b/boards/arm/s32k1xx/s32k146evb/scripts/Make.defs @@ -58,13 +58,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/s32k1xx/s32k146evb/scripts/s32k146.cfg b/boards/arm/s32k1xx/s32k146evb/scripts/s32k146.cfg index 749facc47c8..2c03bf6e5f6 100644 --- a/boards/arm/s32k1xx/s32k146evb/scripts/s32k146.cfg +++ b/boards/arm/s32k1xx/s32k146evb/scripts/s32k146.cfg @@ -1,5 +1,5 @@ # -# NXP S32K146 - 1x ARM Cortex-M4 @ up to 180 MHz +# NXP S32K146 - 1x ARM Cortex-M4 @ up to 112 MHz # adapter_khz 4000 diff --git a/boards/arm/s32k1xx/s32k146evb/src/Makefile b/boards/arm/s32k1xx/s32k146evb/src/Makefile index f57a8f73d67..2b06603564f 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/Makefile +++ b/boards/arm/s32k1xx/s32k146evb/src/Makefile @@ -23,20 +23,24 @@ include $(TOPDIR)/Make.defs CSRCS = s32k1xx_boot.c s32k1xx_bringup.c s32k1xx_clockconfig.c CSRCS += s32k1xx_periphclocks.c +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += s32k1xx_buttons.c +endif + ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += s32k1xx_autoleds.c else CSRCS += s32k1xx_userleds.c endif -ifeq ($(CONFIG_ARCH_BUTTONS),y) -CSRCS += s32k1xx_buttons.c -endif - ifeq ($(CONFIG_BOARDCTL),y) CSRCS += s32k1xx_appinit.c endif +ifeq ($(CONFIG_S32K1XX_LPI2C),y) +CSRCS += s32k1xx_i2c.c +endif + ifeq ($(CONFIG_S32K1XX_LPSPI),y) CSRCS += s32k1xx_spi.c endif diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k146evb.h b/boards/arm/s32k1xx/s32k146evb/src/s32k146evb.h index 6d69213f684..f8c3d7b8a1a 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k146evb.h +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k146evb.h @@ -32,6 +32,7 @@ #include "hardware/s32k1xx_pinmux.h" #include "s32k1xx_periphclocks.h" +#include "s32k1xx_pin.h" /**************************************************************************** * Pre-processor Definitions @@ -43,16 +44,16 @@ /* LEDs. The S32K146EVB has one RGB LED: * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) * * An output of '1' illuminates the LED. */ -#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_B (PIN_PTE8 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_B (PIN_PTD0 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) /* Buttons. The S32K146EVB supports two buttons: * @@ -60,19 +61,13 @@ * SW3 PTC13 */ -#define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH) -#define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH) - -/* SPI chip selects */ +#define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH) +#define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH) /* Count of peripheral clock user configurations */ #define NUM_OF_PERIPHERAL_CLOCKS_0 15 -/**************************************************************************** - * Public Types - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -104,17 +99,25 @@ extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[]; int s32k1xx_bringup(void); /**************************************************************************** - * Name: s32k1xx_spidev_initialize + * Name: s32k1xx_i2cdev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the S32K146EVB - * board. + * Initialize I2C driver and register /dev/i2cN devices. * ****************************************************************************/ -#ifdef CONFIG_S32K1XX_SPI -void s32k1xx_spidev_initialize(void); -#endif +int s32k1xx_i2cdev_initialize(void); + +/**************************************************************************** + * Name: s32k1xx_spidev_initialize + * + * Description: + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. + * + ****************************************************************************/ + +int s32k1xx_spidev_initialize(void); #endif /* __ASSEMBLY__ */ #endif /* __BOARDS_ARM_S32K1XX_S32K146EVB_SRC_S32K146EVB_H */ diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_appinit.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_appinit.c index 1947aebb367..0f73f03664a 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_appinit.c +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_appinit.c @@ -23,9 +23,10 @@ ****************************************************************************/ #include - #include +#include + #include "s32k146evb.h" /**************************************************************************** @@ -50,14 +51,14 @@ * * Input Parameters: * arg - The boardctl() argument is passed to the board_app_initialize() - * implementation without modification. The argument has no - * meaning to NuttX; the meaning of the argument is a contract - * between the board-specific initialization logic and the - * matching application logic. The value could be such things as a - * mode enumeration value, a set of DIP switch switch settings, a - * pointer to configuration data read from a file or serial FLASH, - * or whatever you would like to do with it. Every implementation - * should accept zero/NULL as a default configuration. + * implementation without modification. The argument has no meaning + * to NuttX; the meaning of the argument is a contract between the + * board-specific initialization logic and the matching application + * logic. The value could be such things as a mode enumeration + * value, a set of DIP switch settings, a pointer to configuration + * data read from a file or serial FLASH, or whatever you would like + * to do with it. Every implementation should accept zero/NULL as a + * default configuration. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned on diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_autoleds.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_autoleds.c index 03decd39a7a..59498756cf8 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_autoleds.c +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_autoleds.c @@ -20,28 +20,28 @@ /* The S32K146EVB has one RGB LED: * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) * * An output of '1' illuminates the LED. * * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board - * the Freedom K66F. The following definitions describe how NuttX controls - * the LEDs: + * the S32K146EVB. The following definitions describe how NuttX controls the + * LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ----------------------- ----------------- - * LED_STARTED NuttX has been started OFF OFF OFF - * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON - * LED_IRQSENABLED Interrupts enabled OFF OFF ON - * LED_STACKCREATED Idle stack created OFF ON OFF - * LED_INIRQ In an interrupt (no change) - * LED_SIGNAL In a signal handler (no change) - * LED_ASSERTION An assertion failed (no change) - * LED_PANIC The system has crashed FLASH OFF OFF - * LED_IDLE K66 is in sleep mode (Optional, not used) + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ------------------------ -------------------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + * LED_IRQSENABLED Interrupts enabled OFF OFF ON + * LED_STACKCREATED Idle stack created OFF ON OFF + * LED_INIRQ In an interrupt (No change) + * LED_SIGNAL In a signal handler (No change) + * LED_ASSERTION An assertion failed (No change) + * LED_PANIC The system has crashed FLASH OFF OFF + * LED_IDLE S32K146 is in sleep mode (Optional, not used) */ /**************************************************************************** @@ -52,18 +52,12 @@ #include #include -#include #include -#include - -#include "arm_arch.h" -#include "arm_internal.h" #include "s32k1xx_pin.h" -#include "s32k146evb.h" -#include +#include "s32k146evb.h" #ifdef CONFIG_ARCH_LEDS @@ -73,11 +67,11 @@ /* Summary of all possible settings */ -#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ -#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ -#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ -#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ -#define LED_ON_OFF_OFF 4 /* LED_PANIC */ +#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ +#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ +#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ +#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ +#define LED_ON_OFF_OFF 4 /* LED_PANIC */ /**************************************************************************** * Public Functions @@ -127,6 +121,8 @@ void board_autoled_on(int led) break; } + /* An output of '1' illuminates the LED */ + s32k1xx_gpiowrite(GPIO_LED_R, redon); s32k1xx_gpiowrite(GPIO_LED_G, greenon); s32k1xx_gpiowrite(GPIO_LED_B, blueon); @@ -141,6 +137,8 @@ void board_autoled_off(int led) { if (led == LED_ON_OFF_OFF) { + /* An output of '1' illuminates the LED */ + s32k1xx_gpiowrite(GPIO_LED_R, true); s32k1xx_gpiowrite(GPIO_LED_G, false); s32k1xx_gpiowrite(GPIO_LED_B, false); diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_boot.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_boot.c index a9e53ba66b0..7566a50ed05 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_boot.c +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_boot.c @@ -23,9 +23,6 @@ ****************************************************************************/ #include - -#include - #include #include "s32k146evb.h" @@ -48,7 +45,7 @@ void s32k1xx_board_initialize(void) { #ifdef CONFIG_ARCH_LEDS - /* Configure on-board LEDs if LED support has been selected. */ + /* Configure on-board LEDs if LED support has been selected */ board_autoled_initialize(); #endif diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_bringup.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_bringup.c index a37f828f56d..035b56ea0db 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_bringup.c +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_bringup.c @@ -25,10 +25,9 @@ #include #include +#include #include -#include - #ifdef CONFIG_INPUT_BUTTONS # include #endif @@ -37,9 +36,12 @@ # include #endif -#ifdef CONFIG_I2C_DRIVER -# include -# include "s32k1xx_lpi2c.h" +#ifdef CONFIG_FS_PROCFS +# include +#endif + +#ifdef CONFIG_S32K1XX_PROGMEM +# include #endif #ifdef CONFIG_S32K1XX_EEEPROM @@ -100,48 +102,46 @@ int s32k1xx_bringup(void) } #endif -#ifdef CONFIG_S32K1XX_LPSPI - /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak - * function s32k1xx_spidev_initialize() has been brought into the link. - */ - - s32k1xx_spidev_initialize(); -#endif - -#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER) - FAR struct i2c_master_s *i2c; - - i2c = s32k1xx_i2cbus_initialize(0); - if (i2c == NULL) - { - serr("ERROR: Failed to get I2C%d interface\n", bus); - } - else - { - ret = i2c_register(i2c, 0); - if (ret < 0) - { - serr("ERROR: Failed to register I2C%d driver: %d\n", bus, ret); - s32k1xx_i2cbus_uninitialize(i2c); - } - } -#endif - #ifdef CONFIG_S32K1XX_PROGMEM FAR struct mtd_dev_s *mtd; - int minor = 0; mtd = progmem_initialize(); - if (!mtd) + if (mtd == NULL) { - syslog(LOG_ERR, "ERROR: progmem_initialize failed\n"); + syslog(LOG_ERR, "ERROR: progmem_initialize() failed\n"); } #endif #ifdef CONFIG_S32K1XX_EEEPROM /* Register EEEPROM block device */ - s32k1xx_eeeprom_register(0, 4096); + ret = s32k1xx_eeeprom_register(0, 4096); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_eeeprom_register() failed\n"); + } +#endif + +#ifdef CONFIG_S32K1XX_LPI2C + /* Initialize I2C driver */ + + ret = s32k1xx_i2cdev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_i2cdev_initialize() failed: %d\n", + ret); + } +#endif + +#ifdef CONFIG_S32K1XX_LPSPI + /* Initialize SPI driver */ + + ret = s32k1xx_spidev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_spidev_initialize() failed: %d\n", + ret); + } #endif return ret; diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_buttons.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_buttons.c index cfc2fae29a4..a2eaaf1eee3 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_buttons.c +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_buttons.c @@ -33,14 +33,14 @@ #include #include -#include #include #include "s32k1xx_pin.h" -#include "s32k146evb.h" #include +#include "s32k146evb.h" + #ifdef CONFIG_ARCH_BUTTONS /**************************************************************************** @@ -60,10 +60,11 @@ uint32_t board_button_initialize(void) { - /* Configure the GPIO pins as interrupting inputs. */ + /* Configure the GPIO pins as interrupting inputs */ s32k1xx_pinconfig(GPIO_SW2); s32k1xx_pinconfig(GPIO_SW3); + return NUM_BUTTONS; } @@ -88,6 +89,7 @@ uint32_t board_buttons(void) return ret; } +#ifdef CONFIG_ARCH_IRQBUTTONS /**************************************************************************** * Button support. * @@ -103,20 +105,19 @@ uint32_t board_buttons(void) * BUTTON_*_BIT definitions in board.h for the meaning of each bit. * * board_button_irq() may be called to register an interrupt handler that - * will be called when a button is depressed or released. The ID value is - * a button enumeration value that uniquely identifies a button resource. + * will be called when a button is pressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. * See the BUTTON_* definitions in board.h for the meaning of enumeration * value. * ****************************************************************************/ -#ifdef CONFIG_ARCH_IRQBUTTONS int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) { uint32_t pinset; int ret; - /* Map the button id to the GPIO bit set. */ + /* Map the button id to the GPIO bit set */ if (id == BUTTON_SW2) { @@ -147,5 +148,5 @@ int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) return ret; } -#endif +#endif /* CONFIG_ARCH_IRQBUTTONS */ #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_clockconfig.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_clockconfig.c index 3481093108c..753ff98753f 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_clockconfig.c +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_clockconfig.c @@ -58,11 +58,9 @@ #include -#include -#include - #include "s32k1xx_clockconfig.h" #include "s32k1xx_start.h" + #include "s32k146evb.h" /**************************************************************************** diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_i2c.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_i2c.c new file mode 100644 index 00000000000..3bd9bdf4d89 --- /dev/null +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_i2c.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * boards/arm/s32k1xx/s32k146evb/src/s32k1xx_i2c.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include + +#include + +#include "s32k1xx_lpi2c.h" + +#include "s32k146evb.h" + +#ifdef CONFIG_S32K1XX_LPI2C + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_i2cdev_initialize + * + * Description: + * Initialize I2C driver and register /dev/i2cN devices. + * + ****************************************************************************/ + +int weak_function s32k1xx_i2cdev_initialize(void) +{ + int ret = OK; + +#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER) + /* LPI2C0 *****************************************************************/ + + /* Initialize the I2C driver for LPI2C0 */ + + struct i2c_master_s *lpi2c0 = s32k1xx_i2cbus_initialize(0); + if (lpi2c0 == NULL) + { + i2cerr("ERROR: FAILED to initialize LPI2C0\n"); + return -ENODEV; + } + + ret = i2c_register(lpi2c0, 0); + if (ret < 0) + { + i2cerr("ERROR: FAILED to register LPI2C0 driver\n"); + s32k1xx_i2cbus_uninitialize(lpi2c0); + return ret; + } +#endif /* CONFIG_S32K1XX_LPI2C0 && CONFIG_I2C_DRIVER */ + + return ret; +} + +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_periphclocks.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_periphclocks.c index 685fb838ddd..ab4ca867f5b 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_periphclocks.c +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_periphclocks.c @@ -58,7 +58,9 @@ #include +#include "s32k14x/s32k14x_clocknames.h" #include "s32k1xx_periphclocks.h" + #include "s32k146evb.h" /**************************************************************************** @@ -73,7 +75,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = { { .clkname = FLEXCAN0_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN0 .clkgate = true, #else .clkgate = false, @@ -81,7 +83,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = }, { .clkname = FLEXCAN1_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN1 .clkgate = true, #else .clkgate = false, @@ -89,7 +91,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = }, { .clkname = FLEXCAN2_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN2 .clkgate = true, #else .clkgate = false, diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_spi.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_spi.c index 109b4a970c5..d19a06d09d2 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_spi.c +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_spi.c @@ -23,7 +23,9 @@ ****************************************************************************/ #include +#include +#include #include #include #include @@ -31,17 +33,15 @@ #include #include + +#include "s32k1xx_pin.h" +#include "s32k1xx_lpspi.h" + #include -#include "arm_arch.h" - -#include "s32k1xx_config.h" -#include "s32k1xx_lpspi.h" -#include "s32k1xx_pin.h" #include "s32k146evb.h" -#if defined(CONFIG_S32K1XX_LPSPI0) || defined(CONFIG_S32K1XX_LPSPI1) || \ - defined(CONFIG_S32K1XX_LPSPI2) +#ifdef CONFIG_S32K1XX_LPSPI /**************************************************************************** * Public Functions @@ -51,80 +51,115 @@ * Name: s32k1xx_spidev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the S32K144EVB board. + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. * ****************************************************************************/ -void weak_function s32k1xx_spidev_initialize(void) +int weak_function s32k1xx_spidev_initialize(void) { + int ret = OK; + #ifdef CONFIG_S32K1XX_LPSPI0 + /* LPSPI0 *****************************************************************/ + + /* Configure LPSPI0 peripheral chip select */ + s32k1xx_pinconfig(PIN_LPSPI0_PCS); -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi0; - g_lpspi0 = s32k1xx_lpspibus_initialize(0); +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI0 */ - if (!g_lpspi0) + struct spi_dev_s *g_lpspi0 = s32k1xx_lpspibus_initialize(0); + if (g_lpspi0 == NULL) { - spierr("ERROR: [boot] FAILED to initialize LPSPI0\n"); + spierr("ERROR: FAILED to initialize LPSPI0\n"); + return -ENODEV; } - spi_register(g_lpspi0, 0); -#endif -#endif + ret = spi_register(g_lpspi0, 0); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI0 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI0 */ #ifdef CONFIG_S32K1XX_LPSPI1 + /* LPSPI1 *****************************************************************/ + + /* Configure LPSPI1 peripheral chip select */ + s32k1xx_pinconfig(PIN_LPSPI1_PCS); -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi1; - g_lpspi1 = s32k1xx_lpspibus_initialize(1); +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI1 */ - if (!g_lpspi1) + struct spi_dev_s *g_lpspi1 = s32k1xx_lpspibus_initialize(1); + if (g_lpspi1 == NULL) { - spierr("ERROR: [boot] FAILED to initialize LPSPI1\n"); + spierr("ERROR: FAILED to initialize LPSPI1\n"); + return -ENODEV; } - spi_register(g_lpspi1, 1); -#endif -#endif + ret = spi_register(g_lpspi1, 1); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI1 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI1 */ #ifdef CONFIG_S32K1XX_LPSPI2 + /* LPSPI2 *****************************************************************/ + + /* Configure LPSPI2 peripheral chip select */ + s32k1xx_pinconfig(PIN_LPSPI2_PCS); -#ifdef CONFIG_SPI_DRIVER - struct spi_dev_s *g_lpspi2; - g_lpspi2 = s32k1xx_lpspibus_initialize(2); +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI2 */ - if (!g_lpspi2) + struct spi_dev_s *g_lpspi2 = s32k1xx_lpspibus_initialize(2); + if (g_lpspi2 == NULL) { - spierr("ERROR: [boot] FAILED to initialize LPSPI2\n"); + spierr("ERROR: FAILED to initialize LPSPI2\n"); + return -ENODEV; } - spi_register(g_lpspi2, 2); -#endif -#endif + ret = spi_register(g_lpspi2, 2); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI2 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI2 */ + + return ret; } /**************************************************************************** - * Name: s32k1xx_lpspi0/1/2select and s32k1xx_lpspi0/1/2status + * Name: s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus * * Description: - * The external functions, s32k1xx_lpspi0/1/2select and - * s32k1xx_lpspi0/1/2status must be provided by board-specific logic. - * They are implementations of the select and status methods of the SPI - * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). - * All other methods (including s32k1xx_lpspibus_initialize()) are provided - * by common logic. To use this common SPI logic on your board: + * The external functions, s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * s32k1xx_lpspibus_initialize()) are provided by common logic. To use + * this common SPI logic on your board: * * 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip * select pins. - * 2. Provide s32k1xx_lpspi0/1/2select() and s32k1xx_lpspi0/1/2status() - * functions in your board-specific logic. These functions will perform - * chip selection and status operations using GPIOs in the way your - * board is configured. + * 2. Provide s32k1xx_lpspiNselect() and s32k1xx_lpspiNstatus() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board is + * configured. * 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level - * application initialization logic + * application initialization logic. * 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used * to bind the SPI driver to higher level logic (e.g., calling * mmcsd_spislotinitialize(), for example, will bind the SPI driver to @@ -133,10 +168,12 @@ void weak_function s32k1xx_spidev_initialize(void) ****************************************************************************/ #ifdef CONFIG_S32K1XX_LPSPI0 +/* LPSPI0 *******************************************************************/ + void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid, - bool selected) + bool selected) { - spiinfo("devid: %d CS: %s\n", (int)devid, + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, selected ? "assert" : "de-assert"); s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected); @@ -146,13 +183,15 @@ uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid) { return 0; } -#endif +#endif /* CONFIG_S32K1XX_LPSPI0 */ #ifdef CONFIG_S32K1XX_LPSPI1 -void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, - uint32_t devid, bool selected) +/* LPSPI1 *******************************************************************/ + +void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) { - spiinfo("devid: %d CS: %s\n", (int)devid, + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, selected ? "assert" : "de-assert"); s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected); @@ -162,14 +201,16 @@ uint8_t s32k1xx_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid) { return 0; } -#endif +#endif /* CONFIG_S32K1XX_LPSPI1 */ #ifdef CONFIG_S32K1XX_LPSPI2 -void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, - uint32_t devid, bool selected) +/* LPSPI2 *******************************************************************/ + +void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) { - spiinfo("devid: %d CS: %s\n", (int)devid, - selected ? "assert" : "de-assert"); + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, + selected ? "assert" : "de-assert"); s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected); } @@ -178,6 +219,5 @@ uint8_t s32k1xx_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid) { return 0; } -#endif - -#endif /* CONFIG_S32K1XX_LPSPI0 || CONFIG_S32K1XX_LPSPI01 || CONFIG_S32K1XX_LPSPI2 */ +#endif /* CONFIG_S32K1XX_LPSPI2 */ +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_userleds.c b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_userleds.c index 719330fbced..dc3ad523147 100644 --- a/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_userleds.c +++ b/boards/arm/s32k1xx/s32k146evb/src/s32k1xx_userleds.c @@ -26,18 +26,15 @@ #include #include -#include #include -#include "arm_arch.h" -#include "arm_internal.h" - #include "s32k1xx_pin.h" -#include "s32k146evb.h" #include +#include "s32k146evb.h" + #ifndef CONFIG_ARCH_LEDS /**************************************************************************** @@ -55,6 +52,7 @@ uint32_t board_userled_initialize(void) s32k1xx_pinconfig(GPIO_LED_R); s32k1xx_pinconfig(GPIO_LED_G); s32k1xx_pinconfig(GPIO_LED_B); + return BOARD_NLEDS; } @@ -83,7 +81,9 @@ void board_userled(int led, bool ledon) return; } - s32k1xx_gpiowrite(ledcfg, ledon); /* High illuminates */ + /* An output of '1' illuminates the LED */ + + s32k1xx_gpiowrite(ledcfg, ledon); } /**************************************************************************** @@ -92,7 +92,7 @@ void board_userled(int led, bool ledon) void board_userled_all(uint32_t ledset) { - /* Low illuminates */ + /* An output of '1' illuminates the LED */ s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0); s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0); diff --git a/boards/arm/s32k1xx/s32k148evb/README.txt b/boards/arm/s32k1xx/s32k148evb/README.txt index 4052018cd45..7a713875e14 100644 --- a/boards/arm/s32k1xx/s32k148evb/README.txt +++ b/boards/arm/s32k1xx/s32k148evb/README.txt @@ -1,7 +1,7 @@ README ====== -This directory hold the port to the NXP S32K148EVB-Q176 Development board. +This directory holds the port to the NXP S32K148EVB-Q176 development board. Contents ======== @@ -16,9 +16,17 @@ Status ====== 2019-08-20: NSH configuration created but entirely untested. + 2019-08-24: NSH configuration verified running from FLASH. - TODO: Need calibrate the delay loop. The current value of + 2019-10-19: FLASH configuration options were added. + + 2020-06-15: Added FlexCAN driver with SocketCAN support to the S32K1XX + arch. This feature been tested extensively with the S32K148EVB. + + 2020-06-16: Added Emulated EEPROM driver and initialization. + + TODO: Need to calibrate the delay loop. The current value of CONFIG_BOARD_LOOPSPERMSEC is a bogus value retained from a copy-paste (see apps/examples/calib_udelay). @@ -30,7 +38,7 @@ Serial Console OpenSDA UART TX PTC7 (LPUART1_TX) OpenSDA UART RX PTC6 (LPUART1_RX) - USB drivers for the PEMIcro CDC Serial port are available here: + USB drivers for the PEmicro CDC Serial Port are available here: http://www.pemicro.com/opensda/ LEDs and Buttons @@ -40,17 +48,21 @@ LEDs and Buttons ---- The S32K148EVB has one RGB LED: - RedLED PTE21 - GreenLED PTE22 - BlueLED PTE23 + RedLED PTE21 (FTM4 CH1) + GreenLED PTE22 (FTM4 CH2) + BlueLED PTE23 (FTM4 CH3) An output of '1' illuminates the LED. If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. The following definitions are used to access individual RGB - components. + components (see s32k148evb.h): - The RGB components could, alternatively be controlled through PWM using + GPIO_LED_R + GPIO_LED_G + GPIO_LED_B + + The RGB components could, alternatively, be controlled through PWM using the common RGB LED driver. If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board @@ -69,7 +81,7 @@ LEDs and Buttons LED_SIGNAL In a signal handler (no change) LED_ASSERTION An assertion failed (no change) LED_PANIC The system has crashed FLASH OFF OFF - LED_IDLE S32K148EVB in sleep mode (no change) + LED_IDLE S32K148 in sleep mode (no change) ==========================================+========+========+========= Buttons @@ -82,34 +94,34 @@ LEDs and Buttons OpenSDA Notes ============= - - USB drivers for the PEMIcro CDC Serial port are available here: + - USB drivers for the PEmicro CDC Serial Port are available here: http://www.pemicro.com/opensda/ - The drag'n'drog interface expects files in .srec format. - - Using Segger J-Link: Easy... but remember to use the 20-pin SWD J10 - connector near the Ethernet connector and not J20 the 10-bit OpenSDA - connector closer to the OpenSDA USB connector J24. + - Using Segger J-Link: Easy... but remember to use the 20-pin SWD + connector J10 near the ethernet connector and not the 10-pin OpenSDA + connector J20 closer to the OpenSDA USB connector J24. Configurations ============== Common Information ------------------ - Each S32K148EVB configuration is maintained in a sub-directory and - can be selected as follow: + Each S32K148EVB configuration is maintained in a sub-directory and can be + selected as follows: tools/configure.sh s32k148evb: - Where is one of the sub-directories listed in the next paragraph + Where is one of the sub-directories listed in the next paragraph. NOTES (common for all configurations): - 1. This configuration uses the mconf-based configuration tool. To - change this configuration using that tool, you should: + 1. This configuration uses the mconf-based configuration tool. To change + this configuration using that tool, you should: - a. Build and install the kconfig-mconf tool. See nuttx/README.txt - see additional README.txt files in the NuttX tools repository. + a. Build and install the kconfig-mconf tool. See nuttx/README.txt. + Also see additional README.txt files in the NuttX tools repository. b. Execute 'make menuconfig' in nuttx/ in order to start the reconfiguration process. @@ -123,5 +135,5 @@ Configurations nsh: --- Configures the NuttShell (nsh) located at apps/examples/nsh. Support - for builtin applications is enabled, but in the base configuration but - the builtin applications selected is the "Hello, World!" example. + for builtin applications is enabled, but in the base configuration the + only application selected is the "Hello, World!" example. diff --git a/boards/arm/s32k1xx/s32k148evb/configs/nsh/defconfig b/boards/arm/s32k1xx/s32k148evb/configs/nsh/defconfig index 9637952298d..86dea793f17 100644 --- a/boards/arm/s32k1xx/s32k148evb/configs/nsh/defconfig +++ b/boards/arm/s32k1xx/s32k148evb/configs/nsh/defconfig @@ -17,15 +17,13 @@ CONFIG_ARCH_CHIP_S32K148=y CONFIG_ARCH_CHIP_S32K14X=y CONFIG_ARCH_CHIP_S32K1XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_BOARD_LOOPSPERMSEC=2988 +CONFIG_BOARD_LOOPSPERMSEC=6667 CONFIG_BUILTIN=y CONFIG_EXAMPLES_HELLO=y CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y -CONFIG_LPUART1_RXBUFSIZE=64 CONFIG_LPUART1_SERIAL_CONSOLE=y -CONFIG_LPUART1_TXBUFSIZE=64 CONFIG_MOTOROLA_SREC=y CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y @@ -34,14 +32,14 @@ CONFIG_NSH_READLINE=y CONFIG_PREALLOC_TIMERS=4 CONFIG_RAM_SIZE=258048 CONFIG_RAM_START=0x1ffe0000 +CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_S32K1XX_LPUART1=y CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y -CONFIG_START_DAY=18 -CONFIG_START_MONTH=8 -CONFIG_START_YEAR=2019 -CONFIG_STDIO_DISABLE_BUFFERING=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2021 CONFIG_SYMTAB_ORDEREDBYNAME=y CONFIG_SYSTEM_NSH=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/s32k1xx/s32k148evb/include/board.h b/boards/arm/s32k1xx/s32k148evb/include/board.h index f01f789ad0d..d7478b4d6cd 100644 --- a/boards/arm/s32k1xx/s32k148evb/include/board.h +++ b/boards/arm/s32k1xx/s32k148evb/include/board.h @@ -18,8 +18,8 @@ * ****************************************************************************/ -#ifndef __BOARDS_ARM_S32K148EVB_INCLUDE_BOARD_H -#define __BOARDS_ARM_S32K148EVB_INCLUDE_BOARD_H +#ifndef __BOARDS_ARM_S32K1XX_S32K148EVB_INCLUDE_BOARD_H +#define __BOARDS_ARM_S32K1XX_S32K148EVB_INCLUDE_BOARD_H /**************************************************************************** * Included Files @@ -27,30 +27,25 @@ #include -#ifndef __ASSEMBLY__ -# include -# include -#endif - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /* Clocking *****************************************************************/ -/* The S32K148EVB is fitted with a 8MHz Crystal */ +/* The S32K148EVB is fitted with a 8 MHz crystal */ -#define BOARD_XTAL_FREQUENCY 8000000 +#define BOARD_XTAL_FREQUENCY 8000000 -/* The S32K148 will run at 112MHz */ +/* The S32K148 will run at 80 MHz */ /* LED definitions **********************************************************/ /* The S32K148EVB has one RGB LED: * - * RedLED PTE21 - * GreenLED PTE22 - * BlueLED PTE23 + * RedLED PTE21 (FTM4 CH1) + * GreenLED PTE22 (FTM4 CH2) + * BlueLED PTE23 (FTM4 CH3) * * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in * any way. The following definitions are used to access individual RGB @@ -77,20 +72,20 @@ * the S32K148EVB. The following definitions describe how NuttX controls the * LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ---------------------------- ----------------- + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ----------------------------- ------------------- */ -#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ -#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ -#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ -#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ -#define LED_INIRQ 0 /* In an interrupt (no change) */ -#define LED_SIGNAL 0 /* In a signal handler (no change) */ -#define LED_ASSERTION 0 /* An assertion failed (no change) */ -#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ -#undef LED_IDLE /* S32K148EVB in sleep mode (Not used) */ +#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ +#define LED_INIRQ 0 /* In an interrupt (No change) */ +#define LED_SIGNAL 0 /* In a signal handler (No change) */ +#define LED_ASSERTION 0 /* An assertion failed (No change) */ +#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ +#undef LED_IDLE /* S32K148 is in sleep mode (Not used) */ /* Button definitions *******************************************************/ @@ -107,23 +102,31 @@ #define BUTTON_SW3_BIT (1 << BUTTON_SW3) #define BUTTON_SW4_BIT (1 << BUTTON_SW4) -/* Alternate function pin selections ****************************************/ +/* UART selections **********************************************************/ /* By default, the serial console will be provided on the OpenSDA VCOM port: * - * OpenSDA UART TX PTC7 (LPUART1_TX) - * OpenSDA UART RX PTC6 (LPUART1_RX) + * OpenSDA UART RX PTC6 (LPUART1_RX) + * OpenSDA UART TX PTC7 (LPUART1_TX) */ -#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ -#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ +#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ +#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ + +/* SPI selections ***********************************************************/ + +/* UJA1132HW SBC SPI (LPSPI1) */ + +#define PIN_LPSPI1_PCS PIN_LPSPI1_PCS0_1 /* PTA26 */ +#define PIN_LPSPI1_MISO PIN_LPSPI1_SOUT_1 /* PTA27 */ +#define PIN_LPSPI1_SCK PIN_LPSPI1_SCK_1 /* PTA28 */ +#define PIN_LPSPI1_MOSI PIN_LPSPI1_SIN_4 /* PTA29 */ /* CAN selections ***********************************************************/ -#define PIN_CAN0_TX PIN_CAN0_TX_1 -#define PIN_CAN0_RX PIN_CAN0_RX_1 -#define PIN_CAN1_TX PIN_CAN1_TX_1 -#define PIN_CAN1_RX PIN_CAN1_RX_1 -#define PIN_CAN2_TX PIN_CAN2_TX_1 -#define PIN_CAN2_RX PIN_CAN2_RX_1 -#endif /* __BOARDS_ARM_S32K148EVB_INCLUDE_BOARD_H */ +/* UJA1132HW SBC CAN (CAN0) */ + +#define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */ +#define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */ + +#endif /* __BOARDS_ARM_S32K1XX_S32K148EVB_INCLUDE_BOARD_H */ diff --git a/boards/arm/s32k1xx/s32k148evb/scripts/Make.defs b/boards/arm/s32k1xx/s32k148evb/scripts/Make.defs index b16c2b0a0e3..3a9fc65122b 100644 --- a/boards/arm/s32k1xx/s32k148evb/scripts/Make.defs +++ b/boards/arm/s32k1xx/s32k148evb/scripts/Make.defs @@ -58,13 +58,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/s32k1xx/s32k148evb/src/Makefile b/boards/arm/s32k1xx/s32k148evb/src/Makefile index fbfba905a54..54f9423ac51 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/Makefile +++ b/boards/arm/s32k1xx/s32k148evb/src/Makefile @@ -23,18 +23,26 @@ include $(TOPDIR)/Make.defs CSRCS = s32k1xx_boot.c s32k1xx_bringup.c s32k1xx_clockconfig.c CSRCS += s32k1xx_periphclocks.c +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += s32k1xx_buttons.c +endif + ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += s32k1xx_autoleds.c else CSRCS += s32k1xx_userleds.c endif -ifeq ($(CONFIG_ARCH_BUTTONS),y) -CSRCS += s32k1xx_buttons.c -endif - ifeq ($(CONFIG_BOARDCTL),y) CSRCS += s32k1xx_appinit.c endif +ifeq ($(CONFIG_S32K1XX_LPI2C),y) +CSRCS += s32k1xx_i2c.c +endif + +ifeq ($(CONFIG_S32K1XX_LPSPI),y) +CSRCS += s32k1xx_spi.c +endif + include $(TOPDIR)/boards/Board.mk diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k148evb.h b/boards/arm/s32k1xx/s32k148evb/src/s32k148evb.h index 6ec7aaf99d8..d99b89de370 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/s32k148evb.h +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k148evb.h @@ -32,6 +32,7 @@ #include "hardware/s32k1xx_pinmux.h" #include "s32k1xx_periphclocks.h" +#include "s32k1xx_pin.h" /**************************************************************************** * Pre-processor Definitions @@ -43,16 +44,16 @@ /* LEDs. The S32K148EVB has one RGB LED: * - * RedLED PTE21 - * GreenLED PTE22 - * BlueLED PTE23 + * RedLED PTE21 (FTM4 CH1) + * GreenLED PTE22 (FTM4 CH2) + * BlueLED PTE23 (FTM4 CH3) * * An output of '1' illuminates the LED. */ -#define GPIO_LED_R (PIN_PTE21 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_G (PIN_PTE22 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_B (PIN_PTE23 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_R (PIN_PTE21 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_G (PIN_PTE22 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_B (PIN_PTE23 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) /* Buttons. The S32K148EVB supports two buttons: * @@ -60,19 +61,13 @@ * SW4 PTC13 */ -#define GPIO_SW3 (PIN_PTC12 | PIN_INT_BOTH) -#define GPIO_SW4 (PIN_PTC13 | PIN_INT_BOTH) - -/* SPI chip selects */ +#define GPIO_SW3 (PIN_PTC12 | PIN_INT_BOTH) +#define GPIO_SW4 (PIN_PTC13 | PIN_INT_BOTH) /* Count of peripheral clock user configurations */ #define NUM_OF_PERIPHERAL_CLOCKS_0 18 -/**************************************************************************** - * Public Types - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -104,17 +99,25 @@ extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[]; int s32k1xx_bringup(void); /**************************************************************************** - * Name: s32k1xx_spidev_initialize + * Name: s32k1xx_i2cdev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the S32K148EVB - * board. + * Initialize I2C driver and register /dev/i2cN devices. * ****************************************************************************/ -#ifdef CONFIG_S32K1XX_SPI -void s32k1xx_spidev_initialize(void); -#endif +int s32k1xx_i2cdev_initialize(void); + +/**************************************************************************** + * Name: s32k1xx_spidev_initialize + * + * Description: + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. + * + ****************************************************************************/ + +int s32k1xx_spidev_initialize(void); #endif /* __ASSEMBLY__ */ #endif /* __BOARDS_ARM_S32K1XX_S32K148EVB_SRC_S32K148EVB_H */ diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_appinit.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_appinit.c index 6104ecd5be0..59998634c1d 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_appinit.c +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_appinit.c @@ -23,9 +23,10 @@ ****************************************************************************/ #include - #include +#include + #include "s32k148evb.h" /**************************************************************************** @@ -50,14 +51,14 @@ * * Input Parameters: * arg - The boardctl() argument is passed to the board_app_initialize() - * implementation without modification. The argument has no - * meaning to NuttX; the meaning of the argument is a contract - * between the board-specific initialization logic and the - * matching application logic. The value could be such things as a - * mode enumeration value, a set of DIP switch switch settings, a - * pointer to configuration data read from a file or serial FLASH, - * or whatever you would like to do with it. Every implementation - * should accept zero/NULL as a default configuration. + * implementation without modification. The argument has no meaning + * to NuttX; the meaning of the argument is a contract between the + * board-specific initialization logic and the matching application + * logic. The value could be such things as a mode enumeration + * value, a set of DIP switch settings, a pointer to configuration + * data read from a file or serial FLASH, or whatever you would like + * to do with it. Every implementation should accept zero/NULL as a + * default configuration. * * Returned Value: * Zero (OK) is returned on success; a negated errno value is returned on diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_autoleds.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_autoleds.c index 1e33994e7f0..03cbae44686 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_autoleds.c +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_autoleds.c @@ -20,28 +20,28 @@ /* The S32K148EVB has one RGB LED: * - * RedLED PTE21 - * GreenLED PTE22 - * BlueLED PTE23 + * RedLED PTE21 (FTM4 CH1) + * GreenLED PTE22 (FTM4 CH2) + * BlueLED PTE23 (FTM4 CH3) * * An output of '1' illuminates the LED. * * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board - * the Freedom K66F. The following definitions describe how NuttX controls - * the LEDs: + * the S32K148EVB. The following definitions describe how NuttX controls the + * LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ----------------------- ----------------- - * LED_STARTED NuttX has been started OFF OFF OFF - * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON - * LED_IRQSENABLED Interrupts enabled OFF OFF ON - * LED_STACKCREATED Idle stack created OFF ON OFF - * LED_INIRQ In an interrupt (no change) - * LED_SIGNAL In a signal handler (no change) - * LED_ASSERTION An assertion failed (no change) - * LED_PANIC The system has crashed FLASH OFF OFF - * LED_IDLE K66 is in sleep mode (Optional, not used) + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ------------------------ -------------------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + * LED_IRQSENABLED Interrupts enabled OFF OFF ON + * LED_STACKCREATED Idle stack created OFF ON OFF + * LED_INIRQ In an interrupt (No change) + * LED_SIGNAL In a signal handler (No change) + * LED_ASSERTION An assertion failed (No change) + * LED_PANIC The system has crashed FLASH OFF OFF + * LED_IDLE S32K148 is in sleep mode (Optional, not used) */ /**************************************************************************** @@ -52,18 +52,12 @@ #include #include -#include #include -#include - -#include "arm_arch.h" -#include "arm_internal.h" #include "s32k1xx_pin.h" -#include "s32k148evb.h" -#include +#include "s32k148evb.h" #ifdef CONFIG_ARCH_LEDS @@ -73,11 +67,11 @@ /* Summary of all possible settings */ -#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ -#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ -#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ -#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ -#define LED_ON_OFF_OFF 4 /* LED_PANIC */ +#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ +#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ +#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ +#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ +#define LED_ON_OFF_OFF 4 /* LED_PANIC */ /**************************************************************************** * Public Functions @@ -127,6 +121,8 @@ void board_autoled_on(int led) break; } + /* An output of '1' illuminates the LED */ + s32k1xx_gpiowrite(GPIO_LED_R, redon); s32k1xx_gpiowrite(GPIO_LED_G, greenon); s32k1xx_gpiowrite(GPIO_LED_B, blueon); @@ -141,6 +137,8 @@ void board_autoled_off(int led) { if (led == LED_ON_OFF_OFF) { + /* An output of '1' illuminates the LED */ + s32k1xx_gpiowrite(GPIO_LED_R, true); s32k1xx_gpiowrite(GPIO_LED_G, false); s32k1xx_gpiowrite(GPIO_LED_B, false); diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_boot.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_boot.c index a85a397c2be..335cbd9f4d1 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_boot.c +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_boot.c @@ -23,9 +23,6 @@ ****************************************************************************/ #include - -#include - #include #include "s32k148evb.h" @@ -47,16 +44,8 @@ void s32k1xx_board_initialize(void) { -#ifdef CONFIG_S32K1XX_SPI - /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak - * function s32k1xx_spidev_initialize() has been brought into the link. - */ - - s32k1xx_spidev_initialize(); -#endif - #ifdef CONFIG_ARCH_LEDS - /* Configure on-board LEDs if LED support has been selected. */ + /* Configure on-board LEDs if LED support has been selected */ board_autoled_initialize(); #endif diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_bringup.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_bringup.c index 9dda898183b..f60a4b600a6 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_bringup.c +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_bringup.c @@ -25,10 +25,9 @@ #include #include +#include #include -#include - #ifdef CONFIG_INPUT_BUTTONS # include #endif @@ -37,10 +36,22 @@ # include #endif +#ifdef CONFIG_FS_PROCFS +# include +#endif + +#ifdef CONFIG_S32K1XX_PROGMEM +# include +#endif + #ifdef CONFIG_S32K1XX_EEEPROM # include "s32k1xx_eeeprom.h" #endif +#ifdef CONFIG_S32K1XX_ENET +# include "s32k1xx_enet.h" +#endif + #ifdef CONFIG_S32K1XX_FLEXCAN # include "s32k1xx_flexcan.h" #endif @@ -99,10 +110,46 @@ int s32k1xx_bringup(void) } #endif +#ifdef CONFIG_S32K1XX_PROGMEM + FAR struct mtd_dev_s *mtd; + + mtd = progmem_initialize(); + if (mtd == NULL) + { + syslog(LOG_ERR, "ERROR: progmem_initialize() failed\n"); + } +#endif + #ifdef CONFIG_S32K1XX_EEEPROM /* Register EEEPROM block device */ - s32k1xx_eeeprom_register(0, 4096); + ret = s32k1xx_eeeprom_register(0, 4096); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_eeeprom_register() failed\n"); + } +#endif + +#ifdef CONFIG_S32K1XX_LPI2C + /* Initialize I2C driver */ + + ret = s32k1xx_i2cdev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_i2cdev_initialize() failed: %d\n", + ret); + } +#endif + +#ifdef CONFIG_S32K1XX_LPSPI + /* Initialize SPI driver */ + + ret = s32k1xx_spidev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_spidev_initialize() failed: %d\n", + ret); + } #endif #ifdef CONFIG_NETDEV_LATEINIT diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_buttons.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_buttons.c index efb87123dc9..0c03d7b0466 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_buttons.c +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_buttons.c @@ -33,14 +33,14 @@ #include #include -#include #include #include "s32k1xx_pin.h" -#include "s32k148evb.h" #include +#include "s32k148evb.h" + #ifdef CONFIG_ARCH_BUTTONS /**************************************************************************** @@ -58,12 +58,13 @@ * ****************************************************************************/ -uin32_t board_button_initialize(void) +uint32_t board_button_initialize(void) { - /* Configure the GPIO pins as interrupting inputs. */ + /* Configure the GPIO pins as interrupting inputs */ s32k1xx_pinconfig(GPIO_SW3); s32k1xx_pinconfig(GPIO_SW4); + return NUM_BUTTONS; } @@ -88,6 +89,7 @@ uint32_t board_buttons(void) return ret; } +#ifdef CONFIG_ARCH_IRQBUTTONS /**************************************************************************** * Button support. * @@ -103,20 +105,19 @@ uint32_t board_buttons(void) * BUTTON_*_BIT definitions in board.h for the meaning of each bit. * * board_button_irq() may be called to register an interrupt handler that - * will be called when a button is depressed or released. The ID value is - * a button enumeration value that uniquely identifies a button resource. + * will be called when a button is pressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. * See the BUTTON_* definitions in board.h for the meaning of enumeration * value. * ****************************************************************************/ -#ifdef CONFIG_ARCH_IRQBUTTONS int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) { uint32_t pinset; int ret; - /* Map the button id to the GPIO bit set. */ + /* Map the button id to the GPIO bit set */ if (id == BUTTON_SW3) { @@ -147,5 +148,5 @@ int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) return ret; } -#endif +#endif /* CONFIG_ARCH_IRQBUTTONS */ #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_clockconfig.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_clockconfig.c index ac597ce531f..a11e33ae3d0 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_clockconfig.c +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_clockconfig.c @@ -58,11 +58,9 @@ #include -#include -#include - #include "s32k1xx_clockconfig.h" #include "s32k1xx_start.h" + #include "s32k148evb.h" /**************************************************************************** diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_i2c.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_i2c.c new file mode 100644 index 00000000000..ef7c7c848b2 --- /dev/null +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_i2c.c @@ -0,0 +1,102 @@ +/**************************************************************************** + * boards/arm/s32k1xx/s32k148evb/src/s32k1xx_i2c.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include + +#include + +#include "s32k1xx_lpi2c.h" + +#include "s32k148evb.h" + +#ifdef CONFIG_S32K1XX_LPI2C + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_i2cdev_initialize + * + * Description: + * Initialize I2C driver and register /dev/i2cN devices. + * + ****************************************************************************/ + +int weak_function s32k1xx_i2cdev_initialize(void) +{ + int ret = OK; + +#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER) + /* LPI2C0 *****************************************************************/ + + /* Initialize the I2C driver for LPI2C0 */ + + struct i2c_master_s *lpi2c0 = s32k1xx_i2cbus_initialize(0); + if (lpi2c0 == NULL) + { + i2cerr("ERROR: FAILED to initialize LPI2C0\n"); + return -ENODEV; + } + + ret = i2c_register(lpi2c0, 0); + if (ret < 0) + { + i2cerr("ERROR: FAILED to register LPI2C0 driver\n"); + s32k1xx_i2cbus_uninitialize(lpi2c0); + return ret; + } +#endif /* CONFIG_S32K1XX_LPI2C0 && CONFIG_I2C_DRIVER */ + +#if defined(CONFIG_S32K1XX_LPI2C1) && defined(CONFIG_I2C_DRIVER) + /* LPI2C1 *****************************************************************/ + + /* Initialize the I2C driver for LPI2C1 */ + + struct i2c_master_s *lpi2c1 = s32k1xx_i2cbus_initialize(1); + if (lpi2c1 == NULL) + { + i2cerr("ERROR: FAILED to initialize LPI2C1\n"); + return -ENODEV; + } + + ret = i2c_register(lpi2c1, 1); + if (ret < 0) + { + i2cerr("ERROR: FAILED to register LPI2C1 driver\n"); + s32k1xx_i2cbus_uninitialize(lpi2c1); + return ret; + } +#endif /* CONFIG_S32K1XX_LPI2C1 && CONFIG_I2C_DRIVER */ + + return ret; +} + +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_periphclocks.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_periphclocks.c index 08ec07a5dbf..8c277e25bfb 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_periphclocks.c +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_periphclocks.c @@ -58,7 +58,9 @@ #include +#include "s32k14x/s32k14x_clocknames.h" #include "s32k1xx_periphclocks.h" + #include "s32k148evb.h" /**************************************************************************** @@ -84,7 +86,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = }, { .clkname = FLEXCAN0_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN0 .clkgate = true, #else .clkgate = false, @@ -92,7 +94,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = }, { .clkname = FLEXCAN1_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN1 .clkgate = true, #else .clkgate = false, @@ -100,7 +102,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] = }, { .clkname = FLEXCAN2_CLK, -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_FLEXCAN2 .clkgate = true, #else .clkgate = false, diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_spi.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_spi.c new file mode 100644 index 00000000000..f93efd9a962 --- /dev/null +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_spi.c @@ -0,0 +1,223 @@ +/**************************************************************************** + * boards/arm/s32k1xx/s32k148evb/src/s32k1xx_spi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "s32k1xx_pin.h" +#include "s32k1xx_lpspi.h" + +#include + +#include "s32k148evb.h" + +#ifdef CONFIG_S32K1XX_LPSPI + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_spidev_initialize + * + * Description: + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. + * + ****************************************************************************/ + +int weak_function s32k1xx_spidev_initialize(void) +{ + int ret = OK; + +#ifdef CONFIG_S32K1XX_LPSPI0 + /* LPSPI0 *****************************************************************/ + + /* Configure LPSPI0 peripheral chip select */ + + s32k1xx_pinconfig(PIN_LPSPI0_PCS); + +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI0 */ + + struct spi_dev_s *g_lpspi0 = s32k1xx_lpspibus_initialize(0); + if (g_lpspi0 == NULL) + { + spierr("ERROR: FAILED to initialize LPSPI0\n"); + return -ENODEV; + } + + ret = spi_register(g_lpspi0, 0); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI0 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI0 */ + +#ifdef CONFIG_S32K1XX_LPSPI1 + /* LPSPI1 *****************************************************************/ + + /* Configure LPSPI1 peripheral chip select */ + + s32k1xx_pinconfig(PIN_LPSPI1_PCS); + +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI1 */ + + struct spi_dev_s *g_lpspi1 = s32k1xx_lpspibus_initialize(1); + if (g_lpspi1 == NULL) + { + spierr("ERROR: FAILED to initialize LPSPI1\n"); + return -ENODEV; + } + + ret = spi_register(g_lpspi1, 1); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI1 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI1 */ + +#ifdef CONFIG_S32K1XX_LPSPI2 + /* LPSPI2 *****************************************************************/ + + /* Configure LPSPI2 peripheral chip select */ + + s32k1xx_pinconfig(PIN_LPSPI2_PCS); + +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI2 */ + + struct spi_dev_s *g_lpspi2 = s32k1xx_lpspibus_initialize(2); + if (g_lpspi2 == NULL) + { + spierr("ERROR: FAILED to initialize LPSPI2\n"); + return -ENODEV; + } + + ret = spi_register(g_lpspi2, 2); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI2 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI2 */ + + return ret; +} + +/**************************************************************************** + * Name: s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus + * + * Description: + * The external functions, s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * s32k1xx_lpspibus_initialize()) are provided by common logic. To use + * this common SPI logic on your board: + * + * 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip + * select pins. + * 2. Provide s32k1xx_lpspiNselect() and s32k1xx_lpspiNstatus() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board is + * configured. + * 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level + * application initialization logic. + * 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used + * to bind the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_S32K1XX_LPSPI0 +/* LPSPI0 *******************************************************************/ + +void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, + selected ? "assert" : "de-assert"); + + s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected); +} + +uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif /* CONFIG_S32K1XX_LPSPI0 */ + +#ifdef CONFIG_S32K1XX_LPSPI1 +/* LPSPI1 *******************************************************************/ + +void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, + selected ? "assert" : "de-assert"); + + s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected); +} + +uint8_t s32k1xx_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif /* CONFIG_S32K1XX_LPSPI1 */ + +#ifdef CONFIG_S32K1XX_LPSPI2 +/* LPSPI2 *******************************************************************/ + +void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, + selected ? "assert" : "de-assert"); + + s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected); +} + +uint8_t s32k1xx_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif /* CONFIG_S32K1XX_LPSPI2 */ +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_userleds.c b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_userleds.c index 3637d642841..2ea079fcd8c 100644 --- a/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_userleds.c +++ b/boards/arm/s32k1xx/s32k148evb/src/s32k1xx_userleds.c @@ -26,18 +26,15 @@ #include #include -#include #include -#include "arm_arch.h" -#include "arm_internal.h" - #include "s32k1xx_pin.h" -#include "s32k148evb.h" #include +#include "s32k148evb.h" + #ifndef CONFIG_ARCH_LEDS /**************************************************************************** @@ -55,6 +52,7 @@ uint32_t board_userled_initialize(void) s32k1xx_pinconfig(GPIO_LED_R); s32k1xx_pinconfig(GPIO_LED_G); s32k1xx_pinconfig(GPIO_LED_B); + return BOARD_NLEDS; } @@ -83,7 +81,9 @@ void board_userled(int led, bool ledon) return; } - s32k1xx_gpiowrite(ledcfg, ledon); /* High illuminates */ + /* An output of '1' illuminates the LED */ + + s32k1xx_gpiowrite(ledcfg, ledon); } /**************************************************************************** @@ -92,7 +92,7 @@ void board_userled(int led, bool ledon) void board_userled_all(uint32_t ledset) { - /* Low illuminates */ + /* An output of '1' illuminates the LED */ s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0); s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0); diff --git a/boards/xtensa/esp32/drivers/Kconfig b/boards/arm/s32k1xx/ucans32k146/Kconfig similarity index 69% rename from boards/xtensa/esp32/drivers/Kconfig rename to boards/arm/s32k1xx/ucans32k146/Kconfig index f72f3c094ce..47d49399bd4 100644 --- a/boards/xtensa/esp32/drivers/Kconfig +++ b/boards/arm/s32k1xx/ucans32k146/Kconfig @@ -2,3 +2,7 @@ # For a description of the syntax of this configuration file, # see the file kconfig-language.txt in the NuttX tools repository. # + +if ARCH_BOARD_UCANS32K146 + +endif # ARCH_BOARD_UCANS32K146 diff --git a/boards/arm/s32k1xx/ucans32k146/README.txt b/boards/arm/s32k1xx/ucans32k146/README.txt new file mode 100644 index 00000000000..7477d0964ac --- /dev/null +++ b/boards/arm/s32k1xx/ucans32k146/README.txt @@ -0,0 +1,152 @@ +README +====== + +This directory holds the port to the NXP UCANS32K146 boards. There exist a +few different revisions/variants of this board. All variants with the +S32K146 microcontroller are supported. + +Contents +======== + + o Status + o Serial Console + o LEDs and Buttons + o Thread-Aware Debugging with Eclipse + o Configurations + +Status +====== + + 2020-01-23: Configuration created (copy-paste from S32K146EVB). + Tested: Serial console, I2C, SPI. + + 2020-06-15: Added FlexCAN driver with SocketCAN support to the S32K1XX + arch, which has been tested with the UCANS32K146 board as well. + + 2020-06-16: Added Emulated EEPROM driver and initialization. + +Serial Console +============== + + By default, the serial console will be provided on the DCD-LZ UART + (available on the 7-pin DCD-LZ debug connector P6): + + OpenSDA UART RX PTC6 (LPUART1_RX) + OpenSDA UART TX PTC7 (LPUART1_TX) + + USB drivers for the PEmicro CDC Serial Port are available here: + http://www.pemicro.com/opensda/ + +LEDs and Buttons +================ + + LEDs + ---- + The UCANS32K146 has one RGB LED: + + RedLED PTD15 (FTM0 CH0) + GreenLED PTD16 (FTM0 CH1) + BlueLED PTD0 (FTM0 CH2) + + An output of '0' illuminates the LED. + + If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + any way. The following definitions are used to access individual RGB + components (see ucans32k146.h): + + GPIO_LED_R + GPIO_LED_G + GPIO_LED_B + + The RGB components could, alternatively, be controlled through PWM using + the common RGB LED driver. + + If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board + the UCANS32K146. The following definitions describe how NuttX controls the + LEDs: + + ==========================================+========+========+========= + RED GREEN BLUE + ==========================================+========+========+========= + + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + LED_IRQSENABLED Interrupts enabled OFF OFF ON + LED_STACKCREATED Idle stack created OFF ON OFF + LED_INIRQ In an interrupt (no change) + LED_SIGNAL In a signal handler (no change) + LED_ASSERTION An assertion failed (no change) + LED_PANIC The system has crashed FLASH OFF OFF + LED_IDLE S32K146 in sleep mode (no change) + ==========================================+========+========+========= + + Buttons + ------- + The UCANS32K146 supports one button: + + SW3 PTC14 + +Thread-Aware Debugging with Eclipse +=================================== + + Thread-aware debugging is possible with openocd-nuttx + ( https://github.com/sony/openocd-nuttx ) and was tested together with the + Eclipse-based S32 Design Studio for Arm: + https://www.nxp.com/design/software/development-software/s32-design-studio-ide/s32-design-studio-for-arm:S32DS-ARM + + NOTE: This method was last tested with NuttX 8.2 and S32DS for Arm 2018.R1. + It may not work anymore with recent releases of NuttX and/or S32DS. + + 1. NuttX should be build with debug symbols enabled. + + 2. Build OpenOCD as described here (using the same parameters as well): + https://micro.ros.org/docs/tutorials/old/debugging/ + + 3. A s32k146.cfg file is available in the scripts/ folder. Start OpenOCD + with the following command (adapt the path info): + /usr/local/bin/openocd -f /usr/share/openocd/scripts/interface/jlink.cfg \ + -f boards/s32k1xx/ucans32k146/scripts/s32k146.cfg -c init -c "reset halt" + + 4. Setup a GDB debug session in Eclipse. The resulting debug window shows + the NuttX threads. The full stack details can be viewed. + +Configurations +============== + + Common Information + ------------------ + Each UCANS32K146 configuration is maintained in a sub-directory and can be + selected as follows: + + tools/configure.sh ucans32k146: + + Where is one of the sub-directories listed in the next paragraph. + + NOTES (common for all configurations): + + 1. This configuration uses the mconf-based configuration tool. To change + this configuration using that tool, you should: + + a. Build and install the kconfig-mconf tool. See nuttx/README.txt. + Also see additional README.txt files in the NuttX tools repository. + + b. Execute 'make menuconfig' in nuttx/ in order to start the + reconfiguration process. + + 2. Unless otherwise stated, the serial console used is LPUART1 at + 115,200 8N1. This corresponds to the OpenSDA VCOM port. + + Configuration Sub-directories + ----------------------------- + + nsh: + --- + Configures the NuttShell (nsh) located at apps/examples/nsh. Support + for builtin applications is enabled, but in the base configuration the + only application selected is the "Hello, World!" example. + + can: + --- + Besides the NuttShell this configuration also enables (Socket)CAN + support, as well as I2C and SPI support. It includes the SLCAN and + can-utils applications for monitoring and debugging CAN applications. diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/configs/nsh/defconfig b/boards/arm/s32k1xx/ucans32k146/configs/can/defconfig similarity index 81% rename from boards/arm/s32k1xx/rddrone-uavcan146/configs/nsh/defconfig rename to boards/arm/s32k1xx/ucans32k146/configs/can/defconfig index 20d9e5e108e..5fc15f721d8 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/configs/nsh/defconfig +++ b/boards/arm/s32k1xx/ucans32k146/configs/can/defconfig @@ -11,17 +11,21 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +# CONFIG_SLCAN_TRACE is not set +CONFIG_ALLOW_GPL_COMPONENTS=y CONFIG_ARCH="arm" -CONFIG_ARCH_BOARD="rddrone-uavcan146" -CONFIG_ARCH_BOARD_RDDRONE_UAVCAN146=y +CONFIG_ARCH_BOARD="ucans32k146" +CONFIG_ARCH_BOARD_UCANS32K146=y CONFIG_ARCH_CHIP="s32k1xx" CONFIG_ARCH_CHIP_S32K146=y CONFIG_ARCH_CHIP_S32K14X=y CONFIG_ARCH_CHIP_S32K1XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_BOARD_LOOPSPERMSEC=3997 +CONFIG_BOARD_LOOPSPERMSEC=6667 CONFIG_BUILTIN=y -CONFIG_EXAMPLES_HELLO=y +CONFIG_CANUTILS_CANDUMP=y +CONFIG_CANUTILS_CANSEND=y +CONFIG_CANUTILS_SLCAN=y CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y @@ -30,13 +34,7 @@ CONFIG_I2CTOOL_DEFFREQ=100000 CONFIG_I2CTOOL_MAXADDR=0x7f CONFIG_I2CTOOL_MAXBUS=0 CONFIG_I2CTOOL_MINADDR=0x00 -CONFIG_INTELHEX_BINARY=y -CONFIG_LPUART0_RXBUFSIZE=64 -CONFIG_LPUART0_TXBUFSIZE=64 -CONFIG_LPUART1_RXBUFSIZE=64 CONFIG_LPUART1_SERIAL_CONSOLE=y -CONFIG_LPUART1_TXBUFSIZE=64 -CONFIG_MOTOROLA_SREC=y CONFIG_NET=y CONFIG_NETDEV_IFINDEX=y CONFIG_NET_CAN=y @@ -67,10 +65,9 @@ CONFIG_SDCLONE_DISABLE=y CONFIG_SIG_DEFAULT=y CONFIG_SPITOOL_DEFFREQ=400000 CONFIG_SPITOOL_MAXBUS=0 -CONFIG_START_DAY=18 -CONFIG_START_MONTH=8 -CONFIG_START_YEAR=2019 -CONFIG_STDIO_DISABLE_BUFFERING=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2021 CONFIG_SYMTAB_ORDEREDBYNAME=y CONFIG_SYSTEM_I2CTOOL=y CONFIG_SYSTEM_NSH=y diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/configs/nshdebug/defconfig b/boards/arm/s32k1xx/ucans32k146/configs/nsh/defconfig similarity index 59% rename from boards/arm/s32k1xx/rddrone-uavcan146/configs/nshdebug/defconfig rename to boards/arm/s32k1xx/ucans32k146/configs/nsh/defconfig index 65465dc4981..0560d867de4 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/configs/nshdebug/defconfig +++ b/boards/arm/s32k1xx/ucans32k146/configs/nsh/defconfig @@ -10,33 +10,20 @@ # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set CONFIG_ARCH="arm" -CONFIG_ARCH_BOARD="rddrone-uavcan146" -CONFIG_ARCH_BOARD_RDDRONE_UAVCAN146=y +CONFIG_ARCH_BOARD="ucans32k146" +CONFIG_ARCH_BOARD_UCANS32K146=y CONFIG_ARCH_CHIP="s32k1xx" CONFIG_ARCH_CHIP_S32K146=y CONFIG_ARCH_CHIP_S32K14X=y CONFIG_ARCH_CHIP_S32K1XX=y CONFIG_ARCH_STACKDUMP=y -CONFIG_BOARD_LOOPSPERMSEC=3997 +CONFIG_BOARD_LOOPSPERMSEC=6667 CONFIG_BUILTIN=y -CONFIG_DEBUG_FEATURES=y -CONFIG_DEBUG_SYMBOLS=y CONFIG_EXAMPLES_HELLO=y CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y -CONFIG_I2C=y -CONFIG_I2CTOOL_DEFFREQ=100000 -CONFIG_I2CTOOL_MAXADDR=0x7f -CONFIG_I2CTOOL_MAXBUS=0 -CONFIG_I2CTOOL_MINADDR=0x00 -CONFIG_INTELHEX_BINARY=y -CONFIG_LPUART0_RXBUFSIZE=64 -CONFIG_LPUART0_TXBUFSIZE=64 -CONFIG_LPUART1_RXBUFSIZE=64 CONFIG_LPUART1_SERIAL_CONSOLE=y -CONFIG_LPUART1_TXBUFSIZE=64 -CONFIG_MOTOROLA_SREC=y CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_FILEIOSIZE=512 @@ -46,20 +33,12 @@ CONFIG_RAM_SIZE=126976 CONFIG_RAM_START=0x1fff0000 CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 -CONFIG_S32K1XX_LPI2C0=y -CONFIG_S32K1XX_LPSPI0=y -CONFIG_S32K1XX_LPUART0=y CONFIG_S32K1XX_LPUART1=y CONFIG_SCHED_WAITPID=y CONFIG_SDCLONE_DISABLE=y -CONFIG_SPITOOL_DEFFREQ=400000 -CONFIG_SPITOOL_MAXBUS=0 -CONFIG_START_DAY=18 -CONFIG_START_MONTH=8 -CONFIG_START_YEAR=2019 -CONFIG_STDIO_DISABLE_BUFFERING=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=9 +CONFIG_START_YEAR=2021 CONFIG_SYMTAB_ORDEREDBYNAME=y -CONFIG_SYSTEM_I2CTOOL=y CONFIG_SYSTEM_NSH=y -CONFIG_SYSTEM_SPITOOL=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/s32k1xx/ucans32k146/include/board.h b/boards/arm/s32k1xx/ucans32k146/include/board.h new file mode 100644 index 00000000000..b0e448d2452 --- /dev/null +++ b/boards/arm/s32k1xx/ucans32k146/include/board.h @@ -0,0 +1,159 @@ +/**************************************************************************** + * boards/arm/s32k1xx/ucans32k146/include/board.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_ARM_S32K1XX_UCANS32K146_INCLUDE_BOARD_H +#define __BOARDS_ARM_S32K1XX_UCANS32K146_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* The UCANS32K146 is fitted with a 8 MHz crystal */ + +#define BOARD_XTAL_FREQUENCY 8000000 + +/* The S32K146 will run at 80 MHz */ + +/* LED definitions **********************************************************/ + +/* The UCANS32K146 has one RGB LED: + * + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) + * + * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in + * any way. The following definitions are used to access individual RGB + * components. + * + * The RGB components could, alternatively be controlled through PWM using + * the common RGB LED driver. + */ + +/* LED index values for use with board_userled() */ + +#define BOARD_LED_R 0 +#define BOARD_LED_G 1 +#define BOARD_LED_B 2 +#define BOARD_NLEDS 3 + +/* LED bits for use with board_userled_all() */ + +#define BOARD_LED_R_BIT (1 << BOARD_LED_R) +#define BOARD_LED_G_BIT (1 << BOARD_LED_G) +#define BOARD_LED_B_BIT (1 << BOARD_LED_B) + +/* Board revision detection pin, its state determines the board variant: + * + * 0: UCANS32K146-01 + * 1: UCANS32K146B + */ + +#define BOARD_REVISION_DETECT_PIN (PIN_PTA10 | GPIO_INPUT) + +/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board + * the UCANS32K146. The following definitions describe how NuttX controls + * the LEDs: + * + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ----------------------------- ------------------- + */ + +#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ +#define LED_INIRQ 0 /* In an interrupt (No change) */ +#define LED_SIGNAL 0 /* In a signal handler (No change) */ +#define LED_ASSERTION 0 /* An assertion failed (No change) */ +#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ +#undef LED_IDLE /* S32K146 is in sleep mode (Not used) */ + +/* Button definitions *******************************************************/ + +/* The UCANS32K146 supports one button: + * + * SW3 PTC14 + */ + +#define BUTTON_SW3 0 +#define NUM_BUTTONS 1 + +#define BUTTON_SW3_BIT (1 << BUTTON_SW3) + +/* UART selections **********************************************************/ + +/* By default, the serial console will be provided on the DCD-LZ UART + * (available on the 7-pin DCD-LZ debug connector P6): + * + * DCD-LZ UART RX PTC6 (LPUART1_RX) + * DCD-LZ UART TX PTC7 (LPUART1_TX) + */ + +#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ +#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ + +/* P2 TLM UART (LPUART0) */ + +#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */ +#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */ +#define PIN_LPUART0_CTS PIN_LPUART0_CTS_2 /* PTC8 */ +#define PIN_LPUART0_RTS PIN_LPUART0_RTS_2 /* PTC9 */ + +/* SPI selections ***********************************************************/ + +/* P1 SPI (LPSPI0) */ + +#define PIN_LPSPI0_SCK PIN_LPSPI0_SCK_2 /* PTB2 */ +#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */ +#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_3 /* PTB4 */ +#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_2 /* PTB5 */ + +/* I2C selections ***********************************************************/ + +/* P3 I2C / P4 LCD (LPI2C0) */ + +#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */ +#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */ + +/* CAN selections ***********************************************************/ + +/* TJA1153/TJA1443/TJA1463 CAN transceiver (CAN0) */ + +#define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */ +#define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */ +#define PIN_CAN0_STB (PIN_PTE11 | GPIO_OUTPUT) + +/* TJA1153/TJA1443/TJA1463 CAN transceiver (CAN1) */ + +#define PIN_CAN1_RX PIN_CAN1_RX_1 /* PTA12 */ +#define PIN_CAN1_TX PIN_CAN1_TX_1 /* PTA13 */ +#define PIN_CAN1_STB (PIN_PTE10 | GPIO_OUTPUT) + +#endif /* __BOARDS_ARM_S32K1XX_UCANS32K146_INCLUDE_BOARD_H */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/scripts/Make.defs b/boards/arm/s32k1xx/ucans32k146/scripts/Make.defs similarity index 91% rename from boards/arm/s32k1xx/rddrone-uavcan144/scripts/Make.defs rename to boards/arm/s32k1xx/ucans32k146/scripts/Make.defs index 6e3dd507a5f..815cd368c8c 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan144/scripts/Make.defs +++ b/boards/arm/s32k1xx/ucans32k146/scripts/Make.defs @@ -1,5 +1,5 @@ ############################################################################ -# boards/arm/s32k1xx/rddrone-uavcan144/scripts/Make.defs +# boards/arm/s32k1xx/ucans32k146/scripts/Make.defs # # Licensed to the Apache Software Foundation (ASF) under one or more # contributor license agreements. See the NOTICE file distributed with @@ -58,13 +58,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/scripts/flash.ld b/boards/arm/s32k1xx/ucans32k146/scripts/flash.ld similarity index 98% rename from boards/arm/s32k1xx/rddrone-uavcan146/scripts/flash.ld rename to boards/arm/s32k1xx/ucans32k146/scripts/flash.ld index bd8e4c20d3f..30f7f8fec39 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/scripts/flash.ld +++ b/boards/arm/s32k1xx/ucans32k146/scripts/flash.ld @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/scripts/flash.ld + * boards/arm/s32k1xx/ucans32k146/scripts/flash.ld * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/scripts/s32k146.cfg b/boards/arm/s32k1xx/ucans32k146/scripts/s32k146.cfg similarity index 95% rename from boards/arm/s32k1xx/rddrone-uavcan146/scripts/s32k146.cfg rename to boards/arm/s32k1xx/ucans32k146/scripts/s32k146.cfg index 749facc47c8..2c03bf6e5f6 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/scripts/s32k146.cfg +++ b/boards/arm/s32k1xx/ucans32k146/scripts/s32k146.cfg @@ -1,5 +1,5 @@ # -# NXP S32K146 - 1x ARM Cortex-M4 @ up to 180 MHz +# NXP S32K146 - 1x ARM Cortex-M4 @ up to 112 MHz # adapter_khz 4000 diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/scripts/sram.ld b/boards/arm/s32k1xx/ucans32k146/scripts/sram.ld similarity index 98% rename from boards/arm/s32k1xx/rddrone-uavcan146/scripts/sram.ld rename to boards/arm/s32k1xx/ucans32k146/scripts/sram.ld index a775f8a4715..fe0c291b747 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/scripts/sram.ld +++ b/boards/arm/s32k1xx/ucans32k146/scripts/sram.ld @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/scripts/sram.ld + * boards/arm/s32k1xx/ucans32k146/scripts/sram.ld * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/Makefile b/boards/arm/s32k1xx/ucans32k146/src/Makefile similarity index 90% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/Makefile rename to boards/arm/s32k1xx/ucans32k146/src/Makefile index aba9a82da6c..211ea89471a 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/Makefile +++ b/boards/arm/s32k1xx/ucans32k146/src/Makefile @@ -1,5 +1,5 @@ ############################################################################ -# boards/arm/s32k1xx/rddrone-uavcan146/src/Makefile +# boards/arm/s32k1xx/ucans32k146/src/Makefile # # Licensed to the Apache Software Foundation (ASF) under one or more # contributor license agreements. See the NOTICE file distributed with @@ -23,20 +23,24 @@ include $(TOPDIR)/Make.defs CSRCS = s32k1xx_boot.c s32k1xx_bringup.c s32k1xx_clockconfig.c CSRCS += s32k1xx_periphclocks.c +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += s32k1xx_buttons.c +endif + ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += s32k1xx_autoleds.c else CSRCS += s32k1xx_userleds.c endif -ifeq ($(CONFIG_ARCH_BUTTONS),y) -CSRCS += s32k1xx_buttons.c -endif - ifeq ($(CONFIG_BOARDCTL),y) CSRCS += s32k1xx_appinit.c endif +ifeq ($(CONFIG_S32K1XX_LPI2C),y) +CSRCS += s32k1xx_i2c.c +endif + ifeq ($(CONFIG_S32K1XX_LPSPI),y) CSRCS += s32k1xx_spi.c endif diff --git a/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_appinit.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_appinit.c new file mode 100644 index 00000000000..18cff58c2d4 --- /dev/null +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_appinit.c @@ -0,0 +1,80 @@ +/**************************************************************************** + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_appinit.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +#include "ucans32k146.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef OK +# define OK 0 +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no meaning + * to NuttX; the meaning of the argument is a contract between the + * board-specific initialization logic and the matching application + * logic. The value could be such things as a mode enumeration + * value, a set of DIP switch settings, a pointer to configuration + * data read from a file or serial FLASH, or whatever you would like + * to do with it. Every implementation should accept zero/NULL as a + * default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int board_app_initialize(uintptr_t arg) +{ +#ifdef CONFIG_BOARD_LATE_INITIALIZE + /* Board initialization already performed by board_late_initialize() */ + + return OK; +#else + /* Perform board-specific initialization */ + + return s32k1xx_bringup(); +#endif +} diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_autoleds.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_autoleds.c similarity index 63% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_autoleds.c rename to boards/arm/s32k1xx/ucans32k146/src/s32k1xx_autoleds.c index 610bac8687a..696a6ddb8cc 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_autoleds.c +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_autoleds.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_autoleds.c + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_autoleds.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,30 +18,30 @@ * ****************************************************************************/ -/* The RDDRONE-UAVCAN146 has one RGB LED: +/* The UCANS32K146 has one RGB LED: * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) * - * An output of '1' illuminates the LED. + * An output of '0' illuminates the LED. * * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board - * the Freedom K66F. The following definitions describe how NuttX controls + * the UCANS32K146. The following definitions describe how NuttX controls * the LEDs: * - * SYMBOL Meaning LED state - * RED GREEN BLUE - * ------------------- ----------------------- ----------------- - * LED_STARTED NuttX has been started OFF OFF OFF - * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON - * LED_IRQSENABLED Interrupts enabled OFF OFF ON - * LED_STACKCREATED Idle stack created OFF ON OFF - * LED_INIRQ In an interrupt (no change) - * LED_SIGNAL In a signal handler (no change) - * LED_ASSERTION An assertion failed (no change) - * LED_PANIC The system has crashed FLASH OFF OFF - * LED_IDLE K66 is in sleep mode (Optional, not used) + * SYMBOL Meaning LED state + * RED GREEN BLUE + * ---------------- ------------------------ -------------------- + * LED_STARTED NuttX has been started OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + * LED_IRQSENABLED Interrupts enabled OFF OFF ON + * LED_STACKCREATED Idle stack created OFF ON OFF + * LED_INIRQ In an interrupt (No change) + * LED_SIGNAL In a signal handler (No change) + * LED_ASSERTION An assertion failed (No change) + * LED_PANIC The system has crashed FLASH OFF OFF + * LED_IDLE S32K146 is in sleep mode (Optional, not used) */ /**************************************************************************** @@ -52,18 +52,12 @@ #include #include -#include #include -#include - -#include "arm_arch.h" -#include "arm_internal.h" #include "s32k1xx_pin.h" -#include "rddrone-uavcan146.h" -#include +#include "ucans32k146.h" #ifdef CONFIG_ARCH_LEDS @@ -73,11 +67,11 @@ /* Summary of all possible settings */ -#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ -#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ -#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ -#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ -#define LED_ON_OFF_OFF 4 /* LED_PANIC */ +#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */ +#define LED_OFF_OFF_OFF 1 /* LED_STARTED */ +#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */ +#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */ +#define LED_ON_OFF_OFF 4 /* LED_PANIC */ /**************************************************************************** * Public Functions @@ -127,9 +121,11 @@ void board_autoled_on(int led) break; } - s32k1xx_gpiowrite(GPIO_LED_R, redon); - s32k1xx_gpiowrite(GPIO_LED_G, greenon); - s32k1xx_gpiowrite(GPIO_LED_B, blueon); + /* Invert output, an output of '0' illuminates the LED */ + + s32k1xx_gpiowrite(GPIO_LED_R, !redon); + s32k1xx_gpiowrite(GPIO_LED_G, !greenon); + s32k1xx_gpiowrite(GPIO_LED_B, !blueon); } } @@ -141,9 +137,11 @@ void board_autoled_off(int led) { if (led == LED_ON_OFF_OFF) { - s32k1xx_gpiowrite(GPIO_LED_R, true); - s32k1xx_gpiowrite(GPIO_LED_G, false); - s32k1xx_gpiowrite(GPIO_LED_B, false); + /* Invert outputs, an output of '0' illuminates the LED */ + + s32k1xx_gpiowrite(GPIO_LED_R, !true); + s32k1xx_gpiowrite(GPIO_LED_G, !false); + s32k1xx_gpiowrite(GPIO_LED_B, !false); } } diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_boot.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_boot.c similarity index 93% rename from boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_boot.c rename to boards/arm/s32k1xx/ucans32k146/src/s32k1xx_boot.c index 762f3a15029..5ba5f9b8834 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_boot.c +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_boot.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_boot.c + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_boot.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -23,12 +23,9 @@ ****************************************************************************/ #include - -#include - #include -#include "rddrone-uavcan144.h" +#include "ucans32k146.h" /**************************************************************************** * Public Functions @@ -48,7 +45,7 @@ void s32k1xx_board_initialize(void) { #ifdef CONFIG_ARCH_LEDS - /* Configure on-board LEDs if LED support has been selected. */ + /* Configure on-board LEDs if LED support has been selected */ board_autoled_initialize(); #endif diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_bringup.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_bringup.c similarity index 66% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_bringup.c rename to boards/arm/s32k1xx/ucans32k146/src/s32k1xx_bringup.c index 9a2eaab57f5..0c9537392c0 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_bringup.c +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_bringup.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_bringup.c + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_bringup.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -23,11 +23,10 @@ ****************************************************************************/ #include -#include -#include -#include -#include +#include +#include +#include #ifdef CONFIG_INPUT_BUTTONS # include @@ -37,17 +36,25 @@ # include #endif -#ifdef CONFIG_I2C_DRIVER -# include "s32k1xx_pin.h" -# include -# include "s32k1xx_lpi2c.h" +#ifdef CONFIG_FS_PROCFS +# include +#endif + +#ifdef CONFIG_S32K1XX_PROGMEM +# include #endif #ifdef CONFIG_S32K1XX_EEEPROM # include "s32k1xx_eeeprom.h" #endif -#include "rddrone-uavcan146.h" +#ifdef CONFIG_S32K1XX_FLEXCAN +# include "s32k1xx_flexcan.h" +#endif + +#include + +#include "ucans32k146.h" /**************************************************************************** * Public Functions @@ -101,69 +108,85 @@ int s32k1xx_bringup(void) } #endif -#ifdef CONFIG_S32K1XX_LPSPI - /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak - * function s32k1xx_spidev_initialize() has been brought into the link. - */ - - s32k1xx_spidev_initialize(); -#endif - -#if defined(CONFIG_S32K1XX_LPI2C0) -#if defined(CONFIG_I2C_DRIVER) - FAR struct i2c_master_s *i2c; - i2c = s32k1xx_i2cbus_initialize(0); - - if (i2c == NULL) - { - serr("ERROR: Failed to get I2C interface\n"); - } - else - { - ret = i2c_register(i2c, 0); - if (ret < 0) - { - serr("ERROR: Failed to register I2C driver: %d\n", ret); - s32k1xx_i2cbus_uninitialize(i2c); - } - } -#endif -#endif - #ifdef CONFIG_S32K1XX_PROGMEM FAR struct mtd_dev_s *mtd; - int minor = 0; mtd = progmem_initialize(); - if (!mtd) + if (mtd == NULL) { - syslog(LOG_ERR, "ERROR: progmem_initialize failed\n"); + syslog(LOG_ERR, "ERROR: progmem_initialize() failed\n"); } #endif #ifdef CONFIG_S32K1XX_EEEPROM /* Register EEEPROM block device */ - s32k1xx_eeeprom_register(0, 4096); + ret = s32k1xx_eeeprom_register(0, 4096); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_eeeprom_register() failed\n"); + } #endif -#ifdef CONFIG_S32K1XX_FLEXCAN +#ifdef CONFIG_S32K1XX_LPI2C + /* Initialize I2C driver */ + + ret = s32k1xx_i2cdev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_i2cdev_initialize() failed: %d\n", + ret); + } +#endif + +#ifdef CONFIG_S32K1XX_LPSPI + /* Initialize SPI driver */ + + ret = s32k1xx_spidev_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: s32k1xx_spidev_initialize() failed: %d\n", + ret); + } +#endif + +#ifdef CONFIG_NETDEV_LATEINIT s32k1xx_pinconfig(BOARD_REVISION_DETECT_PIN); +# ifdef CONFIG_S32K1XX_FLEXCAN0 if (s32k1xx_gpioread(BOARD_REVISION_DETECT_PIN)) { - /* STB high -> active CAN phy */ + /* STB high enables CAN phy on UCANS32K146B */ - s32k1xx_pinconfig(PIN_CAN0_STB | GPIO_OUTPUT_ONE); + s32k1xx_pinconfig(PIN_CAN0_STB | GPIO_OUTPUT_ONE); } else { - /* STB low -> active CAN phy */ + /* STB low enables CAN phy on UCANS32K146-01 */ - s32k1xx_pinconfig(PIN_CAN0_STB | GPIO_OUTPUT_ZERO); + s32k1xx_pinconfig(PIN_CAN0_STB | GPIO_OUTPUT_ZERO); } -#endif + s32k1xx_caninitialize(0); +# endif /* CONFIG_S32K1XX_FLEXCAN0 */ + +# ifdef CONFIG_S32K1XX_FLEXCAN1 + if (s32k1xx_gpioread(BOARD_REVISION_DETECT_PIN)) + { + /* STB high enables CAN phy on UCANS32K146B */ + + s32k1xx_pinconfig(PIN_CAN1_STB | GPIO_OUTPUT_ONE); + } + else + { + /* STB low enables CAN phy on UCANS32K146-01 */ + + s32k1xx_pinconfig(PIN_CAN1_STB | GPIO_OUTPUT_ZERO); + } + + s32k1xx_caninitialize(1); +# endif /* CONFIG_S32K1XX_FLEXCAN1 */ +#endif /* CONFIG_NETDEV_LATEINIT */ return ret; } diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_buttons.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_buttons.c similarity index 90% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_buttons.c rename to boards/arm/s32k1xx/ucans32k146/src/s32k1xx_buttons.c index 7325610b3d0..0846c1a3e1b 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_buttons.c +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_buttons.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_buttons.c + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_buttons.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,7 +18,7 @@ * ****************************************************************************/ -/* The RDDRONE-UAVCAN146 supports one button: +/* The UCANS32K146 supports one button: * * SW3 PTC14 */ @@ -32,14 +32,14 @@ #include #include -#include #include #include "s32k1xx_pin.h" -#include "rddrone-uavcan146.h" #include +#include "ucans32k146.h" + #ifdef CONFIG_ARCH_BUTTONS /**************************************************************************** @@ -59,9 +59,10 @@ uint32_t board_button_initialize(void) { - /* Configure the GPIO pins as interrupting inputs. */ + /* Configure the GPIO pins as interrupting inputs */ s32k1xx_pinconfig(GPIO_SW3); + return NUM_BUTTONS; } @@ -81,6 +82,7 @@ uint32_t board_buttons(void) return ret; } +#ifdef CONFIG_ARCH_IRQBUTTONS /**************************************************************************** * Button support. * @@ -96,20 +98,19 @@ uint32_t board_buttons(void) * BUTTON_*_BIT definitions in board.h for the meaning of each bit. * * board_button_irq() may be called to register an interrupt handler that - * will be called when a button is depressed or released. The ID value is - * a button enumeration value that uniquely identifies a button resource. + * will be called when a button is pressed or released. The ID value is a + * button enumeration value that uniquely identifies a button resource. * See the BUTTON_* definitions in board.h for the meaning of enumeration * value. * ****************************************************************************/ -#ifdef CONFIG_ARCH_IRQBUTTONS int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) { uint32_t pinset; int ret; - /* Map the button id to the GPIO bit set. */ + /* Map the button id to the GPIO bit set */ if (id == BUTTON_SW3) { @@ -136,5 +137,5 @@ int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) return ret; } -#endif +#endif /* CONFIG_ARCH_IRQBUTTONS */ #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_clockconfig.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_clockconfig.c similarity index 98% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_clockconfig.c rename to boards/arm/s32k1xx/ucans32k146/src/s32k1xx_clockconfig.c index badf9be0728..18d11fbd40c 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_clockconfig.c +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_clockconfig.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_clockconfig.c + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_clockconfig.c * * Copyright (C) 2019 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -58,12 +58,10 @@ #include -#include -#include - #include "s32k1xx_clockconfig.h" #include "s32k1xx_start.h" -#include "rddrone-uavcan146.h" + +#include "ucans32k146.h" /**************************************************************************** * Public Data diff --git a/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_i2c.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_i2c.c new file mode 100644 index 00000000000..9eb2a0c0432 --- /dev/null +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_i2c.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_i2c.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include + +#include + +#include "s32k1xx_lpi2c.h" + +#include "ucans32k146.h" + +#ifdef CONFIG_S32K1XX_LPI2C + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_i2cdev_initialize + * + * Description: + * Initialize I2C driver and register /dev/i2cN devices. + * + ****************************************************************************/ + +int weak_function s32k1xx_i2cdev_initialize(void) +{ + int ret = OK; + +#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER) + /* LPI2C0 *****************************************************************/ + + /* Initialize the I2C driver for LPI2C0 */ + + struct i2c_master_s *lpi2c0 = s32k1xx_i2cbus_initialize(0); + if (lpi2c0 == NULL) + { + i2cerr("ERROR: FAILED to initialize LPI2C0\n"); + return -ENODEV; + } + + ret = i2c_register(lpi2c0, 0); + if (ret < 0) + { + i2cerr("ERROR: FAILED to register LPI2C0 driver\n"); + s32k1xx_i2cbus_uninitialize(lpi2c0); + return ret; + } +#endif /* CONFIG_S32K1XX_LPI2C0 && CONFIG_I2C_DRIVER */ + + return ret; +} + +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_periphclocks.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_periphclocks.c similarity index 97% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_periphclocks.c rename to boards/arm/s32k1xx/ucans32k146/src/s32k1xx_periphclocks.c index 9856412cef2..b0b1a630c56 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_periphclocks.c +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_periphclocks.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_periphclocks.c + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_periphclocks.c * * Copyright (C) 2019 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -58,8 +58,10 @@ #include +#include "s32k14x/s32k14x_clocknames.h" #include "s32k1xx_periphclocks.h" -#include "rddrone-uavcan146.h" + +#include "ucans32k146.h" /**************************************************************************** * Public Data diff --git a/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_spi.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_spi.c new file mode 100644 index 00000000000..dad5b0c1c2b --- /dev/null +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_spi.c @@ -0,0 +1,223 @@ +/**************************************************************************** + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_spi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "s32k1xx_pin.h" +#include "s32k1xx_lpspi.h" + +#include + +#include "ucans32k146.h" + +#ifdef CONFIG_S32K1XX_LPSPI + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: s32k1xx_spidev_initialize + * + * Description: + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. + * + ****************************************************************************/ + +int weak_function s32k1xx_spidev_initialize(void) +{ + int ret = OK; + +#ifdef CONFIG_S32K1XX_LPSPI0 + /* LPSPI0 *****************************************************************/ + + /* Configure LPSPI0 peripheral chip select */ + + s32k1xx_pinconfig(PIN_LPSPI0_PCS); + +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI0 */ + + struct spi_dev_s *g_lpspi0 = s32k1xx_lpspibus_initialize(0); + if (g_lpspi0 == NULL) + { + spierr("ERROR: FAILED to initialize LPSPI0\n"); + return -ENODEV; + } + + ret = spi_register(g_lpspi0, 0); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI0 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI0 */ + +#ifdef CONFIG_S32K1XX_LPSPI1 + /* LPSPI1 *****************************************************************/ + + /* Configure LPSPI1 peripheral chip select */ + + s32k1xx_pinconfig(PIN_LPSPI1_PCS); + +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI1 */ + + struct spi_dev_s *g_lpspi1 = s32k1xx_lpspibus_initialize(1); + if (g_lpspi1 == NULL) + { + spierr("ERROR: FAILED to initialize LPSPI1\n"); + return -ENODEV; + } + + ret = spi_register(g_lpspi1, 1); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI1 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI1 */ + +#ifdef CONFIG_S32K1XX_LPSPI2 + /* LPSPI2 *****************************************************************/ + + /* Configure LPSPI2 peripheral chip select */ + + s32k1xx_pinconfig(PIN_LPSPI2_PCS); + +# ifdef CONFIG_SPI_DRIVER + /* Initialize the SPI driver for LPSPI2 */ + + struct spi_dev_s *g_lpspi2 = s32k1xx_lpspibus_initialize(2); + if (g_lpspi2 == NULL) + { + spierr("ERROR: FAILED to initialize LPSPI2\n"); + return -ENODEV; + } + + ret = spi_register(g_lpspi2, 2); + if (ret < 0) + { + spierr("ERROR: FAILED to register LPSPI2 driver\n"); + return ret; + } +# endif /* CONFIG_SPI_DRIVER */ +#endif /* CONFIG_S32K1XX_LPSPI2 */ + + return ret; +} + +/**************************************************************************** + * Name: s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus + * + * Description: + * The external functions, s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus + * must be provided by board-specific logic. They are implementations of + * the select and status methods of the SPI interface defined by struct + * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including + * s32k1xx_lpspibus_initialize()) are provided by common logic. To use + * this common SPI logic on your board: + * + * 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip + * select pins. + * 2. Provide s32k1xx_lpspiNselect() and s32k1xx_lpspiNstatus() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board is + * configured. + * 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level + * application initialization logic. + * 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used + * to bind the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +#ifdef CONFIG_S32K1XX_LPSPI0 +/* LPSPI0 *******************************************************************/ + +void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, + selected ? "assert" : "de-assert"); + + s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected); +} + +uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif /* CONFIG_S32K1XX_LPSPI0 */ + +#ifdef CONFIG_S32K1XX_LPSPI1 +/* LPSPI1 *******************************************************************/ + +void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, + selected ? "assert" : "de-assert"); + + s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected); +} + +uint8_t s32k1xx_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif /* CONFIG_S32K1XX_LPSPI1 */ + +#ifdef CONFIG_S32K1XX_LPSPI2 +/* LPSPI2 *******************************************************************/ + +void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %" PRId32 ", CS: %s\n", devid, + selected ? "assert" : "de-assert"); + + s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected); +} + +uint8_t s32k1xx_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + return 0; +} +#endif /* CONFIG_S32K1XX_LPSPI2 */ +#endif /* CONFIG_S32K1XX_LPSPI */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_userleds.c b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_userleds.c similarity index 85% rename from boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_userleds.c rename to boards/arm/s32k1xx/ucans32k146/src/s32k1xx_userleds.c index 028b96b5cef..a2277adafe0 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_userleds.c +++ b/boards/arm/s32k1xx/ucans32k146/src/s32k1xx_userleds.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_userleds.c + * boards/arm/s32k1xx/ucans32k146/src/s32k1xx_userleds.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -26,18 +26,15 @@ #include #include -#include #include -#include "arm_arch.h" -#include "arm_internal.h" - #include "s32k1xx_pin.h" -#include "rddrone-uavcan144.h" #include +#include "ucans32k146.h" + #ifndef CONFIG_ARCH_LEDS /**************************************************************************** @@ -55,6 +52,7 @@ uint32_t board_userled_initialize(void) s32k1xx_pinconfig(GPIO_LED_R); s32k1xx_pinconfig(GPIO_LED_G); s32k1xx_pinconfig(GPIO_LED_B); + return BOARD_NLEDS; } @@ -83,7 +81,9 @@ void board_userled(int led, bool ledon) return; } - s32k1xx_gpiowrite(ledcfg, ledon); /* High illuminates */ + /* Invert output, an output of '0' illuminates the LED */ + + s32k1xx_gpiowrite(ledcfg, !ledon); } /**************************************************************************** @@ -92,11 +92,11 @@ void board_userled(int led, bool ledon) void board_userled_all(uint32_t ledset) { - /* Low illuminates */ + /* Invert output, an output of '0' illuminates the LED */ - s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0); - s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0); - s32k1xx_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) != 0); + s32k1xx_gpiowrite(GPIO_LED_R, !((ledset & BOARD_LED_R_BIT) != 0)); + s32k1xx_gpiowrite(GPIO_LED_G, !((ledset & BOARD_LED_G_BIT) != 0)); + s32k1xx_gpiowrite(GPIO_LED_B, !((ledset & BOARD_LED_B_BIT) != 0)); } #endif /* !CONFIG_ARCH_LEDS */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/rddrone-uavcan146.h b/boards/arm/s32k1xx/ucans32k146/src/ucans32k146.h similarity index 78% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/rddrone-uavcan146.h rename to boards/arm/s32k1xx/ucans32k146/src/ucans32k146.h index d20327b525d..a737b6440be 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/rddrone-uavcan146.h +++ b/boards/arm/s32k1xx/ucans32k146/src/ucans32k146.h @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/rddrone-uavcan146.h + * boards/arm/s32k1xx/ucans32k146/src/ucans32k146.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,8 +18,8 @@ * ****************************************************************************/ -#ifndef __BOARDS_ARM_S32K1XX_RDDRONE_UAVCAN146_SRC_RDDRONE_UAVCAN146_H -#define __BOARDS_ARM_S32K1XX_RDDRONE_UAVCAN146_SRC_RDDRONE_UAVCAN146_H +#ifndef __BOARDS_ARM_S32K1XX_UCANS32K146_SRC_UCANS32K146_H +#define __BOARDS_ARM_S32K1XX_UCANS32K146_SRC_UCANS32K146_H /**************************************************************************** * Included Files @@ -32,6 +32,7 @@ #include "hardware/s32k1xx_pinmux.h" #include "s32k1xx_periphclocks.h" +#include "s32k1xx_pin.h" /**************************************************************************** * Pre-processor Definitions @@ -39,31 +40,29 @@ /* Configuration ************************************************************/ -/* RDDRONE-UAVCAN146 GPIOs **************************************************/ +/* UCANS32K146 GPIOs ********************************************************/ -/* LEDs. The RDDRONE-UAVCAN146 has one RGB LED: +/* LEDs. The UCANS32K146 has one RGB LED: * - * RedLED PTD15 (FTM0 CH0) - * GreenLED PTD16 (FTM0 CH1) - * BlueLED PTD0 (FTM0 CH2) + * RedLED PTD15 (FTM0 CH0) + * GreenLED PTD16 (FTM0 CH1) + * BlueLED PTD0 (FTM0 CH2) * - * An output of '1' illuminates the LED. + * An output of '0' illuminates the LED. */ -#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) -#define GPIO_LED_B (PIN_PTD0 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) +#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) +#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) +#define GPIO_LED_B (PIN_PTD0 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE) -/* Buttons. The RDDRONE-UAVCAN146 supports one button: +/* Buttons. The UCANS32K146 supports one button: * * SW3 PTC14 */ #define GPIO_SW3 (PIN_PTC14 | PIN_INT_BOTH) -/* SPI chip selects */ - -/* SE050 Enable */ +/* SE050 Secure Element enable pin */ #define GPIO_SE050_EN (PIN_PTA6 | GPIO_LOWDRIVE) @@ -71,10 +70,6 @@ #define NUM_OF_PERIPHERAL_CLOCKS_0 12 -/**************************************************************************** - * Public Types - ****************************************************************************/ - /**************************************************************************** * Public Data ****************************************************************************/ @@ -106,17 +101,25 @@ extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[]; int s32k1xx_bringup(void); /**************************************************************************** - * Name: s32k1xx_spidev_initialize + * Name: s32k1xx_i2cdev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the RDDRONE-UAVCAN146 - * board. + * Initialize I2C driver and register /dev/i2cN devices. * ****************************************************************************/ -#ifdef CONFIG_S32K1XX_LPSPI -void s32k1xx_spidev_initialize(void); -#endif +int s32k1xx_i2cdev_initialize(void); + +/**************************************************************************** + * Name: s32k1xx_spidev_initialize + * + * Description: + * Configure chip select pins, initialize the SPI driver and register + * /dev/spiN devices. + * + ****************************************************************************/ + +int s32k1xx_spidev_initialize(void); #endif /* __ASSEMBLY__ */ -#endif /* __BOARDS_ARM_S32K1XX_RDDRONE_UAVCAN146_SRC_RDDRONE_UAVCAN146_H */ +#endif /* __BOARDS_ARM_S32K1XX_UCANS32K146_SRC_UCANS32K146_H */ diff --git a/boards/arm/sam34/arduino-due/scripts/Make.defs b/boards/arm/sam34/arduino-due/scripts/Make.defs index 49bfe42e7d7..321cd9fa961 100644 --- a/boards/arm/sam34/arduino-due/scripts/Make.defs +++ b/boards/arm/sam34/arduino-due/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sam34/flipnclick-sam3x/scripts/Make.defs b/boards/arm/sam34/flipnclick-sam3x/scripts/Make.defs index 8572e54f5f7..b91293699ba 100644 --- a/boards/arm/sam34/flipnclick-sam3x/scripts/Make.defs +++ b/boards/arm/sam34/flipnclick-sam3x/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sam34/sam3u-ek/configs/knsh/Make.defs b/boards/arm/sam34/sam3u-ek/configs/knsh/Make.defs index 35802dd168e..47133640973 100644 --- a/boards/arm/sam34/sam3u-ek/configs/knsh/Make.defs +++ b/boards/arm/sam34/sam3u-ek/configs/knsh/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sam34/sam3u-ek/kernel/Makefile b/boards/arm/sam34/sam3u-ek/kernel/Makefile index 0f797415125..141a884133d 100644 --- a/boards/arm/sam34/sam3u-ek/kernel/Makefile +++ b/boards/arm/sam34/sam3u-ek/kernel/Makefile @@ -40,7 +40,7 @@ else USER_LDSCRIPT += -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -61,7 +61,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/sam34/sam3u-ek/kernel/sam_userspace.c b/boards/arm/sam34/sam3u-ek/kernel/sam_userspace.c index 74297f374aa..0c2ede6f925 100644 --- a/boards/arm/sam34/sam3u-ek/kernel/sam_userspace.c +++ b/boards/arm/sam34/sam3u-ek/kernel/sam_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/sam34/sam3u-ek/scripts/Make.defs b/boards/arm/sam34/sam3u-ek/scripts/Make.defs index 66b845d2075..e1b592c1f52 100644 --- a/boards/arm/sam34/sam3u-ek/scripts/Make.defs +++ b/boards/arm/sam34/sam3u-ek/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sam34/sam4cmp-db/scripts/Make.defs b/boards/arm/sam34/sam4cmp-db/scripts/Make.defs index 568356f68fe..84d106aabdc 100644 --- a/boards/arm/sam34/sam4cmp-db/scripts/Make.defs +++ b/boards/arm/sam34/sam4cmp-db/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sam34/sam4e-ek/scripts/Make.defs b/boards/arm/sam34/sam4e-ek/scripts/Make.defs index e7326c00fb7..edbf2b7c3bc 100644 --- a/boards/arm/sam34/sam4e-ek/scripts/Make.defs +++ b/boards/arm/sam34/sam4e-ek/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sam34/sam4e-ek/src/sam_ili9325.c b/boards/arm/sam34/sam4e-ek/src/sam_ili9325.c index b4a15c1d972..1c8218079af 100644 --- a/boards/arm/sam34/sam4e-ek/src/sam_ili9325.c +++ b/boards/arm/sam34/sam4e-ek/src/sam_ili9325.c @@ -1,53 +1,30 @@ /**************************************************************************** * boards/arm/sam34/sam4e-ek/src/sam_ili9325.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * References: + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* References: * - This driver is a modification of the Shenzhou ILI9325 LCD driver. * - ILI9325 Datasheet, Version: V0.43, ILI9325DS_V0.43.pdf, * ILI TECHNOLOGY CORP., * - SAM4Ex Datasheet, Atmel * - Atmel ILI9325 Sample code for the SAM4S - * - * Some the LCD and SMC initialization logic comes from Atmel sample code - * for the SAM4S. - * The Atmel sample code has a BSD-like license with an additional - * requirement that restricts the code from being used on anything but Atmel - * microprocessors. I do not believe that this file "derives" from the Atmel - * sample code nor do I believe that it contains anything but generally - * available ILI9325 and SAM4x logic. - * Credit, however, needs to go where it is due. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ + */ /**************************************************************************** * diff --git a/boards/arm/sam34/sam4e-ek/src/sam_ili9341.c b/boards/arm/sam34/sam4e-ek/src/sam_ili9341.c index 7db8a74aa6c..d08838ba069 100644 --- a/boards/arm/sam34/sam4e-ek/src/sam_ili9341.c +++ b/boards/arm/sam34/sam4e-ek/src/sam_ili9341.c @@ -1,52 +1,30 @@ /**************************************************************************** * boards/arm/sam34/sam4e-ek/src/sam_ili9341.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * References: + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* References: * - This driver is a modification of the SAMA4E ILI9325 LCD driver. * - ILI9341 Datasheet, Version: V1.11, ILI9341_DS_V1.11.pdf, * ILI TECHNOLOGY CORP., * - SAM4Ex Datasheet, Atmel * - Atmel ILI93241 Sample code for the SAM4E - * - * Some the LCD and SMC initialization logic comes from Atmel sample code - * for the SAM4E. The Atmel sample code has a BSD-like license with an - * additional requirement that restricts the code from being used on - * anything but Atmel microprocessors. - * I do not believe that this file "derives" from the Atmel sample code - * nor do I believe that it contains anything but generally available - * ILI9341 and SAM4x logic. Credit, however, needs to go where it is due. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ + */ /**************************************************************************** * diff --git a/boards/arm/sam34/sam4l-xplained/scripts/Make.defs b/boards/arm/sam34/sam4l-xplained/scripts/Make.defs index a2a63be02c2..a967cd08d63 100644 --- a/boards/arm/sam34/sam4l-xplained/scripts/Make.defs +++ b/boards/arm/sam34/sam4l-xplained/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sam34/sam4s-xplained-pro/configs/fs/defconfig b/boards/arm/sam34/sam4s-xplained-pro/configs/fs/defconfig index e9005e4337e..999ca206144 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/configs/fs/defconfig +++ b/boards/arm/sam34/sam4s-xplained-pro/configs/fs/defconfig @@ -8,6 +8,7 @@ # CONFIG_ARCH_RAMFUNCS is not set # CONFIG_MTD_NAND_BLOCKCHECK is not set # CONFIG_MTD_NAND_SWECC is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="sam4s-xplained-pro" CONFIG_ARCH_BOARD_SAM4S_XPLAINED_PRO=y diff --git a/boards/arm/sam34/sam4s-xplained-pro/include/board.h b/boards/arm/sam34/sam4s-xplained-pro/include/board.h index cf873e692e1..8a0b61ddf3f 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/include/board.h +++ b/boards/arm/sam34/sam4s-xplained-pro/include/board.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/sam34/sam4s-xplained-pro/include/board.h * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4s-xplained-pro/scripts/Make.defs b/boards/arm/sam34/sam4s-xplained-pro/scripts/Make.defs index 30b56007b5f..e022fbcae51 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/scripts/Make.defs +++ b/boards/arm/sam34/sam4s-xplained-pro/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sam34/sam4s-xplained-pro/src/sam4s-xplained-pro.h b/boards/arm/sam34/sam4s-xplained-pro/src/sam4s-xplained-pro.h index f2b95babe52..b1e6b4ffd9b 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/src/sam4s-xplained-pro.h +++ b/boards/arm/sam34/sam4s-xplained-pro/src/sam4s-xplained-pro.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/sam34/sam4s-xplained-pro/src/sam4s-xplained-pro.h * - * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4s-xplained-pro/src/sam_appinit.c b/boards/arm/sam34/sam4s-xplained-pro/src/sam_appinit.c index ad86614e90d..b5e702f9bf6 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/src/sam_appinit.c +++ b/boards/arm/sam34/sam4s-xplained-pro/src/sam_appinit.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/sam34/sam4s-xplained-pro/src/sam_appinit.c * - * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4s-xplained-pro/src/sam_autoleds.c b/boards/arm/sam34/sam4s-xplained-pro/src/sam_autoleds.c index 96abf8ed049..f5e9343d3fb 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/src/sam_autoleds.c +++ b/boards/arm/sam34/sam4s-xplained-pro/src/sam_autoleds.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/sam34/sam4s-xplained-pro/src/sam_autoleds.c * - * Copyright (C) 2014, 2015 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4s-xplained-pro/src/sam_buttons.c b/boards/arm/sam34/sam4s-xplained-pro/src/sam_buttons.c index aee2783ada6..10cb1f631f8 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/src/sam_buttons.c +++ b/boards/arm/sam34/sam4s-xplained-pro/src/sam_buttons.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/sam34/sam4s-xplained-pro/src/sam_buttons.c * - * Copyright (C) 2014-2015, 2017 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4s-xplained-pro/src/sam_hsmci.c b/boards/arm/sam34/sam4s-xplained-pro/src/sam_hsmci.c index 9da56850fbf..d27904cb3a7 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/src/sam_hsmci.c +++ b/boards/arm/sam34/sam4s-xplained-pro/src/sam_hsmci.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/sam34/sam4s-xplained-pro/src/sam_hsmci.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4s-xplained-pro/src/sam_udp.c b/boards/arm/sam34/sam4s-xplained-pro/src/sam_udp.c index eee3b91fce1..d17bb46663e 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/src/sam_udp.c +++ b/boards/arm/sam34/sam4s-xplained-pro/src/sam_udp.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/sam34/sam4s-xplained-pro/src/sam_udp.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4s-xplained-pro/src/sam_userleds.c b/boards/arm/sam34/sam4s-xplained-pro/src/sam_userleds.c index 081df67b959..ded8120f7f7 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/src/sam_userleds.c +++ b/boards/arm/sam34/sam4s-xplained-pro/src/sam_userleds.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/sam34/sam4s-xplained-pro/src/sam_userleds.c * - * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c b/boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c index 0a00a0f85a3..05b5d281324 100644 --- a/boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c +++ b/boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/sam34/sam4s-xplained-pro/src/sam_wdt.c * - * Copyright (C) 2014, 2016-2018 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Bob Doiron + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sam34/sam4s-xplained/scripts/Make.defs b/boards/arm/sam34/sam4s-xplained/scripts/Make.defs index 597c2d88bff..7d23dff23dc 100644 --- a/boards/arm/sam34/sam4s-xplained/scripts/Make.defs +++ b/boards/arm/sam34/sam4s-xplained/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sama5/giant-board/Kconfig b/boards/arm/sama5/giant-board/Kconfig index c11596ef0da..8106dddfbf8 100644 --- a/boards/arm/sama5/giant-board/Kconfig +++ b/boards/arm/sama5/giant-board/Kconfig @@ -59,7 +59,7 @@ config SAMA5D27_SDMMC0_MOUNT config SAMA5D27_SDMMC0_MOUNT_BLKDEV string "SDMMC0 block device name" - default mmc0 + default "mmc0" depends on SAMA5_SDMMC0 config SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT @@ -97,7 +97,7 @@ config SAMA5D27_SDMMC1_MOUNT config SAMA5D27_SDMMC1_MOUNT_BLKDEV string "SDMMC1 block device name" - default mmc1 + default "mmc1" depends on SAMA5_SDMMC1 config SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT diff --git a/boards/arm/sama5/giant-board/scripts/Make.defs b/boards/arm/sama5/giant-board/scripts/Make.defs index 1a4fb309620..d7150b25617 100644 --- a/boards/arm/sama5/giant-board/scripts/Make.defs +++ b/boards/arm/sama5/giant-board/scripts/Make.defs @@ -64,8 +64,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -80,9 +80,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sama5/sama5d2-xult/Kconfig b/boards/arm/sama5/sama5d2-xult/Kconfig index b63d62eadb0..bff78a71cae 100644 --- a/boards/arm/sama5/sama5d2-xult/Kconfig +++ b/boards/arm/sama5/sama5d2-xult/Kconfig @@ -67,7 +67,7 @@ config SAMA5D27_SDMMC0_MOUNT config SAMA5D27_SDMMC0_MOUNT_BLKDEV string "SDMMC0 block device name" - default mmc0 + default "mmc0" depends on SAMA5_SDMMC0 config SAMA5D27_SDMMC0_MOUNT_MOUNTPOINT @@ -105,7 +105,7 @@ config SAMA5D27_SDMMC1_MOUNT config SAMA5D27_SDMMC1_MOUNT_BLKDEV string "SDMMC1 block device name" - default mmc1 + default "mmc1" depends on SAMA5_SDMMC1 config SAMA5D27_SDMMC1_MOUNT_MOUNTPOINT diff --git a/boards/arm/sama5/sama5d2-xult/scripts/Make.defs b/boards/arm/sama5/sama5d2-xult/scripts/Make.defs index 75b1a4f7924..2ce513e19e0 100644 --- a/boards/arm/sama5/sama5d2-xult/scripts/Make.defs +++ b/boards/arm/sama5/sama5d2-xult/scripts/Make.defs @@ -64,8 +64,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -80,9 +80,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sama5/sama5d3-xplained/scripts/Make.defs b/boards/arm/sama5/sama5d3-xplained/scripts/Make.defs index 180e5172546..b60ad635392 100644 --- a/boards/arm/sama5/sama5d3-xplained/scripts/Make.defs +++ b/boards/arm/sama5/sama5d3-xplained/scripts/Make.defs @@ -60,8 +60,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -76,9 +76,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sama5/sama5d3-xplained/src/sam_nandflash.c b/boards/arm/sama5/sama5d3-xplained/src/sam_nandflash.c index aad48eb22ad..cef9972c5fd 100644 --- a/boards/arm/sama5/sama5d3-xplained/src/sam_nandflash.c +++ b/boards/arm/sama5/sama5d3-xplained/src/sam_nandflash.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/sama5/sama5d3-xplained/src/sam_nandflash.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Most of this file derives from Atmel sample code for the SAMA5D3-Xplained - * board. That sample code has licensing that is compatible with the NuttX - * modified BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2012, Atmel Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor Atmel nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sama5/sama5d3-xplained/src/sam_sdram.c b/boards/arm/sama5/sama5d3-xplained/src/sam_sdram.c index fb975dc1c6b..01a3a8bb7cc 100644 --- a/boards/arm/sama5/sama5d3-xplained/src/sam_sdram.c +++ b/boards/arm/sama5/sama5d3-xplained/src/sam_sdram.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/sama5/sama5d3-xplained/src/sam_sdram.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Most of this file derives from Atmel sample code for the SAMA5D3x-E - * board. That sample code has licensing that is compatible with the NuttX - * modified BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2012, Atmel Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor Atmel nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sama5/sama5d3x-ek/configs/ov2640/defconfig b/boards/arm/sama5/sama5d3x-ek/configs/ov2640/defconfig index ed89e8d319e..4cf0470d36b 100644 --- a/boards/arm/sama5/sama5d3x-ek/configs/ov2640/defconfig +++ b/boards/arm/sama5/sama5d3x-ek/configs/ov2640/defconfig @@ -5,6 +5,7 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # +CONFIG_ALLOW_GPL_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="sama5d3x-ek" CONFIG_ARCH_BOARD_SAMA5D3X_EK=y diff --git a/boards/arm/sama5/sama5d3x-ek/scripts/Make.defs b/boards/arm/sama5/sama5d3x-ek/scripts/Make.defs index 1a7eabfc28e..0317edc2515 100644 --- a/boards/arm/sama5/sama5d3x-ek/scripts/Make.defs +++ b/boards/arm/sama5/sama5d3x-ek/scripts/Make.defs @@ -80,8 +80,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -96,9 +96,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sama5/sama5d3x-ek/src/sam_nandflash.c b/boards/arm/sama5/sama5d3x-ek/src/sam_nandflash.c index b4e71ffcb32..73da1b97135 100644 --- a/boards/arm/sama5/sama5d3x-ek/src/sam_nandflash.c +++ b/boards/arm/sama5/sama5d3x-ek/src/sam_nandflash.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/sama5/sama5d3x-ek/src/sam_nandflash.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Most of this file derives from Atmel sample code for the SAMA5D3x-EK - * board. That sample code has licensing that is compatible with the NuttX - * modified BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2012, Atmel Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor Atmel nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sama5/sama5d3x-ek/src/sam_norflash.c b/boards/arm/sama5/sama5d3x-ek/src/sam_norflash.c index b9e8b20d33f..abc1bfd1f1b 100644 --- a/boards/arm/sama5/sama5d3x-ek/src/sam_norflash.c +++ b/boards/arm/sama5/sama5d3x-ek/src/sam_norflash.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/sama5/sama5d3x-ek/src/sam_norflash.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Most of this file derives from Atmel sample code for the SAMA5D3x-EK - * board. That sample code has licensing that is compatible with the NuttX - * modified BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2012, Atmel Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor Atmel nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sama5/sama5d3x-ek/src/sam_sdram.c b/boards/arm/sama5/sama5d3x-ek/src/sam_sdram.c index bf891f03592..3593bc70c44 100644 --- a/boards/arm/sama5/sama5d3x-ek/src/sam_sdram.c +++ b/boards/arm/sama5/sama5d3x-ek/src/sam_sdram.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/sama5/sama5d3x-ek/src/sam_sdram.c * - * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Most of this file derives from Atmel sample code for the SAMA5D3x-E - * board. That sample code has licensing that is compatible with the NuttX - * modified BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2012, Atmel Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor Atmel nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sama5/sama5d4-ek/configs/knsh/Make.defs b/boards/arm/sama5/sama5d4-ek/configs/knsh/Make.defs index edd107f68eb..cd77243ac94 100644 --- a/boards/arm/sama5/sama5d4-ek/configs/knsh/Make.defs +++ b/boards/arm/sama5/sama5d4-ek/configs/knsh/Make.defs @@ -67,8 +67,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -83,9 +83,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sama5/sama5d4-ek/scripts/Make.defs b/boards/arm/sama5/sama5d4-ek/scripts/Make.defs index ae2a2bead04..f543d710d01 100644 --- a/boards/arm/sama5/sama5d4-ek/scripts/Make.defs +++ b/boards/arm/sama5/sama5d4-ek/scripts/Make.defs @@ -64,8 +64,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -80,9 +80,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/sama5/sama5d4-ek/src/sam_nandflash.c b/boards/arm/sama5/sama5d4-ek/src/sam_nandflash.c index 8d1c99a519a..110fe499e02 100644 --- a/boards/arm/sama5/sama5d4-ek/src/sam_nandflash.c +++ b/boards/arm/sama5/sama5d4-ek/src/sam_nandflash.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/sama5/sama5d4-ek/src/sam_nandflash.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Most of this file derives from Atmel sample code for the SAMA5D4-EK - * board. That sample code has licensing that is compatible with the NuttX - * modified BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2012, Atmel Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor Atmel nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/sama5/sama5d4-ek/src/sam_sdram.c b/boards/arm/sama5/sama5d4-ek/src/sam_sdram.c index 45338132989..a8f4297e2dc 100644 --- a/boards/arm/sama5/sama5d4-ek/src/sam_sdram.c +++ b/boards/arm/sama5/sama5d4-ek/src/sam_sdram.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/sama5/sama5d4-ek/src/sam_sdram.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Most of this file derives from Atmel sample code for the SAMA5D4x-EK - * board. That sample code has licensing that is compatible with the NuttX - * modified BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2013, Atmel Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor Atmel nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/samd2l2/arduino-m0/scripts/Make.defs b/boards/arm/samd2l2/arduino-m0/scripts/Make.defs index 1946a0b8d50..69942fb27e0 100644 --- a/boards/arm/samd2l2/arduino-m0/scripts/Make.defs +++ b/boards/arm/samd2l2/arduino-m0/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samd2l2/circuit-express/scripts/Make.defs b/boards/arm/samd2l2/circuit-express/scripts/Make.defs index 9315c22eb8c..8d1f14b0667 100644 --- a/boards/arm/samd2l2/circuit-express/scripts/Make.defs +++ b/boards/arm/samd2l2/circuit-express/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samd2l2/samd20-xplained/scripts/Make.defs b/boards/arm/samd2l2/samd20-xplained/scripts/Make.defs index bdb95d1af23..4e51461ba08 100644 --- a/boards/arm/samd2l2/samd20-xplained/scripts/Make.defs +++ b/boards/arm/samd2l2/samd20-xplained/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samd2l2/samd21-xplained/scripts/Make.defs b/boards/arm/samd2l2/samd21-xplained/scripts/Make.defs index 362cab6f470..8db7e33db8e 100644 --- a/boards/arm/samd2l2/samd21-xplained/scripts/Make.defs +++ b/boards/arm/samd2l2/samd21-xplained/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samd2l2/saml21-xplained/scripts/Make.defs b/boards/arm/samd2l2/saml21-xplained/scripts/Make.defs index a096d31545e..54ab24ca9a0 100644 --- a/boards/arm/samd2l2/saml21-xplained/scripts/Make.defs +++ b/boards/arm/samd2l2/saml21-xplained/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samd5e5/metro-m4/scripts/Make.defs b/boards/arm/samd5e5/metro-m4/scripts/Make.defs index 5b553c1f2d8..20bb373fc9f 100644 --- a/boards/arm/samd5e5/metro-m4/scripts/Make.defs +++ b/boards/arm/samd5e5/metro-m4/scripts/Make.defs @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,9 +70,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samd5e5/same54-xplained-pro/scripts/Make.defs b/boards/arm/samd5e5/same54-xplained-pro/scripts/Make.defs index 0f7ff5de832..0a81acc9eb0 100644 --- a/boards/arm/samd5e5/same54-xplained-pro/scripts/Make.defs +++ b/boards/arm/samd5e5/same54-xplained-pro/scripts/Make.defs @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,9 +70,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samd5e5/same54-xplained-pro/src/sam_phyinit.c b/boards/arm/samd5e5/same54-xplained-pro/src/sam_phyinit.c index cb9c5d22268..27345c30b09 100644 --- a/boards/arm/samd5e5/same54-xplained-pro/src/sam_phyinit.c +++ b/boards/arm/samd5e5/same54-xplained-pro/src/sam_phyinit.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/samd5e5/same54-xplained-pro/src/sam_phyinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/samv7/same70-xplained/kernel/Makefile b/boards/arm/samv7/same70-xplained/kernel/Makefile index bf7b56012b4..d7fe60f775c 100644 --- a/boards/arm/samv7/same70-xplained/kernel/Makefile +++ b/boards/arm/samv7/same70-xplained/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/samv7/same70-xplained/kernel/sam_userspace.c b/boards/arm/samv7/same70-xplained/kernel/sam_userspace.c index ef2e5d83d4b..1a58a1f4d35 100644 --- a/boards/arm/samv7/same70-xplained/kernel/sam_userspace.c +++ b/boards/arm/samv7/same70-xplained/kernel/sam_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/samv7/same70-xplained/scripts/Make.defs b/boards/arm/samv7/same70-xplained/scripts/Make.defs index 565fd44e036..cf6d86e30c6 100644 --- a/boards/arm/samv7/same70-xplained/scripts/Make.defs +++ b/boards/arm/samv7/same70-xplained/scripts/Make.defs @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,9 +70,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samv7/same70-xplained/src/sam_sdram.c b/boards/arm/samv7/same70-xplained/src/sam_sdram.c index c77a4f61234..3812b0c8d43 100644 --- a/boards/arm/samv7/same70-xplained/src/sam_sdram.c +++ b/boards/arm/samv7/same70-xplained/src/sam_sdram.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/samv7/same70-xplained/src/sam_sdram.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Most of this file derives from Atmel sample code for the SAME70-XPLD - * board. That sample code has licensing that is compatible with the NuttX - * modified BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2012, Atmel Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor Atmel nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/samv7/same70-xplained/src/sam_xbee.c b/boards/arm/samv7/same70-xplained/src/sam_xbee.c index 094d8941757..0c9aa217b88 100644 --- a/boards/arm/samv7/same70-xplained/src/sam_xbee.c +++ b/boards/arm/samv7/same70-xplained/src/sam_xbee.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/samv7/same70-xplained/src/sam_xbee.c * - * Copyright (C) 2017 Verge Inc, All rights reserver - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/samv7/samv71-xult/configs/knsh/Make.defs b/boards/arm/samv7/samv71-xult/configs/knsh/Make.defs index 5e73b00c3ac..5edaf3c54ec 100644 --- a/boards/arm/samv7/samv71-xult/configs/knsh/Make.defs +++ b/boards/arm/samv7/samv71-xult/configs/knsh/Make.defs @@ -54,8 +54,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -69,9 +69,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samv7/samv71-xult/kernel/Makefile b/boards/arm/samv7/samv71-xult/kernel/Makefile index cde1a5cdc56..bda98a6124c 100644 --- a/boards/arm/samv7/samv71-xult/kernel/Makefile +++ b/boards/arm/samv7/samv71-xult/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/samv7/samv71-xult/kernel/sam_userspace.c b/boards/arm/samv7/samv71-xult/kernel/sam_userspace.c index 58e863c4c98..f0b8fc2224d 100644 --- a/boards/arm/samv7/samv71-xult/kernel/sam_userspace.c +++ b/boards/arm/samv7/samv71-xult/kernel/sam_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/samv7/samv71-xult/scripts/Make.defs b/boards/arm/samv7/samv71-xult/scripts/Make.defs index 5a47a196347..0aa116e9b87 100644 --- a/boards/arm/samv7/samv71-xult/scripts/Make.defs +++ b/boards/arm/samv7/samv71-xult/scripts/Make.defs @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,9 +70,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/samv7/samv71-xult/src/sam_ili9488.c b/boards/arm/samv7/samv71-xult/src/sam_ili9488.c index b8ab93a0f56..419324e043a 100644 --- a/boards/arm/samv7/samv71-xult/src/sam_ili9488.c +++ b/boards/arm/samv7/samv71-xult/src/sam_ili9488.c @@ -1,48 +1,28 @@ /**************************************************************************** * boards/arm/samv7/samv71-xult/src/sam_ili9488.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * References: + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* References: * - This driver is a modification of the SAMA4E ILI9341 LCD driver. * - Atmel ILI93241 Sample code for the SAM4E * - Atmel ILI9488 Sample code for the SAMV71 - * - * Some the LCD and SMC initialization logic comes from Atmel sample code - * for the SAMV7. The Atmel sample code has two-clause BSD-like license - * which does not require this copyright statement, but here it is anyway: - * - * Copyright (c) 2014, Atmel Corporation - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX, Atmel, nor the names of contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ + */ /* maXTouch Xplained Pro Xplained Pro LCD Connector ************************* * @@ -461,7 +441,7 @@ static const uint32_t g_lcdpin[] = */ static uint16_t g_runbuffer[LCD_RUNBUFFER_BYTES] - __attribute__((aligned(LCD_ALIGN))); + aligned_data(LCD_ALIGN); /* This structure describes the overall LCD video controller */ diff --git a/boards/arm/samv7/samv71-xult/src/sam_sdram.c b/boards/arm/samv7/samv71-xult/src/sam_sdram.c index b43cee56110..3314377faa9 100644 --- a/boards/arm/samv7/samv71-xult/src/sam_sdram.c +++ b/boards/arm/samv7/samv71-xult/src/sam_sdram.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/samv7/samv71-xult/src/sam_sdram.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Most of this file derives from Atmel sample code for the SAMV71-XULT - * board. That sample code has licensing that is compatible with the NuttX - * modified BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2012, Atmel Corporation - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor Atmel nor the names of its contributors may - * be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/include/board.h b/boards/arm/stm32/axoloti/include/board.h index ab47a71fc11..063044d8c5a 100644 --- a/boards/arm/stm32/axoloti/include/board.h +++ b/boards/arm/stm32/axoloti/include/board.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/include/board.h * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/scripts/Make.defs b/boards/arm/stm32/axoloti/scripts/Make.defs index 34acc9f56b6..9e7b5af39cc 100644 --- a/boards/arm/stm32/axoloti/scripts/Make.defs +++ b/boards/arm/stm32/axoloti/scripts/Make.defs @@ -51,8 +51,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -79,9 +79,6 @@ else endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/axoloti/src/Make.defs b/boards/arm/stm32/axoloti/src/Make.defs index a0ce185aed3..de4e892cce8 100644 --- a/boards/arm/stm32/axoloti/src/Make.defs +++ b/boards/arm/stm32/axoloti/src/Make.defs @@ -1,35 +1,20 @@ ############################################################################ # boards/arm/stm32/axoloti/src/Make.defs # -# Copyright (C) 2019 Gregory Nutt. All rights reserved. -# Author: Jason T. Harris +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/stm32/axoloti/src/axoloti.h b/boards/arm/stm32/axoloti/src/axoloti.h index d8a356b4825..7793568321f 100644 --- a/boards/arm/stm32/axoloti/src/axoloti.h +++ b/boards/arm/stm32/axoloti/src/axoloti.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/src/axoloti.h * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/src/stm32_adau1961.c b/boards/arm/stm32/axoloti/src/stm32_adau1961.c index 3d3a55ca98c..8e6752f67ea 100644 --- a/boards/arm/stm32/axoloti/src/stm32_adau1961.c +++ b/boards/arm/stm32/axoloti/src/stm32_adau1961.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/src/stm32_adau1961.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/src/stm32_boot.c b/boards/arm/stm32/axoloti/src/stm32_boot.c index 1a0fc4fcdf2..ae14ba72f39 100644 --- a/boards/arm/stm32/axoloti/src/stm32_boot.c +++ b/boards/arm/stm32/axoloti/src/stm32_boot.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/src/stm32_boot.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/src/stm32_bringup.c b/boards/arm/stm32/axoloti/src/stm32_bringup.c index 71c9e376819..a01d93818fa 100644 --- a/boards/arm/stm32/axoloti/src/stm32_bringup.c +++ b/boards/arm/stm32/axoloti/src/stm32_bringup.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/src/stm32_bringup.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/src/stm32_buttons.c b/boards/arm/stm32/axoloti/src/stm32_buttons.c index d7a66630733..0421c6ebae2 100644 --- a/boards/arm/stm32/axoloti/src/stm32_buttons.c +++ b/boards/arm/stm32/axoloti/src/stm32_buttons.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/src/stm32_buttons.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/src/stm32_extmem.c b/boards/arm/stm32/axoloti/src/stm32_extmem.c index 108c6774148..c6ab53596e4 100644 --- a/boards/arm/stm32/axoloti/src/stm32_extmem.c +++ b/boards/arm/stm32/axoloti/src/stm32_extmem.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/src/stm32_extmem.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/src/stm32_sdio.c b/boards/arm/stm32/axoloti/src/stm32_sdio.c index d602429b329..47cee08e5e6 100644 --- a/boards/arm/stm32/axoloti/src/stm32_sdio.c +++ b/boards/arm/stm32/axoloti/src/stm32_sdio.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/src/stm32_sdio.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/src/stm32_usbhost.c b/boards/arm/stm32/axoloti/src/stm32_usbhost.c index e8f6efc6b58..c6a6a8b5c79 100644 --- a/boards/arm/stm32/axoloti/src/stm32_usbhost.c +++ b/boards/arm/stm32/axoloti/src/stm32_usbhost.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/src/stm32_usbhost.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/axoloti/src/stm32_userleds.c b/boards/arm/stm32/axoloti/src/stm32_userleds.c index fc15d815c53..d7ae3eda603 100644 --- a/boards/arm/stm32/axoloti/src/stm32_userleds.c +++ b/boards/arm/stm32/axoloti/src/stm32_userleds.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/axoloti/src/stm32_userleds.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Jason T. Harris + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/b-g431b-esc1/scripts/Make.defs b/boards/arm/stm32/b-g431b-esc1/scripts/Make.defs index db3f58d5c1e..f8bc20540e5 100644 --- a/boards/arm/stm32/b-g431b-esc1/scripts/Make.defs +++ b/boards/arm/stm32/b-g431b-esc1/scripts/Make.defs @@ -57,19 +57,16 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif # Provide map file needed by the "Memory Allocation" view in Eclipse: -LDFLAGS += -Wl,-Map=$(TOPDIR)/NuttX.map -Wl,--gc-sections +LDFLAGS += -Map=$(TOPDIR)/NuttX.map --gc-sections # Embed absolute path to source file in debug information so that Eclipse # source level debugging won't get confused. See: diff --git a/boards/arm/stm32/b-g474e-dpow1/scripts/Make.defs b/boards/arm/stm32/b-g474e-dpow1/scripts/Make.defs index 588bd53a96c..a9326790e7e 100644 --- a/boards/arm/stm32/b-g474e-dpow1/scripts/Make.defs +++ b/boards/arm/stm32/b-g474e-dpow1/scripts/Make.defs @@ -57,19 +57,16 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif # Provide map file needed by the "Memory Allocation" view in Eclipse: -LDFLAGS += -Wl,-Map=$(TOPDIR)/NuttX.map -Wl,--gc-sections +LDFLAGS += -Map=$(TOPDIR)/NuttX.map --gc-sections # Embed absolute path to source file in debug information so that Eclipse # source level debugging won't get confused. See: diff --git a/boards/arm/stm32/clicker2-stm32/include/board.h b/boards/arm/stm32/clicker2-stm32/include/board.h index dd9205db522..f13ffc0884c 100644 --- a/boards/arm/stm32/clicker2-stm32/include/board.h +++ b/boards/arm/stm32/clicker2-stm32/include/board.h @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/stm32/clicker2-stm32/include/board.h * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Modified from: - * boards/stm32f4discovery/include/board.h - * Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/clicker2-stm32/kernel/Makefile b/boards/arm/stm32/clicker2-stm32/kernel/Makefile index f9c5313e99e..ef7dcf7e1cc 100644 --- a/boards/arm/stm32/clicker2-stm32/kernel/Makefile +++ b/boards/arm/stm32/clicker2-stm32/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32/clicker2-stm32/kernel/stm32_userspace.c b/boards/arm/stm32/clicker2-stm32/kernel/stm32_userspace.c index 1a58e2fd9ca..59a268dc020 100644 --- a/boards/arm/stm32/clicker2-stm32/kernel/stm32_userspace.c +++ b/boards/arm/stm32/clicker2-stm32/kernel/stm32_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32/clicker2-stm32/scripts/Make.defs b/boards/arm/stm32/clicker2-stm32/scripts/Make.defs index 9abdaa040e3..4644716e7f9 100644 --- a/boards/arm/stm32/clicker2-stm32/scripts/Make.defs +++ b/boards/arm/stm32/clicker2-stm32/scripts/Make.defs @@ -56,8 +56,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -71,9 +71,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/clicker2-stm32/src/stm32_automount.c b/boards/arm/stm32/clicker2-stm32/src/stm32_automount.c index fa72cc9682f..b2a0c81fa06 100644 --- a/boards/arm/stm32/clicker2-stm32/src/stm32_automount.c +++ b/boards/arm/stm32/clicker2-stm32/src/stm32_automount.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/clicker2-stm32/src/stm32_automount.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/clicker2-stm32/src/stm32_mmcsd.c b/boards/arm/stm32/clicker2-stm32/src/stm32_mmcsd.c index 7de3742cb1f..ab91c67ed2f 100644 --- a/boards/arm/stm32/clicker2-stm32/src/stm32_mmcsd.c +++ b/boards/arm/stm32/clicker2-stm32/src/stm32_mmcsd.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/clicker2-stm32/src/stm32_mmcsd.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/clicker2-stm32/src/stm32_xbee.c b/boards/arm/stm32/clicker2-stm32/src/stm32_xbee.c index 7d296685028..810e61863cb 100644 --- a/boards/arm/stm32/clicker2-stm32/src/stm32_xbee.c +++ b/boards/arm/stm32/clicker2-stm32/src/stm32_xbee.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/clicker2-stm32/src/stm32_xbee.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/include/board.h b/boards/arm/stm32/cloudctrl/include/board.h index 9679cfa30db..af7c1b8c747 100644 --- a/boards/arm/stm32/cloudctrl/include/board.h +++ b/boards/arm/stm32/cloudctrl/include/board.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/include/board.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/scripts/Make.defs b/boards/arm/stm32/cloudctrl/scripts/Make.defs index ef7539b2880..2304381ec21 100644 --- a/boards/arm/stm32/cloudctrl/scripts/Make.defs +++ b/boards/arm/stm32/cloudctrl/scripts/Make.defs @@ -57,13 +57,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-eabi-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/cloudctrl/src/Make.defs b/boards/arm/stm32/cloudctrl/src/Make.defs index abb672623da..a63bcb5be76 100644 --- a/boards/arm/stm32/cloudctrl/src/Make.defs +++ b/boards/arm/stm32/cloudctrl/src/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/stm32/cloudctrl/src/Make.defs # -# Copyright (C) 2012 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Darcy Gong +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/stm32/cloudctrl/src/cloudctrl.h b/boards/arm/stm32/cloudctrl/src/cloudctrl.h index da933aae22a..3d56e127543 100644 --- a/boards/arm/stm32/cloudctrl/src/cloudctrl.h +++ b/boards/arm/stm32/cloudctrl/src/cloudctrl.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/cloudctrl.h * - * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_adc.c b/boards/arm/stm32/cloudctrl/src/stm32_adc.c index c99e112ebe0..86730be4e43 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_adc.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_adc.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_adc.c * - * Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_appinit.c b/boards/arm/stm32/cloudctrl/src/stm32_appinit.c index d4707c9753a..3cd84937320 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_appinit.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_appinit.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_appinit.c * - * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_autoleds.c b/boards/arm/stm32/cloudctrl/src/stm32_autoleds.c index 98ce7e7d091..1542fe64ade 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_autoleds.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_autoleds.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_autoleds.c * - * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_boot.c b/boards/arm/stm32/cloudctrl/src/stm32_boot.c index 17bacc5a1b9..1828ffdde34 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_boot.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_boot.c * - * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_buttons.c b/boards/arm/stm32/cloudctrl/src/stm32_buttons.c index 8d98133b6e4..9e8ba0b61e3 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_buttons.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_buttons.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_buttons.c * - * Copyright (C) 2012, 2014-2015, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_chipid.c b/boards/arm/stm32/cloudctrl/src/stm32_chipid.c index 9c3702e5560..c1aacae7cc3 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_chipid.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_chipid.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_chipid.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_phyinit.c b/boards/arm/stm32/cloudctrl/src/stm32_phyinit.c index 8b10e48dee2..7618af512a5 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_phyinit.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_phyinit.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_phyinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_relays.c b/boards/arm/stm32/cloudctrl/src/stm32_relays.c index b8aa9970d3e..94f2b86e35f 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_relays.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_relays.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_relays.c * - * Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_spi.c b/boards/arm/stm32/cloudctrl/src/stm32_spi.c index c4f1ee2a76d..d50af9a336d 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_spi.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_spi.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_spi.c * - * Copyright (C) 2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_usb.c b/boards/arm/stm32/cloudctrl/src/stm32_usb.c index 45381b68946..959d605824b 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_usb.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_usb.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_usb.c * - * Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_usbmsc.c b/boards/arm/stm32/cloudctrl/src/stm32_usbmsc.c index cc85e8f5937..24ce467e253 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_usbmsc.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_usbmsc.c @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_usbmsc.c * - * Copyright (C) 2012, 2013, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Configure and register the STM32 SPI-based MMC/SD block driver. + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_userleds.c b/boards/arm/stm32/cloudctrl/src/stm32_userleds.c index 6c09421759e..2614e1112a4 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_userleds.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_userleds.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_userleds.c * - * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/cloudctrl/src/stm32_w25.c b/boards/arm/stm32/cloudctrl/src/stm32_w25.c index 55d191b9550..b857af88326 100644 --- a/boards/arm/stm32/cloudctrl/src/stm32_w25.c +++ b/boards/arm/stm32/cloudctrl/src/stm32_w25.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/cloudctrl/src/stm32_w25.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/common/Kconfig b/boards/arm/stm32/common/Kconfig index 4eef44c53cb..e029254339a 100644 --- a/boards/arm/stm32/common/Kconfig +++ b/boards/arm/stm32/common/Kconfig @@ -70,4 +70,12 @@ endif # BOARD_STM32_IHM16M1 endif # STM32_FOC +if SENSORS_HALL3PHASE + +config BOARD_STM32_HALL3PHASE_SAMPLES + int "3-phase Hall effect sensor number of samples" + default 10 + +endif # SENSORS_HALL3PHASE + endif # BOARD_STM32_COMMON diff --git a/boards/arm/stm32/common/include/board_hall3ph.h b/boards/arm/stm32/common/include/board_hall3ph.h new file mode 100644 index 00000000000..4b1431a5558 --- /dev/null +++ b/boards/arm/stm32/common/include/board_hall3ph.h @@ -0,0 +1,67 @@ +/**************************************************************************** + * boards/arm/stm32/common/include/board_hall3ph.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARD_HALL3PH_H +#define __BOARD_HALL3PH_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_hall3ph_initialize + * + * Description: + * Initialize the 3-phase Hall effect sensor driver for the given timer + * + * Input Parameters: + * devno - The device number, used to build the device path as /dev/hallN + * pha - phase A Hall effect sensor pin configuration + * phb - phase B Hall effect sensor pin configuration + * phc - phase C Hall effect sensor pin configuration + * + ****************************************************************************/ + +int board_hall3ph_initialize(int devno, int pha, int phb, int phc); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif // __BOARD_HALL3PH_H diff --git a/boards/arm/stm32/common/src/Make.defs b/boards/arm/stm32/common/src/Make.defs index 45e91b6f3f1..8fee81a4e8b 100644 --- a/boards/arm/stm32/common/src/Make.defs +++ b/boards/arm/stm32/common/src/Make.defs @@ -78,6 +78,10 @@ ifeq ($(CONFIG_SENSORS_QENCODER),y) CSRCS += stm32_qencoder.c endif +ifeq ($(CONFIG_SENSORS_HALL3PHASE),y) + CSRCS += board_hall3ph.c +endif + ifeq ($(CONFIG_SENSORS_INA219),y) CSRCS += stm32_ina219.c endif diff --git a/boards/arm/stm32/common/src/board_hall3ph.c b/boards/arm/stm32/common/src/board_hall3ph.c new file mode 100644 index 00000000000..913d0fc3d71 --- /dev/null +++ b/boards/arm/stm32/common/src/board_hall3ph.c @@ -0,0 +1,75 @@ +/**************************************************************************** + * boards/arm/stm32/common/src/board_hall3ph.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "stm32_hall3ph.h" +#include "board_hall3ph.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_hall3ph_initialize + * + * Description: + * Initialize the 3-phase Hall effect sensor driver + * + ****************************************************************************/ + +int board_hall3ph_initialize(int devno, int pha, int phb, int phc) +{ + struct stm32_hall3ph_cfg_s cfg; + char devpath[12]; + int ret = OK; + + /* Get configuration */ + + cfg.gpio_pha = pha; + cfg.gpio_phb = phb; + cfg.gpio_phc = phc; + cfg.samples = CONFIG_BOARD_STM32_HALL3PHASE_SAMPLES; + + /* Initialize a Hall effect sensor interface. */ + + snprintf(devpath, 12, "/dev/hall%d", devno); + + ret = stm32_hall3ph_initialize(devpath, &cfg); + if (ret < 0) + { + snerr("ERROR: stm32_hall3ph_initialize failed: %d\n", ret); + } + + return ret; +} diff --git a/boards/arm/stm32/common/src/stm32_lcd_backpack.c b/boards/arm/stm32/common/src/stm32_lcd_backpack.c index bb1e58939be..662acc68413 100644 --- a/boards/arm/stm32/common/src/stm32_lcd_backpack.c +++ b/boards/arm/stm32/common/src/stm32_lcd_backpack.c @@ -82,7 +82,7 @@ int board_lcd_backpack_init(int devno, int busno, int rows, int cols) return -ENODEV; } - /* Regiter the Segment LCD */ + /* Register the Segment LCD */ snprintf(devpath, 12, "/dev/slcd%d", devno); ret = pcf8574_lcd_backpack_register(devpath, i2c, &cfg); diff --git a/boards/arm/stm32/emw3162/README.txt b/boards/arm/stm32/emw3162/README.txt index d76fa8d1514..46af420d45f 100644 --- a/boards/arm/stm32/emw3162/README.txt +++ b/boards/arm/stm32/emw3162/README.txt @@ -3,8 +3,8 @@ README EMW3162 board (https://www.waveshare.com/EMW3162.htm) features the STM32F205RG MCU and Broadcom BCM43362KUBG Wi-Fi chip. - The STM32F205RG is a 120 MHz Cortex-M3 operation with 1Mbit Flash - memory and 128kbytes. + The STM32F205RG is a 120 MHz Cortex-M3 operation with 1MB Flash + memory and 128KB RAM. Contents ======== diff --git a/boards/arm/stm32/emw3162/configs/wlan/defconfig b/boards/arm/stm32/emw3162/configs/wlan/defconfig index fe1189ad052..16f9acfa6ba 100644 --- a/boards/arm/stm32/emw3162/configs/wlan/defconfig +++ b/boards/arm/stm32/emw3162/configs/wlan/defconfig @@ -27,6 +27,7 @@ CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y CONFIG_IEEE80211_BROADCOM_BCM43362=y +CONFIG_IEEE80211_BROADCOM_DMABUF_ALIGNMENT=16 CONFIG_IEEE80211_BROADCOM_FULLMAC_SDIO=y CONFIG_INTELHEX_BINARY=y CONFIG_LIBM=y diff --git a/boards/arm/stm32/emw3162/scripts/Make.defs b/boards/arm/stm32/emw3162/scripts/Make.defs index 718757550a6..cbc17c6ba87 100644 --- a/boards/arm/stm32/emw3162/scripts/Make.defs +++ b/boards/arm/stm32/emw3162/scripts/Make.defs @@ -55,9 +55,6 @@ NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/emw3162/scripts/ld.script b/boards/arm/stm32/emw3162/scripts/ld.script index eb3611a6f1d..493d32fa84f 100644 --- a/boards/arm/stm32/emw3162/scripts/ld.script +++ b/boards/arm/stm32/emw3162/scripts/ld.script @@ -45,11 +45,10 @@ SECTIONS *(.fixup) *(.gnu.warning) - . = ALIGN(0x4); wlan_firmware_image_location = .; *(.wlan_firmware_image .wlan_firmware_image.*) wlan_firmware_image_end = .; - . = ALIGN(0x4); + wlan_nvram_image_location = .; *(.wlan_nvram_image .wlan_nvram_image.*) wlan_nvram_image_end = .; diff --git a/boards/arm/stm32/et-stm32-stamp/scripts/Make.defs b/boards/arm/stm32/et-stm32-stamp/scripts/Make.defs index 2938181310f..adaef5ddcfd 100644 --- a/boards/arm/stm32/et-stm32-stamp/scripts/Make.defs +++ b/boards/arm/stm32/et-stm32-stamp/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/fire-stm32v2/scripts/Make.defs b/boards/arm/stm32/fire-stm32v2/scripts/Make.defs index 6f5df787e31..445a01b1c86 100644 --- a/boards/arm/stm32/fire-stm32v2/scripts/Make.defs +++ b/boards/arm/stm32/fire-stm32v2/scripts/Make.defs @@ -57,13 +57,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/hymini-stm32v/scripts/Make.defs b/boards/arm/stm32/hymini-stm32v/scripts/Make.defs index 5891cd9ab01..6e8fa4c7673 100644 --- a/boards/arm/stm32/hymini-stm32v/scripts/Make.defs +++ b/boards/arm/stm32/hymini-stm32v/scripts/Make.defs @@ -55,13 +55,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/maple/include/board.h b/boards/arm/stm32/maple/include/board.h index da1979d59d8..dd83eaa8802 100644 --- a/boards/arm/stm32/maple/include/board.h +++ b/boards/arm/stm32/maple/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/maple/include/board.h - * include/arch/board/board.h * - * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/maple/scripts/Make.defs b/boards/arm/stm32/maple/scripts/Make.defs index 6a729569cba..c881f3f4d92 100644 --- a/boards/arm/stm32/maple/scripts/Make.defs +++ b/boards/arm/stm32/maple/scripts/Make.defs @@ -55,13 +55,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/maple/scripts/ld.script b/boards/arm/stm32/maple/scripts/ld.script index 59e059d2867..e2346d3fd3e 100644 --- a/boards/arm/stm32/maple/scripts/ld.script +++ b/boards/arm/stm32/maple/scripts/ld.script @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/maple/scripts/ld.script * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/maple/scripts/ld.script.dfu b/boards/arm/stm32/maple/scripts/ld.script.dfu index e81f5a70026..288077d5002 100644 --- a/boards/arm/stm32/maple/scripts/ld.script.dfu +++ b/boards/arm/stm32/maple/scripts/ld.script.dfu @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/maple/scripts/ld.script.dfu * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/maple/src/Make.defs b/boards/arm/stm32/maple/src/Make.defs index 7bec4d12387..32f04dd8138 100644 --- a/boards/arm/stm32/maple/src/Make.defs +++ b/boards/arm/stm32/maple/src/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/stm32/maple/src/Make.defs # -# Copyright (C) 2013 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Librae +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/stm32/maple/src/stm32_boot.c b/boards/arm/stm32/maple/src/stm32_boot.c index 7db2fd0c47c..40fd612f7ec 100644 --- a/boards/arm/stm32/maple/src/stm32_boot.c +++ b/boards/arm/stm32/maple/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/maple/src/stm32_boot.c * - * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/maple/src/stm32_lcd.c b/boards/arm/stm32/maple/src/stm32_lcd.c index 77d2b62d27a..2621e37626c 100644 --- a/boards/arm/stm32/maple/src/stm32_lcd.c +++ b/boards/arm/stm32/maple/src/stm32_lcd.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/maple/src/stm32_lcd.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Modified: Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/maple/src/stm32_leds.c b/boards/arm/stm32/maple/src/stm32_leds.c index c0a264d41a5..b0bfbb80bd9 100644 --- a/boards/arm/stm32/maple/src/stm32_leds.c +++ b/boards/arm/stm32/maple/src/stm32_leds.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/maple/src/stm32_leds.c * - * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/maple/src/stm32_spi.c b/boards/arm/stm32/maple/src/stm32_spi.c index eec64e5b06e..2f96bfadad6 100644 --- a/boards/arm/stm32/maple/src/stm32_spi.c +++ b/boards/arm/stm32/maple/src/stm32_spi.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/maple/src/stm32_spi.c * - * Copyright (C) 2009, 2011-2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/maple/src/stm32_usbdev.c b/boards/arm/stm32/maple/src/stm32_usbdev.c index 96444ba62e7..a4a0a6460d8 100644 --- a/boards/arm/stm32/maple/src/stm32_usbdev.c +++ b/boards/arm/stm32/maple/src/stm32_usbdev.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/maple/src/stm32_usbdev.c * - * Copyright (C) 2009-2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/mikroe-stm32f4/kernel/Makefile b/boards/arm/stm32/mikroe-stm32f4/kernel/Makefile index 3c7023fc753..56e6186f62a 100644 --- a/boards/arm/stm32/mikroe-stm32f4/kernel/Makefile +++ b/boards/arm/stm32/mikroe-stm32f4/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32/mikroe-stm32f4/kernel/stm32_userspace.c b/boards/arm/stm32/mikroe-stm32f4/kernel/stm32_userspace.c index c8d38dc7935..10388bc8355 100644 --- a/boards/arm/stm32/mikroe-stm32f4/kernel/stm32_userspace.c +++ b/boards/arm/stm32/mikroe-stm32f4/kernel/stm32_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32/mikroe-stm32f4/scripts/Make.defs b/boards/arm/stm32/mikroe-stm32f4/scripts/Make.defs index ce284c2048b..afc8c7ebd3e 100644 --- a/boards/arm/stm32/mikroe-stm32f4/scripts/Make.defs +++ b/boards/arm/stm32/mikroe-stm32f4/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/mikroe-stm32f4/src/stm32_idle.c b/boards/arm/stm32/mikroe-stm32f4/src/stm32_idle.c index a51c65c7807..1dc230bdcb3 100644 --- a/boards/arm/stm32/mikroe-stm32f4/src/stm32_idle.c +++ b/boards/arm/stm32/mikroe-stm32f4/src/stm32_idle.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/mikroe-stm32f4/src/stm32_idle.c * - * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * http://www.apache.org/licenses/LICENSE-2.0 * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt9a.c b/boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt9a.c index 2eacc2b1aa3..d6d935463bf 100644 --- a/boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt9a.c +++ b/boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt9a.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt9a.c * - * Interface definition for the MI0283QT-9A LCD from Multi-Inno Technology - * Co., Ltd. - * LCD is based on the Ilitek ILI9341 LCD controller. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2012-2014 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * Modified: 2013-2014 by Ken Pettit to support Mikroe-STM32F4 board. - * Adapted by Tobias Duckworth for the MI0283QT-9A - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/mikroe-stm32f4/src/stm32_pm.c b/boards/arm/stm32/mikroe-stm32f4/src/stm32_pm.c index 06ebc60f495..5a8858ba12e 100644 --- a/boards/arm/stm32/mikroe-stm32f4/src/stm32_pm.c +++ b/boards/arm/stm32/mikroe-stm32f4/src/stm32_pm.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/mikroe-stm32f4/src/stm32_pm.c * - * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f103rb/Kconfig b/boards/arm/stm32/nucleo-f103rb/Kconfig index 9c3e50e491a..ff7982fb702 100644 --- a/boards/arm/stm32/nucleo-f103rb/Kconfig +++ b/boards/arm/stm32/nucleo-f103rb/Kconfig @@ -5,4 +5,12 @@ if ARCH_BOARD_NUCLEO_F103RB +if SENSORS_QENCODER + +config NUCLEO_F103RB_QETIMER + int "Timer to use with QE encoder" + default 2 + +endif # SENSORS_QENCODER + endif diff --git a/boards/arm/stm32/nucleo-f103rb/configs/qenco/defconfig b/boards/arm/stm32/nucleo-f103rb/configs/qenco/defconfig new file mode 100644 index 00000000000..4dda0e7ee04 --- /dev/null +++ b/boards/arm/stm32/nucleo-f103rb/configs/qenco/defconfig @@ -0,0 +1,56 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nucleo-f103rb" +CONFIG_ARCH_BOARD_NUCLEO_F103RB=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F103RB=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=5483 +CONFIG_BUILTIN=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEFAULT_SMALL=y +CONFIG_EXAMPLES_QENCODER=y +CONFIG_EXAMPLES_QENCODER_HAVE_MAXPOS=y +CONFIG_EXAMPLES_QENCODER_MAXPOS=8192 +CONFIG_INTELHEX_BINARY=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=1024 +CONFIG_NSH_LINELEN=80 +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=20480 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SENSORS=y +CONFIG_SENSORS_QENCODER=y +CONFIG_SERIAL_TERMIOS=y +CONFIG_START_DAY=5 +CONFIG_START_MONTH=7 +CONFIG_START_YEAR=2011 +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS=y +CONFIG_STM32_QENCODER_SAMPLE_FDTS_2=y +CONFIG_STM32_TIM2=y +CONFIG_STM32_TIM2_PARTIAL_REMAP_1=y +CONFIG_STM32_TIM2_QE=y +CONFIG_STM32_TIM2_QEPSC=0 +CONFIG_STM32_USART2=y +CONFIG_SYMTAB_ORDEREDBYNAME=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/stm32/nucleo-f103rb/scripts/Make.defs b/boards/arm/stm32/nucleo-f103rb/scripts/Make.defs index 4a8950ebae3..55bb6f32779 100644 --- a/boards/arm/stm32/nucleo-f103rb/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f103rb/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/nucleo-f103rb/src/stm32_bringup.c b/boards/arm/stm32/nucleo-f103rb/src/stm32_bringup.c index 32b97595306..bb100441749 100644 --- a/boards/arm/stm32/nucleo-f103rb/src/stm32_bringup.c +++ b/boards/arm/stm32/nucleo-f103rb/src/stm32_bringup.c @@ -37,6 +37,10 @@ # include #endif +#ifdef CONFIG_SENSORS_QENCODER +# include "board_qencoder.h" +#endif + #include "nucleo-f103rb.h" /**************************************************************************** @@ -122,6 +126,19 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_SENSORS_QENCODER + /* Initialize and register the qencoder driver */ + + ret = board_qencoder_initialize(0, CONFIG_NUCLEO_F103RB_QETIMER); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to register the qencoder: %d\n", + ret); + return ret; + } +#endif + UNUSED(ret); return OK; } diff --git a/boards/arm/stm32/nucleo-f207zg/scripts/Make.defs b/boards/arm/stm32/nucleo-f207zg/scripts/Make.defs index 7ec4ad364c8..f0adbf044b2 100644 --- a/boards/arm/stm32/nucleo-f207zg/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f207zg/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/nucleo-f302r8/Kconfig b/boards/arm/stm32/nucleo-f302r8/Kconfig index d021d0e5bfe..2679993956c 100644 --- a/boards/arm/stm32/nucleo-f302r8/Kconfig +++ b/boards/arm/stm32/nucleo-f302r8/Kconfig @@ -9,4 +9,12 @@ config NUCLEOF302R8_HIGHPRI bool "High priority interrupt test" default n +if SENSORS_QENCODER + +config NUCLEO_F302R8_QETIMER + int "Timer to use with QE encoder" + default 2 + +endif # SENSORS_QENCODER + endif diff --git a/boards/arm/stm32/nucleo-f302r8/configs/qenco/defconfig b/boards/arm/stm32/nucleo-f302r8/configs/qenco/defconfig new file mode 100644 index 00000000000..5d68501028b --- /dev/null +++ b/boards/arm/stm32/nucleo-f302r8/configs/qenco/defconfig @@ -0,0 +1,51 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nucleo-f302r8" +CONFIG_ARCH_BOARD_NUCLEO_F302R8=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F302R8=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_ARCH_IRQPRIO=y +CONFIG_BOARD_LOOPSPERMSEC=8499 +CONFIG_BOARD_STM32_COMMON=y +CONFIG_BUILTIN=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_EXAMPLES_QENCODER=y +CONFIG_EXAMPLES_QENCODER_HAVE_MAXPOS=y +CONFIG_EXAMPLES_QENCODER_MAXPOS=8192 +CONFIG_INTELHEX_BINARY=y +CONFIG_MQ_MAXMSGSIZE=5 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=16386 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SENSORS=y +CONFIG_SENSORS_QENCODER=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=10 +CONFIG_START_YEAR=2014 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS=y +CONFIG_STM32_QENCODER_SAMPLE_FDTS_2=y +CONFIG_STM32_TIM2=y +CONFIG_STM32_TIM2_QE=y +CONFIG_STM32_TIM2_QEPSC=0 +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/stm32/nucleo-f302r8/include/board.h b/boards/arm/stm32/nucleo-f302r8/include/board.h index bb9f5594e52..297fbae53e8 100644 --- a/boards/arm/stm32/nucleo-f302r8/include/board.h +++ b/boards/arm/stm32/nucleo-f302r8/include/board.h @@ -193,6 +193,11 @@ /* Alternate function pin selections ****************************************/ +/* TIM2 input ***************************************************************/ + +#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_2 | GPIO_PULLUP) /* PA15 */ +#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP) /* PB3 */ + /* USART */ /* By default the USART2 is connected to STLINK Virtual COM Port: diff --git a/boards/arm/stm32/nucleo-f302r8/scripts/Make.defs b/boards/arm/stm32/nucleo-f302r8/scripts/Make.defs index 97e2ba09d6c..d46a135e55f 100644 --- a/boards/arm/stm32/nucleo-f302r8/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f302r8/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/nucleo-f302r8/src/stm32_bringup.c b/boards/arm/stm32/nucleo-f302r8/src/stm32_bringup.c index 81d69eb7f41..3b1e172a926 100644 --- a/boards/arm/stm32/nucleo-f302r8/src/stm32_bringup.c +++ b/boards/arm/stm32/nucleo-f302r8/src/stm32_bringup.c @@ -37,6 +37,10 @@ # include #endif +#ifdef CONFIG_SENSORS_QENCODER +# include "board_qencoder.h" +#endif + #include "nucleo-f302r8.h" /**************************************************************************** @@ -127,6 +131,19 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_SENSORS_QENCODER + /* Initialize and register the qencoder driver */ + + ret = board_qencoder_initialize(0, CONFIG_NUCLEO_F302R8_QETIMER); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to register the qencoder: %d\n", + ret); + return ret; + } +#endif + UNUSED(ret); return OK; } diff --git a/boards/arm/stm32/nucleo-f303re/scripts/Make.defs b/boards/arm/stm32/nucleo-f303re/scripts/Make.defs index 6997cbb7079..cdc44cc0585 100644 --- a/boards/arm/stm32/nucleo-f303re/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f303re/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/nucleo-f303re/src/stm32_timer.c b/boards/arm/stm32/nucleo-f303re/src/stm32_timer.c index 7cb644520c0..cc8b753c9f6 100644 --- a/boards/arm/stm32/nucleo-f303re/src/stm32_timer.c +++ b/boards/arm/stm32/nucleo-f303re/src/stm32_timer.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f303re/src/stm32_timer.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * With modifications from Calvin Maguranis + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f303ze/scripts/Make.defs b/boards/arm/stm32/nucleo-f303ze/scripts/Make.defs index 96ad28cbc1f..1f745cb08ef 100644 --- a/boards/arm/stm32/nucleo-f303ze/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f303ze/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/nucleo-f334r8/scripts/Make.defs b/boards/arm/stm32/nucleo-f334r8/scripts/Make.defs index ab27c9a1f96..9affe5fd4e3 100644 --- a/boards/arm/stm32/nucleo-f334r8/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f334r8/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/nucleo-f410rb/scripts/Make.defs b/boards/arm/stm32/nucleo-f410rb/scripts/Make.defs index 340bef14efa..6e32dad0eb5 100644 --- a/boards/arm/stm32/nucleo-f410rb/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f410rb/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/nucleo-f412zg/include/board.h b/boards/arm/stm32/nucleo-f412zg/include/board.h index 6cccb250e17..d411a7915f0 100644 --- a/boards/arm/stm32/nucleo-f412zg/include/board.h +++ b/boards/arm/stm32/nucleo-f412zg/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f412zg/include/board.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Konstantin Berezenko + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * based on boards/nucleo-f4x1re/include/board.h + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f412zg/scripts/Make.defs b/boards/arm/stm32/nucleo-f412zg/scripts/Make.defs index 451a58039b0..4aba496203a 100644 --- a/boards/arm/stm32/nucleo-f412zg/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f412zg/scripts/Make.defs @@ -52,13 +52,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/nucleo-f412zg/src/nucleo-f412zg.h b/boards/arm/stm32/nucleo-f412zg/src/nucleo-f412zg.h index ba8edb72d75..59e515f54ed 100644 --- a/boards/arm/stm32/nucleo-f412zg/src/nucleo-f412zg.h +++ b/boards/arm/stm32/nucleo-f412zg/src/nucleo-f412zg.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f412zg/src/nucleo-f412zg.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Authors: Frank Bennett - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f412zg/src/stm32_boot.c b/boards/arm/stm32/nucleo-f412zg/src/stm32_boot.c index a878feaf775..2b530876ea4 100644 --- a/boards/arm/stm32/nucleo-f412zg/src/stm32_boot.c +++ b/boards/arm/stm32/nucleo-f412zg/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f412zg/src/stm32_boot.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f429zi/scripts/Make.defs b/boards/arm/stm32/nucleo-f429zi/scripts/Make.defs index c914082a4e1..b1401bbc3d0 100644 --- a/boards/arm/stm32/nucleo-f429zi/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f429zi/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_dma_alloc.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_dma_alloc.c index 244a91566ae..4dbdc303d1e 100644 --- a/boards/arm/stm32/nucleo-f429zi/src/stm32_dma_alloc.c +++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_dma_alloc.c @@ -60,7 +60,7 @@ static GRAN_HANDLE dma_allocator; */ static uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] - __attribute__((aligned(64))); + aligned_data(64); /**************************************************************************** * Public Functions diff --git a/boards/arm/stm32/nucleo-f446re/Kconfig b/boards/arm/stm32/nucleo-f446re/Kconfig index bc21d54050c..35d135fc343 100644 --- a/boards/arm/stm32/nucleo-f446re/Kconfig +++ b/boards/arm/stm32/nucleo-f446re/Kconfig @@ -5,10 +5,18 @@ if ARCH_BOARD_NUCLEO_F446RE +if SENSORS_QENCODER + config NUCLEO_F446RE_QETIMER int "Timer to use with QE encoder" default 3 - depends on SENSORS_QENCODER + +config NUCLEO_F446RE_QETIMER_TIM2_IHM08M1_MAP + bool "Use TIM2 QE pins to match IHM08M1 board pins" + default n + depends on STM32_TIM2_QE + +endif # SENSORS_QENCODER config NUCLEO_F446RE_AJOY_MINBUTTONS bool "Minimal Joystick Buttons" diff --git a/boards/arm/stm32/nucleo-f446re/configs/qenco/defconfig b/boards/arm/stm32/nucleo-f446re/configs/qenco/defconfig new file mode 100644 index 00000000000..a20d83c8e30 --- /dev/null +++ b/boards/arm/stm32/nucleo-f446re/configs/qenco/defconfig @@ -0,0 +1,52 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nucleo-f446re" +CONFIG_ARCH_BOARD_NUCLEO_F446RE=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32F446R=y +CONFIG_ARCH_INTERRUPTSTACK=1024 +CONFIG_ARCH_IRQPRIO=y +CONFIG_BOARD_LOOPSPERMSEC=8499 +CONFIG_BOARD_STM32_COMMON=y +CONFIG_BUILTIN=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_EXAMPLES_QENCODER=y +CONFIG_EXAMPLES_QENCODER_HAVE_MAXPOS=y +CONFIG_EXAMPLES_QENCODER_MAXPOS=8192 +CONFIG_INTELHEX_BINARY=y +CONFIG_MQ_MAXMSGSIZE=5 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NUCLEO_F446RE_QETIMER=2 +CONFIG_NUCLEO_F446RE_QETIMER_TIM2_IHM08M1_MAP=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=16386 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SENSORS=y +CONFIG_SENSORS_QENCODER=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=10 +CONFIG_START_YEAR=2014 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS=y +CONFIG_STM32_QENCODER_SAMPLE_FDTS_2=y +CONFIG_STM32_TIM2=y +CONFIG_STM32_TIM2_QE=y +CONFIG_STM32_TIM2_QEPSC=0 +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/stm32/nucleo-f446re/include/board.h b/boards/arm/stm32/nucleo-f446re/include/board.h index d5b48be1c75..b19019693d4 100644 --- a/boards/arm/stm32/nucleo-f446re/include/board.h +++ b/boards/arm/stm32/nucleo-f446re/include/board.h @@ -377,10 +377,18 @@ #define BUTTON_USER_BIT (1 << BUTTON_USER) -#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP) -#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP) +/* TIM2 input ***************************************************************/ + +#ifndef CONFIG_NUCLEO_F446RE_QETIMER_TIM2_IHM08M1_MAP +# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP) /* PA8 */ +# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP) /* PB0 */ +#else +# define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_2 | GPIO_PULLUP) /* PA15 */ +# define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP) /* PB3 */ +#endif /* TIM3 configuration *******************************************************/ + #define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1 #ifdef CONFIG_BOARD_STM32_IHM08M1 diff --git a/boards/arm/stm32/nucleo-f446re/scripts/Make.defs b/boards/arm/stm32/nucleo-f446re/scripts/Make.defs index 9f4d96d0894..51b9525324b 100644 --- a/boards/arm/stm32/nucleo-f446re/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f446re/scripts/Make.defs @@ -63,10 +63,7 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif diff --git a/boards/arm/stm32/nucleo-f446re/scripts/f446re.ld b/boards/arm/stm32/nucleo-f446re/scripts/f446re.ld index 42bc39d8ca7..19fd6c1ef5a 100644 --- a/boards/arm/stm32/nucleo-f446re/scripts/f446re.ld +++ b/boards/arm/stm32/nucleo-f446re/scripts/f446re.ld @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f446re/scripts/f446re.ld * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h b/boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h index e77b4e06a03..5e1e069f5f0 100644 --- a/boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h +++ b/boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Authors: Frank Bennett - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -232,6 +216,17 @@ #define GPIO_FIRE GPIO_BUTTON_2 #define GPIO_JUMP GPIO_BUTTON_3 +#ifdef CONFIG_SENSORS_HALL3PHASE +/* GPIO pins used by the 3-phase Hall effect sensor */ + +# define GPIO_HALL_PHA (GPIO_INPUT | GPIO_SPEED_2MHz | \ + GPIO_PORTA | GPIO_PIN15) +# define GPIO_HALL_PHB (GPIO_INPUT | GPIO_SPEED_2MHz | \ + GPIO_PORTB | GPIO_PIN3) +# define GPIO_HALL_PHC (GPIO_INPUT | GPIO_SPEED_2MHz | \ + GPIO_PORTB | GPIO_PIN10) +#endif + /**************************************************************************** * Public Data ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f446re/src/stm32_boot.c b/boards/arm/stm32/nucleo-f446re/src/stm32_boot.c index 0a3f401d770..2e110cb9241 100644 --- a/boards/arm/stm32/nucleo-f446re/src/stm32_boot.c +++ b/boards/arm/stm32/nucleo-f446re/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f446re/src/stm32_boot.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f446re/src/stm32_bringup.c b/boards/arm/stm32/nucleo-f446re/src/stm32_bringup.c index 773e1ff6e6e..6f913aee562 100644 --- a/boards/arm/stm32/nucleo-f446re/src/stm32_bringup.c +++ b/boards/arm/stm32/nucleo-f446re/src/stm32_bringup.c @@ -44,11 +44,15 @@ #endif #ifdef CONFIG_SENSORS_QENCODER -#include "board_qencoder.h" +# include "board_qencoder.h" +#endif + +#ifdef CONFIG_SENSORS_HALL3PHASE +# include "board_hall3ph.h" #endif #ifdef CONFIG_VIDEO_FB -#include +# include #endif #include "nucleo-f446re.h" @@ -169,6 +173,20 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_SENSORS_HALL3PHASE + /* Initialize and register the 3-phase Hall effect sensor driver */ + + ret = board_hall3ph_initialize(0, GPIO_HALL_PHA, GPIO_HALL_PHB, + GPIO_HALL_PHC); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to register the hall : %d\n", + ret); + return ret; + } +#endif + #ifdef CONFIG_INPUT_AJOYSTICK /* Initialize and register the joystick driver */ diff --git a/boards/arm/stm32/nucleo-f4x1re/scripts/Make.defs b/boards/arm/stm32/nucleo-f4x1re/scripts/Make.defs index 8979b5b617e..da6abce1d2d 100644 --- a/boards/arm/stm32/nucleo-f4x1re/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-f4x1re/scripts/Make.defs @@ -69,10 +69,7 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif diff --git a/boards/arm/stm32/nucleo-f4x1re/scripts/f401re.ld b/boards/arm/stm32/nucleo-f4x1re/scripts/f401re.ld index d76403aa78e..20161f6378d 100644 --- a/boards/arm/stm32/nucleo-f4x1re/scripts/f401re.ld +++ b/boards/arm/stm32/nucleo-f4x1re/scripts/f401re.ld @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f4x1re/scripts/f401re.ld * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f4x1re/scripts/f411re.ld b/boards/arm/stm32/nucleo-f4x1re/scripts/f411re.ld index 2b32d780439..7d234c53e93 100644 --- a/boards/arm/stm32/nucleo-f4x1re/scripts/f411re.ld +++ b/boards/arm/stm32/nucleo-f4x1re/scripts/f411re.ld @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f4x1re/scripts/f411re.ld * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h b/boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h index 9e3283353f2..7c825b9bd14 100644 --- a/boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h +++ b/boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f4x1re/src/nucleo-f4x1re.h * - * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. - * Authors: Frank Bennett - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-f4x1re/src/stm32_boot.c b/boards/arm/stm32/nucleo-f4x1re/src/stm32_boot.c index fcec6fc8f82..07c0830196c 100644 --- a/boards/arm/stm32/nucleo-f4x1re/src/stm32_boot.c +++ b/boards/arm/stm32/nucleo-f4x1re/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/nucleo-f4x1re/src/stm32_boot.c * - * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/nucleo-g431kb/configs/comp/defconfig b/boards/arm/stm32/nucleo-g431kb/configs/comp/defconfig index 5ac495da0f1..154423ef954 100644 --- a/boards/arm/stm32/nucleo-g431kb/configs/comp/defconfig +++ b/boards/arm/stm32/nucleo-g431kb/configs/comp/defconfig @@ -16,7 +16,10 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_BOARD_LOOPSPERMSEC=5483 CONFIG_BUILTIN=y CONFIG_COMP=y +CONFIG_DAC=y CONFIG_DEFAULT_SMALL=y +CONFIG_EXAMPLES_DAC=y +CONFIG_EXAMPLES_DAC_DEVPATH="/dev/dac5" CONFIG_INTELHEX_BINARY=y CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y @@ -32,7 +35,11 @@ CONFIG_START_MONTH=6 CONFIG_START_YEAR=2021 CONFIG_STM32_COMP2=y CONFIG_STM32_COMP2_HYST=3 +CONFIG_STM32_COMP2_INM=4 CONFIG_STM32_COMP2_OUT=y +CONFIG_STM32_DAC3=y +CONFIG_STM32_DAC3CH2=y +CONFIG_STM32_DAC3CH2_MODE=3 CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y CONFIG_STM32_FORCEPOWER=y CONFIG_STM32_JTAG_FULL_ENABLE=y diff --git a/boards/arm/stm32/nucleo-g431kb/scripts/Make.defs b/boards/arm/stm32/nucleo-g431kb/scripts/Make.defs index 096438e2dd0..72632c92eae 100755 --- a/boards/arm/stm32/nucleo-g431kb/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-g431kb/scripts/Make.defs @@ -57,19 +57,16 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif # Provide map file needed by the "Memory Allocation" view in Eclipse: -LDFLAGS += -Wl,-Map=$(TOPDIR)/NuttX.map -Wl,--gc-sections +LDFLAGS += -Map=$(TOPDIR)/NuttX.map --gc-sections # Embed absolute path to source file in debug information so that Eclipse # source level debugging won't get confused. See: diff --git a/boards/arm/stm32/nucleo-g431kb/src/Make.defs b/boards/arm/stm32/nucleo-g431kb/src/Make.defs index 80b207a94be..23a6e7a6038 100755 --- a/boards/arm/stm32/nucleo-g431kb/src/Make.defs +++ b/boards/arm/stm32/nucleo-g431kb/src/Make.defs @@ -41,6 +41,10 @@ ifeq ($(CONFIG_STM32_COMP),y) CSRCS += stm32_comp.c endif +ifeq ($(CONFIG_STM32_DAC),y) +CSRCS += stm32_dac.c +endif + DEPPATH += --dep-path board VPATH += :board CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board) diff --git a/boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h b/boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h index 30584786f7e..f56e628f85c 100755 --- a/boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h +++ b/boards/arm/stm32/nucleo-g431kb/src/nucleo-g431kb.h @@ -114,4 +114,16 @@ int stm32_pwm_setup(void); int stm32_comp_setup(void); #endif +/**************************************************************************** + * Name: stm32_comp_setup + * + * Description: + * Initialize COMP peripheral for the board. + * + ****************************************************************************/ + +#ifdef CONFIG_DAC +int stm32_dac_setup(void); +#endif + #endif /* __BOARDS_ARM_STM32_NUCLEO_G431KB_SRC_NUCLEO_G431KB_H */ diff --git a/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c b/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c index 40f7b86ab12..241279d31a9 100755 --- a/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c +++ b/boards/arm/stm32/nucleo-g431kb/src/stm32_bringup.c @@ -98,6 +98,16 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_DAC + /* Initialize and register the DAC driver. */ + + ret = stm32_dac_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: stm32_dac_setup failed: %d\n", ret); + } +#endif + UNUSED(ret); return OK; } diff --git a/boards/arm/stm32/nucleo-g431kb/src/stm32_dac.c b/boards/arm/stm32/nucleo-g431kb/src/stm32_dac.c new file mode 100644 index 00000000000..1040a8b7d3b --- /dev/null +++ b/boards/arm/stm32/nucleo-g431kb/src/stm32_dac.c @@ -0,0 +1,112 @@ +/**************************************************************************** + * boards/arm/stm32/nucleo-g431kb/src/stm32_dac.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include +#include + +#include "stm32_dac.h" +#include "nucleo-g431kb.h" + +#ifdef CONFIG_DAC + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_STM32_DAC1CH1 +static struct dac_dev_s *g_dac1; +#endif + +#ifdef CONFIG_STM32_DAC3CH2 +static struct dac_dev_s *g_dac5; +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_dac_setup + * + * Description: + * Initialize and register the DAC driver. + * + * Input parameters: + * devpath - The full path to the driver to register. E.g., "/dev/dac0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int stm32_dac_setup(void) +{ + int ret; +#ifdef CONFIG_STM32_DAC1CH1 + g_dac1 = stm32_dacinitialize(1); + if (g_dac1 == NULL) + { + aerr("ERROR: Failed to get DAC interface\n"); + return -ENODEV; + } + + /* Register the DAC driver at "/dev/dac0" */ + + ret = dac_register("/dev/dac0", g_dac1); + if (ret < 0) + { + aerr("ERROR: dac_register() failed: %d\n", ret); + return ret; + } + +#endif + +#ifdef CONFIG_STM32_DAC3CH2 + g_dac5 = stm32_dacinitialize(5); + if (g_dac5 == NULL) + { + aerr("ERROR: Failed to get DAC interface\n"); + return -ENODEV; + } + + /* Register the DAC driver at "/dev/dac5" */ + + ret = dac_register("/dev/dac5", g_dac5); + if (ret < 0) + { + aerr("ERROR: dac_register() failed: %d\n", ret); + return ret; + } + +#endif + + UNUSED(ret); + return OK; +} + +#endif /* CONFIG_DAC */ diff --git a/boards/arm/stm32/nucleo-g431rb/Kconfig b/boards/arm/stm32/nucleo-g431rb/Kconfig index 8ef0e9b152f..f61cd04c7b0 100644 --- a/boards/arm/stm32/nucleo-g431rb/Kconfig +++ b/boards/arm/stm32/nucleo-g431rb/Kconfig @@ -5,4 +5,12 @@ if ARCH_BOARD_NUCLEO_G431RB +if SENSORS_QENCODER + +config NUCLEO_G431RB_QETIMER + int "Timer to use with QE encoder" + default 2 + +endif # SENSORS_QENCODER + endif # ARCH_BOARD_NUCLEO_G431RB diff --git a/boards/arm/stm32/nucleo-g431rb/configs/cordic/defconfig b/boards/arm/stm32/nucleo-g431rb/configs/cordic/defconfig new file mode 100644 index 00000000000..096e2813e92 --- /dev/null +++ b/boards/arm/stm32/nucleo-g431rb/configs/cordic/defconfig @@ -0,0 +1,54 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nucleo-g431rb" +CONFIG_ARCH_BOARD_NUCLEO_G431RB=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32G431R=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=8499 +CONFIG_BUILTIN=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_EXAMPLES_CORDIC=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_MATH_CORDIC=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=22528 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=10 +CONFIG_START_YEAR=2014 +CONFIG_STM32_CORDIC=y +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/stm32/nucleo-g431rb/configs/qenco/defconfig b/boards/arm/stm32/nucleo-g431rb/configs/qenco/defconfig new file mode 100644 index 00000000000..70072082788 --- /dev/null +++ b/boards/arm/stm32/nucleo-g431rb/configs/qenco/defconfig @@ -0,0 +1,60 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_FPU is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_ARCH="arm" +CONFIG_ARCH_BOARD="nucleo-g431rb" +CONFIG_ARCH_BOARD_NUCLEO_G431RB=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_CHIP="stm32" +CONFIG_ARCH_CHIP_STM32=y +CONFIG_ARCH_CHIP_STM32G431R=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=8499 +CONFIG_BUILTIN=y +CONFIG_EXAMPLES_QENCODER=y +CONFIG_EXAMPLES_QENCODER_HAVE_MAXPOS=y +CONFIG_EXAMPLES_QENCODER_MAXPOS=8192 +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_INTELHEX_BINARY=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=22528 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SENSORS=y +CONFIG_SENSORS_QENCODER=y +CONFIG_START_DAY=14 +CONFIG_START_MONTH=10 +CONFIG_START_YEAR=2014 +CONFIG_STM32_JTAG_SW_ENABLE=y +CONFIG_STM32_QENCODER_DISABLE_EXTEND16BTIMERS=y +CONFIG_STM32_QENCODER_SAMPLE_FDTS_2=y +CONFIG_STM32_TIM2=y +CONFIG_STM32_TIM2_QE=y +CONFIG_STM32_TIM2_QEPSC=0 +CONFIG_STM32_USART2=y +CONFIG_SYSTEM_NSH=y +CONFIG_TASK_NAME_SIZE=0 +CONFIG_TESTING_OSTEST=y +CONFIG_TESTING_OSTEST_STACKSIZE=1024 +CONFIG_USART2_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/stm32/nucleo-g431rb/include/board.h b/boards/arm/stm32/nucleo-g431rb/include/board.h index 030ba13d13d..36af6e11835 100644 --- a/boards/arm/stm32/nucleo-g431rb/include/board.h +++ b/boards/arm/stm32/nucleo-g431rb/include/board.h @@ -219,6 +219,11 @@ /* Alternate function pin selections ****************************************/ +/* TIM2 input ***************************************************************/ + +#define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_3 | GPIO_PULLUP) /* PA15 */ +#define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_2 | GPIO_PULLUP) /* PB3 */ + /* USART2 (STLINK Virtual COM Port) */ #define GPIO_USART2_TX GPIO_USART2_TX_1 /* PA2 */ diff --git a/boards/arm/stm32/nucleo-g431rb/scripts/Make.defs b/boards/arm/stm32/nucleo-g431rb/scripts/Make.defs index 1f5f74a091c..ef206c2628b 100644 --- a/boards/arm/stm32/nucleo-g431rb/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-g431rb/scripts/Make.defs @@ -57,19 +57,16 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif # Provide map file needed by the "Memory Allocation" view in Eclipse: -LDFLAGS += -Wl,-Map=$(TOPDIR)/NuttX.map -Wl,--gc-sections +LDFLAGS += -Map=$(TOPDIR)/NuttX.map --gc-sections # Embed absolute path to source file in debug information so that Eclipse # source level debugging won't get confused. See: diff --git a/boards/arm/stm32/nucleo-g431rb/src/Make.defs b/boards/arm/stm32/nucleo-g431rb/src/Make.defs index 679a48cd6ae..bebb9984c7a 100644 --- a/boards/arm/stm32/nucleo-g431rb/src/Make.defs +++ b/boards/arm/stm32/nucleo-g431rb/src/Make.defs @@ -51,6 +51,10 @@ ifeq ($(CONFIG_BOARD_STM32_IHM16M1),y) CSRCS += stm32_foc_ihm16m1.c endif +ifeq ($(CONFIG_MATH_CORDIC),y) +CSRCS += stm32_cordic.c +endif + DEPPATH += --dep-path board VPATH += :board CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board) diff --git a/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h b/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h index ab9b29380c2..76e151fe47f 100644 --- a/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h +++ b/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h @@ -143,4 +143,16 @@ int stm32_adc_setup(void); int stm32_foc_setup(void); #endif +/**************************************************************************** + * Name: stm32_cordic_setup + * + * Description: + * Initialize CORDIC peripheral for the board. + * + ****************************************************************************/ + +#ifdef CONFIG_MATH_CORDIC +int stm32_cordic_setup(void); +#endif + #endif /* __BOARDS_ARM_STM32_NUCLEO_G431RB_SRC_NUCLEO_G431RB_H */ diff --git a/boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c b/boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c index 2b79dea9fc7..72ca25aaedf 100644 --- a/boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c +++ b/boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c @@ -37,6 +37,10 @@ # include #endif +#ifdef CONFIG_SENSORS_QENCODER +# include "board_qencoder.h" +#endif + #include "nucleo-g431rb.h" /**************************************************************************** @@ -122,6 +126,29 @@ int stm32_bringup(void) } #endif +#ifdef CONFIG_MATH_CORDIC + /* Initialize CORDIC and register the CORDIC driver. */ + + ret = stm32_cordic_setup(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: stm32_cordic_setup failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_SENSORS_QENCODER + /* Initialize and register the qencoder driver */ + + ret = board_qencoder_initialize(0, CONFIG_NUCLEO_G431RB_QETIMER); + if (ret != OK) + { + syslog(LOG_ERR, + "ERROR: Failed to register the qencoder: %d\n", + ret); + return ret; + } +#endif + UNUSED(ret); return OK; } diff --git a/boards/arm/stm32/nucleo-g431rb/src/stm32_cordic.c b/boards/arm/stm32/nucleo-g431rb/src/stm32_cordic.c new file mode 100644 index 00000000000..ead99fc7d0f --- /dev/null +++ b/boards/arm/stm32/nucleo-g431rb/src/stm32_cordic.c @@ -0,0 +1,87 @@ +/**************************************************************************** + * boards/arm/stm32/nucleo-g431rb/src/stm32_cordic.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "stm32_cordic.h" + +#include "nucleo-g431rb.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_cordic_setup + * + * Description: + * Initialize CORDIC and register the CORDIC device. + * + ****************************************************************************/ + +int stm32_cordic_setup(void) +{ + FAR struct cordic_lowerhalf_s *cordic = NULL; + static bool initialized = false; + int ret = OK; + + /* Have we already initialized? */ + + if (!initialized) + { + /* Call stm32_cordicinitialize() to get an instance of the CORDIC + * interface + */ + + cordic = stm32_cordicinitialize(); + if (!cordic) + { + tmrerr("Failed to get the STM32 CORDIC lower half\n"); + ret = -ENODEV; + goto errout; + } + + /* Register the CORDIC driver at "/dev/cordic0" */ + + ret = cordic_register("/dev/cordic0", cordic); + if (ret < 0) + { + tmrerr("cordic_register failed: %d\n", ret); + goto errout; + } + + /* Now we are initialized */ + + initialized = true; + } + +errout: + return ret; +} diff --git a/boards/arm/stm32/nucleo-l152re/scripts/Make.defs b/boards/arm/stm32/nucleo-l152re/scripts/Make.defs index 13877afe17e..542c2aaf5f9 100644 --- a/boards/arm/stm32/nucleo-l152re/scripts/Make.defs +++ b/boards/arm/stm32/nucleo-l152re/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimex-stm32-e407/scripts/Make.defs b/boards/arm/stm32/olimex-stm32-e407/scripts/Make.defs index a6917305860..242c444d840 100644 --- a/boards/arm/stm32/olimex-stm32-e407/scripts/Make.defs +++ b/boards/arm/stm32/olimex-stm32-e407/scripts/Make.defs @@ -57,13 +57,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimex-stm32-e407/src/stm32_mrf24j40.c b/boards/arm/stm32/olimex-stm32-e407/src/stm32_mrf24j40.c index 5295e7ee9d5..52fbb5bc432 100644 --- a/boards/arm/stm32/olimex-stm32-e407/src/stm32_mrf24j40.c +++ b/boards/arm/stm32/olimex-stm32-e407/src/stm32_mrf24j40.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/olimex-stm32-e407/src/stm32_mrf24j40.c * - * Copyright (C) 2017, 2019 Gregory Nutt, All rights reserver - * Author: Gregory Nutt - * Modified by: Acutronics Robotics (Juan Flores) + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/olimex-stm32-e407/src/stm32_timer.c b/boards/arm/stm32/olimex-stm32-e407/src/stm32_timer.c index fb79b3d7e14..8884a5f1ebe 100644 --- a/boards/arm/stm32/olimex-stm32-e407/src/stm32_timer.c +++ b/boards/arm/stm32/olimex-stm32-e407/src/stm32_timer.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/olimex-stm32-e407/src/stm32_timer.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Modified by: Acutronics Robotics (Juan Flores) + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/olimex-stm32-h405/scripts/Make.defs b/boards/arm/stm32/olimex-stm32-h405/scripts/Make.defs index 68976ae39f0..f0c4c63ced2 100644 --- a/boards/arm/stm32/olimex-stm32-h405/scripts/Make.defs +++ b/boards/arm/stm32/olimex-stm32-h405/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimex-stm32-h407/scripts/Make.defs b/boards/arm/stm32/olimex-stm32-h407/scripts/Make.defs index c7984ae4d53..4a7929d8265 100644 --- a/boards/arm/stm32/olimex-stm32-h407/scripts/Make.defs +++ b/boards/arm/stm32/olimex-stm32-h407/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimex-stm32-p107/scripts/Make.defs b/boards/arm/stm32/olimex-stm32-p107/scripts/Make.defs index ab51a5a1aca..ac2a59700ee 100644 --- a/boards/arm/stm32/olimex-stm32-p107/scripts/Make.defs +++ b/boards/arm/stm32/olimex-stm32-p107/scripts/Make.defs @@ -55,13 +55,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimex-stm32-p207/scripts/Make.defs b/boards/arm/stm32/olimex-stm32-p207/scripts/Make.defs index aee38d5ecb2..f7288a4e2d8 100644 --- a/boards/arm/stm32/olimex-stm32-p207/scripts/Make.defs +++ b/boards/arm/stm32/olimex-stm32-p207/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimex-stm32-p407/configs/kelf/Make.defs b/boards/arm/stm32/olimex-stm32-p407/configs/kelf/Make.defs index 359645cc2aa..2399072cb05 100644 --- a/boards/arm/stm32/olimex-stm32-p407/configs/kelf/Make.defs +++ b/boards/arm/stm32/olimex-stm32-p407/configs/kelf/Make.defs @@ -53,8 +53,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF kernel module definitions @@ -84,9 +84,6 @@ endif # Linker flags -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimex-stm32-p407/configs/kmodule/Make.defs b/boards/arm/stm32/olimex-stm32-p407/configs/kmodule/Make.defs index 0fc037c1ad9..40ba0295f92 100644 --- a/boards/arm/stm32/olimex-stm32-p407/configs/kmodule/Make.defs +++ b/boards/arm/stm32/olimex-stm32-p407/configs/kmodule/Make.defs @@ -53,8 +53,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF kernel module definitions @@ -84,9 +84,6 @@ endif # Linker flags -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimex-stm32-p407/configs/knsh/Make.defs b/boards/arm/stm32/olimex-stm32-p407/configs/knsh/Make.defs index 9ad76c27d4a..c163e65251d 100644 --- a/boards/arm/stm32/olimex-stm32-p407/configs/knsh/Make.defs +++ b/boards/arm/stm32/olimex-stm32-p407/configs/knsh/Make.defs @@ -54,8 +54,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -69,9 +69,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimex-stm32-p407/kernel/Makefile b/boards/arm/stm32/olimex-stm32-p407/kernel/Makefile index 5cc2fa19947..71cdc0af22f 100644 --- a/boards/arm/stm32/olimex-stm32-p407/kernel/Makefile +++ b/boards/arm/stm32/olimex-stm32-p407/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32/olimex-stm32-p407/kernel/stm32_userspace.c b/boards/arm/stm32/olimex-stm32-p407/kernel/stm32_userspace.c index 79d99f620ed..b76a68f7746 100644 --- a/boards/arm/stm32/olimex-stm32-p407/kernel/stm32_userspace.c +++ b/boards/arm/stm32/olimex-stm32-p407/kernel/stm32_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32/olimex-stm32-p407/scripts/Make.defs b/boards/arm/stm32/olimex-stm32-p407/scripts/Make.defs index 33ea5f26a73..53712cae5b4 100644 --- a/boards/arm/stm32/olimex-stm32-p407/scripts/Make.defs +++ b/boards/arm/stm32/olimex-stm32-p407/scripts/Make.defs @@ -51,8 +51,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -66,9 +66,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimexino-stm32/scripts/Make.defs b/boards/arm/stm32/olimexino-stm32/scripts/Make.defs index 5071e35d4dc..7a485d73f75 100644 --- a/boards/arm/stm32/olimexino-stm32/scripts/Make.defs +++ b/boards/arm/stm32/olimexino-stm32/scripts/Make.defs @@ -55,13 +55,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/olimexino-stm32/src/olimexino-stm32.h b/boards/arm/stm32/olimexino-stm32/src/olimexino-stm32.h index 30d4ebb3d03..a52c939ac1b 100644 --- a/boards/arm/stm32/olimexino-stm32/src/olimexino-stm32.h +++ b/boards/arm/stm32/olimexino-stm32/src/olimexino-stm32.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/olimexino-stm32/src/olimexino-stm32.h * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * David_s5 + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/olimexino-stm32/src/stm32_buttons.c b/boards/arm/stm32/olimexino-stm32/src/stm32_buttons.c index 466dfdae4de..fb08b84525a 100644 --- a/boards/arm/stm32/olimexino-stm32/src/stm32_buttons.c +++ b/boards/arm/stm32/olimexino-stm32/src/stm32_buttons.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/olimexino-stm32/src/stm32_buttons.c * - * Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * David_s5 + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/include/board.h b/boards/arm/stm32/omnibusf4/include/board.h index fcbf53c8f80..376d5b1256a 100644 --- a/boards/arm/stm32/omnibusf4/include/board.h +++ b/boards/arm/stm32/omnibusf4/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/include/board.h * - * Copyright (C) 2019 Bill Gatliff. All Rights reserved. - * Copyright (C) 2012, 2014-2016, 2018 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/kernel/Makefile b/boards/arm/stm32/omnibusf4/kernel/Makefile index 70a10c5219c..b9d22c0c5e6 100644 --- a/boards/arm/stm32/omnibusf4/kernel/Makefile +++ b/boards/arm/stm32/omnibusf4/kernel/Makefile @@ -1,37 +1,20 @@ ############################################################################ # boards/arm/stm32/omnibusf4/kernel/Makefile # -# Copyright (C) 2019 Bill Gatliff. All rights reserved. -# Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. -# Author: Bill Gatliff -# Author: Gregory Nutt +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -63,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -84,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32/omnibusf4/kernel/stm32_userspace.c b/boards/arm/stm32/omnibusf4/kernel/stm32_userspace.c index 8927f044ce0..4174cf9bd92 100644 --- a/boards/arm/stm32/omnibusf4/kernel/stm32_userspace.c +++ b/boards/arm/stm32/omnibusf4/kernel/stm32_userspace.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/kernel/stm32_userspace.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -92,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32/omnibusf4/scripts/Make.defs b/boards/arm/stm32/omnibusf4/scripts/Make.defs index 1e3863a6cea..cdb59a8b39f 100644 --- a/boards/arm/stm32/omnibusf4/scripts/Make.defs +++ b/boards/arm/stm32/omnibusf4/scripts/Make.defs @@ -51,8 +51,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -78,10 +78,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif - -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/omnibusf4/src/Make.defs b/boards/arm/stm32/omnibusf4/src/Make.defs index 4bfdbaaf564..e9535bf924b 100644 --- a/boards/arm/stm32/omnibusf4/src/Make.defs +++ b/boards/arm/stm32/omnibusf4/src/Make.defs @@ -1,38 +1,20 @@ ############################################################################ # boards/arm/stm32/omnibusf4/src/Make.defs # -# Copyright (C) 2019 Bill Gatliff. All rights reserved. -# Copyright (C) 2011-2013, 2015-2016, 2018 Gregory Nutt. All rights -# reserved. -# Author: Bill Gatliff -# Author: Gregory Nutt +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/stm32/omnibusf4/src/omnibusf4.h b/boards/arm/stm32/omnibusf4/src/omnibusf4.h index a7b897dc22a..0528d9dc4ed 100644 --- a/boards/arm/stm32/omnibusf4/src/omnibusf4.h +++ b/boards/arm/stm32/omnibusf4/src/omnibusf4.h @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/omnibusf4.h * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2011-2012, 2015-2016, 2018 Gregory Nutt. All rights - * reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_appinit.c b/boards/arm/stm32/omnibusf4/src/stm32_appinit.c index bb4710bdd79..40a057d5a01 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_appinit.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_appinit.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_appinit.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2012, 2014, 2016, 2018 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_boot.c b/boards/arm/stm32/omnibusf4/src/stm32_boot.c index 1376ce6f1d3..fcfa37634c7 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_boot.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_boot.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_boot.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2011-2012, 2015, 2018 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_bringup.c b/boards/arm/stm32/omnibusf4/src/stm32_bringup.c index 020d45b6206..d2d7a795015 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_bringup.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_bringup.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_bringup.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2012, 2014-2018 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_idle.c b/boards/arm/stm32/omnibusf4/src/stm32_idle.c index 7fc2be0c59a..035a480a9fe 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_idle.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_idle.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_idle.c * - * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * http://www.apache.org/licenses/LICENSE-2.0 * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_ioctl.c b/boards/arm/stm32/omnibusf4/src/stm32_ioctl.c index 138f6ee9bb3..b01b0b76a8a 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_ioctl.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_ioctl.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_ioctl.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_max7456.c b/boards/arm/stm32/omnibusf4/src/stm32_max7456.c index 46bd98ce802..80b616e523f 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_max7456.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_max7456.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_max7456.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_mmcsd.c b/boards/arm/stm32/omnibusf4/src/stm32_mmcsd.c index 3810c411e9a..e07ee8dd5e8 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_mmcsd.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_mmcsd.c @@ -1,37 +1,21 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_mmcsd.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2017 Greg Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Alan Carvalho de Assis + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. ****************************************************************************/ /**************************************************************************** diff --git a/boards/arm/stm32/omnibusf4/src/stm32_mpu6000.c b/boards/arm/stm32/omnibusf4/src/stm32_mpu6000.c index 697e0b15979..bb1de5169aa 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_mpu6000.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_mpu6000.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_mpu6000.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_pm.c b/boards/arm/stm32/omnibusf4/src/stm32_pm.c index 7baddf62115..18bab418bdb 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_pm.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_pm.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_pm.c * - * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_pwm.c b/boards/arm/stm32/omnibusf4/src/stm32_pwm.c index 9ebb4d5e089..5d1cd85a1fd 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_pwm.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_pwm.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_pwm.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_reset.c b/boards/arm/stm32/omnibusf4/src/stm32_reset.c index 3c07de24b58..194d66860ea 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_reset.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_reset.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_reset.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2011-2012, 2019 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_spi.c b/boards/arm/stm32/omnibusf4/src/stm32_spi.c index a9b32ea5db7..ea736d6e500 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_spi.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_spi.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_spi.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_timer.c b/boards/arm/stm32/omnibusf4/src/stm32_timer.c index 526009e2ded..fb991e39381 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_timer.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_timer.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_timer.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * With modifications from Calvin Maguranis + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_usb.c b/boards/arm/stm32/omnibusf4/src/stm32_usb.c index 9982bab5152..50ebb6cfc07 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_usb.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_usb.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_usb.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/omnibusf4/src/stm32_userleds.c b/boards/arm/stm32/omnibusf4/src/stm32_userleds.c index 79f1b04b715..0104a84458c 100644 --- a/boards/arm/stm32/omnibusf4/src/stm32_userleds.c +++ b/boards/arm/stm32/omnibusf4/src/stm32_userleds.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/omnibusf4/src/stm32_userleds.c * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved. - * Author: Bill Gatliff - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/README.txt b/boards/arm/stm32/photon/README.txt index 3c88549110f..50d2eb236cf 100644 --- a/boards/arm/stm32/photon/README.txt +++ b/boards/arm/stm32/photon/README.txt @@ -3,8 +3,8 @@ README This README discusses issues unique to NuttX configurations for the Particle.io Photon board featuring the STM32F205RG MCU. - The STM32F205RG is a 120 MHz Cortex-M3 operation with 1Mbit Flash - memory and 128kbytes. The board includes a Broadcom BCM43362 WiFi. + The STM32F205RG is a 120 MHz Cortex-M3 operation with 1MB Flash + memory and 128KB RAM. The board includes a Broadcom BCM43362 WiFi. Contents ======== @@ -18,8 +18,8 @@ Selecting the Photon board on NuttX =================================== NOTICE: We will not discuss about toolchains and environment configuration - here, please take a look at STM32F4Discory board README or other STM32 board - because it should work for Photon board as well. + here, please take a look at STM32F4Discovery board README or other + STM32 board because it should work for Photon board as well. Let us to consider that you cloned the nuttx and apps repositories, then follow these steps: diff --git a/boards/arm/stm32/photon/configs/wlan/defconfig b/boards/arm/stm32/photon/configs/wlan/defconfig index 3a346d4b628..e061438efb9 100644 --- a/boards/arm/stm32/photon/configs/wlan/defconfig +++ b/boards/arm/stm32/photon/configs/wlan/defconfig @@ -32,6 +32,7 @@ CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y CONFIG_IEEE80211_BROADCOM_BCM43362=y +CONFIG_IEEE80211_BROADCOM_DMABUF_ALIGNMENT=16 CONFIG_IEEE80211_BROADCOM_FULLMAC_SDIO=y CONFIG_INTELHEX_BINARY=y CONFIG_LIBM=y diff --git a/boards/arm/stm32/photon/include/board.h b/boards/arm/stm32/photon/include/board.h index 6219989f367..3b22428ce24 100644 --- a/boards/arm/stm32/photon/include/board.h +++ b/boards/arm/stm32/photon/include/board.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/include/board.h * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/scripts/Make.defs b/boards/arm/stm32/photon/scripts/Make.defs index f2b75ee8d82..7636535afa3 100644 --- a/boards/arm/stm32/photon/scripts/Make.defs +++ b/boards/arm/stm32/photon/scripts/Make.defs @@ -60,13 +60,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/photon/scripts/photon_dfu.ld b/boards/arm/stm32/photon/scripts/photon_dfu.ld index 3ce8a661e80..7e55c021528 100644 --- a/boards/arm/stm32/photon/scripts/photon_dfu.ld +++ b/boards/arm/stm32/photon/scripts/photon_dfu.ld @@ -48,11 +48,10 @@ SECTIONS *(.fixup) *(.gnu.warning) - . = ALIGN(0x4); wlan_firmware_image_location = .; *(.wlan_firmware_image .wlan_firmware_image.*) wlan_firmware_image_end = .; - . = ALIGN(0x4); + wlan_nvram_image_location = .; *(.wlan_nvram_image .wlan_nvram_image.*) wlan_nvram_image_end = .; diff --git a/boards/arm/stm32/photon/src/dfu_signature.c b/boards/arm/stm32/photon/src/dfu_signature.c index 83e4786fabb..8177e174c57 100644 --- a/boards/arm/stm32/photon/src/dfu_signature.c +++ b/boards/arm/stm32/photon/src/dfu_signature.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/src/dfu_signature.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -43,7 +28,7 @@ * Private Types ****************************************************************************/ -__attribute__((packed)) struct dfu_signature +begin_packed_struct struct dfu_signature { uint32_t linker_start_address; uint32_t linker_end_address; @@ -52,7 +37,7 @@ __attribute__((packed)) struct dfu_signature uint8_t firmware_type1; uint8_t firmware_type2; uint8_t reserved2[8]; -}; +} end_packed_struct; /**************************************************************************** * Public Data @@ -65,8 +50,8 @@ extern uint32_t _firmware_end; * Private Data ****************************************************************************/ -__attribute__((externally_visible, section(".dfu_signature"))) - const struct dfu_signature dfu_sign = +__attribute__((externally_visible)) locate_data(".dfu_signature") +const struct dfu_signature dfu_sign = { (uint32_t)&_firmware_start, /* Flash image start address */ (uint32_t)&_firmware_end, /* Flash image end address */ diff --git a/boards/arm/stm32/photon/src/photon.h b/boards/arm/stm32/photon/src/photon.h index 7993af97a02..00fc089a250 100644 --- a/boards/arm/stm32/photon/src/photon.h +++ b/boards/arm/stm32/photon/src/photon.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/src/photon.h * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/src/stm32_boot.c b/boards/arm/stm32/photon/src/stm32_boot.c index b6af82e5bb8..e84f0cc28d5 100644 --- a/boards/arm/stm32/photon/src/stm32_boot.c +++ b/boards/arm/stm32/photon/src/stm32_boot.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/src/stm32_boot.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/src/stm32_bringup.c b/boards/arm/stm32/photon/src/stm32_bringup.c index d1093276adb..7f6220a538e 100644 --- a/boards/arm/stm32/photon/src/stm32_bringup.c +++ b/boards/arm/stm32/photon/src/stm32_bringup.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/src/stm32_bringup.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/src/stm32_buttons.c b/boards/arm/stm32/photon/src/stm32_buttons.c index f96cea1a20a..30af899bb8f 100644 --- a/boards/arm/stm32/photon/src/stm32_buttons.c +++ b/boards/arm/stm32/photon/src/stm32_buttons.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/src/stm32_buttons.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/src/stm32_rgbled.c b/boards/arm/stm32/photon/src/stm32_rgbled.c index af5272525b3..f6b558649ce 100644 --- a/boards/arm/stm32/photon/src/stm32_rgbled.c +++ b/boards/arm/stm32/photon/src/stm32_rgbled.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/src/stm32_rgbled.c * - * Copyright (C) 2018 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/src/stm32_userleds.c b/boards/arm/stm32/photon/src/stm32_userleds.c index 3a797f68e36..3db962cc9a4 100644 --- a/boards/arm/stm32/photon/src/stm32_userleds.c +++ b/boards/arm/stm32/photon/src/stm32_userleds.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/src/stm32_userleds.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/src/stm32_wdt.c b/boards/arm/stm32/photon/src/stm32_wdt.c index 134bd900978..c1d5fbeccb5 100644 --- a/boards/arm/stm32/photon/src/stm32_wdt.c +++ b/boards/arm/stm32/photon/src/stm32_wdt.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/src/stm32_wdt.c * - * Copyright (C) 2017-2018 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/src/stm32_wlan.c b/boards/arm/stm32/photon/src/stm32_wlan.c index fa5c17e6e6b..f5684296e42 100644 --- a/boards/arm/stm32/photon/src/stm32_wlan.c +++ b/boards/arm/stm32/photon/src/stm32_wlan.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/photon/src/stm32_wlan.c * - * Copyright (C) 2017-2018 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/photon/src/stm32_wlan_firmware.c b/boards/arm/stm32/photon/src/stm32_wlan_firmware.c index 310a99a2827..7f7866aa807 100644 --- a/boards/arm/stm32/photon/src/stm32_wlan_firmware.c +++ b/boards/arm/stm32/photon/src/stm32_wlan_firmware.c @@ -51,8 +51,16 @@ /* Character array of NVRAM image */ +/* SDIO_RXDMA32_CONFIG and SDIO_TXDMA32_CONFIG values in stm32_sdio.c + * give the DMA burst length of 16 bytes + * (DMA_SCR_MSIZE_32BITS x DMA_SCR_MBURST_INCR4). + * Thus the following alignment should be 0x10. + */ + const char -__attribute__((section(".wlan_nvram_image"))) bcm43362_nvram_image[] = +locate_data(".wlan_nvram_image") +aligned_data(CONFIG_IEEE80211_BROADCOM_DMABUF_ALIGNMENT) +bcm43362_nvram_image[] = "manfid=0x2d0" "\x00" "prodid=0x492" "\x00" "vendid=0x14e4" "\x00" @@ -115,8 +123,16 @@ __attribute__((section(".wlan_nvram_image"))) bcm43362_nvram_image[] = const unsigned int bcm43362_nvram_image_len = sizeof(bcm43362_nvram_image); +/* SDIO_RXDMA32_CONFIG and SDIO_TXDMA32_CONFIG values in stm32_sdio.c + * give the DMA burst length of 16 bytes + * (DMA_SCR_MSIZE_32BITS x DMA_SCR_MBURST_INCR4). + * Thus the following alignment should be 0x10. + */ + const uint8_t -__attribute__((section(".wlan_firmware_image"))) bcm43362_firmware_image[] = +locate_data(".wlan_firmware_image") +aligned_data(CONFIG_IEEE80211_BROADCOM_DMABUF_ALIGNMENT) +bcm43362_firmware_image[] = { 0x00, 0x00, 0x00, 0x00, 0xcd, 0xc2, 0x00, 0x00, 0x91, 0xc1, 0x00, 0x00, 0x91, 0xc1, 0x00, 0x00, 0x91, 0xc1, 0x00, 0x00, 0x91, 0xc1, 0x00, 0x00, diff --git a/boards/arm/stm32/shenzhou/scripts/Make.defs b/boards/arm/stm32/shenzhou/scripts/Make.defs index f07339c780b..371aba75912 100644 --- a/boards/arm/stm32/shenzhou/scripts/Make.defs +++ b/boards/arm/stm32/shenzhou/scripts/Make.defs @@ -60,15 +60,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections -#NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +#NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-eabi-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/shenzhou/src/stm32_ili93xx.c b/boards/arm/stm32/shenzhou/src/stm32_ili93xx.c index 5a5038699f9..ea438a4a593 100644 --- a/boards/arm/stm32/shenzhou/src/stm32_ili93xx.c +++ b/boards/arm/stm32/shenzhou/src/stm32_ili93xx.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/shenzhou/src/stm32_ili93xx.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/shenzhou/src/stm32_relays.c b/boards/arm/stm32/shenzhou/src/stm32_relays.c index c489637da27..86564683800 100644 --- a/boards/arm/stm32/shenzhou/src/stm32_relays.c +++ b/boards/arm/stm32/shenzhou/src/stm32_relays.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/shenzhou/src/stm32_relays.c * - * Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Darcy Gong + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3210e-eval/scripts/Make.defs b/boards/arm/stm32/stm3210e-eval/scripts/Make.defs index da523dd7bf2..6fc23d8198d 100644 --- a/boards/arm/stm32/stm3210e-eval/scripts/Make.defs +++ b/boards/arm/stm32/stm3210e-eval/scripts/Make.defs @@ -55,13 +55,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm3210e-eval/src/stm32_idle.c b/boards/arm/stm32/stm3210e-eval/src/stm32_idle.c index f807e18506c..5d919022c20 100644 --- a/boards/arm/stm32/stm3210e-eval/src/stm32_idle.c +++ b/boards/arm/stm32/stm3210e-eval/src/stm32_idle.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3210e-eval/src/stm32_idle.c * - * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3210e-eval/src/stm32_lcd.c b/boards/arm/stm32/stm3210e-eval/src/stm32_lcd.c index d8997589e99..d3c59ea3736 100644 --- a/boards/arm/stm32/stm3210e-eval/src/stm32_lcd.c +++ b/boards/arm/stm32/stm3210e-eval/src/stm32_lcd.c @@ -1,39 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3210e-eval/src/stm32_lcd.c * - * Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * With power management enhancements by: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Author: Diego Sanchez - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3210e-eval/src/stm32_pm.c b/boards/arm/stm32/stm3210e-eval/src/stm32_pm.c index 0459df60aec..d3f26a017ea 100644 --- a/boards/arm/stm32/stm3210e-eval/src/stm32_pm.c +++ b/boards/arm/stm32/stm3210e-eval/src/stm32_pm.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3210e-eval/src/stm32_pm.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3210e-eval/src/stm32_pmbuttons.c b/boards/arm/stm32/stm3210e-eval/src/stm32_pmbuttons.c index 13ccaff0937..7c4ff04fd4c 100644 --- a/boards/arm/stm32/stm3210e-eval/src/stm32_pmbuttons.c +++ b/boards/arm/stm32/stm3210e-eval/src/stm32_pmbuttons.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3210e-eval/src/stm32_pmbuttons.c * - * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3220g-eval/scripts/Make.defs b/boards/arm/stm32/stm3220g-eval/scripts/Make.defs index c9999b8e7af..8cdb67d9354 100644 --- a/boards/arm/stm32/stm3220g-eval/scripts/Make.defs +++ b/boards/arm/stm32/stm3220g-eval/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm3220g-eval/src/stm32_deselectlcd.c b/boards/arm/stm32/stm3220g-eval/src/stm32_deselectlcd.c index a280396f78c..ffc0387d349 100644 --- a/boards/arm/stm32/stm3220g-eval/src/stm32_deselectlcd.c +++ b/boards/arm/stm32/stm3220g-eval/src/stm32_deselectlcd.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3220g-eval/src/stm32_deselectlcd.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3220g-eval/src/stm32_lcd.c b/boards/arm/stm32/stm3220g-eval/src/stm32_lcd.c index c67a1a8ae61..27bb9cd00a5 100644 --- a/boards/arm/stm32/stm3220g-eval/src/stm32_lcd.c +++ b/boards/arm/stm32/stm3220g-eval/src/stm32_lcd.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3220g-eval/src/stm32_lcd.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c b/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c index 752bdbc35a1..86097627cd7 100644 --- a/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c +++ b/boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3220g-eval/src/stm32_selectlcd.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3240g-eval/configs/knxwm/Make.defs b/boards/arm/stm32/stm3240g-eval/configs/knxwm/Make.defs index 4f994ebeaab..d80492d612b 100644 --- a/boards/arm/stm32/stm3240g-eval/configs/knxwm/Make.defs +++ b/boards/arm/stm32/stm3240g-eval/configs/knxwm/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm3240g-eval/kernel/Makefile b/boards/arm/stm32/stm3240g-eval/kernel/Makefile index 1169b47f922..7d92f1b5f2c 100644 --- a/boards/arm/stm32/stm3240g-eval/kernel/Makefile +++ b/boards/arm/stm32/stm3240g-eval/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32/stm3240g-eval/kernel/stm32_userspace.c b/boards/arm/stm32/stm3240g-eval/kernel/stm32_userspace.c index a5f85d6ae03..0b2e5a98ba2 100644 --- a/boards/arm/stm32/stm3240g-eval/kernel/stm32_userspace.c +++ b/boards/arm/stm32/stm3240g-eval/kernel/stm32_userspace.c @@ -74,7 +74,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32/stm3240g-eval/scripts/Make.defs b/boards/arm/stm32/stm3240g-eval/scripts/Make.defs index 153e4ae3e2d..3115b7ce991 100644 --- a/boards/arm/stm32/stm3240g-eval/scripts/Make.defs +++ b/boards/arm/stm32/stm3240g-eval/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm3240g-eval/src/stm32_deselectlcd.c b/boards/arm/stm32/stm3240g-eval/src/stm32_deselectlcd.c index a903befd3c0..334f3dce622 100644 --- a/boards/arm/stm32/stm3240g-eval/src/stm32_deselectlcd.c +++ b/boards/arm/stm32/stm3240g-eval/src/stm32_deselectlcd.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3240g-eval/src/stm32_deselectlcd.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3240g-eval/src/stm32_lcd.c b/boards/arm/stm32/stm3240g-eval/src/stm32_lcd.c index f736928c37c..a1a9cf0d20e 100644 --- a/boards/arm/stm32/stm3240g-eval/src/stm32_lcd.c +++ b/boards/arm/stm32/stm3240g-eval/src/stm32_lcd.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3240g-eval/src/stm32_lcd.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c b/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c index 63a0e61ea01..5e4b45510b5 100644 --- a/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c +++ b/boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm3240g-eval/src/stm32_selectlcd.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32_tiny/scripts/Make.defs b/boards/arm/stm32/stm32_tiny/scripts/Make.defs index 3613a6f3023..277bb308297 100644 --- a/boards/arm/stm32/stm32_tiny/scripts/Make.defs +++ b/boards/arm/stm32/stm32_tiny/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32butterfly2/scripts/Make.defs b/boards/arm/stm32/stm32butterfly2/scripts/Make.defs index 9adc068dbf3..afd0b734729 100644 --- a/boards/arm/stm32/stm32butterfly2/scripts/Make.defs +++ b/boards/arm/stm32/stm32butterfly2/scripts/Make.defs @@ -55,13 +55,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f103-minimum/scripts/Make.defs b/boards/arm/stm32/stm32f103-minimum/scripts/Make.defs index 5ede0bfea49..a0b78744a1a 100644 --- a/boards/arm/stm32/stm32f103-minimum/scripts/Make.defs +++ b/boards/arm/stm32/stm32f103-minimum/scripts/Make.defs @@ -55,15 +55,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -LDFLAGS += -Wl,--gc-sections +LDFLAGS += --gc-sections -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f103-minimum/src/stm32_lcd_st7567.c b/boards/arm/stm32/stm32f103-minimum/src/stm32_lcd_st7567.c index 39a34b28fcc..1e1401b2d91 100644 --- a/boards/arm/stm32/stm32f103-minimum/src/stm32_lcd_st7567.c +++ b/boards/arm/stm32/stm32f103-minimum/src/stm32_lcd_st7567.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f103-minimum/src/stm32_lcd_st7567.c * - * Copyright (C) 2016 Uniquix Tecnologia. All rights reserved. - * Author: Alan Carvalho de Assis + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * I used the JLX12864G-086 LCD module based on ST7567 controller. + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on boards/zkit-arm-1769/src/lpc17_40_lcd.c - * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f334-disco/scripts/Make.defs b/boards/arm/stm32/stm32f334-disco/scripts/Make.defs index 1a51646f875..9f7785e1670 100644 --- a/boards/arm/stm32/stm32f334-disco/scripts/Make.defs +++ b/boards/arm/stm32/stm32f334-disco/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f3discovery/scripts/Make.defs b/boards/arm/stm32/stm32f3discovery/scripts/Make.defs index 1a21640fcda..b7da020103a 100644 --- a/boards/arm/stm32/stm32f3discovery/scripts/Make.defs +++ b/boards/arm/stm32/stm32f3discovery/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f411-minimum/scripts/Make.defs b/boards/arm/stm32/stm32f411-minimum/scripts/Make.defs index 0924ab753b3..670b24c7ec7 100644 --- a/boards/arm/stm32/stm32f411-minimum/scripts/Make.defs +++ b/boards/arm/stm32/stm32f411-minimum/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f411e-disco/include/board.h b/boards/arm/stm32/stm32f411e-disco/include/board.h index 7405e06e1d5..7f6b488ba02 100644 --- a/boards/arm/stm32/stm32f411e-disco/include/board.h +++ b/boards/arm/stm32/stm32f411e-disco/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f411e-disco/include/board.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Konstantin Berezenko + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * based on boards/nucleo-f4x1re/include/board.h + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f411e-disco/scripts/Make.defs b/boards/arm/stm32/stm32f411e-disco/scripts/Make.defs index e72740d0c10..4a28d62874e 100644 --- a/boards/arm/stm32/stm32f411e-disco/scripts/Make.defs +++ b/boards/arm/stm32/stm32f411e-disco/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f411e-disco/scripts/f411ve.ld b/boards/arm/stm32/stm32f411e-disco/scripts/f411ve.ld index 833703c6796..cf6b9e889ce 100644 --- a/boards/arm/stm32/stm32f411e-disco/scripts/f411ve.ld +++ b/boards/arm/stm32/stm32f411e-disco/scripts/f411ve.ld @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f411e-disco/scripts/f411ve.ld * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f411e-disco/src/stm32_boot.c b/boards/arm/stm32/stm32f411e-disco/src/stm32_boot.c index 858d77e9315..08fedacca98 100644 --- a/boards/arm/stm32/stm32f411e-disco/src/stm32_boot.c +++ b/boards/arm/stm32/stm32f411e-disco/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f411e-disco/src/stm32_boot.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f411e-disco/src/stm32f411e-disco.h b/boards/arm/stm32/stm32f411e-disco/src/stm32f411e-disco.h index f58d84d8a3c..a2dc009f449 100644 --- a/boards/arm/stm32/stm32f411e-disco/src/stm32f411e-disco.h +++ b/boards/arm/stm32/stm32f411e-disco/src/stm32f411e-disco.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f411e-disco/src/stm32f411e-disco.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Authors: Frank Bennett - * Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f429i-disco/scripts/Make.defs b/boards/arm/stm32/stm32f429i-disco/scripts/Make.defs index fa03cb33635..4fcafe093b0 100644 --- a/boards/arm/stm32/stm32f429i-disco/scripts/Make.defs +++ b/boards/arm/stm32/stm32f429i-disco/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f429i-disco/src/stm32_idle.c b/boards/arm/stm32/stm32f429i-disco/src/stm32_idle.c index abea2a6a0ab..ce464c1d294 100644 --- a/boards/arm/stm32/stm32f429i-disco/src/stm32_idle.c +++ b/boards/arm/stm32/stm32f429i-disco/src/stm32_idle.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f429i-disco/src/stm32_idle.c * - * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * http://www.apache.org/licenses/LICENSE-2.0 * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f4discovery/configs/cxxtest/Make.defs b/boards/arm/stm32/stm32f4discovery/configs/cxxtest/Make.defs index 3b0d2d57cdd..7bf8595461d 100644 --- a/boards/arm/stm32/stm32f4discovery/configs/cxxtest/Make.defs +++ b/boards/arm/stm32/stm32f4discovery/configs/cxxtest/Make.defs @@ -54,13 +54,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f4discovery/configs/hciuart/defconfig b/boards/arm/stm32/stm32f4discovery/configs/hciuart/defconfig deleted file mode 100644 index 1919146176b..00000000000 --- a/boards/arm/stm32/stm32f4discovery/configs/hciuart/defconfig +++ /dev/null @@ -1,78 +0,0 @@ -# -# This file is autogenerated: PLEASE DO NOT EDIT IT. -# -# You can use "make menuconfig" to make any modifications to the installed .config file. -# You can then do "make savedefconfig" to generate a new defconfig file that includes your -# modifications. -# -# CONFIG_ARCH_FPU is not set -# CONFIG_NET_ETHERNET is not set -# CONFIG_NET_IPv4 is not set -# CONFIG_NSH_ARGCAT is not set -# CONFIG_NSH_CMDOPT_HEXDUMP is not set -# CONFIG_NSH_CMDPARMS is not set -# CONFIG_NSH_NETINIT is not set -CONFIG_ARCH="arm" -CONFIG_ARCH_BOARD="stm32f4discovery" -CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y -CONFIG_ARCH_BUTTONS=y -CONFIG_ARCH_CHIP="stm32" -CONFIG_ARCH_CHIP_STM32=y -CONFIG_ARCH_CHIP_STM32F407VG=y -CONFIG_ARCH_INTERRUPTSTACK=2048 -CONFIG_ARCH_STACKDUMP=y -CONFIG_BLUETOOTH_MAX_CONN=2 -CONFIG_BLUETOOTH_MAX_PAIRED=2 -CONFIG_BLUETOOTH_UART=y -CONFIG_BOARDCTL_RESET=y -CONFIG_BOARD_LOOPSPERMSEC=16717 -CONFIG_BTSAK=y -CONFIG_BUILTIN=y -CONFIG_DRIVERS_BLUETOOTH=y -CONFIG_DRIVERS_WIRELESS=y -CONFIG_FS_PROCFS=y -CONFIG_HAVE_CXX=y -CONFIG_HAVE_CXXINITIALIZE=y -CONFIG_INTELHEX_BINARY=y -CONFIG_IOB_BUFSIZE=80 -CONFIG_IOB_NBUFFERS=64 -CONFIG_IOB_NCHAINS=16 -CONFIG_IOB_THROTTLE=16 -CONFIG_LIBC_HOSTNAME="STM32F4-Discovery" -CONFIG_NET=y -CONFIG_NETDEVICES=y -CONFIG_NETDEV_LATEINIT=y -CONFIG_NETDEV_PHY_IOCTL=y -CONFIG_NET_BLUETOOTH=y -CONFIG_NET_SOCKOPTS=y -CONFIG_NSH_ARCHINIT=y -CONFIG_NSH_BUILTIN_APPS=y -CONFIG_NSH_FILEIOSIZE=512 -CONFIG_NSH_LINELEN=64 -CONFIG_NSH_READLINE=y -CONFIG_PREALLOC_MQ_MSGS=64 -CONFIG_PREALLOC_TIMERS=4 -CONFIG_RAM_SIZE=114688 -CONFIG_RAM_START=0x20000000 -CONFIG_RAW_BINARY=y -CONFIG_RR_INTERVAL=200 -CONFIG_SCHED_HPWORKPRIORITY=192 -CONFIG_SCHED_WAITPID=y -CONFIG_SDCLONE_DISABLE=y -CONFIG_START_DAY=13 -CONFIG_START_MONTH=9 -CONFIG_START_YEAR=2014 -CONFIG_STM32F4DISBB=y -CONFIG_STM32_DMA2=y -CONFIG_STM32_DMACAPABLE=y -CONFIG_STM32_JTAG_SW_ENABLE=y -CONFIG_STM32_PWR=y -CONFIG_STM32_SPI1=y -CONFIG_STM32_USART3=y -CONFIG_STM32_USART3_HCIUART=y -CONFIG_STM32_USART6=y -CONFIG_SYSTEM_NSH=y -CONFIG_USART6_SERIAL_CONSOLE=y -CONFIG_USER_ENTRYPOINT="nsh_main" -CONFIG_WIRELESS=y -CONFIG_WIRELESS_BLUETOOTH=y diff --git a/boards/arm/stm32/stm32f4discovery/configs/rndis/defconfig b/boards/arm/stm32/stm32f4discovery/configs/rndis/defconfig index 92e1f941c27..3b0f9e26c14 100644 --- a/boards/arm/stm32/stm32f4discovery/configs/rndis/defconfig +++ b/boards/arm/stm32/stm32f4discovery/configs/rndis/defconfig @@ -9,6 +9,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="stm32f4discovery" CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y diff --git a/boards/arm/stm32/stm32f4discovery/configs/testlibcxx/Make.defs b/boards/arm/stm32/stm32f4discovery/configs/testlibcxx/Make.defs index 94e98cb6d80..083c5e3d763 100644 --- a/boards/arm/stm32/stm32f4discovery/configs/testlibcxx/Make.defs +++ b/boards/arm/stm32/stm32f4discovery/configs/testlibcxx/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/stm32/stm32f4discovery/configs/testlibcxx/Make.defs # -# Copyright (C) 2017 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Daniel Pereira Volpato +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -77,13 +61,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f4discovery/configs/winbuild/Make.defs b/boards/arm/stm32/stm32f4discovery/configs/winbuild/Make.defs index fe5eba0431e..98ed0929674 100644 --- a/boards/arm/stm32/stm32f4discovery/configs/winbuild/Make.defs +++ b/boards/arm/stm32/stm32f4discovery/configs/winbuild/Make.defs @@ -47,11 +47,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)\binfmt\libnxflat\gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)\binfmt\libnxflat\gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -LDFLAGS += -nostartfiles -nodefaultlibs ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f4discovery/kernel/Makefile b/boards/arm/stm32/stm32f4discovery/kernel/Makefile index 34ea2b7bd67..2a43089e594 100644 --- a/boards/arm/stm32/stm32f4discovery/kernel/Makefile +++ b/boards/arm/stm32/stm32f4discovery/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) $(USER_LIBGCC) -Wl,--end-group + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) $(USER_LIBGCC) --end-group $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32/stm32f4discovery/kernel/stm32_userspace.c b/boards/arm/stm32/stm32f4discovery/kernel/stm32_userspace.c index 7aba9b1bd05..4d4b3e9d65a 100644 --- a/boards/arm/stm32/stm32f4discovery/kernel/stm32_userspace.c +++ b/boards/arm/stm32/stm32f4discovery/kernel/stm32_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32/stm32f4discovery/scripts/Make.defs b/boards/arm/stm32/stm32f4discovery/scripts/Make.defs index 7edfe3dee5c..a1632e692dd 100644 --- a/boards/arm/stm32/stm32f4discovery/scripts/Make.defs +++ b/boards/arm/stm32/stm32f4discovery/scripts/Make.defs @@ -63,8 +63,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -90,10 +90,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif - -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_cs43l22.c b/boards/arm/stm32/stm32f4discovery/src/stm32_cs43l22.c index 9ce42200fdf..0122f7e4a1f 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_cs43l22.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_cs43l22.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f4discovery/src/stm32_cs43l22.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Taras Drozdovskiy + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_idle.c b/boards/arm/stm32/stm32f4discovery/src/stm32_idle.c index 9d062d53e39..93d18d059ab 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_idle.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_idle.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f4discovery/src/stm32_idle.c * - * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * http://www.apache.org/licenses/LICENSE-2.0 * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_pm.c b/boards/arm/stm32/stm32f4discovery/src/stm32_pm.c index f8aef27346c..b10656e2e64 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_pm.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_pm.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f4discovery/src/stm32_pm.c * - * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_pmbuttons.c b/boards/arm/stm32/stm32f4discovery/src/stm32_pmbuttons.c index d9495cd0f5b..5268e608f17 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_pmbuttons.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_pmbuttons.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f4discovery/src/stm32_pmbuttons.c * - * Copyright (C) 2012, 2015-2017 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Diego Sanchez + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_st7567.c b/boards/arm/stm32/stm32f4discovery/src/stm32_st7567.c index 9760cfc0e91..29f5922702f 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_st7567.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_st7567.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f4discovery/src/stm32_st7567.c * - * Copyright (C) 2016 Uniquix Tecnologia. All rights reserved. - * Author: Alan Carvalho de Assis + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * I used the JLX12864G-086 LCD module based on ST7567 controller. + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on boards/zkit-arm-1769/src/lpc17_40_lcd.c - * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32f4discovery/src/stm32_timer.c b/boards/arm/stm32/stm32f4discovery/src/stm32_timer.c index 8776124c181..236fe64b2b1 100644 --- a/boards/arm/stm32/stm32f4discovery/src/stm32_timer.c +++ b/boards/arm/stm32/stm32f4discovery/src/stm32_timer.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32f4discovery/src/stm32_timer.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * With modifications from Calvin Maguranis + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32ldiscovery/scripts/Make.defs b/boards/arm/stm32/stm32ldiscovery/scripts/Make.defs index decdc6b2675..a4f44764fb4 100644 --- a/boards/arm/stm32/stm32ldiscovery/scripts/Make.defs +++ b/boards/arm/stm32/stm32ldiscovery/scripts/Make.defs @@ -55,13 +55,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32/stm32vldiscovery/include/board.h b/boards/arm/stm32/stm32vldiscovery/include/board.h index 590f500983f..0ae1ee04f9d 100644 --- a/boards/arm/stm32/stm32vldiscovery/include/board.h +++ b/boards/arm/stm32/stm32vldiscovery/include/board.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32vldiscovery/include/board.h * - * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Freddie Chopin + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32vldiscovery/scripts/Make.defs b/boards/arm/stm32/stm32vldiscovery/scripts/Make.defs index 18e6192a1b0..255484d1968 100644 --- a/boards/arm/stm32/stm32vldiscovery/scripts/Make.defs +++ b/boards/arm/stm32/stm32vldiscovery/scripts/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/stm32/stm32vldiscovery/scripts/Make.defs # -# Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Freddie Chopin +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -67,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) - LDFLAGS += -g + LDFLAGS = -g endif diff --git a/boards/arm/stm32/stm32vldiscovery/scripts/stm32vldiscovery.ld b/boards/arm/stm32/stm32vldiscovery/scripts/stm32vldiscovery.ld index 6120d6a7357..49d26237e67 100644 --- a/boards/arm/stm32/stm32vldiscovery/scripts/stm32vldiscovery.ld +++ b/boards/arm/stm32/stm32vldiscovery/scripts/stm32vldiscovery.ld @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32vldiscovery/scripts/stm32vldiscovery.ld * - * Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Freddie Chopin + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32vldiscovery/src/Make.defs b/boards/arm/stm32/stm32vldiscovery/src/Make.defs index 83f1e154188..15462269f2a 100644 --- a/boards/arm/stm32/stm32vldiscovery/src/Make.defs +++ b/boards/arm/stm32/stm32vldiscovery/src/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/stm32/stm32vldiscovery/src/Make.defs # -# Copyright (C) 2012 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Freddie Chopin +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/stm32/stm32vldiscovery/src/stm32_boot.c b/boards/arm/stm32/stm32vldiscovery/src/stm32_boot.c index a05b19d69c3..2ae573548d4 100644 --- a/boards/arm/stm32/stm32vldiscovery/src/stm32_boot.c +++ b/boards/arm/stm32/stm32vldiscovery/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32vldiscovery/src/stm32_boot.c * - * Copyright (C) 2012, 2019 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Freddie Chopin + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32vldiscovery/src/stm32_buttons.c b/boards/arm/stm32/stm32vldiscovery/src/stm32_buttons.c index 8140104e70f..1c0ed02dbf9 100644 --- a/boards/arm/stm32/stm32vldiscovery/src/stm32_buttons.c +++ b/boards/arm/stm32/stm32vldiscovery/src/stm32_buttons.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32vldiscovery/src/stm32_buttons.c * - * Copyright (C) 2012, 2014-2015, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Freddie Chopin + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32vldiscovery/src/stm32_leds.c b/boards/arm/stm32/stm32vldiscovery/src/stm32_leds.c index 96dcbbde07c..4b3aaee50c6 100644 --- a/boards/arm/stm32/stm32vldiscovery/src/stm32_leds.c +++ b/boards/arm/stm32/stm32vldiscovery/src/stm32_leds.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32vldiscovery/src/stm32_leds.c * - * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Freddie Chopin + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/stm32vldiscovery/src/stm32vldiscovery.h b/boards/arm/stm32/stm32vldiscovery/src/stm32vldiscovery.h index b392e8f9852..a237d00296e 100644 --- a/boards/arm/stm32/stm32vldiscovery/src/stm32vldiscovery.h +++ b/boards/arm/stm32/stm32vldiscovery/src/stm32vldiscovery.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32/stm32vldiscovery/src/stm32vldiscovery.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Freddie Chopin + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32/viewtool-stm32f107/scripts/Make.defs b/boards/arm/stm32/viewtool-stm32f107/scripts/Make.defs index ee0969983da..d8cef0e44d2 100644 --- a/boards/arm/stm32/viewtool-stm32f107/scripts/Make.defs +++ b/boards/arm/stm32/viewtool-stm32f107/scripts/Make.defs @@ -55,13 +55,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f0l0g0/b-l072z-lrwan1/scripts/Make.defs b/boards/arm/stm32f0l0g0/b-l072z-lrwan1/scripts/Make.defs index e061cdbd8e5..404491fb429 100644 --- a/boards/arm/stm32f0l0g0/b-l072z-lrwan1/scripts/Make.defs +++ b/boards/arm/stm32f0l0g0/b-l072z-lrwan1/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f0l0g0/nucleo-f072rb/scripts/Make.defs b/boards/arm/stm32f0l0g0/nucleo-f072rb/scripts/Make.defs index 75e8968195b..168e86c49fd 100644 --- a/boards/arm/stm32f0l0g0/nucleo-f072rb/scripts/Make.defs +++ b/boards/arm/stm32f0l0g0/nucleo-f072rb/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f0l0g0/nucleo-f091rc/scripts/Make.defs b/boards/arm/stm32f0l0g0/nucleo-f091rc/scripts/Make.defs index fad356d8229..168e3117e82 100644 --- a/boards/arm/stm32f0l0g0/nucleo-f091rc/scripts/Make.defs +++ b/boards/arm/stm32f0l0g0/nucleo-f091rc/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/include/board.h b/boards/arm/stm32f0l0g0/nucleo-g070rb/include/board.h index aa6a3b4654f..00b78131aec 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/include/board.h +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/include/board.h @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32f0l0g0/nucleo-g070rb/include/board.h * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Daniel Pereira Volpato + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/include/board.h - * Author: Mateusz Szafoni + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/Make.defs b/boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/Make.defs index a6ae9e9cb31..ef83a1f8436 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/Make.defs +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/Make.defs @@ -1,38 +1,20 @@ ############################################################################ # boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/Make.defs # -# Copyright (C) 2019 Gregory Nutt. All rights reserved. -# Author: Daniel Pereira Volpato +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/scripts/Make.defs -# Author: Gregory Nutt +# http://www.apache.org/licenses/LICENSE-2.0 # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -69,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/ld.script b/boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/ld.script index f21359d06b2..68a974ea9fd 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/ld.script +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/ld.script @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32f0l0g0/nucleo-g070rb/scripts/ld.script * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Daniel Pereira Volpato + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/scripts/ld.script - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/Makefile b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/Makefile index a7a93c155b4..d37ebbc776d 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/Makefile +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/Makefile @@ -1,38 +1,20 @@ ############################################################################ # boards/arm/stm32f0l0g0/nucleo-g070rb/src/Makefile # -# Copyright (C) 2019 Gregory Nutt. All rights reserved. -# Author: Daniel Pereira Volpato +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/src/Makefile -# Author: Mateusz Szafoni +# http://www.apache.org/licenses/LICENSE-2.0 # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/nucleo-g070rb.h b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/nucleo-g070rb.h index 2f1d79763a7..2f96dfd78be 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/nucleo-g070rb.h +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/nucleo-g070rb.h @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32f0l0g0/nucleo-g070rb/src/nucleo-g070rb.h * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Daniel Pereira Volpato + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/src/nucleo-g071rb.h - * Author: Mateusz Szafoni + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_appinit.c b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_appinit.c index 8a03ff2bc7d..95e3dc73ec4 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_appinit.c +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_appinit.c @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_appinit.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Daniel Pereira Volpato + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/src/stm32_appinit.c - * Author: Mateusz Szafoni + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_autoleds.c b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_autoleds.c index fd100af9498..1dda140f12e 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_autoleds.c +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_autoleds.c @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_autoleds.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Daniel Pereira Volpato + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/src/stm32_autoleds.c - * Author: Mateusz Szafoni + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_boot.c b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_boot.c index 2e22e0d6454..1ee8d6fe91a 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_boot.c +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_boot.c @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_boot.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Daniel Pereira Volpato + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/src/stm32_boot.c - * Author: Mateusz Szafoni + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_bringup.c b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_bringup.c index cf199b706ce..a5792a148ec 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_bringup.c +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_bringup.c @@ -1,42 +1,20 @@ /**************************************************************************** * boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_bringup.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Daniel Pereira Volpato - * Guillherme da Silva Amaral + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/arm/stm32h7/stm32h747i-disco/src/stm32_bringup.c - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/src/stm32_bringup.c - * Author: Mateusz Szafoni - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_buttons.c b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_buttons.c index 783a1f93b9b..226a540300d 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_buttons.c +++ b/boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_buttons.c @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32f0l0g0/nucleo-g070rb/src/stm32_buttons.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Daniel Pereira Volpato + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/arm/stm32f0l0g0/nucleo-g071rb/src/stm32_buttons.c - * Author: Mateusz Szafoni + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f0l0g0/nucleo-g071rb/scripts/Make.defs b/boards/arm/stm32f0l0g0/nucleo-g071rb/scripts/Make.defs index 176d2e5ff61..f8645d35c5d 100644 --- a/boards/arm/stm32f0l0g0/nucleo-g071rb/scripts/Make.defs +++ b/boards/arm/stm32f0l0g0/nucleo-g071rb/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f0l0g0/nucleo-l073rz/scripts/Make.defs b/boards/arm/stm32f0l0g0/nucleo-l073rz/scripts/Make.defs index 54d156c960b..1dadfbc0df2 100644 --- a/boards/arm/stm32f0l0g0/nucleo-l073rz/scripts/Make.defs +++ b/boards/arm/stm32f0l0g0/nucleo-l073rz/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f0l0g0/stm32f051-discovery/scripts/Make.defs b/boards/arm/stm32f0l0g0/stm32f051-discovery/scripts/Make.defs index b852907637a..8bbcfc91cd3 100644 --- a/boards/arm/stm32f0l0g0/stm32f051-discovery/scripts/Make.defs +++ b/boards/arm/stm32f0l0g0/stm32f051-discovery/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f0l0g0/stm32f072-discovery/scripts/Make.defs b/boards/arm/stm32f0l0g0/stm32f072-discovery/scripts/Make.defs index 00c791235dd..49957a5ab4c 100644 --- a/boards/arm/stm32f0l0g0/stm32f072-discovery/scripts/Make.defs +++ b/boards/arm/stm32f0l0g0/stm32f072-discovery/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/nucleo-144/configs/f722-nsh/Make.defs b/boards/arm/stm32f7/nucleo-144/configs/f722-nsh/Make.defs index da3ffbc30d7..b4bbeba275d 100644 --- a/boards/arm/stm32f7/nucleo-144/configs/f722-nsh/Make.defs +++ b/boards/arm/stm32f7/nucleo-144/configs/f722-nsh/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/nucleo-144/configs/f746-evalos/Make.defs b/boards/arm/stm32f7/nucleo-144/configs/f746-evalos/Make.defs index 530cbe52ab1..7e36ab573aa 100644 --- a/boards/arm/stm32f7/nucleo-144/configs/f746-evalos/Make.defs +++ b/boards/arm/stm32f7/nucleo-144/configs/f746-evalos/Make.defs @@ -1,37 +1,20 @@ ############################################################################ # boards/arm/stm32f7/nucleo-144/configs/f746-evalos/Make.defs # -# Copyright (C) 2016 Gregory Nutt. All rights reserved. -# Authors: Gregory Nutt -# Mark Olsson -# David Sidrane +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -68,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/nucleo-144/configs/f746-nsh/Make.defs b/boards/arm/stm32f7/nucleo-144/configs/f746-nsh/Make.defs index 6f1cd5e5aec..b892acc665e 100644 --- a/boards/arm/stm32f7/nucleo-144/configs/f746-nsh/Make.defs +++ b/boards/arm/stm32f7/nucleo-144/configs/f746-nsh/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/Make.defs b/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/Make.defs index 53ac3ee8bcf..5a9d02569ab 100644 --- a/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/Make.defs +++ b/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig b/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig index b44c5ce18af..50cfc0131ee 100644 --- a/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig +++ b/boards/arm/stm32f7/nucleo-144/configs/f746-pysim/defconfig @@ -26,16 +26,14 @@ CONFIG_ARMV7M_DCACHE=y CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y CONFIG_ARMV7M_DTCM=y CONFIG_ARMV7M_ICACHE=y -CONFIG_BOARDCTL_USBDEVCTRL=y CONFIG_BOARD_LATE_INITIALIZE=y CONFIG_BOARD_LOOPSPERMSEC=43103 CONFIG_BUILTIN=y CONFIG_CAN_USE_RTR=y -CONFIG_CDCACM=y -CONFIG_CDCACM_CONSOLE=y CONFIG_CLOCK_MONOTONIC=y CONFIG_DEV_GPIO=y CONFIG_DRVR_READAHEAD=y +CONFIG_ETH0_PHY_LAN8742A=y CONFIG_EXAMPLES_HELLO=y CONFIG_FS_TMPFS=y CONFIG_HAVE_CXX=y @@ -47,6 +45,26 @@ CONFIG_LIBM=y CONFIG_MM_REGIONS=2 CONFIG_MODULE=y CONFIG_MQ_MAXMSGSIZE=256 +CONFIG_NET=y +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETINIT_DRIPADDR=0xc0a8b201 +CONFIG_NETINIT_IPADDR=0xc0a8b2b2 +CONFIG_NETUTILS_DISCOVER=y +CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_ARP_IPIN=y +CONFIG_NET_ARP_SEND=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ETH_PKTSIZE=1500 +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_IGMP=y +CONFIG_NET_LOOPBACK=y +CONFIG_NET_ROUTE=y +CONFIG_NET_STATISTICS=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NET_UDP_CHECKSUMS=y CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_FILEIOSIZE=512 @@ -85,7 +103,15 @@ CONFIG_STM32F7_CAN_TSEG2=6 CONFIG_STM32F7_DMA1=y CONFIG_STM32F7_DMA2=y CONFIG_STM32F7_DMACAPABLE=y -CONFIG_STM32F7_OTGFS=y +CONFIG_STM32F7_ETHMAC=y +CONFIG_STM32F7_PHYADDR=0 +CONFIG_STM32F7_PHYSR=31 +CONFIG_STM32F7_PHYSR_100FD=0x0018 +CONFIG_STM32F7_PHYSR_100HD=0x0008 +CONFIG_STM32F7_PHYSR_10FD=0x0014 +CONFIG_STM32F7_PHYSR_10HD=0x0004 +CONFIG_STM32F7_PHYSR_ALTCONFIG=y +CONFIG_STM32F7_PHYSR_ALTMODE=0x001c CONFIG_STM32F7_PWM_MULTICHAN=y CONFIG_STM32F7_SYSCFG_IOCOMPENSATION=y CONFIG_STM32F7_TIM1=y @@ -102,11 +128,12 @@ CONFIG_STM32F7_TIM3_CHANNEL2=y CONFIG_STM32F7_TIM3_CHANNEL3=y CONFIG_STM32F7_TIM3_CHANNEL4=y CONFIG_STM32F7_TIM3_PWM=y +CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING=y CONFIG_SYSTEM_TIME64=y CONFIG_TASK_NAME_SIZE=0 -CONFIG_USART3_BAUD=1200000 -CONFIG_USBDEV=y +CONFIG_USART3_SERIAL_CONSOLE=y CONFIG_USERLED=y CONFIG_USERLED_LOWER=y CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/arm/stm32f7/nucleo-144/configs/f767-evalos/Make.defs b/boards/arm/stm32f7/nucleo-144/configs/f767-evalos/Make.defs index 59f21f65fcb..cbb0fa5b2a1 100644 --- a/boards/arm/stm32f7/nucleo-144/configs/f767-evalos/Make.defs +++ b/boards/arm/stm32f7/nucleo-144/configs/f767-evalos/Make.defs @@ -1,37 +1,20 @@ ############################################################################ # boards/arm/stm32f7/nucleo-144/configs/f767-evalos/Make.defs # -# Copyright (C) 2016 Gregory Nutt. All rights reserved. -# Authors: Gregory Nutt -# Mark Olsson -# David Sidrane +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -68,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/nucleo-144/configs/f767-netnsh/Make.defs b/boards/arm/stm32f7/nucleo-144/configs/f767-netnsh/Make.defs index 9581bb20b16..e6a45dec158 100644 --- a/boards/arm/stm32f7/nucleo-144/configs/f767-netnsh/Make.defs +++ b/boards/arm/stm32f7/nucleo-144/configs/f767-netnsh/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/nucleo-144/configs/f767-nsh/Make.defs b/boards/arm/stm32f7/nucleo-144/configs/f767-nsh/Make.defs index 4449b6f0d7b..1e60a1c514d 100644 --- a/boards/arm/stm32f7/nucleo-144/configs/f767-nsh/Make.defs +++ b/boards/arm/stm32f7/nucleo-144/configs/f767-nsh/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/nucleo-144/src/nucleo-144.h b/boards/arm/stm32f7/nucleo-144/src/nucleo-144.h index 226ada2604e..7bbdf40b348 100644 --- a/boards/arm/stm32f7/nucleo-144/src/nucleo-144.h +++ b/boards/arm/stm32f7/nucleo-144/src/nucleo-144.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32f7/nucleo-144/src/nucleo-144.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Mark Olsson - * David Sidrane + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f7/nucleo-144/src/stm32_adc.c b/boards/arm/stm32f7/nucleo-144/src/stm32_adc.c index 9e5b82230fd..e765a73365c 100644 --- a/boards/arm/stm32f7/nucleo-144/src/stm32_adc.c +++ b/boards/arm/stm32f7/nucleo-144/src/stm32_adc.c @@ -65,7 +65,7 @@ /* The number of ADC channels in the conversion list */ -#define ADC1_NCHANNELS 1 +#define ADC1_NCHANNELS 3 /**************************************************************************** * Private Data @@ -79,7 +79,7 @@ #ifdef CONFIG_STM32F7_ADC1 static const uint8_t g_chanlist[ADC1_NCHANNELS] = { - 3 + 3, 10, 13 }; /* Configurations of pins used byte each ADC channels @@ -93,7 +93,9 @@ static const uint8_t g_chanlist[ADC1_NCHANNELS] = static const uint32_t g_pinlist[ADC1_NCHANNELS] = { - GPIO_ADC1_IN3 + GPIO_ADC1_IN3, + GPIO_ADC1_IN10, + GPIO_ADC1_IN13 }; #endif diff --git a/boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c b/boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c index 8177e5b548b..632c75e95e1 100644 --- a/boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c +++ b/boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32f7/nucleo-144/src/stm32_appinitialize.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Mark Olsson - * David Sidrane + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f7/nucleo-144/src/stm32_dma_alloc.c b/boards/arm/stm32f7/nucleo-144/src/stm32_dma_alloc.c index 8e571be05dd..1f1eee6115c 100644 --- a/boards/arm/stm32f7/nucleo-144/src/stm32_dma_alloc.c +++ b/boards/arm/stm32f7/nucleo-144/src/stm32_dma_alloc.c @@ -74,7 +74,7 @@ static GRAN_HANDLE dma_allocator; */ static -uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] __attribute__((aligned(64))); +uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] aligned_data(64); /**************************************************************************** * Public Functions diff --git a/boards/arm/stm32f7/nucleo-144/src/stm32_userleds.c b/boards/arm/stm32f7/nucleo-144/src/stm32_userleds.c index 02dd28567be..32722d84d60 100644 --- a/boards/arm/stm32f7/nucleo-144/src/stm32_userleds.c +++ b/boards/arm/stm32f7/nucleo-144/src/stm32_userleds.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32f7/nucleo-144/src/stm32_userleds.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Mark Olsson - * David Sidrane + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f7/stm32f746-ws/include/board.h b/boards/arm/stm32f7/stm32f746-ws/include/board.h index 5f552060efe..b6643718dc9 100644 --- a/boards/arm/stm32f7/stm32f746-ws/include/board.h +++ b/boards/arm/stm32f7/stm32f746-ws/include/board.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32f7/stm32f746-ws/include/board.h * - * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Mark Olsson + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f7/stm32f746-ws/scripts/Make.defs b/boards/arm/stm32f7/stm32f746-ws/scripts/Make.defs index f8297ab0764..87cb9c9860d 100644 --- a/boards/arm/stm32f7/stm32f746-ws/scripts/Make.defs +++ b/boards/arm/stm32f7/stm32f746-ws/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/stm32f746-ws/src/stm32_appinitialize.c b/boards/arm/stm32f7/stm32f746-ws/src/stm32_appinitialize.c index fbb5c20a869..d9c13e95f0a 100644 --- a/boards/arm/stm32f7/stm32f746-ws/src/stm32_appinitialize.c +++ b/boards/arm/stm32f7/stm32f746-ws/src/stm32_appinitialize.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32f7/stm32f746-ws/src/stm32_appinitialize.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f7/stm32f746-ws/src/stm32_dma_alloc.c b/boards/arm/stm32f7/stm32f746-ws/src/stm32_dma_alloc.c index 1748f06ff19..b2146b11b58 100644 --- a/boards/arm/stm32f7/stm32f746-ws/src/stm32_dma_alloc.c +++ b/boards/arm/stm32f7/stm32f746-ws/src/stm32_dma_alloc.c @@ -74,7 +74,7 @@ static GRAN_HANDLE dma_allocator; */ static -uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] __attribute__((aligned(64))); +uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] aligned_data(64); /**************************************************************************** * Public Functions diff --git a/boards/arm/stm32f7/stm32f746-ws/src/stm32f746-ws.h b/boards/arm/stm32f7/stm32f746-ws/src/stm32f746-ws.h index 7126da15b70..da27d659797 100644 --- a/boards/arm/stm32f7/stm32f746-ws/src/stm32f746-ws.h +++ b/boards/arm/stm32f7/stm32f746-ws/src/stm32f746-ws.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32f7/stm32f746-ws/src/stm32f746-ws.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32f7/stm32f746g-disco/kernel/Makefile b/boards/arm/stm32f7/stm32f746g-disco/kernel/Makefile index 22b31293a9f..5eb94e7a6c8 100644 --- a/boards/arm/stm32f7/stm32f746g-disco/kernel/Makefile +++ b/boards/arm/stm32f7/stm32f746g-disco/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32f7/stm32f746g-disco/kernel/stm32_userspace.c b/boards/arm/stm32f7/stm32f746g-disco/kernel/stm32_userspace.c index 8802d46627c..ea60ccc8231 100644 --- a/boards/arm/stm32f7/stm32f746g-disco/kernel/stm32_userspace.c +++ b/boards/arm/stm32f7/stm32f746g-disco/kernel/stm32_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32f7/stm32f746g-disco/scripts/Make.defs b/boards/arm/stm32f7/stm32f746g-disco/scripts/Make.defs index e2c47c6fa9c..7947c07cc99 100644 --- a/boards/arm/stm32f7/stm32f746g-disco/scripts/Make.defs +++ b/boards/arm/stm32f7/stm32f746g-disco/scripts/Make.defs @@ -62,13 +62,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32f7/stm32f769i-disco/kernel/Makefile b/boards/arm/stm32f7/stm32f769i-disco/kernel/Makefile index acf53454f96..e9cf736612c 100644 --- a/boards/arm/stm32f7/stm32f769i-disco/kernel/Makefile +++ b/boards/arm/stm32f7/stm32f769i-disco/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32f7/stm32f769i-disco/kernel/stm32_userspace.c b/boards/arm/stm32f7/stm32f769i-disco/kernel/stm32_userspace.c index 70de68b0dd2..cb34f48671e 100644 --- a/boards/arm/stm32f7/stm32f769i-disco/kernel/stm32_userspace.c +++ b/boards/arm/stm32f7/stm32f769i-disco/kernel/stm32_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32f7/stm32f769i-disco/scripts/Make.defs b/boards/arm/stm32f7/stm32f769i-disco/scripts/Make.defs index 637b949dcb6..397c227a0a8 100644 --- a/boards/arm/stm32f7/stm32f769i-disco/scripts/Make.defs +++ b/boards/arm/stm32f7/stm32f769i-disco/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32h7/nucleo-h743zi/include/board.h b/boards/arm/stm32h7/nucleo-h743zi/include/board.h index a60f6082fc0..2511f986f3d 100644 --- a/boards/arm/stm32h7/nucleo-h743zi/include/board.h +++ b/boards/arm/stm32h7/nucleo-h743zi/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32h7/nucleo-h743zi/include/board.h * - * Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Simon Laube - * Mateusz Szafoni + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32h7/nucleo-h743zi/kernel/Makefile b/boards/arm/stm32h7/nucleo-h743zi/kernel/Makefile index 7da93a8df4d..b85631e8e63 100644 --- a/boards/arm/stm32h7/nucleo-h743zi/kernel/Makefile +++ b/boards/arm/stm32h7/nucleo-h743zi/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32h7/nucleo-h743zi/kernel/stm32_userspace.c b/boards/arm/stm32h7/nucleo-h743zi/kernel/stm32_userspace.c index c4ce31e82ea..e0934a03695 100644 --- a/boards/arm/stm32h7/nucleo-h743zi/kernel/stm32_userspace.c +++ b/boards/arm/stm32h7/nucleo-h743zi/kernel/stm32_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32h7/nucleo-h743zi/scripts/Make.defs b/boards/arm/stm32h7/nucleo-h743zi/scripts/Make.defs index daa1c36bb09..f6778f74919 100644 --- a/boards/arm/stm32h7/nucleo-h743zi/scripts/Make.defs +++ b/boards/arm/stm32h7/nucleo-h743zi/scripts/Make.defs @@ -51,8 +51,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -67,9 +67,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32h7/nucleo-h743zi/scripts/flash.ld b/boards/arm/stm32h7/nucleo-h743zi/scripts/flash.ld index 59cdb4389b4..7bf424656da 100644 --- a/boards/arm/stm32h7/nucleo-h743zi/scripts/flash.ld +++ b/boards/arm/stm32h7/nucleo-h743zi/scripts/flash.ld @@ -172,7 +172,7 @@ SECTIONS /* Emit the the D3 power domain section for locating BDMA data * - * Static data with __attribute__ ((section (".sram4"))) will be located + * Static data with locate_data(".sram4") will be located * at start of SRAM4; the rest of SRAM4 will be added to the heap. */ diff --git a/boards/arm/stm32h7/nucleo-h743zi/scripts/kernel.space.ld b/boards/arm/stm32h7/nucleo-h743zi/scripts/kernel.space.ld index f3437a16f30..5b39d113966 100644 --- a/boards/arm/stm32h7/nucleo-h743zi/scripts/kernel.space.ld +++ b/boards/arm/stm32h7/nucleo-h743zi/scripts/kernel.space.ld @@ -81,7 +81,7 @@ SECTIONS /* Emit the the D3 power domain section for locating BDMA data * - * Static data with __attribute__ ((section (".sram4"))) will be located + * Static data with locate_data(".sram4") will be located * at start of SRAM4; the rest of SRAM4 will be added to the heap. */ diff --git a/boards/arm/stm32h7/nucleo-h743zi/src/stm32_gpio.c b/boards/arm/stm32h7/nucleo-h743zi/src/stm32_gpio.c index d6de21fbdaf..43753d90cc9 100644 --- a/boards/arm/stm32h7/nucleo-h743zi/src/stm32_gpio.c +++ b/boards/arm/stm32h7/nucleo-h743zi/src/stm32_gpio.c @@ -1,40 +1,20 @@ /**************************************************************************** * boards/arm/stm32h7/nucleo-h743zi/src/stm32_gpio.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Heiko Demlang + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on: boards/arm/stm32f7/nucleo-144/src/stm32_gpio.c - * Author: Alan Carvalho de Assis - * Author: Philippe Coval - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32h7/nucleo-h743zi2/README.txt b/boards/arm/stm32h7/nucleo-h743zi2/README.txt index 1336feb78f5..1dd337acc0a 100644 --- a/boards/arm/stm32h7/nucleo-h743zi2/README.txt +++ b/boards/arm/stm32h7/nucleo-h743zi2/README.txt @@ -98,7 +98,7 @@ Configurations - Ethernet - DHCP Client - iperf - - telnet deamon + - telnet daemon File Systems: - FAT filesystem diff --git a/boards/arm/stm32h7/nucleo-h743zi2/scripts/Make.defs b/boards/arm/stm32h7/nucleo-h743zi2/scripts/Make.defs index 6de57694348..d3f3bd69b2e 100644 --- a/boards/arm/stm32h7/nucleo-h743zi2/scripts/Make.defs +++ b/boards/arm/stm32h7/nucleo-h743zi2/scripts/Make.defs @@ -51,8 +51,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -67,9 +67,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32h7/nucleo-h743zi2/scripts/flash.ld b/boards/arm/stm32h7/nucleo-h743zi2/scripts/flash.ld index 339cc43ecb1..276482189bf 100644 --- a/boards/arm/stm32h7/nucleo-h743zi2/scripts/flash.ld +++ b/boards/arm/stm32h7/nucleo-h743zi2/scripts/flash.ld @@ -172,7 +172,7 @@ SECTIONS /* Emit the the D3 power domain section for locating BDMA data * - * Static data with __attribute__ ((section (".sram4"))) will be located + * Static data with locate_data(".sram4") will be located * at start of SRAM4; the rest of SRAM4 will be added to the heap. */ diff --git a/boards/arm/stm32h7/stm32h747i-disco/include/board.h b/boards/arm/stm32h7/stm32h747i-disco/include/board.h index 7a42cc9c3bc..e5be7b52c5e 100644 --- a/boards/arm/stm32h7/stm32h747i-disco/include/board.h +++ b/boards/arm/stm32h7/stm32h747i-disco/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32h7/stm32h747i-disco/include/board.h * - * Copyright (C) 2018, 2019 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Simon Laube - * Mateusz Szafoni + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -304,7 +287,7 @@ (FMC_SDCR_COLBITS_9 | FMC_SDCR_ROWBITS_12 | FMC_SDCR_WIDTH_32 |\ FMC_SDCR_BANKS_4 | FMC_SDCR_CASLAT_2) -/* BOARD_FMC_SDTR[1..2] - Initial value for SDRAM timing registeres for SDRAM +/* BOARD_FMC_SDTR[1..2] - Initial value for SDRAM timing registers for SDRAM * bank 1-2. Note that some bits in SDTR1 influence both SDRAM banks and * are unused in SDTR2! */ diff --git a/boards/arm/stm32h7/stm32h747i-disco/kernel/Makefile b/boards/arm/stm32h7/stm32h747i-disco/kernel/Makefile index 8d011961fce..8cb2c383c40 100644 --- a/boards/arm/stm32h7/stm32h747i-disco/kernel/Makefile +++ b/boards/arm/stm32h7/stm32h747i-disco/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32h7/stm32h747i-disco/kernel/stm32_userspace.c b/boards/arm/stm32h7/stm32h747i-disco/kernel/stm32_userspace.c index ff757d4e606..fed57e0694f 100644 --- a/boards/arm/stm32h7/stm32h747i-disco/kernel/stm32_userspace.c +++ b/boards/arm/stm32h7/stm32h747i-disco/kernel/stm32_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32h7/stm32h747i-disco/scripts/Make.defs b/boards/arm/stm32h7/stm32h747i-disco/scripts/Make.defs index 6121c6ea86f..8f899e5ed34 100644 --- a/boards/arm/stm32h7/stm32h747i-disco/scripts/Make.defs +++ b/boards/arm/stm32h7/stm32h747i-disco/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32h7/stm32h747i-disco/scripts/flash.ld b/boards/arm/stm32h7/stm32h747i-disco/scripts/flash.ld index 824f6b63a38..1bf9a2ce8c2 100644 --- a/boards/arm/stm32h7/stm32h747i-disco/scripts/flash.ld +++ b/boards/arm/stm32h7/stm32h747i-disco/scripts/flash.ld @@ -170,7 +170,7 @@ SECTIONS /* Emit the the D3 power domain section for locating BDMA data * - * Static data with __attribute__ ((section (".sram4"))) will be located + * Static data with locate_data(".sram4") will be located * at start of SRAM4; the rest of SRAM4 will be added to the heap. */ diff --git a/boards/arm/stm32h7/stm32h747i-disco/scripts/kernel.space.ld b/boards/arm/stm32h7/stm32h747i-disco/scripts/kernel.space.ld index 45509b67683..e1db7b6727c 100644 --- a/boards/arm/stm32h7/stm32h747i-disco/scripts/kernel.space.ld +++ b/boards/arm/stm32h7/stm32h747i-disco/scripts/kernel.space.ld @@ -81,7 +81,7 @@ SECTIONS /* Emit the the D3 power domain section for locating BDMA data * - * Static data with __attribute__ ((section (".sram4"))) will be located + * Static data with locate_data(".sram4") will be located * at start of SRAM4; the rest of SRAM4 will be added to the heap. */ diff --git a/boards/arm/stm32h7/stm32h747i-disco/src/stm32_dma_alloc.c b/boards/arm/stm32h7/stm32h747i-disco/src/stm32_dma_alloc.c index e1e96541eed..ecb8ea9fdf2 100644 --- a/boards/arm/stm32h7/stm32h747i-disco/src/stm32_dma_alloc.c +++ b/boards/arm/stm32h7/stm32h747i-disco/src/stm32_dma_alloc.c @@ -60,7 +60,7 @@ static GRAN_HANDLE dma_allocator; */ static uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] - __attribute__((aligned(64))); + aligned_data(64); /**************************************************************************** * Public Functions diff --git a/boards/arm/stm32l4/b-l475e-iot01a/include/board.h b/boards/arm/stm32l4/b-l475e-iot01a/include/board.h index 3aa220c0086..c93f62582d6 100644 --- a/boards/arm/stm32l4/b-l475e-iot01a/include/board.h +++ b/boards/arm/stm32l4/b-l475e-iot01a/include/board.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/b-l475e-iot01a/include/board.h * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/b-l475e-iot01a/scripts/Make.defs b/boards/arm/stm32l4/b-l475e-iot01a/scripts/Make.defs index 84455abc747..2235dcc236a 100644 --- a/boards/arm/stm32l4/b-l475e-iot01a/scripts/Make.defs +++ b/boards/arm/stm32l4/b-l475e-iot01a/scripts/Make.defs @@ -54,18 +54,14 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif - define DOWNLOAD $(Q) echo "Download firmware $(1).bin" $(Q) st-flash write $(1).bin 0x08000000 diff --git a/boards/arm/stm32l4/b-l475e-iot01a/src/b-l475e-iot01a.h b/boards/arm/stm32l4/b-l475e-iot01a/src/b-l475e-iot01a.h index 1ff5f5189b1..0567b139a60 100644 --- a/boards/arm/stm32l4/b-l475e-iot01a/src/b-l475e-iot01a.h +++ b/boards/arm/stm32l4/b-l475e-iot01a/src/b-l475e-iot01a.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/b-l475e-iot01a/src/b-l475e-iot01a.h * - * Copyright (C) 2017, 2019 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_boot.c b/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_boot.c index bf2a5f895c2..dc20cf224d8 100644 --- a/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_boot.c +++ b/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_boot.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/b-l475e-iot01a/src/stm32_boot.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_bringup.c b/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_bringup.c index 3b42ce70dde..0bff5781821 100644 --- a/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_bringup.c +++ b/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_bringup.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/b-l475e-iot01a/src/stm32_bringup.c * - * Copyright (C) 2017-2019 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_userleds.c b/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_userleds.c index 80d8f3d3923..a951e448c97 100644 --- a/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_userleds.c +++ b/boards/arm/stm32l4/b-l475e-iot01a/src/stm32_userleds.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/b-l475e-iot01a/src/stm32_userleds.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Simon Piriou + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l432kc/scripts/Make.defs b/boards/arm/stm32l4/nucleo-l432kc/scripts/Make.defs index e0d87d5584e..7de585388c6 100644 --- a/boards/arm/stm32l4/nucleo-l432kc/scripts/Make.defs +++ b/boards/arm/stm32l4/nucleo-l432kc/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32l4/nucleo-l432kc/src/nucleo-l432kc.h b/boards/arm/stm32l4/nucleo-l432kc/src/nucleo-l432kc.h index 17a45dda707..e209ff65817 100644 --- a/boards/arm/stm32l4/nucleo-l432kc/src/nucleo-l432kc.h +++ b/boards/arm/stm32l4/nucleo-l432kc/src/nucleo-l432kc.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/nucleo-l432kc/src/nucleo-l432kc.h * - * Copyright (C) 2014, 2016, 2019 Gregory Nutt. All rights reserved. - * Authors: Frank Bennett - * Gregory Nutt - * Sebastien Lorquet + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l432kc/src/stm32_boot.c b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_boot.c index ada8017295a..0c7475a6648 100644 --- a/boards/arm/stm32l4/nucleo-l432kc/src/stm32_boot.c +++ b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/nucleo-l432kc/src/stm32_boot.c * - * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l452re/scripts/Make.defs b/boards/arm/stm32l4/nucleo-l452re/scripts/Make.defs index 7da0792d894..29eea1b269f 100644 --- a/boards/arm/stm32l4/nucleo-l452re/scripts/Make.defs +++ b/boards/arm/stm32l4/nucleo-l452re/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32l4/nucleo-l476rg/scripts/Make.defs b/boards/arm/stm32l4/nucleo-l476rg/scripts/Make.defs index f181c7b7d9d..91e1033e019 100644 --- a/boards/arm/stm32l4/nucleo-l476rg/scripts/Make.defs +++ b/boards/arm/stm32l4/nucleo-l476rg/scripts/Make.defs @@ -60,13 +60,10 @@ ifeq ($(CONFIG_LIBCXX),y) endif endif -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32l4/nucleo-l476rg/src/nucleo-l476rg.h b/boards/arm/stm32l4/nucleo-l476rg/src/nucleo-l476rg.h index f5702b121f8..b790224cc89 100644 --- a/boards/arm/stm32l4/nucleo-l476rg/src/nucleo-l476rg.h +++ b/boards/arm/stm32l4/nucleo-l476rg/src/nucleo-l476rg.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/nucleo-l476rg/src/nucleo-l476rg.h * - * Copyright (C) 2014, 2016, 2018-2019 Gregory Nutt. All rights reserved. - * Authors: Frank Bennett - * Gregory Nutt - * Sebastien Lorquet + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l476rg/src/stm32_boot.c b/boards/arm/stm32l4/nucleo-l476rg/src/stm32_boot.c index ee8a74ea8eb..75a273e9ebf 100644 --- a/boards/arm/stm32l4/nucleo-l476rg/src/stm32_boot.c +++ b/boards/arm/stm32l4/nucleo-l476rg/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/nucleo-l476rg/src/stm32_boot.c * - * Copyright (C) 2014-2015, 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Librae + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l476rg/src/stm32_cc1101.c b/boards/arm/stm32l4/nucleo-l476rg/src/stm32_cc1101.c index 97a21aecf4f..ff70624b1fd 100644 --- a/boards/arm/stm32l4/nucleo-l476rg/src/stm32_cc1101.c +++ b/boards/arm/stm32l4/nucleo-l476rg/src/stm32_cc1101.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/nucleo-l476rg/src/stm32_cc1101.c * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: lihaichen + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l496zg/README.txt b/boards/arm/stm32l4/nucleo-l496zg/README.txt index e5b7de776df..9991c03ea2a 100644 --- a/boards/arm/stm32l4/nucleo-l496zg/README.txt +++ b/boards/arm/stm32l4/nucleo-l496zg/README.txt @@ -112,50 +112,7 @@ Hardware in effect but will assume the factory default settings. Our main concern is establishing a console and LED utilization for - debugging. Because so many pins can be multiplexed with so many functions, - the above mentioned graphic may be helpful in identifying a serial port. - - There are 4 choices that can be made from the menuconfig: - - CONFIG_NUCLEO_CONSOLE_ARDUINO or CONFIG_NUCLEO_CONSOLE_MORPHO or - CONFIG_NUCLEO_CONSOLE_VIRTUAL or CONFIG_NUCLEO_CONSOLE_NONE - - The CONFIG_NUCLEO_CONSOLE_NONE makes no preset for the console. You should still visit - the U[S]ART selection and Device Drivers to disable any U[S]ART remaining. - - The CONFIG_NUCLEO_CONSOLE_ARDUINO configurations assume that you are using a - standard Arduino RS-232 shield with the serial interface with RX on pin D0 and - TX on pin D1 from USART6: - - -------- --------------- - STM32F7 - ARDUIONO FUNCTION GPIO - -- ----- --------- ----- - DO RX USART6_RX PG9 - D1 TX USART6_TX PG14 - -- ----- --------- ----- - - The CONFIG_NUCLEO_CONSOLE_MORPHO configurations uses Serial Port 8 (USART8) - with TX on PE1 and RX on PE0. - - Serial - ------ - SERIAL_RX PE_0 - SERIAL_TX PE_1 - - The CONFIG_NUCLEO_CONSOLE_VIRTUAL configurations uses Serial Port 3 (USART3) - with TX on PD8 and RX on PD9. - - Serial - ------ - SERIAL_RX PD9 - SERIAL_TX PD8 - - These signals are internally connected to the on board ST-Link - - Of course if your design has used those pins you can choose a completely - different U[S]ART to use as the console. In that Case, you will need to edit - the include/board.h to select different U[S]ART and / or pin selections. + debugging. Buttons ------- @@ -263,8 +220,8 @@ Serial Consoles ---------------- Yet another option is to use LPUART1 and the USB virtual COM port. This option may be more convenient for long term development, but is painful - to use during board bring-up. However as LPUART peripheral has not been - implemented for STM32L4, this cannot currently be used. + to use during board bring-up. However the LPUART peripheral has not yet + been tested for this board. Solder Bridges. This configuration requires: diff --git a/boards/arm/stm32l4/nucleo-l496zg/include/board.h b/boards/arm/stm32l4/nucleo-l496zg/include/board.h index 271c7693f99..8e2d812d728 100644 --- a/boards/arm/stm32l4/nucleo-l496zg/include/board.h +++ b/boards/arm/stm32l4/nucleo-l496zg/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/nucleo-l496zg/include/board.h * - * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Mark Olsson - * David Sidrane + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -567,20 +550,20 @@ /* Alternate function pin selections ****************************************/ -#define GPIO_USART2_TX GPIO_USART2_TX_2 -#define GPIO_USART2_RX GPIO_USART2_RX_2 -#define GPIO_USART3_TX GPIO_USART3_TX_2 -#define GPIO_USART3_RX GPIO_USART3_RX_2 +#define GPIO_USART2_TX GPIO_USART2_TX_2 +#define GPIO_USART2_RX GPIO_USART2_RX_2 +#define GPIO_USART3_TX GPIO_USART3_TX_2 +#define GPIO_USART3_RX GPIO_USART3_RX_2 #if defined(CONFIG_NUCLEO_CONSOLE_ARDUINO) /* USART6: * - * These configurations assume that you are using a standard Arduio RS-232 + * These configurations assume that you are using a standard Arduino RS-232 * shield with the serial interface with RX on pin D0 and TX on pin D1: * * -------- --------------- - * STM32F7 - * ARDUIONO FUNCTION GPIO + * STM32L4 + * ARDUINO FUNCTION GPIO * -- ----- --------- ----- * DO RX USART6_RX PG9 * D1 TX USART6_TX PG14 @@ -595,17 +578,10 @@ * Use USART3 and the USB virtual COM port */ -#if defined(CONFIG_NUCLEO_CONSOLE_VIRTUAL) -/* LPUART1 is connector to Virtual COM port PG6 and PG7, - * but there is no lpserial. - */ +/* LPUART1 is connector to Virtual COM port PG6 and PG7. */ -/* #define GPIO_USART2_TX GPIO_LPUART1_TX_3 */ - -/* #define GPIO_USART2_RX GPIO_LPUART1_RX_3 */ - -# error "No Nucleo virtual console before lpserial is unimplemented" -#endif +#define GPIO_LPUART1_TX GPIO_LPUART1_TX_3 +#define GPIO_LPUART1_RX GPIO_LPUART1_RX_3 /* DMA channels *************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l496zg/scripts/Make.defs b/boards/arm/stm32l4/nucleo-l496zg/scripts/Make.defs index ec5751b7b43..ee7b7a2b447 100644 --- a/boards/arm/stm32l4/nucleo-l496zg/scripts/Make.defs +++ b/boards/arm/stm32l4/nucleo-l496zg/scripts/Make.defs @@ -51,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32l4/nucleo-l496zg/src/nucleo-144.h b/boards/arm/stm32l4/nucleo-l496zg/src/nucleo-144.h index 7c5b11c9ac2..179c0aa7cc6 100644 --- a/boards/arm/stm32l4/nucleo-l496zg/src/nucleo-144.h +++ b/boards/arm/stm32l4/nucleo-l496zg/src/nucleo-144.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/nucleo-l496zg/src/nucleo-144.h * - * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Mark Olsson - * David Sidrane + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l496zg/src/stm32_appinitialize.c b/boards/arm/stm32l4/nucleo-l496zg/src/stm32_appinitialize.c index fcc2cbe83a0..b16c6887273 100644 --- a/boards/arm/stm32l4/nucleo-l496zg/src/stm32_appinitialize.c +++ b/boards/arm/stm32l4/nucleo-l496zg/src/stm32_appinitialize.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/nucleo-l496zg/src/stm32_appinitialize.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Mark Olsson - * David Sidrane + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/nucleo-l496zg/src/stm32_dma_alloc.c b/boards/arm/stm32l4/nucleo-l496zg/src/stm32_dma_alloc.c index 9fe2e05a641..1f726e9a602 100644 --- a/boards/arm/stm32l4/nucleo-l496zg/src/stm32_dma_alloc.c +++ b/boards/arm/stm32l4/nucleo-l496zg/src/stm32_dma_alloc.c @@ -74,7 +74,7 @@ static GRAN_HANDLE dma_allocator; */ static -uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] __attribute__((aligned(64))); +uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] aligned_data(64); /**************************************************************************** * Public Functions diff --git a/boards/arm/stm32l4/nucleo-l496zg/src/stm32_userleds.c b/boards/arm/stm32l4/nucleo-l496zg/src/stm32_userleds.c index a9dde6a2303..ce8cf332e85 100644 --- a/boards/arm/stm32l4/nucleo-l496zg/src/stm32_userleds.c +++ b/boards/arm/stm32l4/nucleo-l496zg/src/stm32_userleds.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/nucleo-l496zg/src/stm32_userleds.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Mark Olsson - * David Sidrane + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476-mdk/scripts/Make.defs b/boards/arm/stm32l4/stm32l476-mdk/scripts/Make.defs index 83d78bd35c1..89939e1dede 100644 --- a/boards/arm/stm32l4/stm32l476-mdk/scripts/Make.defs +++ b/boards/arm/stm32l4/stm32l476-mdk/scripts/Make.defs @@ -1,35 +1,20 @@ ############################################################################ # boards/arm/stm32l4/stm32l476-mdk/scripts/Make.defs # -# Copyright (C) 2016, 2017 Gregory Nutt. All rights reserved. -# Author: dev@ziggurat29.com +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -66,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32l4/stm32l476-mdk/scripts/stm32l476-mdk.ld b/boards/arm/stm32l4/stm32l476-mdk/scripts/stm32l476-mdk.ld index a45994feaac..12150c95e2e 100644 --- a/boards/arm/stm32l4/stm32l476-mdk/scripts/stm32l476-mdk.ld +++ b/boards/arm/stm32l4/stm32l476-mdk/scripts/stm32l476-mdk.ld @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476-mdk/scripts/stm32l476-mdk.ld * - * Copyright (C) 2016, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Sebastien Lorquet - * dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476-mdk/src/Makefile b/boards/arm/stm32l4/stm32l476-mdk/src/Makefile index 87fcfb59412..52907cd5172 100644 --- a/boards/arm/stm32l4/stm32l476-mdk/src/Makefile +++ b/boards/arm/stm32l4/stm32l476-mdk/src/Makefile @@ -1,35 +1,20 @@ ############################################################################ # boards/arm/stm32l4/stm32l476-mdk/src/Makefile # -# Copyright (C) 2014 Gregory Nutt. All rights reserved. -# Author: dev@ziggurat29.com +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/stm32l4/stm32l476-mdk/src/stm32_boot.c b/boards/arm/stm32l4/stm32l476-mdk/src/stm32_boot.c index 243efe06b6e..171680a0348 100644 --- a/boards/arm/stm32l4/stm32l476-mdk/src/stm32_boot.c +++ b/boards/arm/stm32l4/stm32l476-mdk/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476-mdk/src/stm32_boot.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476-mdk/src/stm32_buttons.c b/boards/arm/stm32l4/stm32l476-mdk/src/stm32_buttons.c index ac4a701e139..42b1d77a01d 100644 --- a/boards/arm/stm32l4/stm32l476-mdk/src/stm32_buttons.c +++ b/boards/arm/stm32l4/stm32l476-mdk/src/stm32_buttons.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476-mdk/src/stm32_buttons.c * - * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved. - * Author: dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476-mdk/src/stm32_clockconfig.c b/boards/arm/stm32l4/stm32l476-mdk/src/stm32_clockconfig.c index fb51034c564..3b7a3ebaa78 100644 --- a/boards/arm/stm32l4/stm32l476-mdk/src/stm32_clockconfig.c +++ b/boards/arm/stm32l4/stm32l476-mdk/src/stm32_clockconfig.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476-mdk/src/stm32_clockconfig.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476-mdk/src/stm32l476-mdk.h b/boards/arm/stm32l4/stm32l476-mdk/src/stm32l476-mdk.h index 402792028e8..e0421e543b8 100644 --- a/boards/arm/stm32l4/stm32l476-mdk/src/stm32l476-mdk.h +++ b/boards/arm/stm32l4/stm32l476-mdk/src/stm32l476-mdk.h @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476-mdk/src/stm32l476-mdk.h * - * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. - * Authors: Frank Bennett - * Gregory Nutt - * Sebastien Lorquet - * dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/configs/knsh/Make.defs b/boards/arm/stm32l4/stm32l476vg-disco/configs/knsh/Make.defs index db5e4fa6a1f..1231665204e 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/configs/knsh/Make.defs +++ b/boards/arm/stm32l4/stm32l476vg-disco/configs/knsh/Make.defs @@ -54,17 +54,14 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif -#LDFLAGS += -Wl,-Map=$(TOPDIR)/nuttx.map +#LDFLAGS += -Map=$(TOPDIR)/nuttx.map #CFLAGS += -Wa,-adhln #CXXFLAGS += -Wa,-adhln diff --git a/boards/arm/stm32l4/stm32l476vg-disco/include/board.h b/boards/arm/stm32l4/stm32l476vg-disco/include/board.h index d60092b0519..7dbb9178b7f 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/include/board.h +++ b/boards/arm/stm32l4/stm32l476vg-disco/include/board.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476vg-disco/include/board.h * - * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. - * Author: dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h b/boards/arm/stm32l4/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h index 60e2d6071ee..a048e7c8586 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h +++ b/boards/arm/stm32l4/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476vg-disco/include/stm32l476vg-disco-clocking.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/kernel/Makefile b/boards/arm/stm32l4/stm32l476vg-disco/kernel/Makefile index 9bd0e230766..2623a08194a 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/kernel/Makefile +++ b/boards/arm/stm32l4/stm32l476vg-disco/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32l4/stm32l476vg-disco/kernel/stm32l4_userspace.c b/boards/arm/stm32l4/stm32l476vg-disco/kernel/stm32l4_userspace.c index b38e8c97ddc..75f0ee657af 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/kernel/stm32l4_userspace.c +++ b/boards/arm/stm32l4/stm32l476vg-disco/kernel/stm32l4_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/scripts/Make.defs b/boards/arm/stm32l4/stm32l476vg-disco/scripts/Make.defs index f50da8bdf34..6ce6690aaa0 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/scripts/Make.defs +++ b/boards/arm/stm32l4/stm32l476vg-disco/scripts/Make.defs @@ -1,35 +1,20 @@ ############################################################################ # boards/arm/stm32l4/stm32l476vg-disco/scripts/Make.defs # -# Copyright (C) 2016, 2017 Gregory Nutt. All rights reserved. -# Author: dev@ziggurat29.com +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -66,17 +51,14 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif -LDFLAGS += -Wl,-Map=$(TOPDIR)/nuttx.map +LDFLAGS += -Map=$(TOPDIR)/nuttx.map #CFLAGS += -Wa,-adhln #CXXFLAGS += -Wa,-adhln diff --git a/boards/arm/stm32l4/stm32l476vg-disco/scripts/stm32l476vg-disco.ld b/boards/arm/stm32l4/stm32l476vg-disco/scripts/stm32l476vg-disco.ld index 83d1ab15083..22184543d14 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/scripts/stm32l476vg-disco.ld +++ b/boards/arm/stm32l4/stm32l476vg-disco/scripts/stm32l476vg-disco.ld @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476vg-disco/scripts/stm32l476vg-disco.ld * - * Copyright (C) 2016, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Sebastien Lorquet - * dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/src/Makefile b/boards/arm/stm32l4/stm32l476vg-disco/src/Makefile index be88bbcbea0..0ee7033705c 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/src/Makefile +++ b/boards/arm/stm32l4/stm32l476vg-disco/src/Makefile @@ -1,35 +1,20 @@ ############################################################################ # boards/arm/stm32l4/stm32l476vg-disco/src/Makefile # -# Copyright (C) 2014 Gregory Nutt. All rights reserved. -# Author: dev@ziggurat29.com +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_autoleds.c b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_autoleds.c index 522a8024f0e..3009e380ede 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_autoleds.c +++ b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_autoleds.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476vg-disco/src/stm32_autoleds.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_boot.c b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_boot.c index ec2632aaab0..b8482a2707d 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_boot.c +++ b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476vg-disco/src/stm32_boot.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_buttons.c b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_buttons.c index 73e04944695..ceb06dfb9a4 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_buttons.c +++ b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_buttons.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476vg-disco/src/stm32_buttons.c * - * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved. - * Author: dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_clockconfig.c b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_clockconfig.c index 3020ca875c8..8112aa7a57e 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_clockconfig.c +++ b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32_clockconfig.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476vg-disco/src/stm32_clockconfig.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32l476vg-disco.h b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32l476vg-disco.h index 01b7763c7d9..ec5bf69dff3 100644 --- a/boards/arm/stm32l4/stm32l476vg-disco/src/stm32l476vg-disco.h +++ b/boards/arm/stm32l4/stm32l476vg-disco/src/stm32l476vg-disco.h @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l476vg-disco/src/stm32l476vg-disco.h * - * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. - * Authors: Frank Bennett - * Gregory Nutt - * Sebastien Lorquet - * dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/configs/knsh/Make.defs b/boards/arm/stm32l4/stm32l4r9ai-disco/configs/knsh/Make.defs index 30110850908..557f333f94d 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/configs/knsh/Make.defs +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/configs/knsh/Make.defs @@ -54,17 +54,14 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif -#LDFLAGS += -Wl,-Map=$(TOPDIR)/nuttx.map +#LDFLAGS += -Map=$(TOPDIR)/nuttx.map #CFLAGS += -Wa,-adhln #CXXFLAGS += -Wa,-adhln diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/include/stm32l4r9ai-disco-clocking.h b/boards/arm/stm32l4/stm32l4r9ai-disco/include/stm32l4r9ai-disco-clocking.h index 6168f3d3d33..b28663dd673 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/include/stm32l4r9ai-disco-clocking.h +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/include/stm32l4r9ai-disco-clocking.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l4r9ai-disco/include/stm32l4r9ai-disco-clocking.h * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Juha Niskanen + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/kernel/Makefile b/boards/arm/stm32l4/stm32l4r9ai-disco/kernel/Makefile index 53828d0792c..78bf862f4e6 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/kernel/Makefile +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) -Wl,--end-group $(USER_LIBGCC) + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC) $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/kernel/stm32l4_userspace.c b/boards/arm/stm32l4/stm32l4r9ai-disco/kernel/stm32l4_userspace.c index 5ef281ecacb..bc535725644 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/kernel/stm32l4_userspace.c +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/kernel/stm32l4_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/scripts/Make.defs b/boards/arm/stm32l4/stm32l4r9ai-disco/scripts/Make.defs index 3f4bf432cec..0212d452b7d 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/scripts/Make.defs +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/scripts/Make.defs @@ -1,35 +1,20 @@ ############################################################################ # boards/arm/stm32l4/stm32l4r9ai-disco/scripts/Make.defs # -# Copyright (C) 2016, 2017 Gregory Nutt. All rights reserved. -# Author: dev@ziggurat29.com +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -66,17 +51,14 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif -LDFLAGS += -Wl,-Map=$(TOPDIR)/nuttx.map +LDFLAGS += -Map=$(TOPDIR)/nuttx.map #CFLAGS += -Wa,-adhln #CXXFLAGS += -Wa,-adhln diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/scripts/stm32l4r9ai-disco.ld b/boards/arm/stm32l4/stm32l4r9ai-disco/scripts/stm32l4r9ai-disco.ld index 1192811fbfd..3b47716d214 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/scripts/stm32l4r9ai-disco.ld +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/scripts/stm32l4r9ai-disco.ld @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l4r9ai-disco/scripts/stm32l4r9ai-disco.ld * - * Copyright (C) 2016, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Sebastien Lorquet - * Juha Niskanen + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/src/Makefile b/boards/arm/stm32l4/stm32l4r9ai-disco/src/Makefile index cc03a827933..ea6187b9028 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/src/Makefile +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/src/Makefile @@ -1,35 +1,20 @@ ############################################################################ # boards/arm/stm32l4/stm32l4r9ai-disco/src/Makefile # -# Copyright (C) 2014 Gregory Nutt. All rights reserved. -# Author: dev@ziggurat29.com +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32_boot.c b/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32_boot.c index 0c82a9ecfd6..10a3c15c64c 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32_boot.c +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32_boot.c * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Juha Niskanen + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32l4r9ai-disco.h b/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32l4r9ai-disco.h index a91f49e0ed1..0cb2fd640b6 100644 --- a/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32l4r9ai-disco.h +++ b/boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32l4r9ai-disco.h @@ -1,38 +1,20 @@ /**************************************************************************** * boards/arm/stm32l4/stm32l4r9ai-disco/src/stm32l4r9ai-disco.h * - * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. - * Authors: Frank Bennett - * Gregory Nutt - * Sebastien Lorquet - * dev@ziggurat29.com + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/stm32l5/nucleo-l552ze/scripts/Make.defs b/boards/arm/stm32l5/nucleo-l552ze/scripts/Make.defs index e157cdcf325..d69c94cb67a 100644 --- a/boards/arm/stm32l5/nucleo-l552ze/scripts/Make.defs +++ b/boards/arm/stm32l5/nucleo-l552ze/scripts/Make.defs @@ -54,16 +54,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) -ifneq ($(CROSSDEV),arm-nuttx-eabi-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif -endif - ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32l5/nucleo-l552ze/src/stm32_boot.c b/boards/arm/stm32l5/nucleo-l552ze/src/stm32_boot.c index a090e110675..f62e6b6f8ac 100644 --- a/boards/arm/stm32l5/nucleo-l552ze/src/stm32_boot.c +++ b/boards/arm/stm32l5/nucleo-l552ze/src/stm32_boot.c @@ -42,7 +42,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/stm32l5/stm32l562e-dk/scripts/Make.defs b/boards/arm/stm32l5/stm32l562e-dk/scripts/Make.defs index 4adf73c6aa8..4d92a7f5c6e 100644 --- a/boards/arm/stm32l5/stm32l562e-dk/scripts/Make.defs +++ b/boards/arm/stm32l5/stm32l562e-dk/scripts/Make.defs @@ -54,16 +54,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) -ifneq ($(CROSSDEV),arm-nuttx-eabi-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif -endif - ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/stm32l5/stm32l562e-dk/src/stm32_boot.c b/boards/arm/stm32l5/stm32l562e-dk/src/stm32_boot.c index 3d7ccb2096e..0a343e1aafd 100644 --- a/boards/arm/stm32l5/stm32l562e-dk/src/stm32_boot.c +++ b/boards/arm/stm32l5/stm32l562e-dk/src/stm32_boot.c @@ -43,7 +43,7 @@ * * Description: * All STM32 architectures must provide the following entry point. This - * entry point is called early in the intitialization -- after all memory + * entry point is called early in the initialization -- after all memory * has been configured and mapped but before any devices have been * initialized. * diff --git a/boards/arm/str71x/olimex-strp711/scripts/Make.defs b/boards/arm/str71x/olimex-strp711/scripts/Make.defs index d4eb365dcea..d6127f97baa 100644 --- a/boards/arm/str71x/olimex-strp711/scripts/Make.defs +++ b/boards/arm/str71x/olimex-strp711/scripts/Make.defs @@ -74,15 +74,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common +NXFLATLDFLAGS1 = -r -d -warn-common NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) \ -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld \ - -Wl,-no-check-sections + -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_FEATURES),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/dk-tm4c129x/scripts/Make.defs b/boards/arm/tiva/dk-tm4c129x/scripts/Make.defs index f837ea27f3d..efb2e03c615 100644 --- a/boards/arm/tiva/dk-tm4c129x/scripts/Make.defs +++ b/boards/arm/tiva/dk-tm4c129x/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/eagle100/scripts/Make.defs b/boards/arm/tiva/eagle100/scripts/Make.defs index 893c5e51fdb..9a11a892363 100644 --- a/boards/arm/tiva/eagle100/scripts/Make.defs +++ b/boards/arm/tiva/eagle100/scripts/Make.defs @@ -52,13 +52,10 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ MKNXFLAT = mknxflat LDNXFLAT = ldnxflat -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT),y) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/ekk-lm3s9b96/configs/nsh/defconfig b/boards/arm/tiva/ekk-lm3s9b96/configs/nsh/defconfig index f8372afd2f5..224b6cb036f 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/configs/nsh/defconfig +++ b/boards/arm/tiva/ekk-lm3s9b96/configs/nsh/defconfig @@ -7,6 +7,7 @@ # # CONFIG_NSH_DISABLE_IFCONFIG is not set # CONFIG_NSH_DISABLE_PS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="arm" CONFIG_ARCH_BOARD="ekk-lm3s9b96" CONFIG_ARCH_BOARD_EKKLM3S9B96=y diff --git a/boards/arm/tiva/ekk-lm3s9b96/include/board.h b/boards/arm/tiva/ekk-lm3s9b96/include/board.h index 70ffeb1b006..4899d740b2e 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/include/board.h +++ b/boards/arm/tiva/ekk-lm3s9b96/include/board.h @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/tiva/ekk-lm3s9b96/include/board.h - * include/arch/board/board.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Jose Pablo Rojas V. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/ekk-lm3s9b96/scripts/Make.defs b/boards/arm/tiva/ekk-lm3s9b96/scripts/Make.defs index d060cf72296..7093a99bd36 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/scripts/Make.defs +++ b/boards/arm/tiva/ekk-lm3s9b96/scripts/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/tiva/ekk-lm3s9b96/scripts/Make.defs # -# Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved. -# Authors: Gregory Nutt -# Jose Pablo Rojas V. +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -65,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/ekk-lm3s9b96/scripts/ekk-lm3s9b96.ld b/boards/arm/tiva/ekk-lm3s9b96/scripts/ekk-lm3s9b96.ld index 8253b013b6c..353aab94f24 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/scripts/ekk-lm3s9b96.ld +++ b/boards/arm/tiva/ekk-lm3s9b96/scripts/ekk-lm3s9b96.ld @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/tiva/ekk-lm3s9b96/scripts/ekk-lm3s9b96.ld * - * Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Jose Pablo Rojas V. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/ekk-lm3s9b96/src/Makefile b/boards/arm/tiva/ekk-lm3s9b96/src/Makefile index 8140a55ddbf..121fda0cbfc 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/src/Makefile +++ b/boards/arm/tiva/ekk-lm3s9b96/src/Makefile @@ -1,36 +1,20 @@ ############################################################################ # boards/arm/tiva/ekk-lm3s9b96/src/Makefile # -# Copyright (C) 2012 Gregory Nutt. All rights reserved. -# Authors: Gregory Nutt -# Jose Pablo Rojas V. +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/arm/tiva/ekk-lm3s9b96/src/ekk-lm3s9b96.h b/boards/arm/tiva/ekk-lm3s9b96/src/ekk-lm3s9b96.h index 04a60870ee8..84be8e3431c 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/src/ekk-lm3s9b96.h +++ b/boards/arm/tiva/ekk-lm3s9b96/src/ekk-lm3s9b96.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/tiva/ekk-lm3s9b96/src/ekk-lm3s9b96.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Jose Pablo Rojas V. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/ekk-lm3s9b96/src/lm_appinit.c b/boards/arm/tiva/ekk-lm3s9b96/src/lm_appinit.c index 9e4f3a1c0bd..4a7ce10c0e1 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/src/lm_appinit.c +++ b/boards/arm/tiva/ekk-lm3s9b96/src/lm_appinit.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/tiva/ekk-lm3s9b96/src/lm_appinit.c * - * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Jose Pablo Rojas V. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/ekk-lm3s9b96/src/lm_boot.c b/boards/arm/tiva/ekk-lm3s9b96/src/lm_boot.c index a80821871ba..9383bc851df 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/src/lm_boot.c +++ b/boards/arm/tiva/ekk-lm3s9b96/src/lm_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/tiva/ekk-lm3s9b96/src/lm_boot.c * - * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Jose Pablo Rojas V. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/ekk-lm3s9b96/src/lm_ethernet.c b/boards/arm/tiva/ekk-lm3s9b96/src/lm_ethernet.c index 82eeca92ce5..c7008bb6a89 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/src/lm_ethernet.c +++ b/boards/arm/tiva/ekk-lm3s9b96/src/lm_ethernet.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/tiva/ekk-lm3s9b96/src/lm_ethernet.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Jose Pablo Rojas V. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/ekk-lm3s9b96/src/lm_leds.c b/boards/arm/tiva/ekk-lm3s9b96/src/lm_leds.c index 0a7c3b24ab8..4a14781c2ba 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/src/lm_leds.c +++ b/boards/arm/tiva/ekk-lm3s9b96/src/lm_leds.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/tiva/ekk-lm3s9b96/src/lm_leds.c * - * Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Jose Pablo Rojas V. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/ekk-lm3s9b96/src/lm_ssi.c b/boards/arm/tiva/ekk-lm3s9b96/src/lm_ssi.c index 6e9a7aa1595..67a2ee199b2 100644 --- a/boards/arm/tiva/ekk-lm3s9b96/src/lm_ssi.c +++ b/boards/arm/tiva/ekk-lm3s9b96/src/lm_ssi.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/tiva/ekk-lm3s9b96/src/lm_ssi.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Jose Pablo Rojas V. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/launchxl-cc1310/scripts/Make.defs b/boards/arm/tiva/launchxl-cc1310/scripts/Make.defs index 89f590bb3ed..d50b6915912 100644 --- a/boards/arm/tiva/launchxl-cc1310/scripts/Make.defs +++ b/boards/arm/tiva/launchxl-cc1310/scripts/Make.defs @@ -51,8 +51,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -66,9 +66,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/launchxl-cc1312r1/scripts/Make.defs b/boards/arm/tiva/launchxl-cc1312r1/scripts/Make.defs index 6fef940f9b6..90ffccac4c1 100644 --- a/boards/arm/tiva/launchxl-cc1312r1/scripts/Make.defs +++ b/boards/arm/tiva/launchxl-cc1312r1/scripts/Make.defs @@ -55,8 +55,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -70,9 +70,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/lm3s6432-s2e/scripts/Make.defs b/boards/arm/tiva/lm3s6432-s2e/scripts/Make.defs index 0b32bbe683d..e58d3ec80f3 100644 --- a/boards/arm/tiva/lm3s6432-s2e/scripts/Make.defs +++ b/boards/arm/tiva/lm3s6432-s2e/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/lm3s6965-ek/configs/qemu-flat/defconfig b/boards/arm/tiva/lm3s6965-ek/configs/qemu-flat/defconfig index b310b74e1d2..ac37c0cf336 100644 --- a/boards/arm/tiva/lm3s6965-ek/configs/qemu-flat/defconfig +++ b/boards/arm/tiva/lm3s6965-ek/configs/qemu-flat/defconfig @@ -83,6 +83,7 @@ CONFIG_SDCLONE_DISABLE=y CONFIG_SIG_DEFAULT=y CONFIG_SIG_PIPE=11 CONFIG_SPI=y +CONFIG_STACK_COLORATION=y CONFIG_START_DAY=8 CONFIG_START_MONTH=5 CONFIG_START_YEAR=2010 @@ -92,7 +93,8 @@ CONFIG_SYSTEM_NETDB=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_NTPC=y CONFIG_SYSTEM_PING=y -CONFIG_TASK_NAME_SIZE=0 +CONFIG_TASK_NAME_SIZE=24 +CONFIG_TESTING_OSTEST=y CONFIG_TIVA_ETHERNET=y CONFIG_TIVA_GPIOA_IRQS=y CONFIG_TIVA_GPIOB_IRQS=y diff --git a/boards/arm/tiva/lm3s6965-ek/configs/qemu-protected/defconfig b/boards/arm/tiva/lm3s6965-ek/configs/qemu-protected/defconfig index c78638d7324..b04ee6e94d4 100644 --- a/boards/arm/tiva/lm3s6965-ek/configs/qemu-protected/defconfig +++ b/boards/arm/tiva/lm3s6965-ek/configs/qemu-protected/defconfig @@ -88,6 +88,7 @@ CONFIG_SDCLONE_DISABLE=y CONFIG_SIG_DEFAULT=y CONFIG_SIG_PIPE=11 CONFIG_SPI=y +CONFIG_STACK_COLORATION=y CONFIG_START_DAY=8 CONFIG_START_MONTH=5 CONFIG_START_YEAR=2010 @@ -98,7 +99,8 @@ CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_NTPC=y CONFIG_SYSTEM_PING=y CONFIG_SYS_RESERVED=9 -CONFIG_TASK_NAME_SIZE=0 +CONFIG_TASK_NAME_SIZE=24 +CONFIG_TESTING_OSTEST=y CONFIG_TIVA_ETHERNET=y CONFIG_TIVA_GPIOA_IRQS=y CONFIG_TIVA_GPIOB_IRQS=y diff --git a/boards/arm/tiva/lm3s6965-ek/kernel/Makefile b/boards/arm/tiva/lm3s6965-ek/kernel/Makefile index 9dd99a131c9..bd4707beab3 100644 --- a/boards/arm/tiva/lm3s6965-ek/kernel/Makefile +++ b/boards/arm/tiva/lm3s6965-ek/kernel/Makefile @@ -46,7 +46,7 @@ else USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin" endif -USER_LDFLAGS = -Wl,--undefined=$(ENTRYPT) -Wl,--entry=$(ENTRYPT) $(USER_LDSCRIPT) -nostartfiles -nodefaultlibs +USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT) USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS)))) USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" @@ -67,7 +67,7 @@ $(COBJS): %$(OBJEXT): %.c # Create the nuttx_user.elf file containing all of the user-mode code nuttx_user.elf: $(OBJS) - $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) -Wl,--start-group $(USER_LDLIBS) $(USER_LIBGCC) -Wl,--end-group + $(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) $(USER_LIBGCC) --end-group $(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf @echo "LD: nuttx_user.elf" diff --git a/boards/arm/tiva/lm3s6965-ek/kernel/lm_userspace.c b/boards/arm/tiva/lm3s6965-ek/kernel/lm_userspace.c index f3cb6f077c0..f51b6d2b7ab 100644 --- a/boards/arm/tiva/lm3s6965-ek/kernel/lm_userspace.c +++ b/boards/arm/tiva/lm3s6965-ek/kernel/lm_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/arm/tiva/lm3s6965-ek/scripts/Make.defs b/boards/arm/tiva/lm3s6965-ek/scripts/Make.defs index 6476976672a..2b8e5d90a22 100644 --- a/boards/arm/tiva/lm3s6965-ek/scripts/Make.defs +++ b/boards/arm/tiva/lm3s6965-ek/scripts/Make.defs @@ -60,8 +60,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -87,9 +87,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/lm3s8962-ek/scripts/Make.defs b/boards/arm/tiva/lm3s8962-ek/scripts/Make.defs index d9dd80fac86..96a17e82928 100644 --- a/boards/arm/tiva/lm3s8962-ek/scripts/Make.defs +++ b/boards/arm/tiva/lm3s8962-ek/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/lm4f120-launchpad/scripts/Make.defs b/boards/arm/tiva/lm4f120-launchpad/scripts/Make.defs index e505e25a269..c1c6775ee1c 100644 --- a/boards/arm/tiva/lm4f120-launchpad/scripts/Make.defs +++ b/boards/arm/tiva/lm4f120-launchpad/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/tm4c123g-launchpad/scripts/Make.defs b/boards/arm/tiva/tm4c123g-launchpad/scripts/Make.defs index 48f8b9fb232..fe04337bb99 100644 --- a/boards/arm/tiva/tm4c123g-launchpad/scripts/Make.defs +++ b/boards/arm/tiva/tm4c123g-launchpad/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_buttons.c b/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_buttons.c index 5773b3b718e..25999736843 100644 --- a/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_buttons.c +++ b/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_buttons.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/arm/tiva/tm4c123g-launchpad/src/tm4c_buttons.c * - * Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved. - * Author: Bradley Noyes + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_mcp2515.c b/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_mcp2515.c index 4737b8f2726..7b8e05dac25 100644 --- a/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_mcp2515.c +++ b/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_mcp2515.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/arm/tiva/tm4c123g-launchpad/src/tm4c_mcp2515.c * - * Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved. - * Author: Alan Carvalho de Assis - * Modified: Ben + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_timer.c b/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_timer.c index 161cc19be69..bd759d1eab8 100644 --- a/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_timer.c +++ b/boards/arm/tiva/tm4c123g-launchpad/src/tm4c_timer.c @@ -1,37 +1,20 @@ /**************************************************************************** * boards/arm/tiva/tm4c123g-launchpad/src/tm4c_timer.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * With modifications from Calvin Maguranis + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/arm/tiva/tm4c1294-launchpad/scripts/Make.defs b/boards/arm/tiva/tm4c1294-launchpad/scripts/Make.defs index 7cce314351c..0d3aca43fd3 100644 --- a/boards/arm/tiva/tm4c1294-launchpad/scripts/Make.defs +++ b/boards/arm/tiva/tm4c1294-launchpad/scripts/Make.defs @@ -49,13 +49,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tms570/launchxl-tms57004/scripts/Make.defs b/boards/arm/tms570/launchxl-tms57004/scripts/Make.defs index cf4a015d46c..29b2f80fc11 100644 --- a/boards/arm/tms570/launchxl-tms57004/scripts/Make.defs +++ b/boards/arm/tms570/launchxl-tms57004/scripts/Make.defs @@ -54,8 +54,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -70,12 +70,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) -ifneq ($(CROSSDEV),armeb-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif -endif - ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/tms570/tms570ls31x-usb-kit/scripts/Make.defs b/boards/arm/tms570/tms570ls31x-usb-kit/scripts/Make.defs index 81ede1c4ae5..9c67146cd5f 100644 --- a/boards/arm/tms570/tms570ls31x-usb-kit/scripts/Make.defs +++ b/boards/arm/tms570/tms570ls31x-usb-kit/scripts/Make.defs @@ -54,8 +54,8 @@ AFLAGS := $(CFLAGS) -D__ASSEMBLY__ # NXFLAT module definitions -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # ELF module definitions @@ -70,12 +70,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) -ifneq ($(CROSSDEV),armeb-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif -endif - ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/xmc4/xmc4500-relax/scripts/Make.defs b/boards/arm/xmc4/xmc4500-relax/scripts/Make.defs index db2fe44b3ee..e23a82e9d78 100644 --- a/boards/arm/xmc4/xmc4500-relax/scripts/Make.defs +++ b/boards/arm/xmc4/xmc4500-relax/scripts/Make.defs @@ -51,8 +51,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -66,9 +66,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/xmc4/xmc4700-relax/scripts/Make.defs b/boards/arm/xmc4/xmc4700-relax/scripts/Make.defs index 236ce39e4b9..864d8ae306e 100644 --- a/boards/arm/xmc4/xmc4700-relax/scripts/Make.defs +++ b/boards/arm/xmc4/xmc4700-relax/scripts/Make.defs @@ -51,8 +51,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 # Loadable module definitions @@ -66,9 +66,6 @@ else LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/avr/at32uc3/avr32dev1/scripts/Make.defs b/boards/avr/at32uc3/avr32dev1/scripts/Make.defs index 20103ff5334..64e5e2be40e 100644 --- a/boards/avr/at32uc3/avr32dev1/scripts/Make.defs +++ b/boards/avr/at32uc3/avr32dev1/scripts/Make.defs @@ -52,7 +52,6 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(ARCHALLCXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(ARCHALLCFLAGS) -D__ASSEMBLY__ -LDFLAGS += -nostartfiles -nodefaultlibs ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/avr/at90usb/micropendous3/scripts/Make.defs b/boards/avr/at90usb/micropendous3/scripts/Make.defs index 5a36b8a272d..06bf0f83284 100644 --- a/boards/avr/at90usb/micropendous3/scripts/Make.defs +++ b/boards/avr/at90usb/micropendous3/scripts/Make.defs @@ -47,6 +47,6 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/avr/at90usb/teensy-2.0/scripts/Make.defs b/boards/avr/at90usb/teensy-2.0/scripts/Make.defs index eb0c6edc721..7effe7e80fd 100644 --- a/boards/avr/at90usb/teensy-2.0/scripts/Make.defs +++ b/boards/avr/at90usb/teensy-2.0/scripts/Make.defs @@ -49,6 +49,6 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/avr/atmega/amber/scripts/Make.defs b/boards/avr/atmega/amber/scripts/Make.defs index 7b18f826936..aaf6a7b5ea9 100644 --- a/boards/avr/atmega/amber/scripts/Make.defs +++ b/boards/avr/atmega/amber/scripts/Make.defs @@ -47,6 +47,6 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/avr/atmega/arduino-mega2560/scripts/Make.defs b/boards/avr/atmega/arduino-mega2560/scripts/Make.defs index be673e2f376..522a033267a 100644 --- a/boards/avr/atmega/arduino-mega2560/scripts/Make.defs +++ b/boards/avr/atmega/arduino-mega2560/scripts/Make.defs @@ -49,8 +49,8 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 EXEEXT = .elf diff --git a/boards/avr/atmega/moteino-mega/scripts/Make.defs b/boards/avr/atmega/moteino-mega/scripts/Make.defs index e8581469926..4fc13f4f40e 100644 --- a/boards/avr/atmega/moteino-mega/scripts/Make.defs +++ b/boards/avr/atmega/moteino-mega/scripts/Make.defs @@ -47,6 +47,6 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/boardctl.c b/boards/boardctl.c index 5151f2927bf..78d96e82941 100644 --- a/boards/boardctl.c +++ b/boards/boardctl.c @@ -452,6 +452,31 @@ int boardctl(unsigned int cmd, uintptr_t arg) break; #endif +#ifdef CONFIG_BOARDCTL_BOOT_IMAGE + /* CMD: BOARDIOC_BOOT_IMAGE + * DESCRIPTION: Boot a new application firmware image. + * Execute the required actions for booting a new + * application firmware image (e.g. deinitialize + * peripherals, load the Program Counter register with + * the application firmware image entry point address). + * ARG: Pointer to a read-only instance of struct + * boardioc_boot_info_s. + * DEPENDENCIES: Board logic must provide the board_boot_image() + * interface. + */ + + case BOARDIOC_BOOT_IMAGE: + { + FAR const struct boardioc_boot_info_s *info = + (FAR const struct boardioc_boot_info_s *)arg; + + DEBUGASSERT(info != NULL); + + ret = board_boot_image(info->path, info->header_size); + } + break; +#endif + #ifdef CONFIG_BOARDCTL_MKRD /* CMD: BOARDIOC_MKRD * DESCRIPTION: Create a RAM disk diff --git a/boards/hc/m9s12/demo9s12ne64/scripts/Make.defs b/boards/hc/m9s12/demo9s12ne64/scripts/Make.defs index 30991396e54..3ed829b006d 100644 --- a/boards/hc/m9s12/demo9s12ne64/scripts/Make.defs +++ b/boards/hc/m9s12/demo9s12ne64/scripts/Make.defs @@ -67,11 +67,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 - LDFLAGS += -nostartfiles -nodefaultlibs ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/hc/m9s12/ne64badge/scripts/Make.defs b/boards/hc/m9s12/ne64badge/scripts/Make.defs index 368e6f505a5..3830d0a596b 100644 --- a/boards/hc/m9s12/ne64badge/scripts/Make.defs +++ b/boards/hc/m9s12/ne64badge/scripts/Make.defs @@ -67,11 +67,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 - LDFLAGS += -nostartfiles -nodefaultlibs ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/Kconfig b/boards/mips/pic32mz/chipkit-wifire/Kconfig similarity index 65% rename from boards/arm/s32k1xx/rddrone-uavcan146/Kconfig rename to boards/mips/pic32mz/chipkit-wifire/Kconfig index 77a4ee5f7db..533f72a6d1c 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/Kconfig +++ b/boards/mips/pic32mz/chipkit-wifire/Kconfig @@ -3,6 +3,5 @@ # see the file kconfig-language.txt in the NuttX tools repository. # -if ARCH_BOARD_RDDRONE_UAVCAN146 - -endif # ARCH_BOARD_RDDRONE_UAVCAN146 +if ARCH_BOARD_CHIPKIT_WIFIRE +endif # ARCH_BOARD_CHIPKIT_WIFIRE diff --git a/boards/mips/pic32mz/chipkit-wifire/README.txt b/boards/mips/pic32mz/chipkit-wifire/README.txt new file mode 100644 index 00000000000..9044b532618 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/README.txt @@ -0,0 +1,75 @@ +README +====== + + chipKIT Wi-FIRE board + (https://chipkit.net/wiki/index.php?title=ChipKIT_Wi-Fire) features + the Microchip PIC32MZ2048EFG100 MCU, Microchip MRF24WG0MA Wi-Fi module, + USB 2.0 Full-Speed / Hi-Speed OTG controller, Micro SD card connector etc. + The PIC32MZ2048EFG100 is a 200 MHz 32-bit MIPS M5150 operation with 2MB Flash + memory and 512KB RAM. + +Contents +======== + + - Toolchain + - Building NuttX for the chipKIT Wi-FIRE board + - Programming Flash + - Serial console + +Toolchain +========= + + The following Toolchain options have been tested and confirmed to work: + + CONFIG_MIPS32_TOOLCHAIN_PINGUINOL - Pinquino Toolchain + for Linux + CONFIG_MIPS32_TOOLCHAIN_SOURCERY_CODEBENCH_LITE - Sourcery CodeBench Lite + Toolchain for Linux + + Pinquino Toolchain can be downloaded here: + + https://github.com/PinguinoIDE/pinguino-compilers + + Sourcery CodeBench Lite Toolchain for Linux can be downloaded and + installed as follows: + + $ wget https://sourcery.mentor.com/GNUToolchain/package12725/public/mips-sde-elf/mips-2014.05-24-mips-sde-elf-i686-pc-linux-gnu.tar.bz2 + $ sudo tar xvjf mips-2014.05-24-mips-sde-elf-i686-pc-linux-gnu.tar.bz2 \ + -C /usr/local + +Building NuttX for the chipKIT Wi-FIRE board +============================================ + + $ cd nuttx + $ make apps_distclean + $ make distclean + $ ./tools/configure.sh -l chipkit-wifire:nsh + $ make + +Programming Flash +================= + + CAUTION: + + Currently the pre-installed bootloader of the chipKIT Wi-FIRE board + is not supported in this NuttX configuration. Doing the following + steps will erase the factory installed bootloader in the Flash + memory! If you are going to recover the bootloader later on your + chipKIT Wi-FIRE board, the original chipKIT bootloader can be found here: + https://reference.digilentinc.com/_media/chipkit_wifire/chipkit-wifire-v01000303.zip + + Flash memory can be programmed by pic32prog utility + (https://github.com/sergev/pic32prog.git) and PICkit 2 programmer + (via 6-pin ICSP (JP1) of chipKIT Wi-FIRE board) as follows: + + $ sudo pic32prog nuttx.hex + +Serial console +============== + + Connect USB cable from your PC to connector J1 (labeled "UART") of + the chipKIT Wi-FIRE board. + Then use some serial console client (minicom, picocom, teraterm, etc) + configured to 115200 8n1 without software or hardware flow control. + + Reset the board and you should see NuttX starting in the serial. diff --git a/boards/mips/pic32mz/chipkit-wifire/configs/nsh/defconfig b/boards/mips/pic32mz/chipkit-wifire/configs/nsh/defconfig new file mode 100644 index 00000000000..133effc5b72 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/configs/nsh/defconfig @@ -0,0 +1,49 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_RAMFUNCS is not set +CONFIG_ARCH="mips" +CONFIG_ARCH_BOARD="chipkit-wifire" +CONFIG_ARCH_BOARD_CHIPKIT_WIFIRE=y +CONFIG_ARCH_CHIP="pic32mz" +CONFIG_ARCH_CHIP_PIC32MZ2048EFG=y +CONFIG_ARCH_CHIP_PIC32MZ=y +CONFIG_ARCH_CHIP_PIC32MZEF=y +CONFIG_ARCH_MIPS=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=7245 +CONFIG_BUILTIN=y +CONFIG_FAT_LCNAMES=y +CONFIG_FAT_LFN=y +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_HOST_WINDOWS=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INTELHEX_BINARY=y +CONFIG_MIPS_MICROMIPS=y +CONFIG_MMCSD=y +CONFIG_MTD=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PIC32MZ_ICESEL_CH2=y +CONFIG_PIC32MZ_UART4=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=131072 +CONFIG_RAM_START=0xa0000000 +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=7 +CONFIG_START_MONTH=3 +CONFIG_START_YEAR=2012 +CONFIG_SYSTEM_NSH=y +CONFIG_UART4_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/mips/pic32mz/chipkit-wifire/include/board.h b/boards/mips/pic32mz/chipkit-wifire/include/board.h new file mode 100644 index 00000000000..e8781f1b333 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/include/board.h @@ -0,0 +1,321 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/include/board.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_MIPS_PIC32MZ_CHIPKIT_WIFIRE_INCLUDE_BOARD_H +#define __BOARDS_MIPS_PIC32MZ_CHIPKIT_WIFIRE_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* Crystal frequencies + * + * - A 24 MHz oscillator circuit (IC7) is connected to the on-board + * microcontroller. This oscillator circuit functions as the controller’s + * primary oscillator. + * - The starter kit also has provisions for an external secondary 32 kHz + * oscillator (X2); however, this is not populated. + */ + +#define BOARD_POSC_FREQ 24000000 /* Primary OSC XTAL frequency (IC7, 24MHz) */ +#define BOARD_SOSC_FREQ 32000 /* Secondary OSC XTAL frequency (X2, 32KHz) */ + +/* Oscillator modes. + * + * - BOARD_POSC_ECMODE: An external oscillator is connected to OSC1/OSC2 + * - BOARD_POSC_HSMODE: An external crystal or resonator is connected to + * OSC1/OSC2 + */ + +#define BOARD_FNOSC_SPLL 1 /* Use system PLL */ +#define BOARD_POSC_ECMODE 1 /* External clock (EC) mode */ +#define BOARD_POSC_SWITCH 1 /* Enable clock switching */ +#undef BOARD_POSC_FSCM /* Disable clock monitoring */ + +/* PLL configuration and resulting CPU clock. + * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV + */ + +#define BOARD_PLL_INPUT BOARD_POSC_FREQ +#define BOARD_PLL_IDIV 3 /* PLL input divider */ +#define BOARD_PLL_MULT 50 /* PLL multiplier */ +#define BOARD_PLL_ODIV 2 /* PLL output divider */ + +#define BOARD_CPU_CLOCK 200000000 /* CPU clock: 200MHz = (24MHz / 3) * 50 / 2) */ + +/* Peripheral clocks */ + +/* PBCLK1 + * Peripherals: OSC2 pin + * + * NOTES: + * - PBCLK1 is used by system modules and cannot be turned off + * - PBCLK1 divided by 2 is available on the OSC2 pin in certain clock + * modes. + */ + +#define BOARD_PB1DIV 5 /* Divider = 5 */ +#define BOARD_PBCLK1 40000000 /* PBCLK1 frequency = 200MHz/5 = 40MHz */ + +/* PBCLK2 + * Peripherals: PMP, I2C, UART, SPI + */ + +#define BOARD_PBCLK2_ENABLE 1 /* Enable PBCLK2 */ +#define BOARD_PB2DIV 2 /* Divider = 2 */ +#define BOARD_PBCLK2 100000000 /* PBCLK2 frequency = 200MHz/2 = 100MHz */ + +/* PBCLK3 + * Peripherals: ADC, Comparator, Timers, Output Compare, Input Compare + * + * NOTES: + * - Timer 1 uses SOSC + */ + +#define BOARD_PBCLK3_ENABLE 1 /* Enable PBCLK3 */ +#define BOARD_PB3DIV 4 /* Divider = 4 */ +#define BOARD_PBCLK3 50000000 /* PBCLK3 frequency = 200MHz/4 = 50MHz */ + +/* PBCLK4 + * Peripherals: Ports + */ + +#define BOARD_PBCLK4_ENABLE 1 /* Enable PBCLK4 */ +#define BOARD_PB4DIV 2 /* Divider = 2 */ +#define BOARD_PBCLK4 100000000 /* PBCLK4 frequency = 200MHz/2 = 100MHz */ + +/* PBCLK5 + * Peripherals: Flash, Crypto, RND, USB, Ethernet, SQI + * + * NOTES: + * - PBCLK5 is used to fetch data from/to the Flash Controller, while the + * FRC clock is used for programming + */ + +#define BOARD_PBCLK5_ENABLE 1 /* Enable PBCLK5 */ +#define BOARD_PB5DIV 2 /* Divider = 2 */ +#define BOARD_PBCLK5 100000000 /* PBCLK5 frequency = 200MHz/2 = 100MHz */ + +/* PBCLK6 + * Peripherals: + */ + +#undef BOARD_PBCLK6_ENABLE + +/* PBCLK7 + * Peripherals: CPU, Deadman timer + */ + +#undef BOARD_PBCLK7_ENABLE + +/* PBCLK8 + * Peripherals: EBI + */ + +#undef BOARD_PBCLK8_ENABLE + +/* Watchdog pre-scaler (re-visit) */ + +#define BOARD_WD_PRESCALER 1048576 /* Watchdog pre-scaler */ + +/* Ethernet MII clocking. + * + * The clock divider used to create the MII Management Clock (MDC). The MIIM + * module uses the PBCLK5 as an input clock. According to the IEEE 802.3 + * Specification this should be no faster than 2.5 MHz. However, some PHYs + * support clock rates up to 12.5 MHz. + */ + +#define BOARD_EMAC_MIIM_DIV 40 /* Ideal: 100MHz/40 = 2.5MHz */ + +/* LED definitions **********************************************************/ + +/* There are four LEDs on the top side of the board: + * controlled by software: + * + * LED LD1 - RG6 + * LED LD2 - RD4 + * LED LD3 - RB11 + * LED LD4 - RG15 + * + * A high output value illuminates the LEDs. + */ + +/* LED index values for use with board_userled(): */ + +# define BOARD_LED_LD1 0 +# define BOARD_LED_LD2 1 +# define BOARD_LED_LD3 2 +# define BOARD_LED_LD4 3 +# define BOARD_NLEDS 4 + +/* LED bits for use with board_userled_all() */ + +# define BOARD_LED_LD1_BIT (1 << BOARD_LED_LD1) +# define BOARD_LED_LD2_BIT (1 << BOARD_LED_LD2) +# define BOARD_LED_LD3_BIT (1 << BOARD_LED_LD3) +# define BOARD_LED_LD4_BIT (1 << BOARD_LED_LD4) + +/* These LEDs are available to the application and are all available to the + * application unless CONFIG_ARCH_LEDS is defined. In that case, the usage + * by the board port is defined in include/board.h and + * src/pic32mz_autoleds.c. The LEDs are used to encode OS-related events + * as follows: + * + * SYMBOL MEANING LED STATE + * A B C D + * ---------------- ----------------------- --- --- --- --- + */ + +#define LED_STARTED 0 /* NuttX has been started ON OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF ON OFF OFF */ +#define LED_IRQSENABLED 2 /* Interrupts enabled OFF OFF ON OFF */ +#define LED_STACKCREATED 3 /* Idle stack created OFF OFF OFF ON */ +#define LED_INIRQ 4 /* In an interrupt ON ON ON ON */ +#define LED_SIGNAL 4 /* In a signal handler ON ON ON ON */ +#define LED_ASSERTION 4 /* An assertion failed ON ON ON ON */ +#define LED_PANIC 4 /* The system has crashed ON ON ON ON */ +#undef LED_IDLE /* MCU is is sleep mode ---- Not used - */ + +/* Switch definitions *******************************************************/ + +/* The chipKIT Wi-Fire has 2 user push buttons labeled BTN1 and BTN2 on the + * white side of the board: + * + * PIN Button Notes + * ----- ---- ------------------------- + * RA5 BTN1 Sensed low when closed + * RA4 BTN2 Sensed low when closed + * + * The switches have external pull-down resistors. The switches are + * pulled down and pulled up to +3.3V when pressed. + */ + +#define BUTTON_BTN1 0 +#define BUTTON_BTN2 1 +#define NUM_BUTTONS 2 + +#define BUTTON_BTN1_BIT (1 << BUTTON_BTN1) +#define BUTTON_BTN2_BIT (1 << BUTTON_BTN2) + +/* UARTS ********************************************************************/ + +#define BOARD_U4RX_PPS U4RXR_RPF2 +#define BOARD_U4TX_PPS U4TX_RPF8R + +/* SPI **********************************************************************/ + +/* SPI1 is available on pins D5,D7,D35,D36 of the Arduino Shield connectors + * where you would expect then. The SPI connector is configured as follows: + * + * Pin J7&10 Board Signal PIC32MZ + * --- -- ------------ ------- + * D5 11 SPI1_SCK RD1 + * D36 6 SPI1_MISO RF1 + * D35 4 SPI1_MOSI RC1 + * D7 15 SPI1_SS RE9 + * + * SPI2 is available on pins D10-D13 of the Arduino Shield connectors where + * you would expect then. The SPI connector is configured as follows: + * + * Pin J7&10 Board Signal PIC32MZ + * --- -- ------------ ------- + * D13 11 SPI2_SCK RG6 + * D12 9 SPI2_MISO RF0 + * D11 7 SPI2_MOSI RD11 + * D10 5 SPI2_SS RG9 + * + * SPI3 is available on microSD connector as follows: + * + * Pin Board Signal PIC32MZ + * ---- ------------ ------- + * SCK SPI3_SCK RB14 + * SDO SPI3_MISO RB10 + * SDI SPI3_MOSI RC4 + * CS SPI3_SS RC3 + * + * SPI4 is connected to MRF24WG0MA WiFi module as follows: + * + * Pin Board Signal PIC32MZ + * ---- ------------ ------- + * SCK SPI4_SCK RD10 + * SDO SPI4_MISO RF5 + * SDI SPI4_MOSI RG0 + * CS SPI4_SS RD9 + * + * Chip select pin definitions are provided in + * boards/mips/chipkit-wifire/src/chipkit-wifire.h. + * + * CLK (output) pins have no alternative pin configurations. + */ + +#define BOARD_SDI1_PPS SDI1R_RPF1 +#define BOARD_SDO1_PPS SDO1_RPC1R + +#define BOARD_SDI2_PPS SDI2R_RPF0 +#define BOARD_SDO2_PPS SDO2_RPD11R + +#define BOARD_SDI3_PPS SDI3R_RPB10 +#define BOARD_SDO3_PPS SDO3_RPC4R + +#define BOARD_SDI4_PPS SDI4R_RPF5 +#define BOARD_SDO4_PPS SDO4_RPG0R + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_MIPS_PIC32MZ_CHIPKIT_WIFIRE_INCLUDE_BOARD_H */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/scripts/Make.defs b/boards/mips/pic32mz/chipkit-wifire/scripts/Make.defs similarity index 62% rename from boards/arm/s32k1xx/rddrone-uavcan146/scripts/Make.defs rename to boards/mips/pic32mz/chipkit-wifire/scripts/Make.defs index 349199ade88..8293bf4182f 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/scripts/Make.defs +++ b/boards/mips/pic32mz/chipkit-wifire/scripts/Make.defs @@ -1,5 +1,5 @@ ############################################################################ -# boards/arm/s32k1xx/rddrone-uavcan146/scripts/Make.defs +# boards/mips/pic32mz/chipkit-wifire/scripts/Make.defs # # Licensed to the Apache Software Foundation (ASF) under one or more # contributor license agreements. See the NOTICE file distributed with @@ -20,22 +20,40 @@ include $(TOPDIR)/.config include $(TOPDIR)/tools/Config.mk -include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs +include $(TOPDIR)/tools/pic32/Config.mk +include $(TOPDIR)/arch/mips/src/mips32/Toolchain.defs -ifeq ($(CONFIG_BOOT_RUNFROMFLASH),y) - LDSCRIPT = flash.ld -else ifeq ($(CONFIG_BOOT_RUNFROMISRAM),y) - LDSCRIPT = sram.ld +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_GNU_ELF),y) + LDSCRIPT = mips-debug.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_PINGUINOW),y) + LDSCRIPT = pinguino-debug.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y) + LDSCRIPT = xc32-debug.ld + MIPS_MPROCESSOR = 32MZ2048EFG100 +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_XC32),y) + LDSCRIPT = xc32-debug.ld + MIPS_MPROCESSOR = 32MZ2048EFG100 +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW),y) + LDSCRIPT = c32-debug.ld +endif + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPW_LITE),y) + LDSCRIPT = c32-debug.ld endif -$(warning, LDSCRIPT is $(LDSCRIPT)) ifeq ($(CONFIG_CYGWIN_WINTOOL),y) ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" else ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT) endif -$(warning, LDSCRIPT is $(LDSCRIPT)) -$(warning, ARCHSCRIPT is $(ARCHSCRIPT)) ifeq ($(CONFIG_DEBUG_SYMBOLS),y) ARCHOPTIMIZATION = -g @@ -46,10 +64,15 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y) endif ARCHCFLAGS = -fno-builtin -ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef ARCHWARNINGSXX = -Wall -Wshadow -Wundef -ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y) +ifeq ($(CONFIG_DEBUG_FEATURES),y) + ARCHCFLAGS += -D__DEBUG -D__MPLAB_DEBUGGER_PK3=1 -fframe-base-loclist +endif +endif CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) @@ -58,13 +81,12 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections -LDNXFLATFLAGS = -e main -s 2048 +ifeq ($(CONFIG_MIPS32_TOOLCHAIN_MICROCHIPL_XC32),y) + LDFLAGS = -nostdlib --defsym=__MPLAB_BUILD=1 --defsym=__MPLAB_DEBUG=1 --defsym=__DEBUG=1 --defsym=__MPLAB_DEBUGGER_PK3=1 --defsym=_min_heap_size=0 --gc-sections +else + LDFLAGS = # -no-isn32 --relax +endif -ifneq ($(CROSSDEV),arm-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif -ifeq ($(CONFIG_DEBUG_SYMBOLS),y) - LDFLAGS += -g -endif +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/mips/pic32mz/chipkit-wifire/scripts/c32-debug.ld b/boards/mips/pic32mz/chipkit-wifire/scripts/c32-debug.ld new file mode 100644 index 00000000000..256a3c11b2f --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/scripts/c32-debug.ld @@ -0,0 +1,325 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/scripts/c32-debug.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of + * program FLASH at physical address 0x1d000000 but is always accessed + * at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K + + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot + * FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and + * 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either + * may be mapped to the lower boot alias region (0x1fc00000, + * boolalias1) or the upper boot alias region (0x1fc20000, bootalias2). + * This linker script assumes that Boot Flash 1 is mapped to the lower + * alias region and Boot Flash 2 to the upper region. + * + * NOTE: This linker script simply writes into the lower boot alias, + * whichever boot FLASH that may correspond to. The other boot FLASH + * is simply ignored. + * + * The initial reset vector is in KSEG1, but all other accesses are in + * KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb) + * DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128 + kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128 + + /* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb + * of data memory at physical address 0x00000000. Since the PIC32MZ + * has no data cache, this memory is always accessed through KSEG1. + * + * When used with MPLABX, we need to set aside 512 bytes of memory + * for use by MPLABX and 128 for DSP register storage. + */ + + kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mz) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .adevcfg : + { + KEEP (*(.adevcfg)) + } > kseg1_adevcfg + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + . = ALIGN(4); + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + . = ALIGN(16); + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(16); + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/boards/mips/pic32mz/chipkit-wifire/scripts/mips-debug.ld b/boards/mips/pic32mz/chipkit-wifire/scripts/mips-debug.ld new file mode 100644 index 00000000000..105eb4bc989 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/scripts/mips-debug.ld @@ -0,0 +1,325 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/scripts/mips-debug.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of + * program FLASH at physical address 0x1d000000 but is always accessed + * at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K + + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot + * FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and + * 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either + * may be mapped to the lower boot alias region (0x1fc00000, + * boolalias1) or the upper boot alias region (0x1fc20000, bootalias2). + * This linker script assumes that Boot Flash 1 is mapped to the lower + * alias region and Boot Flash 2 to the upper region. + * + * NOTE: This linker script simply writes into the lower boot alias, + * whichever boot FLASH that may correspond to. The other boot FLASH + * is simply ignored. + * + * The initial reset vector is in KSEG1, but all other accesses are in + * KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb) + * DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128 + kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128 + + /* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb + * of data memory at physical address 0x00000000. Since the PIC32MZ + * has no data cache, this memory is always accessed through KSEG1. + * + * When used with MPLABX, we need to set aside 512 bytes of memory + * for use by MPLABX and 128 for DSP register storage. + */ + + kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(mips) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .adevcfg : + { + KEEP (*(.adevcfg)) + } > kseg1_adevcfg + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + . = ALIGN(4); + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + . = ALIGN(16); + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(16); + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/boards/mips/pic32mz/chipkit-wifire/scripts/pinguino-debug.ld b/boards/mips/pic32mz/chipkit-wifire/scripts/pinguino-debug.ld new file mode 100644 index 00000000000..41d901892f1 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/scripts/pinguino-debug.ld @@ -0,0 +1,325 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/scripts/pinguino-debug.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of + * program FLASH at physical address 0x1d000000 but is always accessed + * at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K + + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot + * FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and + * 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either + * may be mapped to the lower boot alias region (0x1fc00000, + * boolalias1) or the upper boot alias region (0x1fc20000, bootalias2). + * This linker script assumes that Boot Flash 1 is mapped to the lower + * alias region and Boot Flash 2 to the upper region. + * + * NOTE: This linker script simply writes into the lower boot alias, + * whichever boot FLASH that may correspond to. The other boot FLASH + * is simply ignored. + * + * The initial reset vector is in KSEG1, but all other accesses are in + * KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb) + * DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128 + kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128 + + /* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb + * of data memory at physical address 0x00000000. Since the PIC32MZ + * has no data cache, this memory is always accessed through KSEG1. + * + * When used with MPLABX, we need to set aside 512 bytes of memory + * for use by MPLABX and 128 for DSP register storage. + */ + + kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640 +} + +OUTPUT_FORMAT("elf32-littlemips") +OUTPUT_ARCH(mips) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .adevcfg : + { + KEEP (*(.adevcfg)) + } > kseg1_adevcfg + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + . = ALIGN(4); + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + . = ALIGN(16); + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(16); + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/boards/mips/pic32mz/chipkit-wifire/scripts/sourcery-debug.ld b/boards/mips/pic32mz/chipkit-wifire/scripts/sourcery-debug.ld new file mode 100644 index 00000000000..81fcb06086f --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/scripts/sourcery-debug.ld @@ -0,0 +1,325 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/scripts/sourcery-debug.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of + * program FLASH at physical address 0x1d000000 but is always accessed + * at KSEG0 address 0x9d00:0000 + */ + + kseg0_progmem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K + + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot + * FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and + * 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either + * may be mapped to the lower boot alias region (0x1fc00000, + * boolalias1) or the upper boot alias region (0x1fc20000, bootalias2). + * This linker script assumes that Boot Flash 1 is mapped to the lower + * alias region and Boot Flash 2 to the upper region. + * + * NOTE: This linker script simply writes into the lower boot alias, + * whichever boot FLASH that may correspond to. The other boot FLASH + * is simply ignored. + * + * The initial reset vector is in KSEG1, but all other accesses are in + * KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb) + * DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128 + kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128 + + /* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb + * of data memory at physical address 0x00000000. Since the PIC32MZ + * has no data cache, this memory is always accessed through KSEG1. + * + * When used with MPLABX, we need to set aside 512 bytes of memory + * for use by MPLABX and 128 for DSP register storage. + */ + + kseg1_datamem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(mips) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .adevcfg : + { + KEEP (*(.adevcfg)) + } > kseg1_adevcfg + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_progmem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_datamem AT > kseg0_progmem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_datamem) ; + _bmxdudba_address = LENGTH(kseg1_datamem) ; + _bmxdupba_address = LENGTH(kseg1_datamem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_datamem AT > kseg0_progmem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_datamem AT > kseg0_progmem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_datamem AT > kseg0_progmem + + .lit8 : + { + *(.lit8) + } > kseg1_datamem AT > kseg0_progmem + + .lit4 : + { + *(.lit4) + . = ALIGN(4); + _edata = ABSOLUTE(.); + } >kseg1_datamem AT>kseg0_progmem + + .sbss : + { + . = ALIGN(16); + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_datamem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(16); + _ebss = ABSOLUTE(.); + } > kseg1_datamem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/boards/mips/pic32mz/chipkit-wifire/scripts/xc32-debug.ld b/boards/mips/pic32mz/chipkit-wifire/scripts/xc32-debug.ld new file mode 100644 index 00000000000..08b1b50dd97 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/scripts/xc32-debug.ld @@ -0,0 +1,325 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/scripts/mips-debug.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* Memory Regions ***********************************************************/ + +MEMORY +{ + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 2048Kb of + * program FLASH at physical address 0x1d000000 but is always accessed + * at KSEG0 address 0x9d00:0000 + */ + + kseg0_program_mem (rx) : ORIGIN = 0x9d000000, LENGTH = 2048K + + /* The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have 160Kb of boot + * FLASH: 80Kb at physical address 0x1fc4000 (Boot Flash 1, boot1) and + * 80Kb at physical address 0x1fc60000 (Boot Flash 2, boot2). Either + * may be mapped to the lower boot alias region (0x1fc00000, + * boolalias1) or the upper boot alias region (0x1fc20000, bootalias2). + * This linker script assumes that Boot Flash 1 is mapped to the lower + * alias region and Boot Flash 2 to the upper region. + * + * NOTE: This linker script simply writes into the lower boot alias, + * whichever boot FLASH that may correspond to. The other boot FLASH + * is simply ignored. + * + * The initial reset vector is in KSEG1, but all other accesses are in + * KSEG0. + * + * REGION PHYSICAL KSEG SIZE + * DESCRIPTION START ADDR (BYTES) + * ------------- ---------- ------ ---------------------- + * Exceptions:* + * Reset 0x1fc00000 KSEG1 512 512 + * TLB Refill 0x1fc00200 KSEG1 256 768 + * Cache Error 0x1fc00300 KSEG1 128 896 + * Others 0x1fc00380 KSEG1 128 1024 (1Kb) + * Interrupt 0x1fc00400 KSEG1 128 1152 + * JTAG 0x1fc00480 KSEG1 16 1168 + * Exceptions 0x1fc00490 KSEG0 8192-1168 8192 (4Kb) + * Debug code 0x1fc02000 KSEG1 4096-16 12272 + * ADEVCFG3-0 0x1fc0ff40 KSEG1 16 12288 (12Kb) + * DEVCFG3-0 0x1fc0ffc0 KSEG1 16 12288 (12Kb) + * + * Exceptions assume: + * + * STATUS: BEV=0/1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + */ + + kseg1_reset (rx) : ORIGIN = 0xbfc00000, LENGTH = 384 + kseg1_genexcpt (rx) : ORIGIN = 0xbfc00180, LENGTH = 128 + kseg1_ebexcpt (rx) : ORIGIN = 0xbfc00200, LENGTH = 128 + kseg1_bevexcpt (rx) : ORIGIN = 0xbfc00380, LENGTH = 128 + kseg1_intexcpt (rx) : ORIGIN = 0xbfc00400, LENGTH = 128 + kseg1_dbgexcpt (rx) : ORIGIN = 0xbfc00480, LENGTH = 16 + kseg0_bootmem (rx) : ORIGIN = 0x9fc004ac, LENGTH = 8192-1196 + kseg1_dbgcode (rx) : ORIGIN = 0xbfc02000, LENGTH = 4096-16 + kseg1_adevcfg (r) : ORIGIN = 0x1fc0ff40, LENGTH = 128 + kseg1_devcfg (r) : ORIGIN = 0x1fc0ffc0, LENGTH = 128 + + /* The The PIC32MZ2048ECH144 and PIC32MZ2048ECM144 chips have has 512Kb + * of data memory at physical address 0x00000000. Since the PIC32MZ + * has no data cache, this memory is always accessed through KSEG1. + * + * When used with MPLABX, we need to set aside 512 bytes of memory + * for use by MPLABX and 128 for DSP register storage. + */ + + kseg1_data_mem (rw!x) : ORIGIN = 0xa0000200, LENGTH = 512K - 640 +} + +OUTPUT_FORMAT("elf32-tradlittlemips") +OUTPUT_ARCH(pic32mx) +ENTRY(__start) + +SECTIONS +{ + /* Boot FLASH sections */ + + .reset : + { + KEEP (*(.reset)) + } > kseg1_reset + + /* Exception handlers. The following is assumed: + * + * STATUS: BEV=1 and EXL=0 + * CAUSE: IV=1 + * JTAG: ProbEn=0 + * And multi-vector support disabled + * + * In that configuration, the vector locations become: + * + * Reset, Soft Reset bfc0:0000 + * TLB Refill bfc0:0200 + * Cache Error bfc0:0300 + * All others bfc0:0380 + * Interrupt bfc0:0400 + * EJTAG Debug bfc0:0480 + */ + + /* KSEG1 exception handler "trampolines" */ + + .gen_excpt : + { + KEEP (*(.gen_excpt)) + } > kseg1_genexcpt + + .ebase_excpt : + { + KEEP (*(.ebase_excpt)) + } > kseg1_ebexcpt + + .bev_excpt : + { + KEEP (*(.bev_excpt)) + } > kseg1_bevexcpt + + .int_excpt : + { + KEEP (*(.int_excpt)) + } > kseg1_intexcpt + + .dbg_excpt = ORIGIN(kseg1_dbgexcpt); + + .start : + { + /* KSEG0 Reset startup logic */ + + *(.start) + + /* KSEG0 exception handlers */ + + *(.nmi_handler) + *(.bev_handler) + *(.int_handler) + } > kseg0_bootmem + + .dbg_code = ORIGIN(kseg1_dbgcode); + + .adevcfg : + { + KEEP (*(.adevcfg)) + } > kseg1_adevcfg + + .devcfg : + { + KEEP (*(.devcfg)) + } > kseg1_devcfg + + /* Program FLASH sections */ + + .text : + { + _stext = ABSOLUTE(.); + *(.text .text.*) + *(.stub) + KEEP (*(.text.*personality*)) + *(.gnu.linkonce.t.*) + *(.gnu.warning) + *(.mips16.fn.*) + *(.mips16.call.*) + + /* Read-only data is included in the text section */ + + *(.rodata .rodata.*) + *(.rodata1) + *(.gnu.linkonce.r.*) + + /* Small initialized constant global and static data */ + + *(.sdata2 .sdata2.*) + *(.gnu.linkonce.s2.*) + + /* Uninitialized constant global and static data */ + + *(.sbss2 .sbss2.*) + *(.gnu.linkonce.sb2.*) + _etext = ABSOLUTE(.); + } > kseg0_program_mem + + /* Initialization data begins here in progmem */ + + _data_loaddr = LOADADDR(.data); + + .eh_frame_hdr : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + + /* RAM functions are positioned at the beginning of RAM so that + * they can be guaranteed to satisfy the 2Kb alignment requirement. + */ + +/* This causes failures if there are no RAM functions + .ramfunc ALIGN(2K) : + { + _sramfunc = ABSOLUTE(.); + *(.ramfunc .ramfunc.*) + _eramfunc = ABSOLUTE(.); + } > kseg1_data_mem AT > kseg0_program_mem + + _ramfunc_loadaddr = LOADADDR(.ramfunc); + _ramfunc_sizeof = SIZEOF(.ramfunc); + _bmxdkpba_address = _sramfunc - ORIGIN(kseg1_data_mem) ; + _bmxdudba_address = LENGTH(kseg1_data_mem) ; + _bmxdupba_address = LENGTH(kseg1_data_mem) ; +*/ + + .data : + { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + *(.data1) + } > kseg1_data_mem AT > kseg0_program_mem + + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + _gp = ALIGN(16) + 0x7FF0 ; + + .got : + { + *(.got.plt) *(.got) + } > kseg1_data_mem AT > kseg0_program_mem + + .sdata : + { + *(.sdata .sdata.* .gnu.linkonce.s.*) + } > kseg1_data_mem AT > kseg0_program_mem + + .lit8 : + { + *(.lit8) + } > kseg1_data_mem AT > kseg0_program_mem + + .lit4 : + { + *(.lit4) + . = ALIGN(4); + _edata = ABSOLUTE(.); + } >kseg1_data_mem AT>kseg0_program_mem + + .sbss : + { + . = ALIGN(16); + _sbss = ABSOLUTE(.); + *(.dynsbss) + *(.sbss .sbss.* .gnu.linkonce.sb.*) + *(.scommon) + } >kseg1_data_mem + + .bss : + { + *(.dynbss) + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(16); + _ebss = ABSOLUTE(.); + } > kseg1_data_mem + + /* Stabs debugging sections */ + + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + + /* DWARF debug sections */ + /* DWARF 1 */ + + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + + /* GNU DWARF 1 extensions */ + + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + + /* DWARF 1.1 and DWARF 2 */ + + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + + /* DWARF 2 */ + + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + + /* SGI/MIPS DWARF 2 extensions */ + + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/Makefile b/boards/mips/pic32mz/chipkit-wifire/src/Makefile similarity index 77% rename from boards/arm/s32k1xx/rddrone-uavcan144/src/Makefile rename to boards/mips/pic32mz/chipkit-wifire/src/Makefile index dc5369e9a0c..f0e3ea77d23 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/Makefile +++ b/boards/mips/pic32mz/chipkit-wifire/src/Makefile @@ -1,5 +1,5 @@ ############################################################################ -# boards/arm/s32k1xx/rddrone-uavcan144/src/Makefile +# boards/mips/pic32mz/chipkit-wifire/src/Makefile # # Licensed to the Apache Software Foundation (ASF) under one or more # contributor license agreements. See the NOTICE file distributed with @@ -20,25 +20,18 @@ include $(TOPDIR)/Make.defs -CSRCS = s32k1xx_boot.c s32k1xx_bringup.c s32k1xx_clockconfig.c -CSRCS += s32k1xx_periphclocks.c +CSRCS = pic32mz_boot.c pic32mz_bringup.c pic32mz_userleds.c pic32mz_spi.c + +ifeq ($(CONFIG_BOARDCTL),y) +CSRCS += pic32mz_appinit.c +endif ifeq ($(CONFIG_ARCH_LEDS),y) -CSRCS += s32k1xx_autoleds.c -else -CSRCS += s32k1xx_userleds.c +CSRCS += pic32mz_autoleds.c endif ifeq ($(CONFIG_ARCH_BUTTONS),y) -CSRCS += s32k1xx_buttons.c -endif - -ifeq ($(CONFIG_BOARDCTL),y) -CSRCS += s32k1xx_appinit.c -endif - -ifeq ($(CONFIG_S32K1XX_LPSPI),y) -CSRCS += s32k1xx_spi.c +CSRCS += pic32mz_buttons.c endif include $(TOPDIR)/boards/Board.mk diff --git a/boards/mips/pic32mz/chipkit-wifire/src/chipkit-wifire.h b/boards/mips/pic32mz/chipkit-wifire/src/chipkit-wifire.h new file mode 100644 index 00000000000..45df97f3858 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/src/chipkit-wifire.h @@ -0,0 +1,183 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/src/chipkit-wifire.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_MIPS_PIC32MZ_CHIPKIT_WIFIRE_SRC_CHIPKIT_WIFIRE_H +#define __BOARDS_MIPS_PIC32MZ_CHIPKIT_WIFIRE_SRC_CHIPKIT_WIFIRE_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +/* LEDs *********************************************************************/ + +/* There are four LEDs on the top side of the board: + * + * LED LD1 - RG6 + * LED LD2 - RD4 + * LED LD3 - RB11 + * LED LD4 - RG15 + * + * A high output value illuminates the LEDs. + */ + +#define GPIO_LED_LD1 (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTG | GPIO_PIN6) +#define GPIO_LED_LD2 (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTD | GPIO_PIN4) +#define GPIO_LED_LD3 (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTB | GPIO_PIN11) +#define GPIO_LED_LD4 (GPIO_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTG | GPIO_PIN15) + +/* The chipKIT Wi-Fire has 2 user push buttons labeled BTN1 and BTN2 on the + * white side of the board: + * + * PIN Button Notes + * ----- ---- ------------------------- + * RA5 BTN1 Sensed low when closed + * RA4 BTN2 Sensed low when closed + * + * The switches have external pull-down resistors. The switches are + * pulled down and pulled up to +3.3V when pressed. + */ + +#define GPIO_BTN1 (GPIO_INPUT | GPIO_INTERRUPT | GPIO_PORTA | GPIO_PIN5) +#define GPIO_BTN2 (GPIO_INPUT | GPIO_INTERRUPT | GPIO_PORTA | GPIO_PIN4) + +/* SPI Chip Selects + * + * SPI1 is available on pins D5,D7,D35,D36 of the Arduino Shield connectors + * where you would expect then. The SPI connector is configured as follows: + * + * Pin J7&10 Board Signal PIC32MZ + * --- -- ------------ ------- + * D5 11 SPI1_SCK RD1 + * D36 6 SPI1_MISO RF1 + * D35 4 SPI1_MOSI RC1 + * D7 15 SPI1_SS RE9 + */ + +#define GPIO_ARD_SPI1_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTE | GPIO_PIN9) + +/* SPI2 is available on pins D10-D13 of the Arduino Shield connectors where + * you would expect then. The SPI connector is configured as follows: + * + * Pin J7&10 Board Signal PIC32MZ + * --- -- ------------ ------- + * D13 11 SPI2_SCK RG6 + * D12 9 SPI2_MISO RF0 + * D11 7 SPI2_MOSI RD11 + * D10 5 SPI2_SS RG9 + */ + +#define GPIO_ARD_SPI2_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTG | GPIO_PIN9) + +/* SPI3 is available on microSD connector as follows: + * + * Pin Board Signal PIC32MZ + * ---- ------------ ------- + * SCK SPI3_SCK RB14 + * SDO SPI3_MISO RB10 + * SDI SPI3_MOSI RC4 + * CS SPI3_SS RC3 + */ + +#define GPIO_SD_SPI3_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTC | GPIO_PIN3) + +/* SPI4 is connected to MRF24WG0MA WiFi module as follows: + * + * Pin Board Signal PIC32MZ + * ---- ------------ ------- + * SCK SPI4_SCK RD10 + * SDO SPI4_MISO RF5 + * SDI SPI4_MOSI RG0 + * CS SPI4_SS RD9 + */ + +#define GPIO_WIFI_SPI4_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORTD | GPIO_PIN9) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: pic32mz_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the PCB Logic board. + * + ****************************************************************************/ + +#ifdef CONFIG_PIC32MZ_SPI +void weak_function pic32mz_spidev_initialize(void); +#endif + +/**************************************************************************** + * Name: pic32mz_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void pic32mz_led_initialize(void); +#endif + +/**************************************************************************** + * Name: pic32mz_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int pic32mz_bringup(void); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_MIPS_PIC32MZ_CHIPKIT_WIFIRE_SRC_CHIPKIT_WIFIRE_H */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_appinit.c b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_appinit.c similarity index 84% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_appinit.c rename to boards/mips/pic32mz/chipkit-wifire/src/pic32mz_appinit.c index 7dd95930605..d4ad704e9aa 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_appinit.c +++ b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_appinit.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_appinit.c + * boards/mips/pic32mz/chipkit-wifire/src/pic32mz_appinit.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -26,15 +26,9 @@ #include -#include "rddrone-uavcan146.h" +#include "chipkit-wifire.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -#ifndef OK -# define OK 0 -#endif +#ifdef CONFIG_BOARDCTL /**************************************************************************** * Public Functions @@ -67,13 +61,15 @@ int board_app_initialize(uintptr_t arg) { -#ifdef CONFIG_BOARD_LATE_INITIALIZE - /* Board initialization already performed by board_late_initialize() */ + /* If CONFIG_BOARD_LATE_INITIALIZE is selected then board initialization + * was already performed in board_late_initialize. + */ - return OK; +#ifndef CONFIG_BOARD_LATE_INITIALIZE + return pic32mz_bringup(); #else - /* Perform board-specific initialization */ - - return s32k1xx_bringup(); + return OK; #endif } + +#endif /* CONFIG_BOARDCTL */ diff --git a/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_autoleds.c b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_autoleds.c new file mode 100644 index 00000000000..2f8cb3bff41 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_autoleds.c @@ -0,0 +1,198 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/src/pic32mz_autoleds.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "mips_arch.h" +#include "mips_internal.h" + +#include "pic32mz_gpio.h" +#include "chipkit-wifire.h" + +#ifdef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* There are four LEDs on the top side of the board: + * + * LED LD1 - RG6 + * LED LD2 - RD4 + * LED LD3 - RB11 + * LED LD4 - RG15 + * + * A high output value illuminates the LEDs. + * + * These LEDs are available to the application and are all available to the + * application unless CONFIG_ARCH_LEDS is defined. In that case, the usage + * by the board port is defined in include/board.h and + * src/pic32mz_autoleds.c. The LEDs are used to encode OS-related events + * as follows: + * SYMBOL MEANING LED STATE + * A B C D + * ---------------- ----------------------- --- --- --- --- + * LED_STARTED NuttX has been started ON OFF OFF OFF + * LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF + * LED_IRQSENABLED Interrupts enabled OFF OFF ON OFF + * LED_STACKCREATED Idle stack created OFF OFF OFF ON + * LED_INIRQ In an interrupt ON ON ON ON + * LED_SIGNAL In a signal handler ON ON ON ON + * LED_ASSERTION An assertion failed ON ON ON ON + * LED_PANIC The system has crashed ON ON ON ON + * LED_IDLE MCU is is sleep mode ---- Not used ---- + */ + +/* LED indices */ + +#define INDEX_LED_LD1 0 +#define INDEX_LED_LD2 1 +#define INDEX_LED_LD3 2 +#define INDEX_LED_LD4 3 +#define NLEDS 4 + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void board_autoled_setone(int ledndx) +{ + bool ledon[NLEDS] = + { + false, + false, + false, + false + }; + + ledon[ledndx] = true; + pic32mz_gpiowrite(GPIO_LED_LD1, ledon[INDEX_LED_LD1]); + pic32mz_gpiowrite(GPIO_LED_LD2, ledon[INDEX_LED_LD2]); + pic32mz_gpiowrite(GPIO_LED_LD3, ledon[INDEX_LED_LD3]); + pic32mz_gpiowrite(GPIO_LED_LD4, ledon[INDEX_LED_LD4]); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mz_led_initialize + ****************************************************************************/ + +void pic32mz_led_initialize(void) +{ + /* Configure LED GPIOs for output */ + + pic32mz_configgpio(GPIO_LED_LD1); + pic32mz_configgpio(GPIO_LED_LD2); + pic32mz_configgpio(GPIO_LED_LD3); + pic32mz_configgpio(GPIO_LED_LD4); +} + +/**************************************************************************** + * Name: board_autoled_on + ****************************************************************************/ + +void board_autoled_on(int led) +{ + /* SYMBOL MEANING LED STATE + * A B C D + * ------------------- ----------------------- --- --- --- --- + * LED_STARTED 0 NuttX has been started ON OFF OFF OFF + * LED_HEAPALLOCATE 1 Heap has been allocated OFF ON OFF OFF + * LED_IRQSENABLED 2 Interrupts enabled OFF OFF ON OFF + * LED_STACKCREATED 3 Idle stack created OFF OFF OFF ON + * LED_INIRQ 4 In an interrupt ON ON ON ON + * LED_SIGNAL 4 In a signal handler ON ON ON ON + * LED_ASSERTION 4 An assertion failed ON ON ON ON + * LED_PANIC 4 The system has crashed ON ON ON ON + */ + + switch (led) + { + default: + case 0: + board_autoled_setone(INDEX_LED_LD1); + break; + + case 1: + board_autoled_setone(INDEX_LED_LD2); + break; + + case 2: + board_autoled_setone(INDEX_LED_LD3); + break; + + case 3: + board_autoled_setone(INDEX_LED_LD4); + break; + + case 4: + board_autoled_setone(INDEX_LED_LD1); + board_autoled_setone(INDEX_LED_LD2); + board_autoled_setone(INDEX_LED_LD3); + board_autoled_setone(INDEX_LED_LD4); + break; + } +} + +/**************************************************************************** + * Name: board_autoled_off + ****************************************************************************/ + +void board_autoled_off(int led) +{ + /* SYMBOL MEANING LED STATE + * A B C D + * ------------------- ----------------------- --- --- --- --- + * LED_STARTED 0 NuttX has been started ON OFF OFF OFF + * LED_HEAPALLOCATE 1 Heap has been allocated OFF ON OFF OFF + * LED_IRQSENABLED 2 Interrupts enabled OFF OFF ON OFF + * LED_STACKCREATED 3 Idle stack created OFF OFF OFF ON + * LED_INIRQ 4 In an interrupt ON ON ON ON + * LED_SIGNAL 4 In a signal handler ON ON ON ON + * LED_ASSERTION 4 An assertion failed ON ON ON ON + * LED_PANIC 4 The system has crashed ON ON ON ON + */ + + switch (led) + { + default: + pic32mz_gpiowrite(GPIO_LED_LD1, false); + pic32mz_gpiowrite(GPIO_LED_LD2, false); + pic32mz_gpiowrite(GPIO_LED_LD3, false); + pic32mz_gpiowrite(GPIO_LED_LD4, false); + break; + } +} + +#endif /* CONFIG_ARCH_LEDS */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_boot.c b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_boot.c similarity index 67% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_boot.c rename to boards/mips/pic32mz/chipkit-wifire/src/pic32mz_boot.c index e7602a1c104..997885be407 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_boot.c +++ b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_boot.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_boot.c + * boards/mips/pic32mz/chipkit-wifire/src/pic32mz_boot.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -26,31 +26,44 @@ #include +#include #include -#include "rddrone-uavcan146.h" +#include "chipkit-wifire.h" /**************************************************************************** * Public Functions ****************************************************************************/ /**************************************************************************** - * Name: s32k1xx_board_initialize + * Name: pic32mz_boardinitialize * * Description: - * All S32K1XX architectures must provide the following entry point. This - * entry point is called early in the initialization -- after all memory - * has been configured and mapped but before any devices have been - * initialized. + * All PIC32MZ architectures must provide the following entry point. + * This entry point is called early in the initialization -- after all + * memory has been configured and mapped but before any devices have been + * initialized. * ****************************************************************************/ -void s32k1xx_board_initialize(void) +void pic32mz_boardinitialize(void) { -#ifdef CONFIG_ARCH_LEDS + /* Configure SPI chip selects if 1) at least one SPI is enabled, and 2) + * the weak function pic32mz_spidev_initialize() has been brought into the + * link. + */ + +#ifdef CONFIG_PIC32MZ_SPI + if (pic32mz_spidev_initialize) + { + pic32mz_spidev_initialize(); + } +#endif + /* Configure on-board LEDs if LED support has been selected. */ - board_autoled_initialize(); +#ifdef CONFIG_ARCH_LEDS + pic32mz_led_initialize(); #endif } @@ -60,19 +73,19 @@ void s32k1xx_board_initialize(void) * Description: * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional * initialization call will be performed in the boot-up sequence to a - * function called board_late_initialize(). board_late_initialize() will - * be called immediately after up_initialize() is called and just before - * the initial application is started. This additional initialization - * phase may be used, for example, to initialize board-specific device - * drivers. + * function called board_late_initialize(). board_late_initialize() + * will be called immediately after up_initialize() is called and + * just before the initial application is started. This additional + * initialization phase may be used, for example, to initialize + * board-specific device drivers. * ****************************************************************************/ #ifdef CONFIG_BOARD_LATE_INITIALIZE void board_late_initialize(void) { - /* Perform board-specific initialization */ + /* Perform board initialization */ - s32k1xx_bringup(); + pic32mz_bringup(); } -#endif +#endif /* CONFIG_BOARD_LATE_INITIALIZE */ diff --git a/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_bringup.c b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_bringup.c new file mode 100644 index 00000000000..01bef61aed9 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_bringup.c @@ -0,0 +1,63 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/src/pic32mz_bringup.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include + +#include "chipkit-wifire.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mz_bringup + * + * Description: + * Bring up board features + * + ****************************************************************************/ + +int pic32mz_bringup(void) +{ + int ret; + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = nx_mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", + ret); + } +#endif + + UNUSED(ret); + return OK; +} diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_buttons.c b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_buttons.c similarity index 69% rename from boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_buttons.c rename to boards/mips/pic32mz/chipkit-wifire/src/pic32mz_buttons.c index 7403f286f3c..565becccebb 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_buttons.c +++ b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_buttons.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_buttons.c + * boards/mips/pic32mz/chipkit-wifire/src/pic32mz_buttons.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,12 +18,6 @@ * ****************************************************************************/ -/* The RDDRONE-UAVCAN144 supports two buttons: - * - * SW2 PTC12 - * SW3 PTC13 - */ - /**************************************************************************** * Included Files ****************************************************************************/ @@ -35,14 +29,26 @@ #include #include - -#include "s32k1xx_pin.h" -#include "rddrone-uavcan144.h" - #include +#include "pic32mz_gpio.h" +#include "chipkit-wifire.h" + #ifdef CONFIG_ARCH_BUTTONS +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Pin configuration for each switch. This array is indexed by the BUTTON_* + * definitions in board.h + */ + +static const pinset_t g_buttons[NUM_BUTTONS] = +{ + GPIO_BTN1, GPIO_BTN2, +}; + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -60,10 +66,17 @@ uint32_t board_button_initialize(void) { - /* Configure the GPIO pins as interrupting inputs. */ + int i; + + /* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are + * configured for all pins. + */ + + for (i = 0; i < NUM_BUTTONS; i++) + { + pic32mz_configgpio(g_buttons[i]); + } - s32k1xx_pinconfig(GPIO_SW2); - s32k1xx_pinconfig(GPIO_SW3); return NUM_BUTTONS; } @@ -74,22 +87,29 @@ uint32_t board_button_initialize(void) uint32_t board_buttons(void) { uint32_t ret = 0; + int i; - if (s32k1xx_gpioread(GPIO_SW2)) - { - ret |= BUTTON_SW2_BIT; - } + /* Check that state of each key */ - if (s32k1xx_gpioread(GPIO_SW3)) + for (i = 0; i < NUM_BUTTONS; i++) { - ret |= BUTTON_SW3_BIT; + /* A LOW value means that the key is pressed. */ + + bool released = pic32mz_gpioread(g_buttons[i]); + + /* Accumulate the set of depressed (not released) keys */ + + if (!released) + { + ret |= (1 << i); + } } return ret; } /**************************************************************************** - * Button support. + * Button interrupt support. * * Description: * board_button_initialize() must be called to initialize button resources. @@ -98,7 +118,7 @@ uint32_t board_buttons(void) * interrupt handlers. * * After board_button_initialize() has been called, board_buttons() may be - * called to collect the state of all buttons. board_buttons() returns a + * called to collect the state of all buttons. board_buttons() returns an * 32-bit bit set with each bit associated with a button. See the * BUTTON_*_BIT definitions in board.h for the meaning of each bit. * @@ -113,39 +133,31 @@ uint32_t board_buttons(void) #ifdef CONFIG_ARCH_IRQBUTTONS int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) { - uint32_t pinset; - int ret; +#ifdef CONFIG_PIC32MZ_GPIOIRQ_PORTA + int ret = OK; - /* Map the button id to the GPIO bit set. */ - - if (id == BUTTON_SW2) + if ((unsigned)id < NUM_BUTTONS) { - pinset = GPIO_SW2; - } - else if (id == BUTTON_SW3) - { - pinset = GPIO_SW3; - } - else - { - return -EINVAL; - } + /* Perform the attach/detach operation */ - /* The button has already been configured as an interrupting input (by - * board_button_initialize() above). - * - * Attach the new button handler. - */ + ret = pic32mz_gpioattach(g_buttons[id], irqhandler, arg); - ret = s32k1xx_pinirqattach(pinset, irqhandler, NULL); - if (ret >= 0) - { - /* Then make sure that interrupts are enabled on the pin */ + /* The interrupt is now disabled. Are we attaching or detaching from + * button interrupt? + */ - s32k1xx_pinirqenable(pinset); + if (ret >= 0) + { + /* Attaching... enable button interrupts now */ + + pic32mz_gpioirqenable(g_buttons[id]); + } } return ret; +#else + return -ENOSYS; +#endif } #endif #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_spi.c b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_spi.c new file mode 100644 index 00000000000..2cac668a65e --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_spi.c @@ -0,0 +1,304 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/src/pic32mz_spi.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include + +#include "mips_arch.h" +#include "pic32mz_gpio.h" + +#include "chipkit-wifire.h" + +#ifdef CONFIG_PIC32MZ_SPI + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pic32mz_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the PIC32MZ board. + * + ****************************************************************************/ + +void weak_function pic32mz_spidev_initialize(void) +{ +} + +/**************************************************************************** + * Name: pic32mz_spiNselect, pic32mz_spiNstatus, and pic32mz_spiNcmddata + * + * Description: + * These external functions must be provided by board-specific logic. + * They are implementations of the select, status, and cmddata methods of + * the SPI interface defined by struct spi_ops_s + * (see include/nuttx/spi/spi.h). + * All other methods including pic32mz_spibus_initialize()) are provided by + * common PIC32MZ logic. + * To use this common SPI logic on your board: + * + * 1. Provide logic in pic32mz_boardinitialize() to configure SPI/SPI chip + * select pins. + * 2. Provide pic32mz_spiNselect() and pic32mz_spiNstatus() functions + * in your board-specific logic. These functions will perform chip + * selection and status operations using GPIOs in the way your board is + * configured. + * 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide + * pic32mz_spiNcmddata() functions in your board-specific logic. These + * functions will perform cmd/data selection operations using GPIOs in + * the way your board is configured. + * 3. Add a call to pic32mz_spibus_initialize() in your low level + * application initialization logic + * 4. The handle returned by pic32mz_spibus_initialize() may then be used + * to bind the SPI driver to higher level logic (e.g., calling + * mmcsd_spislotinitialize(), for example, will bind the SPI driver to + * the SPI MMC/SD driver). + * + ****************************************************************************/ + +struct spi_dev_s; + +#ifdef CONFIG_PIC32MZ_SPI1 +void pic32mz_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); +} + +uint8_t pic32mz_spi1status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + spiinfo("Returning nothing\n"); + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return 0; +} +#endif +#endif /* CONFIG_PIC32MZ_SPI1 */ + +#ifdef CONFIG_PIC32MZ_SPI2 +void pic32mz_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); +} + +uint8_t pic32mz_spi2status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + spiinfo("Returning nothing\n"); + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return 0; +} +#endif +#endif /* CONFIG_PIC32MZ_SPI2 */ + +#ifdef CONFIG_PIC32MZ_SPI3 +void pic32mz_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); +} + +uint8_t pic32mz_spi3status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + spiinfo("Returning nothing\n"); + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return 0; +} +#endif +#endif /* CONFIG_PIC32MZ_SPI3 */ + +#ifdef CONFIG_PIC32MZ_SPI4 +void pic32mz_spi4select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); +} + +uint8_t pic32mz_spi4status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + spiinfo("Returning nothing\n"); + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ + return 0; +} +#endif +#endif /* CONFIG_PIC32MZ_SPI4 */ + +#ifdef CONFIG_PIC32MZ_SPI5 +void pic32mz_spi5select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); +} + +uint8_t pic32mz_spi5status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + spiinfo("Returning nothing\n"); +#warning "Missing logic" + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif /* CONFIG_PIC32MZ_SPI5 */ + +#ifdef CONFIG_PIC32MZ_SPI6 +void pic32mz_spi6select(FAR struct spi_dev_s *dev, uint32_t devid, + bool selected) +{ + spiinfo("devid: %d CS: %s\n", (int)devid, + selected ? "assert" : "de-assert"); +#warning "Missing logic" +} + +uint8_t pic32mz_spi6status(FAR struct spi_dev_s *dev, uint32_t devid) +{ + spiinfo("Returning nothing\n"); +#warning "Missing logic" + return 0; +} + +#ifdef CONFIG_SPI_CMDDATA +int pic32mz_spi6cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) +{ +#warning "Missing logic" + return 0; +} +#endif +#endif /* CONFIG_PIC32MZ_SPI6 */ + +/**************************************************************************** + * Name: pic32mz_spi1/2/...register + * + * Description: + * If the board supports a card detect callback to inform the SPI-based + * MMC/SD driver when an SD card is inserted or removed, then + * CONFIG_SPI_CALLBACK should be defined and the following function(s) + * must be implemented. These functions implements the registercallback + * method of the SPI interface (see include/nuttx/spi/spi.h for details) + * + * Input Parameters: + * dev - Device-specific state data + * callback - The function to call on the media change + * arg - A caller provided value to return with the callback + * + * Returned Value: + * 0 on success; negated errno on failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_CALLBACK +#ifdef CONFIG_PIC32MZ_SPI1 +int pic32mz_spi1register(FAR struct spi_dev_s *dev, + spi_mediachange_t callback, FAR void *arg) +{ +#warning Missing logic + return -ENOSYS; +} +#endif /* CONFIG_PIC32MZ_SPI1 */ + +#ifdef CONFIG_PIC32MZ_SPI2 +int pic32mz_spi2register(FAR struct spi_dev_s *dev, + spi_mediachange_t callback, FAR void *arg) +{ +#warning Missing logic + return -ENOSYS; +} +#endif /* CONFIG_PIC32MZ_SPI2 */ + +#ifdef CONFIG_PIC32MZ_SPI3 +int pic32mz_spi3register(FAR struct spi_dev_s *dev, + spi_mediachange_t callback, FAR void *arg) +{ +#warning Missing logic + return -ENOSYS; +} +#endif /* CONFIG_PIC32MZ_SPI3 */ + +#ifdef CONFIG_PIC32MZ_SPI4 +int pic32mz_spi4register(FAR struct spi_dev_s *dev, + spi_mediachange_t callback, FAR void *arg) +{ +#warning Missing logic + return -ENOSYS; +} +#endif /* CONFIG_PIC32MZ_SPI4 */ + +#ifdef CONFIG_PIC32MZ_SPI5 +int pic32mz_spi5register(FAR struct spi_dev_s *dev, + spi_mediachange_t callback, FAR void *arg) +{ +#warning Missing logic + return -ENOSYS; +} +#endif /* CONFIG_PIC32MZ_SPI5 */ + +#ifdef CONFIG_PIC32MZ_SPI6 +int pic32mz_spi6register(FAR struct spi_dev_s *dev, + spi_mediachange_t callback, FAR void *arg) +{ +#warning Missing logic + return -ENOSYS; +} +#endif /* CONFIG_PIC32MZ_SPI6 */ +#endif /* CONFIG_SPI_CALLBACK */ + +#endif /* CONFIG_PIC32MZ_SPI */ diff --git a/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_userleds.c b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_userleds.c new file mode 100644 index 00000000000..c9d78ff0d80 --- /dev/null +++ b/boards/mips/pic32mz/chipkit-wifire/src/pic32mz_userleds.c @@ -0,0 +1,126 @@ +/**************************************************************************** + * boards/mips/pic32mz/chipkit-wifire/src/pic32mz_userleds.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* There are four LEDs on the top side of the board: + * + * LED LD1 - RG6 + * LED LD2 - RD4 + * LED LD3 - RB11 + * LED LD4 - RG15 + * + * A high output value illuminates the LEDs. + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "mips_arch.h" +#include "mips_internal.h" + +#include "pic32mz_gpio.h" +#include "chipkit-wifire.h" + +#ifndef CONFIG_ARCH_LEDS + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_userled_initialize + ****************************************************************************/ + +uint32_t board_userled_initialize(void) +{ +#ifndef CONFIG_ARCH_LEDS + /* Configure LED GPIOs for output */ + + pic32mz_configgpio(GPIO_LED_LD1); + pic32mz_configgpio(GPIO_LED_LD2); + pic32mz_configgpio(GPIO_LED_LD3); + pic32mz_configgpio(GPIO_LED_LD4); +#endif + return BOARD_NLEDS; +} + +/**************************************************************************** + * Name: board_userled + ****************************************************************************/ + +void board_userled(int led, bool ledon) +{ + uint32_t ledcfg; + + switch (led) + { + case BOARD_LED_LD1: + ledcfg = GPIO_LED_LD1; + break; + + case BOARD_LED_LD2: + ledcfg = GPIO_LED_LD2; + break; + + case BOARD_LED_LD3: + ledcfg = GPIO_LED_LD3; + break; + + case BOARD_LED_LD4: + ledcfg = GPIO_LED_LD4; + break; + + default: + return; + } + + pic32mz_gpiowrite(ledcfg, ledon); +} + +/**************************************************************************** + * Name: board_userled_all + ****************************************************************************/ + +void board_userled_all(uint32_t ledset) +{ + bool ledon; + + ledon = ((ledset & BOARD_LED_LD1_BIT) != 0); + pic32mz_gpiowrite(GPIO_LED_LD1, ledon); + + ledon = ((ledset & BOARD_LED_LD2_BIT) != 0); + pic32mz_gpiowrite(GPIO_LED_LD2, ledon); + + ledon = ((ledset & BOARD_LED_LD3_BIT) != 0); + pic32mz_gpiowrite(GPIO_LED_LD3, ledon); + + ledon = ((ledset & BOARD_LED_LD4_BIT) != 0); + pic32mz_gpiowrite(GPIO_LED_LD4, ledon); +} + +#endif /* !CONFIG_ARCH_LEDS */ diff --git a/boards/misoc/lm32/misoc/include/board.h b/boards/misoc/lm32/misoc/include/board.h index 44d60ecee7a..c9d5fdb5eab 100644 --- a/boards/misoc/lm32/misoc/include/board.h +++ b/boards/misoc/lm32/misoc/include/board.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/misoc/lm32/misoc/include/board.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Ramtin Amin + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/misoc/lm32/misoc/scripts/Make.defs b/boards/misoc/lm32/misoc/scripts/Make.defs index 87fe4a89f35..bcdb9bcc8fd 100644 --- a/boards/misoc/lm32/misoc/scripts/Make.defs +++ b/boards/misoc/lm32/misoc/scripts/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # boards/misoc/lm32/misoc/scripts/Make.defs # -# Copyright (C) 2016, 2017 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Ramtin Amin +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -71,6 +55,6 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 diff --git a/boards/misoc/lm32/misoc/src/Makefile b/boards/misoc/lm32/misoc/src/Makefile index 7581d074a3a..d7d0dfa0dc1 100644 --- a/boards/misoc/lm32/misoc/src/Makefile +++ b/boards/misoc/lm32/misoc/src/Makefile @@ -1,36 +1,20 @@ ############################################################################ # boards/misoc/lm32/misoc/src/Makefile # -# Copyright (C) 2016 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Ramtin Amin +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/misoc/lm32/misoc/src/lm32_boot.c b/boards/misoc/lm32/misoc/src/lm32_boot.c index 589171373a4..2da57c7bcf0 100644 --- a/boards/misoc/lm32/misoc/src/lm32_boot.c +++ b/boards/misoc/lm32/misoc/src/lm32_boot.c @@ -1,36 +1,20 @@ /**************************************************************************** * boards/misoc/lm32/misoc/src/lm32_boot.c * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Ramtin Amin + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/misoc/lm32/misoc/src/misoc.h b/boards/misoc/lm32/misoc/src/misoc.h index 5992b54e12a..e275f441ee5 100644 --- a/boards/misoc/lm32/misoc/src/misoc.h +++ b/boards/misoc/lm32/misoc/src/misoc.h @@ -1,36 +1,20 @@ /**************************************************************************** * boards/misoc/lm32/misoc/src/misoc.h * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Ramtin Amin + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/or1k/mor1kx/or1k/scripts/Make.defs b/boards/or1k/mor1kx/or1k/scripts/Make.defs index 23c15c15881..5b025bf56f7 100644 --- a/boards/or1k/mor1kx/or1k/scripts/Make.defs +++ b/boards/or1k/mor1kx/or1k/scripts/Make.defs @@ -1,35 +1,20 @@ ############################################################################ # boards/or1k/mor1kx/or1k/scripts/Make.defs # -# Copyright (C) 2018 Gregory Nutt. All rights reserved. -# Author: Matt Thompson +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ @@ -66,13 +51,10 @@ CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) AFLAGS := $(CFLAGS) -D__ASSEMBLY__ -NXFLATLDFLAGS1 = -r -Wl,-d -Wl,-warn-common -NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -Wl,-no-check-sections +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections LDNXFLATFLAGS = -e main -s 2048 -ifneq ($(CROSSDEV),or1k-nuttx-elf-) - LDFLAGS += -nostartfiles -nodefaultlibs -endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) LDFLAGS += -g endif diff --git a/boards/renesas/rx65n/rx65n-grrose/scripts/Make.defs b/boards/renesas/rx65n/rx65n-grrose/scripts/Make.defs index 5f0a420a3d6..011de395597 100644 --- a/boards/renesas/rx65n/rx65n-grrose/scripts/Make.defs +++ b/boards/renesas/rx65n/rx65n-grrose/scripts/Make.defs @@ -1,35 +1,20 @@ ############################################################################## # boards/renesas/rx65n/rx65n-grrose/scripts/Make.defs # -# Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. -# Author: Anjana +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################## diff --git a/boards/renesas/rx65n/rx65n-rsk1mb/scripts/Make.defs b/boards/renesas/rx65n/rx65n-rsk1mb/scripts/Make.defs index 20ed7e07033..ce01c4e1241 100644 --- a/boards/renesas/rx65n/rx65n-rsk1mb/scripts/Make.defs +++ b/boards/renesas/rx65n/rx65n-rsk1mb/scripts/Make.defs @@ -1,35 +1,20 @@ ############################################################################## # boards/renesas/rx65n/rx65n-rsk1mb/scripts/Make.defs # -# Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. -# Author: Anjana +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################## diff --git a/boards/renesas/rx65n/rx65n-rsk1mb/src/Makefile b/boards/renesas/rx65n/rx65n-rsk1mb/src/Makefile index 0446b571813..dedf0a6d745 100644 --- a/boards/renesas/rx65n/rx65n-rsk1mb/src/Makefile +++ b/boards/renesas/rx65n/rx65n-rsk1mb/src/Makefile @@ -1,35 +1,20 @@ ############################################################################ # boards/renesas/rx65n/rx65n-rsk1mb/src/Makefile # -# Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. -# Author: Anjana +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c b/boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c index d87f33f6fca..f030932ef65 100644 --- a/boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c +++ b/boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/renesas/rx65n/rx65n-rsk1mb/src/rx65n_main.c * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/renesas/rx65n/rx65n-rsk2mb/scripts/Make.defs b/boards/renesas/rx65n/rx65n-rsk2mb/scripts/Make.defs index 16050e6d76e..d40dc2a50a8 100644 --- a/boards/renesas/rx65n/rx65n-rsk2mb/scripts/Make.defs +++ b/boards/renesas/rx65n/rx65n-rsk2mb/scripts/Make.defs @@ -1,35 +1,20 @@ ############################################################################## # boards/renesas/rx65n/rx65n-rsk2mb/scripts/Make.defs # -# Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. -# Author: Anjana +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################## diff --git a/boards/renesas/rx65n/rx65n/include/board.h b/boards/renesas/rx65n/rx65n/include/board.h index 738b0092715..509cfa95b9a 100644 --- a/boards/renesas/rx65n/rx65n/include/board.h +++ b/boards/renesas/rx65n/rx65n/include/board.h @@ -1,35 +1,20 @@ /**************************************************************************** * boards/renesas/rx65n/rx65n/include/board.h * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/renesas/rx65n/rx65n/scripts/Make.defs b/boards/renesas/rx65n/rx65n/scripts/Make.defs index ac2bbe4db4e..6df3b2e66a1 100644 --- a/boards/renesas/rx65n/rx65n/scripts/Make.defs +++ b/boards/renesas/rx65n/rx65n/scripts/Make.defs @@ -1,35 +1,20 @@ ############################################################################## # boards/renesas/rx65n/rx65n/scripts/Make.defs # -# Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. -# Author: Anjana +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################## diff --git a/boards/renesas/rx65n/rx65n/src/Makefile b/boards/renesas/rx65n/rx65n/src/Makefile index 91e9bf3b2d8..11d71b02cc1 100644 --- a/boards/renesas/rx65n/rx65n/src/Makefile +++ b/boards/renesas/rx65n/rx65n/src/Makefile @@ -1,35 +1,20 @@ ############################################################################ # boards/renesas/rx65n/rx65n/src/Makefile # -# Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. -# Author: Anjana +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/boards/renesas/rx65n/rx65n/src/rx65n_main.c b/boards/renesas/rx65n/rx65n/src/rx65n_main.c index daa6ad56495..699a8a00c4e 100644 --- a/boards/renesas/rx65n/rx65n/src/rx65n_main.c +++ b/boards/renesas/rx65n/rx65n/src/rx65n_main.c @@ -1,35 +1,20 @@ /**************************************************************************** * boards/renesas/rx65n/rx65n/src/rx65n_main.c * - * Copyright (C) 2008-2019 Gregory Nutt. All rights reserved. - * Author: Anjana + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/boards/risc-v/bl602/bl602evb/README.txt b/boards/risc-v/bl602/bl602evb/README.txt deleted file mode 100644 index 427c8e34e03..00000000000 --- a/boards/risc-v/bl602/bl602evb/README.txt +++ /dev/null @@ -1,197 +0,0 @@ -# Getting Started with nsh configuration -1. Download and install toolchain - - $ curl https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz - -2. Download flash tools - There are multiple tools that can be used, but option (a) is recommended. - a. blflash -- cross platform open-source (recommended) - curl -L -o blflash https://github.com/spacemeowx2/blflash/releases/download/v0.3.0/blflash-linux-amd64 - chmod +x ./blflash - - b. Bouffalo Lab flash tools (official) - https://github.com/bouffalolab/flash_tools.git - -3. Configure and build NuttX - - $ mkdir ./nuttx; cd ./nuttx - $ git clone https://github.com/apache/incubator-nuttx.git nuttx - $ git clone https://github.com/apache/incubator-nuttx-apps.git apps - $ cd nuttx - $ make distclean - $ ./tools/configure.sh bl602evb:nsh - $ make -j - -4. Connect bl602 and computer via USB - -5. Flash - Use option (a) or (b) based on tool selection in section 2. - a. Using blflash - Place the board in bootloader mode - bl602evb: Jumper IO8 to HI and press reset - DT-BL10: Press and hold D8, press and release EN, release D8 - - $ blflash flash nuttx.bin --port /dev/ttyUSB0 - [INFO blflash::flasher] Start connection... - [TRACE blflash::flasher] 5ms send count 55 - [TRACE blflash::flasher] handshake sent elapsed 159.674µs - [INFO blflash::flasher] Connection Succeed - [INFO blflash] Bootrom version: 1 - [TRACE blflash] Boot info: BootInfo { len: 14, bootrom_version: 1, otp_info: [0, 0, 0, 0, 3, 0, 0, 0, a4, 9b, 2, 42, e8, b4, 1d, 0] } - [INFO blflash::flasher] Sending eflash_loader... - [INFO blflash::flasher] Finished 2.563450723s 11.15KB/s - [TRACE blflash::flasher] 5ms send count 500 - [TRACE blflash::flasher] handshake sent elapsed 5.065786ms - [INFO blflash::flasher] Entered eflash_loader - [INFO blflash::flasher] Skip segment addr: 0 size: 47504 sha256 matches - [INFO blflash::flasher] Skip segment addr: e000 size: 272 sha256 matches - [INFO blflash::flasher] Skip segment addr: f000 size: 272 sha256 matches - [INFO blflash::flasher] Skip segment addr: 10000 size: 351584 sha256 matches - [INFO blflash::flasher] Skip segment addr: 1f8000 size: 5671 sha256 matches - [INFO blflash] Success - - b Using BL flash_tools - Run flash tools, select the nuttx.bin generated in the previous step in the - Firmware bin field, and refer to the document for the settings of the remaining fields. - -6. Run connect terminal to UART (default baudrate 2000000) - $ screen /dev/ttyUSB0 2000000 -7. Reset Device - bl602evb: Press reset - DT-BL10: Press and release EN -8. NSH should appear on console - - -# Using openocd and gdb: -This guide is focused on the bl602evb board. See the reference manual for -how to connect to the JTAG interface for other boards. - -1. Make sure you are running a recently built version of openocd. The packaged -versions are very old, and will likely not work. https://github.com/ntfreak/openocd - - -2. Create a openocd-bl602.cfg file -############################################################################## -adapter driver ftdi -ftdi_vid_pid 0x0403 0x6010 -ftdi_channel 1 - -transport select jtag -adapter speed 2000 - -ftdi_layout_init 0x00f8 0x00fb -set _CHIPNAME riscv -jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000c05 - -set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME -$_TARGETNAME.0 configure -work-area-phys 0x22020000 -work-area-size 0x10000 -work-area-backup 1 - -echo "Ready for Remote Connections" - -$_TARGETNAME.0 configure -event reset-assert-pre { - echo "reset-assert-pre" - adapter speed 100 -} - -$_TARGETNAME.0 configure -event reset-deassert-post { - echo "reset-deassert-post" - adapter speed 4000 - reg mstatus 0x80000000 - reg pc 0x21000000 -} - -$_TARGETNAME.0 configure -event reset-init { - echo "reset-init" - adapter speed 4000 -} - -gdb_memory_map enable -gdb_flash_program disable - -riscv set_prefer_sba on -riscv set_command_timeout_sec 1 - -init -reset init -############################################################################## - -3. Create a openocd.gdb configuration -############################################################################## -target extended-remote :3333 - -set print asm-demangle on -set backtrace limit 32 - -mem 0x22008000 0x22014000 rw -mem 0x42008000 0x42014000 rw -mem 0x22014000 0x22020000 rw -mem 0x42014000 0x42020000 rw -mem 0x22020000 0x22030000 rw -mem 0x42020000 0x42030000 rw -mem 0x22030000 0x2204C000 rw -mem 0x42030000 0x4204C000 rw -mem 0x23000000 0x23400000 ro -mem 0x40000000 0x40010000 rw - -break __start -stepi - -############################################################################## - -3. Connect openocd -$ openocd -f openocd-bl602.cfg -Open On-Chip Debugger 0.10.0+dev-01514-ga8edbd020-dirty (2020-11-19-20:11) -Licensed under GNU GPL v2 -For bug reports, read - http://openocd.org/doc/doxygen/bugs.html -Ready for Remote Connections -Info : clock speed 2000 kHz -Info : JTAG tap: riscv.cpu tap/device found: 0x20000c05 (mfg: 0x602 (), part: 0x0000, ver: 0x2) -Info : datacount=1 progbufsize=2 -Info : Disabling abstract command reads from CSRs. -Info : Examined RISC-V core; found 1 harts -Info : hart 0: XLEN=32, misa=0x40801125 -Info : starting gdb server for riscv.cpu.0 on 3333 -Info : Listening on port 3333 for gdb connections -Info : JTAG tap: riscv.cpu tap/device found: 0x20000c05 (mfg: 0x602 (), part: 0x0000, ver: 0x2) -reset-assert-pre -reset-deassert-post -Info : Disabling abstract command writes to CSRs. -reset-init -Info : Listening on port 6666 for tcl connections -Info : Listening on port 4444 for telnet connections - -4. Connect gdb - This is a short demo placing a breakpoint at the entry to nsh. - NOTE: openocd+gdb cannot be used at this time to flash the device. - - $ riscv64-unknown-elf-gdb nuttx -x openocd-bl602.gdb - Reading symbols from nuttx... - 0x21000000 in ?? () - Breakpoint 1 at 0x2300000a: file chip/bl602_entry.S, line 41. - Note: automatically using hardware breakpoints for read-only addresses. - 0x21000004 in ?? () - (gdb) b nsh_main - Breakpoint 2 at 0x23003f32: file nsh_main.c, line 123. - (gdb) mon reset halt - JTAG tap: riscv.cpu tap/device found: 0x20000c05 (mfg: 0x602 (), part: 0x0000, ver: 0x2) - reset-assert-pre - reset-deassert-post - (gdb) c - Continuing. - - Breakpoint 1, bl602_start () at chip/bl602_entry.S:41 - 41 li t0, MSTATUS_MIE - (gdb) c - Continuing. - - Breakpoint 2, nsh_main (argc=1, argc@entry=, argv=0x420134c0, argv@entry=) - at nsh_main.c:123 - 123 sched_getparam(0, ¶m); - (gdb) bt - #0 nsh_main (argc=1, argc@entry=, argv=0x420134c0, argv@entry=) at nsh_main.c:123 - #1 0x230030f0 in nxtask_startup (entrypt=, argc=, argv=) at sched/task_startup.c:165 - #2 0x23001362 in nxtask_start () at task/task_start.c:144 - #3 0x00000000 in ?? () - Backtrace stopped: frame did not save the PC \ No newline at end of file diff --git a/boards/risc-v/bl602/bl602evb/configs/ble/defconfig b/boards/risc-v/bl602/bl602evb/configs/ble/defconfig deleted file mode 100644 index 838e7c9ef48..00000000000 --- a/boards/risc-v/bl602/bl602evb/configs/ble/defconfig +++ /dev/null @@ -1,111 +0,0 @@ -# -# This file is autogenerated: PLEASE DO NOT EDIT IT. -# -# You can use "make menuconfig" to make any modifications to the installed .config file. -# You can then do "make savedefconfig" to generate a new defconfig file that includes your -# modifications. -# -# CONFIG_DISABLE_POSIX_TIMERS is not set -# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set -# CONFIG_NSH_DISABLEBG is not set -# CONFIG_NSH_DISABLE_LOSMART is not set -# CONFIG_NSH_DISABLE_UNAME is not set -CONFIG_ARCH="risc-v" -CONFIG_ARCH_BOARD="bl602evb" -CONFIG_ARCH_BOARD_BL602EVB=y -CONFIG_ARCH_CHIP="bl602" -CONFIG_ARCH_CHIP_BL602=y -CONFIG_ARCH_INTERRUPTSTACK=8192 -CONFIG_ARCH_RISCV=y -CONFIG_ARCH_STACKDUMP=y -CONFIG_BINFMT_DISABLE=y -CONFIG_BL602_BLE_CONTROLLER=y -CONFIG_BL602_HAVE_UART0=y -CONFIG_BL602_WIRELESS=y -CONFIG_BOARD_LOOPSPERMSEC=10000 -CONFIG_BUILTIN=y -CONFIG_DEBUG_FEATURES=y -CONFIG_DEBUG_FULLOPT=y -CONFIG_DEBUG_SYMBOLS=y -CONFIG_DEFAULT_SMALL=y -CONFIG_DEV_ZERO=y -CONFIG_DRIVERS_BLUETOOTH=y -CONFIG_DRIVERS_IEEE80211=y -CONFIG_DRIVERS_WIRELESS=y -CONFIG_EXAMPLES_DHCPD=y -CONFIG_EXAMPLES_NETTEST=y -CONFIG_EXAMPLES_NETTEST_DEVNAME="wlan0" -CONFIG_EXAMPLES_NETTEST_PERFORMANCE=y -CONFIG_EXAMPLES_TCPBLASTER=y -CONFIG_EXAMPLES_TCPBLASTER_DEVNAME="wlan0" -CONFIG_EXAMPLES_TCPBLASTER_SERVERIP=0xc0a85802 -CONFIG_FS_PROCFS=y -CONFIG_IDLETHREAD_STACKSIZE=8192 -CONFIG_INTELHEX_BINARY=y -CONFIG_LIBC_PERROR_STDOUT=y -CONFIG_LIBC_STRERROR=y -CONFIG_MQ_MAXMSGSIZE=1024 -CONFIG_NET=y -CONFIG_NETDB_DNSCLIENT=y -CONFIG_NETDEV_PHY_IOCTL=y -CONFIG_NETDEV_WIRELESS_IOCTL=y -CONFIG_NETINIT_NETLOCAL=y -CONFIG_NETINIT_WAPI_PASSPHRASE="bouffalolab2016" -CONFIG_NETINIT_WAPI_SSID="bouffalolab" -CONFIG_NETUTILS_DHCPD=y -CONFIG_NET_ARP_IPIN=y -CONFIG_NET_ARP_SEND=y -CONFIG_NET_BROADCAST=y -CONFIG_NET_ICMP=y -CONFIG_NET_ICMP_SOCKET=y -CONFIG_NET_TCP=y -CONFIG_NET_TCP_DELAYED_ACK=y -CONFIG_NET_TCP_KEEPALIVE=y -CONFIG_NET_UDP=y -CONFIG_NSH_ARCHINIT=y -CONFIG_NSH_BUILTIN_APPS=y -CONFIG_NSH_DISABLE_CD=y -CONFIG_NSH_DISABLE_CP=y -CONFIG_NSH_DISABLE_MKDIR=y -CONFIG_NSH_DISABLE_RM=y -CONFIG_NSH_DISABLE_RMDIR=y -CONFIG_NSH_DISABLE_UMOUNT=y -CONFIG_NSH_FILEIOSIZE=64 -CONFIG_NSH_STRERROR=y -CONFIG_PREALLOC_TIMERS=0 -CONFIG_PSEUDOTERM=y -CONFIG_PTHREAD_MUTEX_TYPES=y -CONFIG_PTHREAD_STACK_DEFAULT=8192 -CONFIG_RAM_SIZE=134217728 -CONFIG_RAM_START=0xc0800000 -CONFIG_RAW_BINARY=y -CONFIG_READLINE_CMD_HISTORY=y -CONFIG_RR_INTERVAL=200 -CONFIG_RV32IM_CUSTOM_IRQ_SUPPORT=y -CONFIG_SCHED_HPWORK=y -CONFIG_SCHED_LPWORK=y -CONFIG_SCHED_WAITPID=y -CONFIG_SIG_EVTHREAD=y -CONFIG_SPINLOCK=y -CONFIG_STACK_COLORATION=y -CONFIG_START_DAY=20 -CONFIG_START_MONTH=3 -CONFIG_START_YEAR=2020 -CONFIG_STDIO_DISABLE_BUFFERING=y -CONFIG_SYSTEM_DHCPC_RENEW=y -CONFIG_SYSTEM_NSH=y -CONFIG_SYSTEM_PING=y -CONFIG_TASK_NAME_SIZE=12 -CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=8192 -CONFIG_TESTING_MM=y -CONFIG_TESTING_OSTEST=y -CONFIG_TESTING_OSTEST_FPUSIZE=132 -CONFIG_UART0_BAUD=2000000 -CONFIG_UART0_RXBUFSIZE=128 -CONFIG_UART0_SERIAL_CONSOLE=y -CONFIG_UART0_TXBUFSIZE=128 -CONFIG_UART_BTH4=y -CONFIG_USERMAIN_STACKSIZE=8192 -CONFIG_USER_ENTRYPOINT="nsh_main" -CONFIG_WIRELESS_WAPI=y -CONFIG_WIRELESS_WAPI_CMDTOOL=y diff --git a/boards/risc-v/c906/smartl-c906/kernel/c906_userspace.c b/boards/risc-v/c906/smartl-c906/kernel/c906_userspace.c index bb757032877..b6bed552d66 100644 --- a/boards/risc-v/c906/smartl-c906/kernel/c906_userspace.c +++ b/boards/risc-v/c906/smartl-c906/kernel/c906_userspace.c @@ -77,7 +77,7 @@ extern uintptr_t *__ld_usram_end; /* End+1 of user ram section */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig b/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig index afe5a2a433a..4fb1a559e08 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig +++ b/boards/risc-v/esp32c3/esp32c3-devkit/Kconfig @@ -40,7 +40,15 @@ endif # PM config ESP32C3_DEVKIT_RUN_IRAM bool "Run from IRAM" default n + +config ESP32C3_MERGE_BINS + bool "Merge raw binary files into a single file" + default n ---help--- + Merge the raw binary files into a single file for flashing to the + device. + This is only useful when the path to binary files (e.g. bootloader) + is provided via the ESPTOOL_BINDIR variable. choice prompt "SPIFLASH File System" @@ -86,4 +94,16 @@ config ESP32C3_SPIFLASH_TEST_ADDRESS ---help--- SPI Flash encryption test read/write address. +if LCD_ST7735 || LCD_ST7789 || LCD_GC9A01 + +config ESP32C3_LCD_RSTPIN + int "LCD reset pin" + default 9 + +config ESP32C3_LCD_BLPIN + int "LCD backlight pin" + default 18 + +endif # LCD_ST7735 || LCD_ST7789 || LCD_GC9A01 + endif # ARCH_BOARD_ESP32C3_DEVKIT diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/lvgl/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/lvgl/defconfig new file mode 100644 index 00000000000..aea56fc1bdf --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-devkit/configs/lvgl/defconfig @@ -0,0 +1,58 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="esp32c3-devkit" +CONFIG_ARCH_BOARD_ESP32C3_DEVKIT=y +CONFIG_ARCH_CHIP="esp32c3" +CONFIG_ARCH_CHIP_ESP32C3=y +CONFIG_ARCH_CHIP_ESP32C3WROOM02=y +CONFIG_ARCH_INTERRUPTSTACK=1536 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=15000 +CONFIG_BUILTIN=y +CONFIG_DEV_ZERO=y +CONFIG_ESP32C3_SPI2=y +CONFIG_ESP32C3_SPI_SWCS=y +CONFIG_EXAMPLES_LVGLDEMO=y +CONFIG_EXAMPLES_LVGLDEMO_WIDGETS_SLIDESHOW=y +CONFIG_FS_PROCFS=y +CONFIG_GRAPHICS_LVGL=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INTELHEX_BINARY=y +CONFIG_LCD=y +CONFIG_LCD_DEV=y +CONFIG_LCD_GC9A01=y +CONFIG_LCD_NOGETRUN=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_LV_COLOR_16_SWAP=y +CONFIG_LV_DPI=125 +CONFIG_LV_HOR_RES=240 +CONFIG_MQ_MAXMSGSIZE=64 +CONFIG_NFILE_DESCRIPTORS_PER_BLOCK=6 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_READLINE=y +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_MQ_MSGS=16 +CONFIG_PREALLOC_TIMERS=0 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SPI_CMDDATA=y +CONFIG_START_DAY=29 +CONFIG_START_MONTH=11 +CONFIG_START_YEAR=2019 +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/sta_softap/defconfig b/boards/risc-v/esp32c3/esp32c3-devkit/configs/sta_softap/defconfig index 86d4bb9237b..103aee378d7 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/configs/sta_softap/defconfig +++ b/boards/risc-v/esp32c3/esp32c3-devkit/configs/sta_softap/defconfig @@ -8,6 +8,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="risc-v" CONFIG_ARCH_BOARD="esp32c3-devkit" CONFIG_ARCH_BOARD_ESP32C3_DEVKIT=y diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/scripts/Make.defs b/boards/risc-v/esp32c3/esp32c3-devkit/scripts/Make.defs index a40663c3f66..444987499c9 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/scripts/Make.defs +++ b/boards/risc-v/esp32c3/esp32c3-devkit/scripts/Make.defs @@ -83,8 +83,6 @@ else LDELFFLAGS += -T $(TOPDIR)$(DELIM)binfmt$(DELIM)libelf$(DELIM)gnu-elf.ld endif -LDFLAGS += -nostartfiles -nodefaultlibs - ifeq ($(CONFIG_CYGWIN_WINTOOL),y) LDFLAGS += -Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" --cref else diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile b/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile index a9921e84480..f46c6cb9973 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/Makefile @@ -38,6 +38,10 @@ ifeq ($(CONFIG_ESP32C3_SPIFLASH),y) CSRCS += esp32c3_spiflash.c endif +ifeq ($(CONFIG_ESP32C3_WIRELESS),y) +CSRCS += esp32c3_board_wlan.c +endif + ifeq ($(CONFIG_DEV_GPIO),y) CSRCS += esp32c3_gpio.c endif @@ -78,6 +82,18 @@ ifeq ($(CONFIG_ADC),y) CSRCS += esp32c3_adc.c endif +ifeq ($(CONFIG_LCD_ST7735),y) +CSRCS += esp32c3_st7735.c +endif + +ifeq ($(CONFIG_LCD_ST7789),y) +CSRCS += esp32c3_st7789.c +endif + +ifeq ($(CONFIG_LCD_GC9A01),y) +CSRCS += esp32c3_gc9a01.c +endif + ifeq ($(CONFIG_BOARDCTL_IOCTL),y) CSRCS += esp32c3_ioctl.c endif diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3-devkit.h b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3-devkit.h index 0d5f4e73c08..baa8835d574 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3-devkit.h +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3-devkit.h @@ -188,6 +188,22 @@ int board_oneshot_init(int timer, uint16_t resolution); int board_bmp180_initialize(int devno, int busno); #endif +/**************************************************************************** + * Name: board_wlan_init + * + * Description: + * Configure the wireless subsystem. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ESP32C3_WIRELESS +int board_wlan_init(void); +#endif + /**************************************************************************** * Name: esp32c3_spiflash_init * diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_board_spi.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_board_spi.c index ce1a2ade591..a5c336da311 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_board_spi.c +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_board_spi.c @@ -30,6 +30,8 @@ #include +#include "esp32c3_gpio.h" + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -61,6 +63,20 @@ uint8_t esp32c3_spi2_status(FAR struct spi_dev_s *dev, uint32_t devid) int esp32c3_spi2_cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd) { +#if defined(CONFIG_LCD_ST7735) || defined(CONFIG_LCD_ST7789) || \ + defined(CONFIG_LCD_GC9A01) + if (devid == SPIDEV_DISPLAY(0)) + { + /* This is the Data/Command control pad which determines whether the + * data bits are data or a command. + */ + + esp32c3_gpiowrite(CONFIG_ESP32C3_SPI2_MISOPIN, !cmd); + + return OK; + } + +#endif spiinfo("devid: %" PRIu32 " CMD: %s\n", devid, cmd ? "command" : "data"); diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_board_wlan.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_board_wlan.c new file mode 100644 index 00000000000..2c357098203 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_board_wlan.c @@ -0,0 +1,81 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_board_wlan.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include + +#include "esp32c3_spiflash.h" +#include "esp32c3_wlan.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_wlan_init + * + * Description: + * Configure the wireless subsystem. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int board_wlan_init(void) +{ + int ret = OK; + +#ifdef CONFIG_NET +#ifdef ESP32C3_WLAN_HAS_STA + ret = esp32c3_wlan_sta_initialize(); + if (ret) + { + wlerr("ERROR: Failed to initialize Wi-Fi station\n"); + return ret; + } +#endif + +#ifdef ESP32C3_WLAN_HAS_SOFTAP + ret = esp32c3_wlan_softap_initialize(); + if (ret) + { + wlerr("ERROR: Failed to initialize Wi-Fi softAP\n"); + return ret; + } +#endif +#endif + + return ret; +} + diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c index 606946e7839..692a44d573a 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_bringup.c @@ -46,6 +46,15 @@ # include "esp32c3_spi.h" #endif +#ifdef CONFIG_LCD_DEV +# include +# include +#endif + +#ifdef CONFIG_VIDEO_FB +# include +#endif + #ifdef CONFIG_ESP32C3_RT_TIMER # include "esp32c3_rt_timer.h" #endif @@ -75,60 +84,23 @@ * Pre-processor Definitions ****************************************************************************/ +#define ESP32C3_MTD_OFFSET CONFIG_ESP32C3_MTD_OFFSET +#define ESP32C3_MTD_SIZE CONFIG_ESP32C3_MTD_SIZE + /**************************************************************************** * Public Functions ****************************************************************************/ -/**************************************************************************** - * Name: esp32c3_init_wifi_storage - * - * Description: - * Initialization of saved Wi-Fi parameters - * - ****************************************************************************/ - -#ifdef CONFIG_ESP32C3_WIFI_SAVE_PARAM -static int esp32c3_init_wifi_storage(void) -{ - int ret; - const char *path = "/dev/mtdblock1"; - FAR struct mtd_dev_s *mtd_part; - - mtd_part = esp32c3_spiflash_alloc_mtdpart(); - if (!mtd_part) - { - syslog(LOG_ERR, "ERROR: Failed to alloc MTD partition of SPI Flash\n"); - return -1; - } - - ret = register_mtddriver(path, mtd_part, 0777, NULL); - if (ret < 0) - { - syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret); - return -1; - } - - ret = nx_mount(path, CONFIG_ESP32C3_WIFI_FS_MOUNTPT, "spiffs", 0, NULL); - if (ret < 0) - { - syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", ret); - return ret; - } - - return 0; -} -#endif - /**************************************************************************** * Name: esp32c3_bringup * * Description: * Perform architecture-specific initialization * - * CONFIG_BOARD_LATE_INITIALIZE=y : + * CONFIG_BOARD_LATE_INITIALIZE=y * Called from board_late_initialize(). * - * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y : + * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y * Called from the NSH library * ****************************************************************************/ @@ -185,7 +157,6 @@ int esp32c3_bringup(void) if (ret) { syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n"); - return ret; } #endif @@ -195,7 +166,6 @@ int esp32c3_bringup(void) { syslog(LOG_ERR, "ERROR: Failed to initialize partition error=%d\n", ret); - return ret; } #endif @@ -204,7 +174,6 @@ int esp32c3_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret); - return ret; } #endif @@ -226,6 +195,28 @@ int esp32c3_bringup(void) } #endif +#ifdef CONFIG_VIDEO_FB + ret = fb_register(0, 0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize Frame Buffer Driver.\n"); + } +#elif defined(CONFIG_LCD) + ret = board_lcd_initialize(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize LCD.\n"); + } +#endif + +#ifdef CONFIG_LCD_DEV + ret = lcddev_register(0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: lcddev_register() failed: %d\n", ret); + } +#endif + #if defined(CONFIG_I2C_DRIVER) /* Configure I2C peripheral interfaces */ @@ -246,7 +237,6 @@ int esp32c3_bringup(void) { syslog(LOG_ERR, "Failed to initialize BMP180 " "Driver for I2C0: %d\n", ret); - return ret; } #endif @@ -307,7 +297,6 @@ int esp32c3_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize RT timer: %d\n", ret); - return ret; } #endif @@ -318,7 +307,6 @@ int esp32c3_bringup(void) if (ret) { syslog(LOG_ERR, "ERROR: Failed to initialize Wi-Fi and BT coexist\n"); - return ret; } #endif @@ -327,40 +315,16 @@ int esp32c3_bringup(void) if (ret) { syslog(LOG_ERR, "ERROR: Failed to initialize BLE\n"); - return ret; } #endif #ifdef CONFIG_ESP32C3_WIFI -#ifdef CONFIG_ESP32C3_WIFI_SAVE_PARAM - ret = esp32c3_init_wifi_storage(); - if (ret) + ret = board_wlan_init(); + if (ret < 0) { - syslog(LOG_ERR, "ERROR: Failed to initialize Wi-Fi storage\n"); - return ret; + syslog(LOG_ERR, "ERROR: board_wlan_init() failed: %d\n", ret); } -#endif - -#ifdef CONFIG_NET -#ifdef ESP32C3_WLAN_HAS_STA - ret = esp32c3_wlan_sta_initialize(); - if (ret) - { - syslog(LOG_ERR, "ERROR: Failed to initialize Wi-Fi station\n"); - return ret; - } -#endif - -#ifdef ESP32C3_WLAN_HAS_SOFTAP - ret = esp32c3_wlan_softap_initialize(); - if (ret) - { - syslog(LOG_ERR, "ERROR: Failed to initialize Wi-Fi softAP\n"); - return ret; - } -#endif -#endif #endif @@ -379,7 +343,6 @@ int esp32c3_bringup(void) if (ret) { syslog(LOG_ERR, "ERROR: board_adc_init() failed: %d\n", ret); - return ret; } #endif /* CONFIG_ESP32C3_ADC */ diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_gc9a01.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_gc9a01.c new file mode 100644 index 00000000000..06d3435dea3 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_gc9a01.c @@ -0,0 +1,148 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_gc9a01.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "esp32c3_spi.h" +#include "esp32c3_gpio.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define LCD_SPI_PORTNO ESP32C3_SPI2 +#define LCD_DC CONFIG_ESP32C3_SPI2_MISOPIN +#define LCD_RST CONFIG_ESP32C3_LCD_RSTPIN +#define LCD_BL CONFIG_ESP32C3_LCD_BLPIN + +#ifndef CONFIG_SPI_CMDDATA +# error "The GC9A01 driver requires CONFIG_SPI_CMDATA in the config" +#endif + +#ifndef CONFIG_ESP32C3_SPI_SWCS +# error "The GC9A01 driver requires CONFIG_ESP32C3_SPI_SWCS in the config" +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct spi_dev_s *g_spidev; +static struct lcd_dev_s *g_lcd = NULL; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is + * fully initialized, display memory cleared, and the LCD ready to use, but + * with the power setting at 0 (full off). + * + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + g_spidev = esp32c3_spibus_initialize(LCD_SPI_PORTNO); + if (!g_spidev) + { + lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO); + return -ENODEV; + } + + /* SPI RX is not used. Same pin is used as LCD Data/Command control */ + + esp32c3_configgpio(LCD_DC, OUTPUT); + esp32c3_gpiowrite(LCD_DC, true); + + /* Pull LCD_RESET high */ + + esp32c3_configgpio(LCD_RST, OUTPUT); + esp32c3_gpiowrite(LCD_RST, false); + up_mdelay(50); + esp32c3_gpiowrite(LCD_RST, true); + up_mdelay(50); + + /* Set full brightness */ + + esp32c3_configgpio(LCD_BL, OUTPUT); + esp32c3_gpiowrite(LCD_BL, true); + + return OK; +} + +/**************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This + * allows support for multiple LCD devices. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int devno) +{ + g_lcd = gc9a01_lcdinitialize(g_spidev); + if (!g_lcd) + { + lcderr("ERROR: Failed to bind SPI port %d to LCD %d\n", LCD_SPI_PORTNO, + devno); + } + else + { + lcdinfo("SPI port %d bound to LCD %d\n", LCD_SPI_PORTNO, devno); + return g_lcd; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_lcd->setpower(g_lcd, 0); +} diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_gpio.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_gpio.c index 6fb40b91afe..c5af014b436 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_gpio.c +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_gpio.c @@ -283,7 +283,6 @@ static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable) int esp32c3_gpio_init(void) { int i; - int pincount = 0; #if BOARD_NGPIOOUT > 0 for (i = 0; i < BOARD_NGPIOOUT; i++) @@ -293,15 +292,14 @@ int esp32c3_gpio_init(void) g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN; g_gpout[i].gpio.gp_ops = &gpout_ops; g_gpout[i].id = i; - gpio_pin_register(&g_gpout[i].gpio, pincount); + gpio_pin_register(&g_gpout[i].gpio, i); /* Configure the pins that will be used as output */ esp32c3_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0); - esp32c3_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_1); + esp32c3_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_1 | + INPUT_FUNCTION_1); esp32c3_gpiowrite(g_gpiooutputs[i], 0); - - pincount++; } #endif @@ -313,13 +311,11 @@ int esp32c3_gpio_init(void) g_gpint[i].esp32c3gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN; g_gpint[i].esp32c3gpio.gpio.gp_ops = &gpint_ops; g_gpint[i].esp32c3gpio.id = i; - gpio_pin_register(&g_gpint[i].esp32c3gpio.gpio, pincount); + gpio_pin_register(&g_gpint[i].esp32c3gpio.gpio, i); /* Configure the pins that will be used as interrupt input */ esp32c3_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_1 | PULLDOWN); - - pincount++; } #endif diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c index e88e99d7b98..15678c4abba 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_spiflash.c @@ -46,9 +46,347 @@ * Pre-processor Definitions ****************************************************************************/ -#define ESP32C3_MTD_PATH "/dev/esp32c3flash" +/**************************************************************************** + * Private Functions + ****************************************************************************/ -#define ESP32C3_FS_MOUNT_PT CONFIG_ESP32C3_SPIFLASH_FS_MOUNT_PT +/**************************************************************************** + * Name: setup_smartfs + * + * Description: + * Provide a block driver wrapper around MTD partition and mount a + * SMART FS over it. + * + * Parameters: + * smartn - Number used to register the mtd partition: /dev/smartx, where + * x = smartn. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32C3_SPIFLASH_SMARTFS) +static int setup_smartfs(int smartn, FAR struct mtd_dev_s *mtd, + const char *mnt_pt) +{ + int ret = OK; + char path[22]; + + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + finfo("smart_initialize failed, Trying to erase first...\n"); + ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); + if (ret < 0) + { + ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); + return ret; + } + + finfo("Erase successful, initializing it again.\n"); + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: smart_initialize failed: %d\n", ret); + return ret; + } + } + + if (mnt_pt != NULL) + { + snprintf(path, sizeof(path), "/dev/smart%d", smartn); + + ret = nx_mount(path, mnt_pt, "smartfs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_littlefs + * + * Description: + * Register a mtd driver and mount a Little FS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32C3_SPIFLASH_LITTLEFS) +static int setup_littlefs(const char *path, FAR struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, NULL); + if (ret < 0) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, "forceformat"); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + } + + return OK; +} + +#endif + +/**************************************************************************** + * Name: setup_spiffs + * + * Description: + * Register a mtd driver and mount a SPIFFS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32C3_SPIFLASH_SPIFFS) +static int setup_spiffs(const char *path, FAR struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "spiffs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_nxffs + * + * Description: + * Register a mtd driver and mount a SPIFFS over it. + * + * Parameters: + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32C3_SPIFLASH_NXFFS) +static int setup_nxffs(FAR struct mtd_dev_s *mtd, const char *mnt_pt) +{ + int ret = OK; + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + ferr("ERROR: NXFFS init failed: %d\n", ret); + return ret; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(NULL, mnt_pt, "nxffs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} +#endif + +/**************************************************************************** + * Name: init_wifi_partition + * + * Description: + * Initialize partition that is dedicated to Wi-Fi. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32C3_WIFI_SAVE_PARAM) +static int init_wifi_partition(void) +{ + int ret = OK; + FAR struct mtd_dev_s *mtd; + + mtd = esp32c3_spiflash_alloc_mtdpart(CONFIG_ESP32C3_WIFI_MTD_OFFSET, + CONFIG_ESP32C3_WIFI_MTD_SIZE); + if (!mtd) + { + ferr("ERROR: Failed to alloc MTD partition of SPI Flash\n"); + return ERROR; + } + +#if defined (CONFIG_ESP32C3_SPIFLASH_SMARTFS) + + ret = setup_smartfs(1, mtd, CONFIG_ESP32C3_WIFI_FS_MOUNTPT); + if (ret < 0) + { + ferr("ERROR: Failed to setup smartfs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32C3_SPIFLASH_LITTLEFS) + + const char *path = "/dev/mtdblock1"; + ret = setup_littlefs(path, mtd, CONFIG_ESP32C3_WIFI_FS_MOUNTPT, 0777); + if (ret < 0) + { + ferr("ERROR: Failed to setup littlefs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32C3_SPIFLASH_SPIFFS) + + const char *path = "/dev/mtdblock1"; + ret = setup_spiffs(path, mtd, CONFIG_ESP32C3_WIFI_FS_MOUNTPT, 0777); + if (ret < 0) + { + ferr("ERROR: Failed to setup spiffs\n"); + return ret; + } + +#else + + ferr("ERROR: No supported FS selected. Wi-Fi partition " + "should be mounted before Wi-Fi initialization\n"); + +#endif + + return ret; +} + +#endif +/**************************************************************************** + * Name: init_storage_partition + * + * Description: + * Initialize partition that is dedicated to general use. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int init_storage_partition(void) +{ + int ret = OK; + FAR struct mtd_dev_s *mtd; + + mtd = esp32c3_spiflash_alloc_mtdpart(CONFIG_ESP32C3_MTD_OFFSET, + CONFIG_ESP32C3_MTD_SIZE); + if (!mtd) + { + ferr("ERROR: Failed to alloc MTD partition of SPI Flash\n"); + return ERROR; + } + +#if defined (CONFIG_ESP32C3_SPIFLASH_SMARTFS) + + ret = setup_smartfs(0, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to setup smartfs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32C3_SPIFLASH_NXFFS) + + ret = setup_nxffs(mtd, "/mnt"); + if (ret < 0) + { + ferr("ERROR: Failed to setup nxffs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32C3_SPIFLASH_LITTLEFS) + + const char *path = "/dev/esp32c3flash"; + ret = setup_littlefs(path, mtd, NULL, 0755); + if (ret < 0) + { + ferr("ERROR: Failed to setup littlefs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32C3_SPIFLASH_SPIFFS) + + const char *path = "/dev/esp32c3flash"; + ret = setup_spiffs(path, mtd, NULL, 0755); + if (ret < 0) + { + ferr("ERROR: Failed to setup spiffs\n"); + return ret; + } + +#else + + ret = register_mtddriver("/dev/esp32c3flash", mtd, 0755, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ret; + } + +#endif + + return ret; +} /**************************************************************************** * Public Functions @@ -63,70 +401,22 @@ int esp32c3_spiflash_init(void) { - FAR struct mtd_dev_s *mtd; - int ret = ERROR; + int ret = OK; - mtd = esp32c3_spiflash_alloc_mtdpart(); - -#if defined (CONFIG_ESP32C3_SPIFLASH_SMARTFS) - ret = smart_initialize(0, mtd, NULL); +#ifdef CONFIG_ESP32C3_WIFI_SAVE_PARAM + ret = init_wifi_partition(); if (ret < 0) { - finfo("smart_initialize failed, Trying to erase first...\n"); - ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); - if (ret < 0) - { - ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); - return ret; - } - - finfo("Erase successful, initializing it again.\n"); - ret = smart_initialize(0, mtd, NULL); - if (ret < 0) - { - ferr("ERROR: smart_initialize failed: %d\n", ret); - return ret; - } - } - -#elif defined (CONFIG_ESP32C3_SPIFLASH_NXFFS) - ret = nxffs_initialize(mtd); - if (ret < 0) - { - ferr("ERROR: NXFFS init failed: %d\n", ret); - return ret; - } - -#elif defined (CONFIG_ESP32C3_SPIFLASH_LITTLEFS) - ret = register_mtddriver(ESP32C3_MTD_PATH, mtd, 0755, NULL); - if (ret < 0) - { - ferr("ERROR: Register MTD failed: %d\n", ret); - return ret; - } - - ret = mount(ESP32C3_MTD_PATH, ESP32C3_FS_MOUNT_PT, - "littlefs", 0, NULL); - if (ret < 0) - { - ret = mount(ESP32C3_MTD_PATH, ESP32C3_FS_MOUNT_PT, - "littlefs", 0, "forceformat"); - if (ret < 0) - { - syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", - errno); - return ret; - } - } -#else - ret = register_mtddriver("/dev/esp32c3flash", mtd, 0755, NULL); - if (ret < 0) - { - ferr("ERROR: Register MTD failed: %d\n", ret); return ret; } #endif + ret = init_storage_partition(); + if (ret < 0) + { + return ret; + } + return ret; } diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_st7735.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_st7735.c new file mode 100644 index 00000000000..b12b928f8e1 --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_st7735.c @@ -0,0 +1,148 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_st7735.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "esp32c3_spi.h" +#include "esp32c3_gpio.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define LCD_SPI_PORTNO ESP32C3_SPI2 +#define LCD_DC CONFIG_ESP32C3_SPI2_MISOPIN +#define LCD_RST CONFIG_ESP32C3_LCD_RSTPIN +#define LCD_BL CONFIG_ESP32C3_LCD_BLPIN + +#ifndef CONFIG_SPI_CMDDATA +# error "The ST7735 driver requires CONFIG_SPI_CMDATA in the config" +#endif + +#ifndef CONFIG_ESP32C3_SPI_SWCS +# error "The ST7735 driver requires CONFIG_ESP32C3_SPI_SWCS in the config" +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct spi_dev_s *g_spidev; +static struct lcd_dev_s *g_lcd = NULL; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is + * fully initialized, display memory cleared, and the LCD ready to use, but + * with the power setting at 0 (full off). + * + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + g_spidev = esp32c3_spibus_initialize(LCD_SPI_PORTNO); + if (!g_spidev) + { + lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO); + return -ENODEV; + } + + /* SPI RX is not used. Same pin is used as LCD Data/Command control */ + + esp32c3_configgpio(LCD_DC, OUTPUT); + esp32c3_gpiowrite(LCD_DC, true); + + /* Pull LCD_RESET high */ + + esp32c3_configgpio(LCD_RST, OUTPUT); + esp32c3_gpiowrite(LCD_RST, false); + up_mdelay(1); + esp32c3_gpiowrite(LCD_RST, true); + up_mdelay(120); + + /* Set full brightness */ + + esp32c3_configgpio(LCD_BL, OUTPUT); + esp32c3_gpiowrite(LCD_BL, true); + + return OK; +} + +/**************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This + * allows support for multiple LCD devices. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int devno) +{ + g_lcd = st7735_lcdinitialize(g_spidev); + if (!g_lcd) + { + lcderr("ERROR: Failed to bind SPI port %d to LCD %d\n", LCD_SPI_PORTNO, + devno); + } + else + { + lcdinfo("SPI port %d bound to LCD %d\n", LCD_SPI_PORTNO, devno); + return g_lcd; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_lcd->setpower(g_lcd, 0); +} diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_st7789.c b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_st7789.c new file mode 100644 index 00000000000..de5b92c9bdf --- /dev/null +++ b/boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_st7789.c @@ -0,0 +1,148 @@ +/**************************************************************************** + * boards/risc-v/esp32c3/esp32c3-devkit/src/esp32c3_st7789.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "esp32c3_spi.h" +#include "esp32c3_gpio.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define LCD_SPI_PORTNO ESP32C3_SPI2 +#define LCD_DC CONFIG_ESP32C3_SPI2_MISOPIN +#define LCD_RST CONFIG_ESP32C3_LCD_RSTPIN +#define LCD_BL CONFIG_ESP32C3_LCD_BLPIN + +#ifndef CONFIG_SPI_CMDDATA +# error "The ST7789 driver requires CONFIG_SPI_CMDATA in the config" +#endif + +#ifndef CONFIG_ESP32C3_SPI_SWCS +# error "The ST7789 driver requires CONFIG_ESP32C3_SPI_SWCS in the config" +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct spi_dev_s *g_spidev; +static struct lcd_dev_s *g_lcd = NULL; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + * + * Description: + * Initialize the LCD video hardware. The initial state of the LCD is + * fully initialized, display memory cleared, and the LCD ready to use, but + * with the power setting at 0 (full off). + * + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + g_spidev = esp32c3_spibus_initialize(LCD_SPI_PORTNO); + if (!g_spidev) + { + lcderr("ERROR: Failed to initialize SPI port %d\n", LCD_SPI_PORTNO); + return -ENODEV; + } + + /* SPI RX is not used. Same pin is used as LCD Data/Command control */ + + esp32c3_configgpio(LCD_DC, OUTPUT); + esp32c3_gpiowrite(LCD_DC, true); + + /* Pull LCD_RESET high */ + + esp32c3_configgpio(LCD_RST, OUTPUT); + esp32c3_gpiowrite(LCD_RST, false); + up_mdelay(1); + esp32c3_gpiowrite(LCD_RST, true); + up_mdelay(10); + + /* Set full brightness */ + + esp32c3_configgpio(LCD_BL, OUTPUT); + esp32c3_gpiowrite(LCD_BL, true); + + return OK; +} + +/**************************************************************************** + * Name: board_lcd_getdev + * + * Description: + * Return a a reference to the LCD object for the specified LCD. This + * allows support for multiple LCD devices. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int devno) +{ + g_lcd = st7789_lcdinitialize(g_spidev); + if (!g_lcd) + { + lcderr("ERROR: Failed to bind SPI port %d to LCD %d\n", LCD_SPI_PORTNO, + devno); + } + else + { + lcdinfo("SPI port %d bound to LCD %d\n", LCD_SPI_PORTNO, devno); + return g_lcd; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + * + * Description: + * Uninitialize the LCD support + * + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ + /* Turn the display off */ + + g_lcd->setpower(g_lcd, 0); +} diff --git a/boards/risc-v/k210/maix-bit/kernel/k210_userspace.c b/boards/risc-v/k210/maix-bit/kernel/k210_userspace.c index 7815b1d411b..fb19ab1a286 100644 --- a/boards/risc-v/k210/maix-bit/kernel/k210_userspace.c +++ b/boards/risc-v/k210/maix-bit/kernel/k210_userspace.c @@ -75,7 +75,7 @@ extern uint32_t _ebss; /* End+1 of .bss */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/risc-v/mpfs/icicle/configs/hwtest/defconfig b/boards/risc-v/mpfs/icicle/configs/hwtest/defconfig new file mode 100644 index 00000000000..fddc3cb14de --- /dev/null +++ b/boards/risc-v/mpfs/icicle/configs/hwtest/defconfig @@ -0,0 +1,99 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_DISABLE_OS_API is not set +# CONFIG_NSH_DISABLE_LOSMART is not set +# CONFIG_SPI_CALLBACK is not set +CONFIG_ALLOW_BSD_COMPONENTS=y +CONFIG_ARCH="risc-v" +CONFIG_ARCH_BOARD="icicle" +CONFIG_ARCH_BOARD_ICICLE_MPFS=y +CONFIG_ARCH_CHIP="mpfs" +CONFIG_ARCH_CHIP_MPFS=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +CONFIG_ARCH_RISCV=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_BOARD_LOOPSPERMSEC=54000 +CONFIG_BUILTIN=y +CONFIG_DEBUG_ASSERTIONS=y +CONFIG_DEBUG_ERROR=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_WARN=y +CONFIG_DEV_ZERO=y +CONFIG_EXPERIMENTAL=y +CONFIG_FS_FAT=y +CONFIG_FS_PROCFS=y +CONFIG_FS_ROMFS=y +CONFIG_I2C=y +CONFIG_I2C_DRIVER=y +CONFIG_IDLETHREAD_STACKSIZE=2048 +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_LIBC_PERROR_STDOUT=y +CONFIG_LIBC_STRERROR=y +CONFIG_MEMSET_64BIT=y +CONFIG_MEMSET_OPTSPEED=y +CONFIG_MMCSD=y +CONFIG_MMCSD_SDIO=y +CONFIG_MPFS_COREPWM0=y +CONFIG_MPFS_COREPWM1=y +CONFIG_MPFS_DMA=y +CONFIG_MPFS_EMMCSD=y +CONFIG_MPFS_ENABLE_DPFPU=y +CONFIG_MPFS_HAVE_COREPWM=y +CONFIG_MPFS_I2C0=y +CONFIG_MPFS_I2C1=y +CONFIG_MPFS_SPI0=y +CONFIG_MPFS_SPI1=y +CONFIG_MPFS_UART0=y +CONFIG_MPFS_UART1=y +CONFIG_MPFS_UART2=y +CONFIG_MPFS_UART3=y +CONFIG_MPFS_UART4=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +CONFIG_NSH_DISABLE_MKDIR=y +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +CONFIG_NSH_DISABLE_UMOUNT=y +CONFIG_NSH_LINELEN=160 +CONFIG_NSH_STRERROR=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PTABLE_PARTITION=y +CONFIG_PWM=y +CONFIG_PWM_NCHANNELS=16 +CONFIG_RAM_SIZE=1048576 +CONFIG_RAM_START=0x80200000 +CONFIG_RAW_BINARY=y +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SERIAL_NPOLLWAITERS=2 +CONFIG_SPI=y +CONFIG_SPI_DRIVER=y +CONFIG_STACK_COLORATION=y +CONFIG_START_MONTH=4 +CONFIG_START_YEAR=2021 +CONFIG_SYSLOG_COLOR_OUTPUT=y +CONFIG_SYSTEM_CLE_CMD_HISTORY=y +CONFIG_SYSTEM_COLOR_CLE=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_TIME64=y +CONFIG_TASK_NAME_SIZE=20 +CONFIG_TESTING_GETPRIME=y +CONFIG_TESTING_OSTEST=y +CONFIG_TESTING_OSTEST_FPUSIZE=264 +CONFIG_UART1_SERIAL_CONSOLE=y +CONFIG_USERMAIN_STACKSIZE=3072 +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/risc-v/mpfs/icicle/kernel/mpfs_userspace.c b/boards/risc-v/mpfs/icicle/kernel/mpfs_userspace.c index a2fba9f4e61..e90b08d8152 100755 --- a/boards/risc-v/mpfs/icicle/kernel/mpfs_userspace.c +++ b/boards/risc-v/mpfs/icicle/kernel/mpfs_userspace.c @@ -77,7 +77,7 @@ extern uintptr_t *__ld_usram_end; /* End+1 of user ram section */ int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]); -const struct userspace_s userspace __attribute__ ((section (".userspace"))) = +const struct userspace_s userspace locate_data(".userspace") = { /* General memory map */ diff --git a/boards/risc-v/mpfs/icicle/src/Makefile b/boards/risc-v/mpfs/icicle/src/Makefile index 8dc195e8b4c..1f49e0a2dde 100755 --- a/boards/risc-v/mpfs/icicle/src/Makefile +++ b/boards/risc-v/mpfs/icicle/src/Makefile @@ -42,4 +42,12 @@ ifeq ($(CONFIG_SPI),y) CSRCS += mpfs_board_spi.c endif +ifeq ($(CONFIG_MPFS_HAVE_COREPWM),y) +CSRCS += mpfs_pwm.c +endif + +ifeq ($(CONFIG_MPFS_EMMCSD),y) +CSRCS += mpfs_emmcsd.c +endif + include $(TOPDIR)/boards/Board.mk diff --git a/boards/risc-v/mpfs/icicle/src/mpfs_bringup.c b/boards/risc-v/mpfs/icicle/src/mpfs_bringup.c index 983ba9489e3..9018dd23839 100755 --- a/boards/risc-v/mpfs/icicle/src/mpfs_bringup.c +++ b/boards/risc-v/mpfs/icicle/src/mpfs_bringup.c @@ -34,6 +34,7 @@ #include #include "mpfsicicle.h" +#include "mpfs_corepwm.h" #include "mpfs.h" /**************************************************************************** @@ -80,5 +81,25 @@ int mpfs_bringup(void) } #endif +#ifdef CONFIG_MPFS_HAVE_COREPWM + /* Configure PWM peripheral interfaces */ + + ret = mpfs_pwm_setup(); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize CorePWM driver: %d\n", ret); + } +#endif + +#ifdef CONFIG_MPFS_EMMCSD + ret = mpfs_board_emmcsd_init(); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to init eMMCSD driver: %d\n", ret); + } +#endif + return ret; } diff --git a/boards/risc-v/mpfs/icicle/src/mpfs_emmcsd.c b/boards/risc-v/mpfs/icicle/src/mpfs_emmcsd.c new file mode 100644 index 00000000000..8b9d693a7d1 --- /dev/null +++ b/boards/risc-v/mpfs/icicle/src/mpfs_emmcsd.c @@ -0,0 +1,88 @@ +/**************************************************************************** + * boards/risc-v/mpfs/icicle/src/mpfs_emmcsd.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include "mpfs_emmcsd.h" +#include "mpfsicicle.h" + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static FAR struct sdio_dev_s *g_sdio_dev; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_emmcsd_init + * + * Description: + * Configure the eMMCSD driver. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int mpfs_board_emmcsd_init(void) +{ + int ret; + + /* Mount the SDIO-based MMC/SD block driver */ + + /* First, get an instance of the SDIO interface */ + + finfo("Initializing SDIO slot %d\n", CONFIG_NSH_MMCSDSLOTNO); + + g_sdio_dev = sdio_initialize(CONFIG_NSH_MMCSDSLOTNO); + if (!g_sdio_dev) + { + ferr("ERROR: Failed to initialize SDIO slot %d\n", + CONFIG_NSH_MMCSDSLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", CONFIG_NSH_MMCSDMINOR); + + ret = mmcsd_slotinitialize(CONFIG_NSH_MMCSDMINOR, g_sdio_dev); + if (ret != OK) + { + ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret); + return ret; + } + + sdio_mediachange(g_sdio_dev, true); + + return OK; +} diff --git a/boards/risc-v/mpfs/icicle/src/mpfs_pwm.c b/boards/risc-v/mpfs/icicle/src/mpfs_pwm.c new file mode 100644 index 00000000000..823a58a7ac1 --- /dev/null +++ b/boards/risc-v/mpfs/icicle/src/mpfs_pwm.c @@ -0,0 +1,90 @@ +/**************************************************************************** + * boards/risc-v/mpfs/icicle/src/mpfs_pwm.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include "mpfs_corepwm.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: mpfs_pwm_setup + * + * Description: + * + * Initialize PWM and register PWM devices + * + ****************************************************************************/ + +int mpfs_pwm_setup(void) +{ + struct pwm_lowerhalf_s *lower_half = NULL; /* lower-half handle */ + + /* The underlying CorePWM driver "knows" there are up to 16 channels + * available for each timer device, so we don't have to do anything + * special here. + */ + +#ifdef CONFIG_MPFS_COREPWM0 + lower_half = mpfs_corepwm_init(0); + + /* If we can't get the lower-half handle, skip and keep going. */ + + if (lower_half) + { + /* Translate the peripheral number to a device name. */ + + pwm_register("/dev/corepwm0", lower_half); + } + +#endif +#ifdef CONFIG_MPFS_COREPWM1 + lower_half = mpfs_corepwm_init(1); + + /* If we can't get the lower-half handle, skip and keep going. */ + + if (lower_half) + { + /* Translate the peripheral number to a device name. */ + + pwm_register("/dev/corepwm1", lower_half); + } +#endif + + return 0; +} diff --git a/boards/risc-v/mpfs/icicle/src/mpfsicicle.h b/boards/risc-v/mpfs/icicle/src/mpfsicicle.h index 2d00e3acb63..d5f851f4d3e 100755 --- a/boards/risc-v/mpfs/icicle/src/mpfsicicle.h +++ b/boards/risc-v/mpfs/icicle/src/mpfsicicle.h @@ -44,5 +44,7 @@ int mpfs_bringup(void); int mpfs_board_spi_init(void); int mpfs_board_i2c_init(void); +int mpfs_board_emmcsd_init(void); +int mpfs_pwm_setup(void); #endif /* __BOARDS_RISCV_ICICLE_MPFS_SRC_MPFSICICLE_H */ diff --git a/boards/sim/sim/sim/configs/bluetooth/defconfig b/boards/sim/sim/sim/configs/bluetooth/defconfig index f49b3ccf2e3..a60603090e2 100644 --- a/boards/sim/sim/sim/configs/bluetooth/defconfig +++ b/boards/sim/sim/sim/configs/bluetooth/defconfig @@ -8,6 +8,7 @@ # CONFIG_NET_ETHERNET is not set # CONFIG_NET_IPv4 is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="sim" CONFIG_ARCH_BOARD="sim" CONFIG_ARCH_BOARD_SIM=y diff --git a/boards/sim/sim/sim/configs/bthcisock/defconfig b/boards/sim/sim/sim/configs/bthcisock/defconfig index d4e2bd95ce8..02604ef09f4 100644 --- a/boards/sim/sim/sim/configs/bthcisock/defconfig +++ b/boards/sim/sim/sim/configs/bthcisock/defconfig @@ -8,6 +8,7 @@ # CONFIG_NET_ETHERNET is not set # CONFIG_NET_IPv4 is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="sim" CONFIG_ARCH_BOARD="sim" CONFIG_ARCH_BOARD_SIM=y diff --git a/boards/sim/sim/sim/configs/btuart/defconfig b/boards/sim/sim/sim/configs/btuart/defconfig index 08ff5a0aafb..1061a8dc0d7 100644 --- a/boards/sim/sim/sim/configs/btuart/defconfig +++ b/boards/sim/sim/sim/configs/btuart/defconfig @@ -8,6 +8,7 @@ # CONFIG_NET_ETHERNET is not set # CONFIG_NET_IPv4 is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="sim" CONFIG_ARCH_BOARD="sim" CONFIG_ARCH_BOARD_SIM=y diff --git a/boards/sim/sim/sim/configs/linuxspi/defconfig b/boards/sim/sim/sim/configs/linuxspi/defconfig new file mode 100644 index 00000000000..f04e33289b8 --- /dev/null +++ b/boards/sim/sim/sim/configs/linuxspi/defconfig @@ -0,0 +1,40 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="sim" +CONFIG_ARCH_BOARD="sim" +CONFIG_ARCH_BOARD_SIM=y +CONFIG_ARCH_CHIP="sim" +CONFIG_ARCH_SIM=y +CONFIG_BOARDCTL_APP_SYMTAB=y +CONFIG_BOARDCTL_POWEROFF=y +CONFIG_BOARDCTL_ROMDISK=y +CONFIG_BOARD_LOOPSPERMSEC=0 +CONFIG_BOOT_RUNFROMEXTSRAM=y +CONFIG_BUILTIN=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEV_ZERO=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FS_PROCFS=y +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_LIBC_EXECFUNCS=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_READLINE=y +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048 +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_SCHED_HAVE_PARENT=y +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SIM_SPI=y +CONFIG_START_MONTH=6 +CONFIG_START_YEAR=2008 +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_SPITOOL=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/sim/sim/sim/configs/lvgl/defconfig b/boards/sim/sim/sim/configs/lvgl/defconfig index eb0e9a43394..9271633f751 100644 --- a/boards/sim/sim/sim/configs/lvgl/defconfig +++ b/boards/sim/sim/sim/configs/lvgl/defconfig @@ -29,6 +29,7 @@ CONFIG_EXAMPLES_LVGLDEMO_STACKSIZE=32768 CONFIG_GRAPHICS_LVGL=y CONFIG_IDLETHREAD_STACKSIZE=4096 CONFIG_INPUT=y +CONFIG_INPUT_MOUSE=y CONFIG_LV_COLOR_DEPTH=32 CONFIG_LV_HOR_RES=640 CONFIG_LV_VER_RES=480 diff --git a/boards/sim/sim/sim/configs/nimble/defconfig b/boards/sim/sim/sim/configs/nimble/defconfig index 2c4cb5ba454..c9de5e1ea83 100644 --- a/boards/sim/sim/sim/configs/nimble/defconfig +++ b/boards/sim/sim/sim/configs/nimble/defconfig @@ -9,6 +9,7 @@ # CONFIG_NET_IPv4 is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_WIRELESS_BLUETOOTH_HOST is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="sim" CONFIG_ARCH_BOARD="sim" CONFIG_ARCH_BOARD_SIM=y diff --git a/boards/sim/sim/sim/configs/nsh/defconfig b/boards/sim/sim/sim/configs/nsh/defconfig index f4896b46dfa..e65a11067af 100644 --- a/boards/sim/sim/sim/configs/nsh/defconfig +++ b/boards/sim/sim/sim/configs/nsh/defconfig @@ -27,6 +27,7 @@ CONFIG_FSUTILS_PASSWD_READONLY=y CONFIG_FS_BINFS=y CONFIG_FS_FAT=y CONFIG_FS_PROCFS=y +CONFIG_FS_RAMMAP=y CONFIG_FS_ROMFS=y CONFIG_IDLETHREAD_STACKSIZE=4096 CONFIG_LIBC_ENVPATH=y diff --git a/boards/sim/sim/sim/configs/smartfs/defconfig b/boards/sim/sim/sim/configs/smartfs/defconfig new file mode 100644 index 00000000000..f859d299fc7 --- /dev/null +++ b/boards/sim/sim/sim/configs/smartfs/defconfig @@ -0,0 +1,66 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_ARCH="sim" +CONFIG_ARCH_BOARD="sim" +CONFIG_ARCH_BOARD_SIM=y +CONFIG_ARCH_CHIP="sim" +CONFIG_ARCH_SIM=y +CONFIG_BOARDCTL_APP_SYMTAB=y +CONFIG_BOARDCTL_POWEROFF=y +CONFIG_BOARD_LOOPSPERMSEC=0 +CONFIG_BOOT_RUNFROMEXTSRAM=y +CONFIG_BUILTIN=y +CONFIG_DEBUG_ASSERTIONS=y +CONFIG_DEBUG_ERROR=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_FS_ERROR=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_WARN=y +CONFIG_DEV_LOOP=y +CONFIG_DEV_ZERO=y +CONFIG_EXAMPLES_HELLO=y +CONFIG_FSUTILS_PASSWD=y +CONFIG_FSUTILS_PASSWD_READONLY=y +CONFIG_FS_BINFS=y +CONFIG_FS_PROCFS=y +CONFIG_FS_RAMMAP=y +CONFIG_FS_ROMFS=y +CONFIG_FS_SMARTFS=y +CONFIG_IDLETHREAD_STACKSIZE=4096 +CONFIG_LIBC_EXECFUNCS=y +CONFIG_MTD=y +CONFIG_MTD_PARTITION=y +CONFIG_MTD_SMART=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_ARCHROMFS=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_CONSOLE_LOGIN=y +CONFIG_NSH_DISABLE_LOSMART=y +CONFIG_NSH_FILE_APPS=y +CONFIG_NSH_MOTD=y +CONFIG_NSH_MOTD_STRING="MOTD: username=admin password=Administrator" +CONFIG_NSH_READLINE=y +CONFIG_NSH_ROMFSDEVNO=1 +CONFIG_NSH_ROMFSETC=y +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=2048 +CONFIG_PSEUDOFS_ATTRIBUTES=y +CONFIG_PSEUDOFS_SOFTLINKS=y +CONFIG_RAMMTD=y +CONFIG_RAMMTD_FLASHSIM=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_SCHED_HAVE_PARENT=y +CONFIG_SCHED_ONEXIT=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_MONTH=6 +CONFIG_START_YEAR=2008 +CONFIG_SYSTEM_FLASH_ERASEALL=y +CONFIG_SYSTEM_NSH=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/sim/sim/sim/configs/smp/defconfig b/boards/sim/sim/sim/configs/smp/defconfig index 4011055737d..7c58490cc78 100644 --- a/boards/sim/sim/sim/configs/smp/defconfig +++ b/boards/sim/sim/sim/configs/smp/defconfig @@ -25,6 +25,7 @@ CONFIG_NSH_READLINE=y CONFIG_READLINE_CMD_HISTORY=y CONFIG_SCHED_HAVE_PARENT=y CONFIG_SMP=y +CONFIG_STACK_COLORATION=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TASKSET=y diff --git a/boards/sim/sim/sim/configs/spiffs/defconfig b/boards/sim/sim/sim/configs/spiffs/defconfig index 14e24534e60..273c0bd50a2 100644 --- a/boards/sim/sim/sim/configs/spiffs/defconfig +++ b/boards/sim/sim/sim/configs/spiffs/defconfig @@ -5,6 +5,7 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="sim" CONFIG_ARCH_BOARD="sim" CONFIG_ARCH_BOARD_SIM=y diff --git a/boards/sim/sim/sim/scripts/Make.defs b/boards/sim/sim/sim/scripts/Make.defs index 6c8e180f8a8..cfb3980bd72 100644 --- a/boards/sim/sim/sim/scripts/Make.defs +++ b/boards/sim/sim/sim/scripts/Make.defs @@ -83,7 +83,7 @@ endif CC = $(CROSSDEV)cc CXX = $(CROSSDEV)c++ CPP = $(CROSSDEV)cc -E -P -x c -LD = $(CROSSDEV)cc +LD = $(CROSSDEV)ld ifeq ($(CONFIG_HOST_MACOS),y) STRIP = $(CROSSDEV)strip AR = $(TOPDIR)/tools/macar-rcs.sh @@ -172,11 +172,11 @@ ifeq ($(CONFIG_DEBUG_SYMBOLS),y) endif ifeq ($(CONFIG_SIM_M32),y) - LDLINKFLAGS += -Wl,-melf_i386 + LDLINKFLAGS += -melf_i386 CCLINKFLAGS += -m32 LDFLAGS += -m32 - LDMODULEFLAGS += -Wl,-melf_i386 - LDELFFLAGS += -Wl,-melf_i386 + LDMODULEFLAGS += -melf_i386 + LDELFFLAGS += -melf_i386 HOSTLDFLAGS += -m32 endif @@ -187,5 +187,3 @@ endif HOSTCFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ $(ARCHCPUFLAGS) $(HOSTINCLUDES) $(EXTRAFLAGS) -D__SIM__ -pipe - -LDLINKFLAGS += -nostartfiles -nodefaultlibs diff --git a/boards/x86_64/intel64/qemu-intel64/configs/nsh/defconfig b/boards/x86_64/intel64/qemu-intel64/configs/nsh/defconfig index 5ef4f1fede7..08b75e12ff8 100644 --- a/boards/x86_64/intel64/qemu-intel64/configs/nsh/defconfig +++ b/boards/x86_64/intel64/qemu-intel64/configs/nsh/defconfig @@ -26,6 +26,7 @@ CONFIG_BOOT_RUNFROMEXTSRAM=y CONFIG_BUILTIN=y CONFIG_CLOCK_MONOTONIC=y CONFIG_CONSOLE_SYSLOG=y +CONFIG_DEBUG_SYMBOLS=y CONFIG_EXAMPLES_HELLO=y CONFIG_EXAMPLES_HELLO_STACKSIZE=4194304 CONFIG_FS_PROCFS=y @@ -54,6 +55,7 @@ CONFIG_START_MONTH=3 CONFIG_START_YEAR=2011 CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_TIME64=y +CONFIG_TESTING_OSTEST=y CONFIG_USEC_PER_TICK=1 CONFIG_USERMAIN_STACKSIZE=4194304 CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/x86_64/intel64/qemu-intel64/configs/ostest/defconfig b/boards/x86_64/intel64/qemu-intel64/configs/ostest/defconfig index cb98932e790..c26ebadbfcb 100644 --- a/boards/x86_64/intel64/qemu-intel64/configs/ostest/defconfig +++ b/boards/x86_64/intel64/qemu-intel64/configs/ostest/defconfig @@ -25,6 +25,7 @@ CONFIG_BOARD_LOOPSPERMSEC=999 CONFIG_BOOT_RUNFROMEXTSRAM=y CONFIG_CLOCK_MONOTONIC=y CONFIG_CONSOLE_SYSLOG=y +CONFIG_DEBUG_SYMBOLS=y CONFIG_IDLETHREAD_STACKSIZE=4194304 CONFIG_LIBM=y CONFIG_PREALLOC_CHILDSTATUS=16 diff --git a/boards/xtensa/esp32/common/Kconfig b/boards/xtensa/esp32/common/Kconfig index bd3e8621f1e..944e54cbf8a 100644 --- a/boards/xtensa/esp32/common/Kconfig +++ b/boards/xtensa/esp32/common/Kconfig @@ -2,6 +2,15 @@ # For a description of the syntax of this configuration file, # see the file kconfig-language.txt in the NuttX tools repository. # +config ESP32_MERGE_BINS + bool "Merge raw binary files into a single file" + default n + ---help--- + Merge the raw binary files into a single file for flashing to the + device. + This is only useful when the path to binary files (e.g. bootloader) + is provided via the ESPTOOL_BINDIR variable. + config ESP32_QEMU_IMAGE bool "ESP32 binary image for QEMU" default n diff --git a/boards/xtensa/esp32/common/include/esp32_ht16k33.h b/boards/xtensa/esp32/common/include/esp32_ht16k33.h index 9464ecc8938..877c9d4102a 100644 --- a/boards/xtensa/esp32/common/include/esp32_ht16k33.h +++ b/boards/xtensa/esp32/common/include/esp32_ht16k33.h @@ -63,7 +63,7 @@ extern "C" * Name: board_ht16k33_initialize * * Description: - * Initialize and register the HT16K32 LED Display. + * Initialize and register the HT16K33 LED Display. * * Input Parameters: * devno - The device number, used to build the device path as /dev/slcdN diff --git a/arch/arm/src/armv6-m/arm_switchcontext.S b/boards/xtensa/esp32/common/include/esp32_lcd_backpack.h similarity index 66% rename from arch/arm/src/armv6-m/arm_switchcontext.S rename to boards/xtensa/esp32/common/include/esp32_lcd_backpack.h index 1e233a9f3b0..7a3ebfa5080 100644 --- a/arch/arm/src/armv6-m/arm_switchcontext.S +++ b/boards/xtensa/esp32/common/include/esp32_lcd_backpack.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/armv6-m/arm_switchcontext.S + * boards/xtensa/esp32/common/include/esp32_lcd_backpack.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,64 +18,66 @@ * ****************************************************************************/ +#ifndef __ESP32_LCD_BACKPACK_H +#define __ESP32_LCD_BACKPACK_H + /**************************************************************************** * Included Files ****************************************************************************/ #include -#include - -#include "nvic.h" -#include "svcall.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** - * Public Symbols - ****************************************************************************/ - - .file "arm_switchcontext.S" - -/**************************************************************************** - * Macros + * Type Definitions ****************************************************************************/ /**************************************************************************** - * Public Functions + * Public Types ****************************************************************************/ /**************************************************************************** - * Name: arm_switchcontext + * Public Data + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_backpack_init * * Description: - * Save the current thread context and restore the specified context. - * Full prototype is: + * Initialize the LCD1602 display controlled by Backpack with PCF8574 * - * void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/slcd0" * * Returned Value: - * None + * Zero (OK) on success; a negated errno value on failure. * ****************************************************************************/ - .align 2 - .code 16 - .thumb_func - .globl arm_switchcontext - .type arm_switchcontext, function -arm_switchcontext: +int board_lcd_backpack_init(int devno, int busno, int rows, int cols); - /* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */ +#undef EXTERN +#ifdef __cplusplus +} +#endif - mov r2, r1 /* R2: restoreregs */ - mov r1, r0 /* R1: saveregs */ - mov r0, #SYS_switch_context /* R0: context switch */ - svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */ - - /* We will get here only after the rerturn from the context switch */ - - bx lr - .size arm_switchcontext, .-arm_switchcontext - .end +#endif /* __ESP3232_LCD_BACKPACK_H */ diff --git a/boards/xtensa/esp32/esp32-devkitc/scripts/esp32.ld b/boards/xtensa/esp32/common/scripts/esp32.ld similarity index 85% rename from boards/xtensa/esp32/esp32-devkitc/scripts/esp32.ld rename to boards/xtensa/esp32/common/scripts/esp32.ld index 8a5c13afdd2..cce43ee7873 100644 --- a/boards/xtensa/esp32/esp32-devkitc/scripts/esp32.ld +++ b/boards/xtensa/esp32/common/scripts/esp32.ld @@ -1,5 +1,21 @@ /**************************************************************************** - * boards/xtensa/esp32/esp32-devkitc/scripts/esp32.ld + * boards/xtensa/esp32/common/scripts/esp32.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * ****************************************************************************/ /* Default entry point: */ diff --git a/boards/xtensa/esp32/common/scripts/esp32.template.ld b/boards/xtensa/esp32/common/scripts/esp32.template.ld new file mode 100644 index 00000000000..7632e2aa5db --- /dev/null +++ b/boards/xtensa/esp32/common/scripts/esp32.template.ld @@ -0,0 +1,167 @@ +/**************************************************************************** + * boards/xtensa/esp32/common/scripts/esp32.template.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * ESP32 Linker Script Memory Layout + * + * This file describes the memory layout (memory blocks) as virtual + * memory addresses. + * + * esp32.ld contains output sections to link compiler output into these + * memory blocks. + * + * NOTE: That this is not the actual linker script but rather a "template" + * for the esp32_out.ld script. This template script is passed through + * the C preprocessor to include selected configuration options. + * + ****************************************************************************/ + +#include + +#ifdef CONFIG_ESP32_FLASH_2M +# define FLASH_SIZE 0x200000 +#elif defined (CONFIG_ESP32_FLASH_4M) +# define FLASH_SIZE 0x400000 +#elif defined (CONFIG_ESP32_FLASH_8M) +# define FLASH_SIZE 0x800000 +#elif defined (CONFIG_ESP32_FLASH_16M) +# define FLASH_SIZE 0x1000000 +#endif + +MEMORY +{ +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT + /* The origin values for "metadata" and "ROM" memory regions are the actual + * load addresses. + * + * NOTE: The memory region starting from 0x0 with length represented by + * CONFIG_ESP32_APP_MCUBOOT_HEADER_SIZE is reserved for the MCUboot header, + * which will be prepended to the binary file by the "imgtool" during the + * signing of firmware image. + */ + + metadata (RX) : org = CONFIG_ESP32_APP_MCUBOOT_HEADER_SIZE, len = 0x20 + ROM (RX) : org = CONFIG_ESP32_APP_MCUBOOT_HEADER_SIZE + 0x20, + len = FLASH_SIZE - (CONFIG_ESP32_APP_MCUBOOT_HEADER_SIZE + 0x20) +#endif + + /* Below values assume the flash cache is on, and have the blocks this + * uses subtracted from the length of the various regions. The 'data access + * port' dram/drom regions map to the same iram/irom regions but are + * connected to the data port of the CPU and e.g. allow bytewise access. + */ + + /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ + + iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 + + /* Flash mapped instruction data. */ + +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT + irom0_0_seg (RX) : org = 0x400d0000, len = 0x330000 +#else + /* The 0x20 offset is a convenience for the app binary image generation. + * Flash cache has 64KB pages. The .bin file which is flashed to the chip + * has a 0x18 byte file header, and each segment has a 0x08 byte segment + * header. Setting this offset makes it simple to meet the flash cache MMU's + * constraint that (paddr % 64KB == vaddr % 64KB). + */ + + irom0_0_seg (RX) : org = 0x400d0020, len = 0x330000 - 0x20 +#endif + + /* Shared data RAM, excluding memory reserved for ROM bss/data/stack. + * Enabling Bluetooth & Trace Memory features in menuconfig will decrease + * the amount of RAM available. + * + * Note: The length of this section should be 0x50000, and this extra + * DRAM is available in heap at runtime. However due to static ROM memory + * usage at this 176KB mark, the additional static memory temporarily cannot + * be used. + */ + + dram0_0_seg (RW) : org = 0x3ffb0000 + CONFIG_ESP32_BT_RESERVE_DRAM, + len = 0x2c200 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM - CONFIG_ESP32_BT_RESERVE_DRAM + + /* Flash mapped constant data */ + +#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT + /* The DROM segment origin is offset by 0x40 for mirroring the actual ROM + * image layout: + * 0x0 - 0x1F : MCUboot header + * 0x20 - 0x3F : Application image metadata section + * 0x40 onwards: ROM code and data + * This is required to meet the following constraint from the external + * flash MMU: + * VMA % 64KB == LMA % 64KB + * i.e. the lower 16 bits of both the virtual address (address seen by the + * CPU) and the load address (physical address of the external flash) must + * be equal. + */ + + drom0_0_seg (R) : org = 0x3f400000 + (CONFIG_ESP32_APP_MCUBOOT_HEADER_SIZE + 0x20), + len = FLASH_SIZE - (CONFIG_ESP32_APP_MCUBOOT_HEADER_SIZE + 0x20) +#else + /* The 0x20 offset is a convenience for the app binary image generation. + * Flash cache has 64KB pages. The .bin file which is flashed to the chip + * has a 0x18 byte file header, and each segment has a 0x08 byte segment + * header. Setting this offset makes it simple to meet the flash cache MMU's + * constraint that (paddr % 64KB == vaddr % 64KB). + */ + + drom0_0_seg (R) : org = 0x3f400020, len = FLASH_SIZE - 0x20 +#endif + + /* RTC fast memory (executable). Persists over deep sleep. */ + + rtc_iram_seg (RWX) : org = 0x400c0000, len = 0x2000 + + /* RTC slow memory (data accessible). Persists over deep sleep. + * Start of RTC slow memory is reserved for ULP co-processor code + data, + * if enabled. + */ + + rtc_slow_seg (RW) : org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM, + len = 0x1000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM + + /* External memory, including data and text */ + + extmem_seg (RWX) : org = 0x3f800000, len = 0x400000 +} + +#if CONFIG_ESP32_DEVKIT_RUN_IRAM + REGION_ALIAS("default_rodata_seg", dram0_0_seg); + REGION_ALIAS("default_code_seg", iram0_0_seg); +#else + REGION_ALIAS("default_rodata_seg", drom0_0_seg); + REGION_ALIAS("default_code_seg", irom0_0_seg); +#endif /* CONFIG_ESP32_DEVKIT_RUN_IRAM */ + +/* Heap ends at top of dram0_0_seg */ + +_eheap = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM; + +/* IRAM heap ends at top of dram0_0_seg */ + +_eiramheap = 0x400a0000; + +/* Mark the end of the RTC heap (top of the RTC region) */ + +_ertcheap = 0x50001fff; diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/scripts/esp32.ld b/boards/xtensa/esp32/common/scripts/esp32_mcuboot.ld similarity index 62% rename from boards/xtensa/esp32/esp32-ethernet-kit/scripts/esp32.ld rename to boards/xtensa/esp32/common/scripts/esp32_mcuboot.ld index 4667cbb9c80..8443b5ce01d 100644 --- a/boards/xtensa/esp32/esp32-ethernet-kit/scripts/esp32.ld +++ b/boards/xtensa/esp32/common/scripts/esp32_mcuboot.ld @@ -1,5 +1,21 @@ /**************************************************************************** - * boards/xtensa/esp32/esp32-ethernet-kit/scripts/esp32.ld + * boards/xtensa/esp32/common/scripts/esp32_mcuboot.ld + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * ****************************************************************************/ /* Default entry point: */ @@ -8,6 +24,93 @@ ENTRY(__start); SECTIONS { + .metadata : + { + /* Magic for load header */ + + LONG(0xace637d3) + + /* Application entry point address */ + + KEEP(*(.entry_addr)) + + /* IRAM metadata: + * - Destination address (VMA) for IRAM region + * - Flash offset (LMA) for start of IRAM region + * - Size of IRAM region + */ + + LONG(ADDR(.iram0.vectors)) + LONG(LOADADDR(.iram0.vectors)) + LONG(LOADADDR(.iram0.text) + SIZEOF(.iram0.text) - LOADADDR(.iram0.vectors)) + + /* DRAM metadata: + * - Destination address (VMA) for DRAM region + * - Flash offset (LMA) for start of DRAM region + * - Size of DRAM region + */ + + LONG(ADDR(.dram0.data)) + LONG(LOADADDR(.dram0.data)) + LONG(SIZEOF(.dram0.data)) + } >metadata + + _image_drom_vma = ADDR(.flash.rodata); + _image_drom_lma = LOADADDR(.flash.rodata); + _image_drom_size = LOADADDR(.flash.rodata) + SIZEOF(.flash.rodata) - _image_drom_lma; + + .flash.rodata : + { + . = ALIGN(4); + _srodata = ABSOLUTE(.); + *(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* esp32_start.*) .rodata) + *(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* esp32_start.*) .rodata.*) + *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ + *(.gnu.linkonce.r.*) + *(.rodata1) + __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); + *(.xt_except_table) + *(.gcc_except_table) + *(.gcc_except_table.*) + *(.gnu.linkonce.e.*) + *(.gnu.version_r) + *(.eh_frame) + + . = (. + 3) & ~ 3; + + /* C++ constructor and destructor tables, properly ordered: */ + + _sinit = ABSOLUTE(.); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + _einit = ABSOLUTE(.); + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + + /* C++ exception handlers table: */ + + __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); + *(.xt_except_desc) + *(.gnu.linkonce.h.*) + __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); + *(.xt_except_desc_end) + *(.dynamic) + *(.gnu.version_d) + . = ALIGN(4); /* This table MUST be 4-byte aligned */ + _erodata = ABSOLUTE(.); + /* Literals are also RO data. */ + _lit4_start = ABSOLUTE(.); + *(*.lit4) + *(.lit4.*) + *(.gnu.linkonce.lit4.*) + _lit4_end = ABSOLUTE(.); + . = ALIGN(4); + } >drom0_0_seg AT>ROM + /* Send .iram0 code to iram */ .iram0.vectors : @@ -46,7 +149,7 @@ SECTIONS *(.init.literal) *(.init) _init_end = ABSOLUTE(.); - } > iram0_0_seg + } >iram0_0_seg AT>ROM .iram0.text : { @@ -59,6 +162,7 @@ SECTIONS *libpp.a:(.literal .text .literal.* .text.*) *libhal.a:(.literal .text .literal.* .text.*) *libarch.a:esp32_spiflash.*(.literal .text .literal.* .text.*) + esp32_start.*(.literal .text .literal.* .text.*) *(.wifirxiram .wifirxiram.*) *(.wifirxiram .wifi0iram.*) *(.wifislpiram .wifislpiram.*) @@ -70,7 +174,7 @@ SECTIONS . = ALIGN (4); _siramheap = ABSOLUTE(.); - } > iram0_0_seg + } >iram0_0_seg AT>ROM /* Shared RAM */ @@ -94,7 +198,6 @@ SECTIONS *(.share.mem) *(.gnu.linkonce.b.*) *(COMMON) - *libarch.a:esp32_spiflash.*(.bss .bss.* COMMON) . = ALIGN(8); _ebss = ABSOLUTE(.); } >dram0_0_seg @@ -105,7 +208,10 @@ SECTIONS * or during the application's initialization sequence. */ + . = ALIGN(8); *(.noinit) + *(".noinit.*") + . = ALIGN(8); } >dram0_0_seg .dram0.data : @@ -126,13 +232,14 @@ SECTIONS KEEP (*(.jcr)) *(.dram1 .dram1.*) *libarch.a:esp32_spiflash.*(.rodata .rodata.*) - . = ALIGN(4); + esp32_start.*(.rodata .rodata.*) _edata = ABSOLUTE(.); + . = ALIGN(4); /* Heap starts at the end of .data */ _sheap = ABSOLUTE(.); - } >dram0_0_seg + } >dram0_0_seg AT>ROM /* External memory bss, from any global variable with EXT_RAM_ATTR attribute */ @@ -142,59 +249,24 @@ SECTIONS *(.extmem.bss .extmem.bss.*) . = ALIGN(4); _ebss_extmem = ABSOLUTE(.); - } > extmem_seg + } >extmem_seg - .flash.rodata : - { - _srodata = ABSOLUTE(.); - *(.rodata) - *(.rodata.*) - *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table) - *(.gcc_except_table.*) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - *(.eh_frame) + _image_irom_vma = ADDR(.flash.text); + _image_irom_lma = LOADADDR(.flash.text); + _image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_lma; - . = (. + 3) & ~ 3; + /* The alignment of the ".flash.text" output section is forced to + * 0x0000FFFF (64KB) to ensure that it will be allocated at the beginning + * of the next available Flash block. + * This is required to meet the following constraint from the external + * flash MMU: + * VMA % 64KB == LMA % 64KB + * i.e. the lower 16 bits of both the virtual address (address seen by the + * CPU) and the load address (physical address of the external flash) must + * be equal. + */ - /* C++ constructor and destructor tables, properly ordered: */ - - _sinit = ABSOLUTE(.); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - _einit = ABSOLUTE(.); - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - - /* C++ exception handlers table: */ - - __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - _erodata = ABSOLUTE(.); - /* Literals are also RO data. */ - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - . = ALIGN(4); - } >default_rodata_seg - - .flash.text : + .flash.text : ALIGN(0x0000FFFF) { _stext = .; _text_start = ABSOLUTE(.); @@ -203,15 +275,16 @@ SECTIONS *(.fini.literal) *(.fini) *(.gnu.version) + . = ALIGN(4); _text_end = ABSOLUTE(.); _etext = .; - } >default_code_seg + } >irom0_0_seg AT>ROM .rtc.text : { . = ALIGN(4); *(.rtc.literal .rtc.text) - } >rtc_iram_seg + } >rtc_iram_seg AT>ROM .rtc.data : { @@ -222,5 +295,5 @@ SECTIONS . = ALIGN (4); _srtcheap = ABSOLUTE(.); - } > rtc_slow_seg + } >rtc_slow_seg AT>ROM } diff --git a/boards/xtensa/esp32/common/src/Make.defs b/boards/xtensa/esp32/common/src/Make.defs index 928dbe0960f..7ff70219039 100644 --- a/boards/xtensa/esp32/common/src/Make.defs +++ b/boards/xtensa/esp32/common/src/Make.defs @@ -34,6 +34,10 @@ ifeq ($(CONFIG_ESP32_SPI),y) CSRCS += esp32_board_spi.c endif +ifeq ($(CONFIG_SPI_DRIVER),y) + CSRCS += esp32_board_spidev.c +endif + ifeq ($(CONFIG_ESP32_WIRELESS),y) CSRCS += esp32_board_wlan.c endif @@ -50,10 +54,18 @@ ifeq ($(CONFIG_CAN_MCP2515),y) CSRCS += esp32_mcp2515.c endif +ifeq ($(CONFIG_LCD_BACKPACK),y) + CSRCS += esp32_lcd_backpack.c +endif + ifeq ($(CONFIG_LCD_ILI9341),y) CSRCS += esp32_ili9341.c endif +ifeq ($(CONFIG_LCD_SSD1306_I2C),y) + CSRCS += esp32_ssd1306.c +endif + DEPPATH += --dep-path src VPATH += :src CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src) diff --git a/boards/xtensa/esp32/common/src/esp32_board_spidev.c b/boards/xtensa/esp32/common/src/esp32_board_spidev.c new file mode 100644 index 00000000000..1dad836adad --- /dev/null +++ b/boards/xtensa/esp32/common/src/esp32_board_spidev.c @@ -0,0 +1,72 @@ +/**************************************************************************** + * boards/xtensa/esp32/common/src/esp32_board_spidev.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include + +#include "esp32_spi.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_spidev_initialize + * + * Description: + * Initialize and register SPI driver for the specified SPI port. + * + ****************************************************************************/ + +int board_spidev_initialize(int port) +{ + int ret; + FAR struct spi_dev_s *spi; + + spiinfo("Initializing /dev/spi%d...\n", port); + + /* Initialize SPI device */ + + spi = esp32_spibus_initialize(port); + if (spi == NULL) + { + spierr("Failed to initialize SPI%d.\n", port); + return -ENODEV; + } + + ret = spi_register(spi, port); + if (ret < 0) + { + spierr("Failed to register /dev/spi%d: %d\n", port, ret); + + esp32_spibus_uninitialize(spi); + } + + return ret; +} diff --git a/boards/xtensa/esp32/common/src/esp32_board_wlan.c b/boards/xtensa/esp32/common/src/esp32_board_wlan.c index 76362d3f41e..0930648efc0 100644 --- a/boards/xtensa/esp32/common/src/esp32_board_wlan.c +++ b/boards/xtensa/esp32/common/src/esp32_board_wlan.c @@ -37,40 +37,12 @@ #include "esp32_wlan.h" /**************************************************************************** - * Private Functions + * Pre-processor Definitions ****************************************************************************/ -#ifdef CONFIG_ESP32_WIFI_SAVE_PARAM -static int esp32_init_wifi_storage(void) -{ - int ret; - const char *path = "/dev/mtdblock1"; - FAR struct mtd_dev_s *mtd_part; - - mtd_part = esp32_spiflash_alloc_mtdpart(); - if (!mtd_part) - { - syslog(LOG_ERR, "ERROR: Failed to alloc MTD partition of SPI Flash\n"); - return -1; - } - - ret = register_mtddriver(path, mtd_part, 0777, NULL); - if (ret < 0) - { - syslog(LOG_ERR, "ERROR: Failed to regitser MTD: %d\n", ret); - return -1; - } - - ret = nx_mount(path, CONFIG_ESP32_WIFI_FS_MOUNTPT, "spiffs", 0, NULL); - if (ret < 0) - { - syslog(LOG_ERR, "ERROR: Failed to mount the FS volume: %d\n", ret); - return ret; - } - - return 0; -} -#endif +/**************************************************************************** + * Private Functions + ****************************************************************************/ /**************************************************************************** * Public Functions @@ -92,20 +64,11 @@ int board_wlan_init(void) { int ret = OK; -#ifdef CONFIG_ESP32_WIFI_SAVE_PARAM - ret = esp32_init_wifi_storage(); - if (ret) - { - syslog(LOG_ERR, "ERROR: Failed to initialize WiFi storage\n"); - return ret; - } -#endif - #ifdef ESP32_WLAN_HAS_STA ret = esp32_wlan_sta_initialize(); if (ret) { - syslog(LOG_ERR, "ERROR: Failed to initialize WiFi station\n"); + wlerr("ERROR: Failed to initialize WiFi station\n"); return ret; } #endif @@ -114,7 +77,7 @@ int board_wlan_init(void) ret = esp32_wlan_softap_initialize(); if (ret) { - syslog(LOG_ERR, "ERROR: Failed to initialize WiFi softAP\n"); + wlerr("ERROR: Failed to initialize WiFi softAP\n"); return ret; } #endif diff --git a/boards/xtensa/esp32/common/src/esp32_lcd_backpack.c b/boards/xtensa/esp32/common/src/esp32_lcd_backpack.c new file mode 100644 index 00000000000..137165ba047 --- /dev/null +++ b/boards/xtensa/esp32/common/src/esp32_lcd_backpack.c @@ -0,0 +1,98 @@ +/**************************************************************************** + * boards/xtensa/esp32/common/src/esp32_lcd_backpack.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "esp32_board_i2c.h" +#include "esp32_i2c.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_backpack_init + * + * Description: + * Initialize the LCD1602 display controlled by Backpack with PCF8574 + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/slcd0" + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int board_lcd_backpack_init(int devno, int busno, int rows, int cols) +{ + FAR struct pcf8574_lcd_backpack_config_s cfg = + LCD_I2C_BACKPACK_CFG_SAINSMART; + FAR struct i2c_master_s *i2c; + char devpath[12]; + int ret; + + /* Setup the LCD row and cols size. + * Note: We are using the LCD_I2C_BACKPACK_CFG_SAINSMART config that + * defined the I2C Address to 0x27 to PCF8574. Double check if all + * the bits (pins) from PCF8574 connected to the LCD controller + * are correct with this LCD CFG definition. + */ + + cfg.rows = rows; + cfg.cols = cols; + + /* Initialize the I2C1 */ + + i2c = esp32_i2cbus_initialize(busno); + if (i2c == NULL) + { + return -ENODEV; + } + + /* Register the Segment LCD */ + + snprintf(devpath, 12, "/dev/slcd%d", devno); + ret = pcf8574_lcd_backpack_register(devpath, i2c, &cfg); + if (ret < 0) + { + lcderr("ERROR: pcf8574_lcd_backpack_register(%s) failed: %d\n", + devpath, ret); + return ret; + } + + return OK; +} diff --git a/boards/xtensa/esp32/common/src/esp32_ssd1306.c b/boards/xtensa/esp32/common/src/esp32_ssd1306.c new file mode 100644 index 00000000000..7cb8b7feb9a --- /dev/null +++ b/boards/xtensa/esp32/common/src/esp32_ssd1306.c @@ -0,0 +1,151 @@ +/**************************************************************************** + * boards/xtensa/esp32/common/src/esp32_ssd1306.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/* SSD1306 OLED over I2C */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#if defined(CONFIG_VIDEO_FB) && defined(CONFIG_LCD_FRAMEBUFFER) +# include +#endif + +#include "esp32_gpio.h" +#include "esp32_i2c.h" +#include "hardware/esp32_gpio_sigmap.h" + +#include "ttgo_lora_esp32.h" + +#ifdef HAVE_SSD1306 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define OLED_I2C_PORT 0 /* OLED display connected to I2C0 */ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static FAR struct lcd_dev_s *g_lcddev; + +/* Configuration ************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_lcd_initialize + ****************************************************************************/ + +int board_lcd_initialize(void) +{ + FAR struct i2c_master_s *i2c; + const int busno = OLED_I2C_PORT; + const int devno = 0; + int ret = OK; + + /* Configure the OLED GPIOs. This initial configuration is RESET low, + * putting the OLED into reset state. + */ + + esp32_gpio_matrix_out(GPIO_SSD1306_RST, SIG_GPIO_OUT_IDX, 0, 0); + esp32_configgpio(GPIO_SSD1306_RST, OUTPUT_FUNCTION_3 | INPUT_FUNCTION_3); + esp32_gpiowrite(GPIO_SSD1306_RST, 0); + + /* Wait a bit then release the OLED from the reset state */ + + up_mdelay(20); + esp32_gpiowrite(GPIO_SSD1306_RST, 1); + + /* Initialize I2C */ + + i2c = esp32_i2cbus_initialize(busno); + if (!i2c) + { + lcderr("ERROR: Failed to initialize I2C%d\n", busno); + return -ENODEV; + } + + /* Bind the I2C port to the OLED */ + + g_lcddev = ssd1306_initialize(i2c, NULL, devno); + if (!g_lcddev) + { + lcderr("ERROR: Failed to bind I2C%d to OLED %d\n", busno, devno); + return -ENODEV; + } + + lcdinfo("Bound I2C0 to OLED %d\n", devno); + + /* And turn the OLED on */ + + g_lcddev->setpower(g_lcddev, CONFIG_LCD_MAXPOWER); + +#if defined(CONFIG_VIDEO_FB) && defined(CONFIG_LCD_FRAMEBUFFER) + + /* Initialize and register the simulated framebuffer driver */ + + ret = fb_register(0, 0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: fb_register() failed: %d\n", ret); + return -ENODEV; + } +#endif + + return ret; +} + +/**************************************************************************** + * Name: board_lcd_getdev + ****************************************************************************/ + +FAR struct lcd_dev_s *board_lcd_getdev(int lcddev) +{ + if (lcddev == 0) + { + return g_lcddev; + } + + return NULL; +} + +/**************************************************************************** + * Name: board_lcd_uninitialize + ****************************************************************************/ + +void board_lcd_uninitialize(void) +{ +} + +#endif /* HAVE_SSD1306 */ diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig index 19d81b1b2c7..72e87bcba37 100644 --- a/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig +++ b/boards/xtensa/esp32/esp32-devkitc/configs/aes/defconfig @@ -9,6 +9,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-devkitc" CONFIG_ARCH_BOARD_ESP32_DEVKITC=y diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/autopm/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/autopm/defconfig index 867be758c43..0dccdd4e00a 100644 --- a/boards/xtensa/esp32/esp32-devkitc/configs/autopm/defconfig +++ b/boards/xtensa/esp32/esp32-devkitc/configs/autopm/defconfig @@ -9,6 +9,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-devkitc" CONFIG_ARCH_BOARD_ESP32_DEVKITC=y @@ -69,6 +70,7 @@ CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_PING=y CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USERMAIN_STACKSIZE=3072 CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_WIRELESS=y CONFIG_WIRELESS_WAPI=y diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/mcuboot_agent/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/mcuboot_agent/defconfig new file mode 100644 index 00000000000..dc20a5f3e44 --- /dev/null +++ b/boards/xtensa/esp32/esp32-devkitc/configs/mcuboot_agent/defconfig @@ -0,0 +1,87 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32-devkitc" +CONFIG_ARCH_BOARD_ESP32_DEVKITC=y +CONFIG_ARCH_CHIP="esp32" +CONFIG_ARCH_CHIP_ESP32=y +CONFIG_ARCH_CHIP_ESP32WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BOOT_MCUBOOT=y +CONFIG_BUILTIN=y +CONFIG_DEBUG_ASSERTIONS=y +CONFIG_DEBUG_ERROR=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_WARN=y +CONFIG_DRIVERS_IEEE80211=y +CONFIG_DRIVERS_WIRELESS=y +CONFIG_ESP32_APP_FORMAT_MCUBOOT=y +CONFIG_ESP32_SPIFLASH=y +CONFIG_ESP32_UART0=y +CONFIG_ESP32_WIRELESS=y +CONFIG_EXPERIMENTAL=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_HOST_MACOS=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_MCUBOOT_UPDATE_AGENT_EXAMPLE=y +CONFIG_MCUBOOT_UPDATE_AGENT_EXAMPLE_DL_BUFFER_SIZE=4096 +CONFIG_MM_REGIONS=3 +CONFIG_NAME_MAX=48 +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDEV_LATEINIT=y +CONFIG_NETDEV_PHY_IOCTL=y +CONFIG_NETDEV_WIRELESS_IOCTL=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=300 +CONFIG_NSH_MOTD=y +CONFIG_NSH_MOTD_STRING="Welcome to MCUboot support on NuttX!" +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PTHREAD_MUTEX_TYPES=y +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SIG_DEFAULT=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_DHCPC_RENEW=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_WIRELESS=y +CONFIG_WIRELESS_WAPI=y +CONFIG_WIRELESS_WAPI_CMDTOOL=y +CONFIG_WIRELESS_WAPI_STACKSIZE=4096 diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/mcuboot_confirm/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/mcuboot_confirm/defconfig new file mode 100644 index 00000000000..e0f3b66ff79 --- /dev/null +++ b/boards/xtensa/esp32/esp32-devkitc/configs/mcuboot_confirm/defconfig @@ -0,0 +1,55 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32-devkitc" +CONFIG_ARCH_BOARD_ESP32_DEVKITC=y +CONFIG_ARCH_CHIP="esp32" +CONFIG_ARCH_CHIP_ESP32=y +CONFIG_ARCH_CHIP_ESP32WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BOOT_MCUBOOT=y +CONFIG_BUILTIN=y +CONFIG_ESP32_APP_FORMAT_MCUBOOT=y +CONFIG_ESP32_ESPTOOL_TARGET_SECONDARY=y +CONFIG_ESP32_SPIFLASH=y +CONFIG_ESP32_UART0=y +CONFIG_EXPERIMENTAL=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_MCUBOOT_SLOT_CONFIRM_EXAMPLE=y +CONFIG_MM_REGIONS=3 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_MOTD=y +CONFIG_NSH_MOTD_STRING="Firmware OTA update successfully finished!" +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/mqttc/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/mqttc/defconfig index 9056169e5db..f22d81bfd76 100644 --- a/boards/xtensa/esp32/esp32-devkitc/configs/mqttc/defconfig +++ b/boards/xtensa/esp32/esp32-devkitc/configs/mqttc/defconfig @@ -9,6 +9,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-devkitc" CONFIG_ARCH_BOARD_ESP32_DEVKITC=y diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/sta_softap/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/sta_softap/defconfig index 7a8cb6eb83c..fdd2e6f167b 100644 --- a/boards/xtensa/esp32/esp32-devkitc/configs/sta_softap/defconfig +++ b/boards/xtensa/esp32/esp32-devkitc/configs/sta_softap/defconfig @@ -10,6 +10,7 @@ # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set # CONFIG_NSH_NETINIT is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-devkitc" CONFIG_ARCH_BOARD_ESP32_DEVKITC=y @@ -76,6 +77,7 @@ CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_PING=y CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USERMAIN_STACKSIZE=3072 CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_WIRELESS=y CONFIG_WIRELESS_WAPI=y diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/wapi/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/wapi/defconfig index dd903a985e5..dff24e83b0d 100644 --- a/boards/xtensa/esp32/esp32-devkitc/configs/wapi/defconfig +++ b/boards/xtensa/esp32/esp32-devkitc/configs/wapi/defconfig @@ -9,16 +9,33 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-devkitc" CONFIG_ARCH_BOARD_ESP32_DEVKITC=y CONFIG_ARCH_CHIP="esp32" CONFIG_ARCH_CHIP_ESP32=y CONFIG_ARCH_CHIP_ESP32WROVER=y +CONFIG_ARCH_INTERRUPTSTACK=2048 CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH_XTENSA=y CONFIG_BOARD_LOOPSPERMSEC=16717 CONFIG_BUILTIN=y +CONFIG_CLOCK_MONOTONIC=y +CONFIG_DEBUG_ASSERTIONS=y +CONFIG_DEBUG_ERROR=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_MM=y +CONFIG_DEBUG_MM_ERROR=y +CONFIG_DEBUG_MM_WARN=y +CONFIG_DEBUG_NET=y +CONFIG_DEBUG_NET_ERROR=y +CONFIG_DEBUG_NET_WARN=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_WARN=y +CONFIG_DEFAULT_TASK_STACKSIZE=4096 CONFIG_DEV_URANDOM=y CONFIG_DRIVERS_IEEE80211=y CONFIG_DRIVERS_WIRELESS=y @@ -29,22 +46,24 @@ CONFIG_ESP32_WIFI_SAVE_PARAM=y CONFIG_ESP32_WIRELESS=y CONFIG_FS_PROCFS=y CONFIG_FS_SPIFFS=y -CONFIG_HAVE_CXX=y -CONFIG_HAVE_CXXINITIALIZE=y CONFIG_IDLETHREAD_STACKSIZE=3072 CONFIG_INTELHEX_BINARY=y -CONFIG_LIBC_FLOATINGPOINT=y CONFIG_MM_REGIONS=3 CONFIG_NAME_MAX=48 CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_NAMESIZE=64 +CONFIG_NETDEVICES=y CONFIG_NETDEV_LATEINIT=y CONFIG_NETDEV_PHY_IOCTL=y CONFIG_NETDEV_WIRELESS_IOCTL=y +CONFIG_NETUTILS_IPERF=y +CONFIG_NETUTILS_TELNETD=y CONFIG_NET_BROADCAST=y CONFIG_NET_ETH_PKTSIZE=1518 CONFIG_NET_ICMP=y CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_NACTIVESOCKETS=32 +CONFIG_NET_STATISTICS=y CONFIG_NET_TCP=y CONFIG_NET_TCP_DELAYED_ACK=y CONFIG_NET_TCP_WRITE_BUFFERS=y @@ -66,15 +85,19 @@ CONFIG_SDCLONE_DISABLE=y CONFIG_SIG_DEFAULT=y CONFIG_SPI=y CONFIG_SPIFFS_NAME_MAX=48 +CONFIG_STACK_COLORATION=y CONFIG_START_DAY=6 CONFIG_START_MONTH=12 CONFIG_START_YEAR=2011 CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_PING=y +CONFIG_SYSTEM_STACKMONITOR=y +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +CONFIG_TELNET_CHARACTER_MODE=y +CONFIG_TELNET_IOTHREAD_STACKSIZE=2048 CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_WIRELESS=y CONFIG_WIRELESS_WAPI=y CONFIG_WIRELESS_WAPI_CMDTOOL=y -CONFIG_WIRELESS_WAPI_STACKSIZE=4096 diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/wapi_smp/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/wapi_smp/defconfig index ed3e4a301fb..f690dabdf27 100644 --- a/boards/xtensa/esp32/esp32-devkitc/configs/wapi_smp/defconfig +++ b/boards/xtensa/esp32/esp32-devkitc/configs/wapi_smp/defconfig @@ -9,6 +9,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-devkitc" CONFIG_ARCH_BOARD_ESP32_DEVKITC=y @@ -20,10 +21,12 @@ CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH_XTENSA=y CONFIG_BOARD_LOOPSPERMSEC=16717 CONFIG_BUILTIN=y +CONFIG_CODECS_HASH_MD5=y CONFIG_DEBUG_ASSERTIONS=y CONFIG_DEBUG_FEATURES=y CONFIG_DEBUG_FULLOPT=y CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEV_URANDOM=y CONFIG_DRIVERS_IEEE80211=y CONFIG_DRIVERS_WIRELESS=y CONFIG_ESP32_MTD_SIZE=0x80000 @@ -32,6 +35,7 @@ CONFIG_ESP32_UART0=y CONFIG_ESP32_WIFI_SAVE_PARAM=y CONFIG_ESP32_WIRELESS=y CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_WEBSERVER=y CONFIG_FS_PROCFS=y CONFIG_FS_SPIFFS=y CONFIG_HAVE_CXX=y @@ -42,25 +46,35 @@ CONFIG_IOB_NBUFFERS=128 CONFIG_MM_REGIONS=4 CONFIG_NAME_MAX=48 CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_NAMESIZE=64 CONFIG_NETDEVICES=y CONFIG_NETDEV_LATEINIT=y CONFIG_NETDEV_PHY_IOCTL=y CONFIG_NETDEV_WIRELESS_IOCTL=y +CONFIG_NETUTILS_CODECS=y +CONFIG_NETUTILS_HTTPD_DIRLIST=y +CONFIG_NETUTILS_HTTPD_SENDFILE=y CONFIG_NETUTILS_IPERF=y CONFIG_NETUTILS_TELNETD=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NETUTILS_WEBSERVER=y CONFIG_NET_BROADCAST=y -CONFIG_NET_ETH_PKTSIZE=1514 +CONFIG_NET_ETH_PKTSIZE=1518 CONFIG_NET_ICMP=y CONFIG_NET_ICMP_SOCKET=y CONFIG_NET_STATISTICS=y CONFIG_NET_TCP=y +CONFIG_NET_TCP_WRITE_BUFFERS=y CONFIG_NET_UDP=y +CONFIG_NFS=y CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_CODECS_BUFSIZE=2048 CONFIG_NSH_FILEIOSIZE=512 -CONFIG_NSH_LINELEN=64 +CONFIG_NSH_LINELEN=300 CONFIG_NSH_READLINE=y CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=3072 +CONFIG_NSH_WGET_BUFF_SIZE=2048 CONFIG_PREALLOC_TIMERS=4 CONFIG_PTHREAD_MUTEX_TYPES=y CONFIG_RAM_SIZE=114688 @@ -68,6 +82,10 @@ CONFIG_RAM_START=0x20000000 CONFIG_RAW_BINARY=y CONFIG_READLINE_CMD_HISTORY=y CONFIG_RR_INTERVAL=200 +CONFIG_RTC=y +CONFIG_RTC_ALARM=y +CONFIG_RTC_DRIVER=y +CONFIG_RTC_NALARMS=2 CONFIG_SCHED_LPWORK=y CONFIG_SDCLONE_DISABLE=y CONFIG_SIG_DEFAULT=y @@ -82,9 +100,11 @@ CONFIG_START_YEAR=2021 CONFIG_SYSLOG_TIMESTAMP=y CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_NTPC=y CONFIG_SYSTEM_PING=y CONFIG_SYSTEM_SYSTEM=y CONFIG_SYSTEM_TASKSET=y +CONFIG_TELNET_IOTHREAD_STACKSIZE=1280 CONFIG_TESTING_GETPRIME=y CONFIG_TESTING_OSTEST=y CONFIG_TESTING_SMP=y diff --git a/boards/xtensa/esp32/esp32-devkitc/configs/wifinsh/defconfig b/boards/xtensa/esp32/esp32-devkitc/configs/wifinsh/defconfig new file mode 100644 index 00000000000..d3391b6982b --- /dev/null +++ b/boards/xtensa/esp32/esp32-devkitc/configs/wifinsh/defconfig @@ -0,0 +1,88 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32-devkitc" +CONFIG_ARCH_BOARD_ESP32_DEVKITC=y +CONFIG_ARCH_CHIP="esp32" +CONFIG_ARCH_CHIP_ESP32=y +CONFIG_ARCH_CHIP_ESP32WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_DEV_URANDOM=y +CONFIG_DRIVERS_IEEE80211=y +CONFIG_DRIVERS_WIRELESS=y +CONFIG_ESP32_MTD_SIZE=0x80000 +CONFIG_ESP32_SPIFLASH=y +CONFIG_ESP32_UART0=y +CONFIG_ESP32_WIFI_SAVE_PARAM=y +CONFIG_ESP32_WIRELESS=y +CONFIG_FS_PROCFS=y +CONFIG_FS_SPIFFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_MM_REGIONS=3 +CONFIG_NAME_MAX=48 +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_NAMESIZE=64 +CONFIG_NETDEVICES=y +CONFIG_NETDEV_LATEINIT=y +CONFIG_NETDEV_PHY_IOCTL=y +CONFIG_NETDEV_WIRELESS_IOCTL=y +CONFIG_NETINIT_DHCPC=y +CONFIG_NETINIT_DRIPADDR=0xc0a80001 +CONFIG_NETINIT_WAPI_PASSPHRASE="YOUR_ROUTER_PASSWORD" +CONFIG_NETINIT_WAPI_SSID="YOUR_ROUTER_NAME" +CONFIG_NETUTILS_TELNETD=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ETH_PKTSIZE=1518 +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_TCP=y +CONFIG_NET_TCP_DELAYED_ACK=y +CONFIG_NET_TCP_WRITE_BUFFERS=y +CONFIG_NET_UDP=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=300 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PTHREAD_MUTEX_TYPES=y +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SIG_DEFAULT=y +CONFIG_SPI=y +CONFIG_SPIFFS_NAME_MAX=48 +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_DHCPC_RENEW=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USERMAIN_STACKSIZE=3072 +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_WIRELESS=y +CONFIG_WIRELESS_WAPI=y +CONFIG_WIRELESS_WAPI_CMDTOOL=y +CONFIG_WIRELESS_WAPI_STACKSIZE=4096 diff --git a/boards/xtensa/esp32/esp32-devkitc/include/board.h b/boards/xtensa/esp32/esp32-devkitc/include/board.h index 2afaef90fde..6b645d993b6 100644 --- a/boards/xtensa/esp32/esp32-devkitc/include/board.h +++ b/boards/xtensa/esp32/esp32-devkitc/include/board.h @@ -18,8 +18,8 @@ * ****************************************************************************/ -#ifndef __BOARDS_XTENSA_ESP32_ESP32_CORE_INCLUDE_BOARD_H -#define __BOARDS_XTENSA_ESP32_ESP32_CORE_INCLUDE_BOARD_H +#ifndef __BOARDS_XTENSA_ESP32_ESP32_DEVKITC_INCLUDE_BOARD_H +#define __BOARDS_XTENSA_ESP32_ESP32_DEVKITC_INCLUDE_BOARD_H /**************************************************************************** * Pre-processor Definitions @@ -82,4 +82,4 @@ #define BOARD_NGPIOIN 1 /* Amount of GPIO Input without Interruption */ #define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */ -#endif /* __BOARDS_XTENSA_ESP32_ESP32_CORE_INCLUDE_BOARD_H */ +#endif /* __BOARDS_XTENSA_ESP32_ESP32_DEVKITC_INCLUDE_BOARD_H */ diff --git a/boards/xtensa/esp32/esp32-devkitc/scripts/Make.defs b/boards/xtensa/esp32/esp32-devkitc/scripts/Make.defs index bf8cc21f100..bad022ca9c8 100644 --- a/boards/xtensa/esp32/esp32-devkitc/scripts/Make.defs +++ b/boards/xtensa/esp32/esp32-devkitc/scripts/Make.defs @@ -23,16 +23,42 @@ include $(TOPDIR)/tools/Config.mk include $(TOPDIR)/tools/esp32/Config.mk include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs -LDSCRIPT1 = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld -LDSCRIPT2 = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld -LDSCRIPT3 = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +# Pick the linker scripts from the board level if they exist, if not +# pick the common linker scripts. + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld),) + LDSCRIPT_ROM = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +else + LDSCRIPT_ROM = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +endif + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld),) + LDSCRIPT_SECT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld +else + ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) + LDSCRIPT_SECT = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_mcuboot.ld + else + LDSCRIPT_SECT = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32.ld + endif +endif + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld),) + LDSCRIPT_TEMPLATE = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld +else + LDSCRIPT_TEMPLATE = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld +endif + +# This is the generated memory layout linker script. It will always be +# generated at the board level. + +LDSCRIPT_MEMORY = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld ifeq ($(CONFIG_CYGWIN_WINTOOL),y) - ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT1)}" - ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT2)}" - ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT3)}" + ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT_MEMORY)}" + ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT_SECT)}" + ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT_ROM)}" else - ARCHSCRIPT = -T$(LDSCRIPT1) -T$(LDSCRIPT2) -T$(LDSCRIPT3) + ARCHSCRIPT = -T$(LDSCRIPT_MEMORY) -T$(LDSCRIPT_SECT) -T$(LDSCRIPT_ROM) endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) @@ -89,8 +115,6 @@ else LDELFFLAGS += -T $(TOPDIR)$(DELIM)binfmt$(DELIM)libelf$(DELIM)gnu-elf.ld endif -LDFLAGS += -nostartfiles -nodefaultlibs - ifeq ($(CONFIG_CYGWIN_WINTOOL),y) LDFLAGS += -Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" --cref else diff --git a/boards/xtensa/esp32/esp32-devkitc/scripts/esp32.template.ld b/boards/xtensa/esp32/esp32-devkitc/scripts/esp32.template.ld deleted file mode 100644 index ac974b379c6..00000000000 --- a/boards/xtensa/esp32/esp32-devkitc/scripts/esp32.template.ld +++ /dev/null @@ -1,94 +0,0 @@ -/**************************************************************************** - * boards/xtensa/esp32/esp32-devkitc/scripts/esp32.template.ld - * ESP32 Linker Script Memory Layout - * - * This file describes the memory layout (memory blocks) as virtual - * memory addresses. - * - * esp32.common.ld contains output sections to link compiler output - * into these memory blocks. - * - * NOTE: That this is not the actual linker script but rather a "template" - * for the elf32_out.ld script. This template script is passed through - * the C preprocessor to include selected configuration options. - * - ****************************************************************************/ - -#include - -MEMORY -{ - /* All these values assume the flash cache is on, and have the blocks this - * uses subtracted from the length of the various regions. The 'data access - * port' dram/drom regions map to the same iram/irom regions but are - * connected to the data port of the CPU and eg allow bytewise access. - */ - - /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ - - iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 - - /* Flash mapped instruction data. - * - * The 0x20 offset is a convenience for the app binary image generation. - * Flash cache has 64KB pages. The .bin file which is flashed to the chip - * has a 0x18 byte file header, and each segment has a 0x08 byte segment - * header. Setting this offset makes it simple to meet the flash cache MMU's - * constraint that (paddr % 64KB == vaddr % 64KB).) - */ - - irom0_0_seg (RX) : org = 0x400d0020, len = 0x330000 - 0x20 - - /* Shared data RAM, excluding memory reserved for ROM bss/data/stack. - * Enabling Bluetooth & Trace Memory features in menuconfig will decrease - * the amount of RAM available. - * - * Note: The length of this section should be 0x50000, and this extra - * DRAM is available in heap at runtime. However due to static ROM memory - * usage at this 176KB mark, the additional static memory temporarily cannot - * be used. - */ - - dram0_0_seg (RW) : org = 0x3ffb0000 + CONFIG_ESP32_BT_RESERVE_DRAM, - len = 0x2c200 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM - CONFIG_ESP32_BT_RESERVE_DRAM - - /* Flash mapped constant data */ - - drom0_0_seg (R) : org = 0x3f400020, len = 0x400000 - 0x20 - - /* RTC fast memory (executable). Persists over deep sleep. */ - - rtc_iram_seg(RWX) : org = 0x400c0000, len = 0x2000 - - /* RTC slow memory (data accessible). Persists over deep sleep. - * Start of RTC slow memory is reserved for ULP co-processor code + data, - * if enabled. - */ - - rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM, - len = 0x1000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM - - /* External memory, including data and text */ - - extmem_seg(RWX) : org = 0x3f800000, len = 0x400000 -} - -#if CONFIG_ESP32_DEVKIT_RUN_IRAM - REGION_ALIAS("default_rodata_seg", dram0_0_seg); - REGION_ALIAS("default_code_seg", iram0_0_seg); -#else - REGION_ALIAS("default_rodata_seg", drom0_0_seg); - REGION_ALIAS("default_code_seg", irom0_0_seg); -#endif /* CONFIG_ESP32_DEVKIT_RUN_IRAM */ - -/* Heap ends at top of dram0_0_seg */ - -_eheap = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM; - -/* IRAM heap ends at top of dram0_0_seg */ - -_eiramheap = 0x400a0000; - -/* Mark the end of the RTC heap (top of the RTC region) */ - -_ertcheap = 0x50001fff; diff --git a/boards/xtensa/esp32/esp32-devkitc/src/Make.defs b/boards/xtensa/esp32/esp32-devkitc/src/Make.defs index 839b9a5b2af..a3ef9b5ce17 100644 --- a/boards/xtensa/esp32/esp32-devkitc/src/Make.defs +++ b/boards/xtensa/esp32/esp32-devkitc/src/Make.defs @@ -20,8 +20,6 @@ include $(TOPDIR)/Make.defs -SCRIPTDIR = $(BOARD_DIR)$(DELIM)scripts - CONFIGFILE = $(TOPDIR)$(DELIM)include$(DELIM)nuttx$(DELIM)config.h CSRCS = esp32_boot.c esp32_bringup.c @@ -53,13 +51,12 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y) CSRCS += esp32_buttons.c endif -SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32.template.ld -SCRIPTOUT = $(SCRIPTDIR)$(DELIM)esp32_out.ld +SCRIPTOUT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld .PHONY = context distclean -$(SCRIPTOUT): $(SCRIPTIN) $(CONFIGFILE) - $(Q) $(CC) -isystem $(TOPDIR)/include -C -P -x c -E $(SCRIPTIN) -o $@ +$(SCRIPTOUT): $(LDSCRIPT_TEMPLATE) $(CONFIGFILE) + $(Q) $(CC) -isystem $(TOPDIR)/include -C -P -x c -E $(LDSCRIPT_TEMPLATE) -o $@ context:: $(SCRIPTOUT) diff --git a/boards/xtensa/esp32/esp32-devkitc/src/esp32-devkitc.h b/boards/xtensa/esp32/esp32-devkitc/src/esp32-devkitc.h index f32b33e6380..6ed828ef0cc 100644 --- a/boards/xtensa/esp32/esp32-devkitc/src/esp32-devkitc.h +++ b/boards/xtensa/esp32/esp32-devkitc/src/esp32-devkitc.h @@ -18,8 +18,8 @@ * ****************************************************************************/ -#ifndef __BOARDS_XTENSA_ESP32_ESP32_CORE_SRC_ESP32_CORE_H -#define __BOARDS_XTENSA_ESP32_ESP32_CORE_SRC_ESP32_CORE_H +#ifndef __BOARDS_XTENSA_ESP32_ESP32_DEVKITC_SRC_ESP32_DEVKITC_H +#define __BOARDS_XTENSA_ESP32_ESP32_DEVKITC_SRC_ESP32_DEVKITC_H /**************************************************************************** * Included Files @@ -136,5 +136,24 @@ void esp32_spiflash_encrypt_test(void); int esp32_gpio_init(void); #endif +/**************************************************************************** + * Name: board_spidev_initialize + * + * Description: + * Initialize SPI driver and register the /dev/spi device. + * + * Input Parameters: + * bus - The SPI bus number, used to build the device path as /dev/spiN + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_SPI_DRIVER +int board_spidev_initialize(int bus); +#endif + #endif /* __ASSEMBLY__ */ -#endif /* __BOARDS_XTENSA_ESP32_ESP32_CORE_SRC_ESP32_CORE_H */ +#endif /* __BOARDS_XTENSA_ESP32_ESP32_DEVKITC_SRC_ESP32_DEVKITC_H */ diff --git a/boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c b/boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c index a7d63a420fb..77db8c52cf3 100644 --- a/boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c +++ b/boards/xtensa/esp32/esp32-devkitc/src/esp32_bringup.c @@ -94,6 +94,14 @@ # include "esp32_rtc_lowerhalf.h" #endif +#ifdef CONFIG_SPI_DRIVER +# include "esp32_spi.h" +#endif + +#ifdef CONFIG_LCD_BACKPACK +# include "esp32_lcd_backpack.h" +#endif + #include "esp32-devkitc.h" /**************************************************************************** @@ -154,6 +162,16 @@ int esp32_bringup(void) } #endif +#ifdef CONFIG_LCD_BACKPACK + /* slcd:0, i2c:0, rows=2, cols=16 */ + + ret = board_lcd_backpack_init(0, 0, 2, 16); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize PCF8574 LCD, error %d\n", ret); + } +#endif + #ifdef CONFIG_FS_TMPFS /* Mount the tmpfs file system */ @@ -170,7 +188,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize SD slot: %d\n", ret); - return ret; } #endif @@ -184,7 +201,6 @@ int esp32_bringup(void) if (ret) { syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n"); - return ret; } #endif @@ -194,7 +210,6 @@ int esp32_bringup(void) { syslog(LOG_ERR, "ERROR: Failed to initialize partition error=%d\n", ret); - return ret; } #endif @@ -212,7 +227,6 @@ int esp32_bringup(void) { syslog(LOG_ERR, "ERROR: Failed to initialize wireless subsystem=%d\n", ret); - return ret; } #endif @@ -229,7 +243,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -240,7 +253,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -251,7 +263,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -262,7 +273,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -317,7 +327,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret); - return ret; } #endif @@ -329,7 +338,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize I2C Driver for I2C0: %d\n", ret); - return ret; } #endif @@ -339,7 +347,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize I2C Driver for I2C1: %d\n", ret); - return ret; } #endif @@ -353,7 +360,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize BMP180 driver: %d\n", ret); - return ret; } #endif @@ -365,7 +371,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize HT16K33 driver: %d\n", ret); - return ret; } #endif @@ -390,6 +395,17 @@ int esp32_bringup(void) } #endif +#ifdef CONFIG_SPI_DRIVER +# ifdef CONFIG_ESP32_SPI2 + ret = board_spidev_initialize(ESP32_SPI2); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize SPI%d driver: %d\n", + ESP32_SPI2, ret); + } +# endif +#endif + /* If we got here then perhaps not all initialization was successful, but * at least enough succeeded to bring-up NSH with perhaps reduced * capabilities. diff --git a/boards/xtensa/esp32/esp32-devkitc/src/esp32_buttons.c b/boards/xtensa/esp32/esp32-devkitc/src/esp32_buttons.c index 6d4ee4553cb..c7edceab166 100644 --- a/boards/xtensa/esp32/esp32-devkitc/src/esp32_buttons.c +++ b/boards/xtensa/esp32/esp32-devkitc/src/esp32_buttons.c @@ -35,7 +35,6 @@ #include #include -#include "esp32_cpuint.h" #include "esp32_gpio.h" #include "esp32-devkitc.h" diff --git a/boards/xtensa/esp32/esp32-devkitc/src/esp32_gpio.c b/boards/xtensa/esp32/esp32-devkitc/src/esp32_gpio.c index 8b2cd41c42f..e5c8d9bed07 100644 --- a/boards/xtensa/esp32/esp32-devkitc/src/esp32_gpio.c +++ b/boards/xtensa/esp32/esp32-devkitc/src/esp32_gpio.c @@ -327,7 +327,6 @@ static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable) int esp32_gpio_init(void) { int i; - int pincount = 0; #if BOARD_NGPIOOUT > 0 for (i = 0; i < BOARD_NGPIOOUT; i++) @@ -337,20 +336,17 @@ int esp32_gpio_init(void) g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN; g_gpout[i].gpio.gp_ops = &gpout_ops; g_gpout[i].id = i; - gpio_pin_register(&g_gpout[i].gpio, pincount); + gpio_pin_register(&g_gpout[i].gpio, i); /* Configure the pins that will be used as output */ esp32_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0); - esp32_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_3); + esp32_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_3 | + INPUT_FUNCTION_3); esp32_gpiowrite(g_gpiooutputs[i], 0); - - pincount++; } #endif - pincount = 0; - #if BOARD_NGPIOIN > 0 for (i = 0; i < BOARD_NGPIOIN; i++) { @@ -359,18 +355,14 @@ int esp32_gpio_init(void) g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN; g_gpin[i].gpio.gp_ops = &gpin_ops; g_gpin[i].id = i; - gpio_pin_register(&g_gpin[i].gpio, pincount); + gpio_pin_register(&g_gpin[i].gpio, i); /* Configure the pins that will be used as INPUT */ esp32_configgpio(g_gpioinputs[i], INPUT_FUNCTION_3); - - pincount++; } #endif - pincount = 0; - #if BOARD_NGPIOINT > 0 for (i = 0; i < BOARD_NGPIOINT; i++) { @@ -379,13 +371,11 @@ int esp32_gpio_init(void) g_gpint[i].esp32gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN; g_gpint[i].esp32gpio.gpio.gp_ops = &gpint_ops; g_gpint[i].esp32gpio.id = i; - gpio_pin_register(&g_gpint[i].esp32gpio.gpio, pincount); + gpio_pin_register(&g_gpint[i].esp32gpio.gpio, i); /* Configure the pins that will be used as interrupt input */ esp32_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_3 | PULLDOWN); - - pincount++; } #endif diff --git a/boards/xtensa/esp32/esp32-devkitc/src/esp32_spiflash.c b/boards/xtensa/esp32/esp32-devkitc/src/esp32_spiflash.c index 2ccba641ead..922322deb2f 100644 --- a/boards/xtensa/esp32/esp32-devkitc/src/esp32_spiflash.c +++ b/boards/xtensa/esp32/esp32-devkitc/src/esp32_spiflash.c @@ -35,10 +35,447 @@ #include #include #include +#ifdef CONFIG_BCH +#include +#endif #include "esp32_spiflash.h" #include "esp32-devkitc.h" +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0])) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION + +struct ota_partition_s +{ + uint32_t offset; /* Partition offset from the beginning of MTD */ + uint32_t size; /* Partition size in bytes */ + const char *devpath; /* Partition device path */ +}; + +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static int init_ota_partitions(void); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static const struct ota_partition_s g_ota_partition_table[] = +{ + { + .offset = CONFIG_ESP32_OTA_PRIMARY_SLOT_OFFSET, + .size = CONFIG_ESP32_OTA_SLOT_SIZE, + .devpath = CONFIG_ESP32_OTA_PRIMARY_SLOT_DEVPATH + }, + { + .offset = CONFIG_ESP32_OTA_SECONDARY_SLOT_OFFSET, + .size = CONFIG_ESP32_OTA_SLOT_SIZE, + .devpath = CONFIG_ESP32_OTA_SECONDARY_SLOT_DEVPATH + }, + { + .offset = CONFIG_ESP32_OTA_SCRATCH_OFFSET, + .size = CONFIG_ESP32_OTA_SCRATCH_SIZE, + .devpath = CONFIG_ESP32_OTA_SCRATCH_DEVPATH + } +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static int init_ota_partitions(void) +{ + FAR struct mtd_dev_s *mtd; +#ifdef CONFIG_BCH + char blockdev[18]; +#endif + int ret = OK; + + for (int i = 0; i < ARRAYSIZE(g_ota_partition_table); ++i) + { + const struct ota_partition_s *part = &g_ota_partition_table[i]; + mtd = esp32_spiflash_alloc_mtdpart(part->offset, part->size); + + ret = ftl_initialize(i, mtd); + if (ret < 0) + { + ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#ifdef CONFIG_BCH + snprintf(blockdev, 18, "/dev/mtdblock%d", i); + + ret = bchdev_register(blockdev, part->devpath, false); + if (ret < 0) + { + ferr("ERROR: bchdev_register %s failed: %d\n", part->devpath, ret); + return ret; + } +#endif + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_smartfs + * + * Description: + * Provide a block driver wrapper around MTD partition and mount a + * SMART FS over it. + * + * Parameters: + * smartn - Number used to register the mtd partition: /dev/smartx, where + * x = smartn. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) +static int setup_smartfs(int smartn, FAR struct mtd_dev_s *mtd, + const char *mnt_pt) +{ + int ret = OK; + char path[22]; + + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + finfo("smart_initialize failed, Trying to erase first...\n"); + ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); + if (ret < 0) + { + ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); + return ret; + } + + finfo("Erase successful, initializing it again.\n"); + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: smart_initialize failed: %d\n", ret); + return ret; + } + } + + if (mnt_pt != NULL) + { + snprintf(path, sizeof(path), "/dev/smart%d", smartn); + + ret = nx_mount(path, mnt_pt, "smartfs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_littlefs + * + * Description: + * Register a mtd driver and mount a Little FS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_LITTLEFS) +static int setup_littlefs(const char *path, FAR struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, NULL); + if (ret < 0) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, "forceformat"); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + } + + return OK; +} + +#endif + +/**************************************************************************** + * Name: setup_spiffs + * + * Description: + * Register a mtd driver and mount a SPIFFS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_SPIFFS) +static int setup_spiffs(const char *path, FAR struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "spiffs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_nxffs + * + * Description: + * Register a mtd driver and mount a SPIFFS over it. + * + * Parameters: + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_NXFFS) +static int setup_nxffs(FAR struct mtd_dev_s *mtd, const char *mnt_pt) +{ + int ret = OK; + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + ferr("ERROR: NXFFS init failed: %d\n", ret); + return ret; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(NULL, mnt_pt, "nxffs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif +/**************************************************************************** + * Name: init_wifi_partition + * + * Description: + * Initialize partition that is dedicated to Wi-Fi. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_WIFI_SAVE_PARAM) +static int init_wifi_partition(void) +{ + int ret = OK; + FAR struct mtd_dev_s *mtd; + + mtd = esp32_spiflash_alloc_mtdpart(CONFIG_ESP32_WIFI_MTD_OFFSET, + CONFIG_ESP32_WIFI_MTD_SIZE); + if (!mtd) + { + ferr("ERROR: Failed to alloc MTD partition of SPI Flash\n"); + return ERROR; + } + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) + + ret = setup_smartfs(1, mtd, CONFIG_ESP32_WIFI_FS_MOUNTPT); + if (ret < 0) + { + ferr("ERROR: Failed to setup smartfs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_LITTLEFS) + + const char *path = "/dev/mtdblock1"; + ret = setup_littlefs(path, mtd, CONFIG_ESP32_WIFI_FS_MOUNTPT, 0777); + if (ret < 0) + { + ferr("ERROR: Failed to setup littlefs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_SPIFFS) + + const char *path = "/dev/mtdblock1"; + ret = setup_spiffs(path, mtd, CONFIG_ESP32_WIFI_FS_MOUNTPT, 0777); + if (ret < 0) + { + ferr("ERROR: Failed to setup spiffs\n"); + return ret; + } + +#else + + ferr("ERROR: No supported FS selected. Wi-Fi partition " + "should be mounted before Wi-Fi initialization\n"); + +#endif + + return ret; +} + +#endif +/**************************************************************************** + * Name: init_storage_partition + * + * Description: + * Initialize partition that is dedicated to general use. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int init_storage_partition(void) +{ + int ret = OK; + FAR struct mtd_dev_s *mtd; + + mtd = esp32_spiflash_alloc_mtdpart(CONFIG_ESP32_MTD_OFFSET, + CONFIG_ESP32_MTD_SIZE); + if (!mtd) + { + ferr("ERROR: Failed to alloc MTD partition of SPI Flash\n"); + return ERROR; + } + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) + + ret = setup_smartfs(0, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to setup smartfs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_NXFFS) + + ret = setup_nxffs(mtd, "/mnt"); + if (ret < 0) + { + ferr("ERROR: Failed to setup nxffs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_LITTLEFS) + + const char *path = "/dev/esp32flash"; + ret = setup_littlefs(path, mtd, NULL, 0755); + if (ret < 0) + { + ferr("ERROR: Failed to setup littlefs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_SPIFFS) + + const char *path = "/dev/esp32flash"; + ret = setup_spiffs(path, mtd, NULL, 0755); + if (ret < 0) + { + ferr("ERROR: Failed to setup spiffs\n"); + return ret; + } + +#else + + ret = register_mtddriver("/dev/esp32flash", mtd, 0755, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ret; + } + +#endif + + return ret; +} + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -52,49 +489,30 @@ int esp32_spiflash_init(void) { - FAR struct mtd_dev_s *mtd; - int ret = ERROR; + int ret = OK; - mtd = esp32_spiflash_alloc_mtdpart(); - -#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) - ret = smart_initialize(0, mtd, NULL); +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION + ret = init_ota_partitions(); if (ret < 0) { - finfo("smart_initialize failed, Trying to erase first...\n"); - ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); - if (ret < 0) - { - ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); - return ret; - } - - finfo("Erase successful, initializing again\n"); - ret = smart_initialize(0, mtd, NULL); - if (ret < 0) - { - ferr("ERROR: smart_initialize failed: %d\n", ret); - return ret; - } - } - -#elif defined (CONFIG_ESP32_SPIFLASH_NXFFS) - ret = nxffs_initialize(mtd); - if (ret < 0) - { - ferr("ERROR: NXFFS init failed: %d\n", ret); - return ret; - } - -#else - ret = register_mtddriver("/dev/esp32flash", mtd, 0755, NULL); - if (ret < 0) - { - ferr("ERROR: Register mtd failed: %d\n", ret); return ret; } #endif +#ifdef CONFIG_ESP32_WIFI_SAVE_PARAM + ret = init_wifi_partition(); + if (ret < 0) + { + return ret; + } +#endif + + ret = init_storage_partition(); + if (ret < 0) + { + return ret; + } + return ret; } diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/configs/autopm/defconfig b/boards/xtensa/esp32/esp32-ethernet-kit/configs/autopm/defconfig index 6d770f63750..327d5094f7f 100644 --- a/boards/xtensa/esp32/esp32-ethernet-kit/configs/autopm/defconfig +++ b/boards/xtensa/esp32/esp32-ethernet-kit/configs/autopm/defconfig @@ -8,6 +8,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-ethernet-kit" CONFIG_ARCH_BOARD_ESP32_ETHERNETKIT=y @@ -68,6 +69,7 @@ CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_PING=y CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USERMAIN_STACKSIZE=3072 CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_WIRELESS=y CONFIG_WIRELESS_WAPI=y diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/configs/mcuboot_agent/defconfig b/boards/xtensa/esp32/esp32-ethernet-kit/configs/mcuboot_agent/defconfig new file mode 100644 index 00000000000..f0fa00f72f9 --- /dev/null +++ b/boards/xtensa/esp32/esp32-ethernet-kit/configs/mcuboot_agent/defconfig @@ -0,0 +1,85 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32-ethernet-kit" +CONFIG_ARCH_BOARD_ESP32_ETHERNETKIT=y +CONFIG_ARCH_CHIP="esp32" +CONFIG_ARCH_CHIP_ESP32=y +CONFIG_ARCH_CHIP_ESP32WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BOOT_MCUBOOT=y +CONFIG_BUILTIN=y +CONFIG_DEBUG_ASSERTIONS=y +CONFIG_DEBUG_ERROR=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_WARN=y +CONFIG_DRIVERS_IEEE80211=y +CONFIG_DRIVERS_WIRELESS=y +CONFIG_ESP32_APP_FORMAT_MCUBOOT=y +CONFIG_ESP32_SPIFLASH=y +CONFIG_ESP32_UART0=y +CONFIG_ESP32_WIRELESS=y +CONFIG_EXPERIMENTAL=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_MCUBOOT_UPDATE_AGENT_EXAMPLE=y +CONFIG_MCUBOOT_UPDATE_AGENT_EXAMPLE_DL_BUFFER_SIZE=4096 +CONFIG_MM_REGIONS=3 +CONFIG_NAME_MAX=48 +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDEV_LATEINIT=y +CONFIG_NETDEV_PHY_IOCTL=y +CONFIG_NETDEV_WIRELESS_IOCTL=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=300 +CONFIG_NSH_MOTD=y +CONFIG_NSH_MOTD_STRING="Welcome to MCUboot support on NuttX!" +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PTHREAD_MUTEX_TYPES=y +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SIG_DEFAULT=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_DHCPC_RENEW=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_WIRELESS=y +CONFIG_WIRELESS_WAPI=y +CONFIG_WIRELESS_WAPI_CMDTOOL=y +CONFIG_WIRELESS_WAPI_STACKSIZE=4096 diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/configs/mcuboot_confirm/defconfig b/boards/xtensa/esp32/esp32-ethernet-kit/configs/mcuboot_confirm/defconfig new file mode 100644 index 00000000000..8214f79e2b9 --- /dev/null +++ b/boards/xtensa/esp32/esp32-ethernet-kit/configs/mcuboot_confirm/defconfig @@ -0,0 +1,54 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32-ethernet-kit" +CONFIG_ARCH_BOARD_ESP32_ETHERNETKIT=y +CONFIG_ARCH_CHIP="esp32" +CONFIG_ARCH_CHIP_ESP32=y +CONFIG_ARCH_CHIP_ESP32WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BOOT_MCUBOOT=y +CONFIG_BUILTIN=y +CONFIG_ESP32_APP_FORMAT_MCUBOOT=y +CONFIG_ESP32_ESPTOOL_TARGET_SECONDARY=y +CONFIG_ESP32_SPIFLASH=y +CONFIG_ESP32_UART0=y +CONFIG_EXPERIMENTAL=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_MCUBOOT_SLOT_CONFIRM_EXAMPLE=y +CONFIG_MM_REGIONS=3 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_MOTD=y +CONFIG_NSH_MOTD_STRING="Firmware OTA update successfully finished!" +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/configs/wapi/defconfig b/boards/xtensa/esp32/esp32-ethernet-kit/configs/wapi/defconfig index e32bf6818d9..fad8d03a963 100644 --- a/boards/xtensa/esp32/esp32-ethernet-kit/configs/wapi/defconfig +++ b/boards/xtensa/esp32/esp32-ethernet-kit/configs/wapi/defconfig @@ -8,6 +8,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-ethernet-kit" CONFIG_ARCH_BOARD_ESP32_ETHERNETKIT=y @@ -67,6 +68,7 @@ CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_PING=y CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USERMAIN_STACKSIZE=3072 CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_WIRELESS=y CONFIG_WIRELESS_WAPI=y diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/scripts/Make.defs b/boards/xtensa/esp32/esp32-ethernet-kit/scripts/Make.defs index f858a6a4101..e3beab78036 100644 --- a/boards/xtensa/esp32/esp32-ethernet-kit/scripts/Make.defs +++ b/boards/xtensa/esp32/esp32-ethernet-kit/scripts/Make.defs @@ -23,16 +23,42 @@ include $(TOPDIR)/tools/Config.mk include $(TOPDIR)/tools/esp32/Config.mk include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs -LDSCRIPT1 = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld -LDSCRIPT2 = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld -LDSCRIPT3 = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +# Pick the linker scripts from the board level if they exist, if not +# pick the common linker scripts. + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld),) + LDSCRIPT_ROM = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +else + LDSCRIPT_ROM = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +endif + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld),) + LDSCRIPT_SECT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld +else + ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) + LDSCRIPT_SECT = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_mcuboot.ld + else + LDSCRIPT_SECT = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32.ld + endif +endif + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld),) + LDSCRIPT_TEMPLATE = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld +else + LDSCRIPT_TEMPLATE = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld +endif + +# This is the generated memory layout linker script. It will always be +# generated at the board level. + +LDSCRIPT_MEMORY = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld ifeq ($(CONFIG_CYGWIN_WINTOOL),y) - ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT1)}" - ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT2)}" - ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT3)}" + ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT_MEMORY)}" + ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT_SECT)}" + ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT_ROM)}" else - ARCHSCRIPT = -T$(LDSCRIPT1) -T$(LDSCRIPT2) -T$(LDSCRIPT3) + ARCHSCRIPT = -T$(LDSCRIPT_MEMORY) -T$(LDSCRIPT_SECT) -T$(LDSCRIPT_ROM) endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) @@ -89,8 +115,6 @@ else LDELFFLAGS += -T $(TOPDIR)$(DELIM)binfmt$(DELIM)libelf$(DELIM)gnu-elf.ld endif -LDFLAGS += -nostartfiles -nodefaultlibs - ifeq ($(CONFIG_CYGWIN_WINTOOL),y) LDFLAGS += -Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" --cref else diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/scripts/esp32.template.ld b/boards/xtensa/esp32/esp32-ethernet-kit/scripts/esp32.template.ld deleted file mode 100644 index fa3459a0fb6..00000000000 --- a/boards/xtensa/esp32/esp32-ethernet-kit/scripts/esp32.template.ld +++ /dev/null @@ -1,94 +0,0 @@ -/**************************************************************************** - * boards/xtensa/esp32/esp32-ethernet-kit/scripts/esp32.template.ld - * ESP32 Linker Script Memory Layout - * - * This file describes the memory layout (memory blocks) as virtual - * memory addresses. - * - * esp32.common.ld contains output sections to link compiler output - * into these memory blocks. - * - * NOTE: That this is not the actual linker script but rather a "template" - * for the elf32_out.ld script. This template script is passed through - * the C preprocessor to include selected configuration options. - * - ****************************************************************************/ - -#include - -MEMORY -{ - /* All these values assume the flash cache is on, and have the blocks this - * uses subtracted from the length of the various regions. The 'data access - * port' dram/drom regions map to the same iram/irom regions but are - * connected to the data port of the CPU and eg allow bytewise access. - */ - - /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ - - iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 - - /* Flash mapped instruction data. - * - * The 0x20 offset is a convenience for the app binary image generation. - * Flash cache has 64KB pages. The .bin file which is flashed to the chip - * has a 0x18 byte file header, and each segment has a 0x08 byte segment - * header. Setting this offset makes it simple to meet the flash cache MMU's - * constraint that (paddr % 64KB == vaddr % 64KB).) - */ - - irom0_0_seg (RX) : org = 0x400d0020, len = 0x330000 - 0x20 - - /* Shared data RAM, excluding memory reserved for ROM bss/data/stack. - * Enabling Bluetooth & Trace Memory features in menuconfig will decrease - * the amount of RAM available. - * - * Note: The length of this section should be 0x50000, and this extra - * DRAM is available in heap at runtime. However due to static ROM memory - * usage at this 176KB mark, the additional static memory temporarily cannot - * be used. - */ - - dram0_0_seg (RW) : org = 0x3ffb0000 + CONFIG_ESP32_BT_RESERVE_DRAM, - len = 0x2c200 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM - CONFIG_ESP32_BT_RESERVE_DRAM - - /* Flash mapped constant data */ - - drom0_0_seg (R) : org = 0x3f400020, len = 0x400000 - 0x20 - - /* RTC fast memory (executable). Persists over deep sleep. */ - - rtc_iram_seg(RWX) : org = 0x400c0000, len = 0x2000 - - /* RTC slow memory (data accessible). Persists over deep sleep. - * Start of RTC slow memory is reserved for ULP co-processor code + data, - * if enabled. - */ - - rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM, - len = 0x1000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM - - /* External memory, including data and text */ - - extmem_seg(RWX) : org = 0x3f800000, len = 0x400000 -} - -#if CONFIG_ESP32_DEVKIT_RUN_IRAM - REGION_ALIAS("default_rodata_seg", dram0_0_seg); - REGION_ALIAS("default_code_seg", iram0_0_seg); -#else - REGION_ALIAS("default_rodata_seg", drom0_0_seg); - REGION_ALIAS("default_code_seg", irom0_0_seg); -#endif /* CONFIG_ESP32_DEVKIT_RUN_IRAM */ - -/* Heap ends at top of dram0_0_seg */ - -_eheap = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM; - -/* IRAM heap ends at top of dram0_0_seg */ - -_eiramheap = 0x400a0000; - -/* Mark the end of the RTC heap (top of the RTC region) */ - -_ertcheap = 0x50001fff; diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/src/Make.defs b/boards/xtensa/esp32/esp32-ethernet-kit/src/Make.defs index cf7a4c63a67..112b8431587 100644 --- a/boards/xtensa/esp32/esp32-ethernet-kit/src/Make.defs +++ b/boards/xtensa/esp32/esp32-ethernet-kit/src/Make.defs @@ -20,8 +20,6 @@ include $(TOPDIR)/Make.defs -SCRIPTDIR = $(BOARD_DIR)$(DELIM)scripts - CONFIGFILE = $(TOPDIR)$(DELIM)include$(DELIM)nuttx$(DELIM)config.h CSRCS = esp32_boot.c esp32_bringup.c @@ -45,13 +43,12 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y) CSRCS += esp32_buttons.c endif -SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32.template.ld -SCRIPTOUT = $(SCRIPTDIR)$(DELIM)esp32_out.ld +SCRIPTOUT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld .PHONY = context distclean -$(SCRIPTOUT): $(SCRIPTIN) $(CONFIGFILE) - $(Q) $(CC) -isystem $(TOPDIR)/include -C -P -x c -E $(SCRIPTIN) -o $@ +$(SCRIPTOUT): $(LDSCRIPT_TEMPLATE) $(CONFIGFILE) + $(Q) $(CC) -isystem $(TOPDIR)/include -C -P -x c -E $(LDSCRIPT_TEMPLATE) -o $@ context:: $(SCRIPTOUT) diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_bringup.c b/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_bringup.c index a830c3c9611..7285d87e747 100644 --- a/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_bringup.c +++ b/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_bringup.c @@ -133,7 +133,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize SD slot: %d\n", ret); - return ret; } #endif @@ -147,7 +146,6 @@ int esp32_bringup(void) if (ret) { syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n"); - return ret; } #endif @@ -157,7 +155,6 @@ int esp32_bringup(void) { syslog(LOG_ERR, "ERROR: Failed to initialize partition error=%d\n", ret); - return ret; } #endif @@ -175,7 +172,6 @@ int esp32_bringup(void) { syslog(LOG_ERR, "ERROR: Failed to initialize wireless subsystem=%d\n", ret); - return ret; } #endif @@ -192,7 +188,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -203,7 +198,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -214,7 +208,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -225,7 +218,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_buttons.c b/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_buttons.c index c0ebf1902e2..24726e20813 100644 --- a/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_buttons.c +++ b/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_buttons.c @@ -35,7 +35,6 @@ #include #include -#include "esp32_cpuint.h" #include "esp32_gpio.h" #include "esp32-ethernet-kit.h" diff --git a/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_spiflash.c b/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_spiflash.c index 9a0d3b9a043..e0bcc7a03f1 100644 --- a/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_spiflash.c +++ b/boards/xtensa/esp32/esp32-ethernet-kit/src/esp32_spiflash.c @@ -35,10 +35,447 @@ #include #include #include +#ifdef CONFIG_BCH +#include +#endif #include "esp32_spiflash.h" #include "esp32-ethernet-kit.h" +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0])) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION + +struct ota_partition_s +{ + uint32_t offset; /* Partition offset from the beginning of MTD */ + uint32_t size; /* Partition size in bytes */ + const char *devpath; /* Partition device path */ +}; + +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static int init_ota_partitions(void); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static const struct ota_partition_s g_ota_partition_table[] = +{ + { + .offset = CONFIG_ESP32_OTA_PRIMARY_SLOT_OFFSET, + .size = CONFIG_ESP32_OTA_SLOT_SIZE, + .devpath = CONFIG_ESP32_OTA_PRIMARY_SLOT_DEVPATH + }, + { + .offset = CONFIG_ESP32_OTA_SECONDARY_SLOT_OFFSET, + .size = CONFIG_ESP32_OTA_SLOT_SIZE, + .devpath = CONFIG_ESP32_OTA_SECONDARY_SLOT_DEVPATH + }, + { + .offset = CONFIG_ESP32_OTA_SCRATCH_OFFSET, + .size = CONFIG_ESP32_OTA_SCRATCH_SIZE, + .devpath = CONFIG_ESP32_OTA_SCRATCH_DEVPATH + } +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static int init_ota_partitions(void) +{ + FAR struct mtd_dev_s *mtd; +#ifdef CONFIG_BCH + char blockdev[18]; +#endif + int ret = OK; + + for (int i = 0; i < ARRAYSIZE(g_ota_partition_table); ++i) + { + const struct ota_partition_s *part = &g_ota_partition_table[i]; + mtd = esp32_spiflash_alloc_mtdpart(part->offset, part->size); + + ret = ftl_initialize(i, mtd); + if (ret < 0) + { + ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#ifdef CONFIG_BCH + snprintf(blockdev, 18, "/dev/mtdblock%d", i); + + ret = bchdev_register(blockdev, part->devpath, false); + if (ret < 0) + { + ferr("ERROR: bchdev_register %s failed: %d\n", part->devpath, ret); + return ret; + } +#endif + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_smartfs + * + * Description: + * Provide a block driver wrapper around MTD partition and mount a + * SMART FS over it. + * + * Parameters: + * smartn - Number used to register the mtd partition: /dev/smartx, where + * x = smartn. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) +static int setup_smartfs(int smartn, FAR struct mtd_dev_s *mtd, + const char *mnt_pt) +{ + int ret = OK; + char path[22]; + + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + finfo("smart_initialize failed, Trying to erase first...\n"); + ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); + if (ret < 0) + { + ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); + return ret; + } + + finfo("Erase successful, initializing it again.\n"); + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: smart_initialize failed: %d\n", ret); + return ret; + } + } + + if (mnt_pt != NULL) + { + snprintf(path, sizeof(path), "/dev/smart%d", smartn); + + ret = nx_mount(path, mnt_pt, "smartfs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_littlefs + * + * Description: + * Register a mtd driver and mount a Little FS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_LITTLEFS) +static int setup_littlefs(const char *path, FAR struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, NULL); + if (ret < 0) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, "forceformat"); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + } + + return OK; +} + +#endif + +/**************************************************************************** + * Name: setup_spiffs + * + * Description: + * Register a mtd driver and mount a SPIFFS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_SPIFFS) +static int setup_spiffs(const char *path, FAR struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "spiffs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_nxffs + * + * Description: + * Register a mtd driver and mount a SPIFFS over it. + * + * Parameters: + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_NXFFS) +static int setup_nxffs(FAR struct mtd_dev_s *mtd, const char *mnt_pt) +{ + int ret = OK; + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + ferr("ERROR: NXFFS init failed: %d\n", ret); + return ret; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(NULL, mnt_pt, "nxffs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif +/**************************************************************************** + * Name: init_wifi_partition + * + * Description: + * Initialize partition that is dedicated to Wi-Fi. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_WIFI_SAVE_PARAM) +static int init_wifi_partition(void) +{ + int ret = OK; + FAR struct mtd_dev_s *mtd; + + mtd = esp32_spiflash_alloc_mtdpart(CONFIG_ESP32_WIFI_MTD_OFFSET, + CONFIG_ESP32_WIFI_MTD_SIZE); + if (!mtd) + { + ferr("ERROR: Failed to alloc MTD partition of SPI Flash\n"); + return ERROR; + } + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) + + ret = setup_smartfs(1, mtd, CONFIG_ESP32_WIFI_FS_MOUNTPT); + if (ret < 0) + { + ferr("ERROR: Failed to setup smartfs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_LITTLEFS) + + const char *path = "/dev/mtdblock1"; + ret = setup_littlefs(path, mtd, CONFIG_ESP32_WIFI_FS_MOUNTPT, 0777); + if (ret < 0) + { + ferr("ERROR: Failed to setup littlefs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_SPIFFS) + + const char *path = "/dev/mtdblock1"; + ret = setup_spiffs(path, mtd, CONFIG_ESP32_WIFI_FS_MOUNTPT, 0777); + if (ret < 0) + { + ferr("ERROR: Failed to setup spiffs\n"); + return ret; + } + +#else + + ferr("ERROR: No supported FS selected. Wi-Fi partition " + "should be mounted before Wi-Fi initialization\n"); + +#endif + + return ret; +} + +#endif +/**************************************************************************** + * Name: init_storage_partition + * + * Description: + * Initialize partition that is dedicated to general use. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int init_storage_partition(void) +{ + int ret = OK; + FAR struct mtd_dev_s *mtd; + + mtd = esp32_spiflash_alloc_mtdpart(CONFIG_ESP32_MTD_OFFSET, + CONFIG_ESP32_MTD_SIZE); + if (!mtd) + { + ferr("ERROR: Failed to alloc MTD partition of SPI Flash\n"); + return ERROR; + } + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) + + ret = setup_smartfs(0, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to setup smartfs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_NXFFS) + + ret = setup_nxffs(mtd, "/mnt"); + if (ret < 0) + { + ferr("ERROR: Failed to setup nxffs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_LITTLEFS) + + const char *path = "/dev/esp32flash"; + ret = setup_littlefs(path, mtd, NULL, 0755); + if (ret < 0) + { + ferr("ERROR: Failed to setup littlefs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_SPIFFS) + + const char *path = "/dev/esp32flash"; + ret = setup_spiffs(path, mtd, NULL, 0755); + if (ret < 0) + { + ferr("ERROR: Failed to setup spiffs\n"); + return ret; + } + +#else + + ret = register_mtddriver("/dev/esp32flash", mtd, 0755, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ret; + } + +#endif + + return ret; +} + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -52,49 +489,30 @@ int esp32_spiflash_init(void) { - FAR struct mtd_dev_s *mtd; - int ret = ERROR; + int ret = OK; - mtd = esp32_spiflash_alloc_mtdpart(); - -#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) - ret = smart_initialize(0, mtd, NULL); +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION + ret = init_ota_partitions(); if (ret < 0) { - finfo("smart_initialize failed, Trying to erase first...\n"); - ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); - if (ret < 0) - { - ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); - return ret; - } - - finfo("Erase successful, initializing again\n"); - ret = smart_initialize(0, mtd, NULL); - if (ret < 0) - { - ferr("ERROR: smart_initialize failed: %d\n", ret); - return ret; - } - } - -#elif defined (CONFIG_ESP32_SPIFLASH_NXFFS) - ret = nxffs_initialize(mtd); - if (ret < 0) - { - ferr("ERROR: NXFFS init failed: %d\n", ret); - return ret; - } - -#else - ret = register_mtddriver("/dev/esp32flash", mtd, 0755, NULL); - if (ret < 0) - { - ferr("ERROR: Register mtd failed: %d\n", ret); return ret; } #endif +#ifdef CONFIG_ESP32_WIFI_SAVE_PARAM + ret = init_wifi_partition(); + if (ret < 0) + { + return ret; + } +#endif + + ret = init_storage_partition(); + if (ret < 0) + { + return ret; + } + return ret; } diff --git a/boards/xtensa/esp32/esp32-wrover-kit/configs/autopm/defconfig b/boards/xtensa/esp32/esp32-wrover-kit/configs/autopm/defconfig index bddb794e0db..6378909c9c7 100644 --- a/boards/xtensa/esp32/esp32-wrover-kit/configs/autopm/defconfig +++ b/boards/xtensa/esp32/esp32-wrover-kit/configs/autopm/defconfig @@ -9,6 +9,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-wrover-kit" CONFIG_ARCH_BOARD_ESP32_WROVERKIT=y @@ -69,6 +70,7 @@ CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_PING=y CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USERMAIN_STACKSIZE=3072 CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_WIRELESS=y CONFIG_WIRELESS_WAPI=y diff --git a/boards/xtensa/esp32/esp32-wrover-kit/configs/lcd1602/defconfig b/boards/xtensa/esp32/esp32-wrover-kit/configs/lcd1602/defconfig new file mode 100644 index 00000000000..9c8b7dbe3e1 --- /dev/null +++ b/boards/xtensa/esp32/esp32-wrover-kit/configs/lcd1602/defconfig @@ -0,0 +1,51 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32-wrover-kit" +CONFIG_ARCH_BOARD_ESP32_WROVERKIT=y +CONFIG_ARCH_CHIP="esp32" +CONFIG_ARCH_CHIP_ESP32=y +CONFIG_ARCH_CHIP_ESP32WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_ESP32_I2C0=y +CONFIG_ESP32_UART0=y +CONFIG_EXAMPLES_SLCD=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_I2C=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_LCD_BACKPACK=y +CONFIG_MM_REGIONS=3 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SLCD=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/xtensa/esp32/esp32-wrover-kit/configs/mcuboot_agent/defconfig b/boards/xtensa/esp32/esp32-wrover-kit/configs/mcuboot_agent/defconfig new file mode 100644 index 00000000000..b5651f384f5 --- /dev/null +++ b/boards/xtensa/esp32/esp32-wrover-kit/configs/mcuboot_agent/defconfig @@ -0,0 +1,86 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32-wrover-kit" +CONFIG_ARCH_BOARD_ESP32_WROVERKIT=y +CONFIG_ARCH_CHIP="esp32" +CONFIG_ARCH_CHIP_ESP32=y +CONFIG_ARCH_CHIP_ESP32WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BOOT_MCUBOOT=y +CONFIG_BUILTIN=y +CONFIG_DEBUG_ASSERTIONS=y +CONFIG_DEBUG_ERROR=y +CONFIG_DEBUG_FEATURES=y +CONFIG_DEBUG_FULLOPT=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_DEBUG_WARN=y +CONFIG_DRIVERS_IEEE80211=y +CONFIG_DRIVERS_WIRELESS=y +CONFIG_ESP32_APP_FORMAT_MCUBOOT=y +CONFIG_ESP32_SPIFLASH=y +CONFIG_ESP32_UART0=y +CONFIG_ESP32_WIRELESS=y +CONFIG_EXPERIMENTAL=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_LIBC_FLOATINGPOINT=y +CONFIG_MCUBOOT_UPDATE_AGENT_EXAMPLE=y +CONFIG_MCUBOOT_UPDATE_AGENT_EXAMPLE_DL_BUFFER_SIZE=4096 +CONFIG_MM_REGIONS=3 +CONFIG_NAME_MAX=48 +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDEV_LATEINIT=y +CONFIG_NETDEV_PHY_IOCTL=y +CONFIG_NETDEV_WIRELESS_IOCTL=y +CONFIG_NETUTILS_WEBCLIENT=y +CONFIG_NET_BROADCAST=y +CONFIG_NET_ICMP=y +CONFIG_NET_ICMP_SOCKET=y +CONFIG_NET_TCP=y +CONFIG_NET_UDP=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=300 +CONFIG_NSH_MOTD=y +CONFIG_NSH_MOTD_STRING="Welcome to MCUboot support on NuttX!" +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_PTHREAD_MUTEX_TYPES=y +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_SIG_DEFAULT=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_DHCPC_RENEW=y +CONFIG_SYSTEM_NSH=y +CONFIG_SYSTEM_PING=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_WIRELESS=y +CONFIG_WIRELESS_WAPI=y +CONFIG_WIRELESS_WAPI_CMDTOOL=y +CONFIG_WIRELESS_WAPI_STACKSIZE=4096 diff --git a/boards/xtensa/esp32/esp32-wrover-kit/configs/mcuboot_confirm/defconfig b/boards/xtensa/esp32/esp32-wrover-kit/configs/mcuboot_confirm/defconfig new file mode 100644 index 00000000000..3ea6cd45655 --- /dev/null +++ b/boards/xtensa/esp32/esp32-wrover-kit/configs/mcuboot_confirm/defconfig @@ -0,0 +1,55 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32-wrover-kit" +CONFIG_ARCH_BOARD_ESP32_WROVERKIT=y +CONFIG_ARCH_CHIP="esp32" +CONFIG_ARCH_CHIP_ESP32=y +CONFIG_ARCH_CHIP_ESP32WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARDCTL_RESET=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BOOT_MCUBOOT=y +CONFIG_BUILTIN=y +CONFIG_ESP32_APP_FORMAT_MCUBOOT=y +CONFIG_ESP32_ESPTOOL_TARGET_SECONDARY=y +CONFIG_ESP32_SPIFLASH=y +CONFIG_ESP32_UART0=y +CONFIG_EXPERIMENTAL=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_MCUBOOT_SLOT_CONFIRM_EXAMPLE=y +CONFIG_MM_REGIONS=3 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_MOTD=y +CONFIG_NSH_MOTD_STRING="Firmware OTA update successfully finished!" +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/xtensa/esp32/esp32-wrover-kit/configs/wapi/defconfig b/boards/xtensa/esp32/esp32-wrover-kit/configs/wapi/defconfig index 50b443149da..833b25ec363 100644 --- a/boards/xtensa/esp32/esp32-wrover-kit/configs/wapi/defconfig +++ b/boards/xtensa/esp32/esp32-wrover-kit/configs/wapi/defconfig @@ -9,6 +9,7 @@ # CONFIG_NSH_ARGCAT is not set # CONFIG_NSH_CMDOPT_HEXDUMP is not set # CONFIG_NSH_CMDPARMS is not set +CONFIG_ALLOW_BSD_COMPONENTS=y CONFIG_ARCH="xtensa" CONFIG_ARCH_BOARD="esp32-wrover-kit" CONFIG_ARCH_BOARD_ESP32_WROVERKIT=y @@ -68,6 +69,7 @@ CONFIG_SYSTEM_DHCPC_RENEW=y CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_PING=y CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USERMAIN_STACKSIZE=3072 CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_WIRELESS=y CONFIG_WIRELESS_WAPI=y diff --git a/boards/xtensa/esp32/esp32-wrover-kit/scripts/Make.defs b/boards/xtensa/esp32/esp32-wrover-kit/scripts/Make.defs index 761605dec4b..d8215e21c39 100644 --- a/boards/xtensa/esp32/esp32-wrover-kit/scripts/Make.defs +++ b/boards/xtensa/esp32/esp32-wrover-kit/scripts/Make.defs @@ -23,16 +23,42 @@ include $(TOPDIR)/tools/Config.mk include $(TOPDIR)/tools/esp32/Config.mk include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs -LDSCRIPT1 = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld -LDSCRIPT2 = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld -LDSCRIPT3 = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +# Pick the linker scripts from the board level if they exist, if not +# pick the common linker scripts. + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld),) + LDSCRIPT_ROM = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +else + LDSCRIPT_ROM = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +endif + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld),) + LDSCRIPT_SECT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld +else + ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) + LDSCRIPT_SECT = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_mcuboot.ld + else + LDSCRIPT_SECT = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32.ld + endif +endif + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld),) + LDSCRIPT_TEMPLATE = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld +else + LDSCRIPT_TEMPLATE = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld +endif + +# This is the generated memory layout linker script. It will always be +# generated at the board level. + +LDSCRIPT_MEMORY = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld ifeq ($(CONFIG_CYGWIN_WINTOOL),y) - ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT1)}" - ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT2)}" - ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT3)}" + ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT_MEMORY)}" + ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT_SECT)}" + ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT_ROM)}" else - ARCHSCRIPT = -T$(LDSCRIPT1) -T$(LDSCRIPT2) -T$(LDSCRIPT3) + ARCHSCRIPT = -T$(LDSCRIPT_MEMORY) -T$(LDSCRIPT_SECT) -T$(LDSCRIPT_ROM) endif ifeq ($(CONFIG_DEBUG_SYMBOLS),y) @@ -89,8 +115,6 @@ else LDELFFLAGS += -T $(TOPDIR)$(DELIM)binfmt$(DELIM)libelf$(DELIM)gnu-elf.ld endif -LDFLAGS += -nostartfiles -nodefaultlibs - ifeq ($(CONFIG_CYGWIN_WINTOOL),y) LDFLAGS += -Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" --cref else diff --git a/boards/xtensa/esp32/esp32-wrover-kit/scripts/esp32.ld b/boards/xtensa/esp32/esp32-wrover-kit/scripts/esp32.ld deleted file mode 100644 index 705815bf3e1..00000000000 --- a/boards/xtensa/esp32/esp32-wrover-kit/scripts/esp32.ld +++ /dev/null @@ -1,226 +0,0 @@ -/**************************************************************************** - * boards/xtensa/esp32/esp32-wrover-kit/scripts/esp32.ld - ****************************************************************************/ - -/* Default entry point: */ - -ENTRY(__start); - -SECTIONS -{ - /* Send .iram0 code to iram */ - - .iram0.vectors : - { - /* Vectors go to IRAM */ - - _init_start = ABSOLUTE(.); - - /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */ - - . = 0x0; - KEEP (*(.window_vectors.text)); - . = 0x180; - KEEP (*(.xtensa_level2_vector.text)); - . = 0x1c0; - KEEP (*(.xtensa_level3_vector.text)); - . = 0x200; - KEEP (*(.xtensa_level4_vector.text)); - . = 0x240; - KEEP (*(.xtensa_level5_vector.text)); - . = 0x280; - KEEP (*(.debug_exception_vector.text)); - . = 0x2c0; - KEEP (*(.nmi_vector.text)); - . = 0x300; - KEEP (*(.kernel_exception_vector.text)); - . = 0x340; - KEEP (*(.user_exception_vector.text)); - . = 0x3c0; - KEEP (*(.double_exception_vector.text)); - . = 0x400; - *(.*_vector.literal) - - . = ALIGN (16); - *(.entry.text) - *(.init.literal) - *(.init) - _init_end = ABSOLUTE(.); - } > iram0_0_seg - - .iram0.text : - { - /* Code marked as running out of IRAM */ - - _iram_text_start = ABSOLUTE(.); - *(.iram1 .iram1.*) - *libphy.a:(.literal .text .literal.* .text.*) - *librtc.a:(.literal .text .literal.* .text.*) - *libpp.a:(.literal .text .literal.* .text.*) - *libhal.a:(.literal .text .literal.* .text.*) - *libarch.a:esp32_spiflash.*(.literal .text .literal.* .text.*) - *(.wifirxiram .wifirxiram.*) - *(.wifirxiram .wifi0iram.*) - *(.wifislpiram .wifislpiram.*) - *(.wifislprxiram .wifislprxiram.*) - *(.phyiram .phyiram.*) - _iram_text_end = ABSOLUTE(.); - - /* iram heap starts at the end of iram0_0_seg */ - - . = ALIGN (4); - _siramheap = ABSOLUTE(.); - } > iram0_0_seg - - /* Shared RAM */ - - .dram0.bss (NOLOAD) : - { - /* .bss initialized on power-up */ - - . = ALIGN (8); - _sbss = ABSOLUTE(.); - *(.dynsbss) - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - *(.sbss2) - *(.sbss2.*) - *(.gnu.linkonce.sb2.*) - *(.dynbss) - KEEP (*(.bss)) - *(.bss.*) - *(.share.mem) - *(.gnu.linkonce.b.*) - *(COMMON) - *libarch.a:esp32_spiflash.*(.bss .bss.* COMMON) - . = ALIGN(8); - _ebss = ABSOLUTE(.); - } >dram0_0_seg - - .noinit (NOLOAD): - { - /* This section contains data that is not initialized during load, - * or during the application's initialization sequence. - */ - - *(.noinit) - } >dram0_0_seg - - .dram0.data : - { - /* .data initialized on power-up in ROMed configurations. */ - - _sdata = ABSOLUTE(.); - KEEP (*(.data)) - KEEP (*(.data.*)) - KEEP (*(.gnu.linkonce.d.*)) - KEEP (*(.data1)) - KEEP (*(.sdata)) - KEEP (*(.sdata.*)) - KEEP (*(.gnu.linkonce.s.*)) - KEEP (*(.sdata2)) - KEEP (*(.sdata2.*)) - KEEP (*(.gnu.linkonce.s2.*)) - KEEP (*(.jcr)) - *(.dram1 .dram1.*) - *libarch.a:esp32_spiflash.*(.rodata .rodata.*) - . = ALIGN(4); - _edata = ABSOLUTE(.); - - /* Heap starts at the end of .data */ - - _sheap = ABSOLUTE(.); - } >dram0_0_seg - - /* External memory bss, from any global variable with EXT_RAM_ATTR attribute */ - - .extmem.bss (NOLOAD) : - { - _sbss_extmem = ABSOLUTE(.); - *(.extmem.bss .extmem.bss.*) - . = ALIGN(4); - _ebss_extmem = ABSOLUTE(.); - } > extmem_seg - - .flash.rodata : - { - _srodata = ABSOLUTE(.); - *(.rodata) - *(.rodata.*) - *(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.gnu.linkonce.r.*) - *(.rodata1) - __XT_EXCEPTION_TABLE_ = ABSOLUTE(.); - *(.xt_except_table) - *(.gcc_except_table) - *(.gcc_except_table.*) - *(.gnu.linkonce.e.*) - *(.gnu.version_r) - *(.eh_frame) - - . = (. + 3) & ~ 3; - - /* C++ constructor and destructor tables, properly ordered: */ - - _sinit = ABSOLUTE(.); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - _einit = ABSOLUTE(.); - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - - /* C++ exception handlers table: */ - - __XT_EXCEPTION_DESCS_ = ABSOLUTE(.); - *(.xt_except_desc) - *(.gnu.linkonce.h.*) - __XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.); - *(.xt_except_desc_end) - *(.dynamic) - *(.gnu.version_d) - _erodata = ABSOLUTE(.); - /* Literals are also RO data. */ - _lit4_start = ABSOLUTE(.); - *(*.lit4) - *(.lit4.*) - *(.gnu.linkonce.lit4.*) - _lit4_end = ABSOLUTE(.); - . = ALIGN(4); - } >default_rodata_seg - - .flash.text : - { - _stext = .; - _text_start = ABSOLUTE(.); - *(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*) - *(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */ - *(.fini.literal) - *(.fini) - *(.gnu.version) - _text_end = ABSOLUTE(.); - _etext = .; - } >default_code_seg - - .rtc.text : - { - . = ALIGN(4); - *(.rtc.literal .rtc.text) - } >rtc_iram_seg - - .rtc.data : - { - *(.rtc.data) - *(.rtc.rodata) - - /* Whatever is left from the RTC memory is used as a special heap. */ - - . = ALIGN (4); - _srtcheap = ABSOLUTE(.); - } > rtc_slow_seg -} diff --git a/boards/xtensa/esp32/esp32-wrover-kit/scripts/esp32.template.ld b/boards/xtensa/esp32/esp32-wrover-kit/scripts/esp32.template.ld deleted file mode 100644 index 8e5d98c6918..00000000000 --- a/boards/xtensa/esp32/esp32-wrover-kit/scripts/esp32.template.ld +++ /dev/null @@ -1,94 +0,0 @@ -/**************************************************************************** - * boards/xtensa/esp32/esp32-wrover-kit/scripts/esp32.template.ld - * ESP32 Linker Script Memory Layout - * - * This file describes the memory layout (memory blocks) as virtual - * memory addresses. - * - * esp32.common.ld contains output sections to link compiler output - * into these memory blocks. - * - * NOTE: That this is not the actual linker script but rather a "template" - * for the elf32_out.ld script. This template script is passed through - * the C preprocessor to include selected configuration options. - * - ****************************************************************************/ - -#include - -MEMORY -{ - /* All these values assume the flash cache is on, and have the blocks this - * uses subtracted from the length of the various regions. The 'data access - * port' dram/drom regions map to the same iram/irom regions but are - * connected to the data port of the CPU and eg allow bytewise access. - */ - - /* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */ - - iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 - - /* Flash mapped instruction data. - * - * The 0x20 offset is a convenience for the app binary image generation. - * Flash cache has 64KB pages. The .bin file which is flashed to the chip - * has a 0x18 byte file header, and each segment has a 0x08 byte segment - * header. Setting this offset makes it simple to meet the flash cache MMU's - * constraint that (paddr % 64KB == vaddr % 64KB).) - */ - - irom0_0_seg (RX) : org = 0x400d0020, len = 0x330000 - 0x20 - - /* Shared data RAM, excluding memory reserved for ROM bss/data/stack. - * Enabling Bluetooth & Trace Memory features in menuconfig will decrease - * the amount of RAM available. - * - * Note: The length of this section should be 0x50000, and this extra - * DRAM is available in heap at runtime. However due to static ROM memory - * usage at this 176KB mark, the additional static memory temporarily cannot - * be used. - */ - - dram0_0_seg (RW) : org = 0x3ffb0000 + CONFIG_ESP32_BT_RESERVE_DRAM, - len = 0x2c200 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM - CONFIG_ESP32_BT_RESERVE_DRAM - - /* Flash mapped constant data */ - - drom0_0_seg (R) : org = 0x3f400020, len = 0x400000 - 0x20 - - /* RTC fast memory (executable). Persists over deep sleep. */ - - rtc_iram_seg(RWX) : org = 0x400c0000, len = 0x2000 - - /* RTC slow memory (data accessible). Persists over deep sleep. - * Start of RTC slow memory is reserved for ULP co-processor code + data, - * if enabled. - */ - - rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ESP32_ULP_COPROC_RESERVE_MEM, - len = 0x1000 - CONFIG_ESP32_ULP_COPROC_RESERVE_MEM - - /* External memory, including data and text */ - - extmem_seg(RWX) : org = 0x3f800000, len = 0x400000 -} - -#if CONFIG_ESP32_DEVKIT_RUN_IRAM - REGION_ALIAS("default_rodata_seg", dram0_0_seg); - REGION_ALIAS("default_code_seg", iram0_0_seg); -#else - REGION_ALIAS("default_rodata_seg", drom0_0_seg); - REGION_ALIAS("default_code_seg", irom0_0_seg); -#endif /* CONFIG_ESP32_DEVKIT_RUN_IRAM */ - -/* Heap ends at top of dram0_0_seg */ - -_eheap = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM; - -/* IRAM heap ends at top of dram0_0_seg */ - -_eiramheap = 0x400a0000; - -/* Mark the end of the RTC heap (top of the RTC region) */ - -_ertcheap = 0x50001fff; diff --git a/boards/xtensa/esp32/esp32-wrover-kit/src/Make.defs b/boards/xtensa/esp32/esp32-wrover-kit/src/Make.defs index c48ae6a8312..2c5d68946b0 100644 --- a/boards/xtensa/esp32/esp32-wrover-kit/src/Make.defs +++ b/boards/xtensa/esp32/esp32-wrover-kit/src/Make.defs @@ -20,8 +20,6 @@ include $(TOPDIR)/Make.defs -SCRIPTDIR = $(BOARD_DIR)$(DELIM)scripts - CONFIGFILE = $(TOPDIR)$(DELIM)include$(DELIM)nuttx$(DELIM)config.h CSRCS = esp32_boot.c esp32_bringup.c @@ -55,13 +53,12 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y) CSRCS += esp32_buttons.c endif -SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32.template.ld -SCRIPTOUT = $(SCRIPTDIR)$(DELIM)esp32_out.ld +SCRIPTOUT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld .PHONY = context distclean -$(SCRIPTOUT): $(SCRIPTIN) $(CONFIGFILE) - $(Q) $(CC) -isystem $(TOPDIR)/include -C -P -x c -E $(SCRIPTIN) -o $@ +$(SCRIPTOUT): $(LDSCRIPT_TEMPLATE) $(CONFIGFILE) + $(Q) $(CC) -isystem $(TOPDIR)/include -C -P -x c -E $(LDSCRIPT_TEMPLATE) -o $@ context:: $(SCRIPTOUT) diff --git a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_bringup.c b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_bringup.c index b7517d225dc..52a399110ed 100644 --- a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_bringup.c +++ b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_bringup.c @@ -94,6 +94,10 @@ # include "esp32_rtc_lowerhalf.h" #endif +#ifdef CONFIG_LCD_BACKPACK +# include "esp32_lcd_backpack.h" +#endif + #include "esp32-wrover-kit.h" /**************************************************************************** @@ -148,12 +152,21 @@ int esp32_bringup(void) } #endif +#ifdef CONFIG_LCD_BACKPACK + /* slcd:0, i2c:0, rows=2, cols=16 */ + + ret = board_lcd_backpack_init(0, 0, 2, 16); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize PCF8574 LCD, error %d\n", ret); + } +#endif + #ifdef CONFIG_MMCSD ret = esp32_mmcsd_initialize(0); if (ret < 0) { syslog(LOG_ERR, "Failed to initialize SD slot: %d\n", ret); - return ret; } #endif @@ -167,7 +180,6 @@ int esp32_bringup(void) if (ret) { syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n"); - return ret; } #endif @@ -177,7 +189,6 @@ int esp32_bringup(void) { syslog(LOG_ERR, "ERROR: Failed to initialize partition error=%d\n", ret); - return ret; } #endif @@ -195,7 +206,6 @@ int esp32_bringup(void) { syslog(LOG_ERR, "ERROR: Failed to initialize wireless subsystem=%d\n", ret); - return ret; } #endif @@ -212,7 +222,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -223,7 +232,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -234,7 +242,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -245,7 +252,6 @@ int esp32_bringup(void) syslog(LOG_ERR, "ERROR: Failed to initialize timer driver: %d\n", ret); - return ret; } #endif @@ -290,7 +296,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret); - return ret; } #endif @@ -302,7 +307,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize I2C Driver for I2C0: %d\n", ret); - return ret; } #endif @@ -312,7 +316,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize I2C Driver for I2C1: %d\n", ret); - return ret; } #endif @@ -326,7 +329,6 @@ int esp32_bringup(void) if (ret < 0) { syslog(LOG_ERR, "Failed to initialize BMP180 driver: %d\n", ret); - return ret; } #endif diff --git a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_buttons.c b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_buttons.c index da9b8ecb74a..7a3719c2897 100644 --- a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_buttons.c +++ b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_buttons.c @@ -35,7 +35,6 @@ #include #include -#include "esp32_cpuint.h" #include "esp32_gpio.h" #include "esp32-wrover-kit.h" diff --git a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_gpio.c b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_gpio.c index 785ad3b35aa..cb500100d3f 100644 --- a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_gpio.c +++ b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_gpio.c @@ -327,7 +327,6 @@ static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable) int esp32_gpio_init(void) { int i; - int pincount = 0; #if BOARD_NGPIOOUT > 0 for (i = 0; i < BOARD_NGPIOOUT; i++) @@ -337,20 +336,17 @@ int esp32_gpio_init(void) g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN; g_gpout[i].gpio.gp_ops = &gpout_ops; g_gpout[i].id = i; - gpio_pin_register(&g_gpout[i].gpio, pincount); + gpio_pin_register(&g_gpout[i].gpio, i); /* Configure the pins that will be used as output */ esp32_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0); - esp32_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_3); + esp32_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_3 | + INPUT_FUNCTION_3); esp32_gpiowrite(g_gpiooutputs[i], 0); - - pincount++; } #endif - pincount = 0; - #if BOARD_NGPIOIN > 0 for (i = 0; i < BOARD_NGPIOIN; i++) { @@ -359,18 +355,14 @@ int esp32_gpio_init(void) g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN; g_gpin[i].gpio.gp_ops = &gpin_ops; g_gpin[i].id = i; - gpio_pin_register(&g_gpin[i].gpio, pincount); + gpio_pin_register(&g_gpin[i].gpio, i); /* Configure the pins that will be used as INPUT */ esp32_configgpio(g_gpioinputs[i], INPUT_FUNCTION_3); - - pincount++; } #endif - pincount = 0; - #if BOARD_NGPIOINT > 0 for (i = 0; i < BOARD_NGPIOINT; i++) { @@ -379,13 +371,11 @@ int esp32_gpio_init(void) g_gpint[i].esp32gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN; g_gpint[i].esp32gpio.gpio.gp_ops = &gpint_ops; g_gpint[i].esp32gpio.id = i; - gpio_pin_register(&g_gpint[i].esp32gpio.gpio, pincount); + gpio_pin_register(&g_gpint[i].esp32gpio.gpio, i); /* Configure the pins that will be used as interrupt input */ esp32_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_3 | PULLDOWN); - - pincount++; } #endif diff --git a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_spiflash.c b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_spiflash.c index a0622e7dce3..4443d123b64 100644 --- a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_spiflash.c +++ b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_spiflash.c @@ -35,10 +35,447 @@ #include #include #include +#ifdef CONFIG_BCH +#include +#endif #include "esp32_spiflash.h" #include "esp32-wrover-kit.h" +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0])) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION + +struct ota_partition_s +{ + uint32_t offset; /* Partition offset from the beginning of MTD */ + uint32_t size; /* Partition size in bytes */ + const char *devpath; /* Partition device path */ +}; + +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static int init_ota_partitions(void); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static const struct ota_partition_s g_ota_partition_table[] = +{ + { + .offset = CONFIG_ESP32_OTA_PRIMARY_SLOT_OFFSET, + .size = CONFIG_ESP32_OTA_SLOT_SIZE, + .devpath = CONFIG_ESP32_OTA_PRIMARY_SLOT_DEVPATH + }, + { + .offset = CONFIG_ESP32_OTA_SECONDARY_SLOT_OFFSET, + .size = CONFIG_ESP32_OTA_SLOT_SIZE, + .devpath = CONFIG_ESP32_OTA_SECONDARY_SLOT_DEVPATH + }, + { + .offset = CONFIG_ESP32_OTA_SCRATCH_OFFSET, + .size = CONFIG_ESP32_OTA_SCRATCH_SIZE, + .devpath = CONFIG_ESP32_OTA_SCRATCH_DEVPATH + } +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static int init_ota_partitions(void) +{ + FAR struct mtd_dev_s *mtd; +#ifdef CONFIG_BCH + char blockdev[18]; +#endif + int ret = OK; + + for (int i = 0; i < ARRAYSIZE(g_ota_partition_table); ++i) + { + const struct ota_partition_s *part = &g_ota_partition_table[i]; + mtd = esp32_spiflash_alloc_mtdpart(part->offset, part->size); + + ret = ftl_initialize(i, mtd); + if (ret < 0) + { + ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#ifdef CONFIG_BCH + snprintf(blockdev, 18, "/dev/mtdblock%d", i); + + ret = bchdev_register(blockdev, part->devpath, false); + if (ret < 0) + { + ferr("ERROR: bchdev_register %s failed: %d\n", part->devpath, ret); + return ret; + } +#endif + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_smartfs + * + * Description: + * Provide a block driver wrapper around MTD partition and mount a + * SMART FS over it. + * + * Parameters: + * smartn - Number used to register the mtd partition: /dev/smartx, where + * x = smartn. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) +static int setup_smartfs(int smartn, FAR struct mtd_dev_s *mtd, + const char *mnt_pt) +{ + int ret = OK; + char path[22]; + + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + finfo("smart_initialize failed, Trying to erase first...\n"); + ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); + if (ret < 0) + { + ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); + return ret; + } + + finfo("Erase successful, initializing it again.\n"); + ret = smart_initialize(smartn, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: smart_initialize failed: %d\n", ret); + return ret; + } + } + + if (mnt_pt != NULL) + { + snprintf(path, sizeof(path), "/dev/smart%d", smartn); + + ret = nx_mount(path, mnt_pt, "smartfs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_littlefs + * + * Description: + * Register a mtd driver and mount a Little FS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_LITTLEFS) +static int setup_littlefs(const char *path, FAR struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, NULL); + if (ret < 0) + { + ret = nx_mount(path, mnt_pt, "littlefs", 0, "forceformat"); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + } + + return OK; +} + +#endif + +/**************************************************************************** + * Name: setup_spiffs + * + * Description: + * Register a mtd driver and mount a SPIFFS over it. + * + * Parameters: + * path - Path name used to register the mtd driver. + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * priv - Privileges + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_SPIFFS) +static int setup_spiffs(const char *path, FAR struct mtd_dev_s *mtd, + const char *mnt_pt, int priv) +{ + int ret = OK; + + ret = register_mtddriver(path, mtd, priv, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ERROR; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(path, mnt_pt, "spiffs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif + +/**************************************************************************** + * Name: setup_nxffs + * + * Description: + * Register a mtd driver and mount a SPIFFS over it. + * + * Parameters: + * mtd - Pointer to a pre-allocated mtd partition. + * mnt_pt - Mount point + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_SPIFLASH_NXFFS) +static int setup_nxffs(FAR struct mtd_dev_s *mtd, const char *mnt_pt) +{ + int ret = OK; + + ret = nxffs_initialize(mtd); + if (ret < 0) + { + ferr("ERROR: NXFFS init failed: %d\n", ret); + return ret; + } + + if (mnt_pt != NULL) + { + ret = nx_mount(NULL, mnt_pt, "nxffs", 0, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to mount the FS volume: %d\n", ret); + return ret; + } + } + + return ret; +} + +#endif +/**************************************************************************** + * Name: init_wifi_partition + * + * Description: + * Initialize partition that is dedicated to Wi-Fi. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +#if defined (CONFIG_ESP32_WIFI_SAVE_PARAM) +static int init_wifi_partition(void) +{ + int ret = OK; + FAR struct mtd_dev_s *mtd; + + mtd = esp32_spiflash_alloc_mtdpart(CONFIG_ESP32_WIFI_MTD_OFFSET, + CONFIG_ESP32_WIFI_MTD_SIZE); + if (!mtd) + { + ferr("ERROR: Failed to alloc MTD partition of SPI Flash\n"); + return ERROR; + } + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) + + ret = setup_smartfs(1, mtd, CONFIG_ESP32_WIFI_FS_MOUNTPT); + if (ret < 0) + { + ferr("ERROR: Failed to setup smartfs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_LITTLEFS) + + const char *path = "/dev/mtdblock1"; + ret = setup_littlefs(path, mtd, CONFIG_ESP32_WIFI_FS_MOUNTPT, 0777); + if (ret < 0) + { + ferr("ERROR: Failed to setup littlefs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_SPIFFS) + + const char *path = "/dev/mtdblock1"; + ret = setup_spiffs(path, mtd, CONFIG_ESP32_WIFI_FS_MOUNTPT, 0777); + if (ret < 0) + { + ferr("ERROR: Failed to setup spiffs\n"); + return ret; + } + +#else + + ferr("ERROR: No supported FS selected. Wi-Fi partition " + "should be mounted before Wi-Fi initialization\n"); + +#endif + + return ret; +} + +#endif +/**************************************************************************** + * Name: init_storage_partition + * + * Description: + * Initialize partition that is dedicated to general use. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int init_storage_partition(void) +{ + int ret = OK; + FAR struct mtd_dev_s *mtd; + + mtd = esp32_spiflash_alloc_mtdpart(CONFIG_ESP32_MTD_OFFSET, + CONFIG_ESP32_MTD_SIZE); + if (!mtd) + { + ferr("ERROR: Failed to alloc MTD partition of SPI Flash\n"); + return ERROR; + } + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) + + ret = setup_smartfs(0, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to setup smartfs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_NXFFS) + + ret = setup_nxffs(mtd, "/mnt"); + if (ret < 0) + { + ferr("ERROR: Failed to setup nxffs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_LITTLEFS) + + const char *path = "/dev/esp32flash"; + ret = setup_littlefs(path, mtd, NULL, 0755); + if (ret < 0) + { + ferr("ERROR: Failed to setup littlefs\n"); + return ret; + } + +#elif defined (CONFIG_ESP32_SPIFLASH_SPIFFS) + + const char *path = "/dev/esp32flash"; + ret = setup_spiffs(path, mtd, NULL, 0755); + if (ret < 0) + { + ferr("ERROR: Failed to setup spiffs\n"); + return ret; + } + +#else + + ret = register_mtddriver("/dev/esp32flash", mtd, 0755, NULL); + if (ret < 0) + { + ferr("ERROR: Failed to register MTD: %d\n", ret); + return ret; + } + +#endif + + return ret; +} + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -52,49 +489,30 @@ int esp32_spiflash_init(void) { - FAR struct mtd_dev_s *mtd; - int ret = ERROR; + int ret = OK; - mtd = esp32_spiflash_alloc_mtdpart(); - -#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) - ret = smart_initialize(0, mtd, NULL); +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION + ret = init_ota_partitions(); if (ret < 0) { - finfo("smart_initialize failed, Trying to erase first...\n"); - ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); - if (ret < 0) - { - ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); - return ret; - } - - finfo("Erase successful, initializing again\n"); - ret = smart_initialize(0, mtd, NULL); - if (ret < 0) - { - ferr("ERROR: smart_initialize failed: %d\n", ret); - return ret; - } - } - -#elif defined (CONFIG_ESP32_SPIFLASH_NXFFS) - ret = nxffs_initialize(mtd); - if (ret < 0) - { - ferr("ERROR: NXFFS init failed: %d\n", ret); - return ret; - } - -#else - ret = register_mtddriver("/dev/esp32flash", mtd, 0755, NULL); - if (ret < 0) - { - ferr("ERROR: Register mtd failed: %d\n", ret); return ret; } #endif +#ifdef CONFIG_ESP32_WIFI_SAVE_PARAM + ret = init_wifi_partition(); + if (ret < 0) + { + return ret; + } +#endif + + ret = init_storage_partition(); + if (ret < 0) + { + return ret; + } + return ret; } diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/Kconfig b/boards/xtensa/esp32/ttgo_lora_esp32/Kconfig similarity index 66% rename from boards/arm/s32k1xx/rddrone-uavcan144/Kconfig rename to boards/xtensa/esp32/ttgo_lora_esp32/Kconfig index c61362c0a40..09beaacf8c4 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan144/Kconfig +++ b/boards/xtensa/esp32/ttgo_lora_esp32/Kconfig @@ -3,6 +3,6 @@ # see the file kconfig-language.txt in the NuttX tools repository. # -if ARCH_BOARD_RDDRONE_UAVCAN144 +if ARCH_BOARD_TTGO_LORA_ESP32 -endif # ARCH_BOARD_RDDRONE_UAVCAN144 +endif # ARCH_BOARD_TTGO_LORA_ESP32 diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/configs/nsh/defconfig b/boards/xtensa/esp32/ttgo_lora_esp32/configs/nsh/defconfig new file mode 100644 index 00000000000..d3117fa04b2 --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/configs/nsh/defconfig @@ -0,0 +1,49 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_ESP32_FLASH_DETECT is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="ttgo_lora_esp32" +CONFIG_ARCH_BOARD_TTGO_LORA_ESP32=y +CONFIG_ARCH_CHIP="esp32" +CONFIG_ARCH_CHIP_ESP32=y +CONFIG_ARCH_CHIP_ESP32WROOM32=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_ESP32_DEFAULT_CPU_FREQ_80=y +CONFIG_ESP32_UART0=y +CONFIG_ESP32_XTAL_26MHz=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_MM_REGIONS=3 +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/include/board.h b/boards/xtensa/esp32/ttgo_lora_esp32/include/board.h new file mode 100644 index 00000000000..8aff8d80006 --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/include/board.h @@ -0,0 +1,85 @@ +/**************************************************************************** + * boards/xtensa/esp32/ttgo_lora_esp32/include/board.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __BOARDS_XTENSA_ESP32_TTGO_LORA_ESP32_INCLUDE_BOARD_H +#define __BOARDS_XTENSA_ESP32_TTGO_LORA_ESP32_INCLUDE_BOARD_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ + +/* The TTGO-LoRa-SX1276-ESP32 is fitted with a 26MHz crystal */ + +#ifdef CONFIG_ESP32_XTAL_26MHz +# define BOARD_XTAL_FREQUENCY 26000000 +#else +# define BOARD_XTAL_FREQUENCY 40000000 +#endif + +/* Clock reconfiguration is currently disabled, so the CPU will be running + * at the XTAL frequency or at two times the XTAL frequency, depending upon + * how we load the code: + * + * - If we load the code into FLASH at address 0x1000 where it is started by + * the second level bootloader, then the frequency is the crystal + * frequency. + * - If we load the code into IRAM after the second level bootloader has run + * this frequency will be twice the crystal frequency. + * + * Don't ask me for an explanation. + */ + +/* Note: The bootloader (esp-idf bootloader.bin) configures: + * + * - CPU frequency to 80MHz + * - The XTAL frequency according to the SDK config CONFIG_ESP32_XTAL_FREQ, + * which is 40MHz by default. + * + * Reference: + * https://github.com/espressif/esp-idf/blob + * /6fd855ab8d00d23bad4660216bc2122c2285d5be/components + * /bootloader_support/src/bootloader_clock.c#L38-L62 + */ + +#ifdef CONFIG_ESP32_RUN_IRAM +# define BOARD_CLOCK_FREQUENCY (2 * BOARD_XTAL_FREQUENCY) +#else +#ifdef CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ +# define BOARD_CLOCK_FREQUENCY (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000) +#else +# define BOARD_CLOCK_FREQUENCY 80000000 +#endif +#endif + +/* LED definitions **********************************************************/ + +/* Define how many LEDs this board has (needed by userleds) */ + +#define BOARD_NLEDS 1 + +/* GPIO pins used by the GPIO Subsystem */ + +#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */ +#define BOARD_NGPIOIN 1 /* Amount of GPIO Input without Interruption */ +#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */ + +#endif /* __BOARDS_XTENSA_ESP32_TTGO_LORA_ESP32_INCLUDE_BOARD_H */ diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/scripts/.gitignore b/boards/xtensa/esp32/ttgo_lora_esp32/scripts/.gitignore new file mode 100644 index 00000000000..461270524bd --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/scripts/.gitignore @@ -0,0 +1 @@ +/esp32_out.ld diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/scripts/Make.defs b/boards/xtensa/esp32/ttgo_lora_esp32/scripts/Make.defs new file mode 100644 index 00000000000..ea9e268aceb --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/scripts/Make.defs @@ -0,0 +1,126 @@ +############################################################################ +# boards/xtensa/esp32/ttgo_lora_esp32/scripts/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/.config +include $(TOPDIR)/tools/Config.mk +include $(TOPDIR)/tools/esp32/Config.mk +include $(TOPDIR)/arch/xtensa/src/lx6/Toolchain.defs + +# Pick the linker scripts from the board level if they exist, if not +# pick the common linker scripts. + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld),) + LDSCRIPT_ROM = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +else + LDSCRIPT_ROM = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_rom.ld +endif + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld),) + LDSCRIPT_SECT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.ld +else + ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) + LDSCRIPT_SECT = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32_mcuboot.ld + else + LDSCRIPT_SECT = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32.ld + endif +endif + +ifneq ($(wildcard $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld),) + LDSCRIPT_TEMPLATE = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld +else + LDSCRIPT_TEMPLATE = $(BOARD_COMMON_DIR)$(DELIM)scripts$(DELIM)esp32.template.ld +endif + +# This is the generated memory layout linker script. It will always be +# generated at the board level. + +LDSCRIPT_MEMORY = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld + +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + ARCHSCRIPT = -T "${shell cygpath -w $(LDSCRIPT_MEMORY)}" + ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT_SECT)}" + ARCHSCRIPT += -T "${shell cygpath -w $(LDSCRIPT_ROM)}" +else + ARCHSCRIPT = -T$(LDSCRIPT_MEMORY) -T$(LDSCRIPT_SECT) -T$(LDSCRIPT_ROM) +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -mlongcalls +ARCHCXXFLAGS = $(ARCHCFLAGS) -fno-exceptions -fcheck-new -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHPICFLAGS = -fpic + +# if SPIRAM/PSRAM is used then we need to include a workaround + +ifeq ($(CONFIG_ESP32_SPIRAM),y) + ARCHCFLAGS += -mfix-esp32-psram-cache-issue +endif + +CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) +AFLAGS := $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# Loadable module definitions + +CMODULEFLAGS = $(CFLAGS) -mtext-section-literals + +LDMODULEFLAGS = -r -e module_initialize +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}" +else + LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld +endif + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mtext-section-literals +CXXELFFLAGS = $(CXXFLAGS) -mtext-section-literals + +LDELFFLAGS = -r -e main +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)$(DELIM)binfmt$(DELIM)libelf$(DELIM)gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)$(DELIM)binfmt$(DELIM)libelf$(DELIM)gnu-elf.ld +endif + +ifeq ($(CONFIG_CYGWIN_WINTOOL),y) + LDFLAGS += -Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" --cref +else + LDFLAGS += -Map=$(TOPDIR)/nuttx.map --cref +endif + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/src/Make.defs b/boards/xtensa/esp32/ttgo_lora_esp32/src/Make.defs new file mode 100644 index 00000000000..ee2742db50d --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/Make.defs @@ -0,0 +1,70 @@ +############################################################################ +# boards/xtensa/esp32/ttgo_lora_esp32/src/Make.defs +# +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. +# +############################################################################ + +include $(TOPDIR)/Make.defs + +CONFIGFILE = $(TOPDIR)$(DELIM)include$(DELIM)nuttx$(DELIM)config.h + +CSRCS = esp32_boot.c esp32_bringup.c + +ifeq ($(CONFIG_BOARDCTL),y) +CSRCS += esp32_appinit.c +ifeq ($(CONFIG_BOARDCTL_RESET),y) +CSRCS += esp32_reset.c +endif +endif + +ifeq ($(CONFIG_MMCSD),y) +CSRCS += esp32_mmcsd.c +endif + +ifeq ($(CONFIG_ESP32_SPIFLASH),y) +CSRCS += esp32_spiflash.c +endif + +ifeq ($(CONFIG_DEV_GPIO),y) +CSRCS += esp32_gpio.c +endif + +ifeq ($(CONFIG_USERLED),y) +CSRCS += esp32_userleds.c +endif + +ifeq ($(CONFIG_ARCH_BUTTONS),y) +CSRCS += esp32_buttons.c +endif + +SCRIPTOUT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)esp32_out.ld + +.PHONY = context distclean + +$(SCRIPTOUT): $(LDSCRIPT_TEMPLATE) $(CONFIGFILE) + $(Q) $(CC) -isystem $(TOPDIR)/include -C -P -x c -E $(LDSCRIPT_TEMPLATE) -o $@ + +context:: $(SCRIPTOUT) + +distclean:: + $(call DELFILE, $(SCRIPTOUT)) + $(call DELFILE, $(TOPDIR)/esp32_qemu_img.bin) + +DEPPATH += --dep-path board +VPATH += :board +CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board) + diff --git a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_appinit.c b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_appinit.c similarity index 92% rename from boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_appinit.c rename to boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_appinit.c index 4775005db86..840720d03bd 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_appinit.c +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_appinit.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan144/src/s32k1xx_appinit.c + * boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_appinit.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -24,18 +24,17 @@ #include +#include #include -#include "rddrone-uavcan144.h" +#include "ttgo_lora_esp32.h" + +#ifdef CONFIG_BOARDCTL /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -#ifndef OK -# define OK 0 -#endif - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -54,7 +53,7 @@ * meaning to NuttX; the meaning of the argument is a contract * between the board-specific initialization logic and the * matching application logic. The value could be such things as a - * mode enumeration value, a set of DIP switch switch settings, a + * mode enumeration value, a set of DIP switch settings, a * pointer to configuration data read from a file or serial FLASH, * or whatever you would like to do with it. Every implementation * should accept zero/NULL as a default configuration. @@ -74,6 +73,8 @@ int board_app_initialize(uintptr_t arg) #else /* Perform board-specific initialization */ - return s32k1xx_bringup(); + return esp32_bringup(); #endif } + +#endif /* CONFIG_BOARDCTL */ diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_boot.c b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_boot.c new file mode 100644 index 00000000000..982411a9252 --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_boot.c @@ -0,0 +1,96 @@ +/**************************************************************************** + * boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_boot.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include + +#include "ttgo_lora_esp32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32_board_initialize + * + * Description: + * All ESP32 architectures must provide the following entry point. + * This entry point is called early in the initialization -- after all + * memory has been configured and mapped but before any devices have been + * initialized. + * + ****************************************************************************/ + +void esp32_board_initialize(void) +{ +} + +/**************************************************************************** + * Name: board_late_initialize + * + * Description: + * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional + * initialization call will be performed in the boot-up sequence to a + * function called board_late_initialize(). board_late_initialize() will + * be called immediately after up_initialize() is called and just before + * the initial application is started. This additional initialization + * phase may be used, for example, to initialize board-specific device + * drivers. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARD_LATE_INITIALIZE +void board_late_initialize(void) +{ + /* Perform board-specific initialization */ + + esp32_bringup(); + +#ifdef CONFIG_SMP + /* To avoid corrupting the heap, this region of memory (~3KB) is not + * included until the APP CPU has started. + * So we can't add it with the rest of the regions at xtensa_add_region(), + * that function is called early from up_initialize(). We wait until the + * SMP bringup is complete. + */ + + umm_addregion((FAR void *)HEAP_REGION_ROMAPP_START, + (size_t)(HEAP_REGION_ROMAPP_END - HEAP_REGION_ROMAPP_START)); +#endif +} +#endif diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_bringup.c b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_bringup.c new file mode 100644 index 00000000000..3d307cfb2d8 --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_bringup.c @@ -0,0 +1,397 @@ +/**************************************************************************** + * boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_bringup.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "esp32_spiflash.h" +#include "esp32_partition.h" + +#ifdef CONFIG_USERLED +# include +#endif + +#ifdef CONFIG_CAN_MCP2515 +# include "esp32_mcp2515.h" +#endif + +#ifdef CONFIG_TIMER +#include +#endif + +#ifdef CONFIG_ONESHOT +# include "esp32_board_oneshot.h" +#endif + +#ifdef CONFIG_WATCHDOG +# include "esp32_board_wdt.h" +#endif + +#ifdef CONFIG_ESP32_WIRELESS +# include "esp32_board_wlan.h" +#endif + +#ifdef CONFIG_ESP32_I2C +# include "esp32_board_i2c.h" +#endif + +#ifdef CONFIG_SENSORS_BMP180 +# include "esp32_bmp180.h" +#endif + +#ifdef CONFIG_LCD_HT16K33 +# include "esp32_ht16k33.h" +#endif + +#ifdef CONFIG_ESP32_AES_ACCELERATOR +# include "esp32_aes.h" +#endif + +#ifdef CONFIG_ESP32_RT_TIMER +# include "esp32_rt_timer.h" +#endif + +#ifdef CONFIG_INPUT_BUTTONS +# include +#endif + +#ifdef CONFIG_RTC_DRIVER +# include "esp32_rtc_lowerhalf.h" +#endif + +#ifdef CONFIG_SPI_DRIVER +# include "esp32_spi.h" +#endif + +#include "ttgo_lora_esp32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32_bringup + * + * Description: + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_BOARDCTL=y : + * Called from the NSH library + * + ****************************************************************************/ + +int esp32_bringup(void) +{ + int ret; + +#ifdef CONFIG_ESP32_AES_ACCELERATOR + ret = esp32_aes_init(); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize AES: %d\n", ret); + } +#endif + +#if defined(CONFIG_ESP32_EFUSE) + ret = esp32_efuse_initialize("/dev/efuse"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to init EFUSE: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = nx_mount(NULL, "/proc", "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret); + } +#endif + +#ifdef CONFIG_FS_TMPFS + /* Mount the tmpfs file system */ + + ret = nx_mount(NULL, CONFIG_LIBC_TMPDIR, "tmpfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount tmpfs at %s: %d\n", + CONFIG_LIBC_TMPDIR, ret); + } +#endif + +#ifdef CONFIG_ESP32_SPIFLASH + +#ifdef CONFIG_ESP32_SPIFLASH_ENCRYPTION_TEST + esp32_spiflash_encrypt_test(); +#endif + + ret = esp32_spiflash_init(); + if (ret) + { + syslog(LOG_ERR, "ERROR: Failed to initialize SPI Flash\n"); + return ret; + } +#endif + +#ifdef CONFIG_ESP32_PARTITION + ret = esp32_partition_init(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize partition error=%d\n", + ret); + return ret; + } +#endif + +#ifdef CONFIG_ESP32_RT_TIMER + ret = esp32_rt_timer_init(); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize RT timer: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESP32_WIRELESS + ret = board_wlan_init(); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to initialize wireless subsystem=%d\n", + ret); + return ret; + } +#endif + +/* First, register the timer drivers and let timer 1 for oneshot + * if it is enabled. + */ + +#ifdef CONFIG_TIMER + +#if defined(CONFIG_ESP32_TIMER0) && !defined(CONFIG_ESP32_RT_TIMER) + ret = esp32_timer_initialize("/dev/timer0", TIMER0); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize timer driver: %d\n", + ret); + return ret; + } +#endif + +#if defined(CONFIG_ESP32_TIMER1) && !defined(CONFIG_ONESHOT) + ret = esp32_timer_initialize("/dev/timer1", TIMER1); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize timer driver: %d\n", + ret); + return ret; + } +#endif + +#ifdef CONFIG_ESP32_TIMER2 + ret = esp32_timer_initialize("/dev/timer2", TIMER2); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize timer driver: %d\n", + ret); + return ret; + } +#endif + +#ifdef CONFIG_ESP32_TIMER3 + ret = esp32_timer_initialize("/dev/timer3", TIMER3); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize timer driver: %d\n", + ret); + return ret; + } +#endif + +#endif /* CONFIG_TIMER */ + + /* Now register one oneshot driver */ + +#if defined(CONFIG_ONESHOT) && defined(CONFIG_ESP32_TIMER1) + + ret = esp32_oneshot_init(ONESHOT_TIMER, ONESHOT_RESOLUTION_US); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: esp32_oneshot_init() failed: %d\n", ret); + } + +#endif /* CONFIG_ONESHOT */ + +#ifdef CONFIG_USERLED + /* Register the LED driver */ + + ret = userled_lower_initialize("/dev/userleds"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_CAN_MCP2515 + /* Configure and initialize the MCP2515 CAN device */ + + ret = board_mcp2515_initialize(0); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: board_mcp2515_initialize() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_WATCHDOG + /* Configure watchdog timer */ + + ret = board_wdt_init(); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize watchdog drivers: %d\n", + ret); + } +#endif + +#ifdef CONFIG_DEV_GPIO + ret = esp32_gpio_init(); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_I2C_DRIVER + +#ifdef CONFIG_ESP32_I2C0 + ret = esp32_i2c_register(0); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize I2C Driver for I2C0: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_ESP32_I2C1 + ret = esp32_i2c_register(1); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize I2C Driver for I2C1: %d\n", ret); + return ret; + } +#endif + +#endif + +#ifdef CONFIG_SENSORS_BMP180 + /* Try to register BMP180 device in I2C0 */ + + ret = board_bmp180_initialize(0, 0); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize BMP180 driver: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_LCD_HT16K33 + /* Try to register HT16K33 in the I2C0 */ + + ret = board_ht16k33_initialize(0, 0); + + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize HT16K33 driver: %d\n", ret); + return ret; + } +#endif + +#ifdef CONFIG_INPUT_BUTTONS + /* Register the BUTTON driver */ + + ret = btn_lower_initialize("/dev/buttons"); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_RTC_DRIVER + /* Instantiate the ESP32 RTC driver */ + + ret = esp32_rtc_driverinit(); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to Instantiate the RTC driver: %d\n", ret); + } +#endif + +#ifdef CONFIG_SPI_DRIVER +# ifdef CONFIG_ESP32_SPI2 + ret = board_spidev_initialize(ESP32_SPI2); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize SPI%d driver: %d\n", + ESP32_SPI2, ret); + } +# endif +#endif + + /* If we got here then perhaps not all initialization was successful, but + * at least enough succeeded to bring-up NSH with perhaps reduced + * capabilities. + */ + + UNUSED(ret); + return OK; +} diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_buttons.c b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_buttons.c new file mode 100644 index 00000000000..4ae808d3112 --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_buttons.c @@ -0,0 +1,166 @@ +/**************************************************************************** + * boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_buttons.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "esp32_gpio.h" + +#include "ttgo_lora_esp32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_button_initialize + * + * Description: + * board_button_initialize() must be called to initialize button resources. + * After that, board_buttons() may be called to collect the current state + * of all buttons or board_button_irq() may be called to register button + * interrupt handlers. + * + ****************************************************************************/ + +uint32_t board_button_initialize(void) +{ + esp32_configgpio(BUTTON_BOOT, INPUT_FUNCTION_3 | PULLUP); + return 1; +} + +/**************************************************************************** + * Name: board_buttons + * + * Description: + * After board_button_initialize() has been called, board_buttons() may be + * called to collect the state of all buttons. board_buttons() returns an + * 8-bit bit set with each bit associated with a button. See the + * BUTTON_*_BIT definitions in board.h for the meaning of each bit. + * + ****************************************************************************/ + +uint32_t board_buttons(void) +{ + uint8_t ret = 0; + int i = 0; + int n = 0; + + bool b0 = esp32_gpioread(BUTTON_BOOT); + + for (i = 0; i < 10; i++) + { + up_mdelay(1); /* TODO */ + + bool b1 = esp32_gpioread(BUTTON_BOOT); + + if (b0 == b1) + { + n++; + } + else + { + n = 0; + } + + if (3 == n) + { + break; + } + + b0 = b1; + } + + iinfo("b=%d n=%d \n", b0, n); + + /* Low value means that the button is pressed */ + + if (!b0) + { + ret = 0x1; + } + + return ret; +} + +/**************************************************************************** + * Name: board_button_irq + * + * Description: + * board_button_irq() may be called to register an interrupt handler that + * will be called when a button is depressed or released. The ID value is + * a button enumeration value that uniquely identifies a button resource. + * See the BUTTON_* definitions in board.h for the meaning of enumeration + * value. + * + ****************************************************************************/ + +#ifdef CONFIG_ARCH_IRQBUTTONS +int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) +{ + int ret; + DEBUGASSERT(id == BUTTON_BOOT); + + int irq = ESP32_PIN2IRQ(BUTTON_BOOT); + + if (NULL != irqhandler) + { + /* Make sure the interrupt is disabled */ + + esp32_gpioirqdisable(irq); + + ret = irq_attach(irq, irqhandler, arg); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: irq_attach() failed: %d\n", ret); + return ret; + } + + gpioinfo("Attach %p\n", irqhandler); + + gpioinfo("Enabling the interrupt\n"); + + /* Configure the interrupt for rising and falling edges */ + + esp32_gpioirqenable(irq, CHANGE); + } + else + { + gpioinfo("Disable the interrupt\n"); + esp32_gpioirqdisable(irq); + } + + return OK; +} +#endif diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_gpio.c b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_gpio.c new file mode 100644 index 00000000000..a1d3f03046d --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_gpio.c @@ -0,0 +1,384 @@ +/**************************************************************************** + * boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_gpio.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include + +#include + +#include "ttgo_lora_esp32.h" +#include "esp32_gpio.h" +#include "hardware/esp32_gpio_sigmap.h" + +#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#if !defined(CONFIG_ESP32_GPIO_IRQ) && BOARD_NGPIOINT > 0 +# error "NGPIOINT is > 0 and GPIO interrupts aren't enabled" +#endif + +/* Output pins. GPIO15 is used as an example, any other outputs could be + * used. + */ + +#define GPIO_OUT1 15 + +/* Input pins. GPIO18 is used as an example, any other inputs could be + * used. + */ + +#define GPIO_IN1 18 + +/* Interrupt pins. GPIO22 is used as an example, any other inputs could be + * used. + */ + +#define GPIO_IRQPIN1 22 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct esp32gpio_dev_s +{ + struct gpio_dev_s gpio; + uint8_t id; +}; + +struct esp32gpint_dev_s +{ + struct esp32gpio_dev_s esp32gpio; + pin_interrupt_t callback; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpout_write(FAR struct gpio_dev_s *dev, bool value); +#endif + +#if BOARD_NGPIOIN > 0 +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value); +#endif + +#if BOARD_NGPIOINT > 0 +static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback); +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static const struct gpio_operations_s gpout_ops = +{ + .go_read = gpout_read, + .go_write = gpout_write, + .go_attach = NULL, + .go_enable = NULL, +}; + +/* This array maps the GPIO pins used as OUTPUT */ + +static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] = +{ + GPIO_OUT1 +}; + +static struct esp32gpio_dev_s g_gpout[BOARD_NGPIOOUT]; +#endif + +#if BOARD_NGPIOIN > 0 +static const struct gpio_operations_s gpin_ops = +{ + .go_read = gpin_read, + .go_write = NULL, + .go_attach = NULL, + .go_enable = NULL, +}; + +/* This array maps the GPIO pins used as INTERRUPT INPUTS */ + +static const uint32_t g_gpioinputs[BOARD_NGPIOIN] = +{ + GPIO_IN1 +}; + +static struct esp32gpio_dev_s g_gpin[BOARD_NGPIOIN]; +#endif + +#if BOARD_NGPIOINT > 0 +static const struct gpio_operations_s gpint_ops = +{ + .go_read = gpint_read, + .go_write = NULL, + .go_attach = gpint_attach, + .go_enable = gpint_enable, +}; + +/* This array maps the GPIO pins used as INTERRUPT INPUTS */ + +static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] = +{ + GPIO_IRQPIN1, +}; + +static struct esp32gpint_dev_s g_gpint[BOARD_NGPIOINT]; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gpout_read + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct esp32gpio_dev_s *esp32gpio = (FAR struct esp32gpio_dev_s *)dev; + + DEBUGASSERT(esp32gpio != NULL && value != NULL); + DEBUGASSERT(esp32gpio->id < BOARD_NGPIOOUT); + gpioinfo("Reading...\n"); + + *value = esp32_gpioread(g_gpiooutputs[esp32gpio->id]); + return OK; +} + +/**************************************************************************** + * Name: gpout_write + ****************************************************************************/ + +static int gpout_write(FAR struct gpio_dev_s *dev, bool value) +{ + FAR struct esp32gpio_dev_s *esp32gpio = (FAR struct esp32gpio_dev_s *)dev; + + DEBUGASSERT(esp32gpio != NULL); + DEBUGASSERT(esp32gpio->id < BOARD_NGPIOOUT); + gpioinfo("Writing %d\n", (int)value); + + esp32_gpiowrite(g_gpiooutputs[esp32gpio->id], value); + return OK; +} +#endif + +/**************************************************************************** + * Name: gpin_read + ****************************************************************************/ + +#if BOARD_NGPIOIN > 0 +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct esp32gpio_dev_s *esp32gpio = (FAR struct esp32gpio_dev_s *)dev; + + DEBUGASSERT(esp32gpio != NULL && value != NULL); + DEBUGASSERT(esp32gpio->id < BOARD_NGPIOIN); + gpioinfo("Reading... pin %d\n", g_gpioinputs[esp32gpio->id]); + + *value = esp32_gpioread(g_gpioinputs[esp32gpio->id]); + return OK; +} +#endif + +/**************************************************************************** + * Name: esp32gpio_interrupt + ****************************************************************************/ + +#if BOARD_NGPIOINT > 0 +static int esp32gpio_interrupt(int irq, void *context, void *arg) +{ + FAR struct esp32gpint_dev_s *esp32gpint = + (FAR struct esp32gpint_dev_s *)arg; + + DEBUGASSERT(esp32gpint != NULL && esp32gpint->callback != NULL); + gpioinfo("Interrupt! callback=%p\n", esp32gpint->callback); + + esp32gpint->callback(&esp32gpint->esp32gpio.gpio, + esp32gpint->esp32gpio.id); + return OK; +} + +/**************************************************************************** + * Name: gpint_read + ****************************************************************************/ + +static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct esp32gpint_dev_s *esp32gpint = + (FAR struct esp32gpint_dev_s *)dev; + + DEBUGASSERT(esp32gpint != NULL && value != NULL); + DEBUGASSERT(esp32gpint->esp32gpio.id < BOARD_NGPIOINT); + gpioinfo("Reading int pin...\n"); + + *value = esp32_gpioread(g_gpiointinputs[esp32gpint->esp32gpio.id]); + return OK; +} + +/**************************************************************************** + * Name: gpint_attach + ****************************************************************************/ + +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback) +{ + FAR struct esp32gpint_dev_s *esp32gpint = + (FAR struct esp32gpint_dev_s *)dev; + int irq = ESP32_PIN2IRQ(g_gpiointinputs[esp32gpint->esp32gpio.id]); + int ret; + + gpioinfo("Attaching the callback\n"); + + /* Make sure the interrupt is disabled */ + + esp32_gpioirqdisable(irq); + ret = irq_attach(irq, + esp32gpio_interrupt, + &g_gpint[esp32gpint->esp32gpio.id]); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret); + return ret; + } + + gpioinfo("Attach %p\n", callback); + esp32gpint->callback = callback; + return OK; +} + +/**************************************************************************** + * Name: gpint_enable + ****************************************************************************/ + +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable) +{ + FAR struct esp32gpint_dev_s *esp32gpint = + (FAR struct esp32gpint_dev_s *)dev; + int irq = ESP32_PIN2IRQ(g_gpiointinputs[esp32gpint->esp32gpio.id]); + + if (enable) + { + if (esp32gpint->callback != NULL) + { + gpioinfo("Enabling the interrupt\n"); + + /* Configure the interrupt for rising edge */ + + esp32_gpioirqenable(irq, RISING); + } + } + else + { + gpioinfo("Disable the interrupt\n"); + esp32_gpioirqdisable(irq); + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32_gpio_init + ****************************************************************************/ + +int esp32_gpio_init(void) +{ + int i; + +#if BOARD_NGPIOOUT > 0 + for (i = 0; i < BOARD_NGPIOOUT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN; + g_gpout[i].gpio.gp_ops = &gpout_ops; + g_gpout[i].id = i; + gpio_pin_register(&g_gpout[i].gpio, i); + + /* Configure the pins that will be used as output */ + + esp32_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0); + esp32_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_3 | + INPUT_FUNCTION_3); + esp32_gpiowrite(g_gpiooutputs[i], 0); + } +#endif + +#if BOARD_NGPIOIN > 0 + for (i = 0; i < BOARD_NGPIOIN; i++) + { + /* Setup and register the GPIO pin */ + + g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN; + g_gpin[i].gpio.gp_ops = &gpin_ops; + g_gpin[i].id = i; + gpio_pin_register(&g_gpin[i].gpio, i); + + /* Configure the pins that will be used as INPUT */ + + esp32_configgpio(g_gpioinputs[i], INPUT_FUNCTION_3); + } +#endif + +#if BOARD_NGPIOINT > 0 + for (i = 0; i < BOARD_NGPIOINT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpint[i].esp32gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN; + g_gpint[i].esp32gpio.gpio.gp_ops = &gpint_ops; + g_gpint[i].esp32gpio.id = i; + gpio_pin_register(&g_gpint[i].esp32gpio.gpio, i); + + /* Configure the pins that will be used as interrupt input */ + + esp32_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_3 | PULLDOWN); + } +#endif + + return OK; +} +#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */ diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_reset.c b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_reset.c new file mode 100644 index 00000000000..25a93347fed --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_reset.c @@ -0,0 +1,63 @@ +/**************************************************************************** + * boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_reset.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#ifdef CONFIG_BOARDCTL_RESET + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_reset + * + * Description: + * Reset board. Support for this function is required by board-level + * logic if CONFIG_BOARDCTL_RESET is selected. + * + * Input Parameters: + * status - Status information provided with the reset event. This + * meaning of this status information is board-specific. If not + * used by a board, the value zero may be provided in calls to + * board_reset(). + * + * Returned Value: + * If this function returns, then it was not possible to power-off the + * board due to some constraints. The return value in this case is a + * board-specific reason for the failure to shutdown. + * + ****************************************************************************/ + +int board_reset(int status) +{ + up_systemreset(); + + return 0; +} + +#endif /* CONFIG_BOARDCTL_RESET */ diff --git a/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_spiflash.c b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_spiflash.c new file mode 100644 index 00000000000..f4a623af314 --- /dev/null +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_spiflash.c @@ -0,0 +1,370 @@ +/**************************************************************************** + * boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_spiflash.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#ifdef CONFIG_BCH +#include +#endif + +#include "esp32_spiflash.h" +#include "ttgo_lora_esp32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0])) + +#define ESP32_MTD_OFFSET CONFIG_ESP32_MTD_OFFSET +#define ESP32_MTD_SIZE CONFIG_ESP32_MTD_SIZE + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION + +struct ota_partition_s +{ + uint32_t offset; /* Partition offset from the beginning of MTD */ + uint32_t size; /* Partition size in bytes */ + const char *devpath; /* Partition device path */ +}; + +#endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static int init_ota_partitions(void); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static const struct ota_partition_s g_ota_partition_table[] = +{ + { + .offset = CONFIG_ESP32_OTA_PRIMARY_SLOT_OFFSET, + .size = CONFIG_ESP32_OTA_SLOT_SIZE, + .devpath = CONFIG_ESP32_OTA_PRIMARY_SLOT_DEVPATH + }, + { + .offset = CONFIG_ESP32_OTA_SECONDARY_SLOT_OFFSET, + .size = CONFIG_ESP32_OTA_SLOT_SIZE, + .devpath = CONFIG_ESP32_OTA_SECONDARY_SLOT_DEVPATH + }, + { + .offset = CONFIG_ESP32_OTA_SCRATCH_OFFSET, + .size = CONFIG_ESP32_OTA_SCRATCH_SIZE, + .devpath = CONFIG_ESP32_OTA_SCRATCH_DEVPATH + } +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION +static int init_ota_partitions(void) +{ + FAR struct mtd_dev_s *mtd; +#ifdef CONFIG_BCH + char blockdev[18]; +#endif + int ret = OK; + + for (int i = 0; i < ARRAYSIZE(g_ota_partition_table); ++i) + { + const struct ota_partition_s *part = &g_ota_partition_table[i]; + mtd = esp32_spiflash_alloc_mtdpart(part->offset, part->size); + + ret = ftl_initialize(i, mtd); + if (ret < 0) + { + ferr("ERROR: Failed to initialize the FTL layer: %d\n", ret); + return ret; + } + +#ifdef CONFIG_BCH + snprintf(blockdev, 18, "/dev/mtdblock%d", i); + + ret = bchdev_register(blockdev, part->devpath, false); + if (ret < 0) + { + ferr("ERROR: bchdev_register %s failed: %d\n", part->devpath, ret); + return ret; + } +#endif + } + + return ret; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32_spiflash_init + * + * Description: + * Initialize the SPIFLASH and register the MTD device. + ****************************************************************************/ + +int esp32_spiflash_init(void) +{ + FAR struct mtd_dev_s *mtd; + int ret = ERROR; + +#ifdef CONFIG_ESP32_HAVE_OTA_PARTITION + ret = init_ota_partitions(); + if (ret < 0) + { + return ret; + } +#endif + + mtd = esp32_spiflash_alloc_mtdpart(ESP32_MTD_OFFSET, ESP32_MTD_SIZE); + +#if defined (CONFIG_ESP32_SPIFLASH_SMARTFS) + ret = smart_initialize(0, mtd, NULL); + if (ret < 0) + { + finfo("smart_initialize failed, Trying to erase first...\n"); + ret = mtd->ioctl(mtd, MTDIOC_BULKERASE, 0); + if (ret < 0) + { + ferr("ERROR: ioctl(BULKERASE) failed: %d\n", ret); + return ret; + } + + finfo("Erase successful, initializing again\n"); + ret = smart_initialize(0, mtd, NULL); + if (ret < 0) + { + ferr("ERROR: smart_initialize failed: %d\n", ret); + return ret; + } + } + +#elif defined (CONFIG_ESP32_SPIFLASH_NXFFS) + ret = nxffs_initialize(mtd); + if (ret < 0) + { + ferr("ERROR: NXFFS init failed: %d\n", ret); + return ret; + } + +#else + ret = register_mtddriver("/dev/esp32flash", mtd, 0755, NULL); + if (ret < 0) + { + ferr("ERROR: Register mtd failed: %d\n", ret); + return ret; + } +#endif + + return ret; +} + +/**************************************************************************** + * Name: esp32_spiflash_encrypt_test + * + * Description: + * Test ESP32 SPI Flash driver read/write with encryption. + * + * Input Parameters: + * None + * + * Returned Value: + * None. + * + ****************************************************************************/ + +#ifdef CONFIG_ESP32_SPIFLASH_ENCRYPTION_TEST + +void esp32_spiflash_encrypt_test(void) +{ + int i; + int ret; + uint8_t *wbuf; + uint8_t *rbuf; + struct mtd_geometry_s geo; + uint32_t erase_block; + uint32_t erase_nblocks; + uint32_t rw_block; + uint32_t rw_nblocks; + struct mtd_dev_s *mtd = esp32_spiflash_get_mtd(); + struct mtd_dev_s *enc_mtd = esp32_spiflash_encrypt_get_mtd(); + const uint32_t address = CONFIG_ESP32_SPIFLASH_TEST_ADDRESS; + const uint32_t size = 4096; + + ret = MTD_IOCTL(enc_mtd, MTDIOC_GEOMETRY, + (unsigned long)(uintptr_t)&geo); + if (ret < 0) + { + ferr("ERROR: Failed to get GEO ret = %d\n", ret); + DEBUGASSERT(0); + } + + wbuf = kmm_malloc(size); + if (!wbuf) + { + ferr("ERROR: Failed to alloc %d heap\n", size); + DEBUGASSERT(0); + } + + rbuf = kmm_malloc(size); + if (!rbuf) + { + ferr("ERROR: Failed to alloc %d heap\n", size); + DEBUGASSERT(0); + } + + for (i = 0; i < size; i++) + { + wbuf[i] = (uint8_t)random(); + } + + erase_block = address / geo.erasesize; + erase_nblocks = size / geo.erasesize; + + rw_block = address / geo.blocksize; + rw_nblocks = size / geo.blocksize; + + ret = MTD_ERASE(enc_mtd, erase_block, erase_nblocks); + if (ret != erase_nblocks) + { + ferr("ERROR: Failed to erase block ret=%d\n", ret); + DEBUGASSERT(0); + } + + ret = MTD_BWRITE(enc_mtd, rw_block, rw_nblocks, wbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to encrypt write ret=%d\n", ret); + DEBUGASSERT(0); + } + + memset(rbuf, 0, size); + ret = MTD_BREAD(enc_mtd, rw_block, rw_nblocks, rbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to decrypt read ret=%d\n", ret); + DEBUGASSERT(0); + } + + if (memcmp(wbuf, rbuf, size)) + { + ferr("ASSERT: Encrypted and decrypted data is not same\n"); + DEBUGASSERT(0); + } + + memset(rbuf, 0, size); + ret = MTD_BREAD(mtd, rw_block, rw_nblocks, rbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to read ret=%d\n", ret); + DEBUGASSERT(0); + } + + if (!memcmp(wbuf, rbuf, size)) + { + ferr("ASSERT: Encrypted and normal data is same\n"); + DEBUGASSERT(0); + } + + for (i = 0; i < size; i++) + { + wbuf[i] = (uint8_t)random(); + } + + ret = MTD_ERASE(enc_mtd, erase_block, erase_nblocks); + if (ret != erase_nblocks) + { + ferr("ERROR: Failed to erase ret=%d\n", ret); + DEBUGASSERT(0); + } + + ret = MTD_BWRITE(mtd, rw_block, rw_nblocks, wbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to write ret=%d\n", ret); + DEBUGASSERT(0); + } + + memset(rbuf, 0, size); + ret = MTD_BREAD(enc_mtd, rw_block, rw_nblocks, rbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to decrypt read ret=%d\n", ret); + DEBUGASSERT(0); + } + + if (!memcmp(wbuf, rbuf, size)) + { + ferr("ASSERT: Normal and decrypted data is same\n"); + DEBUGASSERT(0); + } + + memset(rbuf, 0, size); + ret = MTD_BREAD(mtd, rw_block, rw_nblocks, rbuf); + if (ret != rw_nblocks) + { + ferr("ERROR: Failed to read ret=%d\n", ret); + DEBUGASSERT(0); + } + + if (memcmp(wbuf, rbuf, size)) + { + ferr("ASSERT: Normal and normal data is not same\n"); + DEBUGASSERT(0); + } + + kmm_free(wbuf); + kmm_free(rbuf); + + finfo("INFO: ESP32 SPI Flash encryption test successfully\n"); +} + +#endif /* CONFIG_ESP32_SPIFLASH_ENCRYPTION_TEST */ diff --git a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_userleds.c b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_userleds.c similarity index 71% rename from boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_userleds.c rename to boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_userleds.c index 2e7573a8653..3e89b7a6389 100644 --- a/boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_userleds.c +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_userleds.c @@ -1,5 +1,5 @@ /**************************************************************************** - * boards/arm/s32k1xx/rddrone-uavcan146/src/s32k1xx_userleds.c + * boards/xtensa/esp32/ttgo_lora_esp32/src/esp32_userleds.c * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -29,16 +29,21 @@ #include #include - -#include "arm_arch.h" -#include "arm_internal.h" - -#include "s32k1xx_pin.h" -#include "rddrone-uavcan146.h" - #include -#ifndef CONFIG_ARCH_LEDS +#include "esp32_gpio.h" +#include "ttgo_lora_esp32.h" + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* This array maps an LED number to GPIO pin configuration */ + +static const uint32_t g_ledcfg[BOARD_NLEDS] = +{ + GPIO_LED1, +}; /**************************************************************************** * Public Functions @@ -50,11 +55,13 @@ uint32_t board_userled_initialize(void) { - /* Configure LED GPIOs for output */ + uint8_t i; + + for (i = 0; i < BOARD_NLEDS; i++) + { + esp32_configgpio(g_ledcfg[i], OUTPUT); + } - s32k1xx_pinconfig(GPIO_LED_R); - s32k1xx_pinconfig(GPIO_LED_G); - s32k1xx_pinconfig(GPIO_LED_B); return BOARD_NLEDS; } @@ -64,26 +71,10 @@ uint32_t board_userled_initialize(void) void board_userled(int led, bool ledon) { - uint32_t ledcfg; - - if (led == BOARD_LED_R) + if ((unsigned)led < BOARD_NLEDS) { - ledcfg = GPIO_LED_R; + esp32_gpiowrite(g_ledcfg[led], ledon); } - else if (led == BOARD_LED_G) - { - ledcfg = GPIO_LED_G; - } - else if (led == BOARD_LED_B) - { - ledcfg = GPIO_LED_B; - } - else - { - return; - } - - s32k1xx_gpiowrite(ledcfg, ledon); /* High illuminates */ } /**************************************************************************** @@ -92,11 +83,13 @@ void board_userled(int led, bool ledon) void board_userled_all(uint32_t ledset) { - /* Low illuminates */ + uint8_t i; - s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0); - s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0); - s32k1xx_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) != 0); + /* Configure LED1-8 GPIOs for output */ + + for (i = 0; i < BOARD_NLEDS; i++) + { + esp32_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0); + } } -#endif /* !CONFIG_ARCH_LEDS */ diff --git a/arch/xtensa/src/esp32/esp32_cpuint.h b/boards/xtensa/esp32/ttgo_lora_esp32/src/ttgo_lora_esp32.h similarity index 52% rename from arch/xtensa/src/esp32/esp32_cpuint.h rename to boards/xtensa/esp32/ttgo_lora_esp32/src/ttgo_lora_esp32.h index 07916a38daf..46627e227f8 100644 --- a/arch/xtensa/src/esp32/esp32_cpuint.h +++ b/boards/xtensa/esp32/ttgo_lora_esp32/src/ttgo_lora_esp32.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/xtensa/src/esp32/esp32_cpuint.h + * boards/xtensa/esp32/ttgo_lora_esp32/src/ttgo_lora_esp32.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,147 +18,153 @@ * ****************************************************************************/ -#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_CPUINT_H -#define __ARCH_XTENSA_SRC_ESP32_ESP32_CPUINT_H +#ifndef __BOARDS_XTENSA_ESP32_TTGO_LORA_ESP32_SRC_TTGO_LORA_ESP32_H +#define __BOARDS_XTENSA_ESP32_TTGO_LORA_ESP32_SRC_TTGO_LORA_ESP32_H /**************************************************************************** * Included Files ****************************************************************************/ #include - -#include +#include +#include /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -#define CPUINT_UNASSIGNED 0xff /* No peripheral assigned to this CPU interrupt */ +/* TTGO-LoRa-SX1276-ESP32 GPIOs *********************************************/ + +/* OLED SSD1306 */ + +#define HAVE_SSD1306 1 + +#if !defined(CONFIG_ESP32_I2C) || !defined(CONFIG_ESP32_I2C0) || \ + !defined(CONFIG_LCD_SSD1306_I2C) +# undef HAVE_SSD1306 +#endif + +#define GPIO_SSD1306_RST 16 + +/* BOOT Button */ + +#define BUTTON_BOOT 0 + +/* LED + * + * This is an externally connected LED used for testing. + */ + +#define GPIO_LED1 2 + +/* MCP2515 Interrupt pin */ + +#define GPIO_MCP2515_IRQ 22 + +/* TIMERS */ + +#define TIMER0 0 +#define TIMER1 1 +#define TIMER2 2 +#define TIMER3 3 + +/* ONESHOT */ + +#define ONESHOT_TIMER 1 +#define ONESHOT_RESOLUTION_US 1 + +/**************************************************************************** + * Public Types + ****************************************************************************/ /**************************************************************************** * Public Data ****************************************************************************/ -/* Maps a CPU interrupt to the IRQ of the attached peripheral interrupt */ - -extern uint8_t g_cpu0_intmap[ESP32_NCPUINTS]; -#ifdef CONFIG_SMP -extern uint8_t g_cpu1_intmap[ESP32_NCPUINTS]; -#endif +#ifndef __ASSEMBLY__ /**************************************************************************** * Public Function Prototypes ****************************************************************************/ /**************************************************************************** - * Name: esp32_cpuint_initialize + * Name: esp32_bringup * * Description: - * Initialize CPU interrupts + * Perform architecture-specific initialization + * + * CONFIG_BOARD_LATE_INITIALIZE=y : + * Called from board_late_initialize(). + * + * CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_BOARDCTL=y : + * Called from the NSH library via board_app_initialize() + * + ****************************************************************************/ + +int esp32_bringup(void); + +/**************************************************************************** + * Name: esp32_mmcsd_initialize + * + * Description: + * Initialize SPI-based SD card and card detect thread. + ****************************************************************************/ + +int esp32_mmcsd_initialize(int minor); + +/**************************************************************************** + * Name: esp32_spiflash_init + * + * Description: + * Initialize the SPIFLASH and register the MTD device. + ****************************************************************************/ + +int esp32_spiflash_init(void); + +/**************************************************************************** + * Name: esp32_spiflash_encrypt_test + * + * Description: + * Test ESP32 SPI Flash driver read/write with encryption. * * Input Parameters: * None * * Returned Value: - * Zero (OK) is returned on success; A negated errno value is returned on - * any failure. + * None. * ****************************************************************************/ -int esp32_cpuint_initialize(void); +#ifdef CONFIG_ESP32_SPIFLASH_ENCRYPTION_TEST +void esp32_spiflash_encrypt_test(void); +#endif /**************************************************************************** - * Name: esp32_alloc_levelint - * - * Description: - * Allocate a level CPU interrupt - * - * Input Parameters: - * priority - Priority of the CPU interrupt (1-5) - * - * Returned Value: - * On success, the allocated level-sensitive, CPU interrupt numbr is - * returned. A negated errno is returned on failure. The only possible - * failure is that all level-sensitive CPU interrupts have already been - * allocated. - * + * Name: esp32_gpio_init ****************************************************************************/ -int esp32_alloc_levelint(int priority); +#ifdef CONFIG_DEV_GPIO +int esp32_gpio_init(void); +#endif /**************************************************************************** - * Name: esp32_alloc_edgeint + * Name: board_spidev_initialize * * Description: - * Allocate an edge CPU interrupt + * Initialize SPI driver and register the /dev/spi device. * * Input Parameters: - * priority - Priority of the CPU interrupt (1-5) + * bus - The SPI bus number, used to build the device path as /dev/spiN * * Returned Value: - * On success, the allocated edge-sensitive, CPU interrupt numbr is - * returned. A negated errno is returned on failure. The only possible - * failure is that all edge-sensitive CPU interrupts have already been - * allocated. + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. * ****************************************************************************/ -int esp32_alloc_edgeint(int priority); +#ifdef CONFIG_SPI_DRIVER +int board_spidev_initialize(int bus); +#endif -/**************************************************************************** - * Name: esp32_free_cpuint - * - * Description: - * Free a previoulsy allocated CPU interrupt - * - * Input Parameters: - * cpuint - The CPU interrupt number to be freed - * - * Returned Value: - * None - * - ****************************************************************************/ - -void esp32_free_cpuint(int cpuint); - -/**************************************************************************** - * Name: esp32_attach_peripheral - * - * Description: - * Attach a peripheral interrupt to a CPU interrupt. - * - * Input Parameters: - * cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU - * periphid - The peripheral number from irq.h to be assigned to - * a CPU interrupt. - * cpuint - The CPU interrupt to receive the peripheral interrupt - * assignment. - * - * Returned Value: - * None - * - ****************************************************************************/ - -void esp32_attach_peripheral(int cpu, int periphid, int cpuint); - -/**************************************************************************** - * Name: esp32_detach_peripheral - * - * Description: - * Detach a peripheral interrupt from a CPU interrupt. - * - * Input Parameters: - * cpu - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU - * periphid - The peripheral number from irq.h to be detached from the - * CPU interrupt. - * cpuint - The CPU interrupt from which the peripheral interrupt will - * be detached. - * - * Returned Value: - * None - * - ****************************************************************************/ - -void esp32_detach_peripheral(int cpu, int periphid, int cpuint); - -#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_CPUINT_H */ +#endif /* __ASSEMBLY__ */ +#endif /* __BOARDS_XTENSA_ESP32_TTGO_LORA_ESP32_SRC_TTGO_LORA_ESP32_H */ diff --git a/boards/xtensa/esp32s2/common/Kconfig b/boards/xtensa/esp32s2/common/Kconfig index 18c7905aed7..67d129236be 100644 --- a/boards/xtensa/esp32s2/common/Kconfig +++ b/boards/xtensa/esp32s2/common/Kconfig @@ -3,3 +3,11 @@ # see the file kconfig-language.txt in the NuttX tools repository. # +config ESP32S2_MERGE_BINS + bool "Merge raw binary files into a single file" + default n + ---help--- + Merge the raw binary files into a single file for flashing to the + device. + This is only useful when the path to binary files (e.g. bootloader) + is provided via the ESPTOOL_BINDIR variable. diff --git a/boards/risc-v/esp32c3/esp32c3-devkit/configs/ble/defconfig b/boards/xtensa/esp32s2/esp32s2-saola-1/configs/gpio/defconfig similarity index 55% rename from boards/risc-v/esp32c3/esp32c3-devkit/configs/ble/defconfig rename to boards/xtensa/esp32s2/esp32s2-saola-1/configs/gpio/defconfig index fb1bb178e80..2110e150ab1 100644 --- a/boards/risc-v/esp32c3/esp32c3-devkit/configs/ble/defconfig +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/configs/gpio/defconfig @@ -5,45 +5,45 @@ # You can then do "make savedefconfig" to generate a new defconfig file that includes your # modifications. # -CONFIG_ARCH="risc-v" -CONFIG_ARCH_BOARD="esp32c3-devkit" -CONFIG_ARCH_BOARD_ESP32C3_DEVKIT=y -CONFIG_ARCH_CHIP="esp32c3" -CONFIG_ARCH_CHIP_ESP32C3=y -CONFIG_ARCH_CHIP_ESP32C3WROOM02=y -CONFIG_ARCH_INTERRUPTSTACK=1536 -CONFIG_ARCH_RISCV=y +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32s2-saola-1" +CONFIG_ARCH_BOARD_ESP32S2_SAOLA_1=y +CONFIG_ARCH_CHIP="esp32s2" +CONFIG_ARCH_CHIP_ESP32S2=y +CONFIG_ARCH_CHIP_ESP32S2WROVER=y CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y CONFIG_BOARD_LOOPSPERMSEC=16717 -CONFIG_BTSAK=y CONFIG_BUILTIN=y -CONFIG_DRIVERS_BLUETOOTH=y -CONFIG_DRIVERS_IEEE80211=y -CONFIG_DRIVERS_WIRELESS=y -CONFIG_ESP32C3_BLE=y +CONFIG_DEV_GPIO=y +CONFIG_ESP32S2_DATA_CACHE_0KB=y +CONFIG_ESP32S2_GPIO_IRQ=y +CONFIG_ESP32S2_UART0=y +CONFIG_EXAMPLES_GPIO=y CONFIG_FS_PROCFS=y CONFIG_HAVE_CXX=y CONFIG_HAVE_CXXINITIALIZE=y CONFIG_IDLETHREAD_STACKSIZE=3072 CONFIG_INTELHEX_BINARY=y -CONFIG_NAME_MAX=48 -CONFIG_NET_BLUETOOTH=y -CONFIG_NET_SOCKOPTS=y -CONFIG_NET_TCP=y CONFIG_NSH_ARCHINIT=y CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y CONFIG_PREALLOC_TIMERS=4 -CONFIG_PTHREAD_MUTEX_TYPES=y +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 CONFIG_RAW_BINARY=y CONFIG_RR_INTERVAL=200 CONFIG_SCHED_WAITPID=y -CONFIG_SIG_DEFAULT=y -CONFIG_SPINLOCK=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 CONFIG_SYSTEM_NSH=y CONFIG_UART0_SERIAL_CONSOLE=y CONFIG_USER_ENTRYPOINT="nsh_main" -CONFIG_WIRELESS=y -CONFIG_WIRELESS_BLUETOOTH=y diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/configs/oneshot/defconfig b/boards/xtensa/esp32s2/esp32s2-saola-1/configs/oneshot/defconfig new file mode 100644 index 00000000000..a65ac977bd5 --- /dev/null +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/configs/oneshot/defconfig @@ -0,0 +1,51 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32s2-saola-1" +CONFIG_ARCH_BOARD_ESP32S2_SAOLA_1=y +CONFIG_ARCH_CHIP="esp32s2" +CONFIG_ARCH_CHIP_ESP32S2=y +CONFIG_ARCH_CHIP_ESP32S2WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_ESP32S2_DATA_CACHE_0KB=y +CONFIG_ESP32S2_ONESHOT=y +CONFIG_ESP32S2_TIMER0=y +CONFIG_ESP32S2_UART0=y +CONFIG_EXAMPLES_ONESHOT=y +CONFIG_EXAMPLES_ONESHOT_DELAY=2000000 +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_ONESHOT=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_NSH=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/configs/timer/defconfig b/boards/xtensa/esp32s2/esp32s2-saola-1/configs/timer/defconfig new file mode 100644 index 00000000000..71a9668092c --- /dev/null +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/configs/timer/defconfig @@ -0,0 +1,56 @@ +# +# This file is autogenerated: PLEASE DO NOT EDIT IT. +# +# You can use "make menuconfig" to make any modifications to the installed .config file. +# You can then do "make savedefconfig" to generate a new defconfig file that includes your +# modifications. +# +# CONFIG_ARCH_LEDS is not set +# CONFIG_NSH_ARGCAT is not set +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_ARCH="xtensa" +CONFIG_ARCH_BOARD="esp32s2-saola-1" +CONFIG_ARCH_BOARD_ESP32S2_SAOLA_1=y +CONFIG_ARCH_CHIP="esp32s2" +CONFIG_ARCH_CHIP_ESP32S2=y +CONFIG_ARCH_CHIP_ESP32S2WROVER=y +CONFIG_ARCH_STACKDUMP=y +CONFIG_ARCH_XTENSA=y +CONFIG_BOARD_LOOPSPERMSEC=16717 +CONFIG_BUILTIN=y +CONFIG_DEV_GPIO=y +CONFIG_ESP32S2_DATA_CACHE_0KB=y +CONFIG_ESP32S2_GPIO_IRQ=y +CONFIG_ESP32S2_TIMER0=y +CONFIG_ESP32S2_TIMER1=y +CONFIG_ESP32S2_TIMER2=y +CONFIG_ESP32S2_TIMER3=y +CONFIG_ESP32S2_UART0=y +CONFIG_EXAMPLES_TIMER=y +CONFIG_EXAMPLES_TIMER_GPOUT=y +CONFIG_FS_PROCFS=y +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +CONFIG_IDLETHREAD_STACKSIZE=3072 +CONFIG_INTELHEX_BINARY=y +CONFIG_NSH_ARCHINIT=y +CONFIG_NSH_BUILTIN_APPS=y +CONFIG_NSH_FILEIOSIZE=512 +CONFIG_NSH_LINELEN=64 +CONFIG_NSH_READLINE=y +CONFIG_PREALLOC_TIMERS=4 +CONFIG_RAM_SIZE=114688 +CONFIG_RAM_START=0x20000000 +CONFIG_RAW_BINARY=y +CONFIG_RR_INTERVAL=200 +CONFIG_SCHED_WAITPID=y +CONFIG_SDCLONE_DISABLE=y +CONFIG_START_DAY=6 +CONFIG_START_MONTH=12 +CONFIG_START_YEAR=2011 +CONFIG_SYSTEM_NSH=y +CONFIG_TIMER=y +CONFIG_TIMER_ARCH=y +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_USER_ENTRYPOINT="nsh_main" diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/include/board.h b/boards/xtensa/esp32s2/esp32s2-saola-1/include/board.h index be5ecb0cdbf..9c0880fb6e4 100644 --- a/boards/xtensa/esp32s2/esp32s2-saola-1/include/board.h +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/include/board.h @@ -74,7 +74,7 @@ /* GPIO pins used by the GPIO Subsystem */ -#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */ +#define BOARD_NGPIOOUT 2 /* Amount of GPIO Output pins */ #define BOARD_NGPIOIN 1 /* Amount of GPIO Input without Interruption */ #define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */ diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/scripts/Make.defs b/boards/xtensa/esp32s2/esp32s2-saola-1/scripts/Make.defs index df80445414c..addad889388 100644 --- a/boards/xtensa/esp32s2/esp32s2-saola-1/scripts/Make.defs +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/scripts/Make.defs @@ -96,8 +96,6 @@ else LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld endif -LDFLAGS += -nostartfiles -nodefaultlibs - ifeq ($(CONFIG_CYGWIN_WINTOOL),y) LDFLAGS += -Map="${shell cygpath -w $(TOPDIR)/nuttx.map}" --cref else diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/src/Make.defs b/boards/xtensa/esp32s2/esp32s2-saola-1/src/Make.defs index 0a6cda99e47..23737b31571 100644 --- a/boards/xtensa/esp32s2/esp32s2-saola-1/src/Make.defs +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/src/Make.defs @@ -28,6 +28,17 @@ CSRCS = esp32s2_boot.c esp32s2_bringup.c ifeq ($(CONFIG_BOARDCTL),y) CSRCS += esp32s2_appinit.c +ifeq ($(CONFIG_BOARDCTL_RESET),y) +CSRCS += esp32s2_reset.c +endif +endif + +ifeq ($(CONFIG_DEV_GPIO),y) +CSRCS += esp32s2_gpio.c +endif + +ifeq ($(CONFIG_ONESHOT),y) +CSRCS += esp32s2_oneshot.c endif SCRIPTIN = $(SCRIPTDIR)$(DELIM)esp32s2.template.ld diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2-saola-1.h b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2-saola-1.h index 4361e4ae416..35bb4e25bca 100644 --- a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2-saola-1.h +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2-saola-1.h @@ -39,6 +39,18 @@ #define BUTTON_BOOT 0 +/* TIMERS */ + +#define TIMER0 0 +#define TIMER1 1 +#define TIMER2 2 +#define TIMER3 3 + +/* ONESHOT */ + +#define ONESHOT_TIMER TIMER0 +#define ONESHOT_RESOLUTION_US 1 + /**************************************************************************** * Public Types ****************************************************************************/ @@ -69,5 +81,41 @@ int esp32s2_bringup(void); +/**************************************************************************** + * Name: esp32s2_gpio_init + * + * Description: + * Configure the GPIO driver. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_DEV_GPIO +int esp32s2_gpio_init(void); +#endif + +/**************************************************************************** + * Name: board_oneshot_init + * + * Description: + * Configure the oneshot timer driver. + * + * Input Parameters: + * timer - Timer instance to be used as oneshot timer. + * resolution - Oneshot timer resolution. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +#ifdef CONFIG_ONESHOT +int board_oneshot_init(int timer, uint16_t resolution); +#endif + #endif /* __ASSEMBLY__ */ #endif /* __BOARDS_XTENSA_ESP32S2_ESP32S2_SAOLA_1_SRC_ESP32S2_SAOLA_1_H */ diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_bringup.c b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_bringup.c index 92a7c657c12..f6dd5edd6a7 100644 --- a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_bringup.c +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_bringup.c @@ -46,6 +46,14 @@ # include #endif +#ifdef CONFIG_TIMER +# include "esp32s2_tim_lowerhalf.h" +#endif + +#ifdef CONFIG_ESP32S2_RT_TIMER +# include "esp32s2_rt_timer.h" +#endif + #include "esp32s2-saola-1.h" /**************************************************************************** @@ -100,6 +108,76 @@ int esp32s2_bringup(void) } #endif + /* Register the timer drivers */ + +#ifdef CONFIG_TIMER + +#if defined(CONFIG_ESP32S2_TIMER0) && !defined(CONFIG_ONESHOT) + ret = esp32s2_timer_initialize("/dev/timer0", TIMER0); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize timer driver: %d\n", + ret); + return ret; + } +#endif + +#ifdef CONFIG_ESP32S2_TIMER1 + ret = esp32s2_timer_initialize("/dev/timer1", TIMER1); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize timer driver: %d\n", + ret); + return ret; + } +#endif + +#ifdef CONFIG_ESP32S2_TIMER2 + ret = esp32s2_timer_initialize("/dev/timer2", TIMER2); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize timer driver: %d\n", + ret); + return ret; + } +#endif + +#ifdef CONFIG_ESP32S2_TIMER3 + ret = esp32s2_timer_initialize("/dev/timer3", TIMER3); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to initialize timer driver: %d\n", + ret); + return ret; + } +#endif + +#endif /* CONFIG_TIMER */ + +#ifdef CONFIG_ESP32S2_RT_TIMER + ret = esp32s2_rt_timer_init(); + if (ret < 0) + { + syslog(LOG_ERR, "Failed to initialize RT timer: %d\n", ret); + } + +#endif + /* Now register one oneshot driver */ + +#if defined(CONFIG_ONESHOT) && defined(CONFIG_ESP32S2_TIMER0) + + ret = board_oneshot_init(ONESHOT_TIMER, ONESHOT_RESOLUTION_US); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: board_oneshot_init() failed: %d\n", ret); + } + +#endif /* CONFIG_ONESHOT */ + /* If we got here then perhaps not all initialization was successful, but * at least enough succeeded to bring-up NSH with perhaps reduced * capabilities. diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c new file mode 100644 index 00000000000..00174041963 --- /dev/null +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c @@ -0,0 +1,460 @@ +/**************************************************************************** + * boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_gpio.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include + +#include + +#include "esp32s2-saola-1.h" +#include "esp32s2_gpio.h" +#include "hardware/esp32s2_gpio_sigmap.h" + +#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Pin 1 and 2 are used for this example as GPIO outputs. */ + +#define GPIO_OUT1 1 +#define GPIO_OUT2 2 +#define GPIO_IN1 4 + +#if !defined(CONFIG_ESP32S2_GPIO_IRQ) && BOARD_NGPIOINT > 0 +# error "NGPIOINT is > 0 and GPIO interrupts aren't enabled" +#endif + +/* Interrupt pins. GPIO9 is used as an example, any other inputs could be + * used. + */ + +#define GPIO_IRQPIN 9 + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct esp32s2gpio_dev_s +{ + struct gpio_dev_s gpio; + uint8_t id; +}; + +struct esp32s2gpint_dev_s +{ + struct esp32s2gpio_dev_s esp32s2gpio; + pin_interrupt_t callback; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpout_write(FAR struct gpio_dev_s *dev, bool value); +#endif + +#if BOARD_NGPIOIN > 0 +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value); +#endif + +#if BOARD_NGPIOINT > 0 +static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value); +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback); +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static const struct gpio_operations_s gpout_ops = +{ + .go_read = gpout_read, + .go_write = gpout_write, + .go_attach = NULL, + .go_enable = NULL, +}; + +/* This array maps the GPIO pins used as OUTPUT */ + +static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] = +{ + GPIO_OUT1, GPIO_OUT2 +}; + +static struct esp32s2gpio_dev_s g_gpout[BOARD_NGPIOOUT]; +#endif + +#if BOARD_NGPIOIN > 0 +static const struct gpio_operations_s gpin_ops = +{ + .go_read = gpin_read, + .go_write = NULL, + .go_attach = NULL, + .go_enable = NULL, +}; + +/* This array maps the GPIO pins used as OUTPUT */ + +static const uint32_t g_gpioinputs[BOARD_NGPIOIN] = +{ + GPIO_IN1 +}; + +static struct esp32s2gpio_dev_s g_gpin[BOARD_NGPIOIN]; +#endif + +#if BOARD_NGPIOINT > 0 +static const struct gpio_operations_s gpint_ops = +{ + .go_read = gpint_read, + .go_write = NULL, + .go_attach = gpint_attach, + .go_enable = gpint_enable, +}; + +/* This array maps the GPIO pins used as INTERRUPT INPUTS */ + +static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] = +{ + GPIO_IRQPIN, +}; + +static struct esp32s2gpint_dev_s g_gpint[BOARD_NGPIOINT]; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gpout_read + * + * Description: + * Read a digital output pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +#if BOARD_NGPIOOUT > 0 +static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct esp32s2gpio_dev_s *esp32s2gpio = + (FAR struct esp32s2gpio_dev_s *)dev; + + DEBUGASSERT(esp32s2gpio != NULL && value != NULL); + DEBUGASSERT(esp32s2gpio->id < BOARD_NGPIOOUT); + gpioinfo("Reading...\n"); + + *value = esp32s2_gpioread(g_gpiooutputs[esp32s2gpio->id]); + return OK; +} + +/**************************************************************************** + * Name: gpout_write + * + * Description: + * Write to a digital output pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - The value to be written. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpout_write(FAR struct gpio_dev_s *dev, bool value) +{ + FAR struct esp32s2gpio_dev_s *esp32s2gpio = + (FAR struct esp32s2gpio_dev_s *)dev; + + DEBUGASSERT(esp32s2gpio != NULL); + DEBUGASSERT(esp32s2gpio->id < BOARD_NGPIOOUT); + gpioinfo("Writing %d\n", (int)value); + + esp32s2_gpiowrite(g_gpiooutputs[esp32s2gpio->id], value); + return OK; +} +#endif + +/**************************************************************************** + * Name: gpin_read + * + * Description: + * Read a digital input pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +#if BOARD_NGPIOIN > 0 +static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct esp32s2gpio_dev_s *esp32s2gpio = + (FAR struct esp32s2gpio_dev_s *)dev; + + DEBUGASSERT(esp32s2gpio != NULL && value != NULL); + DEBUGASSERT(esp32s2gpio->id < BOARD_NGPIOIN); + gpioinfo("Reading...\n"); + + *value = esp32s2_gpioread(g_gpioinputs[esp32s2gpio->id]); + return OK; +} +#endif + +/**************************************************************************** + * Name: esp32s2gpio_interrupt + * + * Description: + * Digital Input ISR. + * + ****************************************************************************/ + +#if BOARD_NGPIOINT > 0 +static int esp32s2gpio_interrupt(int irq, void *context, void *arg) +{ + FAR struct esp32s2gpint_dev_s *esp32s2gpint = + (FAR struct esp32s2gpint_dev_s *)arg; + + DEBUGASSERT(esp32s2gpint != NULL && esp32s2gpint->callback != NULL); + gpioinfo("Interrupt! callback=%p\n", esp32s2gpint->callback); + + esp32s2gpint->callback(&esp32s2gpint->esp32s2gpio.gpio, + esp32s2gpint->esp32s2gpio.id); + return OK; +} + +/**************************************************************************** + * Name: gpint_read + * + * Description: + * Read a digital input pin. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * value - A pointer to store the state of the pin. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value) +{ + FAR struct esp32s2gpint_dev_s *esp32s2gpint = + (FAR struct esp32s2gpint_dev_s *)dev; + + DEBUGASSERT(esp32s2gpint != NULL && value != NULL); + DEBUGASSERT(esp32s2gpint->esp32s2gpio.id < BOARD_NGPIOINT); + gpioinfo("Reading int pin...\n"); + + *value = esp32s2_gpioread(g_gpiointinputs[esp32s2gpint->esp32s2gpio.id]); + return OK; +} + +/**************************************************************************** + * Name: gpint_attach + * + * Description: + * Attach the ISR to IRQ and register the callback. But it still doesn't + * enable interrupt yet. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * callback - User callback function. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +static int gpint_attach(FAR struct gpio_dev_s *dev, + pin_interrupt_t callback) +{ + FAR struct esp32s2gpint_dev_s *esp32s2gpint = + (FAR struct esp32s2gpint_dev_s *)dev; + int irq = ESP32S2_PIN2IRQ(g_gpiointinputs[esp32s2gpint->esp32s2gpio.id]); + int ret; + + gpioinfo("Attaching the callback\n"); + + /* Make sure the interrupt is disabled */ + + esp32s2_gpioirqdisable(irq); + ret = irq_attach(irq, + esp32s2gpio_interrupt, + &g_gpint[esp32s2gpint->esp32s2gpio.id]); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: gpint_attach() failed: %d\n", ret); + return ret; + } + + gpioinfo("Attach %p\n", callback); + esp32s2gpint->callback = callback; + return OK; +} + +/**************************************************************************** + * Name: gpint_enable + * + * Description: + * Enable/Disable interrupt. + * + * Parameters: + * dev - A pointer to the gpio driver struct. + * enable - True to enable, false to disable. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable) +{ + FAR struct esp32s2gpint_dev_s *esp32s2gpint = + (FAR struct esp32s2gpint_dev_s *)dev; + int irq = ESP32S2_PIN2IRQ(g_gpiointinputs[esp32s2gpint->esp32s2gpio.id]); + + if (enable) + { + if (esp32s2gpint->callback != NULL) + { + gpioinfo("Enabling the interrupt\n"); + + /* Configure the interrupt for rising edge */ + + esp32s2_gpioirqenable(irq, RISING); + } + } + else + { + gpioinfo("Disable the interrupt\n"); + esp32s2_gpioirqdisable(irq); + } + + return OK; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: esp32s2_gpio_init + * + * Description: + * Initialize all pins. Function should be called from the bringup. + * + * Returned Value: + * Zero (OK). + * + ****************************************************************************/ + +int esp32s2_gpio_init(void) +{ +#if BOARD_NGPIOOUT > 0 + for (int i = 0; i < BOARD_NGPIOOUT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN; + g_gpout[i].gpio.gp_ops = &gpout_ops; + g_gpout[i].id = i; + gpio_pin_register(&g_gpout[i].gpio, i); + + /* Configure the pins that will be used as output */ + + esp32s2_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0); + esp32s2_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_1 | + INPUT_FUNCTION_1); + esp32s2_gpiowrite(g_gpiooutputs[i], 0); + } +#endif + +#if BOARD_NGPIOIN > 0 + for (int i = 0; i < BOARD_NGPIOIN; i++) + { + /* Setup and register the GPIO pin */ + + g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN_PULLDOWN; + g_gpin[i].gpio.gp_ops = &gpin_ops; + g_gpin[i].id = i; + gpio_pin_register(&g_gpin[i].gpio, i); + + /* Configure the pins that will be used as interrupt input */ + + esp32s2_configgpio(g_gpioinputs[i], INPUT_FUNCTION_1 | PULLDOWN); + } +#endif + +#if BOARD_NGPIOINT > 0 + for (int i = 0; i < BOARD_NGPIOINT; i++) + { + /* Setup and register the GPIO pin */ + + g_gpint[i].esp32s2gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN; + g_gpint[i].esp32s2gpio.gpio.gp_ops = &gpint_ops; + g_gpint[i].esp32s2gpio.id = i; + gpio_pin_register(&g_gpint[i].esp32s2gpio.gpio, i); + + /* Configure the pins that will be used as interrupt input */ + + esp32s2_configgpio(g_gpiointinputs[i], INPUT_FUNCTION_1 | PULLDOWN); + } +#endif + + return OK; +} +#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */ diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_oneshot.c b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_oneshot.c new file mode 100644 index 00000000000..b701da36dcf --- /dev/null +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_oneshot.c @@ -0,0 +1,83 @@ +/**************************************************************************** + * boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_oneshot.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include "esp32s2-saola-1.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_oneshot_init + * + * Description: + * Configure the oneshot timer driver. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned + * to indicate the nature of any failure. + * + ****************************************************************************/ + +int board_oneshot_init(int timer, uint16_t resolution) +{ + int ret = OK; + struct oneshot_lowerhalf_s *os_lower = NULL; + + os_lower = oneshot_initialize(timer, resolution); + if (os_lower != NULL) + { +#if defined(CONFIG_CPULOAD_ONESHOT) + /* Configure the oneshot timer to support CPU load measurement */ + + nxsched_oneshot_extclk(os_lower); + +#else + ret = oneshot_register("/dev/oneshot", os_lower); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to register oneshot at /dev/oneshot: %d\n", ret); + } +#endif /* CONFIG_CPULOAD_ONESHOT */ + } + else + { + syslog(LOG_ERR, "ERROR: oneshot_initialize failed\n"); + ret = -EBUSY; + } + + return ret; +} diff --git a/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_reset.c b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_reset.c new file mode 100644 index 00000000000..8593574aae9 --- /dev/null +++ b/boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_reset.c @@ -0,0 +1,63 @@ +/**************************************************************************** + * boards/xtensa/esp32s2/esp32s2-saola-1/src/esp32s2_reset.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#ifdef CONFIG_BOARDCTL_RESET + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_reset + * + * Description: + * Reset board. Support for this function is required by board-level + * logic if CONFIG_BOARDCTL_RESET is selected. + * + * Input Parameters: + * status - Status information provided with the reset event. This + * meaning of this status information is board-specific. If not + * used by a board, the value zero may be provided in calls to + * board_reset(). + * + * Returned Value: + * If this function returns, then it was not possible to power-off the + * board due to some constraints. The return value in this case is a + * board-specific reason for the failure to shutdown. + * + ****************************************************************************/ + +int board_reset(int status) +{ + up_systemreset(); + + return 0; +} + +#endif /* CONFIG_BOARDCTL_RESET */ diff --git a/crypto/Kconfig b/crypto/Kconfig index 7305821d0fd..6da36961d64 100644 --- a/crypto/Kconfig +++ b/crypto/Kconfig @@ -13,6 +13,7 @@ if CRYPTO config CRYPTO_AES bool "AES cypher support" + depends on ALLOW_BSD_COMPONENTS default n config CRYPTO_ALGTEST diff --git a/drivers/Kconfig b/drivers/Kconfig index 09e78177771..a36cf3b35b4 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -131,3 +131,4 @@ source "drivers/platform/Kconfig" source "drivers/rf/Kconfig" source "drivers/rc/Kconfig" source "drivers/motor/Kconfig" +source "drivers/math/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index 59fd09b5f56..3f056633007 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -29,6 +29,7 @@ include audio/Make.defs include bch/Make.defs include can/Make.defs include crypto/Make.defs +include math/Make.defs include motor/Make.defs include i2c/Make.defs include i2s/Make.defs @@ -64,7 +65,7 @@ include rf/Make.defs include rc/Make.defs ifeq ($(CONFIG_SPECIFIC_DRIVERS),y) -include platform/Make.defs +-include platform/Make.defs endif ifeq ($(CONFIG_DEV_SIMPLE_ADDRENV),y) diff --git a/drivers/analog/adc.c b/drivers/analog/adc.c index 1b16f9428f8..db91a332510 100644 --- a/drivers/analog/adc.c +++ b/drivers/analog/adc.c @@ -59,6 +59,7 @@ #include #include #include +#include #include #include @@ -78,6 +79,8 @@ static int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, static void adc_notify(FAR struct adc_dev_s *dev); static int adc_poll(FAR struct file *filep, struct pollfd *fds, bool setup); +static int adc_reset_fifo(FAR struct adc_dev_s *dev); +static int adc_samples_on_read(FAR struct adc_dev_s *dev); /**************************************************************************** * Private Data @@ -431,7 +434,29 @@ static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg) FAR struct adc_dev_s *dev = inode->i_private; int ret; - ret = dev->ad_ops->ao_ioctl(dev, cmd, arg); + switch (cmd) + { + case ANIOC_RESET_FIFO: + { + ret = adc_reset_fifo(dev); + } + break; + + case ANIOC_SAMPLES_ON_READ: + { + ret = adc_samples_on_read(dev); + } + break; + + default: + { + /* Those IOCTLs might be used in arch specific section */ + + ret = dev->ad_ops->ao_ioctl(dev, cmd, arg); + } + break; + } + return ret; } @@ -613,6 +638,54 @@ return_with_irqdisabled: return ret; } +/**************************************************************************** + * Name: adc_reset_fifo + ****************************************************************************/ + +static int adc_reset_fifo(FAR struct adc_dev_s *dev) +{ + irqstate_t flags; + FAR struct adc_fifo_s *fifo = &dev->ad_recv; + + /* Interrupts must be disabled while accessing the ad_recv FIFO */ + + flags = enter_critical_section(); + + fifo->af_head = fifo->af_tail; + + leave_critical_section(flags); + + return OK; +} + +/**************************************************************************** + * Name: adc_samples_on_read + ****************************************************************************/ + +static int adc_samples_on_read(FAR struct adc_dev_s *dev) +{ + irqstate_t flags; + FAR struct adc_fifo_s *fifo = &dev->ad_recv; + int16_t ret; + + /* Interrupts must be disabled while accessing the ad_recv FIFO */ + + flags = enter_critical_section(); + + ret = fifo->af_tail - fifo->af_head; + + leave_critical_section(flags); + + if (ret < 0) + { + /* Increment return value by the size of FIFO */ + + ret += CONFIG_ADC_FIFOSIZE; + } + + return ret; +} + /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/drivers/analog/dac7554.c b/drivers/analog/dac7554.c index 8c57625cbea..b08e2cab08d 100644 --- a/drivers/analog/dac7554.c +++ b/drivers/analog/dac7554.c @@ -1,41 +1,20 @@ /**************************************************************************** * drivers/analog/dac7554.c * - * Copyright (C) 2010, 2016, 2018 Gregory Nutt. All rights reserved. - * Copyright (C) 2018 Daniel P. Carvalho. All rights reserved. - * Copyright (C) 2019 Augusto Fraga Giachero. All rights reserved. - * Author: Augusto Fraga Giachero + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * This file is a part of NuttX: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/analog/dac7571.c b/drivers/analog/dac7571.c index 712c8a3d46b..e5b606f59ef 100644 --- a/drivers/analog/dac7571.c +++ b/drivers/analog/dac7571.c @@ -1,40 +1,20 @@ /**************************************************************************** * drivers/analog/dac7571.c * - * Copyright (C) 2010, 2016, 2018 Gregory Nutt. All rights reserved. - * Copyright (C) 2018 Daniel P. Carvalho. All rights reserved. - * Author: Daniel P. Carvalho + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * This file is a part of NuttX: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2010 Gregory Nutt. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/bch/bchlib_cache.c b/drivers/bch/bchlib_cache.c index 5941994de4d..8001137b1f3 100644 --- a/drivers/bch/bchlib_cache.c +++ b/drivers/bch/bchlib_cache.c @@ -128,6 +128,7 @@ int bchlib_flushsector(FAR struct bchlib_s *bch) if (ret < 0) { ferr("Write failed: %zd\n", ret); + return (int)ret; } #if defined(CONFIG_BCH_ENCRYPTION) @@ -166,13 +167,20 @@ int bchlib_readsector(FAR struct bchlib_s *bch, size_t sector) { inode = bch->inode; - bchlib_flushsector(bch); + ret = bchlib_flushsector(bch); + if (ret < 0) + { + ferr("Flush failed: %zd\n", ret); + return (int)ret; + } + bch->sector = (size_t)-1; ret = inode->u.i_bops->read(inode, bch->buffer, sector, 1); if (ret < 0) { ferr("Read failed: %zd\n", ret); + return (int)ret; } bch->sector = sector; diff --git a/drivers/bch/bchlib_read.c b/drivers/bch/bchlib_read.c index 9010a2171d5..7c6b6239a82 100644 --- a/drivers/bch/bchlib_read.c +++ b/drivers/bch/bchlib_read.c @@ -99,7 +99,11 @@ ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset, { /* Read the sector into the sector buffer */ - bchlib_readsector(bch, sector); + ret = bchlib_readsector(bch, sector); + if (ret < 0) + { + return ret; + } /* Copy the tail end of the sector to the user buffer */ @@ -169,7 +173,11 @@ ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset, { /* Read the sector into the sector buffer */ - bchlib_readsector(bch, sector); + ret = bchlib_readsector(bch, sector); + if (ret < 0) + { + return ret; + } /* Copy the head end of the sector to the user buffer */ diff --git a/drivers/bch/bchlib_write.c b/drivers/bch/bchlib_write.c index 0540e66f719..8944cae9d72 100644 --- a/drivers/bch/bchlib_write.c +++ b/drivers/bch/bchlib_write.c @@ -84,7 +84,11 @@ ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, { /* Read the full sector into the sector buffer */ - bchlib_readsector(bch, sector); + ret = bchlib_readsector(bch, sector); + if (ret < 0) + { + return ret; + } /* Copy the tail end of the sector from the user buffer */ @@ -166,7 +170,11 @@ ssize_t bchlib_write(FAR void *handle, FAR const char *buffer, size_t offset, { /* Read the sector into the sector buffer */ - bchlib_readsector(bch, sector); + ret = bchlib_readsector(bch, sector); + if (ret < 0) + { + return ret; + } /* Copy the head end of the sector from the user buffer */ diff --git a/drivers/contactless/mfrc522.h b/drivers/contactless/mfrc522.h index 0501ae237dc..602f7321c0d 100644 --- a/drivers/contactless/mfrc522.h +++ b/drivers/contactless/mfrc522.h @@ -1,35 +1,20 @@ /**************************************************************************** * drivers/contactless/mfrc522.h * - * Copyright(C) 2016 Uniquix Ltda. All rights reserved. - * Authors: Alan Carvalho de Assis + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/contactless/pn532.c b/drivers/contactless/pn532.c index 23a2a6d6cd0..f15f3324d9c 100644 --- a/drivers/contactless/pn532.c +++ b/drivers/contactless/pn532.c @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/contactless/pn532.c * - * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. - * Authors: Janne Rosberg - * Teemu Pirinen - * Juho Grundström + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/contactless/pn532.h b/drivers/contactless/pn532.h index 65dcb196359..4952e42823e 100644 --- a/drivers/contactless/pn532.h +++ b/drivers/contactless/pn532.h @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/contactless/pn532.h * - * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. - * Authors: Janne Rosberg - * Teemu Pirinen - * Juho Grundström + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/input/ft5x06.c b/drivers/input/ft5x06.c index ff626c02382..1fc3eda8809 100644 --- a/drivers/input/ft5x06.c +++ b/drivers/input/ft5x06.c @@ -1,42 +1,20 @@ /**************************************************************************** * drivers/input/ft5x06.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Some of this driver was developed with input from NXP sample code for - * the LPCXpresso-LPC54628 board. That sample code as a compatible BSD - * license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2016, Freescale Semiconductor, Inc. - * Copyright 2016-2017 NXP - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/input/ft5x06.h b/drivers/input/ft5x06.h index 79b6dfcc4a0..998cf49c842 100644 --- a/drivers/input/ft5x06.h +++ b/drivers/input/ft5x06.h @@ -1,42 +1,20 @@ /**************************************************************************** * drivers/input/ft5x06.h * - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Some of this driver was developed with input from NXP sample code for - * the LPCXpresso-LPC54628 board. That sample code as a compatible BSD - * license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2016, Freescale Semiconductor, Inc. - * Copyright 2016-2017 NXP - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/ioexpander/mcp23x17.c b/drivers/ioexpander/mcp23x17.c index ec1620e3625..b7842228f24 100644 --- a/drivers/ioexpander/mcp23x17.c +++ b/drivers/ioexpander/mcp23x17.c @@ -45,11 +45,11 @@ # warning I2C support is required (CONFIG_I2C) #endif -#ifndef CONFIG_SCHED_WORKQUEUE +#if (!defined CONFIG_SCHED_WORKQUEUE) && (defined CONFIG_MCP23X17_INT_ENABLE) # error Work queue support is required (CONFIG_SCHED_WORKQUEUE) #endif -#ifndef CONFIG_SCHED_HPWORK +#if (!defined CONFIG_SCHED_HPWORK) && (defined CONFIG_MCP23X17_INT_ENABLE) # error High-Priority Work support is required (CONFIG_SCHED_HPWORK) #endif @@ -950,7 +950,6 @@ FAR struct ioexpander_dev_s *mcp23x17_initialize( FAR struct mcp23x17_config_s *config) { FAR struct mcp23x17_dev_s *priv; - int ret; DEBUGASSERT(i2cdev != NULL && config != NULL); diff --git a/drivers/ioexpander/tca64xx.c b/drivers/ioexpander/tca64xx.c index 898a381f4b4..a8de1da2850 100644 --- a/drivers/ioexpander/tca64xx.c +++ b/drivers/ioexpander/tca64xx.c @@ -1,39 +1,20 @@ /**************************************************************************** * drivers/ioexpander/tca64xx.c - * Supports the following parts: TCA6408, TCA6416, TCA6424 * - * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * This header file derives, in part, from the Project Ara TCA64xx driver - * which has this copyright: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2014-2015 Google Inc. - * All rights reserved. - * Author: Patrick Titiano, Jean Pihet - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/lcd/Kconfig b/drivers/lcd/Kconfig index 44b9bf55bdd..58bbf4c8234 100644 --- a/drivers/lcd/Kconfig +++ b/drivers/lcd/Kconfig @@ -569,12 +569,52 @@ config LCD_ST7735 default n if LCD_ST7735 - config LCD_ST7735_GM00 - bool "132x162 Display Resolution" + choice + prompt "LCD Preset Resolutions" + optional + + config LCD_ST7735_GM11 + bool "128x160" + + config LCD_ST7735_GM00 + bool "132x162" + + config LCD_ST7735_GM01 + bool "132x132" + + endchoice + +if !LCD_ST7735_GM00 && !LCD_ST7735_GM01 && !LCD_ST7735_GM11 + + config LCD_ST7735_XRES + int "ST7735 X Resolution" + default 128 + ---help--- + Specifies the X resolution of the LCD. + + config LCD_ST7735_YRES + int "ST7735 Y Resolution" + default 160 + ---help--- + Specifies the Y resolution of the LCD. + + config LCD_ST7735_XOFFSET + int "ST7735 X Offset" + default 0 + ---help--- + Specifies the X offset of the LCD. + + config LCD_ST7735_YOFFSET + int "ST7735 Y Offset" + default 0 + ---help--- + Specifies the Y offset of the LCD. + +endif + + config LCD_ST7735_BGR + bool "Swap R & B channel" default n - ---help--- - Two resolutions are available, either the 132x162 or - the 128x160 config LCD_ST7735_BPP int "Bit Per Pixel (12, 16 or 18)" @@ -633,6 +673,53 @@ if LCD_ST7789 endif # LCD_ST7789 +config LCD_GC9A01 + bool "Galaxycore GC9A01 TFT Controller" + default n + +if LCD_GC9A01 + config LCD_GC9A01_XRES + int "GC9A01 X Resolution" + default 240 + ---help--- + Specifies the X resolution of the LCD. + + config LCD_GC9A01_YRES + int "GC9A01 Y Resolution" + default 240 + ---help--- + Specifies the Y resolution of the LCD. + + config LCD_GC9A01_XOFFSET + int "GC9A01 X Offset" + default 0 + ---help--- + Specifies the X offset of the LCD. + + config LCD_GC9A01_YOFFSET + int "GC9A01 Y Offset" + default 0 + ---help--- + Specifies the Y offset of the LCD. + + config LCD_GC9A01_BGR + bool "Swap R & B channel" + default n + + config LCD_GC9A01_BPP + int "Bit Per Pixel (12 or 16)" + default 16 + + config LCD_GC9A01_SPIMODE + int "SPI Mode" + default 0 + + config LCD_GC9A01_FREQUENCY + int "SPI Frequency" + default 1000000 + +endif # LCD_GC9A01 + config LCD_PCD8544 bool "Nokia 5110 LCD Display (Philips PCD8544)" default n @@ -1452,12 +1539,12 @@ config LCD_ST7032 the ground. So only I2C pins SDA and SCL are used by NuttX. config LCD_HT16K33 - bool "Holtek HT16K32 4 Digits 14-Segment Display" + bool "Holtek HT16K33 4 Digits 14-Segment Display" default n depends on I2C ---help--- Enable support for Holtek HT16K33 (and Vinka VK16K33) 4 Digits - 14-Segment module: 0.54" 14-segment LED HT16K32 Backpack. + 14-Segment module: 0.54" 14-segment LED HT16K33 Backpack. if LCD_HT16K33 config LCD_HT16K33_MULT_MODULE diff --git a/drivers/lcd/Make.defs b/drivers/lcd/Make.defs index 058c4978a10..4f59a45c486 100644 --- a/drivers/lcd/Make.defs +++ b/drivers/lcd/Make.defs @@ -133,6 +133,10 @@ ifeq ($(CONFIG_LCD_ST7789),y) CSRCS += st7789.c endif +ifeq ($(CONFIG_LCD_GC9A01),y) + CSRCS += gc9a01.c +endif + endif # CONFIG_LCD ifeq ($(CONFIG_SLCD),y) diff --git a/drivers/lcd/gc9a01.c b/drivers/lcd/gc9a01.c new file mode 100644 index 00000000000..84ac24a201d --- /dev/null +++ b/drivers/lcd/gc9a01.c @@ -0,0 +1,860 @@ +/**************************************************************************** + * drivers/lcd/gc9a01.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "gc9a01.h" + +#ifdef CONFIG_LCD_GC9A01 + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Verify that all configuration requirements have been met */ + +#ifndef CONFIG_LCD_GC9A01_SPIMODE +# define CONFIG_LCD_GC9A01_SPIMODE SPIDEV_MODE0 +#endif + +/* SPI frequency */ + +#ifndef CONFIG_LCD_GC9A01_FREQUENCY +# define CONFIG_LCD_GC9A01_FREQUENCY 1000000 +#endif + +/* Check contrast selection */ + +#if !defined(CONFIG_LCD_MAXCONTRAST) +# define CONFIG_LCD_MAXCONTRAST 1 +#endif + +/* Check power setting */ + +#if !defined(CONFIG_LCD_MAXPOWER) || CONFIG_LCD_MAXPOWER < 1 +# define CONFIG_LCD_MAXPOWER 1 +#endif + +#if CONFIG_LCD_MAXPOWER > 255 +# error "CONFIG_LCD_MAXPOWER must be less than 256 to fit in uint8_t" +#endif + +/* Check orientation */ + +#if defined(CONFIG_LCD_PORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) ||\ + defined(CONFIG_LCD_RPORTRAIT) +# error "Cannot define both portrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_RPORTRAIT) +# if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# error "Cannot define both rportrait and any other orientations" +# endif +#elif defined(CONFIG_LCD_LANDSCAPE) +# ifdef CONFIG_LCD_RLANDSCAPE +# error "Cannot define both landscape and any other orientations" +# endif +#elif !defined(CONFIG_LCD_RLANDSCAPE) +# define CONFIG_LCD_LANDSCAPE 1 +#endif + +/* Display Resolution */ + +#if !defined(CONFIG_LCD_GC9A01_XRES) +# define CONFIG_LCD_GC9A01_XRES 240 +#endif + +#if !defined(CONFIG_LCD_GC9A01_YRES) +# define CONFIG_LCD_GC9A01_YRES 320 +#endif + +#define GC9A01_LUT_SIZE CONFIG_LCD_GC9A01_YRES + +#if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) +# define GC9A01_XRES CONFIG_LCD_GC9A01_YRES +# define GC9A01_YRES CONFIG_LCD_GC9A01_XRES +# define GC9A01_XOFFSET CONFIG_LCD_GC9A01_YOFFSET +# define GC9A01_YOFFSET CONFIG_LCD_GC9A01_XOFFSET +#else +# define GC9A01_XRES CONFIG_LCD_GC9A01_XRES +# define GC9A01_YRES CONFIG_LCD_GC9A01_YRES +# define GC9A01_XOFFSET CONFIG_LCD_GC9A01_XOFFSET +# define GC9A01_YOFFSET CONFIG_LCD_GC9A01_YOFFSET +#endif + +/* Color depth and format */ + +#ifdef CONFIG_LCD_GC9A01_BPP +# if (CONFIG_LCD_GC9A01_BPP == 12) +# define GC9A01_BPP 12 +# define GC9A01_COLORFMT FB_FMT_RGB12_444 +# define GC9A01_BYTESPP 2 +# elif (CONFIG_LCD_GC9A01_BPP == 16) +# define GC9A01_BPP 16 +# define GC9A01_COLORFMT FB_FMT_RGB16_565 +# define GC9A01_BYTESPP 2 +# else +# define GC9A01_BPP 16 +# define GC9A01_COLORFMT FB_FMT_RGB16_565 +# define GC9A01_BYTESPP 2 +# warning "Invalid color depth. Falling back to 16bpp" +# endif +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* This structure describes the state of this driver */ + +struct gc9a01_dev_s +{ + /* Publicly visible device structure */ + + struct lcd_dev_s dev; + + /* Private LCD-specific information follows */ + + FAR struct spi_dev_s *spi; /* SPI device */ + uint8_t bpp; /* Selected color depth */ + uint8_t power; /* Current power setting */ + + /* This is working memory allocated by the LCD driver for each LCD device + * and for each color plane. This memory will hold one raster line of data. + * The size of the allocated run buffer must therefore be at least + * (bpp * xres / 8). Actual alignment of the buffer must conform to the + * bitwidth of the underlying pixel type. + * + * If there are multiple planes, they may share the same working buffer + * because different planes will not be operate on concurrently. However, + * if there are multiple LCD devices, they must each have unique run + * buffers. + */ + + uint16_t runbuffer[GC9A01_LUT_SIZE]; +}; + +/**************************************************************************** + * Private Function Protototypes + ****************************************************************************/ + +/* Misc. Helpers */ + +static void gc9a01_select(FAR struct spi_dev_s *spi, int bits); +static void gc9a01_deselect(FAR struct spi_dev_s *spi); + +static inline void gc9a01_sendcmd(FAR struct gc9a01_dev_s *dev, uint8_t cmd); +static void gc9a01_cmddata(FAR struct gc9a01_dev_s *dev, uint8_t cmd, + const uint8_t *data, int len); +static void gc9a01_init(FAR struct gc9a01_dev_s *dev); +static void gc9a01_sleep(FAR struct gc9a01_dev_s *dev, bool sleep); +static void gc9a01_setorientation(FAR struct gc9a01_dev_s *dev); +static void gc9a01_display(FAR struct gc9a01_dev_s *dev, bool on); +static void gc9a01_setarea(FAR struct gc9a01_dev_s *dev, + uint16_t x0, uint16_t y0, + uint16_t x1, uint16_t y1); +static void gc9a01_bpp(FAR struct gc9a01_dev_s *dev, int bpp); +static void gc9a01_wrram(FAR struct gc9a01_dev_s *dev, + FAR const uint16_t *buff, size_t size); +#ifndef CONFIG_LCD_NOGETRUN +static void gc9a01_rdram(FAR struct gc9a01_dev_s *dev, + FAR uint16_t *buff, size_t size); +#endif +static void gc9a01_fill(FAR struct gc9a01_dev_s *dev, uint16_t color); + +/* LCD Data Transfer Methods */ + +static int gc9a01_putrun(fb_coord_t row, fb_coord_t col, + FAR const uint8_t *buffer, size_t npixels); +static int gc9a01_putarea(fb_coord_t row_start, fb_coord_t row_end, + fb_coord_t col_start, fb_coord_t col_end, + FAR const uint8_t *buffer); +#ifndef CONFIG_LCD_NOGETRUN +static int gc9a01_getrun(fb_coord_t row, fb_coord_t col, + FAR uint8_t *buffer, size_t npixels); +#endif + +/* LCD Configuration */ + +static int gc9a01_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo); +static int gc9a01_getplaneinfo(FAR struct lcd_dev_s *dev, + unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo); + +/* LCD Specific Controls */ + +static int gc9a01_getpower(FAR struct lcd_dev_s *dev); +static int gc9a01_setpower(FAR struct lcd_dev_s *dev, int power); +static int gc9a01_getcontrast(FAR struct lcd_dev_s *dev); +static int gc9a01_setcontrast(FAR struct lcd_dev_s *dev, + unsigned int contrast); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct gc9a01_dev_s g_lcddev; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gc9a01_select + * + * Description: + * Select the SPI, locking and re-configuring if necessary + * + * Input Parameters: + * spi - Reference to the SPI driver structure + * bits - Number of SPI bits + * + * Returned Value: + * None + * + * Assumptions: + * + ****************************************************************************/ + +static void gc9a01_select(FAR struct spi_dev_s *spi, int bits) +{ + /* Select GC9A01 chip (locking the SPI bus in case there are multiple + * devices competing for the SPI bus + */ + + SPI_LOCK(spi, true); + SPI_SELECT(spi, SPIDEV_DISPLAY(0), true); + + /* Now make sure that the SPI bus is configured for the GC9A01 (it + * might have gotten configured for a different device while unlocked) + */ + + SPI_SETMODE(spi, CONFIG_LCD_GC9A01_SPIMODE); + SPI_SETBITS(spi, bits); + SPI_SETFREQUENCY(spi, CONFIG_LCD_GC9A01_FREQUENCY); +} + +/**************************************************************************** + * Name: gc9a01_deselect + * + * Description: + * De-select the SPI + * + * Input Parameters: + * spi - Reference to the SPI driver structure + * + * Returned Value: + * None + * + * Assumptions: + * + ****************************************************************************/ + +static void gc9a01_deselect(FAR struct spi_dev_s *spi) +{ + /* De-select GC9A01 chip and relinquish the SPI bus. */ + + SPI_SELECT(spi, SPIDEV_DISPLAY(0), false); + SPI_LOCK(spi, false); +} + +/**************************************************************************** + * Name: gc9a01_sendcmd + * + * Description: + * Send a command to the driver. + * + ****************************************************************************/ + +static inline void gc9a01_sendcmd(FAR struct gc9a01_dev_s *dev, uint8_t cmd) +{ + gc9a01_select(dev->spi, 8); + SPI_CMDDATA(dev->spi, SPIDEV_DISPLAY(0), true); + SPI_SEND(dev->spi, cmd); + SPI_CMDDATA(dev->spi, SPIDEV_DISPLAY(0), false); + gc9a01_deselect(dev->spi); +} + +/**************************************************************************** + * Name: gc9a01_cmddata + * + * Description: + * Send a command and a series of data to the driver. + * + ****************************************************************************/ + +static void gc9a01_cmddata(FAR struct gc9a01_dev_s *dev, uint8_t cmd, + const uint8_t *data, int len) +{ + gc9a01_select(dev->spi, 8); + SPI_CMDDATA(dev->spi, SPIDEV_DISPLAY(0), true); + SPI_SEND(dev->spi, cmd); + SPI_CMDDATA(dev->spi, SPIDEV_DISPLAY(0), false); + SPI_SNDBLOCK(dev->spi, data, len); + gc9a01_deselect(dev->spi); +} + +/**************************************************************************** + * Name: gc9a01_init + * + * Description: + * Send gc9a01 internal init commands. + * + ****************************************************************************/ + +static void gc9a01_init(FAR struct gc9a01_dev_s *dev) +{ + gc9a01_sendcmd(dev, GC9A01_SWRESET); + up_mdelay(120); + gc9a01_sendcmd(dev, GC9A01_ENIREG2); + gc9a01_cmddata(dev, 0xeb, (const uint8_t *) "\x14", 1); + gc9a01_sendcmd(dev, GC9A01_ENIREG1); + gc9a01_sendcmd(dev, GC9A01_ENIREG2); + gc9a01_cmddata(dev, 0xeb, (const uint8_t *) "\x14", 1); + gc9a01_cmddata(dev, 0x84, (const uint8_t *) "\x40", 1); + gc9a01_cmddata(dev, 0x85, (const uint8_t *) "\xFF", 1); + gc9a01_cmddata(dev, 0x86, (const uint8_t *) "\xFF", 1); + gc9a01_cmddata(dev, 0x87, (const uint8_t *) "\xFF", 1); + gc9a01_cmddata(dev, 0x88, (const uint8_t *) "\x0A", 1); + gc9a01_cmddata(dev, 0x89, (const uint8_t *) "\x21", 1); + gc9a01_cmddata(dev, 0x8a, (const uint8_t *) "\x00", 1); + gc9a01_cmddata(dev, 0x8b, (const uint8_t *) "\x80", 1); + gc9a01_cmddata(dev, 0x8c, (const uint8_t *) "\x01", 1); + gc9a01_cmddata(dev, 0x8d, (const uint8_t *) "\x01", 1); + gc9a01_cmddata(dev, 0x8e, (const uint8_t *) "\xFF", 1); + gc9a01_cmddata(dev, 0x8f, (const uint8_t *) "\xFF", 1); + gc9a01_cmddata(dev, 0xb6, (const uint8_t *) "\x00\x00", 2); + gc9a01_cmddata(dev, 0x3a, (const uint8_t *) "\x55", 1); + gc9a01_cmddata(dev, 0x90, (const uint8_t *) "\x08\x08\x08\x08", 4); + gc9a01_cmddata(dev, 0xbd, (const uint8_t *) "\x06", 1); + gc9a01_cmddata(dev, 0xbc, (const uint8_t *) "\x00", 1); + gc9a01_cmddata(dev, 0xff, (const uint8_t *) "\x60\x01\x04", 3); + gc9a01_cmddata(dev, 0xc3, (const uint8_t *) "\x13", 1); + gc9a01_cmddata(dev, 0xc4, (const uint8_t *) "\x13", 1); + gc9a01_cmddata(dev, 0xc9, (const uint8_t *) "\x22", 1); + gc9a01_cmddata(dev, 0xbe, (const uint8_t *) "\x11", 1); + gc9a01_cmddata(dev, 0xe1, (const uint8_t *) "\x10\x0E", 2); + gc9a01_cmddata(dev, 0xdf, (const uint8_t *) "\x21\x0c\x02", 3); + gc9a01_cmddata(dev, 0xf0, (const uint8_t *) "\x45\x09\x08\x08\x26\x2A", 6); + gc9a01_cmddata(dev, 0xf1, (const uint8_t *) "\x43\x70\x72\x36\x37\x6F", 6); + gc9a01_cmddata(dev, 0xf2, (const uint8_t *) "\x45\x09\x08\x08\x26\x2A", 6); + gc9a01_cmddata(dev, 0xf3, (const uint8_t *) "\x43\x70\x72\x36\x37\x6F", 6); + gc9a01_cmddata(dev, 0xed, (const uint8_t *) "\x1B\x0B", 2); + gc9a01_cmddata(dev, 0xae, (const uint8_t *) "\x77", 1); + gc9a01_cmddata(dev, 0xcd, (const uint8_t *) "\x63", 1); + gc9a01_cmddata(dev, 0x70, (const uint8_t *) + "\x07\x07\x04\x0E\x0F\x09\x07\x08\x03", 9); + gc9a01_cmddata(dev, 0xe8, (const uint8_t *) "\x34", 1); + gc9a01_cmddata(dev, 0x62, (const uint8_t *) + "\x18\x0D\x71\xED\x70\x70\x18\x0F\x71\xEF\x70\x70", 12); + gc9a01_cmddata(dev, 0x63, (const uint8_t *) + "\x18\x11\x71\xF1\x70\x70\x18\x13\x71\xF3\x70\x70", 12); + gc9a01_cmddata(dev, 0x64, (const uint8_t *) + "\x28\x29\xF1\x01\xF1\x00\x07", 7); + gc9a01_cmddata(dev, 0x66, (const uint8_t *) + "\x3C\x00\xCD\x67\x45\x45\x10\x00\x00\x00", 10); + gc9a01_cmddata(dev, 0x67, (const uint8_t *) + "\x00\x3C\x00\x00\x00\x01\x54\x10\x32\x98", 10); + gc9a01_cmddata(dev, 0x74, (const uint8_t *) + "\x10\x85\x80\x00\x00\x4E\x00", 7); + gc9a01_cmddata(dev, 0x98, (const uint8_t *) "\x3e\x07", 2); + gc9a01_sendcmd(dev, GC9A01_TEON); + up_mdelay(120); +} + +/**************************************************************************** + * Name: gc9a01_sleep + * + * Description: + * Sleep or wake up the driver. + * + ****************************************************************************/ + +static void gc9a01_sleep(FAR struct gc9a01_dev_s *dev, bool sleep) +{ + gc9a01_sendcmd(dev, sleep ? GC9A01_SLPIN : GC9A01_SLPOUT); + up_mdelay(120); +} + +/**************************************************************************** + * Name: gc9a01_display + * + * Description: + * Turn on or off the display. + * + ****************************************************************************/ + +static void gc9a01_display(FAR struct gc9a01_dev_s *dev, bool on) +{ + gc9a01_sendcmd(dev, on ? GC9A01_DISPON : GC9A01_DISPOFF); + gc9a01_sendcmd(dev, GC9A01_INVON); +} + +/**************************************************************************** + * Name: gc9a01_setorientation + * + * Description: + * Set screen orientation. + * + ****************************************************************************/ + +static void gc9a01_setorientation(FAR struct gc9a01_dev_s *dev) +{ + uint8_t reg = GC9A01_MADCTL_MX; + gc9a01_sendcmd(dev, GC9A01_MADCTL); + gc9a01_select(dev->spi, 8); + +#if !defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_GC9A01_BGR) + +# if defined(CONFIG_LCD_RLANDSCAPE) + + reg = GC9A01_MADCTL_MX | GC9A01_MADCTL_MY | GC9A01_MADCTL_MV; + +# elif defined(CONFIG_LCD_LANDSCAPE) + + reg = GC9A01_MADCTL_MV; + +# elif defined(CONFIG_LCD_RPORTRAIT) + + reg = GC9A01_MADCTL_MY; + +# endif + +# if defined(CONFIG_LCD_GC9A01_BGR) + + reg |= GC9A01_MADCTL_BGR; + +# endif + +#endif + + SPI_SEND(dev->spi, reg); + gc9a01_deselect(dev->spi); +} + +/**************************************************************************** + * Name: gc9a01_setarea + * + * Description: + * Set the rectangular area for an upcoming read or write from RAM. + * + ****************************************************************************/ + +static void gc9a01_setarea(FAR struct gc9a01_dev_s *dev, + uint16_t x0, uint16_t y0, + uint16_t x1, uint16_t y1) +{ + /* Set row address */ + + gc9a01_sendcmd(dev, GC9A01_RASET); + gc9a01_select(dev->spi, 8); + SPI_SEND(dev->spi, (y0 + GC9A01_YOFFSET) >> 8); + SPI_SEND(dev->spi, (y0 + GC9A01_YOFFSET) & 0xff); + SPI_SEND(dev->spi, (y1 + GC9A01_YOFFSET) >> 8); + SPI_SEND(dev->spi, (y1 + GC9A01_YOFFSET) & 0xff); + gc9a01_deselect(dev->spi); + + /* Set column address */ + + gc9a01_sendcmd(dev, GC9A01_CASET); + gc9a01_select(dev->spi, 8); + SPI_SEND(dev->spi, (x0 + GC9A01_XOFFSET) >> 8); + SPI_SEND(dev->spi, (x0 + GC9A01_XOFFSET) & 0xff); + SPI_SEND(dev->spi, (x1 + GC9A01_XOFFSET) >> 8); + SPI_SEND(dev->spi, (x1 + GC9A01_XOFFSET) & 0xff); + gc9a01_deselect(dev->spi); +} + +/**************************************************************************** + * Name: gc9a01_bpp + * + * Description: + * Set the color depth of the device. + * + ****************************************************************************/ + +static void gc9a01_bpp(FAR struct gc9a01_dev_s *dev, int bpp) +{ + uint8_t depth; + + /* Don't send any command if the depth hasn't changed. */ + + if (dev->bpp != bpp) + { + depth = bpp / 2 - 3; + gc9a01_sendcmd(dev, GC9A01_COLMOD); + gc9a01_select(dev->spi, 8); + SPI_SEND(dev->spi, depth); + gc9a01_deselect(dev->spi); + + /* Cache the new BPP */ + + dev->bpp = bpp; + } +} + +/**************************************************************************** + * Name: gc9a01_wrram + * + * Description: + * Write to the driver's RAM. + * + ****************************************************************************/ + +static void gc9a01_wrram(FAR struct gc9a01_dev_s *dev, + FAR const uint16_t *buff, size_t size) +{ + gc9a01_sendcmd(dev, GC9A01_RAMWR); + + gc9a01_select(dev->spi, GC9A01_BYTESPP * 8); + SPI_SNDBLOCK(dev->spi, buff, size); + gc9a01_deselect(dev->spi); +} + +/**************************************************************************** + * Name: gc9a01_rdram + * + * Description: + * Read from the driver's RAM. + * + ****************************************************************************/ + +#ifndef CONFIG_LCD_NOGETRUN +static void gc9a01_rdram(FAR struct gc9a01_dev_s *dev, + FAR uint16_t *buff, size_t size) +{ + gc9a01_sendcmd(dev, GC9A01_RAMRD); + + gc9a01_select(dev->spi, GC9A01_BYTESPP * 8); + SPI_RECVBLOCK(dev->spi, buff, size); + gc9a01_deselect(dev->spi); +} +#endif + +/**************************************************************************** + * Name: gc9a01_fill + * + * Description: + * Fill the display with the specified color. + * + ****************************************************************************/ + +static void gc9a01_fill(FAR struct gc9a01_dev_s *dev, uint16_t color) +{ + int i; + + gc9a01_setarea(dev, 0, 0, GC9A01_XRES - 1, GC9A01_YRES - 1); + + gc9a01_sendcmd(dev, GC9A01_RAMWR); + gc9a01_select(dev->spi, GC9A01_BYTESPP *8); + + for (i = 0; i < GC9A01_XRES * GC9A01_YRES; i++) + { + SPI_SEND(dev->spi, color); + } + + gc9a01_deselect(dev->spi); +} + +/**************************************************************************** + * Name: gc9a01_putrun + * + * Description: + * This method can be used to write a partial raster line to the LCD: + * + * row - Starting row to write to (range: 0 <= row < yres) + * col - Starting column to write to (range: 0 <= col <= xres-npixels) + * buffer - The buffer containing the run to be written to the LCD + * npixels - The number of pixels to write to the LCD + * (range: 0 < npixels <= xres-col) + * + ****************************************************************************/ + +static int gc9a01_putrun(fb_coord_t row, fb_coord_t col, + FAR const uint8_t *buffer, size_t npixels) +{ + FAR struct gc9a01_dev_s *priv = &g_lcddev; + FAR const uint16_t *src = (FAR const uint16_t *)buffer; + + ginfo("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + gc9a01_setarea(priv, col, row, col + npixels - 1, row); + gc9a01_wrram(priv, src, npixels); + + return OK; +} + +/**************************************************************************** + * Name: gc9a01_putarea + * + * Description: + * This method can be used to write a partial area to the LCD: + * + * row_start - Starting row to write to (range: 0 <= row < yres) + * row_end - Ending row to write to (range: row_start <= row < yres) + * col_start - Starting column to write to (range: 0 <= col <= xres) + * col_end - Ending column to write to + * (range: col_start <= col_end < xres) + * buffer - The buffer containing the area to be written to the LCD + * + ****************************************************************************/ + +static int gc9a01_putarea(fb_coord_t row_start, fb_coord_t row_end, + fb_coord_t col_start, fb_coord_t col_end, + FAR const uint8_t *buffer) +{ + FAR struct gc9a01_dev_s *priv = &g_lcddev; + FAR const uint16_t *src = (FAR const uint16_t *)buffer; + + ginfo("row_start: %d row_end: %d col_start: %d col_end: %d\n", + row_start, row_end, col_start, col_end); + + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + gc9a01_setarea(priv, col_start, row_start, col_end, row_end); + gc9a01_wrram(priv, src, + (row_end - row_start + 1) * (col_end - col_start + 1)); + + return OK; +} + +/**************************************************************************** + * Name: gc9a01_getrun + * + * Description: + * This method can be used to read a partial raster line from the LCD: + * + * row - Starting row to read from (range: 0 <= row < yres) + * col - Starting column to read read (range: 0 <= col <= xres-npixels) + * buffer - The buffer in which to return the run read from the LCD + * npixels - The number of pixels to read from the LCD + * (range: 0 < npixels <= xres-col) + * + ****************************************************************************/ + +#ifndef CONFIG_LCD_NOGETRUN +static int gc9a01_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer, + size_t npixels) +{ + FAR struct gc9a01_dev_s *priv = &g_lcddev; + FAR uint16_t *dest = (FAR uint16_t *)buffer; + + ginfo("row: %d col: %d npixels: %d\n", row, col, npixels); + DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); + + gc9a01_setarea(priv, col, row, col + npixels - 1, row); + gc9a01_rdram(priv, dest, npixels); + + return OK; +} +#endif + +/**************************************************************************** + * Name: gc9a01_getvideoinfo + * + * Description: + * Get information about the LCD video controller configuration. + * + ****************************************************************************/ + +static int gc9a01_getvideoinfo(FAR struct lcd_dev_s *dev, + FAR struct fb_videoinfo_s *vinfo) +{ + DEBUGASSERT(dev && vinfo); + lcdinfo("fmt: %d xres: %d yres: %d nplanes: 1\n", + GC9A01_COLORFMT, GC9A01_XRES, GC9A01_YRES); + + vinfo->fmt = GC9A01_COLORFMT; /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */ + vinfo->xres = GC9A01_XRES; /* Horizontal resolution in pixel columns */ + vinfo->yres = GC9A01_YRES; /* Vertical resolution in pixel rows */ + vinfo->nplanes = 1; /* Number of color planes supported */ + return OK; +} + +/**************************************************************************** + * Name: gc9a01_getplaneinfo + * + * Description: + * Get information about the configuration of each LCD color plane. + * + ****************************************************************************/ + +static int gc9a01_getplaneinfo(FAR struct lcd_dev_s *dev, + unsigned int planeno, + FAR struct lcd_planeinfo_s *pinfo) +{ + FAR struct gc9a01_dev_s *priv = (FAR struct gc9a01_dev_s *)dev; + + DEBUGASSERT(dev && pinfo && planeno == 0); + lcdinfo("planeno: %d bpp: %d\n", planeno, GC9A01_BPP); + + pinfo->putrun = gc9a01_putrun; /* Put a run into LCD memory */ + pinfo->putarea = gc9a01_putarea; /* Put an area into LCD */ +#ifndef CONFIG_LCD_NOGETRUN + pinfo->getrun = gc9a01_getrun; /* Get a run from LCD memory */ +#endif + pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */ + pinfo->bpp = priv->bpp; /* Bits-per-pixel */ + return OK; +} + +/**************************************************************************** + * Name: gc9a01_getpower + ****************************************************************************/ + +static int gc9a01_getpower(FAR struct lcd_dev_s *dev) +{ + FAR struct gc9a01_dev_s *priv = (FAR struct gc9a01_dev_s *)dev; + + lcdinfo("power: %d\n", priv->power); + return priv->power; +} + +/**************************************************************************** + * Name: gc9a01_setpower + ****************************************************************************/ + +static int gc9a01_setpower(FAR struct lcd_dev_s *dev, int power) +{ + FAR struct gc9a01_dev_s *priv = (FAR struct gc9a01_dev_s *)dev; + + lcdinfo("power: %d\n", power); + DEBUGASSERT((unsigned)power <= CONFIG_LCD_MAXPOWER); + + /* Set new power level */ + + if (power > 0) + { + /* Turn on the display */ + + gc9a01_display(priv, true); + + /* Save the power */ + + priv->power = power; + } + else + { + /* Turn off the display */ + + gc9a01_display(priv, false); + + /* Save the power */ + + priv->power = 0; + } + + return OK; +} + +/**************************************************************************** + * Name: gc9a01_getcontrast + * + * Description: + * Get the current contrast setting (0-CONFIG_LCD_MAXCONTRAST). + * + ****************************************************************************/ + +static int gc9a01_getcontrast(FAR struct lcd_dev_s *dev) +{ + lcdinfo("Not implemented\n"); + return -ENOSYS; +} + +/**************************************************************************** + * Name: gc9a01_setcontrast + * + * Description: + * Set LCD panel contrast (0-CONFIG_LCD_MAXCONTRAST). + * + ****************************************************************************/ + +static int gc9a01_setcontrast(FAR struct lcd_dev_s *dev, + unsigned int contrast) +{ + lcdinfo("contrast: %d\n", contrast); + return -ENOSYS; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: gc9a01_initialize + * + * Description: + * Initialize the GC9A01 video hardware. The initial state of the + * LCD is fully initialized, display memory cleared, and the LCD ready + * to use, but with the power setting at 0 (full off == sleep mode). + * + * Returned Value: + * + * On success, this function returns a reference to the LCD object for + * the specified LCD. NULL is returned on any failure. + * + ****************************************************************************/ + +FAR struct lcd_dev_s *gc9a01_lcdinitialize(FAR struct spi_dev_s *spi) +{ + FAR struct gc9a01_dev_s *priv = &g_lcddev; + + /* Initialize the driver data structure */ + + priv->dev.getvideoinfo = gc9a01_getvideoinfo; + priv->dev.getplaneinfo = gc9a01_getplaneinfo; + priv->dev.getpower = gc9a01_getpower; + priv->dev.setpower = gc9a01_setpower; + priv->dev.getcontrast = gc9a01_getcontrast; + priv->dev.setcontrast = gc9a01_setcontrast; + priv->spi = spi; + + /* Init the hardware and clear the display */ + + gc9a01_init(priv); + gc9a01_sleep(priv, false); + gc9a01_bpp(priv, GC9A01_BPP); + gc9a01_setorientation(priv); + gc9a01_display(priv, true); + gc9a01_fill(priv, 0xffff); + + return &priv->dev; +} + +#endif /* CONFIG_LCD_GC9A01 */ diff --git a/drivers/lcd/gc9a01.h b/drivers/lcd/gc9a01.h new file mode 100644 index 00000000000..858f9ad54e7 --- /dev/null +++ b/drivers/lcd/gc9a01.h @@ -0,0 +1,71 @@ +/**************************************************************************** + * drivers/lcd/gc9a01.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __DRIVERS_LCD_GC9A01_H +#define __DRIVERS_LCD_GC9A01_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define GC9A01_NOP 0x00 /* No Operation */ +#define GC9A01_SWRESET 0x01 /* Software Reset */ +#define GC9A01_RDDID 0x04 /* Read Display ID */ +#define GC9A01_RDDST 0x09 /* Read Display Status */ + +#define GC9A01_SLPIN 0x10 /* Sleep In & Booster Off */ +#define GC9A01_SLPOUT 0x11 /* Sleep Out & Booster On */ +#define GC9A01_PTLON 0x12 /* Partial Mode On */ +#define GC9A01_NORON 0x13 /* Partial Mode Off */ + +#define GC9A01_INVOFF 0x20 /* Display Inversion Off */ +#define GC9A01_INVON 0x21 /* Display Inversion On */ +#define GC9A01_DISPOFF 0x28 /* Display Off */ +#define GC9A01_DISPON 0x29 /* Display On */ +#define GC9A01_CASET 0x2a /* Column Address Set */ +#define GC9A01_RASET 0x2b /* Row Address Set */ +#define GC9A01_RAMWR 0x2c /* Memory Write */ +#define GC9A01_RAMRD 0x2e /* Memory Read */ + +#define GC9A01_PTLAR 0x30 /* Partial Area */ +#define GC9A01_VSCRDEF 0x33 /* Vertical Scrolling Definition */ +#define GC9A01_TEON 0x35 /* Tering Effect Line On */ +#define GC9A01_MADCTL 0x36 /* Memory Data Access Control */ + +#define GC9A01_MADCTL_MY (1<<7) /* Page Address Order */ +#define GC9A01_MADCTL_MX (1<<6) /* Column Address Order */ +#define GC9A01_MADCTL_MV (1<<5) /* Page/Column Order */ +#define GC9A01_MADCTL_ML (1<<4) /* Line Address Order */ +#define GC9A01_MADCTL_BGR (1<<3) /* Set Panel Order BGR */ +#define GC9A01_MADCTL_MH (1<<2) /* Display Data Latch Order */ + +#define GC9A01_VSCSAD 0x37 /* Vertical Scrolling Start Address */ +#define GC9A01_IDMOFF 0x38 /* Idle Mode Off */ +#define GC9A01_IDMON 0x39 /* Idle Mode On */ +#define GC9A01_COLMOD 0x3a /* Interface Pixel Format */ + +#define GC9A01_ENIREG1 0xFE /* Enable internal register 1 */ +#define GC9A01_ENIREG2 0xEF /* Enable internal register 2 */ + +#endif /* __DRIVERS_LCD_GC9A01_H */ diff --git a/drivers/lcd/lcddrv_spiif.c b/drivers/lcd/lcddrv_spiif.c index b6c149ebcc4..33324bd68a5 100644 --- a/drivers/lcd/lcddrv_spiif.c +++ b/drivers/lcd/lcddrv_spiif.c @@ -1,39 +1,20 @@ /**************************************************************************** * drivers/lcd/lcddrv_spiif.c * - * Generic Driver interface for the Single Chip LCD driver connected - * via spi driver + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2020 Gregory Nutt. All rights reserved. - * Author: Dave Marples - * Based on work from Marco Krahl + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/lcd/pcd8544.c b/drivers/lcd/pcd8544.c index 04cf853ed16..538e44550df 100644 --- a/drivers/lcd/pcd8544.c +++ b/drivers/lcd/pcd8544.c @@ -1,45 +1,20 @@ /**************************************************************************** * drivers/lcd/pcd8544.c * - * Driver for the Philips PCD8544 Display controller + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2017 Alan Carvalho de Assis. All rights reserved. - * Author: Alan Carvalho de Assis + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on drivers/lcd/pcd8544.c. - * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/lcd/st7565.c b/drivers/lcd/st7565.c index e6fb2a0b900..c358a3a1346 100644 --- a/drivers/lcd/st7565.c +++ b/drivers/lcd/st7565.c @@ -1,52 +1,27 @@ /**************************************************************************** * drivers/lcd/st7565.c * - * Definitions for the ST7565 128x64 Dot Matrix LCD Driver with C + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2014 Pierre-noel Bouteville. All rights reserved. - * Author: Pierre-noel Boutevlle + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on drivers/lcd/st7567.c - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan - * - * Based on drivers/lcd/ug-9664hswag01.c - * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Reference: "Product Specification, OEL Display Module, ST7567", Univision - * Technology Inc., SAS1-6020-B, January 3, 2008. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ +/* Reference: "Product Specification, OEL Display Module, ST7567", Univision + * Technology Inc., SAS1-6020-B, January 3, 2008. + */ + /**************************************************************************** * Included Files ****************************************************************************/ diff --git a/drivers/lcd/st7565.h b/drivers/lcd/st7565.h index 9d3a11bcbec..498f5fcda19 100644 --- a/drivers/lcd/st7565.h +++ b/drivers/lcd/st7565.h @@ -1,44 +1,20 @@ /**************************************************************************** * drivers/lcd/st7565.h * - * Copyright (C) 2014 Pierre-noel Bouteville. All rights reserved. - * Author: Pierre-noel Boutevlle + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on drivers/lcd/st7567.h - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on drivers/lcd/ssd1305.h - * - * Copyright (C) 2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/lcd/st7567.c b/drivers/lcd/st7567.c index 6c8a46b491a..8ec4f576ad4 100644 --- a/drivers/lcd/st7567.c +++ b/drivers/lcd/st7567.c @@ -1,40 +1,20 @@ /**************************************************************************** * drivers/lcd/st7567.c * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on drivers/lcd/ug-9664hswag01.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/lcd/st7567.h b/drivers/lcd/st7567.h index e523148922d..d84dc53be78 100644 --- a/drivers/lcd/st7567.h +++ b/drivers/lcd/st7567.h @@ -1,40 +1,20 @@ /**************************************************************************** * drivers/lcd/st7567.h * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on drivers/lcd/ssd1305.h + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/lcd/st7735.c b/drivers/lcd/st7735.c index e663409a8ac..8824fd171c4 100644 --- a/drivers/lcd/st7735.c +++ b/drivers/lcd/st7735.c @@ -45,6 +45,8 @@ * Pre-processor Definitions ****************************************************************************/ +#define MAX(a,b) ((a)>(b)?(a):(b)) + /* Verify that all configuration requirements have been met */ #ifndef CONFIG_LCD_ST7735_SPIMODE @@ -94,24 +96,37 @@ /* Display Resolution */ -#ifdef CONFIG_LCD_ST7735_GM00 -# define CONFIG_ST7735_XRES 132 -# define CONFIG_ST7735_YRES 162 -# define ST7735_LUT_SIZE 162 -#else -# define CONFIG_ST7735_XRES 128 -# define CONFIG_ST7735_YRES 160 -# define ST7735_LUT_SIZE 160 +#if defined(CONFIG_LCD_ST7735_GM00) +# define CONFIG_LCD_ST7735_XRES 132 +# define CONFIG_LCD_ST7735_YRES 162 +# define CONFIG_LCD_ST7735_XOFFSET 0 +# define CONFIG_LCD_ST7735_YOFFSET 0 +#elif defined(CONFIG_LCD_ST7735_GM01) +# define CONFIG_LCD_ST7735_XRES 132 +# define CONFIG_LCD_ST7735_YRES 132 +# define CONFIG_LCD_ST7735_XOFFSET 0 +# define CONFIG_LCD_ST7735_YOFFSET 0 +#elif defined(CONFIG_LCD_ST7735_GM11) +# define CONFIG_LCD_ST7735_XRES 128 +# define CONFIG_LCD_ST7735_YRES 160 +# define CONFIG_LCD_ST7735_XOFFSET 0 +# define CONFIG_LCD_ST7735_YOFFSET 0 #endif #if defined(CONFIG_LCD_LANDSCAPE) || defined(CONFIG_LCD_RLANDSCAPE) -# define ST7735_XRES CONFIG_ST7735_YRES -# define ST7735_YRES CONFIG_ST7735_XRES +# define ST7735_XRES CONFIG_LCD_ST7735_YRES +# define ST7735_YRES CONFIG_LCD_ST7735_XRES +# define ST7735_XOFFSET CONFIG_LCD_ST7735_YOFFSET +# define ST7735_YOFFSET CONFIG_LCD_ST7735_XOFFSET #else -# define ST7735_XRES CONFIG_ST7735_XRES -# define ST7735_YRES CONFIG_ST7735_YRES +# define ST7735_XRES CONFIG_LCD_ST7735_XRES +# define ST7735_YRES CONFIG_LCD_ST7735_YRES +# define ST7735_XOFFSET CONFIG_LCD_ST7735_XOFFSET +# define ST7735_YOFFSET CONFIG_LCD_ST7735_YOFFSET #endif +#define ST7735_LUT_SIZE MAX(CONFIG_LCD_ST7735_XRES, CONFIG_LCD_ST7735_YRES) + /* Color depth and format */ #ifdef CONFIG_LCD_ST7735_BPP @@ -180,6 +195,7 @@ static void st7735_deselect(FAR struct spi_dev_s *spi); static inline void st7735_sendcmd(FAR struct st7735_dev_s *dev, uint8_t cmd); static void st7735_sleep(FAR struct st7735_dev_s *dev, bool sleep); static void st7735_display(FAR struct st7735_dev_s *dev, bool on); +static void st7735_setorientation(FAR struct st7735_dev_s *dev); static void st7735_setarea(FAR struct st7735_dev_s *dev, uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1); @@ -328,6 +344,52 @@ static void st7735_display(FAR struct st7735_dev_s *dev, bool on) st7735_sendcmd(dev, on ? ST7735_DISPON : ST7735_DISPOFF); } +/**************************************************************************** + * Name: st7735_setorientation + * + * Description: + * Set screen orientation. + * + ****************************************************************************/ + +static void st7735_setorientation(FAR struct st7735_dev_s *dev) +{ + /* No need to change the orientation in PORTRAIT mode and RGB panel */ + +#if !defined(CONFIG_LCD_PORTRAIT) || defined(CONFIG_LCD_ST7735_BGR) + + uint8_t reg = 0x00; + st7735_sendcmd(dev, ST7735_MADCTL); + st7735_select(dev->spi, 8); + +# if defined(CONFIG_LCD_RLANDSCAPE) + /* RLANDSCAPE : MY=1 MV=1 */ + + reg = ST7735_MADCTL_MY | ST7735_MADCTL_MV; + +# elif defined(CONFIG_LCD_LANDSCAPE) + /* LANDSCAPE : MX=1 MV=1 */ + + reg = ST7735_MADCTL_MX | ST7735_MADCTL_MV; + +# elif defined(CONFIG_LCD_RPORTRAIT) + /* RPORTRAIT : MX=1 MY=1 */ + + reg = ST7735_MADCTL_MX | ST7735_MADCTL_MY; + +# endif + +# if defined(CONFIG_LCD_ST7735_BGR) + + reg |= ST7735_MADCTL_BGR; + +# endif + + SPI_SEND(dev->spi, reg); + st7735_deselect(dev->spi); +#endif +} + /**************************************************************************** * Name: st7735_setarea * @@ -343,17 +405,21 @@ static void st7735_setarea(FAR struct st7735_dev_s *dev, /* Set row address */ st7735_sendcmd(dev, ST7735_RASET); - st7735_select(dev->spi, 16); - SPI_SEND(dev->spi, y0); - SPI_SEND(dev->spi, y1); + st7735_select(dev->spi, 8); + SPI_SEND(dev->spi, (y0 + ST7735_YOFFSET) >> 8); + SPI_SEND(dev->spi, (y0 + ST7735_YOFFSET) & 0xff); + SPI_SEND(dev->spi, (y1 + ST7735_YOFFSET) >> 8); + SPI_SEND(dev->spi, (y1 + ST7735_YOFFSET) & 0xff); st7735_deselect(dev->spi); /* Set column address */ st7735_sendcmd(dev, ST7735_CASET); - st7735_select(dev->spi, 16); - SPI_SEND(dev->spi, x0); - SPI_SEND(dev->spi, x1); + st7735_select(dev->spi, 8); + SPI_SEND(dev->spi, (x0 + ST7735_XOFFSET) >> 8); + SPI_SEND(dev->spi, (x0 + ST7735_XOFFSET) & 0xff); + SPI_SEND(dev->spi, (x1 + ST7735_XOFFSET) >> 8); + SPI_SEND(dev->spi, (x1 + ST7735_XOFFSET) & 0xff); st7735_deselect(dev->spi); } @@ -671,6 +737,7 @@ FAR struct lcd_dev_s *st7735_lcdinitialize(FAR struct spi_dev_s *spi) st7735_sleep(priv, false); st7735_bpp(priv, ST7735_BPP); + st7735_setorientation(priv); st7735_display(priv, true); st7735_fill(priv, 0xffff); diff --git a/drivers/lcd/st7735.h b/drivers/lcd/st7735.h index d7cd5256cd5..057b2ff9faa 100644 --- a/drivers/lcd/st7735.h +++ b/drivers/lcd/st7735.h @@ -46,8 +46,19 @@ #define ST7735_RASET 0x2b /* Row Address Set */ #define ST7735_RAMWR 0x2c /* Memory Write */ #define ST7735_RAMRD 0x2e /* Memory Read */ +#define ST7735_MADCTL 0x36 /* Memory Data Access Control */ + +#define ST7735_MADCTL_MY (1<<7) /* Page Address Order */ +#define ST7735_MADCTL_MX (1<<6) /* Column Address Order */ +#define ST7735_MADCTL_MV (1<<5) /* Page/Column Order */ +#define ST7735_MADCTL_ML (1<<4) /* Line Address Order */ +#define ST7735_MADCTL_BGR (1<<3) /* Set Panel Order BGR */ +#define ST7735_MADCTL_MH (1<<2) /* Display Data Latch Order */ + #define ST7735_IDMOFF 0x38 /* Idle Mode Off */ #define ST7735_IDMON 0x39 /* Idle Mode On */ #define ST7735_COLMOD 0x3a /* Interface Pixel Format */ +FAR struct lcd_dev_s *st7735_lcdinitialize(FAR struct spi_dev_s *spi); + #endif /* __DRIVERS_LCD_ST7735_H */ diff --git a/drivers/lcd/st7789.c b/drivers/lcd/st7789.c index a9e519e4bea..e4eb3944d54 100644 --- a/drivers/lcd/st7789.c +++ b/drivers/lcd/st7789.c @@ -300,7 +300,7 @@ static void st7789_deselect(FAR struct spi_dev_s *spi) static inline void st7789_sendcmd(FAR struct st7789_dev_s *dev, uint8_t cmd) { - st7789_select(dev->spi, ST7789_BYTESPP * 8); + st7789_select(dev->spi, 8); SPI_CMDDATA(dev->spi, SPIDEV_DISPLAY(0), true); SPI_SEND(dev->spi, cmd); SPI_CMDDATA(dev->spi, SPIDEV_DISPLAY(0), false); @@ -386,17 +386,21 @@ static void st7789_setarea(FAR struct st7789_dev_s *dev, /* Set row address */ st7789_sendcmd(dev, ST7789_RASET); - st7789_select(dev->spi, 16); - SPI_SEND(dev->spi, y0 + ST7789_YOFFSET); - SPI_SEND(dev->spi, y1 + ST7789_YOFFSET); + st7789_select(dev->spi, 8); + SPI_SEND(dev->spi, (y0 + ST7789_YOFFSET) >> 8); + SPI_SEND(dev->spi, (y0 + ST7789_YOFFSET) & 0xff); + SPI_SEND(dev->spi, (y1 + ST7789_YOFFSET) >> 8); + SPI_SEND(dev->spi, (y1 + ST7789_YOFFSET) & 0xff); st7789_deselect(dev->spi); /* Set column address */ st7789_sendcmd(dev, ST7789_CASET); - st7789_select(dev->spi, 16); - SPI_SEND(dev->spi, x0 + ST7789_XOFFSET); - SPI_SEND(dev->spi, x1 + ST7789_XOFFSET); + st7789_select(dev->spi, 8); + SPI_SEND(dev->spi, (x0 + ST7789_XOFFSET) >> 8); + SPI_SEND(dev->spi, (x0 + ST7789_XOFFSET) & 0xff); + SPI_SEND(dev->spi, (x1 + ST7789_XOFFSET) >> 8); + SPI_SEND(dev->spi, (x1 + ST7789_XOFFSET) & 0xff); st7789_deselect(dev->spi); } diff --git a/drivers/lcd/tda19988.c b/drivers/lcd/tda19988.c index 41867d3e4f5..4b362a455eb 100644 --- a/drivers/lcd/tda19988.c +++ b/drivers/lcd/tda19988.c @@ -1,41 +1,20 @@ /**************************************************************************** * drivers/lcd/tda19988.c * - * Copyright (C) 2019 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Derives rather loosely from the FreeBSD driver which has a compatible - * two-clause BSD license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2015 Oleksandr Tymoshenko - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/math/Kconfig b/drivers/math/Kconfig new file mode 100644 index 00000000000..3d29356281a --- /dev/null +++ b/drivers/math/Kconfig @@ -0,0 +1,28 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +menu "MATH Acceleration Support" + +config MATH_CORDIC + bool "MATH CORDIC support" + default n + ---help--- + This selection enables building of the "upper-half" CORDIC driver. + See include/nuttx/math/cordic.h for further CORDIC driver information. + +if MATH_CORDIC + +choice + prompt "MATH CORDIC numeric type" + default MATH_CORDIC_USE_Q31 + +config MATH_CORDIC_USE_Q31 + bool "CORDIC uses Q1.31" + +endchoice + +endif + +endmenu # MATH Acceleration Information diff --git a/boards/arm/cxd56xx/drivers/camera/Make.defs b/drivers/math/Make.defs similarity index 77% rename from boards/arm/cxd56xx/drivers/camera/Make.defs rename to drivers/math/Make.defs index 637f196bcca..b628198bf8d 100644 --- a/boards/arm/cxd56xx/drivers/camera/Make.defs +++ b/drivers/math/Make.defs @@ -1,5 +1,5 @@ ############################################################################ -# boards/arm/cxd56xx/drivers/camera/Make.defs +# drivers/math/Make.defs # # Licensed to the Apache Software Foundation (ASF) under one or more # contributor license agreements. See the NOTICE file distributed with @@ -18,10 +18,13 @@ # ############################################################################ -ifeq ($(CONFIG_VIDEO_ISX012),y) - CSRCS += isx012.c +# Include CORDIC support + +ifeq ($(CONFIG_MATH_CORDIC),y) +CSRCS += cordic.c endif -DEPPATH += --dep-path platform$(DELIM)camera -VPATH += :platform$(DELIM)camera -CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)platform$(DELIM)camera) +# Include build support + +DEPPATH += --dep-path math +VPATH += :math diff --git a/drivers/math/cordic.c b/drivers/math/cordic.c new file mode 100644 index 00000000000..ae6fe2d1fa1 --- /dev/null +++ b/drivers/math/cordic.c @@ -0,0 +1,247 @@ +/**************************************************************************** + * drivers/math/cordic.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Type Definitions + ****************************************************************************/ + +/* This structure describes the state of the upper half driver */ + +struct cordic_upperhalf_s +{ + FAR struct cordic_lowerhalf_s *lower; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int cordic_open(FAR struct file *filep); +static int cordic_close(FAR struct file *filep); +static ssize_t cordic_read(FAR struct file *filep, FAR char *buffer, + size_t buflen); +static ssize_t cordic_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int cordic_ioctl(FAR struct file *filep, int cmd, + unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_cordicops = +{ + cordic_open, /* open */ + cordic_close, /* close */ + cordic_read, /* read */ + cordic_write, /* write */ + NULL, /* seek */ + cordic_ioctl, /* ioctl */ + NULL /* poll */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: cordic_open + * + * Description: + * This function is called whenever the cordic timer device is opened. + * + ****************************************************************************/ + +static int cordic_open(FAR struct file *filep) +{ + return OK; +} + +/**************************************************************************** + * Name: cordic_close + * + * Description: + * This function is called when the cordic timer device is closed. + * + ****************************************************************************/ + +static int cordic_close(FAR struct file *filep) +{ + return OK; +} + +/**************************************************************************** + * Name: cordic_read + * + * Description: + * A dummy read method. This is provided only to satisfy the VFS layer. + * + ****************************************************************************/ + +static ssize_t cordic_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + /* Return zero -- usually meaning end-of-file */ + + return 0; +} + +/**************************************************************************** + * Name: cordic_write + * + * Description: + * A dummy write method. This is provided only to satisfy the VFS layer. + * + ****************************************************************************/ + +static ssize_t cordic_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen) +{ + return 0; +} + +/**************************************************************************** + * Name: cordic_ioctl + * + * Description: + * The standard ioctl method. This is where ALL of the cordic timer + * work is done. + * + ****************************************************************************/ + +static int cordic_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct cordic_upperhalf_s *upper = NULL; + FAR struct cordic_lowerhalf_s *lower = NULL; + int ret = 0; + irqstate_t flags; + + _info("cmd: %d arg: %lu\n", cmd, arg); + upper = inode->i_private; + DEBUGASSERT(upper != NULL); + lower = upper->lower; + DEBUGASSERT(lower != NULL); + + flags = enter_critical_section(); + + switch (cmd) + { + /* CORDIC calulcate */ + + case MATHIOC_CORDIC_CALC: + { + FAR struct cordic_calc_s *calc = + (FAR struct cordic_calc_s *)((uintptr_t)arg); + + ret = lower->ops->calc(lower, calc); + + break; + } + + /* Not supported */ + + default: + { + ret = -ENOTTY; + + break; + } + } + + leave_critical_section(flags); + + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: cordic_register + * + * Description: + * Register a CORDIC driver. + * + ****************************************************************************/ + +int cordic_register(FAR const char *path, + FAR struct cordic_lowerhalf_s *lower) +{ + FAR struct cordic_upperhalf_s *upper = NULL; + int ret = OK; + + DEBUGASSERT(path); + DEBUGASSERT(lower); + + /* Allocate the upper-half data structure */ + + upper = (FAR struct cordic_upperhalf_s *) + kmm_zalloc(sizeof(struct cordic_upperhalf_s)); + if (!upper) + { + _err("Upper half allocation failed\n"); + goto errout; + } + + /* Initialize the CORDIC device structure */ + + upper->lower = lower; + + /* Register the cordic timer device */ + + ret = register_driver(path, &g_cordicops, 0666, upper); + if (ret < 0) + { + _err("register_driver failed: %d\n", ret); + kmm_free(upper); + } + +errout: + return ret; +} diff --git a/drivers/mkrd.c b/drivers/mkrd.c index 88490eb09ed..25f374f882f 100644 --- a/drivers/mkrd.c +++ b/drivers/mkrd.c @@ -68,7 +68,7 @@ int mkrd(int minor, uint32_t nsectors, uint16_t sectsize, uint8_t rdflags) buffer = (FAR uint8_t *)kmm_malloc(sectsize * nsectors); if (buffer == NULL) { - ferr("ERROR: kmm_malloc() failed: %d\n", ret); + ferr("ERROR: kmm_malloc() failed, enable DEBUG_MM for more info!\n"); return -ENOMEM; } diff --git a/drivers/mmcsd/mmcsd_sdio.c b/drivers/mmcsd/mmcsd_sdio.c index de280e3bb23..ec65bf87c9b 100644 --- a/drivers/mmcsd/mmcsd_sdio.c +++ b/drivers/mmcsd/mmcsd_sdio.c @@ -1490,7 +1490,7 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv, FAR uint8_t *buffer, off_t startblock, size_t nblocks) { - size_t nbytes; + size_t nbytes = nblocks << priv->blockshift; off_t offset; int ret; @@ -1515,7 +1515,7 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv, if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0) { - ret = SDIO_DMAPREFLIGHT(priv->dev, buffer, priv->blocksize); + ret = SDIO_DMAPREFLIGHT(priv->dev, buffer, nbytes); if (ret != OK) { @@ -1543,7 +1543,6 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv, * offset */ - nbytes = nblocks << priv->blockshift; if (IS_BLOCK(priv->type)) { offset = startblock; @@ -1808,8 +1807,8 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv, FAR const uint8_t *buffer, off_t startblock, size_t nblocks) { + size_t nbytes = nblocks << priv->blockshift; off_t offset; - size_t nbytes; int ret; int evret = OK; @@ -1836,7 +1835,7 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv, if ((priv->caps & SDIO_CAPS_DMASUPPORTED) != 0) { - ret = SDIO_DMAPREFLIGHT(priv->dev, buffer, priv->blocksize); + ret = SDIO_DMAPREFLIGHT(priv->dev, buffer, nbytes); if (ret != OK) { @@ -1864,7 +1863,6 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv, * offset */ - nbytes = nblocks << priv->blockshift; if (IS_BLOCK(priv->type)) { offset = startblock; diff --git a/drivers/mmcsd/mmcsd_spi.c b/drivers/mmcsd/mmcsd_spi.c index 2b9e0cdd5ff..666cd15a793 100644 --- a/drivers/mmcsd/mmcsd_spi.c +++ b/drivers/mmcsd/mmcsd_spi.c @@ -1297,7 +1297,7 @@ static ssize_t mmcsd_read(FAR struct inode *inode, unsigned char *buffer, SPI_SEND(spi, 0xff); mmcsd_semgive(slot); - finfo("Read %d bytes:\n", nbytes); + finfo("Read %zu bytes:\n", nbytes); mmcsd_dumpbuffer("Read buffer", buffer, nbytes); return nsectors; diff --git a/drivers/modem/Make.defs b/drivers/modem/Make.defs index b6d6bd77058..43ce01c85a8 100644 --- a/drivers/modem/Make.defs +++ b/drivers/modem/Make.defs @@ -1,35 +1,20 @@ ############################################################################ # drivers/modem/Make.defs # -# Copyright (C) 2016 Vladimir Komendantskiy. All rights reserved. -# Author: Vladimir Komendantskiy +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http:#www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/drivers/motor/foc/Kconfig b/drivers/motor/foc/Kconfig index 75bb91eb221..b231f6a3063 100644 --- a/drivers/motor/foc/Kconfig +++ b/drivers/motor/foc/Kconfig @@ -20,7 +20,7 @@ config MOTOR_FOC_SHUNTS default 3 ---help--- Number of shunts supported (or other types of current sensors). - Any current recontruction must be done on the lower-half side. + Any current reconstruction must be done on the lower-half side. config MOTOR_FOC_TRACE bool "FOC trace support" diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 986f740ac56..bbbbb5bbc1f 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -194,6 +194,7 @@ comment "MTD Device Drivers" menuconfig MTD_NAND bool "MTD NAND support" + depends on ALLOW_BSD_COMPONENTS default n ---help--- Enable support for NAND FLASH devices. diff --git a/drivers/mtd/hamming.c b/drivers/mtd/hamming.c index b4268ee9cfd..7146523824a 100644 --- a/drivers/mtd/hamming.c +++ b/drivers/mtd/hamming.c @@ -1,13 +1,6 @@ /**************************************************************************** * drivers/mtd/hamming.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was taken directly from Atmel sample code with only - * modifications for better integration with NuttX. The Atmel sample - * code has a BSD compatible license that requires this copyright notice: - * * Copyright (c) 2011, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/drivers/mtd/is25xp.c b/drivers/mtd/is25xp.c index 8f36fcc99c8..bca60118e44 100644 --- a/drivers/mtd/is25xp.c +++ b/drivers/mtd/is25xp.c @@ -1,41 +1,20 @@ /**************************************************************************** * drivers/mtd/is25xp.c - * Driver for SPI-based IS25LPxx parts 32MBit and larger. * - * Copyright (C) 2016 Marten Svanfeldt. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2009-2011, 2013, 2017 Gregory Nutt. All rights reserved. - * Author: Ken Pettit + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copied from / based on m25px.c and sst25.c drivers written by - * Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/mtd/m25px.c b/drivers/mtd/m25px.c index 6b3e1989786..f551b15abe5 100644 --- a/drivers/mtd/m25px.c +++ b/drivers/mtd/m25px.c @@ -98,6 +98,7 @@ #define M25P_M25P64_CAPACITY 0x17 /* 64 M-bit */ #define M25P_M25P128_CAPACITY 0x18 /* 128 M-bit */ #define M25P_MT25Q128_CAPACITY 0x18 /* 128 M-bit */ +#define M25P_MT25Q1G_CAPACITY 0x21 /* 1 G-bit */ /* M25P1 capacity is 131,072 bytes: * (4 sectors) * (32,768 bytes per sector) @@ -174,6 +175,17 @@ #define M25P_MT25Q128_NPAGES 65536 #define M25P_MT25Q128_SUBSECT_SHIFT 12 /* Sub-Sector size 1 << 12 = 4,096 */ +/* MT25Q1G capacity is 134,217,728 bytes: + * (2048 sectors) * (65,536 bytes per sector) + * (524288 pages) * (256 bytes per page) + */ + +#define M25P_MT25Q1G_SECTOR_SHIFT 16 /* Sector size 1 << 16 = 65,536 */ +#define M25P_MT25Q1G_NSECTORS 2048 +#define M25P_MT25Q1G_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */ +#define M25P_MT25Q1G_NPAGES 524288 +#define M25P_MT25Q1G_SUBSECT_SHIFT 12 /* Sub-Sector size 1 << 12 = 4,096 */ + /* Instructions */ /* Command Value N Description Addr Dummy Data */ @@ -459,6 +471,19 @@ static inline int m25p_readid(struct m25p_dev_s *priv) priv->npages = M25P_MT25Q128_NPAGES; #ifdef CONFIG_M25P_SUBSECTOR_ERASE priv->subsectorshift = M25P_MT25Q128_SUBSECT_SHIFT; +#endif + return OK; + } + else if (capacity == M25P_MT25Q1G_CAPACITY) + { + /* Save the FLASH geometry */ + + priv->sectorshift = M25P_MT25Q1G_SECTOR_SHIFT; + priv->nsectors = M25P_MT25Q1G_NSECTORS; + priv->pageshift = M25P_MT25Q1G_PAGE_SHIFT; + priv->npages = M25P_MT25Q1G_NPAGES; +#ifdef CONFIG_M25P_SUBSECTOR_ERASE + priv->subsectorshift = M25P_MT25Q1G_SUBSECT_SHIFT; #endif return OK; } diff --git a/drivers/mtd/mtd_modeltab.c b/drivers/mtd/mtd_modeltab.c index 9ee73a1bc54..1ae7d0d059e 100644 --- a/drivers/mtd/mtd_modeltab.c +++ b/drivers/mtd/mtd_modeltab.c @@ -1,13 +1,6 @@ /**************************************************************************** * drivers/mtd/mtd_modeltab.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/drivers/mtd/mtd_nand.c b/drivers/mtd/mtd_nand.c index 1a8fc9dd512..ebff0fc10cb 100644 --- a/drivers/mtd/mtd_nand.c +++ b/drivers/mtd/mtd_nand.c @@ -1,13 +1,6 @@ /**************************************************************************** * drivers/mtd/mtd_nand.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2011, 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/drivers/mtd/mtd_nandecc.c b/drivers/mtd/mtd_nandecc.c index 3001a6b35f3..987616fa3a2 100644 --- a/drivers/mtd/mtd_nandecc.c +++ b/drivers/mtd/mtd_nandecc.c @@ -1,13 +1,6 @@ /**************************************************************************** * drivers/mtd/mtd_nandecc.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2011, 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/drivers/mtd/mtd_nandmodel.c b/drivers/mtd/mtd_nandmodel.c index 55656620c48..304e603c49d 100644 --- a/drivers/mtd/mtd_nandmodel.c +++ b/drivers/mtd/mtd_nandmodel.c @@ -1,13 +1,6 @@ /**************************************************************************** * drivers/mtd/mtd_nandmodel.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2011, 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/drivers/mtd/mtd_nandscheme.c b/drivers/mtd/mtd_nandscheme.c index 1f3b42cc53c..34e0586ec90 100644 --- a/drivers/mtd/mtd_nandscheme.c +++ b/drivers/mtd/mtd_nandscheme.c @@ -1,13 +1,6 @@ /**************************************************************************** * drivers/mtd/mtd_nandscheme.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/drivers/mtd/mtd_onfi.c b/drivers/mtd/mtd_onfi.c index cd36d58becb..159eee1fa28 100644 --- a/drivers/mtd/mtd_onfi.c +++ b/drivers/mtd/mtd_onfi.c @@ -1,18 +1,6 @@ /**************************************************************************** * drivers/mtd/mtd_onfi.c * - * ONFI Support. The Open NAND Flash Interface (ONFI) is an industry - * Workgroup made up of more than 100 companies that build, design-in, or - * enable NAND Flash memory. This file provides definitions for standardized - * ONFI NAND interfaces. - * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This ONFI logic was based largely on Atmel sample code with modifications - * for better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2010, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/drivers/mtd/mtd_partition.c b/drivers/mtd/mtd_partition.c index 4e63455a483..182064d1fa1 100644 --- a/drivers/mtd/mtd_partition.c +++ b/drivers/mtd/mtd_partition.c @@ -596,7 +596,7 @@ static ssize_t part_procfs_read(FAR struct file *filep, FAR char *buffer, MTDIOC_GEOMETRY, (unsigned long)((uintptr_t)&geo)); if (ret < 0) { - ferr("ERROR: mtd->ioctl failed: %d\n", ret); + ferr("ERROR: mtd->ioctl failed: %zd\n", ret); return 0; } @@ -632,16 +632,17 @@ static ssize_t part_procfs_read(FAR struct file *filep, FAR char *buffer, /* Terminate the partition name and add to output buffer */ - ret = snprintf(&buffer[total], buflen - total, "%s%7ju %ju %s\n", - partname, - (uintmax_t)attr->nextpart->firstblock / blkpererase, - (uintmax_t)attr->nextpart->neraseblocks, - attr->nextpart->parent->name); + ret = snprintf(&buffer[total], buflen - total, + "%s%7ju %7ju %s\n", + partname, + (uintmax_t)attr->nextpart->firstblock / blkpererase, + (uintmax_t)attr->nextpart->neraseblocks, + attr->nextpart->parent->name); #else ret = snprintf(&buffer[total], buflen - total, "%7ju %7ju %s\n", - (uintmax_t)attr->nextpart->firstblock / blkpererase, - (uintmax_t)attr->nextpart->neraseblocks, - attr->nextpart->parent->name); + (uintmax_t)attr->nextpart->firstblock / blkpererase, + (uintmax_t)attr->nextpart->neraseblocks, + attr->nextpart->parent->name); #endif if (ret + total < buflen) diff --git a/drivers/mtd/mx25lx.c b/drivers/mtd/mx25lx.c index d23229d200d..12b0bfb21c7 100644 --- a/drivers/mtd/mx25lx.c +++ b/drivers/mtd/mx25lx.c @@ -1,40 +1,20 @@ /**************************************************************************** * drivers/mtd/mx25lx.c - * Driver for SPI-based or QSPI-based MX25Lxx33L parts of 32 or 64MBit. * - * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved. - * Author: Aleksandr Vyhovanec + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copied from / based on sst25.c and w25.c drivers written by - * Gregory Nutt - * Ken Pettit + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/mtd/ramtron.c b/drivers/mtd/ramtron.c index c119a9f586c..df282ab43da 100644 --- a/drivers/mtd/ramtron.c +++ b/drivers/mtd/ramtron.c @@ -892,6 +892,8 @@ static ssize_t ramtron_read(FAR struct mtd_dev_s *dev, * enable state */ + SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false); + SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true); SPI_SEND(priv->dev, RAMTRON_RDSR); status = SPI_SEND(priv->dev, RAMTRON_DUMMY); if ((status & ~RAMTRON_SR_SRWD) == 0) diff --git a/drivers/mtd/smart.c b/drivers/mtd/smart.c index f1bfb4c72c9..5a414232b3c 100644 --- a/drivers/mtd/smart.c +++ b/drivers/mtd/smart.c @@ -856,7 +856,8 @@ static ssize_t smart_reload(struct smart_struct_s *dev, FAR uint8_t *buffer, /* Read the full erase block into the buffer */ - finfo("Read %d blocks starting at block %d\n", mtdblocks, mtdstartblock); + finfo("Read %zu blocks starting at block %zu\n", + mtdblocks, mtdstartblock); nread = MTD_BREAD(dev->mtd, mtdstartblock, mtdblocks, buffer); if (nread != mtdblocks) { @@ -1408,7 +1409,7 @@ static ssize_t smart_bytewrite(FAR struct smart_struct_s *dev, size_t offset, (FAR uint8_t *)dev->rwbuffer); if (ret < 0) { - ferr("ERROR: Error %d reading from device\n", -ret); + ferr("ERROR: Error %zd reading from device\n", -ret); goto errout; } @@ -1423,7 +1424,7 @@ static ssize_t smart_bytewrite(FAR struct smart_struct_s *dev, size_t offset, (FAR uint8_t *) dev->rwbuffer); if (ret < 0) { - ferr("ERROR: Error %d writing to device\n", -ret); + ferr("ERROR: Error %zd writing to device\n", -ret); goto errout; } } @@ -1937,7 +1938,7 @@ static int smart_scan(FAR struct smart_struct_s *dev) char devname[22]; FAR struct smart_multiroot_device_s *rootdirdev; #endif - static const short sizetbl[8] = + static const uint16_t sizetbl[8] = { CONFIG_MTD_SMART_SECTOR_SIZE, 512, 1024, 4096, 2048, 8192, 16384, 32768 @@ -3213,7 +3214,7 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, { /* The block is not empty!! What to do? */ - ferr("ERROR: Write block 0 failed: %d.\n", wrcount); + ferr("ERROR: Write block 0 failed: %zu.\n", wrcount); /* Unlock the mutex if we add one */ @@ -4560,7 +4561,7 @@ static int smart_writesector(FAR struct smart_struct_s *dev, /* Subtract dev->minwearlevel from all wear levels */ offset = dev->minwearlevel; - finfo("Reducing wear level bits by %d\n", offset); + finfo("Reducing wear level bits by %zu\n", offset); for (x = 0; x < dev->geo.neraseblocks; x++) { diff --git a/drivers/net/encx24j600.c b/drivers/net/encx24j600.c index ef29f4173a1..703dedce11b 100644 --- a/drivers/net/encx24j600.c +++ b/drivers/net/encx24j600.c @@ -1,48 +1,28 @@ /**************************************************************************** * drivers/net/encx24j600.c * - * Copyright (C) 2017-2018 Gregory Nutt. All rights reserved. - * Copyright (C) 2013-2014 UVC Ingenieure. All rights reserved. - * Author: Max Holtzberg + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * References: - * - ENC424J600/624J600 Data Sheet, Stand-Alone 10/100 Ethernet Controller - * with SPI or Parallel Interface, DS39935C, 2010 Microchip Technology Inc. + * http://www.apache.org/licenses/LICENSE-2.0 * - * Derived from enc28j60 driver written by: - * - * Copyright (C) 2010-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ +/* References: + * - ENC424J600/624J600 Data Sheet, Stand-Alone 10/100 Ethernet Controller + * with SPI or Parallel Interface, DS39935C, 2010 Microchip Technology Inc. + */ + /**************************************************************************** * Included Files ****************************************************************************/ diff --git a/drivers/net/encx24j600.h b/drivers/net/encx24j600.h index a765ee7d565..a3b719bbd1f 100644 --- a/drivers/net/encx24j600.h +++ b/drivers/net/encx24j600.h @@ -1,42 +1,28 @@ /**************************************************************************** * drivers/net/encx24j600.h * - * Copyright (C) 2013 UVC Ingenieure. All rights reserved. - * Author: Max Holtberg + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * References: - * - ENC424J600/624J600 Data Sheet, Stand-Alone 10/100 Ethernet Controller - * with SPI or Parallel Interface, DS39935C, 2010 Microchip Technology Inc. + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ +/* References: + * - ENC424J600/624J600 Data Sheet, Stand-Alone 10/100 Ethernet Controller + * with SPI or Parallel Interface, DS39935C, 2010 Microchip Technology Inc. + */ + #ifndef __DRIVERS_NET_ENCX24J600_H #define __DRIVERS_NET_ENCX24J600_H diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c index de169ca28a7..e255a2d6763 100644 --- a/drivers/net/ftmac100.c +++ b/drivers/net/ftmac100.c @@ -1,36 +1,20 @@ /**************************************************************************** * drivers/net/ftmac100.c - * Faraday FTMAC100 Ethernet MAC Driver * - * Copyright (C) 2015 Anton D. Kachalov. All rights reserved. - * Author: Anton D. Kachalov + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -199,7 +183,7 @@ static uint8_t g_pktbuf[MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE]; /* Driver state structure. */ static struct ftmac100_driver_s g_ftmac100[CONFIG_FTMAC100_NINTERFACES] - __attribute__((aligned(16))); + aligned_data(16); /**************************************************************************** * Private Function Prototypes diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index fa60ef1b706..8a187497f66 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -383,6 +383,51 @@ config SC8551 ---help--- The SC8551 are battery charger for lithium-ion batteries. +config AXP202 + bool "AXP202 Battery charger support" + default n + select I2C + depends on BATTERY_CHARGER + ---help--- + axp202 are battery charger for lithium-ion batteries. + +config AXP202_DC2_VOLTAGE + int "AXP202 DC2 output voltage" + default 0 + depends on AXP202 + ---help--- + AXP202 DC2 output voltage. 0 is disable, enable range: [700, 2275] mV. + +config AXP202_DC3_VOLTAGE + int "AXP202 DC3 output voltage" + default 3300 + depends on AXP202 + ---help--- + AXP202 DC3 output voltage. 0 is disable, enable range: [700, 3500] mV. + +config AXP202_LDO2_VOLTAGE + int "AXP202 LDO2 output voltage" + default 0 + depends on AXP202 + ---help--- + AXP202 LDO2 output voltage. 0 is disable, enable range: [1800, 3300] mV. + +config AXP202_LDO3_VOLTAGE + int "AXP202 LDO3 output voltage" + default 0 + depends on AXP202 + ---help--- + Enable LDO3 output voltage. 0 is disable, enable range: [700, 2275] mV. + +config AXP202_LDO4_VOLTAGE + int "AXP202 LDO4 output voltage" + default 0 + depends on AXP202 + ---help--- + Enable LDO4 output voltage. 0 is disable, other value: + 1250 1300 1400 1500 1600 1700 1800 1900 + 2000 2500 2700 2800 3000 3100 3200 3300 mV. + config MCP73871 bool "Microchip MCP73871 Battery charger support" default n @@ -482,6 +527,10 @@ config I2C_SC8551 bool default y if SC8551 +config I2C_AXP202 + bool + default y if AXP202 + config I2C_MAX1704X bool default y if MAX1704X diff --git a/drivers/power/Make.defs b/drivers/power/Make.defs index 57b3383bcb1..2affdda91d3 100644 --- a/drivers/power/Make.defs +++ b/drivers/power/Make.defs @@ -109,6 +109,12 @@ ifeq ($(CONFIG_I2C_BQ25618),y) CSRCS += bq25618.c endif +# Add the axp202 I2C-based battery charger driver + +ifeq ($(CONFIG_I2C_AXP202),y) +CSRCS += axp202.c +endif + endif # Include power support in the build diff --git a/drivers/power/axp202.c b/drivers/power/axp202.c new file mode 100644 index 00000000000..eec8a536045 --- /dev/null +++ b/drivers/power/axp202.c @@ -0,0 +1,719 @@ +/**************************************************************************** + * drivers/power/axp202.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_I2C) && defined(CONFIG_I2C_AXP202) + +/**************************************************************************** + * Private type + ****************************************************************************/ + +struct axp202_dev_s +{ + /* The common part of the battery driver visible to the upper-half driver */ + + FAR const struct battery_charger_operations_s *ops; /* Battery operations */ + sem_t batsem; /* Enforce mutually exclusive access */ + + /* Data fields specific to the lower half axp202 driver follow */ + + FAR struct i2c_master_s *i2c; /* I2C interface */ + uint8_t addr; /* I2C address */ + uint32_t frequency; /* I2C frequency */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* I2C support */ + +static int axp202_getreg8(FAR struct axp202_dev_s *priv, uint8_t regaddr, + FAR uint8_t *regval); +static int axp202_putreg8(FAR struct axp202_dev_s *priv, uint8_t regaddr, + uint8_t regval); + +/* Battery driver lower half methods */ + +static int axp202_state(FAR struct battery_charger_dev_s *dev, + FAR int * status); +static int axp202_health(FAR struct battery_charger_dev_s *dev, + FAR int * health); +static int axp202_online(FAR struct battery_charger_dev_s *dev, + FAR bool * status); +static int axp202_voltage(FAR struct battery_charger_dev_s *dev, int value); +static int axp202_current(FAR struct battery_charger_dev_s *dev, int value); +static int axp202_input_current(FAR struct battery_charger_dev_s *dev, + int value); +static int axp202_operate(FAR struct battery_charger_dev_s *dev, + uintptr_t param); + +static int axp202_set_ldo2_valtage(FAR struct axp202_dev_s *dev, + int voltage); +static int axp202_set_ldo3_valtage(FAR struct axp202_dev_s *dev, + int voltage); +static int axp202_set_ldo4_valtage(FAR struct axp202_dev_s *dev, + int voltage); +static int axp202_set_dc2_valtage(FAR struct axp202_dev_s *dev, + int voltage); +static int axp202_set_dc2_valtage(FAR struct axp202_dev_s *dev, + int voltage); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct battery_charger_operations_s g_axp202ops = +{ + axp202_state, + axp202_health, + axp202_online, + axp202_voltage, + axp202_current, + axp202_input_current, + axp202_operate +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static int axp202_getreg8(FAR struct axp202_dev_s *priv, uint8_t regaddr, + FAR uint8_t *regval) +{ + struct i2c_config_s config; + int ret; + + /* Sanity check */ + + DEBUGASSERT(priv != NULL); + DEBUGASSERT(regval != NULL); + + /* Set up the I2C configuration */ + + config.frequency = priv->frequency; + config.address = priv->addr; + config.addrlen = 7; + + /* Write the register address */ + + ret = i2c_write(priv->i2c, &config, ®addr, sizeof(regaddr)); + if (ret < 0) + { + snerr("ERROR: i2c_write failed: %d\n", ret); + return ret; + } + + /* Restart and read 8 bits from the register */ + + ret = i2c_read(priv->i2c, &config, regval, sizeof(*regval)); + if (ret < 0) + { + snerr("ERROR: i2c_read failed: %d\n", ret); + return ret; + } + + sninfo("addr: %02x value: %02x\n", regaddr, *regval); + + return OK; +} + +static int axp202_putreg8(FAR struct axp202_dev_s *priv, uint8_t regaddr, + uint8_t regval) +{ + struct i2c_config_s config; + uint8_t buffer[2]; + int ret; + + /* Sanity check */ + + DEBUGASSERT(priv != NULL); + + /* Set up a 2-byte message to send */ + + buffer[0] = regaddr; + buffer[1] = regval; + + /* Set up the I2C configuration */ + + config.frequency = priv->frequency; + config.address = priv->addr; + config.addrlen = 7; + + /* Write the register address followed by the data (no RESTART) */ + + ret = i2c_write(priv->i2c, &config, buffer, sizeof(buffer)); + if (ret < 0) + { + snerr("ERROR: i2c_write failed: %d\n", ret); + return ret; + } + + sninfo("addr: %02x value: %02x\n", regaddr, regval); + + return OK; +} + +static int axp202_state(struct battery_charger_dev_s *dev, int *status) +{ + FAR struct axp202_dev_s *priv = (FAR struct axp202_dev_s *)dev; + uint8_t val = 0; + int ret = 0; + + /* Only a few of the possible battery states are supported by this driver: + * + * BATTERY_UNKNOWN - Returned on error conditions + * BATTERY_IDLE - This is what will usually be reported + * BATTERY_FULL - This will be reported if the SoC is greater than 95% + * BATTERY_CHARGING and BATTERY_DISCHARGING - I don't think this hardware + * knows anything about current (charging or dischargin). + * + */ + + ret = axp202_getreg8(priv, AXP202_MODE_CHGSTATUS, &val); + + if (ret != OK) + { + *status = BATTERY_UNKNOWN; + return ret; + } + + if (val & (1 << 6)) + { + *status = BATTERY_CHARGING; + } + else + { + *status = BATTERY_DISCHARGING; + } + + return OK; +} + +/**************************************************************************** + * Name: axp202_health + * + * Description: + * Return the current battery health state + * + * Note: if more than one fault happened the user needs to call this ioctl + * again to read a new fault, repeat until receive a BATTERY_HEALTH_GOOD. + * + ****************************************************************************/ + +static int axp202_health(FAR struct battery_charger_dev_s *dev, + FAR int * health) +{ + FAR struct axp202_dev_s *priv = (FAR struct axp202_dev_s *)dev; + uint8_t val = 0; + int ret = 0; + + /* Only a few of the possible states are supported by this driver: + * BATTERY_HEALTH_UNKNOWN - health state is not known + * BATTERY_HEALTH_GOOD - is in good condiction + * BATTERY_HEALTH_DEAD - is dead, nothing we can do + * BATTERY_HEALTH_OVERHEAT - is over recommended temperature + * BATTERY_HEALTH_OVERVOLTAGE - voltage is over recommended level + * BATTERY_HEALTH_UNSPEC_FAIL - charger reported an unspected failure + * BATTERY_HEALTH_COLD - is under recommended temperature + * BATTERY_HEALTH_WD_TMR_EXP - WatchDog Timer Expired + * BATTERY_HEALTH_SAFE_TMR_EXP - Safety Timer Expired + * BATTERY_HEALTH_DISCONNECTED - is not connected + */ + + ret = axp202_getreg8(priv, AXP202_MODE_CHGSTATUS, &val); + if (ret < 0) + { + *health = BATTERY_HEALTH_UNKNOWN; + return ret; + } + + if (val & (1 << 7)) + { + *health = BATTERY_HEALTH_OVERHEAT; + } + else if (!(val & (1 << 5))) + { + *health = BATTERY_HEALTH_DISCONNECTED; + } + else + { + *health = BATTERY_HEALTH_GOOD; + } + + return OK; +} + +/**************************************************************************** + * Name: axp202_online + * + * Description: + * Return true if the batter is online + * + ****************************************************************************/ + +static int axp202_online(struct battery_charger_dev_s *dev, bool *status) +{ + FAR struct axp202_dev_s *priv = (FAR struct axp202_dev_s *)dev; + uint8_t val = 0; + int ret = 0; + + ret = axp202_getreg8(priv, AXP202_MODE_CHGSTATUS, &val); + + if (ret != OK) + { + return ret; + } + + if (val & (1 << 5)) + { + *status = true; + } + else + { + *status = false; + } + + return OK; +} + +/**************************************************************************** + * Name: axp202_voltage + * + * Description: + * Set battery charger voltage + * + ****************************************************************************/ + +static int axp202_voltage(FAR struct battery_charger_dev_s *dev, int value) +{ + FAR struct axp202_dev_s *priv = (FAR struct axp202_dev_s *)dev; + int ret; + uint8_t reg = 0; + + /* Set voltage to battery charger */ + + ret = axp202_getreg8(priv, AXP202_CHARGE1, ®); + + if (ret != OK) + { + return ret; + } + + reg &= ~(3 << 5); + + switch (value) + { + case 4100: + reg |= (0 << 5); + break; + + case 4150: + reg |= (1 << 5); + break; + + case 4200: + reg |= (2 << 5); + break; + + case 4360: + reg |= (3 << 5); + break; + + default: + return -EINVAL; + } + + ret = axp202_putreg8(priv, AXP202_CHARGE1, reg); + if (ret != OK) + { + return ret; + } + + return OK; +} + +/**************************************************************************** + * Name: axp202_current + * + * Description: + * Set the battery charger current rate for charging + * + ****************************************************************************/ + +static int axp202_current(FAR struct battery_charger_dev_s *dev, int value) +{ + FAR struct axp202_dev_s *priv = (FAR struct axp202_dev_s *)dev; + int ret; + uint8_t reg = 0; + + /* Set current to battery charger */ + + ret = axp202_getreg8(priv, AXP202_CHARGE1, ®); + + if (ret != OK) + { + return ret; + } + + /** + * Charge current setting + * Icharge= [300+(Bit3-0)*100] mA + */ + + value = (value - 300) / 100; + value &= 0x0f; + + reg &= 0xf0; + reg |= value; + + ret = axp202_putreg8(priv, AXP202_CHARGE1, reg); + if (ret != OK) + { + return ret; + } + + return OK; +} + +/**************************************************************************** + * Name: axp202_input_current + * + * Description: + * Set the power-supply input current limit + * + ****************************************************************************/ + +static int axp202_input_current(FAR struct battery_charger_dev_s *dev, + int value) +{ + FAR struct axp202_dev_s *priv = (FAR struct axp202_dev_s *)dev; + int ret; + uint8_t reg = 0; + + ret = axp202_getreg8(priv, AXP202_IPS_SET, ®); + + if (ret != OK) + { + return ret; + } + + reg &= ~(3 << 0); + + switch (value) + { + case BATTERY_INPUT_CURRENT_EXT_LIM: + reg |= (3 << 0); + break; + + case 900: + reg |= (0 << 0); + break; + + case 500: + reg |= (1 << 0); + break; + + case 100: + reg |= (2 << 0); + break; + + default: + return -EINVAL; + } + + ret = axp202_putreg8(priv, AXP202_IPS_SET, reg); + if (ret != OK) + { + return ret; + } + + return OK; +} + +/**************************************************************************** + * Name: axp202_operate + * + * Description: + * Do miscellaneous battery ioctl() + * + ****************************************************************************/ + +static int axp202_operate(FAR struct battery_charger_dev_s *dev, + uintptr_t param) +{ + return -ENOSYS; +} + +static int axp202_set_ldo2_valtage(FAR struct axp202_dev_s *priv, + int voltage) +{ + uint8_t reg = 0; + + axp202_getreg8(priv, AXP202_LDO234_DC23_CTL, ®); + + if (voltage == 0) + { + reg &= ~(1 << 2); + } + else + { + reg |= (1 << 2); + } + + axp202_putreg8(priv, AXP202_LDO234_DC23_CTL, reg); + + if (voltage != 0) + { + axp202_getreg8(priv, AXP202_LDO24OUT_VOL, ®); + reg &= ~(0xf << 4); + reg |= ((((voltage - 1800) / 100) & 0x0f) << 4); + axp202_putreg8(priv, AXP202_LDO24OUT_VOL, reg); + } + + return OK; +} + +static int axp202_set_ldo3_valtage(FAR struct axp202_dev_s *priv, + int voltage) +{ + uint8_t reg = 0; + + axp202_getreg8(priv, AXP202_LDO234_DC23_CTL, ®); + + if (voltage == 0) + { + reg &= ~(1 << 6); + } + else + { + reg |= (1 << 6); + } + + axp202_putreg8(priv, AXP202_LDO234_DC23_CTL, reg); + + if (voltage != 0) + { + axp202_getreg8(priv, AXP202_LDO3OUT_VOL, ®); + reg &= ~(0xf << 4); + reg |= ((((voltage - 700) / 25) & 0x7f) << 0); + axp202_putreg8(priv, AXP202_LDO3OUT_VOL, reg); + } + + return OK; +} + +static int axp202_set_ldo4_valtage(FAR struct axp202_dev_s *priv, + int voltage) +{ + uint8_t reg = 0; + + axp202_getreg8(priv, AXP202_LDO234_DC23_CTL, ®); + + if (voltage == 0) + { + reg &= ~(1 << 3); + } + else + { + reg |= (1 << 3); + } + + axp202_putreg8(priv, AXP202_LDO234_DC23_CTL, reg); + + if (voltage != 0) + { + axp202_getreg8(priv, AXP202_LDO24OUT_VOL, ®); + reg &= ~(0xf << 0); + + switch (voltage) + { + case 1250: + reg |= 0; break; + case 1300: + reg |= 1; break; + case 1400: + reg |= 2; break; + case 1500: + reg |= 3; break; + case 1600: + reg |= 4; break; + case 1700: + reg |= 5; break; + case 1800: + reg |= 6; break; + case 1900: + reg |= 7; break; + case 2000: + reg |= 8; break; + case 2500: + reg |= 9; break; + case 2700: + reg |= 10; break; + case 2800: + reg |= 11; break; + case 3000: + reg |= 12; break; + case 3100: + reg |= 13; break; + case 3200: + reg |= 14; break; + case 3300: + reg |= 15; break; + default: + break; + } + + axp202_putreg8(priv, AXP202_LDO24OUT_VOL, reg); + } + + return OK; +} + +static int axp202_set_dc2_valtage(FAR struct axp202_dev_s *priv, + int voltage) +{ + uint8_t reg = 0; + + axp202_getreg8(priv, AXP202_LDO234_DC23_CTL, ®); + + if (voltage == 0) + { + reg &= ~(1 << 4); + } + else + { + reg |= (1 << 4); + } + + axp202_putreg8(priv, AXP202_LDO234_DC23_CTL, reg); + + if (voltage != 0) + { + axp202_getreg8(priv, AXP202_DC2OUT_VOL, ®); + reg &= ~(0xf << 4); + reg |= ((((voltage - 700) / 25) & 0x3f) << 0); + axp202_putreg8(priv, AXP202_DC2OUT_VOL, reg); + } + + return OK; +} + +static int axp202_set_dc3_valtage(FAR struct axp202_dev_s *priv, + int voltage) +{ + uint8_t reg = 0; + + axp202_getreg8(priv, AXP202_LDO234_DC23_CTL, ®); + + if (voltage == 0) + { + reg &= ~(1 << 1); + } + else + { + reg |= (1 << 1); + } + + axp202_putreg8(priv, AXP202_LDO234_DC23_CTL, reg); + + if (voltage != 0) + { + axp202_getreg8(priv, AXP202_DC3OUT_VOL, ®); + reg &= ~(0xf << 4); + reg |= ((((voltage - 700) / 25) & 0x7f) << 0); + axp202_putreg8(priv, AXP202_DC3OUT_VOL, reg); + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +FAR struct battery_charger_dev_s * +axp202_initialize(FAR struct i2c_master_s *i2c, uint8_t addr, + uint32_t frequency) +{ + FAR struct axp202_dev_s *priv; + uint8_t chipid = 0; + + /* Initialize the axp202 device structure */ + + priv = (FAR struct axp202_dev_s *)kmm_zalloc(sizeof(struct axp202_dev_s)); + + if (priv) + { + /* Initialize the axp202 device structure */ + + priv->ops = &g_axp202ops; + priv->i2c = i2c; + priv->addr = addr; + priv->frequency = frequency; + } + + axp202_getreg8(priv, AXP202_IC_TYPE, &chipid); + + if (AXP202_CHIP_ID != chipid) + { + kmm_free(priv); + return NULL; + } + + /* Initialize ldo2 output voltage */ + + axp202_set_ldo2_valtage(priv, CONFIG_AXP202_LDO2_VOLTAGE); + + /* Initialize ldo3 output voltage */ + + axp202_set_ldo3_valtage(priv, CONFIG_AXP202_LDO3_VOLTAGE); + + /* Initialize ldo4 output voltage */ + + axp202_set_ldo4_valtage(priv, CONFIG_AXP202_LDO4_VOLTAGE); + + /* Initialize dc2 output voltage */ + + axp202_set_dc2_valtage(priv, CONFIG_AXP202_DC2_VOLTAGE); + + /* Initialize dc3 output voltage */ + + axp202_set_dc3_valtage(priv, CONFIG_AXP202_DC3_VOLTAGE); + + return (FAR struct battery_charger_dev_s *)priv; +} + +#endif /* CONFIG_I2C && CONFIG_I2C_AXP202 */ diff --git a/drivers/rf/Make.defs b/drivers/rf/Make.defs index 430e64535dd..090254bb233 100644 --- a/drivers/rf/Make.defs +++ b/drivers/rf/Make.defs @@ -1,36 +1,20 @@ ############################################################################ # drivers/rf/Make.defs # -# Copyright (C) 2011-2012, 2015-2018 Gregory Nutt. All rights reserved. -# Copyright (C) 2019 Augusto Fraga Giachero. All rights reserved. -# Author: Augusto Fraga Giachero +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/drivers/rptun/rptun.c b/drivers/rptun/rptun.c index 91f93a314fb..31b90ffcaa3 100644 --- a/drivers/rptun/rptun.c +++ b/drivers/rptun/rptun.c @@ -116,6 +116,7 @@ static int rptun_dev_stop(FAR struct remoteproc *rproc); static int rptun_dev_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +#ifdef CONFIG_RPTUN_LOADER static int rptun_store_open(FAR void *store_, FAR const char *path, FAR const void **img_data); static void rptun_store_close(FAR void *store_); @@ -124,6 +125,7 @@ static int rptun_store_load(FAR void *store_, size_t offset, metal_phys_addr_t pa, FAR struct metal_io_region *io, char is_blocking); +#endif static metal_phys_addr_t rptun_pa_to_da(FAR struct rptun_dev_s *dev, metal_phys_addr_t pa); @@ -150,6 +152,7 @@ static const struct file_operations g_rptun_devops = .ioctl = rptun_dev_ioctl, }; +#ifdef CONFIG_RPTUN_LOADER static struct image_store_ops g_rptun_storeops = { .open = rptun_store_open, @@ -157,6 +160,7 @@ static struct image_store_ops g_rptun_storeops = .load = rptun_store_load, .features = SUPPORT_SEEK, }; +#endif static sem_t g_rptun_sem = SEM_INITIALIZER(1); @@ -598,6 +602,7 @@ static int rptun_dev_ioctl(FAR struct file *filep, int cmd, return ret; } +#ifdef CONFIG_RPTUN_LOADER static int rptun_store_open(FAR void *store_, FAR const char *path, FAR const void **img_data) @@ -664,6 +669,7 @@ static int rptun_store_load(FAR void *store_, size_t offset, file_seek(&store->file, offset, SEEK_SET); return file_read(&store->file, tmp, size); } +#endif static metal_phys_addr_t rptun_pa_to_da(FAR struct rptun_dev_s *dev, metal_phys_addr_t pa) diff --git a/drivers/sensors/Kconfig b/drivers/sensors/Kconfig index e780f2f3c7a..8e36751d61e 100644 --- a/drivers/sensors/Kconfig +++ b/drivers/sensors/Kconfig @@ -528,6 +528,13 @@ config SENSORS_LSM9DS1 ---help--- Enable driver support for the STMicro LSM9DS1. +config SENSORS_MSA301 + bool "MSA301 support" + default n + select I2C + ---help--- + Enable driver support for the MSA301. + config LSM9DS1_I2C_FREQUENCY int "LSM9DS1 I2C frequency" default 400000 @@ -1060,6 +1067,10 @@ config SENSORS_QENCODER bool "Qencoder" default n +config SENSORS_HALL3PHASE + bool "3-phase Hall effect sensor" + default n + config SENSORS_VEML6070 bool "Vishay VEML6070 UV-A Light Sensor support" default n diff --git a/drivers/sensors/Make.defs b/drivers/sensors/Make.defs index 1672e96bf09..c145aa864ed 100644 --- a/drivers/sensors/Make.defs +++ b/drivers/sensors/Make.defs @@ -108,6 +108,10 @@ ifeq ($(CONFIG_SENSORS_LSM9DS1),y) CSRCS += lsm9ds1.c endif +ifeq ($(CONFIG_SENSORS_MSA301),y) + CSRCS += msa301.c +endif + ifeq ($(CONFIG_SENSORS_LPS25H),y) CSRCS += lps25h.c endif @@ -308,6 +312,12 @@ ifeq ($(CONFIG_SENSORS_QENCODER),y) CSRCS += qencoder.c endif +# 3-phase Hall effect sensor upper half + +ifeq ($(CONFIG_SENSORS_HALL3PHASE),y) + CSRCS += hall3ph.c +endif + # Vishay VEML6070 ifeq ($(CONFIG_SENSORS_VEML6070),y) diff --git a/drivers/sensors/adt7320.c b/drivers/sensors/adt7320.c index 33b94afe71b..924c09f4a52 100644 --- a/drivers/sensors/adt7320.c +++ b/drivers/sensors/adt7320.c @@ -1,38 +1,20 @@ /**************************************************************************** * drivers/sensors/adt7320.c - * Character driver for the Analog Devices adt7320 Temperature Sensor * - * Copyright (C) 2019, Augusto Fraga Giachero. All rights reserved. - * Copyright (C) 2011, 2013, 2016 Gregory Nutt. All rights reserved. - * Based on the LM-75 driver - * Author: Augusto Fraga Giachero + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/sensors/bmp280.c b/drivers/sensors/bmp280.c index db8c11cfaec..bb4400755d1 100644 --- a/drivers/sensors/bmp280.c +++ b/drivers/sensors/bmp280.c @@ -506,7 +506,9 @@ static uint32_t bmp280_compensate_press(FAR struct bmp280_dev_s *priv, static int bmp280_set_interval(FAR struct sensor_lowerhalf_s *lower, FAR unsigned int *period_us) { - FAR struct bmp280_dev_s *priv = (FAR struct bmp280_dev_s *)lower->priv; + FAR struct bmp280_dev_s *priv = container_of(lower, + FAR struct bmp280_dev_s, + sensor_lower); int ret = 0; uint8_t regval; @@ -653,7 +655,7 @@ static int bmp280_fetch(FAR struct sensor_lowerhalf_s *lower, memcpy(buffer, &baro_data, sizeof(baro_data)); - return ret; + return buflen; } /**************************************************************************** diff --git a/drivers/sensors/fakesensor.c b/drivers/sensors/fakesensor.c index fc96dc91525..fa3e564c3ce 100644 --- a/drivers/sensors/fakesensor.c +++ b/drivers/sensors/fakesensor.c @@ -417,3 +417,4 @@ int fakesensor_init(int type, FAR const char *file_name, return OK; } + diff --git a/drivers/sensors/hall3ph.c b/drivers/sensors/hall3ph.c new file mode 100644 index 00000000000..52cc973ba17 --- /dev/null +++ b/drivers/sensors/hall3ph.c @@ -0,0 +1,356 @@ +/**************************************************************************** + * drivers/sensors/hall3ph.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +/**************************************************************************** + * Private Type Definitions + ****************************************************************************/ + +/* This structure describes the state of the upper half driver */ + +struct hall3_upperhalf_s +{ + uint8_t crefs; + sem_t exclsem; + FAR struct hall3_lowerhalf_s *lower; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static int hall3_open(FAR struct file *filep); +static int hall3_close(FAR struct file *filep); +static ssize_t hall3_read(FAR struct file *filep, FAR char *buffer, + size_t buflen); +static ssize_t hall3_write(FAR struct file *filep, FAR const char *buffer, + size_t buflen); +static int hall3_ioctl(FAR struct file *filep, int cmd, unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_hall3ops = +{ + hall3_open, /* open */ + hall3_close, /* close */ + hall3_read, /* read */ + hall3_write, /* write */ + NULL , /* seek */ + hall3_ioctl, /* ioctl */ + NULL /* poll */ +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: hall3_open + * + * Description: + * This function is called whenever the hall device is opened. + * + ****************************************************************************/ + +static int hall3_open(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct hall3_upperhalf_s *upper = inode->i_private; + uint8_t tmp; + int ret; + + sninfo("crefs: %d\n", upper->crefs); + + /* Get exclusive access to the device structures */ + + ret = nxsem_wait(&upper->exclsem); + if (ret < 0) + { + goto errout; + } + + /* Increment the count of references to the device. If this is the first + * time that the driver has been opened for this device, then initialize + * the device. + */ + + tmp = upper->crefs + 1; + if (tmp == 0) + { + /* More than 255 opens; uint8_t overflows to zero */ + + ret = -EMFILE; + goto errout_with_sem; + } + + /* Check if this is the first time that the driver has been opened. */ + + if (tmp == 1) + { + FAR struct hall3_lowerhalf_s *lower = upper->lower; + + /* Yes.. perform one time hardware initialization. */ + + DEBUGASSERT(lower->ops->setup != NULL); + sninfo("calling setup\n"); + + ret = lower->ops->setup(lower); + if (ret < 0) + { + goto errout_with_sem; + } + } + + /* Save the new open count on success */ + + upper->crefs = tmp; + ret = OK; + +errout_with_sem: + nxsem_post(&upper->exclsem); + +errout: + return ret; +} + +/**************************************************************************** + * Name: hall3_close + * + * Description: + * This function is called when the hall device is closed. + * + ****************************************************************************/ + +static int hall3_close(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct hall3_upperhalf_s *upper = inode->i_private; + int ret; + + sninfo("crefs: %d\n", upper->crefs); + + /* Get exclusive access to the device structures */ + + ret = nxsem_wait(&upper->exclsem); + if (ret < 0) + { + goto errout; + } + + /* Decrement the references to the driver. If the reference count will + * decrement to 0, then uninitialize the driver. + */ + + if (upper->crefs > 1) + { + upper->crefs--; + } + else + { + FAR struct hall3_lowerhalf_s *lower = upper->lower; + + /* There are no more references to the port */ + + upper->crefs = 0; + + /* Disable the hall device */ + + DEBUGASSERT(lower->ops->shutdown != NULL); + sninfo("calling shutdown\n"); + + lower->ops->shutdown(lower); + } + + nxsem_post(&upper->exclsem); + ret = OK; + +errout: + return ret; +} + +/**************************************************************************** + * Name: hall3_read + * + * Description: + * A dummy read method. This is provided only to satisfy the VFS layer. + * + ****************************************************************************/ + +static ssize_t hall3_read(FAR struct file *filep, + FAR char *buffer, + size_t buflen) +{ + /* Return zero -- usually meaning end-of-file */ + + return 0; +} + +/**************************************************************************** + * Name: hall3_write + * + * Description: + * A dummy write method. This is provided only to satisfy the VFS layer. + * + ****************************************************************************/ + +static ssize_t hall3_write(FAR struct file *filep, + FAR const char *buffer, + size_t buflen) +{ + /* Return a failure */ + + return -EPERM; +} + +/**************************************************************************** + * Name: hall3_ioctl + * + * Description: + * The standard ioctl method. + * This is where ALL of the hall work is done. + * + ****************************************************************************/ + +static int hall3_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct hall3_upperhalf_s *upper; + FAR struct hall3_lowerhalf_s *lower; + int ret; + + sninfo("cmd: %d arg: %ld\n", cmd, arg); + upper = inode->i_private; + DEBUGASSERT(upper != NULL); + lower = upper->lower; + DEBUGASSERT(lower != NULL); + + /* Get exclusive access to the device structures */ + + ret = nxsem_wait(&upper->exclsem); + if (ret < 0) + { + return ret; + } + + /* Handle built-in ioctl commands */ + + switch (cmd) + { + /* SNIOC_GET_POSITION - Get the current position from the Hall sensor. + * Argument: uint8_t pointer to the location to return the position. + */ + + case SNIOC_GET_POSITION: + { + FAR uint8_t *ptr = (FAR uint8_t *)((uintptr_t)arg); + DEBUGASSERT(lower->ops->position != NULL && ptr); + ret = lower->ops->position(lower, ptr); + } + break; + + default: + { + ret = -ENOTTY; + } + break; + } + + nxsem_post(&upper->exclsem); + return ret; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: hall3_register + * + * Description: + * Register the 3-phase Hall effect sensor lower half device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/hall0" + * lower - An instance of the lower half interface + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. The following + * possible error values may be returned (most are returned by + * register_driver()): + * + * EINVAL - 'path' is invalid for this operation + * EEXIST - An inode already exists at 'path' + * ENOMEM - Failed to allocate in-memory resources for the operation + * + ****************************************************************************/ + +int hall3_register(FAR const char *devpath, + FAR struct hall3_lowerhalf_s *lower) +{ + FAR struct hall3_upperhalf_s *upper = NULL; + + /* Allocate the upper-half data structure */ + + upper = (FAR struct hall3_upperhalf_s *) + kmm_zalloc(sizeof(struct hall3_upperhalf_s)); + if (upper == NULL) + { + snerr("ERROR: Allocation failed\n"); + return -ENOMEM; + } + + /* Initialize the hall 3-phase sensor device structure + * (it was already zeroed by kmm_zalloc()) + */ + + nxsem_init(&upper->exclsem, 0, 1); + upper->lower = lower; + + /* Register the Hall effect sensor device */ + + sninfo("Registering %s\n", devpath); + return register_driver(devpath, &g_hall3ops, 0666, upper); +} diff --git a/drivers/sensors/ina3221.c b/drivers/sensors/ina3221.c index 47ab2846b27..4fde7c36289 100644 --- a/drivers/sensors/ina3221.c +++ b/drivers/sensors/ina3221.c @@ -1,42 +1,20 @@ /**************************************************************************** * drivers/sensors/ina3221.c - * Character driver for the INA3221 Power Sensor * - * Copyright (C) 2018 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Adapted from: - * drivers/sensors/ina219.c + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (C) 2017 Sebastien Lorquet. All rights reserved. - * Author: Sebastien Lorquet - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/sensors/kxtj9.c b/drivers/sensors/kxtj9.c index 90d4c372e4d..7b5a8fb10a1 100644 --- a/drivers/sensors/kxtj9.c +++ b/drivers/sensors/kxtj9.c @@ -1,40 +1,20 @@ /**************************************************************************** * drivers/sensors/kxtj9.c * - * Copyright (C) 2016-2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * This driver derives from the Motorola Moto Z MDK: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2016 Motorola Mobility, LLC. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/sensors/mpu60x0.c b/drivers/sensors/mpu60x0.c index fb7f13aab60..5ecf6c760b7 100644 --- a/drivers/sensors/mpu60x0.c +++ b/drivers/sensors/mpu60x0.c @@ -1,38 +1,20 @@ /**************************************************************************** * drivers/sensors/mpu60x0.c * - * Support for the Invensense MPU6000 and MPU6050 MotionTracking(tm) - * 6-axis accelerometer and gyroscope. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Author: Bill Gatliff + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright+ - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/sensors/msa301.c b/drivers/sensors/msa301.c new file mode 100644 index 00000000000..af9b7f0799e --- /dev/null +++ b/drivers/sensors/msa301.c @@ -0,0 +1,750 @@ +/**************************************************************************** + * drivers/sensors/msa301.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_I2C) && defined(CONFIG_SENSORS_MSA301) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct msa301_dev_s +{ + FAR struct i2c_master_s * i2c; /* I2C interface */ + uint8_t addr; /* I2C address */ + msa301_range_t range; + FAR const struct msa301_ops_s *ops; + sem_t exclsem; + struct msa301_sensor_data_s sensor_data; /* Sensor data container */ +}; + +struct msa301_ops_s +{ + CODE int (*config)(FAR struct msa301_dev_s *priv); + CODE int (*start)(FAR struct msa301_dev_s *priv); + CODE int (*stop)(FAR struct msa301_dev_s *priv); + CODE int (*sensor_read)(FAR struct msa301_dev_s *priv); +}; + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +# ifndef CONFIG_MSA301_I2C_FREQUENCY +# define CONFIG_MSA301_I2C_FREQUENCY 400000 +# endif + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* I2C Helpers */ + +static int msa301_readreg8(FAR struct msa301_dev_s *priv, + uint8_t regaddr, FAR uint8_t *regval); +static int msa301_writereg8(FAR struct msa301_dev_s *priv, + uint8_t regaddr, uint8_t regval); +static int msa301_readreg(FAR struct msa301_dev_s *priv, + uint8_t regaddr, FAR uint8_t *regval, uint8_t len); + +/* Accelerometer Operations */ + +static int msa301_sensor_config(FAR struct msa301_dev_s *priv); +static int msa301_sensor_start(FAR struct msa301_dev_s *priv); +static int msa301_sensor_stop(FAR struct msa301_dev_s *priv); +static int msa301_sensor_read(FAR struct msa301_dev_s *priv); + +/* Character Driver Methods */ + +static int msa301_open(FAR struct file *filep); +static int msa301_close(FAR struct file *filep); +static ssize_t msa301_read(FAR struct file *filep, + FAR char *buffer, size_t buflen); +static ssize_t msa301_write(FAR struct file *filep, + FAR const char *buffer, size_t buflen); +static int msa301_ioctl(FAR struct file *filep, int cmd, + unsigned long arg); + +/* Common Register Function */ + +static int msa301_register(FAR const char * devpath, + FAR struct i2c_master_s * i2c, + uint8_t addr, + FAR const struct msa301_ops_s *ops); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_fops = +{ + msa301_open, + msa301_close, + msa301_read, + msa301_write, + NULL, + msa301_ioctl, + NULL +# ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , + NULL +# endif +}; + +static const struct msa301_ops_s g_msa301_sensor_ops = +{ + msa301_sensor_config, + msa301_sensor_start, + msa301_sensor_stop, + msa301_sensor_read, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static int msa301_readreg(FAR struct msa301_dev_s *priv, + uint8_t regaddr, FAR uint8_t *regval, uint8_t len) +{ + struct i2c_config_s config; + int ret; + + /* Sanity check */ + + DEBUGASSERT(priv != NULL); + DEBUGASSERT(regval != NULL); + + /* Set up the I2C configuration */ + + config.frequency = CONFIG_MSA301_I2C_FREQUENCY; + config.address = priv->addr; + config.addrlen = 7; + + /* Write the register address */ + + ret = i2c_write(priv->i2c, &config, ®addr, sizeof(regaddr)); + if (ret < 0) + { + snerr("ERROR: i2c_write failed: %d\n", ret); + return ret; + } + + /* Restart and read 8 bits from the register */ + + ret = i2c_read(priv->i2c, &config, regval, len); + if (ret < 0) + { + snerr("ERROR: i2c_read failed: %d\n", ret); + return ret; + } + + return OK; +} + +/**************************************************************************** + * Name: msa301_readreg8 + * + * Description: + * Read from an 8-bit register. + * + ****************************************************************************/ + +static int msa301_readreg8(FAR struct msa301_dev_s *priv, + uint8_t regaddr, FAR uint8_t *regval) +{ + struct i2c_config_s config; + int ret; + + /* Sanity check */ + + DEBUGASSERT(priv != NULL); + DEBUGASSERT(regval != NULL); + + /* Set up the I2C configuration */ + + config.frequency = CONFIG_MSA301_I2C_FREQUENCY; + config.address = priv->addr; + config.addrlen = 7; + + /* Write the register address */ + + ret = i2c_write(priv->i2c, &config, ®addr, sizeof(regaddr)); + if (ret < 0) + { + snerr("ERROR: i2c_write failed: %d\n", ret); + return ret; + } + + /* Restart and read 8 bits from the register */ + + ret = i2c_read(priv->i2c, &config, regval, sizeof(*regval)); + if (ret < 0) + { + snerr("ERROR: i2c_read failed: %d\n", ret); + return ret; + } + + sninfo("addr: %02x value: %02x\n", regaddr, *regval); + + return OK; +} + +/**************************************************************************** + * Name: msa301_writereg8 + * + * Description: + * Write to an 8-bit register. + * + ****************************************************************************/ + +static int msa301_writereg8(FAR struct msa301_dev_s *priv, + uint8_t regaddr, uint8_t regval) +{ + struct i2c_config_s config; + uint8_t buffer[2]; + int ret; + + /* Sanity check */ + + DEBUGASSERT(priv != NULL); + + /* Set up a 2-byte message to send */ + + buffer[0] = regaddr; + buffer[1] = regval; + + /* Set up the I2C configuration */ + + config.frequency = CONFIG_MSA301_I2C_FREQUENCY; + config.address = priv->addr; + config.addrlen = 7; + + /* Write the register address followed by the data (no RESTART) */ + + ret = i2c_write(priv->i2c, &config, buffer, sizeof(buffer)); + if (ret < 0) + { + snerr("ERROR: i2c_write failed: %d\n", ret); + return ret; + } + + sninfo("addr: %02x value: %02x\n", regaddr, regval); + + return OK; +} + +static int msa301_set_range(FAR struct msa301_dev_s *priv, + msa301_range_t range) +{ + uint8_t ctl; + + if (range > MSA301_RANGE_16_G) + { + return -1; + } + + msa301_readreg8(priv, MSA301_REG_RESRANGE, &ctl); + ctl &= ~(MSA301_CTL_RANGE_MASK); + ctl |= (range << MSA301_CTL_RANGE_SHIFT); + msa301_writereg8(priv, MSA301_REG_RESRANGE, ctl); + + priv->range = range; + + return OK; +} + +static int msa301_set_rate(FAR struct msa301_dev_s *priv, msa301_rate_t rate) +{ + uint8_t ctl; + + msa301_readreg8(priv, MSA301_REG_ODR, &ctl); + ctl &= ~(MSA301_CTL_RATE_MASK); + ctl |= (rate << MSA301_CTL_RATE_SHIFT); + msa301_writereg8(priv, MSA301_REG_ODR, ctl); + + return OK; +} + +static int msa301_set_powermode(FAR struct msa301_dev_s *priv, + msa301_powermode_t mode) +{ + uint8_t ctl; + + msa301_readreg8(priv, MSA301_REG_POWERMODE, &ctl); + ctl &= ~(MSA301_CTL_POWERMODE_MASK); + ctl |= (mode << MSA301_CTL_POWERMODE_SHIFT); + msa301_writereg8(priv, MSA301_REG_POWERMODE, ctl); + + return OK; +} + +static int msa301_set_resolution(FAR struct msa301_dev_s *priv, + msa301_resolution_t resolution) +{ + uint8_t ctl; + + msa301_readreg8(priv, MSA301_REG_RESRANGE, &ctl); + ctl &= ~(MSA301_CTL_RESOLUTION_MASK); + ctl |= (resolution << MSA301_CTL_RESOLUTION_SHIFT); + msa301_writereg8(priv, MSA301_REG_RESRANGE, ctl); + + return OK; +} + +static int msa301_set_axis(FAR struct msa301_dev_s *priv, uint8_t enable) +{ + uint8_t ctl; + + msa301_readreg8(priv, MSA301_REG_ODR, &ctl); + ctl &= ~(MSA301_CTL_AXIS_MASK); + if (enable) + { + ctl |= (MSA301_ENABLE_AXIS << MSA301_CTL_AXIS_SHIFT); + } + else + { + ctl |= (MSA301_DISABLE_AXIS << MSA301_CTL_AXIS_SHIFT); + } + + msa301_writereg8(priv, MSA301_REG_ODR, ctl); + + return OK; +} + +static int msa301_sensor_config(FAR struct msa301_dev_s *priv) +{ + /* Sanity check */ + + DEBUGASSERT(priv != NULL); + + msa301_set_resolution(priv, MSA301_RESOLUTION_14); + msa301_set_rate(priv, MSA301_RATE_500_HZ); + msa301_set_range(priv, MSA301_RANGE_4_G); + msa301_set_powermode(priv, MSA301_SUSPENDMODE); + + return OK; +} + +/**************************************************************************** + * Name: msa301_sensor_start + * + * Description: + * Start the accelerometer. + * + ****************************************************************************/ + +static int msa301_sensor_start(FAR struct msa301_dev_s *priv) +{ + /* Sanity check */ + + DEBUGASSERT(priv != NULL); + + /* Power normal */ + + msa301_set_powermode(priv, MSA301_NORMALMODE); + + /* Enable the accelerometer */ + + msa301_set_axis(priv, 1); + + up_mdelay(5); + + sninfo("Starting...."); + + return OK; +} + +/**************************************************************************** + * Name: msa301_sensor_stop + * + * Description: + * Stop the accelerometer. + * + ****************************************************************************/ + +static int msa301_sensor_stop(FAR struct msa301_dev_s *priv) +{ + /* Sanity check */ + + DEBUGASSERT(priv != NULL); + + /* Disable the accelerometer */ + + msa301_set_axis(priv, 0); + + /* Power suspend */ + + msa301_set_powermode(priv, MSA301_SUSPENDMODE); + + sninfo("Stoping...."); + + return OK; +} + +/**************************************************************************** + * Name: msa301_sensor_read + * + * Description: + * Read the sensor. + * A sensor in a steady state on a horizontal surface will + * measure 0 g on both the X-axis and Y-axis, whereas the Z-axis will + * measure 1 g. The X- and Y-axis have an offset + * of 40 mg/LSB + * + ****************************************************************************/ + +static int msa301_sensor_read(FAR struct msa301_dev_s *priv) +{ + uint8_t xyz_value[6]; + float scale = 1; + + DEBUGASSERT(priv != NULL); + + if (msa301_readreg(priv, MSA301_REG_OUT_X_L, xyz_value, 6) < 0) + { + return -EIO; + } + + priv->sensor_data.x_data = xyz_value[1] << 8 | xyz_value[0]; + priv->sensor_data.y_data = xyz_value[3] << 8 | xyz_value[2]; + priv->sensor_data.z_data = xyz_value[5] << 8 | xyz_value[4]; + + /* 14 bit resolution */ + + priv->sensor_data.x_data >>= 2; + priv->sensor_data.y_data >>= 2; + priv->sensor_data.z_data >>= 2; + + if (priv->range == MSA301_RANGE_2_G) + { + scale = 4096; + } + else if (priv->range == MSA301_RANGE_4_G) + { + scale = 2048; + } + else if (priv->range == MSA301_RANGE_8_G) + { + scale = 1024; + } + else if (priv->range == MSA301_RANGE_16_G) + { + scale = 512; + } + + priv->sensor_data.x_acc = (float)priv->sensor_data.x_data / scale; + priv->sensor_data.y_acc = (float)priv->sensor_data.y_data / scale; + priv->sensor_data.z_acc = (float)priv->sensor_data.z_data / scale; + + return OK; +} + +/**************************************************************************** + * Name: msa301_open + * + * Description: + * This method is called when the device is opened. + * + ****************************************************************************/ + +static int msa301_open(FAR struct file *filep) +{ + FAR struct inode * inode; + FAR struct msa301_dev_s *priv; + + DEBUGASSERT(filep != NULL); + inode = filep->f_inode; + + DEBUGASSERT(inode != NULL); + priv = (FAR struct msa301_dev_s *)inode->i_private; + + DEBUGASSERT(priv != NULL); + + nxsem_wait(&priv->exclsem); + + priv->ops->start(priv); + + return OK; +} + +/**************************************************************************** + * Name: msa301_close + * + * Description: + * This method is called when the device is closed. + * + ****************************************************************************/ + +static int msa301_close(FAR struct file *filep) +{ + FAR struct inode * inode; + FAR struct msa301_dev_s *priv; + + DEBUGASSERT(filep != NULL); + inode = filep->f_inode; + + DEBUGASSERT(inode != NULL); + priv = (FAR struct msa301_dev_s *)inode->i_private; + + DEBUGASSERT(priv != NULL); + + priv->ops->stop(priv); + + nxsem_post(&priv->exclsem); + + return OK; +} + +/**************************************************************************** + * Name: msa301_read + * + * Description: + * The standard read method. + * + ****************************************************************************/ + +static ssize_t msa301_read(FAR struct file *filep, + FAR char *buffer, size_t buflen) +{ + FAR struct inode * inode; + FAR struct msa301_dev_s *priv; + int datalen = sizeof(struct msa301_sensor_data_s); + + /* Sanity check */ + + DEBUGASSERT(filep != NULL); + inode = filep->f_inode; + + DEBUGASSERT(inode != NULL); + priv = (FAR struct msa301_dev_s *)inode->i_private; + + DEBUGASSERT(priv != NULL); + DEBUGASSERT(buffer != NULL); + + if (buflen < sizeof(struct msa301_sensor_data_s)) + { + return -ENOMEM; + } + + if (priv->ops->sensor_read(priv) < 0) + { + return -EIO; + } + + memcpy(buffer, &priv->sensor_data, datalen); + + return datalen; +} + +/**************************************************************************** + * Name: msa301_write + * + * Description: + * A dummy write method. + * + ****************************************************************************/ + +static ssize_t msa301_write(FAR struct file *filep, + FAR const char *buffer, size_t buflen) +{ + return -ENOSYS; +} + +/**************************************************************************** + * Name: msa301_ioctl + * + * Description: + * The standard ioctl method. + * + ****************************************************************************/ + +static int msa301_ioctl(FAR struct file *filep, int cmd, unsigned long arg) +{ + FAR struct inode * inode; + FAR struct msa301_dev_s *priv; + int ret; + + /* Sanity check */ + + DEBUGASSERT(filep != NULL); + inode = filep->f_inode; + + DEBUGASSERT(inode != NULL); + priv = (FAR struct msa301_dev_s *)inode->i_private; + + DEBUGASSERT(priv != NULL); + + /* Handle ioctl commands */ + + switch (cmd) + { + case SNIOC_MSA301_START: + ret = priv->ops->start(priv); + break; + + case SNIOC_MSA301_STOP: + ret = priv->ops->stop(priv); + break; + + case SNIOC_MSA301_SET_RANGE: + ret = msa301_set_range(priv, arg); + break; + + case SNIOC_MSA301_SET_RATE: + ret = msa301_set_rate(priv, arg); + break; + + /* Unrecognized commands */ + + default: + snerr("ERROR: Unrecognized cmd: %d arg: %lu\n", cmd, arg); + ret = -ENOTTY; + break; + } + + return ret; +} + +/**************************************************************************** + * Name: msa301_register + * + * Description: + * Register the msa301 accelerometer, gyroscope device as 'devpath'. + * + * Input Parameters: + * devpath - The full path to the driver to register, e.g. + * "/dev/msa301". + * i2c - An I2C driver instance. + * addr - The I2C address of the msa301 accelerometer, gyroscope or + * magnetometer. + * ops - The device operations structure. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int msa301_register(FAR const char * devpath, + FAR struct i2c_master_s * i2c, + uint8_t addr, + FAR const struct msa301_ops_s *ops) +{ + FAR struct msa301_dev_s *priv; + int ret; + uint8_t id = 0; + + /* Sanity check */ + + DEBUGASSERT(devpath != NULL); + DEBUGASSERT(i2c != NULL); + + /* Initialize the device's structure */ + + priv = (FAR struct msa301_dev_s *)kmm_malloc(sizeof(*priv)); + if (priv == NULL) + { + snerr("ERROR: Failed to allocate instance\n"); + return -ENOMEM; + } + + priv->i2c = i2c; + priv->addr = addr; + priv->ops = ops; + + /* ID check */ + + msa301_readreg8(priv, MSA301_REG_PARTID, &id); + if (id != 0x13) + { + snerr("ERROR: Failed to read msa301 id\n"); + kmm_free(priv); + return -EIO; + } + + /* Configure the device */ + + ret = priv->ops->config(priv); + if (ret < 0) + { + snerr("ERROR: Failed to configure device: %d\n", ret); + kmm_free(priv); + return ret; + } + + nxsem_init(&priv->exclsem, 0, 1); + + /* Register the character driver */ + + ret = register_driver(devpath, &g_fops, 0666, priv); + if (ret < 0) + { + snerr("ERROR: Failed to register driver: %d\n", ret); + nxsem_destroy(&priv->exclsem); + kmm_free(priv); + return ret; + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: msa301_sensor_register + * + * Description: + * Register the msa301 accelerometer character device as 'devpath'. + * + * Input Parameters: + * devpath - The full path to the driver to register, + * e.g. "/dev/msa301". + * i2c - An I2C driver instance. + * addr - The I2C address of the msa301 accelerometer. + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. + * + ****************************************************************************/ + +int msa301_sensor_register(FAR const char * devpath, + FAR struct i2c_master_s *i2c) +{ + return msa301_register(devpath, i2c, + MSA301_ACCEL_ADDR0, &g_msa301_sensor_ops); +} + +#endif /* CONFIG_I2C && CONFIG_SENSORS_MSA301 */ diff --git a/drivers/sensors/qencoder.c b/drivers/sensors/qencoder.c index 1ea96de6e90..56cf10b76a2 100644 --- a/drivers/sensors/qencoder.c +++ b/drivers/sensors/qencoder.c @@ -310,6 +310,24 @@ static int qe_ioctl(FAR struct file *filep, int cmd, unsigned long arg) } break; + /* QEIOC_SETPOSMAX - Set the maximum encoder position. + * Argument: uint32 + */ + + case QEIOC_SETPOSMAX: + { + uint32_t maxpos = (uint32_t)arg; + if (lower->ops->setposmax != NULL) + { + ret = lower->ops->setposmax(lower, maxpos); + } + else + { + ret = -ENOTTY; + } + } + break; + /* Any unrecognized IOCTL commands might be platform-specific ioctl * commands */ diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index eb05823177c..b63ca0ae186 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -176,16 +176,17 @@ config SERIAL_TERMIOS config TTY_FORCE_PANIC bool "Enable TTY force crash" default n + depends on DEBUG_FEATURES ---help--- This is for debugging system busyloop or deadlock, when the shell can't run, then use this force crash the system to see the dumplog. config TTY_FORCE_PANIC_CHAR hex "TTY force crash characters" - default 0x0 + default 0x1F depends on TTY_FORCE_PANIC ---help--- - Use Ctrl-@ NULL(0x0) inputs to determine whether panic system + Use Ctrl-? 0x1F inputs to determine whether panic system config TTY_SIGINT bool "Support SIGINT" diff --git a/drivers/syslog/syslog_channel.c b/drivers/syslog/syslog_channel.c index c05c4ba1df4..54540870111 100644 --- a/drivers/syslog/syslog_channel.c +++ b/drivers/syslog/syslog_channel.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -95,7 +96,9 @@ static struct syslog_channel_s g_rpmsg_channel = #endif #if defined(CONFIG_SYSLOG_DEFAULT) +# if defined(CONFIG_ARCH_LOWPUTC) static sem_t g_syslog_default_sem = SEM_INITIALIZER(1); +# endif static const struct syslog_channel_ops_s g_default_channel_ops = { @@ -158,14 +161,8 @@ static ssize_t syslog_default_write(FAR struct syslog_channel_s *channel, FAR const char *buffer, size_t buflen) { #if defined(CONFIG_ARCH_LOWPUTC) - size_t nwritten; - nxsem_wait(&g_syslog_default_sem); - for (nwritten = 0; nwritten < buflen; nwritten++) - { - up_putc(buffer[nwritten]); - } - + up_puts(buffer); nxsem_post(&g_syslog_default_sem); #endif diff --git a/drivers/syslog/syslog_stream.c b/drivers/syslog/syslog_stream.c index a44bd5b9473..33fd7b60a7e 100644 --- a/drivers/syslog/syslog_stream.c +++ b/drivers/syslog/syslog_stream.c @@ -56,6 +56,11 @@ static int syslogstream_flush(FAR struct lib_syslogstream_s *stream) if (iob != NULL && iob->io_len > 0) { + /* Ensure the buffer is zero terminated */ + + DEBUGASSERT(iob->io_len < CONFIG_IOB_BUFSIZE); + iob->io_data[iob->io_len] = '\0'; + /* Yes write the buffered data */ do @@ -100,7 +105,7 @@ static void syslogstream_addchar(FAR struct lib_syslogstream_s *stream, /* Is the buffer full? */ - if (iob->io_len >= CONFIG_IOB_BUFSIZE) + if (iob->io_len >= CONFIG_IOB_BUFSIZE - 1) { /* Yes.. then flush the buffer */ diff --git a/drivers/timers/Kconfig b/drivers/timers/Kconfig index fc8cb42ebcb..62d2ce1d063 100644 --- a/drivers/timers/Kconfig +++ b/drivers/timers/Kconfig @@ -45,7 +45,7 @@ if PWM_MULTICHAN config PWM_NCHANNELS int "Number of Output Channels Per Timer" default 1 - range 1 6 + range 1 16 ---help--- Specifies the number of output channels per timer. Each timer may support fewer output channels than this value. diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index ee735d954d4..fb3265bca47 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -56,6 +56,87 @@ config VIDEO_STREAM ---help--- Enable video Stream support +if VIDEO_STREAM + +config VIDEO_SCENE_BACKLIGHT + bool "Enable backlight scene" + default y + ---help--- + Enable backlight scene + +config VIDEO_SCENE_BEACHSNOW + bool "Enable beach snow scene" + default y + ---help--- + Enable beach snow scene + +config VIDEO_SCENE_CANDLELIGHT + bool "Enable candle light scene" + default y + ---help--- + Enable candle light scene + +config VIDEO_SCENE_DAWNDUSK + bool "Enable dawn dusk scene" + default y + ---help--- + Enable dawn dusk scene + +config VIDEO_SCENE_FALLCOLORS + bool "Enable fall colors scene" + default y + ---help--- + Enable fall colors scene + +config VIDEO_SCENE_FIREWORKS + bool "Enable fireworks scene" + default y + ---help--- + Enable fireworks scene + +config VIDEO_SCENE_LANDSCAPE + bool "Enable landscape scene" + default y + ---help--- + Enable landscape scene + +config VIDEO_SCENE_NIGHT + bool "Enable night scene" + default y + ---help--- + Enable night scene + +config VIDEO_SCENE_PARTYINDOOR + bool "Enable party and indoor scene" + default y + ---help--- + Enable party and indoor scene + +config VIDEO_SCENE_PORTRAIT + bool "Enable portrait scene" + default y + ---help--- + Enable portrait scene + +config VIDEO_SCENE_SPORTS + bool "Enable sports scene" + default y + ---help--- + Enable sports scene + +config VIDEO_SCENE_SUNSET + bool "Enable sunset scene" + default y + ---help--- + Enable sunset scene + +config VIDEO_SCENE_TEXT + bool "Enable text scene" + default y + ---help--- + Enable text scene +endif + config VIDEO_MAX7456 bool "Maxim 7456 Monochrome OSD" default n @@ -64,9 +145,15 @@ config VIDEO_MAX7456 Support for the Maxim 7456 monochrome on-screen display multiplexer. +config VIDEO_ISX012 + bool "ISX012 Image sensor" + default n + select I2C + config VIDEO_OV2640 bool "OV2640 camera chip" default n + depends on ALLOW_GPL_COMPONENTS select I2C if VIDEO_OV2640 diff --git a/drivers/video/Make.defs b/drivers/video/Make.defs index 545e02af28f..58036805c54 100644 --- a/drivers/video/Make.defs +++ b/drivers/video/Make.defs @@ -34,6 +34,10 @@ endif ifeq ($(CONFIG_I2C),y) +ifeq ($(CONFIG_VIDEO_ISX012),y) + CSRCS += isx012.c +endif + ifeq ($(CONFIG_VIDEO_OV2640),y) CSRCS += ov2640.c endif diff --git a/drivers/video/isx012.c b/drivers/video/isx012.c new file mode 100644 index 00000000000..2d9981384d0 --- /dev/null +++ b/drivers/video/isx012.c @@ -0,0 +1,2899 @@ +/**************************************************************************** + * drivers/video/isx012.c + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include "isx012_reg.h" +#include "isx012_range.h" +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The following macro is enabled because + * it is to make stable startup. (other case) + */ + +/* #define ISX012_NOT_USE_NSTBY */ + +/* The following macro is disabled because it is to see detailed control. */ + +/* #define ISX012_CHECK_IN_DETAIL */ + +/* Skip invalid frame because it occurs first due to the spec of isx012. */ + +#define ISX012_FRAME_SKIP_EN + +#define OUT_HSIZE_QVGA (320) +#define OUT_VSIZE_QVGA (240) +#define OUT_HSIZE_VGA (640) +#define OUT_VSIZE_VGA (480) +#define OUT_HSIZE_HD (1280) +#define OUT_VSIZE_HD (720) +#define OUT_HSIZE_QUADVGA (1280) +#define OUT_VSIZE_QUADVGA (960) +#define OUT_HSIZE_FULLHD (1920) +#define OUT_VSIZE_FULLHD (1080) +#define OUT_HSIZE_3M (2048) +#define OUT_VSIZE_3M (1536) +#define OUT_HSIZE_5M (2560) +#define OUT_VSIZE_5M (1920) + +#define OUT_YUV_VSIZE_MIN (64) +#define OUT_YUV_HSIZE_MIN (96) +#define OUT_JPG_VSIZE_MIN (64) +#define OUT_JPG_HSIZE_MIN (96) +#define OUT_YUV_15FPS_VSIZE_MAX (600) +#define OUT_YUV_15FPS_HSIZE_MAX (800) +#define OUT_YUV_30FPS_VSIZE_MAX (600) +#define OUT_YUV_30FPS_HSIZE_MAX (800) +#define OUT_YUV_60FPS_VSIZE_MAX (480) +#define OUT_YUV_60FPS_HSIZE_MAX (640) +#define OUT_YUV_120FPS_VSIZE_MAX (240) +#define OUT_YUV_120FPS_HSIZE_MAX (320) +#define OUT_JPG_15FPS_VSIZE_MAX (1944) +#define OUT_JPG_15FPS_HSIZE_MAX (2592) +#define OUT_JPG_30FPS_VSIZE_MAX (960) +#define OUT_JPG_30FPS_HSIZE_MAX (1280) +#define OUT_JPG_60FPS_VSIZE_MAX (480) +#define OUT_JPG_60FPS_HSIZE_MAX (640) +#define OUT_JPG_120FPS_VSIZE_MAX (240) +#define OUT_JPG_120FPS_HSIZE_MAX (320) + +#define OUT_YUVINT_30FPS_VSIZE_MAX (240) +#define OUT_YUVINT_30FPS_HSIZE_MAX (400) +#define OUT_JPGINT_30FPS_VSIZE_MAX (960) +#define OUT_JPGINT_30FPS_HSIZE_MAX (1280) +#define OUT_JPGINT_15FPS_VSIZE_MAX (1224) +#define OUT_JPGINT_15FPS_HSIZE_MAX (1632) + +#define VINT_TIMEOUT (400) /* ms */ +#define VINT_WAIT_TIME (5) /* ms */ +#define VINT_DELAY_TIME (0) /* ms */ +#define CAMERA_MODE_TIMEOUT (800) /* ms */ +#define CAMERA_MODE_WAIT_TIME (10) /* ms */ +#define CAMERA_MODE_DELAY_TIME (0) /* ms */ +#define DEVICE_STATE_TIMEOUT (100) /* ms */ +#define DEVICE_STATE_WAIT_TIME (1) /* ms */ +#define DEVICE_STATE_DELAY_TIME (2) /* ms */ + +#define I2CFREQ_STANDARD (100000) /* Standard mode : 100kHz */ +#define I2CFREQ_FAST (400000) /* Fast mode : 400kHz */ + +#define ISX012_SIZE_STEP (2) + +#define CXC_RGB_DATA_UNIT_NUM (27) +#define CXC_RGB_DATA_UNIT_SIZE (7) +#define CXC_GRB_DATA_UNIT_NUM (27) +#define CXC_GRB_DATA_UNIT_SIZE (7) +#define SHD_RGB_DATA_UNIT_NUM (27) +#define SHD_RGB_DATA_UNIT_SIZE (11) +#define SHD_GRB_DATA_UNIT_NUM (27) +#define SHD_GRB_DATA_UNIT_SIZE (11) +#define SHD_R1_DATA_UNIT_NUM (14) +#define SHD_R1_DATA_UNIT_SIZE (11) +#define SHD_R2_DATA_UNIT_NUM (14) +#define SHD_R2_DATA_UNIT_SIZE (11) +#define SHD_B2_DATA_UNIT_NUM (14) +#define SHD_B2_DATA_UNIT_SIZE (11) + +#define ISX012_ELEMS_3APARAM (3) + +#define VALIDATE_VALUE(val, min, max, step) (((val >= min) && \ + (val <= max) && \ + (((val - min) % step) == 0) ? \ + OK : -EINVAL)) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +enum isx012_state_e +{ + STATE_ISX012_PRESLEEP, + STATE_ISX012_SLEEP, + STATE_ISX012_ACTIVE, + STATE_ISX012_POWEROFF, +}; + +typedef enum isx012_state_e isx012_state_t; + +struct isx012_reg_s +{ + uint16_t regaddr; + uint16_t regval; + uint8_t regsize; +}; + +typedef struct isx012_reg_s isx012_reg_t; + +struct isx012_dev_s +{ + FAR struct i2c_master_s *i2c; /* I2C interface */ + uint8_t i2c_addr; /* I2C address */ + int i2c_freq; /* Frequency */ + isx012_state_t state; /* ISX012 status */ + uint8_t mode; /* ISX012 mode */ +}; + +typedef struct isx012_dev_s isx012_dev_t; + +#define ARRAY_NENTRIES(a) (sizeof(a)/sizeof(a[0])) + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* register operations */ + +static uint16_t isx012_getreg(isx012_dev_t *priv, + uint16_t regaddr, uint16_t regsize); +static int isx012_putreg(isx012_dev_t *priv, uint16_t regaddr, + uint16_t regval, uint16_t regsize); +static int isx012_putreglist(isx012_dev_t *priv, + FAR const isx012_reg_t *reglist, size_t nentries); +#ifdef ISX012_CHECK_IN_DETAIL +static int isx012_putregs(isx012_dev_t *priv, uint16_t regaddr, + uint8_t *regvals, uint8_t regsize); +static int isx012_chipid(FAR struct i2c_master_s *i2c); +#endif + +static int isx012_chk_int_state(isx012_dev_t *priv, + uint8_t sts, uint32_t delay_time, + uint32_t wait_time, uint32_t timeout); +static int isx012_set_mode_param(isx012_dev_t *priv, + imgsensor_stream_type_t type, + uint8_t nr_fmt, + imgsensor_format_t *fmt, + imgsensor_interval_t *interval); +static int isx012_change_camera_mode(isx012_dev_t *priv, uint8_t mode); +static int isx012_change_device_state(isx012_dev_t *priv, + isx012_state_t state); +static int isx012_replace_frameinterval_to_regval + (FAR imgsensor_interval_t *interval); +static int8_t isx012_get_maximum_fps + (uint8_t nr_datafmt, + FAR imgsensor_format_t *datafmt); +static int isx012_set_shd(FAR isx012_dev_t *priv); +static bool is_movie_needed(uint8_t fmt, uint8_t fps); + +/* image sensor device operations interface */ + +static int isx012_init(void); +static int isx012_uninit(void); +static int isx012_validate_frame_setting(imgsensor_stream_type_t type, + uint8_t nr_datafmt, + FAR imgsensor_format_t *datafmts, + FAR imgsensor_interval_t *interval); +static int isx012_start_capture(imgsensor_stream_type_t type, + uint8_t nr_datafmt, + FAR imgsensor_format_t *datafmts, + FAR imgsensor_interval_t *interval); +static int isx012_stop_capture(imgsensor_stream_type_t type); +static int isx012_get_supported_value + (uint32_t id, FAR imgsensor_supported_value_t *value); +static int isx012_get_value + (uint32_t id, uint32_t size, FAR imgsensor_value_t *value); +static int isx012_set_value + (uint32_t id, uint32_t size, imgsensor_value_t value); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static isx012_dev_t g_isx012_private; + +#ifndef ISX012_NOT_USE_NSTBY +static const isx012_reg_t g_isx012_presleep[] = +{ + {PLL_CKSEL, 0x00, 0x01}, /* PLL_CKSEL */ + {SRCCK_DIV, 0x00, 0x01}, /* SRCCK_DIV */ + {INCK_SET, 0x17, 0x01}, /* INCK_SET */ +}; +#define ISX012_PRESLEEP_NENTRIES ARRAY_NENTRIES(g_isx012_presleep) +#endif + +static const isx012_reg_t g_isx012_def_init[] = +{ +#ifdef ISX012_NOT_USE_NSTBY + {PLL_CKSEL, 0x00, 0x01}, + {SRCCK_DIV, 0x00, 0x01}, +#endif + {DRIVABILITY, 0xaa, 0x01}, + {VIFCONFIG, 0x0200, 0x02}, + {YUVCONFIG_TN, 0xff0a, 0x02}, + {ILCODELEN, 0x00, 0x01}, + {AFMODE_MONI, 0x01, 0x01}, + {YUVCONFIG, 0xff6a, 0x02}, + {VIF_REC601_Y, 0x10fe, 0x02}, + {VIF_REC601_C, 0x10f0, 0x02}, + {HSENS_MODE_SEL, 0x11, 0x01}, + {VIF_CLKCONFIG1, 0x30, 0x01}, + {VIF_CLKCONFIG2, 0x30, 0x01}, + {VIF_CLKCONFIG3, 0x30, 0x01}, + {VIF_CLKCONFIG4, 0x30, 0x01}, + {VIF_CLKCONFIG5, 0x30, 0x01}, + {VIF_CLKCONFIG6, 0x30, 0x01}, + {VIF_CLKCONFIG7, 0x30, 0x01}, + {VIF_CLKCONFIG8, 0x30, 0x01}, + {VIF_CLKCONFIG9, 0x30, 0x01}, + {VIF_CLKCONFIG10, 0x30, 0x01}, + {VIF_CLKCONFIG11, 0x30, 0x01}, + {VIF_CLKCONFIG12, 0x30, 0x01}, + {VIF_CLKCONFIG13, 0x11, 0x01}, + {VIF_CLKCONFIG14, 0x11, 0x01}, + {VIF_CLKCONFIG15, 0x11, 0x01}, + {VIF_CLKCONFIG16, 0x11, 0x01}, +#ifdef ISX012_NOT_USE_NSTBY + {INCK_SET, 0x17, 0x01}, /* INCK_SET */ +#endif + {FRM_FIX_SN1_2, 0xff, 0x01}, /* Fix framerate */ + {FAST_MODECHG_EN, 0x01, 0x01}, + {FAST_SHT_MODE_SEL, 0x01, 0x01}, + {CAP_HALF_AE_CTRL, 0x07, 0x01}, /* HAFREL=HIGHSPEED, CAP=Auto */ + {HALF_AWB_CTRL, 0x01, 0x01}, + {AESPEED_FAST, 0x0f, 0x01}, + {FASTMOVE_TIMEOUT, 0x2d, 0x01}, + {YGAMMA_MODE, 0x01, 0x01}, + {INT_QLTY2, 0x50, 0x01}, +}; + +#define ISX012_RESET_NENTRIES ARRAY_NENTRIES(g_isx012_def_init) + +static const uint8_t g_isx012_cxc_rgb_data[CXC_RGB_DATA_UNIT_NUM] + [CXC_RGB_DATA_UNIT_SIZE] = +{ + {0x01, 0x43, 0xc0, 0xf0, 0x4f, 0xfc, 0x13}, /* CXC_RGB_UNIT0 */ + {0x80, 0x44, 0x20, 0x21, 0x48, 0x04, 0x0e}, /* CXC_RGB_UNIT1 */ + {0x81, 0x43, 0xc0, 0x10, 0x30, 0xfc, 0x13}, /* CXC_RGB_UNIT2 */ + {0xff, 0x04, 0x20, 0x11, 0x48, 0x08, 0x12}, /* CXC_RGB_UNIT3 */ + {0x81, 0x43, 0xe0, 0x20, 0x48, 0x08, 0x12}, /* CXC_RGB_UNIT4 */ + {0x80, 0x03, 0xe0, 0x00, 0x38, 0x04, 0x10}, /* CXC_RGB_UNIT5 */ + {0x01, 0x84, 0x20, 0x21, 0x48, 0x04, 0x10}, /* CXC_RGB_UNIT6 */ + {0x01, 0x04, 0xc0, 0x10, 0x20, 0x00, 0x08}, /* CXC_RGB_UNIT7 */ + {0x81, 0x82, 0xc0, 0x20, 0x38, 0x08, 0x0e}, /* CXC_RGB_UNIT8 */ + {0x01, 0x43, 0xc0, 0x10, 0x20, 0x04, 0x04}, /* CXC_RGB_UNIT9 */ + {0x01, 0x41, 0x40, 0x10, 0x20, 0x08, 0x0a}, /* CXC_RGB_UNIT10 */ + {0x82, 0x82, 0x80, 0x20, 0x20, 0x04, 0x04}, /* CXC_RGB_UNIT11 */ + {0x82, 0x80, 0x20, 0x20, 0x08, 0x04, 0x06}, /* CXC_RGB_UNIT12 */ + {0x81, 0x42, 0xa0, 0x10, 0x20, 0x04, 0x08}, /* CXC_RGB_UNIT13 */ + {0x81, 0x80, 0x00, 0x00, 0x00, 0x04, 0x00}, /* CXC_RGB_UNIT14 */ + {0x01, 0x41, 0x80, 0x10, 0x20, 0x00, 0x08}, /* CXC_RGB_UNIT15 */ + {0x00, 0x42, 0x20, 0x20, 0x08, 0x08, 0x00}, /* CXC_RGB_UNIT16 */ + {0x82, 0xc0, 0x40, 0x20, 0x20, 0x08, 0x08}, /* CXC_RGB_UNIT17 */ + {0x80, 0x02, 0xa0, 0x10, 0x20, 0x08, 0x04}, /* CXC_RGB_UNIT18 */ + {0x02, 0x81, 0x60, 0x30, 0x20, 0x08, 0x0a}, /* CXC_RGB_UNIT19 */ + {0x82, 0x42, 0xc0, 0x10, 0x30, 0x04, 0x0a}, /* CXC_RGB_UNIT20 */ + {0x03, 0xc3, 0xa0, 0x40, 0x28, 0x0c, 0x0a}, /* CXC_RGB_UNIT21 */ + {0x03, 0xc3, 0xc0, 0x20, 0x20, 0x08, 0x08}, /* CXC_RGB_UNIT22 */ + {0x82, 0xc2, 0xc0, 0x30, 0x40, 0x10, 0x0e}, /* CXC_RGB_UNIT23 */ + {0x84, 0x03, 0xa1, 0x40, 0x28, 0x08, 0x08}, /* CXC_RGB_UNIT24 */ + {0x02, 0x82, 0xa0, 0x30, 0x30, 0x0c, 0x10}, /* CXC_RGB_UNIT25 */ + {0x84, 0x03, 0xe1, 0x40, 0x28, 0x10, 0x0a}, /* CXC_RGB_UNIT26 */ +}; + +static const uint8_t g_isx012_cxc_grb_data[CXC_GRB_DATA_UNIT_NUM] + [CXC_GRB_DATA_UNIT_SIZE] = +{ + {0x00, 0x3d, 0x40, 0x0f, 0xc0, 0x03, 0xf2}, /* CXC_GRB_UNIT0 */ + {0x80, 0x7c, 0x80, 0x1f, 0xd8, 0x03, 0xf0}, /* CXC_GRB_UNIT1 */ + {0x00, 0x3c, 0x40, 0x0f, 0xd0, 0x03, 0xf0}, /* CXC_GRB_UNIT2 */ + {0x80, 0x3c, 0x20, 0x1f, 0xe0, 0x07, 0xf6}, /* CXC_GRB_UNIT3 */ + {0x00, 0x3c, 0x00, 0x1f, 0xd0, 0x07, 0xf4}, /* CXC_GRB_UNIT4 */ + {0x00, 0x3d, 0x40, 0x0f, 0xc8, 0x03, 0xf2}, /* CXC_GRB_UNIT5 */ + {0x80, 0xfc, 0x5f, 0xff, 0xd7, 0x07, 0xf4}, /* CXC_GRB_UNIT6 */ + {0x01, 0x7d, 0x40, 0x0f, 0xd0, 0xff, 0xf3}, /* CXC_GRB_UNIT7 */ + {0x7f, 0xfd, 0x3f, 0x0f, 0xc8, 0x03, 0xf2}, /* CXC_GRB_UNIT8 */ + {0x81, 0x7c, 0x20, 0x0f, 0xd0, 0xff, 0xf7}, /* CXC_GRB_UNIT9 */ + {0x7e, 0xfe, 0x5f, 0x0f, 0xd8, 0x03, 0xf6}, /* CXC_GRB_UNIT10 */ + {0x80, 0xbd, 0xa0, 0x2f, 0xe8, 0x07, 0xfa}, /* CXC_GRB_UNIT11 */ + {0x80, 0xfe, 0xbf, 0x0f, 0xe8, 0xff, 0xf9}, /* CXC_GRB_UNIT12 */ + {0x00, 0x3e, 0x80, 0x3f, 0xe8, 0x0f, 0xfa}, /* CXC_GRB_UNIT13 */ + {0x02, 0x40, 0xe0, 0x0f, 0xf8, 0x03, 0xfe}, /* CXC_GRB_UNIT14 */ + {0x80, 0x7f, 0xe0, 0x1f, 0xf8, 0x17, 0xfe}, /* CXC_GRB_UNIT15 */ + {0x85, 0xff, 0xe0, 0x2f, 0x08, 0x04, 0x04}, /* CXC_GRB_UNIT16 */ + {0x81, 0x40, 0x20, 0x20, 0x00, 0x08, 0x00}, /* CXC_GRB_UNIT17 */ + {0x84, 0x00, 0x21, 0x30, 0x10, 0x0c, 0x06}, /* CXC_GRB_UNIT18 */ + {0x02, 0x82, 0x40, 0x20, 0x10, 0x0c, 0x02}, /* CXC_GRB_UNIT19 */ + {0x83, 0x00, 0x21, 0x40, 0x08, 0x10, 0x06}, /* CXC_GRB_UNIT20 */ + {0x83, 0x82, 0xa0, 0x20, 0x20, 0x08, 0x08}, /* CXC_GRB_UNIT21 */ + {0x02, 0x81, 0x40, 0x30, 0x18, 0x0c, 0x06}, /* CXC_GRB_UNIT22 */ + {0x03, 0x81, 0x80, 0x10, 0x20, 0x04, 0x08}, /* CXC_GRB_UNIT23 */ + {0x82, 0x82, 0x80, 0x20, 0x20, 0x0c, 0x06}, /* CXC_GRB_UNIT24 */ + {0x83, 0xc1, 0x40, 0x20, 0x20, 0x04, 0x08}, /* CXC_GRB_UNIT25 */ + {0x01, 0x82, 0xa0, 0x20, 0x20, 0x08, 0x08}, /* CXC_GRB_UNIT26 */ +}; + +static const uint8_t g_isx012_shd_rgb_data[SHD_RGB_DATA_UNIT_NUM] + [SHD_RGB_DATA_UNIT_SIZE] = +{ + {0xf1, 0x59, 0x52, 0x7b, 0x98, 0xc4, 0x9d, 0x23, 0x29, 0x87, 0x46}, /* SHD_RGB_UNIT0 */ + {0xc6, 0x81, 0xd1, 0x70, 0x56, 0xe4, 0x9c, 0x1b, 0x6d, 0x07, 0x48}, /* SHD_RGB_UNIT1 */ + {0xdd, 0xf1, 0x51, 0x7d, 0xa8, 0xb4, 0x1e, 0x25, 0x49, 0xc7, 0x46}, /* SHD_RGB_UNIT2 */ + {0xbd, 0xf1, 0x50, 0x6d, 0x2a, 0x44, 0x1b, 0x0a, 0x01, 0x87, 0x44}, /* SHD_RGB_UNIT3 */ + {0xd0, 0xa9, 0x51, 0x77, 0x84, 0xd4, 0x9d, 0x1f, 0x2d, 0xc7, 0x44}, /* SHD_RGB_UNIT4 */ + {0xa8, 0xa9, 0xcf, 0x62, 0x98, 0xa3, 0x17, 0xdb, 0xfc, 0x05, 0x38}, /* SHD_RGB_UNIT5 */ + {0x90, 0xe1, 0x8e, 0x6a, 0x08, 0xc4, 0x9b, 0x0e, 0x11, 0x07, 0x43}, /* SHD_RGB_UNIT6 */ + {0xac, 0xa9, 0x4f, 0x5d, 0x4e, 0x13, 0x15, 0xb9, 0xf8, 0x44, 0x2b}, /* SHD_RGB_UNIT7 */ + {0x44, 0x21, 0xcb, 0x56, 0x0e, 0x63, 0x98, 0xe3, 0x78, 0x86, 0x3d}, /* SHD_RGB_UNIT8 */ + {0xab, 0x81, 0x4f, 0x62, 0x7c, 0xc3, 0x94, 0xb4, 0x98, 0x84, 0x26}, /* SHD_RGB_UNIT9 */ + {0x14, 0xe9, 0x48, 0x46, 0x4a, 0x12, 0x93, 0xa4, 0x84, 0xc5, 0x31}, /* SHD_RGB_UNIT10 */ + {0x81, 0xe9, 0x4d, 0x67, 0xac, 0x73, 0x17, 0xd0, 0xdc, 0x24, 0x29}, /* SHD_RGB_UNIT11 */ + {0x12, 0xb9, 0x08, 0x40, 0x02, 0x52, 0x10, 0x84, 0x6c, 0x64, 0x25}, /* SHD_RGB_UNIT12 */ + {0x4c, 0x91, 0xcb, 0x5b, 0x4c, 0xe3, 0x19, 0xec, 0xdc, 0x05, 0x34}, /* SHD_RGB_UNIT13 */ + {0x37, 0x39, 0x8a, 0x44, 0x2a, 0x02, 0x10, 0x80, 0x14, 0xe4, 0x20}, /* SHD_RGB_UNIT14 */ + {0x1c, 0x51, 0x49, 0x53, 0xe4, 0x02, 0x17, 0xd3, 0xb8, 0xe6, 0x3d}, /* SHD_RGB_UNIT15 */ + {0x8b, 0xd9, 0x8d, 0x53, 0xc8, 0x72, 0x12, 0x98, 0x50, 0x24, 0x23}, /* SHD_RGB_UNIT16 */ + {0x19, 0x11, 0x89, 0x4c, 0x8c, 0x32, 0x16, 0xc7, 0x14, 0x06, 0x38}, /* SHD_RGB_UNIT17 */ + {0xca, 0xc1, 0x10, 0x6c, 0xe0, 0x83, 0x97, 0xd0, 0x4c, 0xa5, 0x2d}, /* SHD_RGB_UNIT18 */ + {0x3e, 0x99, 0x0a, 0x51, 0xbc, 0xc2, 0x15, 0xc2, 0x28, 0x26, 0x39}, /* SHD_RGB_UNIT19 */ + {0xa5, 0x89, 0x0f, 0x7b, 0x8c, 0x64, 0x9d, 0x14, 0xb9, 0x46, 0x3e}, /* SHD_RGB_UNIT20 */ + {0x8f, 0x41, 0xce, 0x5e, 0x5e, 0x03, 0x98, 0xdc, 0x50, 0xe6, 0x3a}, /* SHD_RGB_UNIT21 */ + {0xb4, 0x49, 0x90, 0x72, 0x50, 0x74, 0xa1, 0x3a, 0x05, 0x88, 0x4b}, /* SHD_RGB_UNIT22 */ + {0xe1, 0xd1, 0x91, 0x71, 0x38, 0xc4, 0x1b, 0x0a, 0xed, 0x86, 0x42}, /* SHD_RGB_UNIT23 */ + {0xcb, 0x49, 0xd1, 0x78, 0x86, 0x74, 0x9f, 0x2d, 0xb9, 0x88, 0x51}, /* SHD_RGB_UNIT24 */ + {0x11, 0x62, 0x93, 0x7c, 0x9c, 0x94, 0x1d, 0x1b, 0x41, 0x67, 0x46}, /* SHD_RGB_UNIT25 */ + {0xcf, 0x81, 0x91, 0x77, 0x82, 0x54, 0x9f, 0x2a, 0x21, 0xa8, 0x4d}, /* SHD_RGB_UNIT26 */ +}; + +static const uint8_t g_isx012_shd_grb_data[SHD_GRB_DATA_UNIT_NUM] + [SHD_GRB_DATA_UNIT_SIZE] = +{ + {0xe8, 0xa9, 0x0f, 0x78, 0xe4, 0x13, 0x9d, 0xf0, 0x04, 0xe7, 0x39}, /* SHD_GRB_UNIT0 */ + {0xbd, 0x51, 0x0e, 0x6f, 0x94, 0x63, 0x1c, 0xea, 0x4c, 0x27, 0x3c}, /* SHD_GRB_UNIT1 */ + {0xd7, 0x19, 0x4f, 0x7a, 0xf4, 0xd3, 0x1d, 0xf7, 0x20, 0xe7, 0x3a}, /* SHD_GRB_UNIT2 */ + {0xb6, 0x11, 0x0e, 0x6c, 0x76, 0x03, 0x9b, 0xdd, 0xf0, 0x06, 0x39}, /* SHD_GRB_UNIT3 */ + {0xc9, 0xc1, 0x8e, 0x75, 0xc8, 0xe3, 0x9c, 0xef, 0xf8, 0xa6, 0x39}, /* SHD_GRB_UNIT4 */ + {0xa0, 0x69, 0x0d, 0x62, 0x20, 0x93, 0x97, 0xbf, 0xf4, 0xa5, 0x30}, /* SHD_GRB_UNIT5 */ + {0x8c, 0xb1, 0x8c, 0x68, 0x60, 0x13, 0x9b, 0xe0, 0xcc, 0xa6, 0x38}, /* SHD_GRB_UNIT6 */ + {0x9f, 0x71, 0x0d, 0x5c, 0xf4, 0x12, 0x15, 0xab, 0x00, 0x65, 0x28}, /* SHD_GRB_UNIT7 */ + {0x44, 0x41, 0x0a, 0x56, 0xbc, 0x02, 0x98, 0xc4, 0x50, 0x26, 0x34}, /* SHD_GRB_UNIT8 */ + {0x9a, 0x59, 0x4d, 0x5f, 0x16, 0x83, 0x14, 0xa8, 0x9c, 0x64, 0x25}, /* SHD_GRB_UNIT9 */ + {0x15, 0xc1, 0xc8, 0x46, 0x38, 0x22, 0x13, 0x9a, 0x74, 0x65, 0x2c}, /* SHD_GRB_UNIT10 */ + {0x78, 0x11, 0x4c, 0x63, 0x36, 0xb3, 0x96, 0xbb, 0xcc, 0x44, 0x27}, /* SHD_GRB_UNIT11 */ + {0x11, 0xa1, 0x48, 0x40, 0x04, 0x72, 0x10, 0x83, 0x70, 0x84, 0x23}, /* SHD_GRB_UNIT12 */ + {0x4a, 0x69, 0xca, 0x59, 0xe0, 0xf2, 0x98, 0xcc, 0xb0, 0xa5, 0x2e}, /* SHD_GRB_UNIT13 */ + {0x33, 0xc1, 0x09, 0x44, 0x24, 0x02, 0x10, 0x80, 0x14, 0x84, 0x20}, /* SHD_GRB_UNIT14 */ + {0x1b, 0xd1, 0x48, 0x52, 0x98, 0x72, 0x96, 0xb7, 0x8c, 0x06, 0x35}, /* SHD_GRB_UNIT15 */ + {0x81, 0x39, 0xcc, 0x51, 0x96, 0x32, 0x92, 0x92, 0x48, 0x44, 0x22}, /* SHD_GRB_UNIT16 */ + {0x17, 0xb9, 0x48, 0x4b, 0x5e, 0xa2, 0x15, 0xb0, 0xd8, 0x45, 0x30}, /* SHD_GRB_UNIT17 */ + {0xc0, 0x19, 0xce, 0x69, 0x56, 0x23, 0x97, 0xba, 0x38, 0x05, 0x2a}, /* SHD_GRB_UNIT18 */ + {0x3b, 0xe1, 0x09, 0x50, 0x82, 0x42, 0x95, 0xac, 0xf8, 0x05, 0x31}, /* SHD_GRB_UNIT19 */ + {0x94, 0x19, 0x4d, 0x78, 0xca, 0xe3, 0x9c, 0xe8, 0xa8, 0xa6, 0x35}, /* SHD_GRB_UNIT20 */ + {0x8b, 0x71, 0xcc, 0x5d, 0xf8, 0xa2, 0x97, 0xc0, 0x24, 0xa6, 0x32}, /* SHD_GRB_UNIT21 */ + {0xa4, 0xb1, 0x8d, 0x6d, 0x96, 0xd3, 0xa0, 0x09, 0xe1, 0xa7, 0x3f}, /* SHD_GRB_UNIT22 */ + {0xde, 0x09, 0xcf, 0x70, 0x92, 0x73, 0x9b, 0xe0, 0xcc, 0x06, 0x38}, /* SHD_GRB_UNIT23 */ + {0xc0, 0x89, 0x4e, 0x74, 0xcc, 0x13, 0x1e, 0xfc, 0x84, 0x48, 0x45}, /* SHD_GRB_UNIT24 */ + {0x06, 0x7a, 0xd0, 0x7a, 0xe6, 0x33, 0x1d, 0xef, 0x24, 0x07, 0x3b}, /* SHD_GRB_UNIT25 */ + {0xc4, 0xb1, 0x0e, 0x74, 0xca, 0x33, 0x1e, 0xfc, 0xc4, 0x07, 0x41}, /* SHD_GRB_UNIT26 */ +}; + +static const uint8_t g_isx012_shd_r1_data[SHD_R1_DATA_UNIT_NUM] + [SHD_R1_DATA_UNIT_SIZE] = +{ + {0x10, 0x92, 0x10, 0x82, 0xf8, 0x43, 0x1f, 0xfb, 0xf0, 0xe7, 0x40}, /* SHD_R1_UNIT0 */ + {0x07, 0x92, 0xd0, 0x82, 0xec, 0x33, 0x9e, 0xed, 0x68, 0xe7, 0x3c}, /* SHD_R1_UNIT1 */ + {0xfa, 0x21, 0xd0, 0x7e, 0xce, 0xa3, 0x1b, 0xcd, 0x20, 0xe6, 0x31}, /* SHD_R1_UNIT2 */ + {0xa6, 0x69, 0xce, 0x78, 0xbc, 0xa3, 0x1b, 0xbe, 0x44, 0x25, 0x28}, /* SHD_R1_UNIT3 */ + {0x45, 0x19, 0xcb, 0x65, 0x78, 0xe3, 0x1b, 0xc8, 0x3c, 0xa5, 0x24}, /* SHD_R1_UNIT4 */ + {0x15, 0xc1, 0x48, 0x4d, 0xd6, 0x72, 0x99, 0xd3, 0xdc, 0x25, 0x27}, /* SHD_R1_UNIT5 */ + {0x11, 0x01, 0x08, 0x41, 0x42, 0x42, 0x15, 0xc1, 0xa4, 0x06, 0x2f}, /* SHD_R1_UNIT6 */ + {0x39, 0x89, 0x08, 0x40, 0x0a, 0x22, 0x12, 0xab, 0x0c, 0x26, 0x38}, /* SHD_R1_UNIT7 */ + {0x91, 0x71, 0x4a, 0x49, 0x2c, 0xa2, 0x11, 0x9c, 0xc4, 0xa5, 0x33}, /* SHD_R1_UNIT8 */ + {0xe2, 0xe1, 0x4d, 0x5f, 0xa4, 0x22, 0x94, 0xa3, 0xa0, 0x05, 0x34}, /* SHD_R1_UNIT9 */ + {0xc7, 0x41, 0x50, 0x7c, 0x7e, 0xd3, 0x19, 0xc5, 0x48, 0x86, 0x35}, /* SHD_R1_UNIT10 */ + {0xda, 0xa9, 0xcf, 0x8c, 0x42, 0x24, 0x20, 0xf5, 0x8c, 0x67, 0x3c}, /* SHD_R1_UNIT11 */ + {0xf6, 0x89, 0xd0, 0x88, 0x90, 0x34, 0x23, 0x0b, 0x15, 0xa8, 0x3f}, /* SHD_R1_UNIT12 */ + {0x00, 0x72, 0x10, 0x89, 0x68, 0x04, 0x69, 0x00, 0x00, 0x19, 0x26}, /* SHD_R1_UNIT13 */ +}; + +static const uint8_t g_isx012_shd_r2_data[SHD_R2_DATA_UNIT_NUM] + [SHD_R2_DATA_UNIT_SIZE] = +{ + {0x3a, 0xe2, 0x11, 0x8c, 0x42, 0x74, 0xa1, 0x0c, 0x89, 0x08, 0x46}, /* SHD_R2_UNIT0 */ + {0x30, 0xe2, 0xd1, 0x8c, 0x36, 0x54, 0x20, 0xfe, 0xec, 0x47, 0x41}, /* SHD_R2_UNIT1 */ + {0x20, 0x5a, 0x91, 0x88, 0x16, 0x94, 0x1d, 0xda, 0x80, 0x26, 0x35}, /* SHD_R2_UNIT2 */ + {0xc2, 0x69, 0x0f, 0x81, 0x00, 0x94, 0x9d, 0xc9, 0x84, 0xe5, 0x29}, /* SHD_R2_UNIT3 */ + {0x54, 0xb1, 0x0b, 0x6c, 0xb2, 0xb3, 0x9d, 0xd4, 0x74, 0x85, 0x25}, /* SHD_R2_UNIT4 */ + {0x1a, 0xf1, 0x08, 0x50, 0xfc, 0xe2, 0x1a, 0xe0, 0x2c, 0x66, 0x28}, /* SHD_R2_UNIT5 */ + {0x14, 0x01, 0x88, 0x41, 0x4e, 0x32, 0x16, 0xcb, 0x08, 0x87, 0x31}, /* SHD_R2_UNIT6 */ + {0x42, 0x99, 0x08, 0x40, 0x0c, 0x72, 0x92, 0xb1, 0x58, 0x86, 0x3b}, /* SHD_R2_UNIT7 */ + {0xa8, 0xd9, 0xca, 0x4a, 0x32, 0xe2, 0x91, 0xa0, 0x04, 0x66, 0x36}, /* SHD_R2_UNIT8 */ + {0x02, 0xc2, 0x4e, 0x64, 0xbe, 0xd2, 0x94, 0xa9, 0xe0, 0xc5, 0x36}, /* SHD_R2_UNIT9 */ + {0xe1, 0x61, 0x91, 0x84, 0xb6, 0x43, 0x9b, 0xcf, 0x9c, 0x66, 0x38}, /* SHD_R2_UNIT10 */ + {0xf6, 0xa1, 0x50, 0x97, 0x8e, 0x34, 0x22, 0x04, 0x01, 0x08, 0x40}, /* SHD_R2_UNIT11 */ + {0x15, 0x9a, 0x51, 0x92, 0xf2, 0xd4, 0xa5, 0x1d, 0x99, 0xa8, 0x43}, /* SHD_R2_UNIT12 */ + {0x21, 0x82, 0x91, 0x92, 0xbe, 0xf4, 0x9e, 0xf3, 0x4c, 0x87, 0x38}, /* SHD_R2_UNIT13 */ +}; + +static const uint8_t g_isx012_shd_b2_data[SHD_B2_DATA_UNIT_NUM] + [SHD_B2_DATA_UNIT_SIZE] = +{ + {0xef, 0x39, 0xcf, 0x74, 0x88, 0xb3, 0x1b, 0xdf, 0x20, 0x47, 0x3b}, /* SHD_B2_UNIT0 */ + {0xdf, 0x59, 0xcf, 0x77, 0x8c, 0x43, 0x1b, 0xd7, 0xb8, 0x46, 0x37}, /* SHD_B2_UNIT1 */ + {0xcc, 0xc1, 0x0e, 0x73, 0x78, 0xa3, 0x99, 0xc1, 0xd0, 0x25, 0x2f}, /* SHD_B2_UNIT2 */ + {0x87, 0x09, 0x0d, 0x6c, 0x64, 0x93, 0x99, 0xb6, 0x30, 0xc5, 0x27}, /* SHD_B2_UNIT3 */ + {0x3f, 0xb1, 0x0a, 0x5f, 0x2a, 0x93, 0x99, 0xbc, 0x1c, 0x85, 0x24}, /* SHD_B2_UNIT4 */ + {0x16, 0xc9, 0x48, 0x4c, 0xb6, 0x92, 0x17, 0xc4, 0x94, 0x85, 0x26}, /* SHD_B2_UNIT5 */ + {0x10, 0x09, 0x88, 0x41, 0x3a, 0x52, 0x94, 0xb2, 0x2c, 0xc6, 0x2c}, /* SHD_B2_UNIT6 */ + {0x33, 0x79, 0x08, 0x40, 0x08, 0xc2, 0x11, 0xa2, 0x94, 0x65, 0x34}, /* SHD_B2_UNIT7 */ + {0x7e, 0x39, 0x4a, 0x48, 0x26, 0x52, 0x91, 0x96, 0x64, 0x05, 0x2f}, /* SHD_B2_UNIT8 */ + {0xbf, 0x09, 0x8d, 0x5b, 0x92, 0xa2, 0x93, 0x9d, 0x4c, 0x65, 0x2f}, /* SHD_B2_UNIT9 */ + {0x95, 0xf9, 0x0e, 0x73, 0x48, 0x63, 0x98, 0xb9, 0xd8, 0xa5, 0x30}, /* SHD_B2_UNIT10 */ + {0xa5, 0xb1, 0x8d, 0x83, 0xf4, 0xa3, 0x1d, 0xe0, 0xd0, 0x06, 0x36}, /* SHD_B2_UNIT11 */ + {0xbe, 0xa9, 0x4e, 0x79, 0x50, 0xd4, 0x20, 0xf6, 0x54, 0xa7, 0x38}, /* SHD_B2_UNIT12 */ + {0xc5, 0x91, 0xce, 0x7a, 0xf4, 0x03, 0x44, 0x00, 0x60, 0x60, 0x00}, /* SHD_B2_UNIT13 */ +}; + +static const isx012_reg_t g_isx012_shd_thresholds[] = +{ + {SHD_INP_TH_HB_H_R2, 0x1478, 2}, + {SHD_INP_TH_HB_L_R2, 0x1380, 2}, + {SHD_INP_TH_LB_H_R2, 0x10cc, 2}, + {SHD_INP_TH_LB_L_R2, 0x1004, 2}, + {SHD_INP_TH_HB_H_RB, 0x10cc, 2}, + {SHD_INP_TH_HB_L_RB, 0x1004, 2}, + {SHD_INP_TH_LB_H_RB, 0x0000, 2}, + {SHD_INP_TH_LB_L_RB, 0x0000, 2}, +}; + +#define ISX012_SHD_THRESHOLDS_NENTRIES ARRAY_NENTRIES(g_isx012_shd_thresholds) + +static const isx012_reg_t g_isx012_shd_wb[] = +{ + {NORMR, 0x1101, 2}, + {NORMB, 0x0f7b, 2}, + {AWBPRER, 0x0147, 2}, + {AWBPREB, 0x022a, 2}, + {SHD_PRER_OFFSET_R2, 0x001b, 2}, + {SHD_PRER_OFFSET_RB, 0x000b, 2}, + {SHD_PREB_OFFSET_RB, 0x0003, 2}, +}; + +#define ISX012_SHD_WB_NENTRIES ARRAY_NENTRIES(g_isx012_shd_wb) + +static int32_t g_isx012_colorfx_actual[] = +{ + IMGSENSOR_COLORFX_NONE, + IMGSENSOR_COLORFX_BW, + IMGSENSOR_COLORFX_SEPIA, + IMGSENSOR_COLORFX_NEGATIVE, + IMGSENSOR_COLORFX_SKETCH, + IMGSENSOR_COLORFX_SOLARIZATION, + IMGSENSOR_COLORFX_PASTEL +}; + +static uint8_t g_isx012_colorfx_regval[] = +{ + REGVAL_EFFECT_NONE, + REGVAL_EFFECT_MONOTONE, + REGVAL_EFFECT_SEPIA, + REGVAL_EFFECT_NEGPOS, + REGVAL_EFFECT_SKETCH, + REGVAL_EFFECT_SOLARIZATION, + REGVAL_EFFECT_PASTEL +}; + +static int32_t g_isx012_presetwb_actual[] = +{ + IMGSENSOR_WHITE_BALANCE_AUTO, + IMGSENSOR_WHITE_BALANCE_INCANDESCENT, + IMGSENSOR_WHITE_BALANCE_FLUORESCENT, + IMGSENSOR_WHITE_BALANCE_DAYLIGHT, + IMGSENSOR_WHITE_BALANCE_CLOUDY, + IMGSENSOR_WHITE_BALANCE_SHADE +}; + +static uint8_t g_isx012_presetwb_regval[] = +{ + REGVAL_AWB_ATM, + REGVAL_AWB_LIGHTBULB, + REGVAL_AWB_FLUORESCENTLIGHT, + REGVAL_AWB_CLEARWEATHER, + REGVAL_AWB_CLOUDYWEATHER, + REGVAL_AWB_SHADE +}; + +static int32_t g_isx012_photometry_actual[] = +{ + IMGSENSOR_EXPOSURE_METERING_AVERAGE, + IMGSENSOR_EXPOSURE_METERING_CENTER_WEIGHTED, + IMGSENSOR_EXPOSURE_METERING_SPOT, + IMGSENSOR_EXPOSURE_METERING_MATRIX +}; + +static uint8_t g_isx012_photometry_regval[] = +{ + REGVAL_PHOTOMETRY_AVERAGE, + REGVAL_PHOTOMETRY_CENTERWEIGHT, + REGVAL_PHOTOMETRY_SPOT, + REGVAL_PHOTOMETRY_MULTIPATTERN +}; + +static int32_t g_isx012_iso_actual[] = +{ + 25 * 1000, + 32 * 1000, + 40 * 1000, + 50 * 1000, + 64 * 1000, + 80 * 1000, + 100 * 1000, + 125 * 1000, + 160 * 1000, + 200 * 1000, + 250 * 1000, + 320 * 1000, + 400 * 1000, + 500 * 1000, + 640 * 1000, + 800 * 1000, + 1000 * 1000, + 1250 * 1000, + 1600 * 1000 +}; + +static uint8_t g_isx012_iso_regval[] = +{ + REGVAL_ISO_25, + REGVAL_ISO_32, + REGVAL_ISO_40, + REGVAL_ISO_50, + REGVAL_ISO_64, + REGVAL_ISO_80, + REGVAL_ISO_100, + REGVAL_ISO_125, + REGVAL_ISO_160, + REGVAL_ISO_200, + REGVAL_ISO_250, + REGVAL_ISO_320, + REGVAL_ISO_400, + REGVAL_ISO_500, + REGVAL_ISO_640, + REGVAL_ISO_800, + REGVAL_ISO_1000, + REGVAL_ISO_1250, + REGVAL_ISO_1600 +}; + +static struct imgsensor_ops_s g_isx012_ops = +{ + .init = isx012_init, + .uninit = isx012_uninit, + .validate_frame_setting = isx012_validate_frame_setting, + .start_capture = isx012_start_capture, + .stop_capture = isx012_stop_capture, + .get_supported_value = isx012_get_supported_value, + .get_value = isx012_get_value, + .set_value = isx012_set_value, +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static uint16_t isx012_getreg(isx012_dev_t *priv, + uint16_t regaddr, uint16_t regsize) +{ + struct i2c_config_s config; + volatile uint16_t regval = 0; + volatile uint8_t buffer[2]; + int ret; + + /* Set up the I2C configuration */ + + config.frequency = priv->i2c_freq; + config.address = priv->i2c_addr; + config.addrlen = 7; + buffer[0] = regaddr >> 8; + buffer[1] = regaddr & 0xff; + + /* Write the register address */ + + ret = i2c_write(priv->i2c, &config, (uint8_t *)buffer, 2); + if (ret < 0) + { + verr("i2c_write failed: %d\n", ret); + return 0; + } + + /* Restart and read 16bits from the register */ + + ret = i2c_read(priv->i2c, &config, (uint8_t *)buffer, regsize); + if (ret < 0) + { + verr("i2c_read failed: %d\n", ret); + return 0; + } + + memcpy((uint8_t *)®val, (uint8_t *)buffer, regsize); + + return regval; +} + +static int isx012_putreg(isx012_dev_t *priv, + uint16_t regaddr, uint16_t regval, uint16_t regsize) +{ + struct i2c_config_s config; + volatile uint8_t buffer[4]; + int ret; + + /* Set up the I2C configuration */ + + config.frequency = priv->i2c_freq; + config.address = priv->i2c_addr; + config.addrlen = 7; + + /* Set up for the transfer */ + + buffer[0] = regaddr >> 8; /* RegAddr Hi */ + buffer[1] = regaddr & 0xff; /* RegAddr Low */ + + memcpy((uint8_t *)&buffer[2], (uint8_t *)®val, regsize); + + /* And do it */ + + ret = i2c_write(priv->i2c, &config, + (uint8_t *)buffer, regsize + 2); + if (ret < 0) + { + verr("i2c_write failed: %d\n", ret); + } + + return ret; +} + +static int isx012_putreglist(isx012_dev_t *priv, + FAR const isx012_reg_t *reglist, + size_t nentries) +{ + FAR const isx012_reg_t *entry; + int ret = OK; + + for (entry = reglist; nentries > 0; nentries--, entry++) + { + ret = isx012_putreg(priv, entry->regaddr, + entry->regval, entry->regsize); + if (ret < 0) + { + verr("isx012_putreg failed: %d\n", ret); + return ret; + } + } + + return ret; +} + +static int isx012_chk_int_state(isx012_dev_t *priv, + uint8_t sts, uint32_t delay_time, + uint32_t wait_time, uint32_t timeout) +{ + int ret = 0; + volatile uint8_t data; + uint32_t time = 0; + + nxsig_usleep(delay_time * 1000); + while (time < timeout) + { + data = isx012_getreg(priv, INTSTS0, sizeof(data)); + data = data & sts; + if (data != 0) + { + ret = isx012_putreg(priv, INTCLR0, data, sizeof(data)); + return ret; + } + + nxsig_usleep(wait_time * 1000); + time += wait_time; + } + + return ERROR; +} + +static int isx012_replace_fmt_to_regval(uint8_t nr_fmt, + imgsensor_format_t *fmt) +{ + int ret; + + if (fmt == NULL) + { + return -EINVAL; + } + + switch (fmt[IMGSENSOR_FMT_MAIN].pixelformat) + { + case IMGSENSOR_PIX_FMT_UYVY: + ret = REGVAL_OUTFMT_YUV; + break; + + case IMGSENSOR_PIX_FMT_RGB565: + ret = REGVAL_OUTFMT_RGB; + break; + + case IMGSENSOR_PIX_FMT_JPEG: + ret = REGVAL_OUTFMT_JPEG; + break; + + case IMGSENSOR_PIX_FMT_JPEG_WITH_SUBIMG: + if (nr_fmt == 1) + { + ret = REGVAL_OUTFMT_JPEG; + } + else + { + ret = REGVAL_OUTFMT_INTERLEAVE; + } + + break; + + default: /* Unsupported format */ + + ret = -EINVAL; + } + + return ret; +} + +static bool is_movie_needed(uint8_t fmt, uint8_t fps) +{ + bool need = true; + + if ((fmt == IMGSENSOR_PIX_FMT_UYVY) || + (fmt == IMGSENSOR_PIX_FMT_RGB565)) + { + if (fps >= REGVAL_FPSTYPE_30FPS) /* This means fps <= 30 */ + { + need = false; + } + } + + return need; +} + +static int isx012_set_mode_param(isx012_dev_t *priv, + imgsensor_stream_type_t type, + uint8_t nr_fmt, + imgsensor_format_t *fmt, + imgsensor_interval_t *interval) +{ + int ret = 0; + int fmt_val = isx012_replace_fmt_to_regval(nr_fmt, fmt); + int fps_val = isx012_replace_frameinterval_to_regval(interval); + uint16_t fps_addr; + uint16_t fmt_addr; + uint16_t smode_addr; + uint16_t hsize_addr; + uint16_t vsize_addr; + uint8_t smode; + uint8_t mode; + + /* Get register address for type */ + + if (type == IMGSENSOR_STREAM_TYPE_VIDEO) + { + if (is_movie_needed(fmt_val, fps_val)) + { + if (priv->mode == REGVAL_MODESEL_HREL) + { + /* In Half release state, + * the setting which need movie mode is prohibited. + */ + + return -EPERM; + } + + fps_addr = FPSTYPE_MOVIE; + fmt_addr = OUTFMT_MOVIE; + smode_addr = SENSMODE_MOVIE; + hsize_addr = HSIZE_MOVIE; + vsize_addr = VSIZE_MOVIE; + mode = REGVAL_MODESEL_MOV; + } + else + { + fps_addr = FPSTYPE_MONI; + fmt_addr = OUTFMT_MONI; + smode_addr = SENSMODE_MONI; + hsize_addr = HSIZE_MONI; + vsize_addr = VSIZE_MONI; + mode = REGVAL_MODESEL_MON; + } + } + else + { + fps_addr = FPSTYPE_CAP; + fmt_addr = OUTFMT_CAP; + smode_addr = SENSMODE_CAP; + hsize_addr = HSIZE_CAP; + vsize_addr = VSIZE_CAP; + mode = REGVAL_MODESEL_CAP; + } + + ret = isx012_putreg(priv, fps_addr, fps_val, sizeof(uint8_t)); + if (ret < 0) + { + return ret; + } + + ret = isx012_putreg(priv, fmt_addr, fmt_val, sizeof(uint8_t)); + if (ret < 0) + { + return ret; + } + + switch (fps_val) + { + case REGVAL_FPSTYPE_120FPS: + smode = REGVAL_SENSMODE_1_8; + break; + + case REGVAL_FPSTYPE_60FPS: + smode = REGVAL_SENSMODE_1_4; + break; + + case REGVAL_FPSTYPE_30FPS: + smode = REGVAL_SENSMODE_1_2; + break; + + default: + smode = REGVAL_SENSMODE_ALLPIX; + break; + } + + ret = isx012_putreg(priv, smode_addr, smode, sizeof(uint8_t)); + if (ret < 0) + { + return ret; + } + + ret = isx012_putreg(priv, + hsize_addr, + fmt[IMGSENSOR_FMT_MAIN].width, + sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + ret = isx012_putreg(priv, + vsize_addr, + fmt[IMGSENSOR_FMT_MAIN].height, + sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + if (fmt_val == REGVAL_OUTFMT_INTERLEAVE) + { + ret = isx012_putreg(priv, + HSIZE_TN, + fmt[IMGSENSOR_FMT_SUB].width, + sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + + ret = isx012_putreg(priv, + VSIZE_TN, + fmt[IMGSENSOR_FMT_SUB].height, + sizeof(uint16_t)); + if (ret < 0) + { + return ret; + } + } + + if (priv->state != STATE_ISX012_ACTIVE) + { + isx012_change_device_state(priv, STATE_ISX012_ACTIVE); + } + + ret = isx012_change_camera_mode(priv, mode); + if (ret == OK) + { + priv->mode = mode; + } + + return ret; +} + +/**************************************************************************** + * isx012_change_camera_mode + ****************************************************************************/ + +static int isx012_change_camera_mode(isx012_dev_t *priv, uint8_t mode) +{ + int ret = 0; + uint16_t fmt_addr; + uint8_t fmt; + uint32_t vifmode; +#ifdef ISX012_FRAME_SKIP_EN + uint8_t mask_num; + int i; +#endif /* ISX012_FRAME_SKIP_EN */ + + if (priv->state != STATE_ISX012_ACTIVE) + { + return -EPERM; + } + + switch (mode) + { + case REGVAL_MODESEL_MON: + case REGVAL_MODESEL_HREL: + fmt_addr = OUTFMT_MONI; + break; + + case REGVAL_MODESEL_MOV: + fmt_addr = OUTFMT_MOVIE; + break; + + case REGVAL_MODESEL_CAP: + fmt_addr = OUTFMT_CAP; + break; + + default: + return -EPERM; + } + + fmt = isx012_getreg(priv, fmt_addr, 1); + + switch (fmt) /* mode parallel */ + { + case REGVAL_OUTFMT_YUV: + vifmode = REGVAL_VIFMODE_YUV_PARALLEL; + break; + case REGVAL_OUTFMT_JPEG: + vifmode = REGVAL_VIFMODE_JPEG_PARALLEL; + break; + case REGVAL_OUTFMT_INTERLEAVE: + vifmode = REGVAL_VIFMODE_INTERLEAVE_PARALLEL; + break; + case REGVAL_OUTFMT_RGB: + vifmode = REGVAL_VIFMODE_RGB_PARALLEL; + break; + default: + vifmode = REGVAL_VIFMODE_YUV_PARALLEL; + break; + } + + ret = isx012_putreg(priv, VIFMODE, vifmode, sizeof(vifmode)); + if (ret < 0) + { + return ret; + } + + if (mode != isx012_getreg(priv, MODESEL, sizeof(mode))) + { + isx012_putreg(priv, INTCLR0, CM_CHANGED_STS, 1); + + ret = isx012_putreg(priv, MODESEL, mode, sizeof(mode)); + if (ret < 0) + { + return ret; + } + + /* Wait CM_CHANGED */ + + ret = isx012_chk_int_state(priv, + CM_CHANGED_STS, + CAMERA_MODE_DELAY_TIME, + CAMERA_MODE_WAIT_TIME, + CAMERA_MODE_TIMEOUT); + if (ret != 0) + { + return ret; + } + } + +#ifdef ISX012_FRAME_SKIP_EN + if (mode != REGVAL_MODESEL_HREL) + { + isx012_putreg(priv, INTCLR0, VINT_STS, 1); + mask_num = isx012_getreg(priv, RO_MASK_NUM, sizeof(mask_num)); + for (i = 0; i < mask_num; i++) + { + /* Wait Next VINT */ + + ret = isx012_chk_int_state(priv, VINT_STS, VINT_DELAY_TIME, + VINT_WAIT_TIME, VINT_TIMEOUT); + if (ret != 0) + { + return ret; + } + } + } +#endif /* ISX012_FRAME_SKIP_EN */ + + return OK; +} + +/**************************************************************************** + * isx012_change_device_state + ****************************************************************************/ + +static int isx012_change_device_state(isx012_dev_t *priv, + isx012_state_t state) +{ + int ret = 0; +#ifdef ISX012_FRAME_SKIP_EN + int i; + uint8_t mute_cnt; +#endif /* ISX012_FRAME_SKIP_EN */ + + if (priv->state == STATE_ISX012_PRESLEEP || priv->state == state) + { + return -EPERM; + } + + switch (state) + { + case STATE_ISX012_SLEEP: + isx012_putreg(priv, INTCLR0, OM_CHANGED_STS, 1); + board_isx012_set_sleep(1); + break; + case STATE_ISX012_ACTIVE: + isx012_putreg(priv, INTCLR0, OM_CHANGED_STS | CM_CHANGED_STS, 1); + board_isx012_release_sleep(); + break; + case STATE_ISX012_PRESLEEP: + return -EPERM; + default: + return -EPERM; + } + + /* Wait OM_CHANGED */ + + ret = isx012_chk_int_state(priv, OM_CHANGED_STS, + DEVICE_STATE_DELAY_TIME, + DEVICE_STATE_WAIT_TIME, + DEVICE_STATE_TIMEOUT); + if (ret != 0) + { + return ret; + } + + priv->state = state; + + if (state == STATE_ISX012_ACTIVE) + { + /* Wait CM_CHANGED -> Monitoring */ + + ret = isx012_chk_int_state(priv, CM_CHANGED_STS, + CAMERA_MODE_DELAY_TIME, + CAMERA_MODE_WAIT_TIME, + CAMERA_MODE_TIMEOUT); + if (ret != 0) + { + return ret; + } + +#ifdef ISX012_FRAME_SKIP_EN + mute_cnt = isx012_getreg(priv, MUTECNT, sizeof(mute_cnt)); + isx012_putreg(priv, INTCLR0, VINT_STS, 1); + for (i = 0; i < mute_cnt; i++) + { + /* Wait Next VINT */ + + ret = isx012_chk_int_state(priv, VINT_STS, VINT_DELAY_TIME, + VINT_WAIT_TIME, VINT_TIMEOUT); + if (ret != 0) + { + return ret; + } + } +#endif /* ISX012_FRAME_SKIP_EN */ + } + + priv->mode = REGVAL_MODESEL_MON; + + return OK; +} + +int init_isx012(FAR struct isx012_dev_s *priv) +{ + int ret; + +#ifdef ISX012_NOT_USE_NSTBY + board_isx012_release_sleep(); + board_isx012_release_reset(); + nxsig_usleep(6000); +#else + board_isx012_release_reset(); + nxsig_usleep(6000); +#endif + +#ifdef ISX012_CHECK_IN_DETAIL + /* check the chip id */ + + ret = isx012_chipid(priv); + if (ret < 0) + { + verr("isx012_chipid failed: %d\n", ret); + board_isx012_set_reset(); + return ret; + } +#endif + + /* Wait OM_CHANGED Power OFF -> PreSleep */ + + ret = isx012_chk_int_state(priv, OM_CHANGED_STS, DEVICE_STATE_DELAY_TIME, + DEVICE_STATE_WAIT_TIME, DEVICE_STATE_TIMEOUT); + if (ret != OK) + { + verr("OM_CHANGED_STS(PreSleep) is Not occurred: %d\n", ret); + return ret; + } + + priv->state = STATE_ISX012_PRESLEEP; + +#ifndef ISX012_NOT_USE_NSTBY + /* set the isx012 clock */ + + /* Write INCK_SET register ISX012 change state PreSleep -> Sleep */ + + ret = isx012_putreglist(priv, g_isx012_presleep, ISX012_PRESLEEP_NENTRIES); + if (ret != OK) + { + verr("isx012_putreglist(INCK_SET) failed: %d\n", ret); + return ret; + } + + /* Wait OM_CHANGED PreSleep -> Sleep */ + + ret = isx012_chk_int_state(priv, OM_CHANGED_STS, DEVICE_STATE_DELAY_TIME, + DEVICE_STATE_WAIT_TIME, DEVICE_STATE_TIMEOUT); + if (ret != OK) + { + verr("OM_CHANGED_STS(Sleep) is Not occurred: %d\n", ret); + return ret; + } +#endif + + priv->state = STATE_ISX012_SLEEP; + priv->i2c_freq = I2CFREQ_FAST; + + /* initialize the isx012 hardware */ + + ret = isx012_putreglist(priv, g_isx012_def_init, ISX012_RESET_NENTRIES); + if (ret < 0) + { + verr("isx012_putreglist failed: %d\n", ret); + board_isx012_set_reset(); + return ret; + } + + /* Set shading adjustment */ + + ret = isx012_set_shd(priv); + if (ret < 0) + { + verr("isx012_set_shd failed: %d\n", ret); + board_isx012_set_reset(); + return ret; + } + + return ret; +} + +static int isx012_init(void) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + int ret = 0; + + ret = board_isx012_power_on(); + if (ret < 0) + { + verr("Failed to power on %d\n", ret); + return ret; + } + + ret = init_isx012(priv); + if (ret < 0) + { + verr("Failed to init_isx012 %d\n", ret); + board_isx012_set_reset(); + board_isx012_power_off(); + return ret; + } + + return ret; +} + +static int isx012_uninit(void) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + + int ret = 0; + + if (priv->state == STATE_ISX012_ACTIVE) + { + board_isx012_set_sleep(1); + } + + board_isx012_set_reset(); + + ret = board_isx012_power_off(); + if (ret < 0) + { + verr("Failed to power off %d\n", ret); + return ret; + } + + priv->i2c_freq = I2CFREQ_STANDARD; + priv->state = STATE_ISX012_POWEROFF; + + return ret; +} + +static int8_t isx012_get_maximum_fps(uint8_t nr_fmt, + FAR imgsensor_format_t *fmt) +{ + int8_t max_fps = REGVAL_FPSTYPE_120FPS; + uint16_t main_w; + uint16_t main_h; + uint16_t sub_w; + uint16_t sub_h; + + main_w = fmt[IMGSENSOR_FMT_MAIN].width; + main_h = fmt[IMGSENSOR_FMT_MAIN].height; + + switch (fmt[IMGSENSOR_FMT_MAIN].pixelformat) + { + case IMGSENSOR_PIX_FMT_UYVY: /* YUV 4:2:2 */ + case IMGSENSOR_PIX_FMT_RGB565: /* RGB565 */ + + if ((main_w < OUT_YUV_HSIZE_MIN) || + (main_h < OUT_YUV_VSIZE_MIN) || + (main_w > OUT_YUV_15FPS_HSIZE_MAX) || + (main_h > OUT_YUV_15FPS_VSIZE_MAX)) + { + /* IN frame size is out of range */ + + return -EINVAL; + } + else if ((main_w <= OUT_YUV_120FPS_HSIZE_MAX) && + (main_h <= OUT_YUV_120FPS_VSIZE_MAX)) + { + max_fps = REGVAL_FPSTYPE_120FPS; + } + else + { + max_fps = REGVAL_FPSTYPE_60FPS; + } + + break; + + case IMGSENSOR_PIX_FMT_JPEG: /* JPEG */ + + if ((main_w < OUT_JPG_HSIZE_MIN) || + (main_h < OUT_JPG_VSIZE_MIN) || + (main_w > OUT_JPG_15FPS_HSIZE_MAX) || + (main_h > OUT_JPG_15FPS_VSIZE_MAX)) + { + /* IN frame size is out of range */ + + return -EINVAL; + } + else if ((main_w <= OUT_JPG_120FPS_HSIZE_MAX) && + (main_h <= OUT_JPG_120FPS_VSIZE_MAX)) + { + max_fps = REGVAL_FPSTYPE_120FPS; + } + else if ((main_w <= OUT_JPG_60FPS_HSIZE_MAX) && + (main_h <= OUT_JPG_60FPS_VSIZE_MAX)) + { + max_fps = REGVAL_FPSTYPE_60FPS; + } + else if ((main_w <= OUT_JPG_30FPS_HSIZE_MAX) && + (main_h <= OUT_JPG_30FPS_VSIZE_MAX)) + { + max_fps = REGVAL_FPSTYPE_30FPS; + } + else + { + max_fps = REGVAL_FPSTYPE_15FPS; + } + + break; + + case IMGSENSOR_PIX_FMT_JPEG_WITH_SUBIMG: /* JPEG + sub image */ + + if (nr_fmt == 1) + { + sub_w = OUT_YUV_HSIZE_MIN; + sub_h = OUT_YUV_VSIZE_MIN; + } + else + { + if (fmt[IMGSENSOR_FMT_SUB].pixelformat + != IMGSENSOR_PIX_FMT_UYVY) + { + /* Unsupported pixel format */ + + return -EINVAL; + } + + sub_w = fmt[IMGSENSOR_FMT_SUB].width; + sub_h = fmt[IMGSENSOR_FMT_SUB].height; + } + + if ((main_w < OUT_JPG_HSIZE_MIN) || + (main_h < OUT_JPG_VSIZE_MIN) || + (main_w > OUT_JPGINT_15FPS_HSIZE_MAX) || + (main_h > OUT_JPGINT_15FPS_VSIZE_MAX) || + (sub_w < OUT_YUV_HSIZE_MIN) || + (sub_h < OUT_YUV_VSIZE_MIN) || + (sub_w > OUT_YUVINT_30FPS_HSIZE_MAX) || + (sub_h > OUT_YUVINT_30FPS_VSIZE_MAX)) + { + /* IN frame size is out of range */ + + return -EINVAL; + } + else if ((main_w <= OUT_JPGINT_30FPS_HSIZE_MAX) && + (main_h <= OUT_JPGINT_30FPS_VSIZE_MAX)) + { + max_fps = REGVAL_FPSTYPE_30FPS; + } + else + { + max_fps = REGVAL_FPSTYPE_15FPS; + } + + break; + + default: + return -EINVAL; + } + + return max_fps; +} + +static int isx012_replace_frameinterval_to_regval + (FAR imgsensor_interval_t *interval) +{ + /* Avoid multiplication overflow */ + + if ((interval->denominator * 2) / 2 != interval->denominator) + { + return -EINVAL; + } + + /* Avoid division by zero */ + + if (interval->numerator == 0) + { + return -EINVAL; + } + + /* Support only 1/x or 2/x. */ + + if (((interval->denominator * 2) % interval->numerator) != 0) + { + return -EINVAL; + } + + /* Switch by FPS * 2 */ + + switch ((interval->denominator * 2) / interval->numerator) + { + case 240 : /* 120FPS */ + return REGVAL_FPSTYPE_120FPS; + + case 120 : /* 60FPS */ + return REGVAL_FPSTYPE_60FPS; + + case 60 : /* 30FPS */ + return REGVAL_FPSTYPE_30FPS; + + case 30 : /* 15FPS */ + return REGVAL_FPSTYPE_15FPS; + + case 20 : /* 10FPS */ + return REGVAL_FPSTYPE_10FPS; + + case 15 : /* 7.5FPS */ + return REGVAL_FPSTYPE_7_5FPS; + + case 12 : /* 6FPS */ + return REGVAL_FPSTYPE_6FPS; + + case 10 : /* 5FPS */ + return REGVAL_FPSTYPE_5FPS; + + default : + return -EINVAL; + } +} + +static int isx012_validate_frame_setting(imgsensor_stream_type_t type, + uint8_t nr_fmt, + FAR imgsensor_format_t *fmt, + FAR imgsensor_interval_t *interval) +{ + int max_fps; + int arg_fps; + + if ((fmt == NULL) || + (interval == NULL)) + { + return -EINVAL; + } + + if ((nr_fmt < 1) || (nr_fmt > 2)) + { + return -EINVAL; + } + + max_fps = isx012_get_maximum_fps(nr_fmt, fmt); + if (max_fps == -EINVAL) + { + return -EINVAL; + } + + arg_fps = isx012_replace_frameinterval_to_regval(interval); + if (arg_fps == -EINVAL) + { + return -EINVAL; + } + + if (max_fps > arg_fps) + { + return -EINVAL; + } + + return OK; +} + +static int isx012_start_capture(imgsensor_stream_type_t type, + uint8_t nr_fmt, + FAR imgsensor_format_t *fmt, + FAR imgsensor_interval_t *interval) +{ + int ret; + + FAR struct isx012_dev_s *priv = &g_isx012_private; + + ret = isx012_validate_frame_setting(type, nr_fmt, fmt, interval); + if (ret != OK) + { + return ret; + } + + return isx012_set_mode_param(priv, type, nr_fmt, fmt, interval); +} + +static int isx012_stop_capture(imgsensor_stream_type_t type) +{ + return OK; +} + +static int isx012_get_supported_value + (uint32_t id, FAR imgsensor_supported_value_t *value) +{ + int ret = OK; + imgsensor_capability_range_t *range = &value->u.range; + imgsensor_capability_discrete_t *discrete = &value->u.discrete; + imgsensor_capability_elems_t *elems = &value->u.elems; + + ASSERT(value); + + switch (id) + { + case IMGSENSOR_ID_BRIGHTNESS: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER; + range->minimum = ISX012_MIN_BRIGHTNESS; + range->maximum = ISX012_MAX_BRIGHTNESS; + range->step = ISX012_STEP_BRIGHTNESS; + range->default_value = ISX012_DEF_BRIGHTNESS; + + break; + + case IMGSENSOR_ID_CONTRAST: + value->type = IMGSENSOR_CTRL_TYPE_U8FIXEDPOINT_Q7; + range->minimum = ISX012_MIN_CONTRAST; + range->maximum = ISX012_MAX_CONTRAST; + range->step = ISX012_STEP_CONTRAST; + range->default_value = ISX012_DEF_CONTRAST; + + break; + + case IMGSENSOR_ID_SATURATION: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER; + range->minimum = ISX012_MIN_SATURATION; + range->maximum = ISX012_MAX_SATURATION; + range->step = ISX012_STEP_SATURATION; + range->default_value = ISX012_DEF_SATURATION; + + break; + + case IMGSENSOR_ID_HUE: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER; + range->minimum = ISX012_MIN_HUE; + range->maximum = ISX012_MAX_HUE; + range->step = ISX012_STEP_HUE; + range->default_value = ISX012_DEF_HUE; + + break; + + case IMGSENSOR_ID_AUTO_WHITE_BALANCE: + value->type = IMGSENSOR_CTRL_TYPE_BOOLEAN; + range->minimum = ISX012_MIN_AUTOWB; + range->maximum = ISX012_MAX_AUTOWB; + range->step = ISX012_STEP_AUTOWB; + range->default_value = ISX012_DEF_AUTOWB; + + break; + case IMGSENSOR_ID_GAMMA_CURVE: + value->type = IMGSENSOR_CTRL_TYPE_U16; + elems->minimum = ISX012_MIN_GAMMACURVE; + elems->maximum = ISX012_MAX_GAMMACURVE; + elems->step = ISX012_STEP_GAMMACURVE; + elems->nr_elems = ISX012_ELEMS_GAMMACURVE; + + break; + + case IMGSENSOR_ID_EXPOSURE: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER_TIMES_3; + range->minimum = ISX012_MIN_EXPOSURE; + range->maximum = ISX012_MAX_EXPOSURE; + range->step = ISX012_STEP_EXPOSURE; + range->default_value = ISX012_DEF_EXPOSURE; + + break; + + case IMGSENSOR_ID_HFLIP_VIDEO: + value->type = IMGSENSOR_CTRL_TYPE_BOOLEAN; + range->minimum = ISX012_MIN_HFLIP; + range->maximum = ISX012_MAX_HFLIP; + range->step = ISX012_STEP_HFLIP; + range->default_value = ISX012_DEF_HFLIP; + + break; + + case IMGSENSOR_ID_VFLIP_VIDEO: + value->type = IMGSENSOR_CTRL_TYPE_BOOLEAN; + range->minimum = ISX012_MIN_VFLIP; + range->maximum = ISX012_MAX_VFLIP; + range->step = ISX012_STEP_VFLIP; + range->default_value = ISX012_DEF_VFLIP; + + break; + + case IMGSENSOR_ID_HFLIP_STILL: + value->type = IMGSENSOR_CTRL_TYPE_BOOLEAN; + range->minimum = ISX012_MIN_HFLIP_STILL; + range->maximum = ISX012_MAX_HFLIP_STILL; + range->step = ISX012_STEP_HFLIP_STILL; + range->default_value = ISX012_DEF_HFLIP_STILL; + + break; + + case IMGSENSOR_ID_VFLIP_STILL: + value->type = IMGSENSOR_CTRL_TYPE_BOOLEAN; + range->minimum = ISX012_MIN_VFLIP_STILL; + range->maximum = ISX012_MAX_VFLIP_STILL; + range->step = ISX012_STEP_VFLIP_STILL; + range->default_value = ISX012_DEF_VFLIP_STILL; + + break; + + case IMGSENSOR_ID_SHARPNESS: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER; + range->minimum = ISX012_MIN_SHARPNESS; + range->maximum = ISX012_MAX_SHARPNESS; + range->step = ISX012_STEP_SHARPNESS; + range->default_value = ISX012_DEF_SHARPNESS; + + break; + + case IMGSENSOR_ID_COLOR_KILLER: + value->type = IMGSENSOR_CTRL_TYPE_BOOLEAN; + range->minimum = ISX012_MIN_COLORKILLER; + range->maximum = ISX012_MAX_COLORKILLER; + range->step = ISX012_STEP_COLORKILLER; + range->default_value = ISX012_DEF_COLORKILLER; + + break; + + case IMGSENSOR_ID_COLORFX: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER_MENU; + discrete->nr_values + = ARRAY_NENTRIES(g_isx012_colorfx_actual); + discrete->values = g_isx012_colorfx_actual; + discrete->default_value = IMGSENSOR_COLORFX_NONE; + + break; + + case IMGSENSOR_ID_EXPOSURE_AUTO: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER; + range->minimum = ISX012_MIN_EXPOSUREAUTO; + range->maximum = ISX012_MAX_EXPOSUREAUTO; + range->step = ISX012_STEP_EXPOSUREAUTO; + range->default_value = ISX012_DEF_EXPOSUREAUTO; + + break; + + case IMGSENSOR_ID_EXPOSURE_ABSOLUTE: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER; + range->minimum = ISX012_MIN_EXPOSURETIME; + range->maximum = ISX012_MAX_EXPOSURETIME; + range->step = ISX012_STEP_EXPOSURETIME; + range->default_value = ISX012_DEF_EXPOSURETIME; + + break; + + case IMGSENSOR_ID_EXPOSURE_METERING: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER_MENU; + discrete->nr_values + = ARRAY_NENTRIES(g_isx012_photometry_actual); + discrete->values = g_isx012_photometry_actual; + discrete->default_value + = IMGSENSOR_EXPOSURE_METERING_AVERAGE; + + break; + + case IMGSENSOR_ID_AUTO_N_PRESET_WB: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER_MENU; + discrete->nr_values = ARRAY_NENTRIES(g_isx012_presetwb_actual); + discrete->values = g_isx012_presetwb_actual; + discrete->default_value = IMGSENSOR_WHITE_BALANCE_AUTO; + + break; + + case IMGSENSOR_ID_WIDE_DYNAMIC_RANGE: + value->type = IMGSENSOR_CTRL_TYPE_BOOLEAN; + range->minimum = ISX012_MIN_YGAMMA; + range->maximum = ISX012_MAX_YGAMMA; + range->step = ISX012_STEP_YGAMMA; + range->default_value = ISX012_DEF_YGAMMA; + + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER_MENU; + discrete->nr_values = ARRAY_NENTRIES(g_isx012_iso_actual); + discrete->values = g_isx012_iso_actual; + discrete->default_value = 0; + + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY_AUTO: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER; + range->minimum = ISX012_MIN_ISOAUTO; + range->maximum = ISX012_MAX_ISOAUTO; + range->step = ISX012_STEP_ISOAUTO; + range->default_value = ISX012_DEF_ISOAUTO; + + break; + + case IMGSENSOR_ID_3A_LOCK: + value->type = IMGSENSOR_CTRL_TYPE_BITMASK; + range->minimum = ISX012_MIN_3ALOCK; + range->maximum = ISX012_MAX_3ALOCK; + range->step = ISX012_STEP_3ALOCK; + range->default_value = ISX012_DEF_3ALOCK; + + break; + + case IMGSENSOR_ID_3A_PARAMETER: + value->type = IMGSENSOR_CTRL_TYPE_U16; + elems->minimum = 0; + elems->maximum = 65535; + elems->step = 1; + elems->nr_elems = ISX012_ELEMS_3APARAM; + + break; + + case IMGSENSOR_ID_3A_STATUS: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER; + range->minimum = 0; + range->maximum = 3; + range->step = 1; + range->default_value = 3; + + break; + + case IMGSENSOR_ID_JPEG_QUALITY: + value->type = IMGSENSOR_CTRL_TYPE_INTEGER; + range->minimum = ISX012_MIN_JPGQUALITY; + range->maximum = ISX012_MAX_JPGQUALITY; + range->step = ISX012_STEP_JPGQUALITY; + range->default_value = ISX012_DEF_JPGQUALITY; + + break; + + default: /* Unsupported parameter */ + ret = -EINVAL; + + break; + } + + return ret; +} + +static int isx012_get_value(uint32_t id, + uint32_t size, + FAR imgsensor_value_t *value) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + uint16_t readvalue; + uint8_t cnt; + uint8_t threea_enable; + uint16_t read_src; + uint16_t *read_dst; + int ret = OK; + + ASSERT(value); + + switch (id) + { + case IMGSENSOR_ID_BRIGHTNESS: + readvalue = isx012_getreg(priv, + ISX012_REG_BRIGHTNESS, + ISX012_SIZE_BRIGHTNESS); + + value->value32 = (int32_t)(int8_t)(0x00ff & readvalue); + break; + + case IMGSENSOR_ID_CONTRAST: + value->value32 = isx012_getreg(priv, + ISX012_REG_CONTRAST, + ISX012_SIZE_CONTRAST); + break; + + case IMGSENSOR_ID_SATURATION: + value->value32 = isx012_getreg(priv, + ISX012_REG_SATURATION, + ISX012_SIZE_SATURATION); + break; + + case IMGSENSOR_ID_HUE: + value->value32 = isx012_getreg(priv, + ISX012_REG_HUE, + ISX012_SIZE_HUE); + break; + + case IMGSENSOR_ID_AUTO_WHITE_BALANCE: + readvalue = isx012_getreg(priv, + ISX012_REG_AUTOWB, + ISX012_SIZE_AUTOWB); + + /* Convert to video driver's value */ + + value->value32 = (readvalue & REGVAL_CPUEXT_BIT_AWBSTOP) ? 0 : 1; + + break; + + case IMGSENSOR_ID_GAMMA_CURVE: + if (value->p_u16 == NULL) + { + return -EINVAL; + } + + if (size != ISX012_ELEMS_GAMMACURVE * sizeof(uint16_t)) + { + return -EINVAL; + } + + read_src = ISX012_REG_GAMMACURVE; + read_dst = value->p_u16; + + for (cnt = 0; cnt < ISX012_ELEMS_GAMMACURVE; cnt++) + { + *read_dst = isx012_getreg(priv, + read_src, + ISX012_SIZE_GAMMACURVE); + read_src += ISX012_SIZE_GAMMACURVE; + read_dst++; + } + + break; + + case IMGSENSOR_ID_EXPOSURE: + readvalue = isx012_getreg(priv, + ISX012_REG_EXPOSURE, + ISX012_SIZE_EXPOSURE); + + value->value32 = (int32_t)(int8_t)(0x00ff & readvalue); + + break; + + case IMGSENSOR_ID_HFLIP_VIDEO: + readvalue = isx012_getreg(priv, + ISX012_REG_HFLIP, + ISX012_SIZE_HFLIP); + + value->value32 = (readvalue & REGVAL_READVECT_BIT_H) ? 1 : 0; + + break; + + case IMGSENSOR_ID_VFLIP_VIDEO: + readvalue = isx012_getreg(priv, + ISX012_REG_VFLIP, + ISX012_SIZE_VFLIP); + + value->value32 = (readvalue & REGVAL_READVECT_BIT_V) ? 1 : 0; + + break; + + case IMGSENSOR_ID_HFLIP_STILL: + readvalue = isx012_getreg(priv, + ISX012_REG_HFLIP_STILL, + ISX012_SIZE_HFLIP_STILL); + + value->value32 = (readvalue & REGVAL_READVECT_BIT_H) ? 1 : 0; + + break; + + case IMGSENSOR_ID_VFLIP_STILL: + readvalue = isx012_getreg(priv, + ISX012_REG_VFLIP_STILL, + ISX012_SIZE_VFLIP_STILL); + + value->value32 = (readvalue & REGVAL_READVECT_BIT_V) ? 1 : 0; + + break; + + case IMGSENSOR_ID_SHARPNESS: + value->value32 = isx012_getreg(priv, + ISX012_REG_SHARPNESS, + ISX012_SIZE_SHARPNESS); + break; + + case IMGSENSOR_ID_COLOR_KILLER: + readvalue = isx012_getreg(priv, + ISX012_REG_COLORKILLER, + ISX012_SIZE_COLORKILLER); + + value->value32 = (readvalue == REGVAL_EFFECT_MONOTONE) ? 1 : 0; + + break; + + case IMGSENSOR_ID_COLORFX: + readvalue = isx012_getreg(priv, + ISX012_REG_COLOREFFECT, + ISX012_SIZE_COLOREFFECT); + + ret = -EINVAL; + for (cnt = 0; cnt < ARRAY_NENTRIES(g_isx012_colorfx_regval); cnt++) + { + if (g_isx012_colorfx_regval[cnt] == readvalue) + { + value->value32 = g_isx012_colorfx_actual[cnt]; + ret = OK; + break; + } + } + + break; + + case IMGSENSOR_ID_EXPOSURE_AUTO: + readvalue = isx012_getreg(priv, + ISX012_REG_EXPOSURETIME, + ISX012_SIZE_EXPOSURETIME); + + value->value32 = readvalue ? + IMGSENSOR_EXPOSURE_MANUAL : IMGSENSOR_EXPOSURE_AUTO; + + break; + + case IMGSENSOR_ID_EXPOSURE_ABSOLUTE: + value->value32 = isx012_getreg(priv, + ISX012_REG_EXPOSURETIME, + ISX012_SIZE_EXPOSURETIME); + + break; + + case IMGSENSOR_ID_AUTO_N_PRESET_WB: + readvalue = isx012_getreg(priv, + ISX012_REG_PRESETWB, + ISX012_SIZE_PRESETWB); + + for (cnt = 0; cnt < ARRAY_NENTRIES(g_isx012_presetwb_regval); cnt++) + { + if (g_isx012_presetwb_regval[cnt] == readvalue) + { + value->value32 = g_isx012_presetwb_actual[cnt]; + ret = OK; + break; + } + } + + break; + + case IMGSENSOR_ID_WIDE_DYNAMIC_RANGE: + readvalue = isx012_getreg(priv, + ISX012_REG_YGAMMA, + ISX012_SIZE_YGAMMA); + value->value32 = readvalue ? 0 : 1; + + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY: + readvalue = isx012_getreg(priv, ISX012_REG_ISO, ISX012_SIZE_ISO); + + ret = -EINVAL; + for (cnt = 0; cnt < ARRAY_NENTRIES(g_isx012_presetwb_regval); cnt++) + { + if (g_isx012_iso_regval[cnt] == readvalue) + { + value->value32 = g_isx012_iso_actual[cnt]; + ret = OK; + break; + } + } + + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY_AUTO: + readvalue = isx012_getreg(priv, + ISX012_REG_ISOAUTO, + ISX012_SIZE_ISOAUTO); + + value->value32 = (readvalue == REGVAL_ISO_AUTO) ? + IMGSENSOR_ISO_SENSITIVITY_AUTO : + IMGSENSOR_ISO_SENSITIVITY_MANUAL; + + break; + + case IMGSENSOR_ID_EXPOSURE_METERING: + readvalue = isx012_getreg(priv, + ISX012_REG_PHOTOMETRY, + ISX012_SIZE_PHOTOMETRY); + + ret = -EINVAL; + for (cnt = 0; + cnt < ARRAY_NENTRIES(g_isx012_photometry_regval); + cnt++) + { + if (g_isx012_photometry_regval[cnt] == readvalue) + { + value->value32 = g_isx012_photometry_actual[cnt]; + ret = OK; + break; + } + } + + break; + + case IMGSENSOR_ID_3A_PARAMETER: + if (value->p_u16 == NULL) + { + return -EINVAL; + } + + if (size != ISX012_ELEMS_3APARAM * sizeof(uint16_t)) + { + return -EINVAL; + } + + /* Get AWB parameter */ + + value->p_u16[0] = isx012_getreg(priv, RATIO_R, 2); + value->p_u16[1] = isx012_getreg(priv, RATIO_B, 2); + + /* Get AE parameter */ + + value->p_u16[2] = isx012_getreg(priv, AELEVEL, 2); + + break; + + case IMGSENSOR_ID_3A_STATUS: + + /* Initialize returned status */ + + value->value32 = IMGSENSOR_3A_STATUS_STABLE; + + /* Get AWB/AE enable or not */ + + threea_enable = isx012_getreg(priv, CPUEXT, 1); + + if ((threea_enable & REGVAL_CPUEXT_BIT_AWBSTOP) + != REGVAL_CPUEXT_BIT_AWBSTOP) + { + readvalue = isx012_getreg(priv, AWBSTS, 1); + if (readvalue != REGVAL_AWBSTS_STOP) /* AWB is not stopped */ + { + value->value32 |= IMGSENSOR_3A_STATUS_AWB_OPERATING; + } + } + + if ((threea_enable & REGVAL_CPUEXT_BIT_AESTOP) + != REGVAL_CPUEXT_BIT_AESTOP) + { + readvalue = isx012_getreg(priv, AESTS, 1); + if (readvalue != REGVAL_AESTS_STOP) /* AE is not stopped */ + { + value->value32 |= IMGSENSOR_3A_STATUS_AE_OPERATING; + } + } + break; + + case IMGSENSOR_ID_JPEG_QUALITY: + value->value32 = isx012_getreg(priv, + ISX012_REG_JPGQUALITY, + ISX012_SIZE_JPGQUALITY); + break; + + default: /* Unsupported id */ + + ret = -EINVAL; + break; + } + + return ret; +} + +static int isx012_set_value(uint32_t id, + uint32_t size, + FAR imgsensor_value_t value) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + int ret = -EINVAL; + uint8_t cnt; + uint16_t *write_src; + uint16_t write_dst; + uint16_t regval; + uint16_t exposure_time_lsb; + uint16_t exposure_time_msb; + + switch (id) + { + case IMGSENSOR_ID_BRIGHTNESS: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_BRIGHTNESS, + ISX012_MAX_BRIGHTNESS, + ISX012_STEP_BRIGHTNESS); + if (ret != OK) + { + break; + } + + ret = isx012_putreg(priv, + ISX012_REG_BRIGHTNESS, + value.value32, + ISX012_SIZE_BRIGHTNESS); + break; + + case IMGSENSOR_ID_CONTRAST: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_CONTRAST, + ISX012_MAX_CONTRAST, + ISX012_STEP_CONTRAST); + if (ret != OK) + { + break; + } + + ret = isx012_putreg(priv, + ISX012_REG_CONTRAST, + value.value32, + ISX012_SIZE_CONTRAST); + break; + + case IMGSENSOR_ID_SATURATION: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_SATURATION, + ISX012_MAX_SATURATION, + ISX012_STEP_SATURATION); + if (ret != OK) + { + break; + } + + ret = isx012_putreg(priv, + ISX012_REG_SATURATION, + value.value32, + ISX012_SIZE_SATURATION); + break; + + case IMGSENSOR_ID_HUE: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_HUE, + ISX012_MAX_HUE, + ISX012_STEP_HUE); + if (ret != OK) + { + break; + } + + ret = isx012_putreg(priv, + ISX012_REG_HUE, + value.value32, + ISX012_SIZE_HUE); + break; + + case IMGSENSOR_ID_AUTO_WHITE_BALANCE: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_AUTOWB, + ISX012_MAX_AUTOWB, + ISX012_STEP_AUTOWB); + if (ret != OK) + { + break; + } + + regval = isx012_getreg(priv, + ISX012_REG_AUTOWB, + ISX012_SIZE_AUTOWB); + + if (value.value32) + { + /* Because true means setting auto white balance + * turn off the stop bit + */ + + regval &= ~REGVAL_CPUEXT_BIT_AWBSTOP; + } + else + { + /* Because false means stopping auto white balance, + * turn on the stop bit. + */ + + regval |= REGVAL_CPUEXT_BIT_AWBSTOP; + } + + ret = isx012_putreg(priv, + ISX012_REG_AUTOWB, + regval, + ISX012_SIZE_AUTOWB); + break; + + case IMGSENSOR_ID_GAMMA_CURVE: + if (value.p_u16 == NULL) + { + return -EINVAL; + } + + if (size != ISX012_ELEMS_GAMMACURVE * 2) + { + return -EINVAL; + } + + write_src = value.p_u16; + write_dst = ISX012_REG_GAMMACURVE; + + for (cnt = 0; cnt < ISX012_ELEMS_GAMMACURVE; cnt++) + { + ret = VALIDATE_VALUE(*write_src, + ISX012_MIN_GAMMACURVE, + ISX012_MAX_GAMMACURVE, + ISX012_STEP_GAMMACURVE); + if (ret != OK) + { + break; + } + + ret = isx012_putreg(priv, + write_dst, + *write_src, + ISX012_SIZE_GAMMACURVE); + + write_src++; + write_dst += ISX012_SIZE_GAMMACURVE; + } + + break; + + case IMGSENSOR_ID_EXPOSURE: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_EXPOSURE, + ISX012_MAX_EXPOSURE, + ISX012_STEP_EXPOSURE); + if (ret != OK) + { + break; + } + + ret = isx012_putreg(priv, + ISX012_REG_EXPOSURE, + value.value32, + ISX012_SIZE_EXPOSURE); + + break; + + case IMGSENSOR_ID_HFLIP_VIDEO: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_HFLIP, + ISX012_MAX_HFLIP, + ISX012_STEP_HFLIP); + if (ret != OK) + { + break; + } + + regval = isx012_getreg(priv, + ISX012_REG_HFLIP, + ISX012_SIZE_HFLIP); + + if (value.value32) + { + regval |= REGVAL_READVECT_BIT_H; + } + else + { + regval &= ~REGVAL_READVECT_BIT_H; + } + + ret = isx012_putreg(priv, + ISX012_REG_HFLIP, + regval, + ISX012_SIZE_HFLIP); + break; + + case IMGSENSOR_ID_VFLIP_VIDEO: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_VFLIP, + ISX012_MAX_VFLIP, + ISX012_STEP_VFLIP); + if (ret != OK) + { + break; + } + + regval = isx012_getreg(priv, + ISX012_REG_VFLIP, + ISX012_SIZE_VFLIP); + + if (value.value32) + { + regval |= REGVAL_READVECT_BIT_V; + } + else + { + regval &= ~REGVAL_READVECT_BIT_V; + } + + ret = isx012_putreg(priv, + ISX012_REG_VFLIP, + regval, + ISX012_SIZE_VFLIP); + break; + + case IMGSENSOR_ID_HFLIP_STILL: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_HFLIP_STILL, + ISX012_MAX_HFLIP_STILL, + ISX012_STEP_HFLIP_STILL); + if (ret != OK) + { + break; + } + + regval = isx012_getreg(priv, + ISX012_REG_HFLIP_STILL, + ISX012_SIZE_HFLIP_STILL); + + if (value.value32) + { + regval |= REGVAL_READVECT_BIT_H; + } + else + { + regval &= ~REGVAL_READVECT_BIT_H; + } + + ret = isx012_putreg(priv, + ISX012_REG_HFLIP_STILL, + regval, + ISX012_SIZE_HFLIP_STILL); + + break; + + case IMGSENSOR_ID_VFLIP_STILL: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_VFLIP_STILL, + ISX012_MAX_VFLIP_STILL, + ISX012_STEP_VFLIP_STILL); + if (ret != OK) + { + break; + } + + regval = isx012_getreg(priv, + ISX012_REG_VFLIP_STILL, + ISX012_SIZE_VFLIP_STILL); + + if (value.value32) + { + regval |= REGVAL_READVECT_BIT_V; + } + else + { + regval &= ~REGVAL_READVECT_BIT_V; + } + + ret = isx012_putreg(priv, + ISX012_REG_VFLIP_STILL, + regval, + ISX012_SIZE_VFLIP_STILL); + break; + + case IMGSENSOR_ID_SHARPNESS: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_SHARPNESS, + ISX012_MAX_SHARPNESS, + ISX012_STEP_SHARPNESS); + if (ret != OK) + { + break; + } + + ret = isx012_putreg(priv, + ISX012_REG_SHARPNESS, + value.value32, + ISX012_SIZE_SHARPNESS); + break; + + case IMGSENSOR_ID_COLOR_KILLER: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_COLORKILLER, + ISX012_MAX_COLORKILLER, + ISX012_STEP_COLORKILLER); + if (ret != OK) + { + break; + } + + ret = isx012_putreg + (priv, + ISX012_REG_COLORKILLER, + value.value32 ? REGVAL_EFFECT_MONOTONE : REGVAL_EFFECT_NONE, + ISX012_SIZE_COLORKILLER); + + break; + + case IMGSENSOR_ID_COLORFX: + for (cnt = 0; cnt < ARRAY_NENTRIES(g_isx012_colorfx_actual); cnt++) + { + if (g_isx012_colorfx_actual[cnt] == value.value32) + { + ret = isx012_putreg(priv, + ISX012_REG_COLOREFFECT, + g_isx012_colorfx_regval[cnt], + ISX012_SIZE_COLOREFFECT); + break; + } + } + + break; + + case IMGSENSOR_ID_EXPOSURE_AUTO: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_EXPOSUREAUTO, + ISX012_MAX_EXPOSUREAUTO, + ISX012_STEP_EXPOSUREAUTO); + if (ret != OK) + { + break; + } + + if (value.value32 == IMGSENSOR_EXPOSURE_AUTO) + { + /* Register is the same as IMGSENSOR_ID_EXPOSURE_ABSOLUTE. + * If this register value = REGVAL_EXPOSURETIME_AUTO(=0), + * it means auto. Otherwise, it means manual. + */ + + ret = isx012_putreg(priv, + ISX012_REG_EXPOSURETIME, + REGVAL_EXPOSURETIME_AUTO, + ISX012_SIZE_EXPOSURETIME); + } + else + { + /* In manual case, read current value of register which + * value adjusted automatically by ISX012 HW is set to. + * It has 32bits length which is composed of LSB 16bits + * and MSB 16bits. + */ + + exposure_time_lsb = isx012_getreg + (priv, + ISX012_REG_EXPOSUREAUTOVALUE_LSB, + ISX012_SIZE_EXPOSUREAUTOVALUE); + exposure_time_msb = isx012_getreg + (priv, + ISX012_REG_EXPOSUREAUTOVALUE_MSB, + ISX012_SIZE_EXPOSUREAUTOVALUE); + + /* Register value adjusted automatically by ISX012 HW + * has the different unit from manual value register. + * automatic value register : 1 microsec unit + * manual value register : 100 microsec unit + */ + + regval = (uint16_t)(((exposure_time_msb << 16) + | exposure_time_lsb) + / ISX012_UNIT_EXPOSURETIME_US); + ret = isx012_putreg(priv, + ISX012_REG_EXPOSURETIME, + regval, + ISX012_SIZE_EXPOSURETIME); + } + + break; + + case IMGSENSOR_ID_EXPOSURE_ABSOLUTE: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_EXPOSURETIME, + ISX012_MAX_EXPOSURETIME, + ISX012_STEP_EXPOSURETIME); + if (ret != OK) + { + break; + } + + ret = isx012_putreg(priv, + ISX012_REG_EXPOSURETIME, + value.value32, + ISX012_SIZE_EXPOSURETIME); + break; + + case IMGSENSOR_ID_WIDE_DYNAMIC_RANGE: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_YGAMMA, + ISX012_MAX_YGAMMA, + ISX012_STEP_YGAMMA); + if (ret != OK) + { + break; + } + + if (value.value32) + { + regval = REGVAL_YGAMMA_AUTO; + } + else + { + regval = REGVAL_YGAMMA_OFF; + } + + ret = isx012_putreg + (priv, + ISX012_REG_YGAMMA, + value.value32 ? REGVAL_YGAMMA_AUTO : REGVAL_YGAMMA_OFF, + ISX012_SIZE_YGAMMA); + + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY: + for (cnt = 0; cnt < ARRAY_NENTRIES(g_isx012_iso_actual); cnt++) + { + if (g_isx012_iso_actual[cnt] + == value.value32) + { + ret = isx012_putreg(priv, + ISX012_REG_ISO, + g_isx012_iso_regval[cnt], + ISX012_SIZE_ISO); + break; + } + } + + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY_AUTO: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_ISOAUTO, + ISX012_MAX_ISOAUTO, + ISX012_STEP_ISOAUTO); + if (ret != OK) + { + break; + } + + if (value.value32 == IMGSENSOR_ISO_SENSITIVITY_AUTO) + { + ret = isx012_putreg(priv, + ISX012_REG_ISOAUTO, + REGVAL_ISO_AUTO, + ISX012_SIZE_ISOAUTO); + } + else + { + /* In manual case, read auto adjust value and set it */ + + regval = isx012_getreg(priv, + ISX012_REG_ISOAUTOVALUE, + ISX012_SIZE_ISOAUTOVALUE); + ret = isx012_putreg(priv, + ISX012_REG_ISO, + regval, + ISX012_SIZE_ISO); + } + + break; + + case IMGSENSOR_ID_EXPOSURE_METERING: + for (cnt = 0; + cnt < ARRAY_NENTRIES(g_isx012_photometry_actual); + cnt++) + { + if (g_isx012_photometry_actual[cnt] + == value.value32) + { + ret = isx012_putreg(priv, + ISX012_REG_PHOTOMETRY, + g_isx012_photometry_regval[cnt], + ISX012_SIZE_PHOTOMETRY); + break; + } + } + + break; + + case IMGSENSOR_ID_AUTO_N_PRESET_WB: + for (cnt = 0; + cnt < ARRAY_NENTRIES(g_isx012_presetwb_actual); + cnt++) + { + if (g_isx012_presetwb_actual[cnt] == value.value32) + { + ret = isx012_putreg(priv, + ISX012_REG_PRESETWB, + g_isx012_presetwb_regval[cnt], + ISX012_SIZE_PRESETWB); + break; + } + } + + break; + + case IMGSENSOR_ID_3A_LOCK: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_3ALOCK, + ISX012_MAX_3ALOCK, + ISX012_STEP_3ALOCK); + if (ret != OK) + { + break; + } + + regval = 0; + + if ((value.value32 & IMGSENSOR_LOCK_EXPOSURE) + == IMGSENSOR_LOCK_EXPOSURE) + { + regval |= REGVAL_CPUEXT_BIT_AESTOP; + } + + if ((value.value32 & IMGSENSOR_LOCK_WHITE_BALANCE) + == IMGSENSOR_LOCK_WHITE_BALANCE) + { + regval |= REGVAL_CPUEXT_BIT_AWBSTOP; + } + + ret = isx012_putreg(priv, + ISX012_REG_3ALOCK, + regval, + ISX012_SIZE_3ALOCK); + + break; + + case IMGSENSOR_ID_3A_PARAMETER: + + /* AWB parameter : red */ + + ret = isx012_putreg(priv, INIT_CONT_INR, value.p_u16[0], 2); + ret = isx012_putreg(priv, INIT_CONT_OUTR, value.p_u16[0], 2); + + /* AWB parameter : blue */ + + ret = isx012_putreg(priv, INIT_CONT_INB, value.p_u16[1], 2); + ret = isx012_putreg(priv, INIT_CONT_OUTB, value.p_u16[1], 2); + + /* AE parameter */ + + ret = isx012_putreg(priv, AE_START_LEVEL, value.p_u16[2], 2); + + break; + + case IMGSENSOR_ID_JPEG_QUALITY: + ret = VALIDATE_VALUE(value.value32, + ISX012_MIN_JPGQUALITY, + ISX012_MAX_JPGQUALITY, + ISX012_STEP_JPGQUALITY); + if (ret != OK) + { + break; + } + + ret = isx012_putreg(priv, + ISX012_REG_JPGQUALITY, + value.value32, + ISX012_SIZE_JPGQUALITY); + break; + + default: /* Unsupported control id */ + + break; + } + + return ret; +} + +static int isx012_set_shd(FAR isx012_dev_t *priv) +{ + int ret; + int unit_cnt; + int size_cnt; + + /* At first, disable CXC and SHD */ + + ret = isx012_putreg(priv, SHD_EN, 0x50, 1); + if (ret < 0) + { + verr("isx012_putreg(disable CXC/SHD) failed: %d\n", ret); + return ret; + } + + /* Set CXC Validity */ + + ret = isx012_putreg(priv, CXC_VALID, 0x8282, 2); + if (ret < 0) + { + verr("isx012_putreg(CXC_VALID) failed: %d\n", ret); + return ret; + } + + /* Set CXC R Gb data */ + + for (unit_cnt = 0; unit_cnt < CXC_RGB_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < CXC_RGB_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + CXC_RGB_UNIT(unit_cnt, size_cnt), + g_isx012_cxc_rgb_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + verr("isx012_putreg(CXC R Gb) failed: %d\n", ret); + return ret; + } + } + } + + /* Set CXC G Rb data */ + + for (unit_cnt = 0; unit_cnt < CXC_GRB_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < CXC_GRB_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + CXC_GRB_UNIT(unit_cnt, size_cnt), + g_isx012_cxc_grb_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + verr("isx012_putreg(CXC G Rb) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD Validity */ + + ret = isx012_putreg(priv, SHD_VALID, 0x9191, 2); + if (ret < 0) + { + verr("isx012_putreg(SHD_VALID) failed: %d\n", ret); + return ret; + } + + /* Set SHD R Gb data */ + + for (unit_cnt = 0; unit_cnt < SHD_RGB_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_RGB_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_RGB_UNIT(unit_cnt, size_cnt), + g_isx012_shd_rgb_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + verr("isx012_putreg(SHD R Gb) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD G Rb data */ + + for (unit_cnt = 0; unit_cnt < SHD_GRB_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_GRB_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_GRB_UNIT(unit_cnt, size_cnt), + g_isx012_shd_grb_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + verr("isx012_putreg(SHD G Rb) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD R1 data */ + + for (unit_cnt = 0; unit_cnt < SHD_R1_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_R1_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_R1_UNIT(unit_cnt, size_cnt), + g_isx012_shd_r1_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + verr("isx012_putreg(SHD R1) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD R2 data */ + + for (unit_cnt = 0; unit_cnt < SHD_R2_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_R2_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_R2_UNIT(unit_cnt, size_cnt), + g_isx012_shd_r2_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + verr("isx012_putreg(SHD R2) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD B2 data */ + + for (unit_cnt = 0; unit_cnt < SHD_B2_DATA_UNIT_NUM; unit_cnt++) + { + for (size_cnt = 0; size_cnt < SHD_B2_DATA_UNIT_SIZE; size_cnt++) + { + ret = isx012_putreg(priv, + SHD_B2_UNIT(unit_cnt, size_cnt), + g_isx012_shd_b2_data[unit_cnt][size_cnt], + 1); + if (ret < 0) + { + verr("isx012_putreg(SHD B2) failed: %d\n", ret); + return ret; + } + } + } + + /* Set SHD thresholds data */ + + ret = isx012_putreglist(priv, g_isx012_shd_thresholds, + ISX012_SHD_THRESHOLDS_NENTRIES); + if (ret < 0) + { + verr("isx012_putreglist failed(SHD thresholds): %d\n", ret); + board_isx012_set_reset(); + return ret; + } + + /* Set SHD white balance data */ + + ret = isx012_putreglist(priv, g_isx012_shd_wb, ISX012_SHD_WB_NENTRIES); + if (ret < 0) + { + verr("isx012_putreglist(SHD white balance) failed: %d\n", ret); + board_isx012_set_reset(); + return ret; + } + + /* Enable CXC and SHD */ + + ret = isx012_putreg(priv, SHD_EN, 0x57, 1); + if (ret < 0) + { + verr("isx012_putreg(enable CXC/SHD) failed: %d\n", ret); + return ret; + } + + return OK; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +int isx012_initialize(FAR struct i2c_master_s *i2c) +{ + FAR struct isx012_dev_s *priv = &g_isx012_private; + + /* Save i2c information */ + + priv->i2c = i2c; + priv->i2c_addr = ISX012_I2C_SLV_ADDR; + priv->i2c_freq = I2CFREQ_STANDARD; + + /* Regiser image sensor operations variable */ + + imgsensor_register(&g_isx012_ops); + + /* Initialize other information */ + + priv->state = STATE_ISX012_POWEROFF; + + return OK; +} + +int isx012_uninitialize(void) +{ + /* No procedure */ + + return OK; +} diff --git a/include/nuttx/video/isx012_range.h b/drivers/video/isx012_range.h similarity index 87% rename from include/nuttx/video/isx012_range.h rename to drivers/video/isx012_range.h index 22534fd636c..698ba9d8d27 100644 --- a/include/nuttx/video/isx012_range.h +++ b/drivers/video/isx012_range.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/nuttx/video/isx012_range.h + * drivers/video/isx012_range.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -29,7 +29,6 @@ /* Definition for control brightness */ #define ISX012_TYPE_BRIGHTNESS V4L2_CTRL_TYPE_INTEGER -#define ISX012_NAME_BRIGHTNESS "Brightness" #define ISX012_DEF_BRIGHTNESS (0) #define ISX012_MIN_BRIGHTNESS (-128) #define ISX012_MAX_BRIGHTNESS (127) @@ -40,7 +39,6 @@ /* Definition for control contrast */ #define ISX012_TYPE_CONTRAST V4L2_CTRL_TYPE_U8FIXEDPOINT_Q7 -#define ISX012_NAME_CONTRAST "Contrast" #define ISX012_DEF_CONTRAST (0x80) #define ISX012_MIN_CONTRAST (0x00) #define ISX012_MAX_CONTRAST (0xFF) @@ -51,7 +49,6 @@ /* Definition for control saturation */ #define ISX012_TYPE_SATURATION V4L2_CTRL_TYPE_INTEGER -#define ISX012_NAME_SATURATION "Saturation" #define ISX012_DEF_SATURATION (0) #define ISX012_MIN_SATURATION (0) #define ISX012_MAX_SATURATION (255) @@ -62,7 +59,6 @@ /* Definition for control hue */ #define ISX012_TYPE_HUE V4L2_CTRL_TYPE_INTEGER -#define ISX012_NAME_HUE "Hue" #define ISX012_DEF_HUE (0) #define ISX012_MIN_HUE (0) #define ISX012_MAX_HUE (255) @@ -73,7 +69,6 @@ /* Definition for control auto white balance */ #define ISX012_TYPE_AUTOWB V4L2_CTRL_TYPE_BOOLEAN -#define ISX012_NAME_AUTOWB "Automatic white balance" #define ISX012_DEF_AUTOWB true #define ISX012_MIN_AUTOWB false #define ISX012_MAX_AUTOWB true @@ -84,7 +79,6 @@ /* Definition for control red balance */ #define ISX012_TYPE_REDBALANCE V4L2_CTRL_TYPE_INTEGER -#define ISX012_NAME_REDBALANCE "Red balance" #define ISX012_DEF_REDBALANCE (0) #define ISX012_MIN_REDBALANCE (0) #define ISX012_MAX_REDBALANCE (65535) @@ -95,7 +89,6 @@ /* Definition for control blue balance */ #define ISX012_TYPE_BLUEBALANCE V4L2_CTRL_TYPE_INTEGER -#define ISX012_NAME_BLUEBALANCE "Red balance" #define ISX012_DEF_BLUEBALANCE (0) #define ISX012_MIN_BLUEBALANCE (0) #define ISX012_MAX_BLUEBALANCE (65535) @@ -106,7 +99,6 @@ /* Definition for control gamma curve */ #define ISX012_TYPE_GAMMACURVE V4L2_CTRL_TYPE_U16 -#define ISX012_NAME_GAMMACURVE "Gamma adjustment(curve)" #define ISX012_DEF_GAMMACURVE (0) #define ISX012_MIN_GAMMACURVE (0) #define ISX012_MAX_GAMMACURVE (511) @@ -119,7 +111,6 @@ /* Definition for control exposure value */ #define ISX012_TYPE_EXPOSURE V4L2_CTRL_TYPE_INTEGER_TIMES_3 -#define ISX012_NAME_EXPOSURE "Exposure value" #define ISX012_DEF_EXPOSURE (0) #define ISX012_MIN_EXPOSURE (-6) #define ISX012_MAX_EXPOSURE (6) @@ -130,7 +121,6 @@ /* Definition for control horizontal mirroring(V4L2_BUF_TYPE_VIDEO_CAPTURE) */ #define ISX012_TYPE_HFLIP V4L2_CTRL_TYPE_BOOLEAN -#define ISX012_NAME_HFLIP "Mirror horizontally(VIDEO)" #define ISX012_DEF_HFLIP false #define ISX012_MIN_HFLIP false #define ISX012_MAX_HFLIP true @@ -141,7 +131,6 @@ /* Definition for control vertical mirroring(V4L2_BUF_TYPE_VIDEO_CAPTURE) */ #define ISX012_TYPE_VFLIP V4L2_CTRL_TYPE_BOOLEAN -#define ISX012_NAME_VFLIP "Mirror vertically(VIDEO)" #define ISX012_DEF_VFLIP false #define ISX012_MIN_VFLIP false #define ISX012_MAX_VFLIP true @@ -152,7 +141,6 @@ /* Definition for control horizontal mirroring(V4L2_BUF_TYPE_STILL_CAPTURE) */ #define ISX012_TYPE_HFLIP_STILL V4L2_CTRL_TYPE_BOOLEAN -#define ISX012_NAME_HFLIP_STILL "Mirror horizontally(STILL)" #define ISX012_DEF_HFLIP_STILL false #define ISX012_MIN_HFLIP_STILL false #define ISX012_MAX_HFLIP_STILL true @@ -163,7 +151,6 @@ /* Definition for control vertical mirroring(V4L2_BUF_TYPE_STILL_CAPTURE) */ #define ISX012_TYPE_VFLIP_STILL V4L2_CTRL_TYPE_BOOLEAN -#define ISX012_NAME_VFLIP_STILL "Mirror vertically(STILL)" #define ISX012_DEF_VFLIP_STILL false #define ISX012_MIN_VFLIP_STILL false #define ISX012_MAX_VFLIP_STILL true @@ -174,7 +161,6 @@ /* Definition for control sharpness */ #define ISX012_TYPE_SHARPNESS V4L2_CTRL_TYPE_INTEGER -#define ISX012_NAME_SHARPNESS "Sharpness" #define ISX012_DEF_SHARPNESS (0) #define ISX012_MIN_SHARPNESS (0) #define ISX012_MAX_SHARPNESS (255) @@ -185,7 +171,6 @@ /* Definition for control color killer */ #define ISX012_TYPE_COLORKILLER V4L2_CTRL_TYPE_BOOLEAN -#define ISX012_NAME_COLORKILLER "Color killer" #define ISX012_DEF_COLORKILLER false #define ISX012_MIN_COLORKILLER false #define ISX012_MAX_COLORKILLER true @@ -196,7 +181,6 @@ /* Definition for control color effect */ #define ISX012_TYPE_COLOREFFECT V4L2_CTRL_TYPE_INTEGER_MENU -#define ISX012_NAME_COLOREFFECT "Color effect" #define ISX012_DEF_COLOREFFECT V4L2_COLORFX_NONE #define ISX012_MIN_COLOREFFECT (0) #define ISX012_MAX_COLOREFFECT (6) @@ -207,7 +191,6 @@ /* Definition for control auto exposure */ #define ISX012_TYPE_EXPOSUREAUTO V4L2_CTRL_TYPE_INTEGER -#define ISX012_NAME_EXPOSUREAUTO "Auto Exposure" #define ISX012_DEF_EXPOSUREAUTO (0) #define ISX012_MIN_EXPOSUREAUTO (0) #define ISX012_MAX_EXPOSUREAUTO (1) @@ -220,10 +203,9 @@ /* Definition for control exposure time */ #define ISX012_TYPE_EXPOSURETIME V4L2_CTRL_TYPE_INTEGER -#define ISX012_NAME_EXPOSURETIME "Exposure time(usec)" #define ISX012_DEF_EXPOSURETIME (0) #define ISX012_MIN_EXPOSURETIME (1) -#define ISX012_MAX_EXPOSURETIME (10000) +#define ISX012_MAX_EXPOSURETIME (21000) #define ISX012_STEP_EXPOSURETIME (1) #define ISX012_REG_EXPOSURETIME SHT_PREMODE_TYPE1 #define ISX012_SIZE_EXPOSURETIME (2) @@ -233,7 +215,6 @@ /* Definition for control photometry */ #define ISX012_TYPE_PHOTOMETRY V4L2_CTRL_TYPE_INTEGER_MENU -#define ISX012_NAME_PHOTOMETRY "Photometry" #define ISX012_DEF_PHOTOMETRY V4L2_EXPOSURE_METERING_AVERAGE #define ISX012_MIN_PHOTOMETRY (0) #define ISX012_MAX_PHOTOMETRY (3) @@ -244,7 +225,6 @@ /* Definition for control zoom */ #define ISX012_TYPE_ZOOM V4L2_CTRL_TYPE_U16FIXEDPOINT_Q8 -#define ISX012_NAME_ZOOM "Zoom" #define ISX012_DEF_ZOOM (0x0100) #define ISX012_MIN_ZOOM (0x0100) #define ISX012_MAX_ZOOM (0x1000) @@ -255,7 +235,6 @@ /* Definition for control preset white balance */ #define ISX012_TYPE_PRESETWB V4L2_CTRL_TYPE_INTEGER_MENU -#define ISX012_NAME_PRESETWB "Preset white balance" #define ISX012_DEF_PRESETWB V4L2_WHITE_BALANCE_AUTO #define ISX012_MIN_PRESETWB (0) #define ISX012_MAX_PRESETWB (5) @@ -266,7 +245,6 @@ /* Definition for control YGAMMA adujust */ #define ISX012_TYPE_YGAMMA V4L2_CTRL_TYPE_BOOLEAN -#define ISX012_NAME_YGAMMA "Wide dynamic range" #define ISX012_DEF_YGAMMA (false) #define ISX012_MIN_YGAMMA (false) #define ISX012_MAX_YGAMMA (true) @@ -277,7 +255,6 @@ /* Definition for control ISO sensitivity */ #define ISX012_TYPE_ISO V4L2_CTRL_TYPE_INTEGER_MENU -#define ISX012_NAME_ISO "ISO sensitivity" #define ISX012_DEF_ISO (0) #define ISX012_MIN_ISO (0) #define ISX012_MAX_ISO (18) @@ -288,7 +265,6 @@ /* Definition for control ISO automatic */ #define ISX012_TYPE_ISOAUTO V4L2_CTRL_TYPE_INTEGER_MENU -#define ISX012_NAME_ISOAUTO "Automatic ISO sensitivity" #define ISX012_DEF_ISOAUTO (false) #define ISX012_MIN_ISOAUTO (0) #define ISX012_MAX_ISOAUTO (1) @@ -301,7 +277,6 @@ /* Definition for control 3A lock */ #define ISX012_TYPE_3ALOCK V4L2_CTRL_TYPE_BITMASK -#define ISX012_NAME_3ALOCK "Lock AWB/AE" #define ISX012_DEF_3ALOCK (0) #define ISX012_MIN_3ALOCK (0) #define ISX012_MAX_3ALOCK (3) @@ -312,8 +287,7 @@ /* Definition for control JPEG compression quality */ #define ISX012_TYPE_JPGQUALITY V4L2_CTRL_TYPE_INTEGER -#define ISX012_NAME_JPGQUALITY "JPEG compression quality" -#define ISX012_DEF_JPGQUALITY (75) +#define ISX012_DEF_JPGQUALITY (80) #define ISX012_MIN_JPGQUALITY (1) #define ISX012_MAX_JPGQUALITY (100) #define ISX012_STEP_JPGQUALITY (1) diff --git a/include/nuttx/video/isx012_reg.h b/drivers/video/isx012_reg.h similarity index 98% rename from include/nuttx/video/isx012_reg.h rename to drivers/video/isx012_reg.h index 35976eb136d..143d8f1d53e 100644 --- a/include/nuttx/video/isx012_reg.h +++ b/drivers/video/isx012_reg.h @@ -1,5 +1,5 @@ /**************************************************************************** - * include/nuttx/video/isx012_reg.h + * drivers/video/isx012_reg.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -41,6 +41,8 @@ #define MODE_BASE (0x6A00) #define PICT_BASE (0x6C00) #define GAMMA_BASE (0x7000) +#define GAMMA1_BASE (0x7200) +#define GAMMA2_BASE (0x7400) #define JPEG_BASE (0x7800) #define AUTOCOM_BASE (0x7C00) #define VFRMPARA_BASE (0x8800) @@ -777,6 +779,18 @@ #define G0_0CLIP_B (GAMMA_BASE+0x0044) #define G0_KNOT_GAINCTRL_TH_L (GAMMA_BASE+0x0046) #define G0_KNOT_GAINCTRL_TH_H (GAMMA_BASE+0x0047) +#define G1_LOWGM_ON_R (GAMMA1_BASE+0x003A) +#define G1_0CLIP_R (GAMMA1_BASE+0x003C) +#define G1_LOWGM_ON_G (GAMMA1_BASE+0x003E) +#define G1_0CLIP_G (GAMMA1_BASE+0x0040) +#define G1_LOWGM_ON_B (GAMMA1_BASE+0x0042) +#define G1_0CLIP_B (GAMMA1_BASE+0x0044) +#define G2_LOWGM_ON_R (GAMMA2_BASE+0x003A) +#define G2_0CLIP_R (GAMMA2_BASE+0x003C) +#define G2_LOWGM_ON_G (GAMMA2_BASE+0x003E) +#define G2_0CLIP_G (GAMMA2_BASE+0x0040) +#define G2_LOWGM_ON_B (GAMMA2_BASE+0x0042) +#define G2_0CLIP_B (GAMMA2_BASE+0x0044) /* JPEG OFFSET */ diff --git a/drivers/video/max7456.c b/drivers/video/max7456.c index d341c981fdf..82f8b4e9725 100644 --- a/drivers/video/max7456.c +++ b/drivers/video/max7456.c @@ -1,38 +1,20 @@ /**************************************************************************** * drivers/video/max7456.c * - * Support for the Maxim MAX7456 Single-Channel Monochrome On-Screen - * Display with Integrated EEPROM (datasheet 19-0576; Rev 1; 8/08). + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Author: Bill Gatliff + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/video/video.c b/drivers/video/video.c index 33b3b5da5cd..e5bb203d0ae 100644 --- a/drivers/video/video.c +++ b/drivers/video/video.c @@ -25,10 +25,12 @@ #include +#include #include #include #include #include +#include #include #include @@ -38,7 +40,8 @@ #include -#include +#include +#include #include "video_framebuff.h" @@ -46,34 +49,17 @@ * Pre-processor Definitions ****************************************************************************/ -#define video_printf(format, ...) _info(format, ##__VA_ARGS__) - #define MAX_VIDEO_FILE_PATH (32) - -#define VIDEO_TRUE (1) -#define VIDEO_FALSE (0) +#define MAX_VIDEO_FMT (2) +#define VIDEO_FMT_MAIN (0) +#define VIDEO_FMT_SUB (1) #define VIDEO_REMAINING_CAPNUM_INFINITY (-1) -/* Debug option */ +#define VIDEO_SCENE_MAX (sizeof(g_video_scene_parameter) / \ + sizeof(video_scene_params_t)) -#ifdef CONFIG_DEBUG_VIDEO_ERROR -#define videoerr(format, ...) _err(format, ##__VA_ARGS__) -#else -#define videoerr(x...) -#endif - -#ifdef CONFIG_DEBUG_VIDEO_WARN -#define videowarn(format, ...) _warn(format, ##__VA_ARGS__) -#else -#define videowarn(x...) -#endif - -#ifdef CONFIG_DEBUG_VIDEO_INFO -#define videoinfo(format, ...) _info(format, ##__VA_ARGS__) -#else -#define videoinfo(x...) -#endif +#define VIDEO_ID(x, y) (((x) << 16) | y) /**************************************************************************** * Private Types @@ -81,44 +67,59 @@ enum video_state_e { - VIDEO_STATE_STREAMOFF = 0, /* DMA trigger event is not received */ - VIDEO_STATE_STREAMON = 1, /* DMA trigger event is received, - * but DMA is not operated. + VIDEO_STATE_STREAMOFF = 0, /* capture trigger event is not received */ + VIDEO_STATE_STREAMON = 1, /* capture trigger event is received, + * but capture is not operated. */ - VIDEO_STATE_DMA = 2, /* On DMA */ + VIDEO_STATE_CAPTURE = 2, /* On capture */ }; enum video_state_transition_cause { - CAUSE_VIDEO_STOP = 0, /* Stop DMA event for video stream */ - CAUSE_VIDEO_START = 1, /* Start DMA event for video stream */ + CAUSE_VIDEO_STOP = 0, /* Stop capture event for video stream */ + CAUSE_VIDEO_START = 1, /* Start capture event for video stream */ CAUSE_VIDEO_DQBUF = 2, /* DQBUF timing for video stream */ - CAUSE_STILL_STOP = 3, /* Stop DMA event for still stream */ - CAUSE_STILL_START = 4, /* Start DMA event for still stream */ + CAUSE_STILL_STOP = 3, /* Stop capture event for still stream */ + CAUSE_STILL_START = 4, /* Start capture event for still stream */ }; enum video_waitend_cause_e { - VIDEO_WAITEND_CAUSE_DMADONE = 0, + VIDEO_WAITEND_CAUSE_CAPTUREDONE = 0, VIDEO_WAITEND_CAUSE_DQCANCEL = 1, VIDEO_WAITEND_CAUSE_STILLSTOP = 2, }; -struct video_wait_dma_s +struct video_wait_capture_s { FAR sem_t dqbuf_wait_flg; - FAR vbuf_container_t *done_container; /* Save container which dma done */ + + /* Save container which capture is done */ + + FAR vbuf_container_t *done_container; enum video_waitend_cause_e waitend_cause; }; -typedef struct video_wait_dma_s video_wait_dma_t; +typedef struct video_wait_capture_s video_wait_capture_t; + +struct video_format_s +{ + uint16_t width; + uint16_t height; + uint32_t pixelformat; +}; + +typedef struct video_format_s video_format_t; struct video_type_inf_s { sem_t lock_state; enum video_state_e state; int32_t remaining_capnum; - video_wait_dma_t wait_dma; + video_wait_capture_t wait_capture; + uint8_t nr_fmt; + video_format_t fmt[MAX_VIDEO_FMT]; + struct v4l2_fract frame_interval; video_framebuff_t bufinf; }; @@ -129,13 +130,62 @@ struct video_mng_s FAR char *devpath; /* parameter of video_initialize() */ sem_t lock_open_num; uint8_t open_num; - FAR struct pollfd *poll_wait; /* poll(setup) information */ video_type_inf_t video_inf; video_type_inf_t still_inf; }; typedef struct video_mng_s video_mng_t; +struct video_scene_params_s +{ + uint8_t mode; /* enum v4l2_scene_mode */ + + int32_t brightness; + int32_t contrast; + int32_t saturation; + int32_t hue; + bool awb; + int32_t red; + int32_t blue; + int32_t gamma; + uint32_t gamma_curve_sz; + uint8_t *gamma_curve; + int32_t ev; + bool hflip_video; + bool vflip_video; + bool hflip_still; + bool vflip_still; + int32_t sharpness; + enum v4l2_colorfx colorfx; + bool auto_brightness; + int32_t rotate; + enum v4l2_exposure_auto_type ae; + int32_t exposure_time; + int32_t focus; + bool af; + int32_t zoom; + int32_t iris; + enum v4l2_auto_n_preset_white_balance wb; + int32_t wdr; + bool stabilization; + enum v4l2_iso_sensitivity_auto_type iso_auto; + int32_t iso; + enum v4l2_exposure_metering meter; + int32_t threea_lock; + enum v4l2_flash_led_mode led; + int32_t jpeg_quality; +}; + +typedef struct video_scene_params_s video_scene_params_t; + +struct video_parameter_name_s +{ + uint32_t id; + char *name; +}; + +typedef struct video_parameter_name_s video_parameter_name_t; + /**************************************************************************** * Private Function Prototypes ****************************************************************************/ @@ -145,9 +195,6 @@ typedef struct video_mng_s video_mng_t; static int video_open(FAR struct file *filep); static int video_close(FAR struct file *filep); static int video_ioctl(FAR struct file *filep, int cmd, unsigned long arg); -static int video_poll(FAR struct file *filep, - FAR struct pollfd *fds, - bool setup); /* Common function */ @@ -164,6 +211,10 @@ static bool is_taking_still_picture(FAR video_mng_t *vmng); static bool is_bufsize_sufficient(FAR video_mng_t *vmng, uint32_t bufsize); static void cleanup_resources(FAR video_mng_t *vmng); static bool is_sem_waited(FAR sem_t *sem); +static int save_scene_param(enum v4l2_scene_mode mode, + uint32_t id, + struct v4l2_ext_control *control); +static int video_complete_capture(uint8_t err_code, uint32_t datasize); /* internal function for each cmds of ioctl */ @@ -175,18 +226,16 @@ static int video_dqbuf(FAR struct video_mng_s *vmng, FAR struct v4l2_buffer *buf); static int video_cancel_dqbuf(FAR struct video_mng_s *vmng, enum v4l2_buf_type type); -static int video_enum_fmt(FAR struct v4l2_fmtdesc *fmt); -static int video_enum_framesizes(FAR struct v4l2_frmsizeenum *frmsize); static int video_s_fmt(FAR struct video_mng_s *priv, FAR struct v4l2_format *fmt); -static int video_enum_frameintervals(FAR struct v4l2_frmivalenum *frmival); static int video_s_parm(FAR struct video_mng_s *priv, FAR struct v4l2_streamparm *parm); static int video_streamon(FAR struct video_mng_s *vmng, FAR enum v4l2_buf_type *type); static int video_streamoff(FAR struct video_mng_s *vmng, FAR enum v4l2_buf_type *type); -static int video_do_halfpush(bool enable); +static int video_do_halfpush(FAR struct video_mng_s *priv, + bool enable); static int video_takepict_start(FAR struct video_mng_s *vmng, int32_t capture_num); static int video_takepict_stop(FAR struct video_mng_s *vmng, @@ -202,12 +251,11 @@ static int video_g_ext_ctrls(FAR struct video_mng_s *priv, FAR struct v4l2_ext_controls *ctrls); static int video_s_ext_ctrls(FAR struct video_mng_s *priv, FAR struct v4l2_ext_controls *ctrls); - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -static const struct video_devops_s *g_video_devops; +static int video_query_ext_ctrl_scene(FAR struct v4s_query_ext_ctrl_scene + *ctrl); +static int video_querymenu_scene(FAR struct v4s_querymenu_scene *menu); +static int video_g_ext_ctrls_scene(FAR struct v4s_ext_controls_scene *ctrls); +static int video_s_ext_ctrls_scene(FAR struct v4s_ext_controls_scene *ctrls); /**************************************************************************** * Private Data @@ -222,17 +270,135 @@ static const struct file_operations g_video_fops = 0, /* seek */ video_ioctl, /* ioctl */ #ifndef CONFIG_DISABLE_POLL - video_poll, /* poll */ + 0, /* poll */ #endif 0 /* unlink */ }; static bool is_initialized = false; -static FAR void *video_handler; -/**************************************************************************** - * Public Data - ****************************************************************************/ +enum v4l2_scene_mode g_video_scene_mode = V4L2_SCENE_MODE_NONE; +video_scene_params_t g_video_scene_parameter[] = +{ + { + .mode = V4L2_SCENE_MODE_NONE, + }, +#ifdef CONFIG_VIDEO_SCENE_BACKLIGHT + { + .mode = V4L2_SCENE_MODE_BACKLIGHT, + }, +#endif /* CONFIG_VIDEO_SCENE_BACKLIGHT */ +#ifdef CONFIG_VIDEO_SCENE_BEACHSNOW + { + .mode = V4L2_SCENE_MODE_BEACH_SNOW, + }, +#endif /* CONFIG_VIDEO_SCENE_BEACHSNOW */ +#ifdef CONFIG_VIDEO_SCENE_CANDLELIGHT + { + .mode = V4L2_SCENE_MODE_CANDLE_LIGHT, + }, +#endif /* CONFIG_VIDEO_SCENE_CANDLELIGHT */ +#ifdef CONFIG_VIDEO_SCENE_DAWNDUSK + { + .mode = V4L2_SCENE_MODE_DAWN_DUSK, + }, +#endif /* CONFIG_VIDEO_SCENE_DAWNDUSK */ +#ifdef CONFIG_VIDEO_SCENE_FALLCOLORS + { + .mode = V4L2_SCENE_MODE_FALL_COLORS, + }, +#endif /* CONFIG_VIDEO_SCENE_FALLCOLORS */ +#ifdef CONFIG_VIDEO_SCENE_FIREWORKS + { + .mode = V4L2_SCENE_MODE_FIREWORKS, + }, +#endif /* CONFIG_VIDEO_SCENE_FIREWORKS */ +#ifdef CONFIG_VIDEO_SCENE_LANDSCAPE + { + .mode = V4L2_SCENE_MODE_LANDSCAPE, + }, +#endif /* CONFIG_VIDEO_SCENE_LANDSCAPE */ +#ifdef CONFIG_VIDEO_SCENE_NIGHT + { + .mode = V4L2_SCENE_MODE_NIGHT, + }, +#endif /* CONFIG_VIDEO_SCENE_NIGHT */ +#ifdef CONFIG_VIDEO_SCENE_PARTYINDOOR + { + .mode = V4L2_SCENE_MODE_PARTY_INDOOR, + }, +#endif /* CONFIG_VIDEO_SCENE_PARTYINDOOR */ +#ifdef CONFIG_VIDEO_SCENE_PORTRAIT + { + .mode = V4L2_SCENE_MODE_PORTRAIT, + }, +#endif /* CONFIG_VIDEO_SCENE_PORTRAIT */ +#ifdef CONFIG_VIDEO_SCENE_SPORTS + { + .mode = V4L2_SCENE_MODE_SPORTS, + }, +#endif /* CONFIG_VIDEO_SCENE_SPORTS */ +#ifdef CONFIG_VIDEO_SCENE_SUNSET + { + .mode = V4L2_SCENE_MODE_SUNSET, + }, +#endif /* CONFIG_VIDEO_SCENE_SUNSET */ +#ifdef CONFIG_VIDEO_SCENE_TEXT + { + .mode = V4L2_SCENE_MODE_TEXT, + }, +#endif /* CONFIG_VIDEO_SCENE_TEXT */ +}; + +static video_parameter_name_t g_video_parameter_name[] = +{ + {IMGSENSOR_ID_BRIGHTNESS, "Brightness"}, + {IMGSENSOR_ID_CONTRAST, "Contrast"}, + {IMGSENSOR_ID_SATURATION, "Saturation"}, + {IMGSENSOR_ID_HUE, "Hue"}, + {IMGSENSOR_ID_AUTO_WHITE_BALANCE, "Automatic white balance"}, + {IMGSENSOR_ID_RED_BALANCE, "Red balance"}, + {IMGSENSOR_ID_BLUE_BALANCE, "Blue balance"}, + {IMGSENSOR_ID_GAMMA, "Gamma value"}, + {IMGSENSOR_ID_GAMMA_CURVE, "Gamma adjustment(curve)"}, + {IMGSENSOR_ID_EXPOSURE, "Exposure value"}, + {IMGSENSOR_ID_HFLIP_VIDEO, "Mirror horizontally(VIDEO)"}, + {IMGSENSOR_ID_VFLIP_VIDEO, "Mirror vertically(VIDEO)"}, + {IMGSENSOR_ID_HFLIP_STILL, "Mirror horizontally(STILL)"}, + {IMGSENSOR_ID_VFLIP_STILL, "Mirror vertically(STILL)"}, + {IMGSENSOR_ID_SHARPNESS, "Sharpness"}, + {IMGSENSOR_ID_COLOR_KILLER, "Color killer"}, + {IMGSENSOR_ID_COLORFX, "Color effect"}, + {IMGSENSOR_ID_AUTOBRIGHTNESS, "Auto brightness"}, + {IMGSENSOR_ID_ROTATE, "Rotate"}, + {IMGSENSOR_ID_EXPOSURE_AUTO, "Auto Exposure"}, + {IMGSENSOR_ID_EXPOSURE_ABSOLUTE, "Exposure time(100 usec)"}, + {IMGSENSOR_ID_FOCUS_ABSOLUTE, "Focus(absolute value)"}, + {IMGSENSOR_ID_FOCUS_RELATIVE, "Focus(relative value)"}, + {IMGSENSOR_ID_FOCUS_AUTO, "Continuous Auto Focus"}, + {IMGSENSOR_ID_ZOOM_ABSOLUTE, "Zoom(absolute value)"}, + {IMGSENSOR_ID_ZOOM_RELATIVE, "Zoom(relative value)"}, + {IMGSENSOR_ID_ZOOM_CONTINUOUS, "Continuous zoom"}, + {IMGSENSOR_ID_IRIS_ABSOLUTE, "Iris(absolute value)"}, + {IMGSENSOR_ID_IRIS_RELATIVE, "Iris(relative value)"}, + {IMGSENSOR_ID_AUTO_N_PRESET_WB, "Preset white balance"}, + {IMGSENSOR_ID_WIDE_DYNAMIC_RANGE, "Wide dynamic range"}, + {IMGSENSOR_ID_IMG_STABILIZATION, "Image stabilization"}, + {IMGSENSOR_ID_ISO_SENSITIVITY, "ISO sensitivity"}, + {IMGSENSOR_ID_ISO_SENSITIVITY_AUTO, "Automatic ISO sensitivity"}, + {IMGSENSOR_ID_EXPOSURE_METERING, "Photometry"}, + {IMGSENSOR_ID_3A_LOCK, "Lock AWB/AE"}, + {IMGSENSOR_ID_AUTO_FOCUS_START, "Start single Auto Focus"}, + {IMGSENSOR_ID_AUTO_FOCUS_STOP, "Stop single Auto Focus"}, + {IMGSENSOR_ID_3A_PARAMETER, "3A parameter"}, + {IMGSENSOR_ID_3A_STATUS, "3A status"}, + {IMGSENSOR_ID_FLASH_LED_MODE, "LED mode"}, + {IMGSENSOR_ID_JPEG_QUALITY, "JPEG compression quality"} +}; + +static FAR void *video_handler; +static FAR const struct imgsensor_ops_s *g_video_sensor_ops; +static FAR const struct imgdata_ops_s *g_video_data_ops; /**************************************************************************** * Private Functions @@ -299,13 +465,13 @@ static enum video_state_e estimate_next_video_state } else { - return VIDEO_STATE_DMA; + return VIDEO_STATE_CAPTURE; } case CAUSE_STILL_STOP: if (current_state == VIDEO_STATE_STREAMON) { - return VIDEO_STATE_DMA; + return VIDEO_STATE_CAPTURE; } else { @@ -313,7 +479,7 @@ static enum video_state_e estimate_next_video_state } case CAUSE_STILL_START: - if (current_state == VIDEO_STATE_DMA) + if (current_state == VIDEO_STATE_CAPTURE) { return VIDEO_STATE_STREAMON; } @@ -326,7 +492,7 @@ static enum video_state_e estimate_next_video_state if ((current_state == VIDEO_STATE_STREAMON) && !is_taking_still_picture(vmng)) { - return VIDEO_STATE_DMA; + return VIDEO_STATE_CAPTURE; } else { @@ -338,23 +504,137 @@ static enum video_state_e estimate_next_video_state } } +static void convert_to_imgdatafmt(FAR video_format_t *video, + FAR imgdata_format_t *data) +{ + ASSERT(video && data); + + data->width = video->width; + data->height = video->height; + switch (video->pixelformat) + { + case V4L2_PIX_FMT_UYVY : + data->pixelformat = IMGDATA_PIX_FMT_UYVY; + break; + + case V4L2_PIX_FMT_RGB565 : + data->pixelformat = IMGDATA_PIX_FMT_RGB565; + break; + + case V4L2_PIX_FMT_JPEG : + data->pixelformat = IMGDATA_PIX_FMT_JPEG; + break; + + default : /* V4L2_PIX_FMT_JPEG_WITH_SUBIMG */ + data->pixelformat = IMGDATA_PIX_FMT_JPEG_WITH_SUBIMG; + break; + } +} + +static void convert_to_imgsensorfmt(FAR video_format_t *video, + FAR imgsensor_format_t *sensor) +{ + ASSERT(video && sensor); + + sensor->width = video->width; + sensor->height = video->height; + switch (video->pixelformat) + { + case V4L2_PIX_FMT_UYVY : + sensor->pixelformat = IMGSENSOR_PIX_FMT_UYVY; + break; + + case V4L2_PIX_FMT_RGB565 : + sensor->pixelformat = IMGSENSOR_PIX_FMT_RGB565; + break; + + case V4L2_PIX_FMT_JPEG : + sensor->pixelformat = IMGSENSOR_PIX_FMT_JPEG; + break; + + default : /* V4L2_PIX_FMT_JPEG_WITH_SUBIMG */ + sensor->pixelformat = IMGSENSOR_PIX_FMT_JPEG_WITH_SUBIMG; + break; + } +} + +static void convert_to_imgdatainterval(FAR struct v4l2_fract *video, + FAR imgdata_interval_t *data) +{ + ASSERT(video && data); + + data->numerator = video->numerator; + data->denominator = video->denominator; +} + +static void convert_to_imgsensorinterval(FAR struct v4l2_fract *video, + FAR imgsensor_interval_t *sensor) +{ + ASSERT(video && sensor); + + sensor->numerator = video->numerator; + sensor->denominator = video->denominator; +} + +static int start_capture(enum v4l2_buf_type type, + uint8_t nr_fmt, + FAR video_format_t *fmt, + FAR struct v4l2_fract *interval, + uint32_t bufaddr, uint32_t bufsize) +{ + imgdata_format_t df[MAX_VIDEO_FMT]; + imgsensor_format_t sf[MAX_VIDEO_FMT]; + imgdata_interval_t di; + imgsensor_interval_t si; + + ASSERT(fmt && interval && g_video_sensor_ops && g_video_data_ops); + + if ((g_video_sensor_ops->start_capture == NULL) || + (g_video_data_ops->start_capture == NULL) || + (g_video_data_ops->set_buf == NULL)) + { + return -ENOTTY; + } + + convert_to_imgdatafmt(&fmt[VIDEO_FMT_MAIN], &df[IMGDATA_FMT_MAIN]); + convert_to_imgdatafmt(&fmt[VIDEO_FMT_SUB], &df[IMGDATA_FMT_SUB]); + convert_to_imgdatainterval(interval, &di); + convert_to_imgsensorfmt(&fmt[VIDEO_FMT_MAIN], &sf[IMGSENSOR_FMT_MAIN]); + convert_to_imgsensorfmt(&fmt[VIDEO_FMT_SUB], &sf[IMGSENSOR_FMT_SUB]); + convert_to_imgsensorinterval(interval, &si); + + g_video_sensor_ops->start_capture + ((type == V4L2_BUF_TYPE_VIDEO_CAPTURE) ? + IMGSENSOR_STREAM_TYPE_VIDEO : IMGSENSOR_STREAM_TYPE_STILL, + nr_fmt, + sf, + &si); + g_video_data_ops->start_capture(nr_fmt, df, &di, video_complete_capture); + g_video_data_ops->set_buf((uint8_t *)bufaddr, bufsize); + + return OK; +} + static void change_video_state(FAR video_mng_t *vmng, enum video_state_e next_state) { enum video_state_e current_state = vmng->video_inf.state; enum video_state_e updated_next_state = next_state; - FAR vbuf_container_t *dma_container; + FAR vbuf_container_t *container; - if ((current_state != VIDEO_STATE_DMA) && - (next_state == VIDEO_STATE_DMA)) + if ((current_state != VIDEO_STATE_CAPTURE) && + (next_state == VIDEO_STATE_CAPTURE)) { - dma_container = - video_framebuff_get_dma_container(&vmng->video_inf.bufinf); - if (dma_container) + container = + video_framebuff_get_vacant_container(&vmng->video_inf.bufinf); + if (container) { - g_video_devops->set_buftype(V4L2_BUF_TYPE_VIDEO_CAPTURE); - g_video_devops->set_buf(dma_container->buf.m.userptr, - dma_container->buf.length); + start_capture(V4L2_BUF_TYPE_VIDEO_CAPTURE, + vmng->video_inf.nr_fmt, + vmng->video_inf.fmt, + &vmng->video_inf.frame_interval, + container->buf.m.userptr, + container->buf.length); } else { @@ -363,10 +643,10 @@ static void change_video_state(FAR video_mng_t *vmng, } else { - if ((current_state == VIDEO_STATE_DMA) && - (next_state != VIDEO_STATE_DMA)) + if ((current_state == VIDEO_STATE_CAPTURE) && + (next_state != VIDEO_STATE_CAPTURE)) { - g_video_devops->cancel_dma(); + g_video_data_ops->stop_capture(); } } @@ -378,7 +658,7 @@ static void change_video_state(FAR video_mng_t *vmng, static bool is_taking_still_picture(FAR video_mng_t *vmng) { return ((vmng->still_inf.state == VIDEO_STATE_STREAMON) || - (vmng->still_inf.state == VIDEO_STATE_DMA)); + (vmng->still_inf.state == VIDEO_STATE_CAPTURE)); } static bool is_bufsize_sufficient(FAR video_mng_t *vmng, uint32_t bufsize) @@ -388,21 +668,196 @@ static bool is_bufsize_sufficient(FAR video_mng_t *vmng, uint32_t bufsize) return true; } +static void initialize_frame_setting(FAR uint8_t *nr_fmt, + FAR video_format_t *fmt, + FAR struct v4l2_fract *interval) +{ + ASSERT(nr_fmt && fmt && interval); + + /* Initial setting : QVGA YUV4:2:2 15FPS */ + + *nr_fmt = 1; + fmt[VIDEO_FMT_MAIN].width = VIDEO_HSIZE_QVGA; + fmt[VIDEO_FMT_MAIN].height = VIDEO_VSIZE_QVGA; + fmt[VIDEO_FMT_MAIN].pixelformat = V4L2_PIX_FMT_UYVY; + interval->denominator = 15; + interval->numerator = 1; +} + static void initialize_streamresources(FAR video_type_inf_t *type_inf) { memset(type_inf, 0, sizeof(video_type_inf_t)); type_inf->remaining_capnum = VIDEO_REMAINING_CAPNUM_INFINITY; nxsem_init(&type_inf->lock_state, 0, 1); - nxsem_init(&type_inf->wait_dma.dqbuf_wait_flg, 0, 0); + nxsem_init(&type_inf->wait_capture.dqbuf_wait_flg, 0, 0); + initialize_frame_setting(&type_inf->nr_fmt, + type_inf->fmt, + &type_inf->frame_interval); video_framebuff_init(&type_inf->bufinf); return; } +static int32_t get_default_value(uint32_t id) +{ + int ret; + imgsensor_supported_value_t value; + + if ((g_video_sensor_ops == NULL) || + (g_video_sensor_ops->get_supported_value == NULL)) + { + return -EINVAL; + } + + ret = g_video_sensor_ops->get_supported_value(id, &value); + if (ret != OK) + { + /* Don't care(unsupported parameter) */ + + return 0; + } + + switch (value.type) + { + case IMGSENSOR_CTRL_TYPE_INTEGER_MENU: + return value.u.discrete.default_value; + + case IMGSENSOR_CTRL_TYPE_U8: + case IMGSENSOR_CTRL_TYPE_U16: + case IMGSENSOR_CTRL_TYPE_U32: + + /* Don't care */ + + return 0; + + default: + return value.u.range.default_value; + } +} + +static int32_t initialize_scene_gamma(uint8_t **gamma) +{ + int ret; + imgsensor_supported_value_t sup_val; + imgsensor_value_t val; + int32_t sz; + + *gamma = NULL; + + ASSERT(g_video_sensor_ops); + + if ((g_video_sensor_ops->get_supported_value == NULL) || + (g_video_sensor_ops->get_value == NULL)) + { + return -ENOTTY; + } + + ret = g_video_sensor_ops->get_supported_value + (IMGSENSOR_ID_GAMMA_CURVE, &sup_val); + if (ret != OK) + { + /* Unsupported parameter */ + + return -EINVAL; + } + + switch (sup_val.type) + { + case IMGSENSOR_CTRL_TYPE_U8: + sz = sup_val.u.elems.nr_elems * sizeof(uint8_t); + if (sz / sizeof(uint8_t) != sup_val.u.elems.nr_elems) + { + /* Multiplication overflow */ + + return -EINVAL; + } + + break; + + case IMGSENSOR_CTRL_TYPE_U16: + sz = sup_val.u.elems.nr_elems * sizeof(uint16_t); + if (sz / sizeof(uint16_t) != sup_val.u.elems.nr_elems) + { + /* Multiplication overflow */ + + return -EINVAL; + } + + break; + + default: /* IMGSENSOR_CTRL_TYPE_U32 */ + sz = sup_val.u.elems.nr_elems * sizeof(uint32_t); + if (sz / sizeof(uint32_t) != sup_val.u.elems.nr_elems) + { + /* Multiplication overflow */ + + return -EINVAL; + } + + break; + } + + *gamma = malloc(sz); + val.p_u8 = (uint8_t *)*gamma; + g_video_sensor_ops->get_value(IMGSENSOR_ID_GAMMA_CURVE, sz, &val); + return sz; +} + +static void initialize_scene_parameter(video_scene_params_t *sp) +{ + ASSERT(sp); + + sp->brightness = get_default_value(IMGSENSOR_ID_BRIGHTNESS); + sp->contrast = get_default_value(IMGSENSOR_ID_CONTRAST); + sp->saturation = get_default_value(IMGSENSOR_ID_SATURATION); + sp->hue = get_default_value(IMGSENSOR_ID_HUE); + sp->awb = get_default_value(IMGSENSOR_ID_AUTO_WHITE_BALANCE); + sp->red = get_default_value(IMGSENSOR_ID_RED_BALANCE); + sp->blue = get_default_value(IMGSENSOR_ID_BLUE_BALANCE); + sp->gamma = get_default_value(IMGSENSOR_ID_GAMMA); + sp->gamma_curve_sz = initialize_scene_gamma(&sp->gamma_curve); + sp->ev = get_default_value(IMGSENSOR_ID_EXPOSURE); + sp->hflip_video = get_default_value(IMGSENSOR_ID_HFLIP_VIDEO); + sp->vflip_video = get_default_value(IMGSENSOR_ID_VFLIP_VIDEO); + sp->hflip_still = get_default_value(IMGSENSOR_ID_HFLIP_STILL); + sp->vflip_still = get_default_value(IMGSENSOR_ID_VFLIP_STILL); + sp->sharpness = get_default_value(IMGSENSOR_ID_SHARPNESS); + sp->colorfx = get_default_value(IMGSENSOR_ID_COLORFX); + sp->auto_brightness = get_default_value(IMGSENSOR_ID_AUTOBRIGHTNESS); + sp->rotate = get_default_value(IMGSENSOR_ID_ROTATE); + sp->ae = get_default_value(IMGSENSOR_ID_EXPOSURE_AUTO); + sp->exposure_time = get_default_value(IMGSENSOR_ID_EXPOSURE_ABSOLUTE); + sp->focus = get_default_value(IMGSENSOR_ID_FOCUS_ABSOLUTE); + sp->af = get_default_value(IMGSENSOR_ID_FOCUS_AUTO); + sp->zoom = get_default_value(IMGSENSOR_ID_ZOOM_ABSOLUTE); + sp->iris = get_default_value(IMGSENSOR_ID_IRIS_ABSOLUTE); + sp->wb = get_default_value(IMGSENSOR_ID_AUTO_N_PRESET_WB); + sp->wdr = get_default_value(IMGSENSOR_ID_WIDE_DYNAMIC_RANGE); + sp->stabilization = get_default_value(IMGSENSOR_ID_IMG_STABILIZATION); + sp->iso_auto = get_default_value(IMGSENSOR_ID_ISO_SENSITIVITY_AUTO); + sp->iso = get_default_value(IMGSENSOR_ID_ISO_SENSITIVITY); + sp->meter = get_default_value(IMGSENSOR_ID_EXPOSURE_METERING); + sp->threea_lock = get_default_value(IMGSENSOR_ID_3A_LOCK); + sp->led = get_default_value(IMGSENSOR_ID_FLASH_LED_MODE); + sp->jpeg_quality = get_default_value(IMGSENSOR_ID_JPEG_QUALITY); +} + +static void initialize_scenes_parameter(void) +{ + int i; + video_scene_params_t *sp = &g_video_scene_parameter[0]; + + for (i = 0; i < VIDEO_SCENE_MAX; i++) + { + initialize_scene_parameter(sp++); + } +} + static void initialize_resources(FAR video_mng_t *vmng) { initialize_streamresources(&vmng->video_inf); initialize_streamresources(&vmng->still_inf); + initialize_scenes_parameter(); return; } @@ -410,7 +865,7 @@ static void initialize_resources(FAR video_mng_t *vmng) static void cleanup_streamresources(FAR video_type_inf_t *type_inf) { video_framebuff_uninit(&type_inf->bufinf); - nxsem_destroy(&type_inf->wait_dma.dqbuf_wait_flg); + nxsem_destroy(&type_inf->wait_capture.dqbuf_wait_flg); nxsem_destroy(&type_inf->lock_state); memset(type_inf, 0, sizeof(video_type_inf_t)); type_inf->remaining_capnum = VIDEO_REMAINING_CAPNUM_INFINITY; @@ -418,20 +873,42 @@ static void cleanup_streamresources(FAR video_type_inf_t *type_inf) return; } +static void cleanup_scene_parameter(video_scene_params_t *sp) +{ + ASSERT(sp); + + if (sp->gamma_curve) + { + free(sp->gamma_curve); + } +} + +static void cleanup_scenes_parameter(void) +{ + int i; + video_scene_params_t *sp = &g_video_scene_parameter[0]; + + for (i = 0; i < VIDEO_SCENE_MAX; i++, sp++) + { + cleanup_scene_parameter(sp); + } +} + static void cleanup_resources(FAR video_mng_t *vmng) { /* clean up resource */ - if ((vmng->video_inf.state == VIDEO_STATE_DMA) || - (vmng->still_inf.state == VIDEO_STATE_DMA)) + if ((vmng->video_inf.state == VIDEO_STATE_CAPTURE) || + (vmng->still_inf.state == VIDEO_STATE_CAPTURE)) { - /* If in DMA, stop */ + /* If in capture, stop */ - g_video_devops->cancel_dma(); + g_video_data_ops->stop_capture(); } cleanup_streamresources(&vmng->video_inf); cleanup_streamresources(&vmng->still_inf); + cleanup_scenes_parameter(); return; } @@ -463,10 +940,14 @@ static int video_open(FAR struct file *filep) { /* Only in first execution, open device */ - ret = g_video_devops->open(priv); + ret = g_video_sensor_ops->init(); if (ret == OK) { - initialize_resources(priv); + ret = g_video_data_ops->init(); + if (ret == OK) + { + initialize_resources(priv); + } } } @@ -499,7 +980,8 @@ static int video_close(FAR struct file *filep) if (priv->open_num == 0) { cleanup_resources(priv); - g_video_devops->close(); + g_video_sensor_ops->uninit(); + g_video_data_ops->uninit(); } video_unlock(&priv->lock_open_num); @@ -527,9 +1009,9 @@ static int video_reqbufs(FAR struct video_mng_s *vmng, flags = enter_critical_section(); - if (type_inf->state == VIDEO_STATE_DMA) + if (type_inf->state == VIDEO_STATE_CAPTURE) { - /* In DMA, REQBUFS is not permitted */ + /* In capture, REQBUFS is not permitted */ ret = -EPERM; } @@ -595,13 +1077,17 @@ static int video_qbuf(FAR struct video_mng_s *vmng, } else { - container = video_framebuff_get_dma_container(&type_inf->bufinf); + container = video_framebuff_get_vacant_container + (&type_inf->bufinf); if (container) { - g_video_devops->set_buftype(buf->type); - g_video_devops->set_buf(container->buf.m.userptr, - container->buf.length); - type_inf->state = VIDEO_STATE_DMA; + start_capture(buf->type, + type_inf->nr_fmt, + type_inf->fmt, + &type_inf->frame_interval, + container->buf.m.userptr, + container->buf.length); + type_inf->state = VIDEO_STATE_CAPTURE; } } } @@ -638,17 +1124,17 @@ static int video_dqbuf(FAR struct video_mng_s *vmng, container = video_framebuff_dq_valid_container(&type_inf->bufinf); if (container == NULL) { - /* Not yet done DMA. Wait done */ + /* Not yet done capture. Wait done */ - dqbuf_wait_flg = &type_inf->wait_dma.dqbuf_wait_flg; + dqbuf_wait_flg = &type_inf->wait_capture.dqbuf_wait_flg; - /* Loop until semaphore is unlocked by DMA done or DQCANCEL */ + /* Loop until semaphore is unlocked by capture done or DQCANCEL */ do { if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) { - /* If start DMA condition is satisfied, start DMA */ + /* If start capture condition is satisfied, start capture */ flags = enter_critical_section(); next_video_state = estimate_next_video_state @@ -657,27 +1143,27 @@ static int video_dqbuf(FAR struct video_mng_s *vmng, leave_critical_section(flags); } - nxsem_wait(dqbuf_wait_flg); + nxsem_wait_uninterruptible(dqbuf_wait_flg); } - while (type_inf->wait_dma.waitend_cause == + while (type_inf->wait_capture.waitend_cause == VIDEO_WAITEND_CAUSE_STILLSTOP); - container = type_inf->wait_dma.done_container; + container = type_inf->wait_capture.done_container; if (!container) { - /* Waking up without DMA data means abort. + /* Waking up without captured data means abort. * Therefore, Check cause. */ - if (type_inf->wait_dma.waitend_cause + if (type_inf->wait_capture.waitend_cause == VIDEO_WAITEND_CAUSE_DQCANCEL) { return -ECANCELED; } } - type_inf->wait_dma.done_container = NULL; + type_inf->wait_capture.done_container = NULL; } memcpy(buf, &container->buf, sizeof(struct v4l2_buffer)); @@ -698,108 +1184,223 @@ static int video_cancel_dqbuf(FAR struct video_mng_s *vmng, return -EINVAL; } - if (!is_sem_waited(&type_inf->wait_dma.dqbuf_wait_flg)) + if (!is_sem_waited(&type_inf->wait_capture.dqbuf_wait_flg)) { /* In not waiting DQBUF case, return OK */ return OK; } - type_inf->wait_dma.waitend_cause = VIDEO_WAITEND_CAUSE_DQCANCEL; + type_inf->wait_capture.waitend_cause = VIDEO_WAITEND_CAUSE_DQCANCEL; - /* If DMA is done before nxsem_post, cause is overwritten */ + /* If capture is done before nxsem_post, cause is overwritten */ - nxsem_post(&type_inf->wait_dma.dqbuf_wait_flg); + nxsem_post(&type_inf->wait_capture.dqbuf_wait_flg); return OK; } -static int video_enum_fmt(FAR struct v4l2_fmtdesc *fmt) +static int validate_frame_setting(enum v4l2_buf_type type, + uint8_t nr_fmt, + FAR video_format_t *vfmt, + FAR struct v4l2_fract *interval) { int ret; + imgdata_format_t df[MAX_VIDEO_FMT]; + imgsensor_format_t sf[MAX_VIDEO_FMT]; + imgdata_interval_t di; + imgsensor_interval_t si; - if ((g_video_devops == NULL) || - (g_video_devops->get_range_of_fmt == NULL)) + ASSERT(vfmt && interval && g_video_sensor_ops && g_video_data_ops); + + if ((g_video_sensor_ops->validate_frame_setting == NULL) || + (g_video_data_ops->validate_frame_setting == NULL)) { - return -EINVAL; + return -ENOTTY; } - ret = g_video_devops->get_range_of_fmt(fmt); + /* Return OK only in case both image data driver and + * image sensor driver support. + */ - return ret; + convert_to_imgdatafmt(&vfmt[VIDEO_FMT_MAIN], &df[IMGDATA_FMT_MAIN]); + convert_to_imgdatafmt(&vfmt[VIDEO_FMT_SUB], &df[IMGDATA_FMT_SUB]); + convert_to_imgdatainterval(interval, &di); + convert_to_imgsensorfmt(&vfmt[VIDEO_FMT_MAIN], &sf[IMGSENSOR_FMT_MAIN]); + convert_to_imgsensorfmt(&vfmt[VIDEO_FMT_SUB], &sf[IMGSENSOR_FMT_SUB]); + convert_to_imgsensorinterval(interval, &si); + + ret = g_video_sensor_ops->validate_frame_setting(type, nr_fmt, sf, &si); + if (ret != OK) + { + return ret; + } + + return g_video_data_ops->validate_frame_setting(nr_fmt, df, &di); } -static int video_enum_framesizes(FAR struct v4l2_frmsizeenum *frmsize) +static int video_try_fmt(FAR struct video_mng_s *priv, + FAR struct v4l2_format *v4l2) { - int ret; + FAR video_type_inf_t *type_inf; + uint8_t nr_fmt; + video_format_t vf[MAX_VIDEO_FMT]; - if ((g_video_devops == NULL) || - (g_video_devops->get_range_of_framesize == NULL)) + ASSERT(priv && g_video_sensor_ops && g_video_data_ops); + + if ((g_video_sensor_ops->validate_frame_setting == NULL) || + (g_video_data_ops->validate_frame_setting == NULL)) + { + return -ENOTTY; + } + + if (v4l2 == NULL) { return -EINVAL; } - ret = g_video_devops->get_range_of_framesize(frmsize); - - return ret; -} - -static int video_try_fmt(FAR struct v4l2_format *fmt) -{ - int ret; - - if ((g_video_devops == NULL) || (g_video_devops->try_format == NULL)) + type_inf = get_video_type_inf(priv, v4l2->type); + if (type_inf == NULL) { return -EINVAL; } - ret = g_video_devops->try_format(fmt); + switch (v4l2->fmt.pix.pixelformat) + { + case V4L2_PIX_FMT_SUBIMG_UYVY: + case V4L2_PIX_FMT_SUBIMG_RGB565: + if (type_inf->fmt[VIDEO_FMT_MAIN].pixelformat + != V4L2_PIX_FMT_JPEG_WITH_SUBIMG) + { + return -EPERM; + } - return ret; + /* Validate both main image and subimage. */ + + nr_fmt = 2; + memcpy(&vf[VIDEO_FMT_MAIN], + &type_inf->fmt[VIDEO_FMT_MAIN], + sizeof(video_format_t)); + vf[VIDEO_FMT_SUB].width = v4l2->fmt.pix.width; + vf[VIDEO_FMT_SUB].height = v4l2->fmt.pix.height; + vf[VIDEO_FMT_SUB].pixelformat + = (v4l2->fmt.pix.pixelformat == V4L2_PIX_FMT_SUBIMG_UYVY) ? + V4L2_PIX_FMT_UYVY : V4L2_PIX_FMT_RGB565; + + break; + + case V4L2_PIX_FMT_UYVY: + case V4L2_PIX_FMT_RGB565: + case V4L2_PIX_FMT_JPEG: + case V4L2_PIX_FMT_JPEG_WITH_SUBIMG: + nr_fmt = 1; + vf[VIDEO_FMT_MAIN].width = v4l2->fmt.pix.width; + vf[VIDEO_FMT_MAIN].height = v4l2->fmt.pix.height; + vf[VIDEO_FMT_MAIN].pixelformat = v4l2->fmt.pix.pixelformat; + + break; + + default: + return -EINVAL; + } + + return validate_frame_setting(v4l2->type, + nr_fmt, + vf, + &type_inf->frame_interval); } static int video_s_fmt(FAR struct video_mng_s *priv, FAR struct v4l2_format *fmt) { int ret; + FAR video_type_inf_t *type_inf; - if ((g_video_devops == NULL) || (g_video_devops->set_format == NULL)) + ret = video_try_fmt(priv, fmt); + if (ret != 0) + { + return ret; + } + + type_inf = get_video_type_inf(priv, fmt->type); + if (type_inf == NULL) { return -EINVAL; } - ret = g_video_devops->set_format(fmt); - - return ret; -} - -static int video_enum_frameintervals(FAR struct v4l2_frmivalenum *frmival) -{ - int ret; - - if ((g_video_devops == NULL) || - (g_video_devops->get_range_of_frameinterval == NULL)) + if (type_inf->state != VIDEO_STATE_STREAMOFF) { - return -EINVAL; + return -EBUSY; } - ret = g_video_devops->get_range_of_frameinterval(frmival); + switch (fmt->fmt.pix.pixelformat) + { + case V4L2_PIX_FMT_SUBIMG_UYVY: + case V4L2_PIX_FMT_SUBIMG_RGB565: + if (type_inf->fmt[VIDEO_FMT_MAIN].pixelformat + != V4L2_PIX_FMT_JPEG_WITH_SUBIMG) + { + return -EPERM; + } - return ret; + type_inf->fmt[VIDEO_FMT_SUB].width = fmt->fmt.pix.width; + type_inf->fmt[VIDEO_FMT_SUB].height = fmt->fmt.pix.height; + type_inf->fmt[VIDEO_FMT_SUB].pixelformat + = (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_SUBIMG_UYVY) ? + V4L2_PIX_FMT_UYVY : V4L2_PIX_FMT_RGB565; + type_inf->nr_fmt = 2; + break; + + default: + type_inf->fmt[VIDEO_FMT_MAIN].width = fmt->fmt.pix.width; + type_inf->fmt[VIDEO_FMT_MAIN].height = fmt->fmt.pix.height; + type_inf->fmt[VIDEO_FMT_MAIN].pixelformat + = fmt->fmt.pix.pixelformat; + type_inf->nr_fmt = 1; + break; + } + + return OK; } static int video_s_parm(FAR struct video_mng_s *priv, FAR struct v4l2_streamparm *parm) { int ret; + FAR video_type_inf_t *type_inf; - if ((g_video_devops == NULL) || - (g_video_devops->set_frameinterval == NULL)) + ASSERT(g_video_sensor_ops && g_video_data_ops); + + if ((g_video_sensor_ops->validate_frame_setting == NULL) || + (g_video_data_ops->validate_frame_setting == NULL) || + (parm == NULL)) { return -EINVAL; } - ret = g_video_devops->set_frameinterval(parm); + type_inf = get_video_type_inf(priv, parm->type); + if (type_inf == NULL) + { + return -EINVAL; + } + + if (type_inf->state != VIDEO_STATE_STREAMOFF) + { + return -EBUSY; + } + + ret = validate_frame_setting(parm->type, + type_inf->nr_fmt, + type_inf->fmt, + &parm->parm.capture.timeperframe); + if (ret != OK) + { + return ret; + } + + memcpy(&type_inf->frame_interval, + &parm->parm.capture.timeperframe, + sizeof(struct v4l2_fract)); return ret; } @@ -891,14 +1492,29 @@ static int video_streamoff(FAR struct video_mng_s *vmng, return ret; } -static int video_do_halfpush(bool enable) +static int video_do_halfpush(FAR struct video_mng_s *priv, bool enable) { - if ((g_video_devops == NULL) || (g_video_devops->do_halfpush == NULL)) - { - return -EINVAL; - } + int ret; + struct v4l2_ext_controls ext_controls; + struct v4l2_ext_control control[2]; - return g_video_devops->do_halfpush(enable); + /* Replace to VIDIOC_S_EXT_CTRLS format */ + + control[0].id = V4L2_CID_3A_LOCK; + control[0].value = enable ? + (V4L2_LOCK_EXPOSURE | V4L2_LOCK_WHITE_BALANCE) : 0; + control[1].id = V4L2_CID_AUTO_FOCUS_START; + control[1].value = enable ? true : false; + + ext_controls.ctrl_class = V4L2_CTRL_CLASS_CAMERA; + ext_controls.count = 2; + ext_controls.controls = control; + + /* Execute VIDIOC_S_EXT_CTRLS */ + + ret = video_s_ext_ctrls(priv, &ext_controls); + + return ret; } static int video_takepict_start(FAR struct video_mng_s *vmng, @@ -906,7 +1522,8 @@ static int video_takepict_start(FAR struct video_mng_s *vmng, { irqstate_t flags; enum video_state_e next_video_state; - FAR vbuf_container_t *dma_container; + FAR vbuf_container_t *container; + int ret = OK; if (vmng == NULL) @@ -918,17 +1535,17 @@ static int video_takepict_start(FAR struct video_mng_s *vmng, if (vmng->still_inf.state != VIDEO_STATE_STREAMOFF) { - ret = -EPERM; + ret = -EPERM; } else { if (capture_num > 0) { - vmng->still_inf.remaining_capnum = capture_num; + vmng->still_inf.remaining_capnum = capture_num; } else { - vmng->still_inf.remaining_capnum = VIDEO_REMAINING_CAPNUM_INFINITY; + vmng->still_inf.remaining_capnum = VIDEO_REMAINING_CAPNUM_INFINITY; } /* Control video stream prior to still stream */ @@ -941,16 +1558,20 @@ static int video_takepict_start(FAR struct video_mng_s *vmng, leave_critical_section(flags); - dma_container = video_framebuff_get_dma_container - (&vmng->still_inf.bufinf); - if (dma_container) + container = video_framebuff_get_vacant_container + (&vmng->still_inf.bufinf); + if (container) { - /* Start video stream DMA */ + /* Start still stream capture */ - g_video_devops->set_buftype(V4L2_BUF_TYPE_STILL_CAPTURE); - g_video_devops->set_buf(dma_container->buf.m.userptr, - dma_container->buf.length); - vmng->still_inf.state = VIDEO_STATE_DMA; + start_capture(V4L2_BUF_TYPE_STILL_CAPTURE, + vmng->still_inf.nr_fmt, + vmng->still_inf.fmt, + &vmng->still_inf.frame_interval, + container->buf.m.userptr, + container->buf.length); + + vmng->still_inf.state = VIDEO_STATE_CAPTURE; } else { @@ -984,9 +1605,9 @@ static int video_takepict_stop(FAR struct video_mng_s *vmng, bool halfpush) else { flags = enter_critical_section(); - if (vmng->still_inf.state == VIDEO_STATE_DMA) + if (vmng->still_inf.state == VIDEO_STATE_CAPTURE) { - g_video_devops->cancel_dma(); + g_video_data_ops->stop_capture(); } leave_critical_section(flags); @@ -1020,14 +1641,8 @@ static int video_queryctrl(FAR struct v4l2_queryctrl *ctrl) /* Replace to VIDIOC_QUERY_EXT_CTRL format */ - ext_ctrl.ctrl_class = ctrl->ctrl_class; - ext_ctrl.id = ctrl->id; - ext_ctrl.type = ctrl->type; - ext_ctrl.minimum = ctrl->minimum; - ext_ctrl.maximum = ctrl->maximum; - ext_ctrl.step = ctrl->step; - ext_ctrl.default_value = ctrl->default_value; - ext_ctrl.flags = ctrl->flags; + ext_ctrl.ctrl_class = ctrl->ctrl_class; + ext_ctrl.id = ctrl->id; ret = video_query_ext_ctrl(&ext_ctrl); @@ -1059,34 +1674,161 @@ static int video_queryctrl(FAR struct v4l2_queryctrl *ctrl) return OK; } -static int video_query_ext_ctrl(FAR struct v4l2_query_ext_ctrl *ctrl) +static void set_parameter_name(uint32_t id, char *name) +{ + int cnt; + int size + = sizeof(g_video_parameter_name) / sizeof(video_parameter_name_t); + + for (cnt = 0; cnt < size; cnt++) + { + if (g_video_parameter_name[cnt].id == id) + { + break; + } + } + + ASSERT(cnt < size); + + /* copy size = 32 is due to V4L2 specification. */ + + strncpy(name, g_video_parameter_name[cnt].name, 32); +} + +static int video_query_ext_ctrl(FAR struct v4l2_query_ext_ctrl *attr) { int ret; + imgsensor_supported_value_t value; + imgsensor_capability_range_t *range = &value.u.range; + imgsensor_capability_discrete_t *disc = &value.u.discrete; + imgsensor_capability_elems_t *elem = &value.u.elems; - if ((g_video_devops == NULL) || - (g_video_devops->get_range_of_ctrlvalue == NULL)) + ASSERT(g_video_sensor_ops); + + if (g_video_sensor_ops->get_supported_value == NULL) + { + return -ENOTTY; + } + + if (attr == NULL) { return -EINVAL; } - ret = g_video_devops->get_range_of_ctrlvalue(ctrl); + if ((attr->ctrl_class == V4L2_CTRL_CLASS_CAMERA) && + (attr->id == V4L2_CID_SCENE_MODE)) + { + /* Scene mode is processed in only video driver. */ - return ret; + attr->type = V4L2_CTRL_TYPE_INTEGER_MENU; + attr->minimum = 0; + attr->maximum = VIDEO_SCENE_MAX - 1; + attr->step = 1; + attr->default_value = 0; + strncpy(attr->name, "Scene Mode", 32); + } + else + { + ret = g_video_sensor_ops->get_supported_value + (VIDEO_ID(attr->ctrl_class, attr->id), + &value); + if (ret < 0) + { + return ret; + } + + attr->type = value.type; + + switch (value.type) + { + case IMGSENSOR_CTRL_TYPE_INTEGER_MENU: + attr->minimum = 0; + attr->maximum = disc->nr_values - 1; + attr->step = 1; + attr->default_value = disc->default_value; + break; + + case IMGSENSOR_CTRL_TYPE_U8: + case IMGSENSOR_CTRL_TYPE_U16: + case IMGSENSOR_CTRL_TYPE_U32: + attr->minimum = elem->minimum; + attr->maximum = elem->maximum; + attr->step = elem->step; + attr->elems = elem->nr_elems; + break; + + default: + attr->minimum = range->minimum; + attr->maximum = range->maximum; + attr->step = range->step; + attr->default_value = range->default_value; + break; + } + + set_parameter_name(VIDEO_ID(attr->ctrl_class, attr->id), + attr->name); + } + + return OK; } static int video_querymenu(FAR struct v4l2_querymenu *menu) { int ret; + imgsensor_supported_value_t value; - if ((g_video_devops == NULL) || - (g_video_devops->get_menu_of_ctrlvalue == NULL)) + ASSERT(g_video_sensor_ops); + + if (g_video_sensor_ops->get_supported_value == NULL) + { + return -ENOTTY; + } + + if (menu == NULL) { return -EINVAL; } - ret = g_video_devops->get_menu_of_ctrlvalue(menu); + if ((menu->ctrl_class == V4L2_CTRL_CLASS_CAMERA) && + (menu->id == V4L2_CID_SCENE_MODE)) + { + /* Scene mode is processed in only video driver. */ - return ret; + if (menu->index > VIDEO_SCENE_MAX - 1) + { + return -EINVAL; + } + + menu->value = g_video_scene_parameter[menu->index].mode; + } + else + { + ret = g_video_sensor_ops->get_supported_value + (VIDEO_ID(menu->ctrl_class, menu->id), + &value); + if (ret < 0) + { + return ret; + } + + if (value.type != IMGSENSOR_CTRL_TYPE_INTEGER_MENU) + { + /* VIDIOC_QUERYMENU is used only for + * IMGSENSOR_CTRL_TYPE_INTEGER_MENU. + */ + + return -EINVAL; + } + + if (menu->index >= value.u.discrete.nr_values) + { + return -EINVAL; + } + + menu->value = value.u.discrete.values[menu->index]; + } + + return OK; } static int video_g_ctrl(FAR struct video_mng_s *priv, @@ -1158,6 +1900,13 @@ static int video_g_ext_ctrls(FAR struct video_mng_s *priv, int cnt; FAR struct v4l2_ext_control *control; + ASSERT(g_video_sensor_ops); + + if (g_video_sensor_ops->get_value == NULL) + { + return -ENOTTY; + } + if ((priv == NULL) || (ctrls == NULL)) { return -EINVAL; @@ -1167,7 +1916,178 @@ static int video_g_ext_ctrls(FAR struct video_mng_s *priv, cnt < ctrls->count; cnt++, control++) { - ret = g_video_devops->get_ctrlvalue(ctrls->ctrl_class, control); + ret = g_video_sensor_ops->get_value + (VIDEO_ID(ctrls->ctrl_class, control->id), + control->size, + (imgsensor_value_t *)&control->value64); + if (ret < 0) + { + /* Set cnt in that error occurred */ + + ctrls->error_idx = cnt; + return ret; + } + } + + return ret; +} + +static int set_intvalue(uint32_t id, int32_t value32) +{ + imgsensor_value_t value; + + ASSERT(g_video_sensor_ops); + + if (g_video_sensor_ops->set_value == NULL) + { + return -ENOTTY; + } + + value.value32 = value32; + return g_video_sensor_ops->set_value(id, sizeof(int32_t), value); +} + +static int set_pvalue(uint32_t id, int size, void *pval) +{ + imgsensor_value_t value; + + ASSERT(g_video_sensor_ops); + + if (g_video_sensor_ops->set_value == NULL) + { + return -ENOTTY; + } + + value.p_u8 = (uint8_t *)pval; + return g_video_sensor_ops->set_value(id, size, value); +} + +static video_scene_params_t *search_scene_param(enum v4l2_scene_mode mode) +{ + int i; + video_scene_params_t *sp = &g_video_scene_parameter[0]; + + for (i = 0; i < VIDEO_SCENE_MAX; i++, sp++) + { + if (sp->mode == mode) + { + return sp; + } + } + + return NULL; +} + +static int reflect_scene_parameter(enum v4l2_scene_mode mode) +{ + video_scene_params_t *sp; + + sp = search_scene_param(mode); + if (sp == NULL) + { + /* Unsupported scene mode */ + + return -EINVAL; + } + + set_intvalue(IMGSENSOR_ID_BRIGHTNESS, sp->brightness); + set_intvalue(IMGSENSOR_ID_CONTRAST, sp->contrast); + set_intvalue(IMGSENSOR_ID_SATURATION, sp->saturation); + set_intvalue(IMGSENSOR_ID_HUE , sp->hue); + set_intvalue(IMGSENSOR_ID_AUTO_WHITE_BALANCE, sp->awb); + set_intvalue(IMGSENSOR_ID_RED_BALANCE , sp->red); + set_intvalue(IMGSENSOR_ID_BLUE_BALANCE, sp->blue); + set_intvalue(IMGSENSOR_ID_GAMMA, sp->gamma); + set_pvalue(IMGSENSOR_ID_GAMMA_CURVE, sp->gamma_curve_sz, sp->gamma_curve); + set_intvalue(IMGSENSOR_ID_EXPOSURE, sp->ev); + set_intvalue(IMGSENSOR_ID_HFLIP_VIDEO, sp->hflip_video); + set_intvalue(IMGSENSOR_ID_VFLIP_VIDEO, sp->vflip_video); + set_intvalue(IMGSENSOR_ID_HFLIP_STILL, sp->hflip_still); + set_intvalue(IMGSENSOR_ID_VFLIP_STILL, sp->vflip_still); + set_intvalue(IMGSENSOR_ID_SHARPNESS, sp->sharpness); + set_intvalue(IMGSENSOR_ID_COLORFX, sp->colorfx); + set_intvalue(IMGSENSOR_ID_AUTOBRIGHTNESS, sp->auto_brightness); + set_intvalue(IMGSENSOR_ID_ROTATE, sp->rotate); + set_intvalue(IMGSENSOR_ID_EXPOSURE_AUTO, sp->ae); + if ((sp->ae == V4L2_EXPOSURE_MANUAL) || + (sp->ae == V4L2_EXPOSURE_SHUTTER_PRIORITY)) + { + set_intvalue(IMGSENSOR_ID_EXPOSURE_ABSOLUTE, sp->exposure_time); + } + + set_intvalue(IMGSENSOR_ID_FOCUS_ABSOLUTE, sp->focus); + set_intvalue(IMGSENSOR_ID_FOCUS_AUTO, sp->af); + set_intvalue(IMGSENSOR_ID_ZOOM_ABSOLUTE, sp->zoom); + if ((sp->ae == V4L2_EXPOSURE_MANUAL) || + (sp->ae == V4L2_EXPOSURE_APERTURE_PRIORITY)) + { + set_intvalue(IMGSENSOR_ID_IRIS_ABSOLUTE, sp->iris); + } + + set_intvalue(IMGSENSOR_ID_AUTO_N_PRESET_WB, sp->wb); + set_intvalue(IMGSENSOR_ID_WIDE_DYNAMIC_RANGE, sp->wdr); + set_intvalue(IMGSENSOR_ID_IMG_STABILIZATION, sp->stabilization); + set_intvalue(IMGSENSOR_ID_ISO_SENSITIVITY_AUTO, sp->iso_auto); + if (sp->iso_auto == V4L2_ISO_SENSITIVITY_MANUAL) + { + set_intvalue(IMGSENSOR_ID_ISO_SENSITIVITY, sp->iso); + } + + set_intvalue(IMGSENSOR_ID_EXPOSURE_METERING, sp->meter); + set_intvalue(IMGSENSOR_ID_3A_LOCK, sp->threea_lock); + set_intvalue(IMGSENSOR_ID_FLASH_LED_MODE, sp->led); + set_intvalue(IMGSENSOR_ID_JPEG_QUALITY, sp->jpeg_quality); + + g_video_scene_mode = mode; + + return OK; +} + +static int video_s_ext_ctrls(FAR struct video_mng_s *priv, + FAR struct v4l2_ext_controls *ctrls) +{ + int ret = OK; + int cnt; + FAR struct v4l2_ext_control *control; + + ASSERT(g_video_sensor_ops); + + if (g_video_sensor_ops->set_value == NULL) + { + return -ENOTTY; + } + + if ((priv == NULL) || (ctrls == NULL)) + { + return -EINVAL; + } + + for (cnt = 0, control = ctrls->controls; + cnt < ctrls->count; + cnt++, control++) + { + if ((ctrls->ctrl_class == V4L2_CTRL_CLASS_CAMERA) && + (control->id == V4L2_CID_SCENE_MODE)) + { + ret = reflect_scene_parameter(control->value); + } + else + { + ret = g_video_sensor_ops->set_value + (VIDEO_ID(ctrls->ctrl_class, control->id), + control->size, + (imgsensor_value_t)control->value64); + if (ret == 0) + { + if (g_video_scene_mode == V4L2_SCENE_MODE_NONE) + { + save_scene_param + (V4L2_SCENE_MODE_NONE, + VIDEO_ID(ctrls->ctrl_class, control->id), + control); + } + } + } if (ret < 0) { @@ -1181,29 +2101,539 @@ static int video_g_ext_ctrls(FAR struct video_mng_s *priv, return ret; } -static int video_s_ext_ctrls(FAR struct video_mng_s *priv, - FAR struct v4l2_ext_controls *ctrls) +static int video_query_ext_ctrl_scene + (FAR struct v4s_query_ext_ctrl_scene *attr) +{ + if (attr == NULL) + { + return -EINVAL; + } + + return video_query_ext_ctrl(&attr->control); +} + +static int video_querymenu_scene(FAR struct v4s_querymenu_scene *menu) +{ + if (menu == NULL) + { + return -EINVAL; + } + + return video_querymenu(&menu->menu); +} + +static int read_scene_param(enum v4l2_scene_mode mode, + uint32_t id, + struct v4l2_ext_control *control) +{ + int ret = OK; + video_scene_params_t *sp; + imgsensor_supported_value_t value; + + ASSERT(g_video_sensor_ops); + + if (g_video_sensor_ops->get_supported_value == NULL) + { + return -ENOTTY; + } + + if (control == NULL) + { + return -EINVAL; + } + + sp = search_scene_param(mode); + if (sp == NULL) + { + /* Unsupported scene mode */ + + return -EINVAL; + } + + ret = g_video_sensor_ops->get_supported_value(id, &value); + if (ret < 0) + { + /* Unsupported camera parameter */ + + return ret; + } + + switch (id) + { + case IMGSENSOR_ID_BRIGHTNESS: + control->value = sp->brightness; + break; + + case IMGSENSOR_ID_CONTRAST: + control->value = sp->contrast; + break; + + case IMGSENSOR_ID_SATURATION: + control->value = sp->saturation; + break; + + case IMGSENSOR_ID_HUE: + control->value = sp->hue; + break; + + case IMGSENSOR_ID_AUTO_WHITE_BALANCE: + control->value = sp->awb; + break; + + case IMGSENSOR_ID_RED_BALANCE: + control->value = sp->red; + break; + + case IMGSENSOR_ID_BLUE_BALANCE: + control->value = sp->blue; + break; + + case IMGSENSOR_ID_GAMMA: + control->value = sp->gamma; + break; + + case IMGSENSOR_ID_GAMMA_CURVE: + memcpy(control->p_u8, + sp->gamma_curve, + sp->gamma_curve_sz); + break; + + case IMGSENSOR_ID_EXPOSURE: + control->value = sp->ev; + break; + + case IMGSENSOR_ID_HFLIP_VIDEO: + control->value = sp->hflip_video; + break; + + case IMGSENSOR_ID_VFLIP_VIDEO: + control->value = sp->vflip_video; + break; + + case IMGSENSOR_ID_HFLIP_STILL: + control->value = sp->hflip_still; + break; + + case IMGSENSOR_ID_VFLIP_STILL: + control->value = sp->vflip_still; + break; + + case IMGSENSOR_ID_SHARPNESS: + control->value = sp->sharpness; + break; + + case IMGSENSOR_ID_COLOR_KILLER: + control->value = (sp->colorfx == V4L2_COLORFX_BW) ? true : false; + break; + + case IMGSENSOR_ID_COLORFX: + control->value = sp->colorfx; + break; + + case IMGSENSOR_ID_AUTOBRIGHTNESS: + control->value = sp->auto_brightness; + break; + + case IMGSENSOR_ID_ROTATE: + control->value = sp->rotate; + break; + + case IMGSENSOR_ID_EXPOSURE_AUTO: + control->value = sp->ae; + break; + + case IMGSENSOR_ID_EXPOSURE_ABSOLUTE: + control->value = sp->exposure_time; + break; + + case IMGSENSOR_ID_FOCUS_ABSOLUTE: + control->value = sp->focus; + break; + + case IMGSENSOR_ID_FOCUS_AUTO: + control->value = sp->af; + break; + + case IMGSENSOR_ID_ZOOM_ABSOLUTE: + control->value = sp->zoom; + break; + + case IMGSENSOR_ID_IRIS_ABSOLUTE: + control->value = sp->iris; + break; + + case IMGSENSOR_ID_AUTO_N_PRESET_WB: + control->value = sp->wb; + break; + + case IMGSENSOR_ID_WIDE_DYNAMIC_RANGE: + control->value = sp->wdr; + break; + + case IMGSENSOR_ID_IMG_STABILIZATION: + control->value = sp->stabilization; + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY: + control->value = sp->iso; + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY_AUTO: + control->value = sp->iso_auto; + break; + + case IMGSENSOR_ID_EXPOSURE_METERING: + control->value = sp->meter; + break; + + case IMGSENSOR_ID_3A_LOCK: + control->value = sp->threea_lock; + break; + + case IMGSENSOR_ID_FLASH_LED_MODE: + control->value = sp->led; + break; + + case IMGSENSOR_ID_JPEG_QUALITY: + control->value = sp->jpeg_quality; + break; + + default: + ret = -EINVAL; + } + + return ret; +} + +static int video_g_ext_ctrls_scene(FAR struct v4s_ext_controls_scene *ctrls) { int ret = OK; int cnt; FAR struct v4l2_ext_control *control; - if ((priv == NULL) || (ctrls == NULL)) + if (ctrls == NULL) { return -EINVAL; } - for (cnt = 0, control = ctrls->controls; - cnt < ctrls->count; + for (cnt = 0, control = ctrls->control.controls; + cnt < ctrls->control.count; cnt++, control++) { - ret = g_video_devops->set_ctrlvalue(ctrls->ctrl_class, control); - - if (ret < 0) + ret = read_scene_param + (ctrls->mode, + VIDEO_ID(ctrls->control.ctrl_class, control->id), + control); + if (ret != OK) { - /* Set cnt in that error occurred */ + ctrls->control.error_idx = cnt; + return ret; + } + } - ctrls->error_idx = cnt; + return ret; +} + +static int check_range(int64_t value, + int64_t min, + int64_t max, + uint64_t step) +{ + if ((value < min) || + (value > max) || + ((value - min) % step != 0)) + { + return -EINVAL; + } + + return OK; +} + +static int save_scene_param(enum v4l2_scene_mode mode, + uint32_t id, + struct v4l2_ext_control *control) +{ + int ret; + int i; + video_scene_params_t *sp; + imgsensor_supported_value_t value; + imgsensor_capability_range_t *range = &value.u.range; + imgsensor_capability_discrete_t *disc = &value.u.discrete; + imgsensor_capability_elems_t *elem = &value.u.elems; + + ASSERT(g_video_sensor_ops); + + if (g_video_sensor_ops->get_supported_value == NULL) + { + return -ENOTTY; + } + + sp = search_scene_param(mode); + if (sp == NULL) + { + /* Unsupported scene mode */ + + return -EINVAL; + } + + ret = g_video_sensor_ops->get_supported_value(id, &value); + if (ret < 0) + { + /* Unsupported camera parameter */ + + return ret; + } + + switch (value.type) + { + case IMGSENSOR_CTRL_TYPE_INTEGER_MENU: + + for (i = 0; i < disc->nr_values; i++) + { + if (control->value == disc->values[i]) + { + break; + } + } + + if (i >= disc->nr_values) + { + return -EINVAL; + } + + break; + + case IMGSENSOR_CTRL_TYPE_U8: + + for (i = 0; i < elem->nr_elems; i++) + { + ret = check_range(control->p_u8[i], + elem->minimum, + elem->maximum, + elem->step); + if (ret != OK) + { + return ret; + } + } + + break; + + case IMGSENSOR_CTRL_TYPE_U16: + + for (i = 0; i < elem->nr_elems; i++) + { + ret = check_range(control->p_u16[i], + elem->minimum, + elem->maximum, + elem->step); + if (ret != OK) + { + return ret; + } + } + + break; + + case IMGSENSOR_CTRL_TYPE_U32: + + for (i = 0; i < elem->nr_elems; i++) + { + ret = check_range(control->p_u32[i], + elem->minimum, + elem->maximum, + elem->step); + if (ret != OK) + { + return ret; + } + } + + break; + + default: + ret = check_range(control->value, + range->minimum, + range->maximum, + range->step); + if (ret != OK) + { + return ret; + } + + break; + } + + switch (id) + { + case IMGSENSOR_ID_BRIGHTNESS: + sp->brightness = control->value; + break; + + case IMGSENSOR_ID_CONTRAST: + sp->contrast = control->value; + break; + + case IMGSENSOR_ID_SATURATION: + sp->saturation = control->value; + break; + + case IMGSENSOR_ID_HUE: + sp->hue = control->value; + break; + + case IMGSENSOR_ID_AUTO_WHITE_BALANCE: + sp->awb = control->value; + break; + + case IMGSENSOR_ID_RED_BALANCE: + sp->red = control->value; + break; + + case IMGSENSOR_ID_BLUE_BALANCE: + sp->blue = control->value; + break; + + case IMGSENSOR_ID_GAMMA: + sp->gamma = control->value; + break; + + case IMGSENSOR_ID_GAMMA_CURVE: + memcpy(sp->gamma_curve, + control->p_u8, + sp->gamma_curve_sz); + break; + + case IMGSENSOR_ID_EXPOSURE: + sp->ev = control->value; + break; + + case IMGSENSOR_ID_HFLIP_VIDEO: + sp->hflip_video = control->value; + break; + + case IMGSENSOR_ID_VFLIP_VIDEO: + sp->vflip_video = control->value; + break; + + case IMGSENSOR_ID_HFLIP_STILL: + sp->hflip_still = control->value; + break; + + case IMGSENSOR_ID_VFLIP_STILL: + sp->vflip_still = control->value; + break; + + case IMGSENSOR_ID_SHARPNESS: + sp->sharpness = control->value; + break; + + case IMGSENSOR_ID_COLOR_KILLER: + sp->colorfx = (control->value == true) ? + V4L2_COLORFX_BW : V4L2_COLORFX_NONE; + break; + + case IMGSENSOR_ID_COLORFX: + sp->colorfx = control->value; + break; + + case IMGSENSOR_ID_AUTOBRIGHTNESS: + sp->auto_brightness = control->value; + break; + + case IMGSENSOR_ID_ROTATE: + sp->rotate = control->value; + break; + + case IMGSENSOR_ID_EXPOSURE_AUTO: + sp->ae = control->value; + break; + + case IMGSENSOR_ID_EXPOSURE_ABSOLUTE: + sp->exposure_time = control->value; + break; + + case IMGSENSOR_ID_FOCUS_ABSOLUTE: + sp->focus = control->value; + break; + + case IMGSENSOR_ID_FOCUS_AUTO: + sp->af = control->value; + break; + + case IMGSENSOR_ID_ZOOM_ABSOLUTE: + sp->zoom = control->value; + break; + + case IMGSENSOR_ID_IRIS_ABSOLUTE: + sp->iris = control->value; + break; + + case IMGSENSOR_ID_AUTO_N_PRESET_WB: + sp->wb = control->value; + break; + + case IMGSENSOR_ID_WIDE_DYNAMIC_RANGE: + sp->wdr = control->value; + break; + + case IMGSENSOR_ID_IMG_STABILIZATION: + sp->stabilization = control->value; + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY: + sp->iso = control->value; + break; + + case IMGSENSOR_ID_ISO_SENSITIVITY_AUTO: + sp->iso_auto = control->value; + break; + + case IMGSENSOR_ID_EXPOSURE_METERING: + sp->meter = control->value; + break; + + case IMGSENSOR_ID_3A_LOCK: + sp->threea_lock = control->value; + break; + + case IMGSENSOR_ID_FLASH_LED_MODE: + sp->led = control->value; + break; + + case IMGSENSOR_ID_JPEG_QUALITY: + sp->jpeg_quality = control->value; + break; + + default: + return -EINVAL; + } + + return OK; +} + +static int video_s_ext_ctrls_scene(FAR struct v4s_ext_controls_scene *ctrls) +{ + int ret = OK; + int cnt; + FAR struct v4l2_ext_control *control; + + if (ctrls == NULL) + { + return -EINVAL; + } + + for (cnt = 0, control = ctrls->control.controls; + cnt < ctrls->control.count; + cnt++, control++) + { + ret = save_scene_param + (ctrls->mode, + VIDEO_ID(ctrls->control.ctrl_class, control->id), + control); + if (ret != OK) + { + ctrls->control.error_idx = cnt; return ret; } } @@ -1258,7 +2688,7 @@ static int video_ioctl(FAR struct file *filep, int cmd, unsigned long arg) break; case VIDIOC_DO_HALFPUSH: - ret = video_do_halfpush(arg); + ret = video_do_halfpush(priv, arg); break; @@ -1272,18 +2702,8 @@ static int video_ioctl(FAR struct file *filep, int cmd, unsigned long arg) break; - case VIDIOC_ENUM_FMT: - ret = video_enum_fmt((FAR struct v4l2_fmtdesc *)arg); - - break; - - case VIDIOC_ENUM_FRAMESIZES: - ret = video_enum_framesizes((FAR struct v4l2_frmsizeenum *)arg); - - break; - case VIDIOC_TRY_FMT: - ret = video_try_fmt((FAR struct v4l2_format *)arg); + ret = video_try_fmt(priv, (FAR struct v4l2_format *)arg); break; @@ -1292,11 +2712,6 @@ static int video_ioctl(FAR struct file *filep, int cmd, unsigned long arg) break; - case VIDIOC_ENUM_FRAMEINTERVALS: - ret = video_enum_frameintervals((FAR struct v4l2_frmivalenum *)arg); - - break; - case VIDIOC_S_PARM: ret = video_s_parm(priv, (FAR struct v4l2_streamparm *)arg); @@ -1337,8 +2752,31 @@ static int video_ioctl(FAR struct file *filep, int cmd, unsigned long arg) break; + case V4SIOC_QUERY_EXT_CTRL_SCENE: + ret = video_query_ext_ctrl_scene + ((FAR struct v4s_query_ext_ctrl_scene *)arg); + + break; + + case V4SIOC_QUERYMENU_SCENE: + ret = video_querymenu_scene((FAR struct v4s_querymenu_scene *)arg); + + break; + + case V4SIOC_G_EXT_CTRLS_SCENE: + ret = video_g_ext_ctrls_scene + ((FAR struct v4s_ext_controls_scene *)arg); + + break; + + case V4SIOC_S_EXT_CTRLS_SCENE: + ret = video_s_ext_ctrls_scene + ((FAR struct v4s_ext_controls_scene *)arg); + + break; + default: - videoerr("Unrecognized cmd: %d\n", cmd); + verr("Unrecognized cmd: %d\n", cmd); ret = - ENOTTY; break; } @@ -1346,46 +2784,6 @@ static int video_ioctl(FAR struct file *filep, int cmd, unsigned long arg) return ret; } -static int video_poll_setup(FAR struct video_mng_s *priv, - FAR struct pollfd *fds) -{ - if ((fds->events & POLLIN) == 0) - { - return -EDEADLK; - } - - /* TODO: If data exists, get and nxsem_post If no data, wait dma */ - - return OK; -} - -static int video_poll_teardown(FAR struct video_mng_s *priv, - FAR struct pollfd *fds) -{ - /* TODO: Delete poll wait information */ - - return OK; -} - -static int video_poll(FAR struct file *filep, - FAR struct pollfd *fds, - bool setup) -{ - FAR struct inode *inode = filep->f_inode; - FAR video_mng_t *priv = inode->i_private; - - if (setup) - { - return video_poll_setup(priv, fds); - } - else - { - return video_poll_teardown(priv, fds); - } - - return OK; -} - static FAR void *video_register(FAR const char *devpath) { FAR video_mng_t *priv; @@ -1413,7 +2811,7 @@ static FAR void *video_register(FAR const char *devpath) priv = (FAR video_mng_t *)kmm_malloc(sizeof(video_mng_t)); if (!priv) { - videoerr("Failed to allocate instance\n"); + verr("Failed to allocate instance\n"); return NULL; } @@ -1440,7 +2838,7 @@ static FAR void *video_register(FAR const char *devpath) ret = register_driver(priv->devpath, &g_video_fops, 0666, priv); if (ret < 0) { - videoerr("Failed to register driver: %d\n", ret); + verr("Failed to register driver: %d\n", ret); kmm_free(priv->devpath); kmm_free(priv); return NULL; @@ -1470,12 +2868,96 @@ static int video_unregister(FAR video_mng_t *v_mgr) return ret; } +/* Callback function which device driver call when capture has done. */ + +static int video_complete_capture(uint8_t err_code, uint32_t datasize) +{ + FAR video_mng_t *vmng = (FAR video_mng_t *)video_handler; + FAR video_type_inf_t *type_inf; + FAR vbuf_container_t *container = NULL; + enum v4l2_buf_type buf_type; + irqstate_t flags; + + flags = enter_critical_section(); + + buf_type = (vmng->still_inf.state == VIDEO_STATE_CAPTURE) ? + V4L2_BUF_TYPE_STILL_CAPTURE : V4L2_BUF_TYPE_VIDEO_CAPTURE; + + type_inf = get_video_type_inf(vmng, buf_type); + if (type_inf == NULL) + { + leave_critical_section(flags); + return -EINVAL; + } + + if (err_code == 0) + { + type_inf->bufinf.vbuf_curr->buf.flags = 0; + if (type_inf->remaining_capnum > 0) + { + type_inf->remaining_capnum--; + } + } + else + { + type_inf->bufinf.vbuf_curr->buf.flags = V4L2_BUF_FLAG_ERROR; + } + + type_inf->bufinf.vbuf_curr->buf.bytesused = datasize; + video_framebuff_capture_done(&type_inf->bufinf); + + if (is_sem_waited(&type_inf->wait_capture.dqbuf_wait_flg)) + { + /* If waiting capture in DQBUF, + * get/save container and unlock wait + */ + + type_inf->wait_capture.done_container + = video_framebuff_pop_curr_container(&type_inf->bufinf); + type_inf->wait_capture.waitend_cause + = VIDEO_WAITEND_CAUSE_CAPTUREDONE; + nxsem_post(&type_inf->wait_capture.dqbuf_wait_flg); + } + + if (type_inf->remaining_capnum == 0) + { + g_video_data_ops->stop_capture(); + type_inf->state = VIDEO_STATE_STREAMOFF; + + /* If stop still stream, notify it to video stream */ + + if ((buf_type == V4L2_BUF_TYPE_STILL_CAPTURE) && + is_sem_waited(&vmng->video_inf.wait_capture.dqbuf_wait_flg)) + { + vmng->video_inf.wait_capture.waitend_cause + = VIDEO_WAITEND_CAUSE_STILLSTOP; + nxsem_post(&vmng->video_inf.wait_capture.dqbuf_wait_flg); + } + } + else + { + container = video_framebuff_get_vacant_container(&type_inf->bufinf); + if (!container) + { + g_video_data_ops->stop_capture(); + type_inf->state = VIDEO_STATE_STREAMON; + } + else + { + g_video_data_ops->set_buf((uint8_t *)container->buf.m.userptr, + container->buf.length); + } + } + + leave_critical_section(flags); + return OK; +} + /**************************************************************************** * Public Functions ****************************************************************************/ -int video_initialize(FAR const char *devpath, - FAR const struct video_devops_s *devops) +int video_initialize(FAR const char *devpath) { if (is_initialized) { @@ -1484,8 +2966,6 @@ int video_initialize(FAR const char *devpath, video_handler = video_register(devpath); - g_video_devops = devops; - is_initialized = true; return OK; @@ -1500,88 +2980,18 @@ int video_uninitialize(void) video_unregister(video_handler); - g_video_devops = NULL; - is_initialized = false; return OK; } -int video_common_notify_dma_done(uint8_t err_code, - uint32_t buf_type, - uint32_t datasize, - FAR void *priv) +void imgsensor_register(const FAR struct imgsensor_ops_s *ops) { - FAR video_mng_t *vmng = (FAR video_mng_t *)priv; - FAR video_type_inf_t *type_inf; - FAR vbuf_container_t *container = NULL; - - type_inf = get_video_type_inf(vmng, buf_type); - if (type_inf == NULL) - { - return -EINVAL; - } - - if (err_code == 0) - { - type_inf->bufinf.vbuf_dma->buf.flags = 0; - if (type_inf->remaining_capnum > 0) - { - type_inf->remaining_capnum--; - } - } - else - { - type_inf->bufinf.vbuf_dma->buf.flags = V4L2_BUF_FLAG_ERROR; - } - - type_inf->bufinf.vbuf_dma->buf.bytesused = datasize; - video_framebuff_dma_done(&type_inf->bufinf); - - if (is_sem_waited(&type_inf->wait_dma.dqbuf_wait_flg)) - { - /* If waiting DMA done in DQBUF, - * get/save container and unlock wait - */ - - type_inf->wait_dma.done_container - = video_framebuff_pop_curr_container(&type_inf->bufinf); - type_inf->wait_dma.waitend_cause - = VIDEO_WAITEND_CAUSE_DMADONE; - nxsem_post(&type_inf->wait_dma.dqbuf_wait_flg); - - /* TODO: in poll wait, unlock wait */ - } - - if (type_inf->remaining_capnum == 0) - { - g_video_devops->cancel_dma(); - type_inf->state = VIDEO_STATE_STREAMOFF; - - /* If stop still stream, notify it to video stream */ - - if ((buf_type == V4L2_BUF_TYPE_STILL_CAPTURE) && - is_sem_waited(&vmng->video_inf.wait_dma.dqbuf_wait_flg)) - { - vmng->video_inf.wait_dma.waitend_cause - = VIDEO_WAITEND_CAUSE_STILLSTOP; - nxsem_post(&vmng->video_inf.wait_dma.dqbuf_wait_flg); - } - } - else - { - container = video_framebuff_get_dma_container(&type_inf->bufinf); - if (!container) - { - g_video_devops->cancel_dma(); - type_inf->state = VIDEO_STATE_STREAMON; - } - else - { - g_video_devops->set_buf(container->buf.m.userptr, - container->buf.length); - } - } - - return OK; + g_video_sensor_ops = ops; } + +void imgdata_register(const FAR struct imgdata_ops_s *ops) +{ + g_video_data_ops = ops; +} + diff --git a/drivers/video/video_framebuff.c b/drivers/video/video_framebuff.c index 37a5b9e2299..d4e93d1d210 100644 --- a/drivers/video/video_framebuff.c +++ b/drivers/video/video_framebuff.c @@ -39,11 +39,11 @@ static void init_buf_chain(video_framebuff_t *fbuf) int i; vbuf_container_t *tmp; - fbuf->vbuf_empty = fbuf->vbuf_alloced; - fbuf->vbuf_next_dma = NULL; - fbuf->vbuf_dma = NULL; - fbuf->vbuf_top = NULL; - fbuf->vbuf_tail = NULL; + fbuf->vbuf_empty = fbuf->vbuf_alloced; + fbuf->vbuf_next = NULL; + fbuf->vbuf_curr = NULL; + fbuf->vbuf_top = NULL; + fbuf->vbuf_tail = NULL; tmp = fbuf->vbuf_alloced; for (i = 0; i < fbuf->container_size - 1; i++) @@ -74,9 +74,9 @@ static inline vbuf_container_t *dequeue_vbuf_unsafe(video_framebuff_t *fbuf) vbuf_container_t *ret = fbuf->vbuf_top; if (is_last_one(fbuf)) { - fbuf->vbuf_top = NULL; - fbuf->vbuf_tail = NULL; - fbuf->vbuf_next_dma = NULL; + fbuf->vbuf_top = NULL; + fbuf->vbuf_tail = NULL; + fbuf->vbuf_next = NULL; } else { @@ -97,11 +97,11 @@ static inline vbuf_container_t *dequeue_vbuf_unsafe(video_framebuff_t *fbuf) void video_framebuff_init(video_framebuff_t *fbuf) { - fbuf->mode = V4L2_BUF_MODE_RING; - fbuf->vbuf_empty = NULL; - fbuf->vbuf_top = NULL; - fbuf->vbuf_tail = NULL; - fbuf->vbuf_next_dma = NULL; + fbuf->mode = V4L2_BUF_MODE_RING; + fbuf->vbuf_empty = NULL; + fbuf->vbuf_top = NULL; + fbuf->vbuf_tail = NULL; + fbuf->vbuf_next = NULL; nxsem_init(&fbuf->lock_empty, 0, 1); } @@ -135,7 +135,7 @@ int video_framebuff_realloc_container(video_framebuff_t *fbuf, int sz) if (sz > 0) { fbuf->vbuf_alloced - = (vbuf_container_t *)kmm_malloc(sizeof(vbuf_container_t)*sz); + = (vbuf_container_t *)kmm_malloc(sizeof(vbuf_container_t)*sz); if (fbuf->vbuf_alloced == NULL) { return -ENOMEM; @@ -154,7 +154,7 @@ vbuf_container_t *video_framebuff_get_container(video_framebuff_t *fbuf) { vbuf_container_t *ret; - nxsem_wait(&fbuf->lock_empty); + nxsem_wait_uninterruptible(&fbuf->lock_empty); ret = fbuf->vbuf_empty; if (ret) { @@ -170,7 +170,7 @@ vbuf_container_t *video_framebuff_get_container(video_framebuff_t *fbuf) void video_framebuff_free_container(video_framebuff_t *fbuf, vbuf_container_t *cnt) { - nxsem_wait(&fbuf->lock_empty); + nxsem_wait_uninterruptible(&fbuf->lock_empty); cnt->next = fbuf->vbuf_empty; fbuf->vbuf_empty = cnt; nxsem_post(&fbuf->lock_empty); @@ -186,15 +186,15 @@ void video_framebuff_queue_container(video_framebuff_t *fbuf, { fbuf->vbuf_tail->next = tgt; fbuf->vbuf_tail = tgt; - if (fbuf->vbuf_next_dma == NULL) + if (fbuf->vbuf_next == NULL) { - fbuf->vbuf_next_dma = tgt; + fbuf->vbuf_next = tgt; } } else { fbuf->vbuf_top = fbuf->vbuf_tail = tgt; - fbuf->vbuf_next_dma = tgt; + fbuf->vbuf_next = tgt; } if (fbuf->mode == V4L2_BUF_MODE_RING) @@ -215,7 +215,7 @@ vbuf_container_t *video_framebuff_dq_valid_container(video_framebuff_t *fbuf) vbuf_container_t *ret = NULL; flags = enter_critical_section(); - if (fbuf->vbuf_top != NULL && fbuf->vbuf_top != fbuf->vbuf_next_dma) + if (fbuf->vbuf_top != NULL && fbuf->vbuf_top != fbuf->vbuf_next) { ret = dequeue_vbuf_unsafe(fbuf); } @@ -225,25 +225,26 @@ vbuf_container_t *video_framebuff_dq_valid_container(video_framebuff_t *fbuf) return ret; } -vbuf_container_t *video_framebuff_get_dma_container(video_framebuff_t *fbuf) +vbuf_container_t *video_framebuff_get_vacant_container + (video_framebuff_t *fbuf) { irqstate_t flags; vbuf_container_t *ret; flags = enter_critical_section(); - ret = fbuf->vbuf_dma = fbuf->vbuf_next_dma; + ret = fbuf->vbuf_curr = fbuf->vbuf_next; leave_critical_section(flags); return ret; } -void video_framebuff_dma_done(video_framebuff_t *fbuf) +void video_framebuff_capture_done(video_framebuff_t *fbuf) { - fbuf->vbuf_dma = NULL; - if (fbuf->vbuf_next_dma) + fbuf->vbuf_curr = NULL; + if (fbuf->vbuf_next) { - fbuf->vbuf_next_dma = fbuf->vbuf_next_dma->next; - if (fbuf->vbuf_next_dma == fbuf->vbuf_top) /* RING mode case. */ + fbuf->vbuf_next = fbuf->vbuf_next->next; + if (fbuf->vbuf_next == fbuf->vbuf_top) /* RING mode case. */ { fbuf->vbuf_top = fbuf->vbuf_top->next; fbuf->vbuf_tail = fbuf->vbuf_tail->next; @@ -264,12 +265,12 @@ void video_framebuff_change_mode(video_framebuff_t *fbuf, if (mode == V4L2_BUF_MODE_RING) { fbuf->vbuf_tail->next = fbuf->vbuf_top; - fbuf->vbuf_next_dma = fbuf->vbuf_top; + fbuf->vbuf_next = fbuf->vbuf_top; } else { fbuf->vbuf_tail->next = NULL; - fbuf->vbuf_next_dma = fbuf->vbuf_top; + fbuf->vbuf_next = fbuf->vbuf_top; } } diff --git a/drivers/video/video_framebuff.h b/drivers/video/video_framebuff.h index 06feff3df91..beda4d45fcf 100644 --- a/drivers/video/video_framebuff.h +++ b/drivers/video/video_framebuff.h @@ -29,7 +29,7 @@ #include /**************************************************************************** - * Public Functions Definistions + * Public Types ****************************************************************************/ struct vbuf_container_s @@ -49,12 +49,16 @@ struct video_framebuff_s vbuf_container_t *vbuf_empty; vbuf_container_t *vbuf_top; vbuf_container_t *vbuf_tail; - vbuf_container_t *vbuf_dma; - vbuf_container_t *vbuf_next_dma; + vbuf_container_t *vbuf_curr; + vbuf_container_t *vbuf_next; }; typedef struct video_framebuff_s video_framebuff_t; +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + /* Buffer access interface. */ void video_framebuff_init @@ -71,13 +75,13 @@ void video_framebuff_queue_container (video_framebuff_t *fbuf, vbuf_container_t *tgt); vbuf_container_t *video_framebuff_dq_valid_container (video_framebuff_t *fbuf); -vbuf_container_t *video_framebuff_get_dma_container +vbuf_container_t *video_framebuff_get_vacant_container (video_framebuff_t *fbuf); vbuf_container_t *video_framebuff_pop_curr_container (video_framebuff_t *fbuf); -void video_framebuff_dma_done +void video_framebuff_capture_done (video_framebuff_t *fbuf); void video_framebuff_change_mode (video_framebuff_t *fbuf, enum v4l2_buf_mode mode); -#endif // __VIDEO_VIDEO_FRAMEBUFF_H__ +#endif // __VIDEO_VIDEO_FRAMEBUFF_H__ diff --git a/drivers/wireless/bluetooth/bt_uart.c b/drivers/wireless/bluetooth/bt_uart.c index b932251935c..2d3bbe092e1 100644 --- a/drivers/wireless/bluetooth/bt_uart.c +++ b/drivers/wireless/bluetooth/bt_uart.c @@ -1,12 +1,5 @@ /**************************************************************************** * drivers/wireless/bluetooth/bt_uart.c - * UART based Bluetooth driver - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/drivers/wireless/bluetooth/bt_uart.h b/drivers/wireless/bluetooth/bt_uart.h index 4156bba02f0..0b8bcc0f45f 100644 --- a/drivers/wireless/bluetooth/bt_uart.h +++ b/drivers/wireless/bluetooth/bt_uart.h @@ -1,12 +1,5 @@ /**************************************************************************** * drivers/wireless/bluetooth/bt_uart.h - * UART based Bluetooth driver - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/drivers/wireless/gs2200m.c b/drivers/wireless/gs2200m.c index 6364c9f2016..b7e729dcbbe 100644 --- a/drivers/wireless/gs2200m.c +++ b/drivers/wireless/gs2200m.c @@ -666,6 +666,12 @@ errout: memcpy(&msg->addr, &pkt_dat->addr, sizeof(pkt_dat->addr)); + /* Set the address family + * NOTE: gs2200m only supports IPv4 + */ + + msg->addr.sin_family = AF_INET; + /* In udp case, treat the packet separately */ ret = false; @@ -866,12 +872,6 @@ retry: _write_data(dev, hdr, sizeof(hdr)); - /* NOTE: busy wait 30us - * workaround to avoid an invalid frame response - */ - - up_udelay(30); - /* Wait for data ready */ while (!dev->lower->dready(NULL)) @@ -879,6 +879,12 @@ retry: /* TODO: timeout */ } + /* NOTE: busy wait 50us + * workaround to avoid an invalid frame response + */ + + up_udelay(50); + /* Read frame response */ _read_data(dev, res, sizeof(res)); diff --git a/drivers/wireless/ieee80211/bcm43xxx/Kconfig b/drivers/wireless/ieee80211/bcm43xxx/Kconfig index e46611693f2..6e5dcbfea91 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/Kconfig +++ b/drivers/wireless/ieee80211/bcm43xxx/Kconfig @@ -101,4 +101,19 @@ config IEEE80211_BROADCOM_NINTERFACES default 1 depends on EXPERIMENTAL +config IEEE80211_BROADCOM_DMABUF_ALIGNMENT + int "DMA buffer address alignment boundary" + default 4 + range 4 64 + ---help--- + This parameter should be set depending on + the used SOC DMA configuration. + +config IEEE80211_BROADCOM_FRAME_POOL_SIZE + int "SDPCM frame pool size" + default 8 + ---help--- + This parameter sets the size of the shared SDPCM frame pool + used for both RX and TX transfers. + endif # IEEE80211_BROADCOM_FULLMAC diff --git a/drivers/wireless/ieee80211/bcm43xxx/bcmf_bdc.c b/drivers/wireless/ieee80211/bcm43xxx/bcmf_bdc.c index c32305fd049..458d8a1e504 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/bcmf_bdc.c +++ b/drivers/wireless/ieee80211/bcm43xxx/bcmf_bdc.c @@ -48,30 +48,30 @@ * Private Types ****************************************************************************/ -struct __attribute__((packed)) bcmf_bdc_header +begin_packed_struct struct bcmf_bdc_header { uint8_t flags; /* bdc frame flags */ uint8_t priority; /* bdc frame priority */ uint8_t flags2; /* bdc frame additional flags */ uint8_t data_offset; /* Offset from end of header to payload data, in 4-bytes count */ -}; +} end_packed_struct; -struct __attribute__((packed)) bcmf_eth_header +begin_packed_struct struct bcmf_eth_header { uint16_t type; /* Vendor specific type */ uint16_t len; /* Event data length */ uint8_t version; /* Protocol version */ uint8_t oui[3]; /* Organizationally unique identifier */ uint16_t usr_type; /* User specific type */ -}; +} end_packed_struct; -struct __attribute__((packed)) bcmf_event_msg +begin_packed_struct struct bcmf_event_msg { struct ether_header eth; struct bcmf_eth_header bcm_eth; struct bcmf_event_s event; uint8_t data[0]; -}; +} end_packed_struct; /**************************************************************************** * Private Data diff --git a/drivers/wireless/ieee80211/bcm43xxx/bcmf_bdc.h b/drivers/wireless/ieee80211/bcm43xxx/bcmf_bdc.h index 52b644ce315..68ebb088ead 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/bcmf_bdc.h +++ b/drivers/wireless/ieee80211/bcm43xxx/bcmf_bdc.h @@ -33,7 +33,7 @@ /* Event frame content */ -struct __attribute__((packed)) bcmf_event_s +begin_packed_struct struct bcmf_event_s { uint16_t version; /* Vendor specific type */ uint16_t flags; @@ -46,7 +46,7 @@ struct __attribute__((packed)) bcmf_event_s char src_name[16]; /* Event source interface name */ uint8_t dst_id; /* Event destination interface id */ uint8_t bss_cfg_id; -}; +} end_packed_struct; /* Event callback handler */ diff --git a/drivers/wireless/ieee80211/bcm43xxx/bcmf_cdc.c b/drivers/wireless/ieee80211/bcm43xxx/bcmf_cdc.c index b260f4a3b92..3274883c04e 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/bcmf_cdc.c +++ b/drivers/wireless/ieee80211/bcm43xxx/bcmf_cdc.c @@ -54,13 +54,13 @@ * Private Types ****************************************************************************/ -struct __attribute__((packed)) bcmf_cdc_header +begin_packed_struct struct bcmf_cdc_header { uint32_t cmd; /* Command to be sent */ uint32_t len; /* Size of command data */ uint32_t flags; /* cdc request flags, see above */ uint32_t status; /* Returned status code from chip */ -}; +} end_packed_struct; /**************************************************************************** * Private Function Prototypes diff --git a/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.c b/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.c index 910e33e4ea7..4a57749296e 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.c +++ b/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.c @@ -116,7 +116,8 @@ FAR struct bcmf_dev_s *g_sdio_priv; * This pool is shared between all driver devices */ -static struct bcmf_sdio_frame g_pktframes[BCMF_PKT_POOL_SIZE]; +static struct bcmf_sdio_frame + g_pktframes[CONFIG_IEEE80211_BROADCOM_FRAME_POOL_SIZE]; /* TODO free_queue should be static */ @@ -642,6 +643,7 @@ int bcmf_bus_sdio_initialize(FAR struct bcmf_dev_s *priv, sbus->minor = minor; sbus->ready = false; sbus->sleeping = true; + sbus->flow_ctrl = false; sbus->bus.txframe = bcmf_sdpcm_queue_frame; sbus->bus.rxframe = bcmf_sdpcm_get_rx_frame; @@ -664,7 +666,7 @@ int bcmf_bus_sdio_initialize(FAR struct bcmf_dev_s *priv, /* FIXME this should be static to driver */ - for (ret = 0; ret < BCMF_PKT_POOL_SIZE; ret++) + for (ret = 0; ret < CONFIG_IEEE80211_BROADCOM_FRAME_POOL_SIZE; ret++) { bcmf_dqueue_push(&sbus->free_queue, &g_pktframes[ret].list_entry); } @@ -931,7 +933,9 @@ struct bcmf_sdio_frame *bcmf_sdio_allocate_frame(FAR struct bcmf_dev_s *priv, } #if 0 - if (!tx || sbus->tx_queue_count < BCMF_PKT_POOL_SIZE - 1) + if (!tx || + sbus->tx_queue_count < + CONFIG_IEEE80211_BROADCOM_FRAME_POOL_SIZE - 1) #endif { if ((entry = bcmf_dqueue_pop_tail(&sbus->free_queue)) != NULL) diff --git a/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.h b/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.h index 7059314eade..ba5af0b9589 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.h +++ b/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdio.h @@ -41,11 +41,9 @@ * Pre-processor Definitions ****************************************************************************/ -#define HEADER_SIZE 0x12 /* Default sdpcm + bdc header size */ - -/* TODO move to Kconfig */ - -#define BCMF_PKT_POOL_SIZE 4 /* Frame pool size */ +#define HEADER_SIZE 0x12 /* Default sdpcm + bdc header size */ +#define FIRST_WORD_SIZE 4 +#define FC_UPDATE_PKT_LENGTH 12 /**************************************************************************** * Public Types @@ -100,6 +98,7 @@ struct bcmf_sdio_dev_s uint8_t max_seq; /* Maximum transmit sequence allowed */ uint8_t tx_seq; /* Transmit sequence number (next) */ uint8_t rx_seq; /* Receive sequence number (expected) */ + bool flow_ctrl; /* Current flow control status */ sem_t queue_mutex; /* Lock for TX/RX/free queues */ dq_queue_t free_queue; /* Queue of available frames */ @@ -115,6 +114,21 @@ struct bcmf_sdio_frame struct bcmf_frame_s header; bool tx; dq_entry_t list_entry; + uint8_t pad[CONFIG_IEEE80211_BROADCOM_DMABUF_ALIGNMENT - + FIRST_WORD_SIZE] + aligned_data(CONFIG_IEEE80211_BROADCOM_DMABUF_ALIGNMENT); + + /* pad[] array is used and aligned in order to make the following data[] + * buffer aligned beginning from the offset of 4 bytes to the address + * boundary for SDIO DMA transfers. + * The first 4 bytes of data[] buffer are not directly used in DMA + * transfers. Instead, they are used as the initial phase just to get + * the length of the remaining long data to be read. Thus only + * the remaining part of data[] buffer beginning from the offset of 4 bytes + * is required to be aligned to the address boundary set by + * CONFIG_IEEE80211_BROADCOM_SDIO_DMA_BUF_ALIGNMENT parameter. + */ + uint8_t data[HEADER_SIZE + MAX_NETDEV_PKTSIZE + CONFIG_NET_GUARDSIZE]; }; diff --git a/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdpcm.c b/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdpcm.c index 01266d65b22..94ecd9a07fb 100644 --- a/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdpcm.c +++ b/drivers/wireless/ieee80211/bcm43xxx/bcmf_sdpcm.c @@ -58,7 +58,7 @@ * Private Types ****************************************************************************/ -struct __attribute__((packed)) bcmf_sdpcm_header +begin_packed_struct struct bcmf_sdpcm_header { uint16_t size; uint16_t checksum; @@ -69,7 +69,7 @@ struct __attribute__((packed)) bcmf_sdpcm_header uint8_t flow_control; uint8_t credit; uint16_t padding; -}; +} end_packed_struct; /**************************************************************************** * Private Function Prototypes @@ -125,6 +125,10 @@ int bcmf_sdpcm_process_header(FAR struct bcmf_sdio_dev_s *sbus, sbus->max_seq = header->credit; + /* Update flow control status */ + + sbus->flow_ctrl = (header->flow_control != 0); + return OK; } @@ -138,9 +142,66 @@ int bcmf_sdpcm_readframe(FAR struct bcmf_dev_s *priv) uint16_t len; uint16_t checksum; struct bcmf_sdpcm_header *header; + struct bcmf_sdpcm_header tmp_hdr; struct bcmf_sdio_frame *sframe; FAR struct bcmf_sdio_dev_s *sbus = (FAR struct bcmf_sdio_dev_s *)priv->bus; + /* Read the first 4 bytes of sdpcm header + * to get the length of the following data to be read + */ + + ret = bcmf_transfer_bytes(sbus, false, 2, 0, + (uint8_t *)&tmp_hdr, + FIRST_WORD_SIZE); + if (ret != OK) + { + wlinfo("Failed to read size\n"); + bcmf_sdpcm_rxfail(sbus, false); + return -EIO; + } + + len = tmp_hdr.size; + checksum = tmp_hdr.checksum; + + /* All zero means no more to read */ + + if (!(len | checksum)) + { + return -ENODATA; + } + + if (((~len & 0xffff) ^ checksum) || len < sizeof(struct bcmf_sdpcm_header)) + { + wlerr("Invalid header checksum or len %x %x\n", len, checksum); + bcmf_sdpcm_rxfail(sbus, false); + return -EINVAL; + } + + if (len == FC_UPDATE_PKT_LENGTH) + { + /* Flow control update packet with no data */ + + ret = bcmf_transfer_bytes(sbus, false, 2, 0, + (uint8_t *)&tmp_hdr + FIRST_WORD_SIZE, + FC_UPDATE_PKT_LENGTH - FIRST_WORD_SIZE); + if (ret != OK) + { + wlinfo("Failed to read the rest 8 bytes\n"); + bcmf_sdpcm_rxfail(sbus, false); + return -EIO; + } + + ret = bcmf_sdpcm_process_header(sbus, &tmp_hdr); + + if (ret != OK) + { + wlerr("Error while processing header %d\n", ret); + return -EINVAL; + } + + return OK; + } + /* Request free frame buffer */ sframe = bcmf_sdio_allocate_frame(priv, false, false); @@ -148,38 +209,54 @@ int bcmf_sdpcm_readframe(FAR struct bcmf_dev_s *priv) if (sframe == NULL) { wlinfo("fail alloc\n"); + + /* Read out the rest of the header to get the bus credit information */ + + ret = bcmf_transfer_bytes(sbus, false, 2, 0, + (uint8_t *)&tmp_hdr + FIRST_WORD_SIZE, + FC_UPDATE_PKT_LENGTH - FIRST_WORD_SIZE); + + if (ret != OK) + { + wlinfo("Failed to read the rest 8 bytes\n"); + bcmf_sdpcm_rxfail(sbus, false); + return -EIO; + } + + bcmf_sdpcm_rxfail(sbus, false); + + ret = bcmf_sdpcm_process_header(sbus, &tmp_hdr); + + if (ret != OK) + { + wlerr("Error while processing header %d\n", ret); + return -EINVAL; + } + return -EAGAIN; } header = (struct bcmf_sdpcm_header *)sframe->data; - /* Read header */ + /* Read the remaining frame data (the buffer is DMA aligned here) */ - ret = bcmf_transfer_bytes(sbus, false, 2, 0, (uint8_t *)header, 4); + if (len <= FIRST_WORD_SIZE) + { + ret = OK; + goto exit_free_frame; + } + + ret = bcmf_transfer_bytes(sbus, false, 2, 0, + (uint8_t *)header + FIRST_WORD_SIZE, + len - FIRST_WORD_SIZE); if (ret != OK) { - wlinfo("failread size\n"); + wlinfo("Failed to read remaining frame data\n"); ret = -EIO; goto exit_abort; } - len = header->size; - checksum = header->checksum; - - /* All zero means no more to read */ - - if (!(len | checksum)) - { - ret = -ENODATA; - goto exit_free_frame; - } - - if (((~len & 0xffff) ^ checksum) || len < sizeof(struct bcmf_sdpcm_header)) - { - wlerr("Invalid header checksum or len %x %x\n", len, checksum); - ret = -EINVAL; - goto exit_abort; - } + memcpy(header, &tmp_hdr, FIRST_WORD_SIZE); if (len > sframe->header.len) { @@ -188,16 +265,6 @@ int bcmf_sdpcm_readframe(FAR struct bcmf_dev_s *priv) goto exit_abort; } - /* Read remaining frame data */ - - ret = bcmf_transfer_bytes(sbus, false, 2, 0, - (uint8_t *)header + 4, len - 4); - if (ret != OK) - { - ret = -EIO; - goto exit_abort; - } - #if 0 wlinfo("Receive frame %p %d\n", sframe, len); @@ -291,6 +358,11 @@ int bcmf_sdpcm_sendframe(FAR struct bcmf_dev_s *priv) return -ENODATA; } + if (sbus->flow_ctrl) + { + return -EAGAIN; + } + if (sbus->tx_seq == sbus->max_seq) { /* TODO handle this case */ @@ -319,8 +391,25 @@ int bcmf_sdpcm_sendframe(FAR struct bcmf_dev_s *priv) (unsigned long)sframe->header.base); #endif - ret = bcmf_transfer_bytes(sbus, true, 2, 0, sframe->header.base, - sframe->header.len); + /* Write the first 4 bytes of sdpcm header */ + + ret = bcmf_transfer_bytes(sbus, true, 2, 0, + sframe->header.base, + FIRST_WORD_SIZE); + if (ret != OK) + { + /* TODO handle retry count and remove frame from queue + abort TX */ + + wlinfo("fail send frame %d\n", ret); + ret = -EIO; + goto exit_abort; + } + + /* Write the remaining frame data (the buffer is DMA aligned here) */ + + ret = bcmf_transfer_bytes(sbus, true, 2, 0, + sframe->header.base + FIRST_WORD_SIZE, + sframe->header.len - FIRST_WORD_SIZE); if (ret != OK) { /* TODO handle retry count and remove frame from queue + abort TX */ @@ -364,7 +453,7 @@ int bcmf_sdpcm_queue_frame(FAR struct bcmf_dev_s *priv, FAR struct bcmf_sdio_dev_s *sbus = (FAR struct bcmf_sdio_dev_s *)priv->bus; struct bcmf_sdio_frame *sframe = (struct bcmf_sdio_frame *)frame; struct bcmf_sdpcm_header *header = - (struct bcmf_sdpcm_header *)sframe->data; + (struct bcmf_sdpcm_header *)sframe->data; /* Prepare sw header */ diff --git a/drivers/wireless/ieee802154/at86rf23x/at86rf23x.c b/drivers/wireless/ieee802154/at86rf23x/at86rf23x.c index f35c2b39529..2e097072e51 100644 --- a/drivers/wireless/ieee802154/at86rf23x/at86rf23x.c +++ b/drivers/wireless/ieee802154/at86rf23x/at86rf23x.c @@ -1,35 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/at86rf23x/at86rf23x.c * - * Copyright (C) 2016 Matt Poppe. All rights reserved. - * Author: Matt Poppe + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/at86rf23x/at86rf23x.h b/drivers/wireless/ieee802154/at86rf23x/at86rf23x.h index 3d9700aec62..c1ad0dc9c18 100644 --- a/drivers/wireless/ieee802154/at86rf23x/at86rf23x.h +++ b/drivers/wireless/ieee802154/at86rf23x/at86rf23x.h @@ -1,35 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/at86rf23x/at86rf23x.h * - * Copyright (C) 2016 Matt Poppe. All rights reserved. - * Author: Matt Poppe + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40.c b/drivers/wireless/ieee802154/mrf24j40/mrf24j40.c index 6f26d7be593..796ac417c29 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40.c +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40.c @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/mrf24j40/mrf24j40.c * - * Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.c b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.c index 59eb87dfc43..31ee4f2f275 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.c +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.c @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.c * - * Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.h b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.h index dbee5cdbb0f..4e57da0dfe6 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.h +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.h @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/mrf24j40/mrf24j40_getset.h * - * Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_interrupt.c b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_interrupt.c index f5eb729138c..c527e88e213 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_interrupt.c +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_interrupt.c @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/mrf24j40/mrf24j40_interrupt.c * - * Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.c b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.c index ffddcf805f1..261364d07c6 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.c +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.c @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.c * - * Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.h b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.h index 17b0e00f829..8a4490fbc8c 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.h +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.h @@ -1,35 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/mrf24j40/mrf24j40_radif.h * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_reg.h b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_reg.h index 30f77609890..32a9a6fcf7e 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_reg.h +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_reg.h @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/mrf24j40/mrf24j40_reg.h * - * Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.c b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.c index 7cae957de12..d1efa19d621 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.c +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.c @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.c * - * Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.h b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.h index 80a032eb709..8c87f0b3105 100644 --- a/drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.h +++ b/drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.h @@ -1,37 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/mrf24j40/mrf24j40_regops.h * - * Copyright (C) 2015-2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/xbee/Make.defs b/drivers/wireless/ieee802154/xbee/Make.defs index ce2f754a440..5ac1fc52ce7 100644 --- a/drivers/wireless/ieee802154/xbee/Make.defs +++ b/drivers/wireless/ieee802154/xbee/Make.defs @@ -1,35 +1,20 @@ ############################################################################ # drivers/wireless/ieee802154/xbee/Make.defs # -# Copyright (C) 2017 Verge Inc. All rights reserved. -# Author: Anthony Merlino +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http://www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # ############################################################################ diff --git a/drivers/wireless/ieee802154/xbee/xbee.c b/drivers/wireless/ieee802154/xbee/xbee.c index 40652d6712c..cba87fb202d 100644 --- a/drivers/wireless/ieee802154/xbee/xbee.c +++ b/drivers/wireless/ieee802154/xbee/xbee.c @@ -1,35 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/xbee/xbee.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/xbee/xbee.h b/drivers/wireless/ieee802154/xbee/xbee.h index 1044d3ec769..ca4718783e9 100644 --- a/drivers/wireless/ieee802154/xbee/xbee.h +++ b/drivers/wireless/ieee802154/xbee/xbee.h @@ -1,35 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/xbee/xbee.h * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/xbee/xbee_ioctl.c b/drivers/wireless/ieee802154/xbee/xbee_ioctl.c index 4c1679d04b3..bc3e7423ef9 100644 --- a/drivers/wireless/ieee802154/xbee/xbee_ioctl.c +++ b/drivers/wireless/ieee802154/xbee/xbee_ioctl.c @@ -1,35 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/xbee/xbee_ioctl.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/xbee/xbee_mac.c b/drivers/wireless/ieee802154/xbee/xbee_mac.c index df86fa5d625..d36d1046ded 100644 --- a/drivers/wireless/ieee802154/xbee/xbee_mac.c +++ b/drivers/wireless/ieee802154/xbee/xbee_mac.c @@ -1,35 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/xbee/xbee_mac.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/xbee/xbee_mac.h b/drivers/wireless/ieee802154/xbee/xbee_mac.h index 65bbf1a7997..d53fba8f62b 100644 --- a/drivers/wireless/ieee802154/xbee/xbee_mac.h +++ b/drivers/wireless/ieee802154/xbee/xbee_mac.h @@ -1,35 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/xbee/xbee_mac.h * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/ieee802154/xbee/xbee_netdev.c b/drivers/wireless/ieee802154/xbee/xbee_netdev.c index ecaa201fe22..0e087e77cb4 100644 --- a/drivers/wireless/ieee802154/xbee/xbee_netdev.c +++ b/drivers/wireless/ieee802154/xbee/xbee_netdev.c @@ -1,42 +1,20 @@ /**************************************************************************** * drivers/wireless/ieee802154/xbee/xbee_netdev.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * References: + * http://www.apache.org/licenses/LICENSE-2.0 * - * wireless/ieee802154/xbee_netdev.c - * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/spirit/include/spirit_aes.h b/drivers/wireless/spirit/include/spirit_aes.h index b3d0ce813c6..588869d6adc 100644 --- a/drivers/wireless/spirit/include/spirit_aes.h +++ b/drivers/wireless/spirit/include/spirit_aes.h @@ -5,9 +5,6 @@ * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: diff --git a/drivers/wireless/spirit/include/spirit_calibration.h b/drivers/wireless/spirit/include/spirit_calibration.h index efd35db7fbe..9bc5775190c 100644 --- a/drivers/wireless/spirit/include/spirit_calibration.h +++ b/drivers/wireless/spirit/include/spirit_calibration.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_calibration.h - * Configuration and management of SPIRIT VCO-RCO calibration. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_commands.h b/drivers/wireless/spirit/include/spirit_commands.h index 3c1edd20efe..21bad5f0690 100644 --- a/drivers/wireless/spirit/include/spirit_commands.h +++ b/drivers/wireless/spirit/include/spirit_commands.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_commands.h - * Management of SPIRIT Commands. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_config.h b/drivers/wireless/spirit/include/spirit_config.h index ad5aaea721c..22d9beb3ad6 100644 --- a/drivers/wireless/spirit/include/spirit_config.h +++ b/drivers/wireless/spirit/include/spirit_config.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_config.h - * Spirit Configuration and useful defines * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_csma.h b/drivers/wireless/spirit/include/spirit_csma.h index daa2c088919..56543c7e6c2 100644 --- a/drivers/wireless/spirit/include/spirit_csma.h +++ b/drivers/wireless/spirit/include/spirit_csma.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_csma.h - * Configuration and management of SPIRIT CSMA. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_directrf.h b/drivers/wireless/spirit/include/spirit_directrf.h index 96e35881ad8..960b8be8e5b 100644 --- a/drivers/wireless/spirit/include/spirit_directrf.h +++ b/drivers/wireless/spirit/include/spirit_directrf.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_directrf.h - * Configuration and management of SPIRIT direct transmission / receive modes. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_general.h b/drivers/wireless/spirit/include/spirit_general.h index 9630ad94b77..0727e44dd32 100644 --- a/drivers/wireless/spirit/include/spirit_general.h +++ b/drivers/wireless/spirit/include/spirit_general.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_general.h - * Configuration and management of SPIRIT General functionalities. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_gpio.h b/drivers/wireless/spirit/include/spirit_gpio.h index e0151c1da3d..baa6918deb0 100644 --- a/drivers/wireless/spirit/include/spirit_gpio.h +++ b/drivers/wireless/spirit/include/spirit_gpio.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_gpio.h - * This file provides all the low level API to manage SPIRIT GPIO. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_irq.h b/drivers/wireless/spirit/include/spirit_irq.h index 25a0ed2d344..f0cd0ba40b3 100644 --- a/drivers/wireless/spirit/include/spirit_irq.h +++ b/drivers/wireless/spirit/include/spirit_irq.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_irq.h - * Configuration and management of SPIRIT IRQs. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_linearfifo.h b/drivers/wireless/spirit/include/spirit_linearfifo.h index cec3b609eea..cf054ebfa73 100644 --- a/drivers/wireless/spirit/include/spirit_linearfifo.h +++ b/drivers/wireless/spirit/include/spirit_linearfifo.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_linearfifo.h - * Configuration and management of SPIRIT Fifo. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_management.h b/drivers/wireless/spirit/include/spirit_management.h index 1995d0e6033..8a6ad37fd5f 100644 --- a/drivers/wireless/spirit/include/spirit_management.h +++ b/drivers/wireless/spirit/include/spirit_management.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_management.h - * The management layer for SPIRIT1 library. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_pktbasic.h b/drivers/wireless/spirit/include/spirit_pktbasic.h index 41b9993a77d..92502d9b185 100644 --- a/drivers/wireless/spirit/include/spirit_pktbasic.h +++ b/drivers/wireless/spirit/include/spirit_pktbasic.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_pktbasic.h - * Configuration and management of SPIRIT Basic packets. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_pktcommon.h b/drivers/wireless/spirit/include/spirit_pktcommon.h index 5616b8a287f..762519a4449 100644 --- a/drivers/wireless/spirit/include/spirit_pktcommon.h +++ b/drivers/wireless/spirit/include/spirit_pktcommon.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_pktcommon.h - * Configuration and management of the common features of SPIRIT packets. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_pktmbus.h b/drivers/wireless/spirit/include/spirit_pktmbus.h index 5d466a016d4..3907dfff5a9 100644 --- a/drivers/wireless/spirit/include/spirit_pktmbus.h +++ b/drivers/wireless/spirit/include/spirit_pktmbus.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_pktmbus.h - * Configuration and management of SPIRIT MBUS packets. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_pktstack.h b/drivers/wireless/spirit/include/spirit_pktstack.h index e66e30b9013..f31c787ebc0 100644 --- a/drivers/wireless/spirit/include/spirit_pktstack.h +++ b/drivers/wireless/spirit/include/spirit_pktstack.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_pktstack.h - * Configuration and management of SPIRIT STack packets. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_qi.h b/drivers/wireless/spirit/include/spirit_qi.h index 3c499a2769b..1c75a874687 100644 --- a/drivers/wireless/spirit/include/spirit_qi.h +++ b/drivers/wireless/spirit/include/spirit_qi.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_qi.h - * Configuration and management of SPIRIT QI. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_radio.h b/drivers/wireless/spirit/include/spirit_radio.h index f973cb0715f..bb377e296d5 100644 --- a/drivers/wireless/spirit/include/spirit_radio.h +++ b/drivers/wireless/spirit/include/spirit_radio.h @@ -1,15 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_radio.h - * This file provides all the low level API to manage Analog and Digital radio - * part of SPIRIT. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_regs.h b/drivers/wireless/spirit/include/spirit_regs.h index fef720355d5..8f237113797 100644 --- a/drivers/wireless/spirit/include/spirit_regs.h +++ b/drivers/wireless/spirit/include/spirit_regs.h @@ -1,14 +1,10 @@ /**************************************************************************** * drivers/wireless/spirit/include/spirit_regs.h - * This file contains all the SPIRIT registers address and masks. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_spi.h b/drivers/wireless/spirit/include/spirit_spi.h index 9f6d5b9c71c..d5d380a6eb7 100644 --- a/drivers/wireless/spirit/include/spirit_spi.h +++ b/drivers/wireless/spirit/include/spirit_spi.h @@ -1,43 +1,20 @@ /**************************************************************************** * drivers/wireless/spirit/include/spirit_spi.h - * Header file for NuttX SPIRIT SPI driver interface. * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Derives loosely from similarly licensed SPI interface definitions from - * STMicro: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright(c) 2015 STMicroelectronics - * Author: VMA division - AMS - * Version 3.2.2 08-July-2015 - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/drivers/wireless/spirit/include/spirit_timer.h b/drivers/wireless/spirit/include/spirit_timer.h index ca6c9eb83e3..3298c29e57c 100644 --- a/drivers/wireless/spirit/include/spirit_timer.h +++ b/drivers/wireless/spirit/include/spirit_timer.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_timer.h - * Configuration and management of SPIRIT timers. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/include/spirit_types.h b/drivers/wireless/spirit/include/spirit_types.h index dec250e6feb..c91bd3b9510 100644 --- a/drivers/wireless/spirit/include/spirit_types.h +++ b/drivers/wireless/spirit/include/spirit_types.h @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/include/spirit_types.h - * Header file for SPIRIT types. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted and extended for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_aes.c b/drivers/wireless/spirit/lib/spirit_aes.c index acb7aed7b00..27b97ddbe41 100644 --- a/drivers/wireless/spirit/lib/spirit_aes.c +++ b/drivers/wireless/spirit/lib/spirit_aes.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_aes.c - * Configuration and management of SPIRIT AES Engine. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_calibration.c b/drivers/wireless/spirit/lib/spirit_calibration.c index 11dbc1aed1d..e35984fd215 100644 --- a/drivers/wireless/spirit/lib/spirit_calibration.c +++ b/drivers/wireless/spirit/lib/spirit_calibration.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_calibration.c - * Configuration and management of SPIRIT VCO-RCO calibration. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_csma.c b/drivers/wireless/spirit/lib/spirit_csma.c index 26e68890321..2f09e0f4fac 100644 --- a/drivers/wireless/spirit/lib/spirit_csma.c +++ b/drivers/wireless/spirit/lib/spirit_csma.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_csma.c - * Configuration and management of SPIRIT CSMA. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_directrf.c b/drivers/wireless/spirit/lib/spirit_directrf.c index fe7e6777268..dd993ab989d 100644 --- a/drivers/wireless/spirit/lib/spirit_directrf.c +++ b/drivers/wireless/spirit/lib/spirit_directrf.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_directrf.c - * Configuration and management of SPIRIT direct transmission / receive modes. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_general.c b/drivers/wireless/spirit/lib/spirit_general.c index ef2f87d3b23..ed6c3eb472e 100644 --- a/drivers/wireless/spirit/lib/spirit_general.c +++ b/drivers/wireless/spirit/lib/spirit_general.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_general.c - * Configuration and management of SPIRIT General functionalities. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * diff --git a/drivers/wireless/spirit/lib/spirit_gpio.c b/drivers/wireless/spirit/lib/spirit_gpio.c index 0fab3ccbb4b..adee0ccd44a 100644 --- a/drivers/wireless/spirit/lib/spirit_gpio.c +++ b/drivers/wireless/spirit/lib/spirit_gpio.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_gpio.c - * This file provides all the low level API to manage SPIRIT GPIO. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_irq.c b/drivers/wireless/spirit/lib/spirit_irq.c index 99cd94c0d62..a52ac44ce98 100644 --- a/drivers/wireless/spirit/lib/spirit_irq.c +++ b/drivers/wireless/spirit/lib/spirit_irq.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_irq.c - * Configuration and management of SPIRIT IRQs. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_linearfifo.c b/drivers/wireless/spirit/lib/spirit_linearfifo.c index 8098c08c60f..d675e289fcb 100644 --- a/drivers/wireless/spirit/lib/spirit_linearfifo.c +++ b/drivers/wireless/spirit/lib/spirit_linearfifo.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_linearfifo.c - * Configuration and management of SPIRIT Fifo. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * diff --git a/drivers/wireless/spirit/lib/spirit_management.c b/drivers/wireless/spirit/lib/spirit_management.c index d5d71b639b3..54ca112ca37 100644 --- a/drivers/wireless/spirit/lib/spirit_management.c +++ b/drivers/wireless/spirit/lib/spirit_management.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_management.c - * The management layer for SPIRIT1 library. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_pktbasic.c b/drivers/wireless/spirit/lib/spirit_pktbasic.c index e67996cddf5..e2c41e1368c 100644 --- a/drivers/wireless/spirit/lib/spirit_pktbasic.c +++ b/drivers/wireless/spirit/lib/spirit_pktbasic.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_pktbasic.c - * Configuration and management of SPIRIT Basic packets. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_pktcommon.c b/drivers/wireless/spirit/lib/spirit_pktcommon.c index e9702f1c8f3..24f8ef20b67 100644 --- a/drivers/wireless/spirit/lib/spirit_pktcommon.c +++ b/drivers/wireless/spirit/lib/spirit_pktcommon.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_pktcommon.c - * Configuration and management of the common features of SPIRIT packets. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_pktmbus.c b/drivers/wireless/spirit/lib/spirit_pktmbus.c index 08b67f63ccc..c040a85f505 100644 --- a/drivers/wireless/spirit/lib/spirit_pktmbus.c +++ b/drivers/wireless/spirit/lib/spirit_pktmbus.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_pktmbus.c - * Configuration and management of SPIRIT MBUS packets. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_pktstack.c b/drivers/wireless/spirit/lib/spirit_pktstack.c index 4a7e24b40ab..28a130ae10d 100644 --- a/drivers/wireless/spirit/lib/spirit_pktstack.c +++ b/drivers/wireless/spirit/lib/spirit_pktstack.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_pktstack.c - * Configuration and management of SPIRIT STack packets. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_qi.c b/drivers/wireless/spirit/lib/spirit_qi.c index eaa56b7c5d2..ceb1f4b82f4 100644 --- a/drivers/wireless/spirit/lib/spirit_qi.c +++ b/drivers/wireless/spirit/lib/spirit_qi.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_qi.c - * Configuration and management of SPIRIT QI. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * diff --git a/drivers/wireless/spirit/lib/spirit_radio.c b/drivers/wireless/spirit/lib/spirit_radio.c index bf07d8f5214..8a954382e8f 100644 --- a/drivers/wireless/spirit/lib/spirit_radio.c +++ b/drivers/wireless/spirit/lib/spirit_radio.c @@ -1,15 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_radio.c - * This file provides all the low level API to manage Analog and Digital radio - * part of SPIRIT. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/drivers/wireless/spirit/lib/spirit_spi.c b/drivers/wireless/spirit/lib/spirit_spi.c index 103371b0e70..25bd8f454a9 100644 --- a/drivers/wireless/spirit/lib/spirit_spi.c +++ b/drivers/wireless/spirit/lib/spirit_spi.c @@ -1,43 +1,20 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_spi.c - * NuttX SPIRIT SPI driver interface. * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Derives loosely from simlilarly licensed, platform-specific, example - * implementations from STMicro: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright(c) 2015 STMicroelectronics - * Author: VMA division - AMS - * Version 3.2.2 08-July-2015 - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ******************************************************************************/ diff --git a/drivers/wireless/spirit/lib/spirit_timer.c b/drivers/wireless/spirit/lib/spirit_timer.c index c8444f6169a..532bb2459dd 100644 --- a/drivers/wireless/spirit/lib/spirit_timer.c +++ b/drivers/wireless/spirit/lib/spirit_timer.c @@ -1,14 +1,10 @@ /****************************************************************************** * drivers/wireless/spirit/lib/spirit_timer.c - * Configuration and management of SPIRIT timers. * * Copyright(c) 2015 STMicroelectronics * Author: VMA division - AMS * Version 3.2.2 08-July-2015 * - * Adapted for NuttX by: - * Author: Gregory Nutt - * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: diff --git a/fs/Kconfig b/fs/Kconfig index 3fd8ff918d1..e44b1a645c6 100644 --- a/fs/Kconfig +++ b/fs/Kconfig @@ -134,4 +134,4 @@ source "fs/littlefs/Kconfig" source "fs/unionfs/Kconfig" source "fs/userfs/Kconfig" source "fs/hostfs/Kconfig" -source fs/exfat/Kconfig +source "fs/exfat/Kconfig" diff --git a/fs/binfs/fs_binfs.c b/fs/binfs/fs_binfs.c index c4539315e6e..9ccf992679c 100644 --- a/fs/binfs/fs_binfs.c +++ b/fs/binfs/fs_binfs.c @@ -200,9 +200,9 @@ static int binfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg) if (cmd == FIOC_FILEPATH) { - /* IN: FAR char *(length >= PATH_MAX) - * OUT: The full file path - */ + /* IN: FAR char *(length >= PATH_MAX) + * OUT: The full file path + */ FAR char *ptr = (FAR char *)((uintptr_t)arg); if (ptr == NULL) @@ -217,7 +217,6 @@ static int binfs_ioctl(FAR struct file *filep, int cmd, unsigned long arg) return ret; } - strcat(ptr, "/"); strcat(ptr, builtin_getname((int)((uintptr_t)filep->f_priv))); } } diff --git a/fs/fat/fs_fat32.h b/fs/fat/fs_fat32.h index 70e958ee13a..d2cf8890f31 100644 --- a/fs/fat/fs_fat32.h +++ b/fs/fat/fs_fat32.h @@ -1084,7 +1084,7 @@ EXTERN int fat_ffcacheinvalidate(struct fat_mountpt_s *fs, EXTERN int fat_updatefsinfo(struct fat_mountpt_s *fs); EXTERN int fat_computefreeclusters(struct fat_mountpt_s *fs); EXTERN int fat_nfreeclusters(struct fat_mountpt_s *fs, - off_t *pfreeclusters); + fsblkcnt_t *pfreeclusters); EXTERN int fat_currentsector(struct fat_mountpt_s *fs, struct fat_file_s *ff, off_t position); diff --git a/fs/fat/fs_fat32util.c b/fs/fat/fs_fat32util.c index 4bce59645a2..29a676c1db1 100644 --- a/fs/fat/fs_fat32util.c +++ b/fs/fat/fs_fat32util.c @@ -2139,7 +2139,7 @@ int fat_computefreeclusters(struct fat_mountpt_s *fs) * ****************************************************************************/ -int fat_nfreeclusters(struct fat_mountpt_s *fs, off_t *pfreeclusters) +int fat_nfreeclusters(struct fat_mountpt_s *fs, fsblkcnt_t *pfreeclusters) { /* If number of the first free cluster is valid, then just return that * value. diff --git a/fs/littlefs/Kconfig b/fs/littlefs/Kconfig index c5817393e32..bfdd3a89c85 100644 --- a/fs/littlefs/Kconfig +++ b/fs/littlefs/Kconfig @@ -3,4 +3,18 @@ config FS_LITTLEFS default n depends on !DISABLE_MOUNTPOINT ---help--- - Build the LITTLEFS file system. https://github.com/ARMmbed/littlefs. + Build the LITTLEFS file system. https://github.com/littlefs-project/littlefs. + +if FS_LITTLEFS +config FS_LITTLEFS_BLOCK_FACTOR + int "LITTLEFS Block size multiple factor" + default 4 + ---help--- + Configure the cache size of the LITTLEFS file system with a multiple factor of the block size. + +config FS_LITTLEFS_BLOCK_CYCLE + int "LITTLEFS Block Cycle" + default 200 + ---help--- + Configure the block cycle of the LITTLEFS file system. +endif diff --git a/fs/littlefs/lfs_vfs.c b/fs/littlefs/lfs_vfs.c index fec1dbb727e..6640964230b 100644 --- a/fs/littlefs/lfs_vfs.c +++ b/fs/littlefs/lfs_vfs.c @@ -1196,12 +1196,14 @@ static int littlefs_bind(FAR struct inode *driver, FAR const void *data, fs->cfg.prog = littlefs_write_block; fs->cfg.erase = littlefs_erase_block; fs->cfg.sync = littlefs_sync_block; - fs->cfg.read_size = fs->geo.blocksize; + fs->cfg.read_size = fs->geo.blocksize * + CONFIG_FS_LITTLEFS_BLOCK_FACTOR; fs->cfg.prog_size = fs->geo.blocksize; fs->cfg.block_size = fs->geo.erasesize; fs->cfg.block_count = fs->geo.neraseblocks; - fs->cfg.block_cycles = 500; - fs->cfg.cache_size = fs->geo.blocksize; + fs->cfg.block_cycles = CONFIG_FS_LITTLEFS_BLOCK_CYCLE; + fs->cfg.cache_size = fs->geo.blocksize * + CONFIG_FS_LITTLEFS_BLOCK_FACTOR; fs->cfg.lookahead_size = lfs_min(lfs_alignup(fs->cfg.block_count, 64) / 8, fs->cfg.read_size); diff --git a/fs/mmap/fs_mmap.c b/fs/mmap/fs_mmap.c index c764af29bfa..c99da4c2c05 100644 --- a/fs/mmap/fs_mmap.c +++ b/fs/mmap/fs_mmap.c @@ -117,7 +117,7 @@ static int file_mmap_(FAR struct file *filep, FAR void *start, *mapped = kernel ? kmm_zalloc(length) : kumm_zalloc(length); if (*mapped == NULL) { - ferr("ERROR: kumm_alloc() failed: %d\n", ret); + ferr("ERROR: kumm_alloc() failed, enable DEBUG_MM for info!\n"); return -ENOMEM; } diff --git a/fs/mount/fs_procfs_mount.c b/fs/mount/fs_procfs_mount.c index cb01a7203fd..4308fd77b6b 100644 --- a/fs/mount/fs_procfs_mount.c +++ b/fs/mount/fs_procfs_mount.c @@ -247,14 +247,17 @@ static int blocks_entry(FAR const char *mountpoint, if (!info->header) { - mount_sprintf(info, " Block Number\n"); - mount_sprintf(info, " Size Blocks Used Available Mounted on\n"); + mount_sprintf(info, + " Block Number\n"); + mount_sprintf(info, + " Size Blocks Used Available Mounted on\n"); info->header = true; } /* Generate blocks list one line at a time */ - mount_sprintf(info, "%6ld %8" PRIdOFF " %8" PRIdOFF " %8" PRIdOFF " %s\n", + mount_sprintf(info, "%6lu %10" PRIuOFF " %10" PRIuOFF + " %10" PRIuOFF " %s\n", statbuf->f_bsize, statbuf->f_blocks, statbuf->f_blocks - statbuf->f_bavail, statbuf->f_bavail, mountpoint); diff --git a/fs/mqueue/mq_open.c b/fs/mqueue/mq_open.c index 5c288279305..bb774b29405 100644 --- a/fs/mqueue/mq_open.c +++ b/fs/mqueue/mq_open.c @@ -295,9 +295,10 @@ static int file_mq_vopen(FAR struct file *mq, FAR const char *mq_name, * be created with a reference count of zero. */ - ret = nxmq_alloc_msgq(attr, &msgq); - if (ret < 0) + msgq = (FAR struct mqueue_inode_s *)nxmq_alloc_msgq(attr); + if (!msgq) { + ret = -ENOSPC; goto errout_with_inode; } diff --git a/fs/nfs/Kconfig b/fs/nfs/Kconfig index 86fc555de1f..aeca516f2c8 100644 --- a/fs/nfs/Kconfig +++ b/fs/nfs/Kconfig @@ -6,7 +6,7 @@ config NFS bool "NFS client file system" default n - depends on !DISABLE_MOUNTPOINT + depends on !DISABLE_MOUNTPOINT && ALLOW_BSD_COMPONENTS ---help--- Enable network file system (NFS) client file system diff --git a/fs/nfs/nfs_proto.h b/fs/nfs/nfs_proto.h index 5b4a1f96d2c..11d30cd6273 100644 --- a/fs/nfs/nfs_proto.h +++ b/fs/nfs/nfs_proto.h @@ -308,7 +308,6 @@ struct nfsv3_sattr struct nfs_statfs { uint32_t obj_attributes_follow; - struct nfs_fattr obj_attributes; nfsuint64 sf_tbytes; nfsuint64 sf_fbytes; nfsuint64 sf_abytes; diff --git a/fs/procfs/fs_procfsproc.c b/fs/procfs/fs_procfsproc.c index a75b520b94d..78f93807541 100644 --- a/fs/procfs/fs_procfsproc.c +++ b/fs/procfs/fs_procfsproc.c @@ -366,6 +366,9 @@ static FAR const char * const g_statenames[] = , "Waiting,MQ empty" , "Waiting,MQ full" #endif +#ifdef CONFIG_PAGING + , "Waiting,Paging fill" +#endif #ifdef CONFIG_SIG_SIGSTOP_ACTION , "Stopped" #endif diff --git a/fs/spiffs/Kconfig b/fs/spiffs/Kconfig index c2d4d410b33..c9929d1a3e8 100644 --- a/fs/spiffs/Kconfig +++ b/fs/spiffs/Kconfig @@ -6,7 +6,7 @@ config FS_SPIFFS bool "SPIFFS File System" default n - depends on !DISABLE_MOUNTPOINT + depends on !DISABLE_MOUNTPOINT && ALLOW_BSD_COMPONENTS ---help--- Build the SPIFFS file system. This is a port of version 0.3.7 of the SPIFFS file system by Peter Andersson. It was originally diff --git a/fs/vfs/fs_epoll.c b/fs/vfs/fs_epoll.c index b3cc3d75709..745aebc3d4a 100644 --- a/fs/vfs/fs_epoll.c +++ b/fs/vfs/fs_epoll.c @@ -1,35 +1,20 @@ /**************************************************************************** * fs/vfs/fs_epoll.c * - * Copyright (C) 2015 Anton D. Kachalov. All rights reserved. - * Author: Anton D. Kachalov + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/graphics/nxmu/nxmu.h b/graphics/nxmu/nxmu.h index cb350614e68..71d284a23cd 100644 --- a/graphics/nxmu/nxmu.h +++ b/graphics/nxmu/nxmu.h @@ -40,6 +40,10 @@ * Pre-processor Definitions ****************************************************************************/ +#if CONFIG_MQ_MAXMSGSIZE < 64 +#error "The NX Server needs CONFIG_MQ_MAXMSGSIZE >= 64" +#endif + /**************************************************************************** * Public Types ****************************************************************************/ diff --git a/include/debug.h b/include/debug.h index a869897390c..995020b07bb 100644 --- a/include/debug.h +++ b/include/debug.h @@ -754,6 +754,24 @@ # define mtrinfo _none #endif +#ifdef CONFIG_DEBUG_VIDEO_ERROR +# define verr _err +#else +# define verr _none +#endif + +#ifdef CONFIG_DEBUG_VIDEO_WARN +# define vwarn _warn +#else +# define vwarn _none +#endif + +#ifdef CONFIG_DEBUG_VIDEO_INFO +# define vinfo _info +#else +# define vinfo _none +#endif + /* Buffer dumping macros do not depend on varargs */ #ifdef CONFIG_DEBUG_ERROR diff --git a/include/dsp.h b/include/dsp.h index 4c0c75837db..5c327494358 100644 --- a/include/dsp.h +++ b/include/dsp.h @@ -340,7 +340,7 @@ struct foc_data_f32_s dq_frame_f32_t i_dq_err; /* DQ current error */ dq_frame_f32_t i_dq_ref; /* Requested current for the FOC - * current controler + * current controller */ pid_controller_f32_t id_pid; /* Current d-axis component PI controller */ diff --git a/include/dspb16.h b/include/dspb16.h index 8ea6330f2a7..258de025ee8 100644 --- a/include/dspb16.h +++ b/include/dspb16.h @@ -277,7 +277,7 @@ struct foc_data_b16_s dq_frame_b16_t i_dq_err; /* DQ current error */ dq_frame_b16_t i_dq_ref; /* Requested current for the FOC - * current controler + * current controller */ pid_controller_b16_t id_pid; /* Current d-axis component PI controller */ diff --git a/include/glob.h b/include/glob.h index a66eb63d3a2..975063d3f88 100644 --- a/include/glob.h +++ b/include/glob.h @@ -25,6 +25,7 @@ * Included Files ****************************************************************************/ +#include #include /**************************************************************************** @@ -62,11 +63,11 @@ ****************************************************************************/ typedef struct - { - size_t gl_pathc; /* Count of paths matched by pattern. */ - char **gl_pathv; /* Pointer to a list of matched pathnames. */ - size_t gl_offs; /* Slots to reserve at the beginning of gl_pathv. */ - } glob_t; +{ + size_t gl_pathc; /* Count of paths matched by pattern. */ + FAR char **gl_pathv; /* Pointer to a list of matched pathnames. */ + size_t gl_offs; /* Slots to reserve at the beginning of gl_pathv. */ +} glob_t; /**************************************************************************** * Public Function Prototypes @@ -88,9 +89,9 @@ extern "C" * ****************************************************************************/ -int glob(const char *pat, int flags, - int (*errfunc)(const char *path, int err), - glob_t *g); +int glob(FAR const char *pat, int flags, + CODE int (*errfunc)(FAR const char *path, int err), + FAR glob_t *g); /**************************************************************************** * Name: globfree @@ -100,11 +101,11 @@ int glob(const char *pat, int flags, * ****************************************************************************/ -void globfree(glob_t *g); +void globfree(FAR glob_t *g); #undef EXTERN #ifdef __cplusplus } #endif -#endif /* __INCLUDE_GLOB_H */ \ No newline at end of file +#endif /* __INCLUDE_GLOB_H */ diff --git a/include/netinet/in.h b/include/netinet/in.h index e4e21198635..8b18a40a73d 100644 --- a/include/netinet/in.h +++ b/include/netinet/in.h @@ -109,7 +109,7 @@ * (TOS) field */ #define IP_TTL (__SO_PROTOCOL + 14) /* The IP TTL (time to live) * of IP packets sent by the - * network stack*/ + * network stack */ /* SOL_IPV6 protocol-level socket options. */ diff --git a/include/nuttx/1wire/1wire.h b/include/nuttx/1wire/1wire.h index d1bf69057ac..ad6c10efc36 100644 --- a/include/nuttx/1wire/1wire.h +++ b/include/nuttx/1wire/1wire.h @@ -1,35 +1,20 @@ /**************************************************************************** * include/nuttx/1wire/1wire.h * - * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved. - * Author: Aleksandr Vyhovanec + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/analog/ioctl.h b/include/nuttx/analog/ioctl.h index dabb12d4358..6859af9b1e2 100644 --- a/include/nuttx/analog/ioctl.h +++ b/include/nuttx/analog/ioctl.h @@ -40,18 +40,32 @@ /* DAC/ADC */ -#define ANIOC_TRIGGER _ANIOC(0x0001) /* Trigger one conversion - * IN: None - * OUT: None */ -#define ANIOC_WDOG_UPPER _ANIOC(0x0002) /* Set upper threshold for watchdog - * IN: Threshold value - * OUT: None */ -#define ANIOC_WDOG_LOWER _ANIOC(0x0003) /* Set lower threshold for watchdog - * IN: Threshold value - * OUT: None */ +#define ANIOC_TRIGGER _ANIOC(0x0001) /* Trigger one conversion + * IN: None + * OUT: None */ +#define ANIOC_WDOG_UPPER _ANIOC(0x0002) /* Set upper threshold for + * watchdog + * IN: Threshold value + * OUT: None */ +#define ANIOC_WDOG_LOWER _ANIOC(0x0003) /* Set lower threshold for + * watchdog + * IN: Threshold value + * OUT: None */ +#define ANIOC_GET_NCHANNELS _ANIOC(0x0004) /* Get the number of + * configured channels + * IN: None + * OUT: Number of channels */ +#define ANIOC_RESET_FIFO _ANIOC(0x0005) /* Clear data receive FIFO + * IN: None + * OUT: None */ +#define ANIOC_SAMPLES_ON_READ _ANIOC(0x0006) /* Get the number of + * samples to be read + * IN: None + * OUT: Number of samples + * waiting to be read */ #define AN_FIRST 0x0001 /* First common command */ -#define AN_NCMDS 3 /* Number of common commands */ +#define AN_NCMDS 6 /* Number of common commands */ /* User defined ioctl commands are also supported. These will be forwarded * by the upper-half driver to the lower-half driver via the ioctl() diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h index 4dadc37eac5..3f961209963 100644 --- a/include/nuttx/arch.h +++ b/include/nuttx/arch.h @@ -449,8 +449,7 @@ void up_release_pending(void); * 1) The priority of the currently running task drops and the next * task in the ready to run list has priority. * 2) An idle, ready to run task's priority has been raised above the - * the priority of the current, running task and it now has the - * priority. + * priority of the current, running task and it now has the priority. * * This function is called only from the NuttX scheduling * logic. Interrupts will always be disabled when this @@ -615,7 +614,7 @@ void up_task_start(main_t taskentry, int argc, FAR char *argv[]) ****************************************************************************/ void up_pthread_start(pthread_trampoline_t startup, - pthread_startroutine_t entrypt, pthread_addr_t arg); + pthread_startroutine_t entrypt, pthread_addr_t arg) noreturn_function; /**************************************************************************** @@ -634,7 +633,7 @@ void up_pthread_start(pthread_trampoline_t startup, * None ****************************************************************************/ -void up_pthread_exit(pthread_exitroutine_t exit, FAR void *exit_value); +void up_pthread_exit(pthread_exitroutine_t exit, FAR void *exit_value) noreturn_function; #endif @@ -1939,14 +1938,14 @@ int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size); * Name: up_cpu_start * * Description: - * In an SMP configution, only one CPU is initially active (CPU 0). System - * initialization occurs on that single thread. At the completion of the - * initialization of the OS, just before beginning normal multitasking, + * In an SMP configuration, only one CPU is initially active (CPU 0). + * System initialization occurs on that single thread. At the completion of + * the initialization of the OS, just before beginning normal multitasking, * the additional CPUs would be started by calling this function. * - * Each CPU is provided the entry point to is IDLE task when started. A + * Each CPU is provided the entry point to its IDLE task when started. A * TCB for each CPU's IDLE task has been initialized and placed in the - * CPU's g_assignedtasks[cpu] list. A stack has also been allocateded and + * CPU's g_assignedtasks[cpu] list. No stack has been allocated or * initialized. * * The OS initialization logic calls this function repeatedly until each @@ -1954,8 +1953,8 @@ int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size); * * Input Parameters: * cpu - The index of the CPU being started. This will be a numeric - * value in the range of from one to (CONFIG_SMP_NCPUS-1). (CPU - * 0 is already active) + * value in the range of one to (CONFIG_SMP_NCPUS-1). + * (CPU 0 is already active) * * Returned Value: * Zero on success; a negated errno value on failure. diff --git a/include/nuttx/board.h b/include/nuttx/board.h index 895d44fd6d0..f379a41ef60 100644 --- a/include/nuttx/board.h +++ b/include/nuttx/board.h @@ -331,6 +331,32 @@ int board_uniquekey(FAR uint8_t *uniquekey); int board_switch_boot(FAR const char *system); #endif +/**************************************************************************** + * Name: board_boot_image + * + * Description: + * Boot a new application firmware image. Execute the required actions for + * booting a new application firmware image (e.g. deinitialize peripherals, + * load the Program Counter register with the application firmware image + * entry point address). + * + * Input Parameters: + * path - Path to the new application firmware image to be booted. + * hdr_size - Image header size in bytes. This value may be useful for + * skipping metadata information preprended to the application + * image. + * + * Returned Value: + * If this function returns, then it was not possible to load the + * application firmware image due to some constraints. The return value in + * this case is a board-specific reason for the failure. + * + ****************************************************************************/ + +#ifdef CONFIG_BOARDCTL_BOOT_IMAGE +int board_boot_image(FAR const char *path, uint32_t hdr_size); +#endif + /**************************************************************************** * Name: board_timerhook * diff --git a/include/nuttx/can.h b/include/nuttx/can.h index 47a29efab8b..5e63e5cb377 100644 --- a/include/nuttx/can.h +++ b/include/nuttx/can.h @@ -247,7 +247,7 @@ struct can_frame uint8_t __pad; /* padding */ uint8_t __res0; /* reserved / padding */ uint8_t __res1; /* reserved / padding */ - uint8_t data[CAN_MAX_DLEN] __attribute__((aligned(8))); + uint8_t data[CAN_MAX_DLEN] aligned_data(8); }; /* struct canfd_frame - CAN flexible data rate frame structure @@ -266,7 +266,7 @@ struct canfd_frame uint8_t flags; /* additional flags for CAN FD */ uint8_t __res0; /* reserved / padding */ uint8_t __res1; /* reserved / padding */ - uint8_t data[CANFD_MAX_DLEN] __attribute__((aligned(8))); + uint8_t data[CANFD_MAX_DLEN] aligned_data(8); }; /* struct can_filter - CAN ID based filter in can_register(). diff --git a/include/nuttx/can/error.h b/include/nuttx/can/error.h deleted file mode 100644 index 01ab7e0359c..00000000000 --- a/include/nuttx/can/error.h +++ /dev/null @@ -1,131 +0,0 @@ -/* SPDX-License-Identifier: - * include/nuttx/can/error.h - */ - -/**************************************************************************** - * linux/can/error.h - * - * Definitions of the CAN error messages to be filtered and passed to the - * user. - * - * Author: Oliver Hartkopp - * Copyright (c) 2002-2007 Volkswagen Group Electronic Research - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of Volkswagen nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * Alternatively, provided that this notice is retained in full, this - * software may be distributed under the terms of the GNU General - * Public License ("GPL") version 2, in which case the provisions of the - * GPL apply INSTEAD OF those given above. - * - * The provided data structures and external interfaces from this code - * are not restricted to be used by modules with a GPL compatible license. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - * DAMAGE. - ****************************************************************************/ - -#ifndef _UAPI_CAN_ERROR_H -#define _UAPI_CAN_ERROR_H - -#define CAN_ERR_DLC 8 /* dlc for error message frames */ - -/* error class (mask) in can_id */ -#define CAN_ERR_TX_TIMEOUT 0x00000001U /* TX timeout (by netdevice driver) */ -#define CAN_ERR_LOSTARB 0x00000002U /* lost arbitration / data[0] */ -#define CAN_ERR_CRTL 0x00000004U /* controller problems / data[1] */ -#define CAN_ERR_PROT 0x00000008U /* protocol violations / data[2..3] */ -#define CAN_ERR_TRX 0x00000010U /* transceiver status / data[4] */ -#define CAN_ERR_ACK 0x00000020U /* received no ACK on transmission */ -#define CAN_ERR_BUSOFF 0x00000040U /* bus off */ -#define CAN_ERR_BUSERROR 0x00000080U /* bus error (may flood!) */ -#define CAN_ERR_RESTARTED 0x00000100U /* controller restarted */ - -/* arbitration lost in bit ... / data[0] */ -#define CAN_ERR_LOSTARB_UNSPEC 0x00 /* unspecified */ - -/* else bit number in bitstream */ - -/* error status of CAN-controller / data[1] */ -#define CAN_ERR_CRTL_UNSPEC 0x00 /* unspecified */ -#define CAN_ERR_CRTL_RX_OVERFLOW 0x01 /* RX buffer overflow */ -#define CAN_ERR_CRTL_TX_OVERFLOW 0x02 /* TX buffer overflow */ -#define CAN_ERR_CRTL_RX_WARNING 0x04 /* reached warning level for RX errors */ -#define CAN_ERR_CRTL_TX_WARNING 0x08 /* reached warning level for TX errors */ -#define CAN_ERR_CRTL_RX_PASSIVE 0x10 /* reached error passive status RX */ -#define CAN_ERR_CRTL_TX_PASSIVE 0x20 /* reached error passive status TX */ - /* (at least one error counter exceeds */ - /* the protocol-defined level of 127) */ -#define CAN_ERR_CRTL_ACTIVE 0x40 /* recovered to error active state */ - -/* error in CAN protocol (type) / data[2] */ -#define CAN_ERR_PROT_UNSPEC 0x00 /* unspecified */ -#define CAN_ERR_PROT_BIT 0x01 /* single bit error */ -#define CAN_ERR_PROT_FORM 0x02 /* frame format error */ -#define CAN_ERR_PROT_STUFF 0x04 /* bit stuffing error */ -#define CAN_ERR_PROT_BIT0 0x08 /* unable to send dominant bit */ -#define CAN_ERR_PROT_BIT1 0x10 /* unable to send recessive bit */ -#define CAN_ERR_PROT_OVERLOAD 0x20 /* bus overload */ -#define CAN_ERR_PROT_ACTIVE 0x40 /* active error announcement */ -#define CAN_ERR_PROT_TX 0x80 /* error occurred on transmission */ - -/* error in CAN protocol (location) / data[3] */ -#define CAN_ERR_PROT_LOC_UNSPEC 0x00 /* unspecified */ -#define CAN_ERR_PROT_LOC_SOF 0x03 /* start of frame */ -#define CAN_ERR_PROT_LOC_ID28_21 0x02 /* ID bits 28 - 21 (SFF: 10 - 3) */ -#define CAN_ERR_PROT_LOC_ID20_18 0x06 /* ID bits 20 - 18 (SFF: 2 - 0 )*/ -#define CAN_ERR_PROT_LOC_SRTR 0x04 /* substitute RTR (SFF: RTR) */ -#define CAN_ERR_PROT_LOC_IDE 0x05 /* identifier extension */ -#define CAN_ERR_PROT_LOC_ID17_13 0x07 /* ID bits 17-13 */ -#define CAN_ERR_PROT_LOC_ID12_05 0x0f /* ID bits 12-5 */ -#define CAN_ERR_PROT_LOC_ID04_00 0x0e /* ID bits 4-0 */ -#define CAN_ERR_PROT_LOC_RTR 0x0c /* RTR */ -#define CAN_ERR_PROT_LOC_RES1 0x0d /* reserved bit 1 */ -#define CAN_ERR_PROT_LOC_RES0 0x09 /* reserved bit 0 */ -#define CAN_ERR_PROT_LOC_DLC 0x0b /* data length code */ -#define CAN_ERR_PROT_LOC_DATA 0x0a /* data section */ -#define CAN_ERR_PROT_LOC_CRC_SEQ 0x08 /* CRC sequence */ -#define CAN_ERR_PROT_LOC_CRC_DEL 0x18 /* CRC delimiter */ -#define CAN_ERR_PROT_LOC_ACK 0x19 /* ACK slot */ -#define CAN_ERR_PROT_LOC_ACK_DEL 0x1b /* ACK delimiter */ -#define CAN_ERR_PROT_LOC_EOF 0x1a /* end of frame */ -#define CAN_ERR_PROT_LOC_INTERM 0x12 /* intermission */ - -/* error status of CAN-transceiver / data[4] */ - - /* CANH CANL */ -#define CAN_ERR_TRX_UNSPEC 0x00 /* 0000 0000 */ -#define CAN_ERR_TRX_CANH_NO_WIRE 0x04 /* 0000 0100 */ -#define CAN_ERR_TRX_CANH_SHORT_TO_BAT 0x05 /* 0000 0101 */ -#define CAN_ERR_TRX_CANH_SHORT_TO_VCC 0x06 /* 0000 0110 */ -#define CAN_ERR_TRX_CANH_SHORT_TO_GND 0x07 /* 0000 0111 */ -#define CAN_ERR_TRX_CANL_NO_WIRE 0x40 /* 0100 0000 */ -#define CAN_ERR_TRX_CANL_SHORT_TO_BAT 0x50 /* 0101 0000 */ -#define CAN_ERR_TRX_CANL_SHORT_TO_VCC 0x60 /* 0110 0000 */ -#define CAN_ERR_TRX_CANL_SHORT_TO_GND 0x70 /* 0111 0000 */ -#define CAN_ERR_TRX_CANL_SHORT_TO_CANH 0x80 /* 1000 0000 */ - -/* controller specific additional information / data[5..7] */ - -#endif /* _UAPI_CAN_ERROR_H */ diff --git a/include/nuttx/compiler.h b/include/nuttx/compiler.h index 7c244f2476a..c83b2e74947 100644 --- a/include/nuttx/compiler.h +++ b/include/nuttx/compiler.h @@ -159,6 +159,38 @@ # define inline_function __attribute__ ((always_inline,no_instrument_function)) # define noinline_function __attribute__ ((noinline)) +/* The noinstrument_function attribute informs GCC don't instrument it */ + +# define noinstrument_function __attribute__ ((no_instrument_function)) + +/* The nostackprotect_function attribute disables stack protection in + * sensitive functions, e.g., stack coloration routines. + */ + +#if defined(__has_attribute) +# if __has_attribute(no_stack_protector) +# define nostackprotect_function __attribute__ ((no_stack_protector)) +# endif +#endif + +/* nostackprotect_function definition for older versions of GCC and Clang. + * Note that Clang does not support setting per-function optimizations, + * simply disable the entire optimization pass for the required function. + */ + +#ifndef nostackprotect_function +# if defined(__clang__) +# define nostackprotect_function __attribute__ ((optnone)) +# else +# define nostackprotect_function __attribute__ ((__optimize__ ("-fno-stack-protector"))) +# endif +#endif + +/* The unsued code or data */ + +# define unused_code __attribute__((unused)) +# define unused_data __attribute__((unused)) + /* Some versions of GCC have a separate __syslog__ format. * http://mail-index.netbsd.org/source-changes/2015/10/14/msg069435.html * Use it if available. Otherwise, assume __printf__ accepts %m. @@ -415,6 +447,11 @@ # define inline_function # define noinline_function +# define noinstrument_function +# define nostackprotect_function + +# define unused_code +# define unused_data # define formatlike(a) # define printflike(a, b) @@ -550,6 +587,10 @@ # define naked_function # define inline_function # define noinline_function +# define noinstrument_function +# define nostackprotect_function +# define unused_code +# define unused_data # define formatlike(a) # define printflike(a, b) # define sysloglike(a, b) @@ -657,6 +698,10 @@ # define naked_function # define inline_function # define noinline_function +# define noinstrument_function +# define nostackprotect_function +# define unused_code +# define unused_data # define formatlike(a) # define printflike(a, b) # define sysloglike(a, b) @@ -719,6 +764,10 @@ # define naked_function # define inline_function # define noinline_function +# define noinstrument_function +# define nostackprotect_function +# define unused_code +# define unused_data # define formatlike(a) # define printflike(a, b) # define sysloglike(a, b) diff --git a/include/nuttx/contactless/pn532.h b/include/nuttx/contactless/pn532.h index f4cdcea460a..08292a80a00 100644 --- a/include/nuttx/contactless/pn532.h +++ b/include/nuttx/contactless/pn532.h @@ -1,37 +1,20 @@ /**************************************************************************** * include/nuttx/contactless/pn532.h * - * Copyright(C) 2012, 2013, 2016 Offcode Ltd. All rights reserved. - * Authors: Janne Rosberg - * Teemu Pirinen - * Juho Grundström + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/crypto/blake2s.h b/include/nuttx/crypto/blake2s.h index 5ee6ffa7442..ce29fc1a8c8 100644 --- a/include/nuttx/crypto/blake2s.h +++ b/include/nuttx/crypto/blake2s.h @@ -100,8 +100,8 @@ typedef struct blake2s_param__ #ifdef __GNUC__ > 3 #define BLAKE2_UNALIGNED 1 -typedef uint32_t uint32_alias_t __attribute__((may_alias, aligned(1))); -typedef uint16_t uint16_alias_t __attribute__((may_alias, aligned(1))); +typedef uint32_t uint32_alias_t __attribute__((may_alias)) aligned_data(1); +typedef uint16_t uint16_alias_t __attribute__((may_alias)) aligned_data(1); #endif /**************************************************************************** diff --git a/include/nuttx/fs/ioctl.h b/include/nuttx/fs/ioctl.h index 773acb36ee1..1e84674b4e4 100644 --- a/include/nuttx/fs/ioctl.h +++ b/include/nuttx/fs/ioctl.h @@ -84,9 +84,10 @@ #define _NOTECTLBASE (0x2c00) /* Note filter control ioctl commands*/ #define _NOTERAMBASE (0x2d00) /* Noteram device ioctl commands*/ #define _RCIOCBASE (0x2e00) /* Remote Control device ioctl commands */ -#define _HIMEMBASE (0x2f00) /* Himem device ioctl commands*/ -#define _EFUSEBASE (0x3000) /* Efuse device ioctl commands*/ -#define _MTRIOBASE (0x3100) /* Motor device ioctl commands*/ +#define _HIMEMBASE (0x2f00) /* Himem device ioctl commands */ +#define _EFUSEBASE (0x3000) /* Efuse device ioctl commands */ +#define _MTRIOBASE (0x3100) /* Motor device ioctl commands */ +#define _MATHIOBASE (0x3200) /* MATH device ioctl commands */ #define _WLIOCBASE (0x8b00) /* Wireless modules ioctl network commands */ /* boardctl() commands share the same number space */ @@ -553,6 +554,11 @@ #define _MTRIOCVALID(c) (_IOC_TYPE(c) == _MTRIOBASE) #define _MTRIOC(nr) _IOC(_MTRIOBASE, nr) +/* MATH drivers *************************************************************/ + +#define _MATHIOCVALID(c) (_IOC_TYPE(c) == _MATHIOBASE) +#define _MATHIOC(nr) _IOC(_MATHIOBASE, nr) + /* Wireless driver network ioctl definitions ********************************/ /* (see nuttx/include/wireless/wireless.h */ diff --git a/include/nuttx/irq.h b/include/nuttx/irq.h index 95009545455..ba43f423850 100644 --- a/include/nuttx/irq.h +++ b/include/nuttx/irq.h @@ -154,53 +154,6 @@ int irqchain_detach(int irq, xcpt_t isr, FAR void *arg); # define irqchain_detach(irq, isr, arg) irq_detach(irq) #endif -/**************************************************************************** - * Name: irq_waitlock - * - * Description: - * Spin to get g_irq_waitlock, handling a known deadlock condition: - * - * A deadlock may occur if enter_critical_section is called from an - * interrupt handler. Suppose: - * - * - CPUn is in a critical section and has the g_cpu_irqlock spinlock. - * - CPUm takes an interrupt and attempts to enter the critical section. - * - It spins waiting on g_cpu_irqlock with interrupts disabled. - * - CPUn calls up_cpu_pause() to pause operation on CPUm. This will - * issue an inter-CPU interrupt to CPUm - * - But interrupts are disabled on CPUm so the up_cpu_pause() is never - * handled, causing the deadlock. - * - * This same deadlock can occur in the normal tasking case: - * - * - A task on CPUn enters a critical section and has the g_cpu_irqlock - * spinlock. - * - Another task on CPUm attempts to enter the critical section but has - * to wait, spinning to get g_cpu_irqlock with interrupts disabled. - * - The task on CPUn causes a new task to become ready-to-run and the - * scheduler selects CPUm. CPUm is requested to pause via a pause - * interrupt. - * - But the task on CPUm is also attempting to enter the critical - * section. Since it is spinning with interrupts disabled, CPUm cannot - * process the pending pause interrupt, causing the deadlock. - * - * This function detects this deadlock condition while spinning with \ - * interrupts disabled. - * - * Input Parameters: - * cpu - The index of CPU that is trying to enter the critical section. - * - * Returned Value: - * True: The g_cpu_irqlock spinlock has been taken. - * False: The g_cpu_irqlock spinlock has not been taken yet, but there is - * a pending pause interrupt request. - * - ****************************************************************************/ - -#ifdef CONFIG_SMP -bool irq_waitlock(int cpu); -#endif - /**************************************************************************** * Name: enter_critical_section * @@ -209,7 +162,7 @@ bool irq_waitlock(int cpu); * instrumentation): * * Take the CPU IRQ lock and disable interrupts on all CPUs. A thread- - * specific counter is increment to indicate that the thread has IRQs + * specific counter is incremented to indicate that the thread has IRQs * disabled and to support nested calls to enter_critical_section(). * * NOTE: Most architectures do not support disabling all CPUs from one diff --git a/arch/arm/src/armv7-m/iar/arm_switchcontext.S b/include/nuttx/lcd/gc9a01.h similarity index 70% rename from arch/arm/src/armv7-m/iar/arm_switchcontext.S rename to include/nuttx/lcd/gc9a01.h index d038faf2810..6717eb11301 100644 --- a/arch/arm/src/armv7-m/iar/arm_switchcontext.S +++ b/include/nuttx/lcd/gc9a01.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/armv7-m/iar/arm_switchcontext.S + * include/nuttx/lcd/gc9a01.h * * Licensed to the Apache Software Foundation (ASF) under one or more * contributor license agreements. See the NOTICE file distributed with @@ -18,64 +18,55 @@ * ****************************************************************************/ +#ifndef __INCLUDE_NUTTX_GC9A01_H +#define __INCLUDE_NUTTX_GC9A01_H + /**************************************************************************** * Included Files ****************************************************************************/ -#include -#include - -#include "nvic.h" -#include "svcall.h" - - MODULE arm_switchcontext - SECTION .text:CODE:NOROOT(2) +#include /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** - * Public Symbols - ****************************************************************************/ - - PUBLIC arm_switchcontext - -/**************************************************************************** - * Macros + * Public Types ****************************************************************************/ /**************************************************************************** - * Public Functions + * Public Data + ****************************************************************************/ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/**************************************************************************** + * Public Function Prototypes ****************************************************************************/ /**************************************************************************** - * Name: arm_switchcontext + * Name: gc9a01_initialize * * Description: - * Save the current thread context and restore the specified context. - * Full prototype is: - * - * void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); + * Initialize the GC9A01 video hardware. The initial state of the + * LCD is fully initialized, display memory cleared, and the LCD ready + * to use, but with the power setting at 0 (full off == sleep mode). * * Returned Value: - * None + * + * On success, this function returns a reference to the LCD object for + * the specified LCD. NULL is returned on any failure. * ****************************************************************************/ - THUMB +FAR struct lcd_dev_s *gc9a01_lcdinitialize(FAR struct spi_dev_s *spi); -arm_switchcontext: +#ifdef __cplusplus +} +#endif - /* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */ - - mov r2, r1 /* R2: restoreregs */ - mov r1, r0 /* R1: saveregs */ - mov r0, #SYS_switch_context /* R0: context switch */ - svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */ - - /* We will get here only after the rerturn from the context switch */ - - bx lr - - END +#endif /* __INCLUDE_NUTTX_GC9A01_H */ diff --git a/include/nuttx/lcd/ili9225.h b/include/nuttx/lcd/ili9225.h index b8b24bc4337..399e5f4e43e 100644 --- a/include/nuttx/lcd/ili9225.h +++ b/include/nuttx/lcd/ili9225.h @@ -229,7 +229,7 @@ * Horizontal GRAM Address Set, Offset: 0x20 */ -#define ILI9225_HORIZONTAL_GRAM_ADDR_SET_AD_SHIFT (0) /* Set the initial vaue of adress counter */ +#define ILI9225_HORIZONTAL_GRAM_ADDR_SET_AD_SHIFT (0) /* Set the initial value of address counter */ #define ILI9225_HORIZONTAL_GRAM_ADDR_SET_AD_MASK (0xff << ILI9225_HORIZONTAL_GRAM_ADDR_SET_AD_SHIFT) #define ILI9225_HORIZONTAL_GRAM_ADDR_SET_AD(n) (((uint16_t)(n) << ILI9225_HORIZONTAL_GRAM_ADDR_SET_AD_SHIFT) & ILI9225_HORIZONTAL_GRAM_ADDR_SET_AD_MASK) @@ -237,7 +237,7 @@ * Vertical GRAM Address Set, Offset: 0x21 */ -#define ILI9225_VERTICAL_GRAM_ADDR_SET_AD_SHIFT (0) /* Set the initial vaue of adress counter */ +#define ILI9225_VERTICAL_GRAM_ADDR_SET_AD_SHIFT (0) /* Set the initial value of address counter */ #define ILI9225_VERTICAL_GRAM_ADDR_SET_AD_MASK (0xff << ILI9225_VERTICAL_GRAM_ADDR_SET_AD_SHIFT) #define ILI9225_VERTICAL_GRAM_ADDR_SET_AD(n) (((uint16_t)(n) << ILI9225_VERTICAL_GRAM_ADDR_SET_AD_SHIFT) & ILI9225_VERTICAL_GRAM_ADDR_SET_AD_MASK) diff --git a/include/nuttx/lcd/st7565.h b/include/nuttx/lcd/st7565.h index 7c3d143d012..db50198c863 100644 --- a/include/nuttx/lcd/st7565.h +++ b/include/nuttx/lcd/st7565.h @@ -1,48 +1,20 @@ /**************************************************************************** * include/nuttx/lcd/st7565.h * - * Definitions for the ST7565 128x64 Dot Matrix LCD - * Driver with C + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2014 Pierre-noel Bouteville. All rights reserved. - * Author: Pierre-noel Boutevlle + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on drivers/lcd/st7567.h - * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan - * - * Based on include/nuttx/lcd/ug-9664hswag01.h - * - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/lcd/st7567.h b/include/nuttx/lcd/st7567.h index 24cf7624e2b..34c032a4d54 100644 --- a/include/nuttx/lcd/st7567.h +++ b/include/nuttx/lcd/st7567.h @@ -1,43 +1,20 @@ /**************************************************************************** * include/nuttx/lcd/st7567.h * - * Driver for the TM12864J1CCWGWA Display with the ST7567 LCD - * controller. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2013 Zilogic Systems. All rights reserved. - * Author: Manikandan + * http://www.apache.org/licenses/LICENSE-2.0 * - * Based on include/nuttx/lcd/ug-9664hswag01.h - * - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/leds/userled.h b/include/nuttx/leds/userled.h index 9d0068b2968..d03f32f65d3 100644 --- a/include/nuttx/leds/userled.h +++ b/include/nuttx/leds/userled.h @@ -28,6 +28,8 @@ #include #include +#include + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ diff --git a/include/nuttx/math/cordic.h b/include/nuttx/math/cordic.h new file mode 100644 index 00000000000..fc83bdfc615 --- /dev/null +++ b/include/nuttx/math/cordic.h @@ -0,0 +1,190 @@ +/**************************************************************************** + * include/nuttx/math/cordic.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_MATH_CORDIC_H +#define __INCLUDE_NUTTX_MATH_CORDIC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef CONFIG_MATH_CORDIC_USE_Q31 + +/* q1.31 conversion */ + +# define ftoq31(f32_val) ((f32_val) * 0x80000000) +# define q31tof(q31_val) ((float)(q31_val) / (float)0x80000000) +# define b16toq31(b16_val) ((b16_val) * 0x8000) +# define q31tob16(q31_val) ((q31_val) / 0x8000) +#endif + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifdef CONFIG_MATH_CORDIC_USE_Q31 +/* q1.31 as int32_t */ + +typedef int32_t cordic_num_t; +#endif + +/* CORDIC functions */ + +enum cordic_calc_func_e +{ + CORDIC_CALC_FUNC_INVAL = 0, + CORDIC_CALC_FUNC_COS = 1, /* Primary result: cosine * m, + * secondary result: sine * m, + * primary argument: angle, + * secondary argument: modulus m + */ + CORDIC_CALC_FUNC_SIN = 2, /* Primary result: sine * m, + * secondary result: cosine * m, + * primary argument: angle, + * secondary argument: modulus m + */ + CORDIC_CALC_FUNC_PHASE = 3, /* Primary result: phase (atan2), + * secondary result: modulus, + * primary argument: x, + * secondary argument: y + */ + CORDIC_CALC_FUNC_MOD = 4, /* Primary result: modulus, + * secondary result: phase (atan2), + * primary argument: x, + * secondary argument: y + */ + CORDIC_CALC_FUNC_ARCTAN = 5, /* Primary result: arctangent, + * secondary result: none, + * primary argument: x, + * secondary argument: none + */ + CORDIC_CALC_FUNC_HCOS = 6, /* Primary result: hyperbolic cosine, + * secondary result: hyperbolic sine, + * primary argument: x, + * secondary argument: none + */ + CORDIC_CALC_FUNC_HSIN = 7, /* Primary result: hyperbolic sine, + * secondary result: hyperbolic cosine, + * primary argument: x, + * secondary argument: none + */ + CORDIC_CALC_FUNC_HARCTAN = 8, /* Primary result: hyperbolic arctangent, + * secondary result: none, + * primary argument: x, + * secondary argument: none + */ + CORDIC_CALC_FUNC_LN = 9, /* Primary result: natural logarithm, + * secondary result: none, + * primary argument: x, + * secondary argument: none + */ + CORDIC_CALC_FUNC_SQRT = 10, /* Primary result: square root, + * secondary result: none, + * primary argument: x, + * secondary argument: none + */ + CORDIC_CALC_FUNC_LAST +}; + +/* CORDIC calculate request */ + +struct cordic_calc_s +{ + /* CORDIC request configuration */ + + uint8_t func; /* CORDIC function */ + bool res2_incl; /* Include secondary result if available */ + + /* Input data */ + + cordic_num_t arg1; + cordic_num_t arg2; + + /* Output data */ + + cordic_num_t res1; + cordic_num_t res2; +}; + +/* This structure provides the "lower-half" driver operations available to + * the "upper-half" driver. + */ + +struct cordic_lowerhalf_s; +struct cordic_ops_s +{ + /* CORDIC calculate request */ + + CODE int (*calc)(FAR struct cordic_lowerhalf_s *lower, + FAR struct cordic_calc_s *calc); +}; + +/* This structure provides the publicly visible representation of the + * "lower-half" driver state structure. "lower half" drivers will have an + * internal structure definition that will be cast-compatible with this + * structure definitions. + */ + +struct cordic_lowerhalf_s +{ + /* Publicly visible portion of the "lower-half" driver state structure. */ + + FAR const struct cordic_ops_s *ops; /* Lower half operations */ +}; + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: cordic_register + * + * Description: + * Register a CORDIC driver. + * + ****************************************************************************/ + +int cordic_register(FAR const char *path, + FAR struct cordic_lowerhalf_s *lower); + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __INCLUDE_NUTTX_MATH_CORDIC_H */ diff --git a/include/nuttx/math/math_ioctl.h b/include/nuttx/math/math_ioctl.h new file mode 100644 index 00000000000..c051c46dd1f --- /dev/null +++ b/include/nuttx/math/math_ioctl.h @@ -0,0 +1,43 @@ +/**************************************************************************** + * include/nuttx/math/math_ioctl.h + * NuttX MATH-related IOCTLs definitions + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_MATH_MATH_IOCTL_H +#define __INCLUDE_NUTTX_MATH_MATH_IOCTL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* All MATH-related IOCTL commands must be defined in this header file + * in order to assure that every IOCTL command is unique and will not be + * aliased. + */ + +#define MATHIOC_CORDIC_CALC _MATHIOC(1) + +#endif /* __INCLUDE_NUTTX_MATH_MATH_IOCTL_H */ diff --git a/include/nuttx/mm/gran.h b/include/nuttx/mm/gran.h index 9528b2870f9..d515a1c3ca0 100644 --- a/include/nuttx/mm/gran.h +++ b/include/nuttx/mm/gran.h @@ -96,7 +96,7 @@ extern "C" * attribute to position a DMA heap in memory (logic in the linker script * would assign the section .dmaheap to the DMA memory. * - * FAR uint32_t g_dmaheap[DMAHEAP_SIZE] __attribute__((section(.dmaheap))); + * FAR uint32_t g_dmaheap[DMAHEAP_SIZE] locate_data(.dmaheap); * * The heap is created by calling gran_initialize. Here the granule size * is set to 64 bytes and the alignment to 16 bytes: diff --git a/include/nuttx/mqueue.h b/include/nuttx/mqueue.h index b6d99543936..149453ac56a 100644 --- a/include/nuttx/mqueue.h +++ b/include/nuttx/mqueue.h @@ -397,8 +397,7 @@ void nxmq_free_msgq(FAR struct mqueue_inode_s *msgq); * ****************************************************************************/ -int nxmq_alloc_msgq(FAR struct mq_attr *attr, - FAR struct mqueue_inode_s **msgq); +FAR struct mqueue_inode_s *nxmq_alloc_msgq(FAR struct mq_attr *attr); /**************************************************************************** * Name: nxmq_pollnotify diff --git a/include/nuttx/mtd/hamming.h b/include/nuttx/mtd/hamming.h index bb0e93efa0f..274a5d7a3e0 100644 --- a/include/nuttx/mtd/hamming.h +++ b/include/nuttx/mtd/hamming.h @@ -1,13 +1,6 @@ /**************************************************************************** * include/nuttx/mtd/hamming.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was taken directly from Atmel sample code with only - * modifications for better integration with NuttX. The Atmel sample - * code has a BSD compatible license that requires this copyright notice: - * * Copyright (c) 2011, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/include/nuttx/mtd/nand.h b/include/nuttx/mtd/nand.h index 37c5ad61714..17929934dac 100644 --- a/include/nuttx/mtd/nand.h +++ b/include/nuttx/mtd/nand.h @@ -1,13 +1,6 @@ /**************************************************************************** * include/nuttx/mtd/nand.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/include/nuttx/mtd/nand_config.h b/include/nuttx/mtd/nand_config.h index 92e353c14a1..ad50fd88255 100644 --- a/include/nuttx/mtd/nand_config.h +++ b/include/nuttx/mtd/nand_config.h @@ -1,13 +1,6 @@ /**************************************************************************** * include/nuttx/mtd/nand_config.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without @@ -51,7 +44,9 @@ /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Configuration ************************************************************ + /* Maximum number of blocks in a device */ #ifndef CONFIG_MTD_NAND_MAXNUMBLOCKS diff --git a/include/nuttx/mtd/nand_ecc.h b/include/nuttx/mtd/nand_ecc.h index bd86f558320..8247a258a86 100644 --- a/include/nuttx/mtd/nand_ecc.h +++ b/include/nuttx/mtd/nand_ecc.h @@ -1,13 +1,6 @@ /**************************************************************************** * include/nuttx/mtd/nand_ecc.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/include/nuttx/mtd/nand_model.h b/include/nuttx/mtd/nand_model.h index 717ff7c6bc0..b838f4e6a1e 100644 --- a/include/nuttx/mtd/nand_model.h +++ b/include/nuttx/mtd/nand_model.h @@ -1,18 +1,6 @@ /**************************************************************************** * include/nuttx/mtd/nand_model.h * - * ONFI Support. The Open NAND Flash Interface (ONFI) is an industry - * Workgroup made up of more than 100 companies that build, design-in, or - * enable NAND Flash memory. This file provides definitions for standardized - * ONFI NAND interfaces. - * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code for the SAMA5D3x with - * modifications for better integration with NuttX. The Atmel sample code - * has a BSD compatible license that requires this copyright notice: - * * Copyright (c) 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/include/nuttx/mtd/nand_raw.h b/include/nuttx/mtd/nand_raw.h index 57b999cfbd6..012007013b3 100644 --- a/include/nuttx/mtd/nand_raw.h +++ b/include/nuttx/mtd/nand_raw.h @@ -1,13 +1,6 @@ /**************************************************************************** * include/nuttx/mtd/nand_raw.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/include/nuttx/mtd/nand_scheme.h b/include/nuttx/mtd/nand_scheme.h index 2ab237d9a06..99633048cac 100644 --- a/include/nuttx/mtd/nand_scheme.h +++ b/include/nuttx/mtd/nand_scheme.h @@ -1,13 +1,6 @@ /**************************************************************************** * include/nuttx/mtd/nand_scheme.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This logic was based largely on Atmel sample code with modifications for - * better integration with NuttX. The Atmel sample code has a BSD - * compatible license that requires this copyright notice: - * * Copyright (c) 2012, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/include/nuttx/mtd/onfi.h b/include/nuttx/mtd/onfi.h index 46329278afd..6e579babfbf 100644 --- a/include/nuttx/mtd/onfi.h +++ b/include/nuttx/mtd/onfi.h @@ -1,18 +1,6 @@ /**************************************************************************** * include/nuttx/mtd/onfi.h * - * ONFI Support. The Open NAND Flash Interface (ONFI) is an industry - * Workgroup made up of more than 100 companies that build, design-in, or - * enable NAND Flash memory. This file provides definitions for standardized - * ONFI NAND interfaces. - * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * This ONFI logic was based largely on Atmel sample code for the SAMA5D3x - * with modifications for better integration with NuttX. The Atmel sample - * code has a BSD compatible license that requires this copyright notice: - * * Copyright (c) 2010, Atmel Corporation * * Redistribution and use in source and binary forms, with or without diff --git a/include/nuttx/net/ftmac100.h b/include/nuttx/net/ftmac100.h index bc918fd2f1c..888ddcbafed 100644 --- a/include/nuttx/net/ftmac100.h +++ b/include/nuttx/net/ftmac100.h @@ -1,38 +1,20 @@ /**************************************************************************** * include/nuttx/net/ftmac100.h - * Faraday FTMAC100 Ethernet MAC Definitions * - * Copyright (C) 2015 Anton D. Kachalov. All rights reserved. - * Author: Anton D. Kachalov + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Based on definitions provided by Po-Yu Chuang + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ @@ -194,7 +176,7 @@ struct ftmac100_register_s /* Transmit descriptor, aligned to 16 bytes */ -struct __attribute__ ((aligned(16))) ftmac100_txdes_s +struct aligned_data(16) ftmac100_txdes_s { uint32_t txdes0; uint32_t txdes1; @@ -204,7 +186,7 @@ struct __attribute__ ((aligned(16))) ftmac100_txdes_s /* Receive descriptor, aligned to 16 bytes */ -struct __attribute__ ((aligned(16))) ftmac100_rxdes_s +struct aligned_data(16) ftmac100_rxdes_s { uint32_t rxdes0; uint32_t rxdes1; diff --git a/include/nuttx/net/ip.h b/include/nuttx/net/ip.h index 4e6b940c5cb..7e3ec70f52b 100644 --- a/include/nuttx/net/ip.h +++ b/include/nuttx/net/ip.h @@ -52,6 +52,7 @@ #include #include +#include #include #include diff --git a/include/nuttx/net/pkt.h b/include/nuttx/net/pkt.h index 8eef8c1c0c1..c5ea63f7c18 100644 --- a/include/nuttx/net/pkt.h +++ b/include/nuttx/net/pkt.h @@ -1,39 +1,20 @@ /**************************************************************************** * include/nuttx/net/pkt.h - * Definitions for use with AF_PACKET sockets * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Daniel Laszlo Sitzer + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Includes some definitions that a compatible with the LGPL GNU C Library - * header file of the same name. + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/power/axp202.h b/include/nuttx/power/axp202.h new file mode 100644 index 00000000000..04c1048907c --- /dev/null +++ b/include/nuttx/power/axp202.h @@ -0,0 +1,191 @@ +/**************************************************************************** + * include/nuttx/power/axp202.h + * msa301 Driver declaration + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_POWER_BATTERY_AXP202_H +#define __INCLUDE_NUTTX_POWER_BATTERY_AXP202_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define AXP202_SLAVE_ADDRESS 0x35 +#define AXP202_CHIP_ID (0x41) + +#define AXP202_STATUS (0x00) +#define AXP202_MODE_CHGSTATUS (0x01) +#define AXP202_OTG_STATUS (0x02) +#define AXP202_IC_TYPE (0x03) +#define AXP202_DATA_BUFFER1 (0x04) +#define AXP202_DATA_BUFFER2 (0x05) +#define AXP202_DATA_BUFFER3 (0x06) +#define AXP202_DATA_BUFFER4 (0x07) +#define AXP202_DATA_BUFFER5 (0x08) +#define AXP202_DATA_BUFFER6 (0x09) +#define AXP202_DATA_BUFFER7 (0x0A) +#define AXP202_DATA_BUFFER8 (0x0B) +#define AXP202_DATA_BUFFER9 (0x0C) +#define AXP202_DATA_BUFFERA (0x0D) +#define AXP202_DATA_BUFFERB (0x0E) +#define AXP202_DATA_BUFFERC (0x0F) +#define AXP202_LDO234_DC23_CTL (0x12) +#define AXP202_DC2OUT_VOL (0x23) +#define AXP202_LDO3_DC2_DVM (0x25) +#define AXP202_DC3OUT_VOL (0x27) +#define AXP202_LDO24OUT_VOL (0x28) +#define AXP202_LDO3OUT_VOL (0x29) +#define AXP202_IPS_SET (0x30) +#define AXP202_VOFF_SET (0x31) +#define AXP202_OFF_CTL (0x32) +#define AXP202_CHARGE1 (0x33) +#define AXP202_CHARGE2 (0x34) +#define AXP202_BACKUP_CHG (0x35) +#define AXP202_POK_SET (0x36) +#define AXP202_DCDC_FREQSET (0x37) +#define AXP202_VLTF_CHGSET (0x38) +#define AXP202_VHTF_CHGSET (0x39) +#define AXP202_APS_WARNING1 (0x3A) +#define AXP202_APS_WARNING2 (0x3B) +#define AXP202_TLTF_DISCHGSET (0x3C) +#define AXP202_THTF_DISCHGSET (0x3D) +#define AXP202_DCDC_MODESET (0x80) +#define AXP202_ADC_EN1 (0x82) +#define AXP202_ADC_EN2 (0x83) +#define AXP202_ADC_SPEED (0x84) +#define AXP202_ADC_INPUTRANGE (0x85) +#define AXP202_ADC_IRQ_RETFSET (0x86) +#define AXP202_ADC_IRQ_FETFSET (0x87) +#define AXP202_TIMER_CTL (0x8A) +#define AXP202_VBUS_DET_SRP (0x8B) +#define AXP202_HOTOVER_CTL (0x8F) +#define AXP202_GPIO0_CTL (0x90) +#define AXP202_GPIO0_VOL (0x91) +#define AXP202_GPIO1_CTL (0x92) +#define AXP202_GPIO2_CTL (0x93) +#define AXP202_GPIO012_SIGNAL (0x94) +#define AXP202_GPIO3_CTL (0x95) +#define AXP202_INTEN1 (0x40) +#define AXP202_INTEN2 (0x41) +#define AXP202_INTEN3 (0x42) +#define AXP202_INTEN4 (0x43) +#define AXP202_INTEN5 (0x44) +#define AXP202_INTSTS1 (0x48) +#define AXP202_INTSTS2 (0x49) +#define AXP202_INTSTS3 (0x4A) +#define AXP202_INTSTS4 (0x4B) +#define AXP202_INTSTS5 (0x4C) + +/* axp 192/202 adc data register */ + +#define AXP202_BAT_AVERVOL_H8 (0x78) +#define AXP202_BAT_AVERVOL_L4 (0x79) +#define AXP202_BAT_AVERCHGCUR_H8 (0x7A) +#define AXP202_BAT_AVERCHGCUR_L4 (0x7B) +#define AXP202_BAT_AVERCHGCUR_L5 (0x7B) +#define AXP202_ACIN_VOL_H8 (0x56) +#define AXP202_ACIN_VOL_L4 (0x57) +#define AXP202_ACIN_CUR_H8 (0x58) +#define AXP202_ACIN_CUR_L4 (0x59) +#define AXP202_VBUS_VOL_H8 (0x5A) +#define AXP202_VBUS_VOL_L4 (0x5B) +#define AXP202_VBUS_CUR_H8 (0x5C) +#define AXP202_VBUS_CUR_L4 (0x5D) +#define AXP202_INTERNAL_TEMP_H8 (0x5E) +#define AXP202_INTERNAL_TEMP_L4 (0x5F) +#define AXP202_TS_IN_H8 (0x62) +#define AXP202_TS_IN_L4 (0x63) +#define AXP202_GPIO0_VOL_ADC_H8 (0x64) +#define AXP202_GPIO0_VOL_ADC_L4 (0x65) +#define AXP202_GPIO1_VOL_ADC_H8 (0x66) +#define AXP202_GPIO1_VOL_ADC_L4 (0x67) + +#define AXP202_BAT_AVERDISCHGCUR_H8 (0x7C) +#define AXP202_BAT_AVERDISCHGCUR_L5 (0x7D) +#define AXP202_APS_AVERVOL_H8 (0x7E) +#define AXP202_APS_AVERVOL_L4 (0x7F) +#define AXP202_INT_BAT_CHGCUR_H8 (0xA0) +#define AXP202_INT_BAT_CHGCUR_L4 (0xA1) +#define AXP202_EXT_BAT_CHGCUR_H8 (0xA2) +#define AXP202_EXT_BAT_CHGCUR_L4 (0xA3) +#define AXP202_INT_BAT_DISCHGCUR_H8 (0xA4) +#define AXP202_INT_BAT_DISCHGCUR_L4 (0xA5) +#define AXP202_EXT_BAT_DISCHGCUR_H8 (0xA6) +#define AXP202_EXT_BAT_DISCHGCUR_L4 (0xA7) +#define AXP202_BAT_CHGCOULOMB3 (0xB0) +#define AXP202_BAT_CHGCOULOMB2 (0xB1) +#define AXP202_BAT_CHGCOULOMB1 (0xB2) +#define AXP202_BAT_CHGCOULOMB0 (0xB3) +#define AXP202_BAT_DISCHGCOULOMB3 (0xB4) +#define AXP202_BAT_DISCHGCOULOMB2 (0xB5) +#define AXP202_BAT_DISCHGCOULOMB1 (0xB6) +#define AXP202_BAT_DISCHGCOULOMB0 (0xB7) +#define AXP202_COULOMB_CTL (0xB8) +#define AXP202_BAT_POWERH8 (0x70) +#define AXP202_BAT_POWERM8 (0x71) +#define AXP202_BAT_POWERL8 (0x72) + +#define AXP202_VREF_TEM_CTRL (0xF3) +#define AXP202_BATT_PERCENTAGE (0xB9) + +#define AXP202_BATT_VOLTAGE_STEP (1.1F) +#define AXP202_BATT_DISCHARGE_CUR_STEP (0.5F) +#define AXP202_BATT_CHARGE_CUR_STEP (0.5F) +#define AXP202_ACIN_VOLTAGE_STEP (1.7F) +#define AXP202_ACIN_CUR_STEP (0.625F) +#define AXP202_VBUS_VOLTAGE_STEP (1.7F) +#define AXP202_VBUS_CUR_STEP (0.375F) +#define AXP202_INTERNAL_TEMP_STEP (0.1F) +#define AXP202_APS_VOLTAGE_STEP (1.4F) +#define AXP202_TS_PIN_OUT_STEP (0.8F) +#define AXP202_GPIO0_STEP (0.5F) +#define AXP202_GPIO1_STEP (0.5F) + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#if defined(CONFIG_I2C) && defined(CONFIG_I2C_AXP202) + +#ifdef __cplusplus +extern "C" +{ +#endif + +struct i2c_master_s; +FAR struct battery_charger_dev_s *axp202_initialize( + FAR struct i2c_master_s *i2c, + uint8_t addr, + uint32_t frequency + ); + +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_I2C && CONFIG_I2C_AXP202 */ +#endif + diff --git a/include/nuttx/rptun/rptun.h b/include/nuttx/rptun/rptun.h index bba72edbc00..88d2cce3740 100644 --- a/include/nuttx/rptun/rptun.h +++ b/include/nuttx/rptun/rptun.h @@ -265,7 +265,7 @@ struct rptun_addrenv_s size_t size; }; -struct __attribute__((aligned(B2C(8)))) rptun_rsc_s +struct aligned_data(B2C(8)) rptun_rsc_s { struct resource_table rsc_tbl_hdr; unsigned int offset[2]; diff --git a/include/nuttx/sched.h b/include/nuttx/sched.h index 36c7ebadd79..3ee50dc8520 100644 --- a/include/nuttx/sched.h +++ b/include/nuttx/sched.h @@ -598,11 +598,14 @@ struct tcb_s /* Task Management Fields *************************************************/ pid_t pid; /* This is the ID of the thread */ - start_t start; /* Thread start function */ - entry_t entry; /* Entry Point into the thread */ uint8_t sched_priority; /* Current priority of the thread */ uint8_t init_priority; /* Initial priority of the thread */ + start_t start; /* Thread start function */ + entry_t entry; /* Entry Point into the thread */ + + uint8_t task_state; /* Current state of the thread */ + #ifdef CONFIG_PRIORITY_INHERITANCE #if CONFIG_SEM_NNESTPRIO > 0 uint8_t npend_reprio; /* Number of nested reprioritizations */ @@ -611,7 +614,6 @@ struct tcb_s uint8_t base_priority; /* "Normal" priority of the thread */ #endif - uint8_t task_state; /* Current state of the thread */ #ifdef CONFIG_SMP uint8_t cpu; /* CPU index if running/assigned */ cpu_set_t affinity; /* Bit set of permitted CPUs */ diff --git a/include/nuttx/sensors/hall3ph.h b/include/nuttx/sensors/hall3ph.h new file mode 100644 index 00000000000..d4dc2ddfaab --- /dev/null +++ b/include/nuttx/sensors/hall3ph.h @@ -0,0 +1,138 @@ +/**************************************************************************** + * include/nuttx/sensors/hall3ph.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_SENSORS_HALL3PH_H +#define __INCLUDE_NUTTX_SENSORS_HALL3PH_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* 120-degree Hall effect sensors positions */ + +enum hall3_120deg_position_e +{ + HALL3_120DEG_POS_1 = 0b001, + HALL3_120DEG_POS_2 = 0b011, + HALL3_120DEG_POS_3 = 0b010, + HALL3_120DEG_POS_4 = 0b110, + HALL3_120DEG_POS_5 = 0b100, + HALL3_120DEG_POS_6 = 0b101 +}; + +/* 60-degree Hall effect sensors postions */ + +enum hall3_60deg_position_e +{ + HALL3_60DEG_POS_1 = 0b000, + HALL3_60DEG_POS_2 = 0b001, + HALL3_60DEG_POS_3 = 0b101, + HALL3_60DEG_POS_4 = 0b111, + HALL3_60DEG_POS_5 = 0b110, + HALL3_60DEG_POS_6 = 0b010 +}; + +/* This structure provides the "lower-half" driver operations available to + * the "upper-half" driver. + */ + +struct hall3_lowerhalf_s; +struct hall3_ops_s +{ + /* Configure the 3-phase Hall effect sensor device */ + + CODE int (*setup)(FAR struct hall3_lowerhalf_s *lower); + + /* Disable the 3-phase Hall effect sensor device */ + + CODE int (*shutdown)(FAR struct hall3_lowerhalf_s *lower); + + /* Return the current 3-phase Hall effect sensor position */ + + CODE int (*position)(FAR struct hall3_lowerhalf_s *lower, + FAR uint8_t *pos); +}; + +/* This structure provides the publicly visible representation of the + * "lower-half" driver state structure. "lower half" drivers will have an + * internal structure definition that will be cast-compatible with this + * structure definitions. + */ + +struct hall3_lowerhalf_s +{ + FAR const struct hall3_ops_s *ops; +}; + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Name: hall3_register + * + * Description: + * Register the 3-phase Hall effect sensor lower half device as 'devpath' + * + * Input Parameters: + * devpath - The full path to the driver to register. E.g., "/dev/hall0" + * lower - An instance of the lower half interface + * + * Returned Value: + * Zero (OK) on success; a negated errno value on failure. The following + * possible error values may be returned (most are returned by + * register_driver()): + * + * EINVAL - 'path' is invalid for this operation + * EEXIST - An inode already exists at 'path' + * ENOMEM - Failed to allocate in-memory resources for the operation + * + ****************************************************************************/ + +int hall3_register(FAR const char *devpath, + FAR struct hall3_lowerhalf_s *lower); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_SENSORS_HALL3PH_H */ diff --git a/include/nuttx/sensors/ina3221.h b/include/nuttx/sensors/ina3221.h index f4bacc0397a..3cd7700e822 100644 --- a/include/nuttx/sensors/ina3221.h +++ b/include/nuttx/sensors/ina3221.h @@ -1,35 +1,20 @@ /**************************************************************************** * include/nuttx/sensors/ina3221.h * - * Copyright (C) 2018 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/sensors/ioctl.h b/include/nuttx/sensors/ioctl.h index a24e169c4ab..8e1f8c32894 100644 --- a/include/nuttx/sensors/ioctl.h +++ b/include/nuttx/sensors/ioctl.h @@ -284,4 +284,8 @@ #define SNIOC_SET_BUFFER_NUMBER _SNIOC(0x0084) +/* IOCTL commands unique to the Hall effect sensor */ + +#define SNIOC_GET_POSITION _SNIOC(0x0085) + #endif /* __INCLUDE_NUTTX_SENSORS_IOCTL_H */ diff --git a/include/nuttx/sensors/mpu60x0.h b/include/nuttx/sensors/mpu60x0.h index 537a341d883..adea6c1bf62 100644 --- a/include/nuttx/sensors/mpu60x0.h +++ b/include/nuttx/sensors/mpu60x0.h @@ -1,38 +1,20 @@ /**************************************************************************** * include/nuttx/sensors/mpu60x0.h * - * Support for the Invensense MPU6000 and MPU6050 MotionTracking(tm) - * 6-axis accelerometer and gyroscope. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Author: Bill Gatliff + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright+ - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/sensors/msa301.h b/include/nuttx/sensors/msa301.h new file mode 100644 index 00000000000..686b815a704 --- /dev/null +++ b/include/nuttx/sensors/msa301.h @@ -0,0 +1,162 @@ +/**************************************************************************** + * include/nuttx/sensors/msa301.h + * msa301 Driver declaration + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_SENSORS_MSA301 +#define __INCLUDE_NUTTX_SENSORS_MSA301 + +#if defined(CONFIG_I2C) && defined(CONFIG_SENSORS_MSA301) + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define MSA301_ACCEL_ADDR0 0x26 + +#define SNIOC_MSA301_START _SNIOC(0x0001) +#define SNIOC_MSA301_STOP _SNIOC(0x0002) +#define SNIOC_MSA301_SET_RANGE _SNIOC(0x0003) +#define SNIOC_MSA301_SET_RATE _SNIOC(0x0004) + +#define MSA301_REG_PARTID 0x01 +#define MSA301_REG_OUT_X_L 0x02 +#define MSA301_REG_OUT_X_H 0x03 +#define MSA301_REG_OUT_Y_L 0x04 +#define MSA301_REG_OUT_Y_H 0x05 +#define MSA301_REG_OUT_Z_L 0x06 +#define MSA301_REG_OUT_Z_H 0x07 +#define MSA301_REG_MOTIONINT 0x09 +#define MSA301_REG_DATAINT 0x0A +#define MSA301_REG_CLICKSTATUS 0x0B +#define MSA301_REG_RESRANGE 0x0F +#define MSA301_REG_ODR 0x10 +#define MSA301_REG_POWERMODE 0x11 +#define MSA301_REG_INTSET0 0x16 +#define MSA301_REG_INTSET1 0x17 +#define MSA301_REG_INTMAP0 0x19 +#define MSA301_REG_INTMAP1 0x1A +#define MSA301_REG_TAPDUR 0x2A +#define MSA301_REG_TAPTH 0x2B + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* The accelerometer ranges */ + +typedef enum +{ + MSA301_RANGE_2_G = 0x0, /* +/- 2g */ + MSA301_RANGE_4_G = 0x1, /* +/- 4g */ + MSA301_RANGE_8_G = 0x2, /* +/- 8g */ + MSA301_RANGE_16_G = 0x3, /* +/- 16g */ +} msa301_range_t; + +#define MSA301_CTL_RANGE_SHIFT (0x0) +#define MSA301_CTL_RANGE_MASK (0x3<<0) + +/* The accelerometer data rate */ + +typedef enum +{ + MSA301_RATE_1_HZ = 0, /* 1 Hz */ + MSA301_RATE_1_95_HZ = 1, /* 1.95 Hz */ + MSA301_RATE_3_9_HZ = 2, /* 3.9 Hz */ + MSA301_RATE_7_81_HZ = 3, /* 7.81 Hz */ + MSA301_RATE_15_63_HZ = 4, /* 15.63 Hz */ + MSA301_RATE_31_25_HZ = 5, /* 31.25 Hz */ + MSA301_RATE_62_5_HZ = 6, /* 62.5 Hz */ + MSA301_RATE_125_HZ = 7, /* 125 Hz */ + MSA301_RATE_250_HZ = 8, /* 250 Hz */ + MSA301_RATE_500_HZ = 9, /* 500 Hz */ + MSA301_RATE_1000_HZ = 10, /* 1000 Hz */ +} msa301_rate_t; + +#define MSA301_CTL_RATE_SHIFT (0x0) +#define MSA301_CTL_RATE_MASK (0xF<<0) + +#define MSA301_ENABLE_AXIS (0x0) +#define MSA301_DISABLE_AXIS (0x7) +#define MSA301_CTL_AXIS_SHIFT (0x05) +#define MSA301_CTL_AXIS_MASK (0x7<<5) + +/* The accelerometer power mode */ + +typedef enum +{ + MSA301_NORMALMODE = 0x00, /* Normal (high speed) mode */ + MSA301_LOWPOWERMODE = 0x01, /* Low power (slow speed) mode */ + MSA301_SUSPENDMODE = 0x10, /* Suspend (sleep) mode */ +} msa301_powermode_t; + +#define MSA301_CTL_POWERMODE_SHIFT (0x6) +#define MSA301_CTL_POWERMODE_MASK (0x3<<6) + +/* The accelerometer read resolution */ + +typedef enum +{ + MSA301_RESOLUTION_14 = 0, /* 14-bit resolution */ + MSA301_RESOLUTION_12 = 1, /* 12-bit resolution */ + MSA301_RESOLUTION_10 = 2, /* 10-bit resolution */ + MSA301_RESOLUTION_8 = 3, /* 8-bit resolution */ +} msa301_resolution_t; + +#define MSA301_CTL_RESOLUTION_SHIFT (0x2) +#define MSA301_CTL_RESOLUTION_MASK (0x3<<2) + +struct msa301_sensor_data_s +{ + int16_t x_data; + int16_t y_data; + int16_t z_data; + + float x_acc; /* X axis acceleration */ + float y_acc; /* Y axis acceleration */ + float z_acc; /* Z axis acceleration */ +}; + +#ifdef __cplusplus +extern "C" +{ +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +int msa301_sensor_register(FAR const char *devpath, + FAR struct i2c_master_s *i2c + ); + +#ifdef __cplusplus +} +#endif + +#endif /* CONFIG_I2C && CONFIG_SENSORS_MSA301 */ +#endif + diff --git a/include/nuttx/sensors/qencoder.h b/include/nuttx/sensors/qencoder.h index 81a783d3a49..7adc939b19f 100644 --- a/include/nuttx/sensors/qencoder.h +++ b/include/nuttx/sensors/qencoder.h @@ -50,13 +50,16 @@ * Argument: int32_t pointer to the location to return the position. * QEIOC_RESET - Reset the position to zero. * Argument: None + * QEIOC_POSMAX - Set the maximum position for the encoder. + * Argument: uint32_t maximum position */ #define QEIOC_POSITION _QEIOC(0x0001) /* Arg: int32_t* pointer */ #define QEIOC_RESET _QEIOC(0x0002) /* Arg: None */ +#define QEIOC_SETPOSMAX _QEIOC(0x0003) /* Arg: uint32_t */ #define QE_FIRST 0x0001 /* First required command */ -#define QE_NCMDS 2 /* Two required commands */ +#define QE_NCMDS 3 /* Two required commands */ /* User defined ioctl commands are also supported. These will be forwarded * by the upper-half QE driver to the lower-half QE driver via the ioctl() @@ -109,6 +112,10 @@ struct qe_ops_s CODE int (*position)(FAR struct qe_lowerhalf_s *lower, FAR int32_t *pos); + /* Set the maximum encoder position. */ + + CODE int (*setposmax)(FAR struct qe_lowerhalf_s *lower, uint32_t pos); + /* Reset the position measurement to zero. */ CODE int (*reset)(FAR struct qe_lowerhalf_s *lower); diff --git a/include/nuttx/sensors/sht3x.h b/include/nuttx/sensors/sht3x.h index b3452fae7c7..92548123e5a 100644 --- a/include/nuttx/sensors/sht3x.h +++ b/include/nuttx/sensors/sht3x.h @@ -1,34 +1,20 @@ /**************************************************************************** * include/nuttx/sensors/sht3x.h * - * Copyright (C) 2019 Hexagon AB. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/spinlock.h b/include/nuttx/spinlock.h index e930c05a037..af074e07288 100644 --- a/include/nuttx/spinlock.h +++ b/include/nuttx/spinlock.h @@ -45,7 +45,7 @@ typedef struct * SP_UNLOCKED - A definition of the unlocked state value (usually 0) * spinlock_t - The type of a spinlock memory object. * - * SP_LOCKED and SP_UNLOCKED must constants of type spinlock_t. + * SP_LOCKED and SP_UNLOCKED must be constants of type spinlock_t. */ #include @@ -96,14 +96,14 @@ typedef struct * This function must be provided via the architecture-specific logic. * * Input Parameters: - * lock - The address of spinlock object. + * lock - A reference to the spinlock object. * * Returned Value: - * The spinlock is always locked upon return. The value of previous value - * of the spinlock variable is returned, either SP_LOCKED if the spinlock - * as previously locked (meaning that the test-and-set operation failed to + * The spinlock is always locked upon return. The previous value of the + * spinlock variable is returned, either SP_LOCKED if the spinlock was + * previously locked (meaning that the test-and-set operation failed to * obtain the lock) or SP_UNLOCKED if the spinlock was previously unlocked - * (meaning that we successfully obtained the lock) + * (meaning that we successfully obtained the lock). * ****************************************************************************/ @@ -158,7 +158,7 @@ static inline spinlock_t up_testset(volatile FAR spinlock_t *lock) * * This implementation is non-reentrant and is prone to deadlocks in * the case that any logic on the same CPU attempts to take the lock - * more than one + * more than once. * * Input Parameters: * lock - A reference to the spinlock object to lock. @@ -361,7 +361,7 @@ void spin_clrbit(FAR volatile cpu_set_t *set, unsigned int cpu, * If the argument lock is not specified (i.e. NULL), * disable local interrupts and take the global spinlock (g_irq_spin) * if the call counter (g_irq_spin_count[cpu]) equals to 0. Then the - * counter on the CPU is increment to allow nested call and return + * counter on the CPU is incremented to allow nested calls and return * the interrupt state. * * If the argument lock is specified, @@ -389,7 +389,7 @@ void spin_clrbit(FAR volatile cpu_set_t *set, unsigned int cpu, #if defined(CONFIG_SMP) irqstate_t spin_lock_irqsave(spinlock_t *lock); #else -# define spin_lock_irqsave(l) up_irq_save() +# define spin_lock_irqsave(l) ((void)(l), up_irq_save()) #endif /**************************************************************************** @@ -403,7 +403,7 @@ irqstate_t spin_lock_irqsave(spinlock_t *lock); * restore the interrupt state as it was prior to the previous call to * spin_lock_irqsave(NULL). * - * If the argument lock is specified, release the the lock and + * If the argument lock is specified, release the lock and * restore the interrupt state as it was prior to the previous call to * spin_lock_irqsave(lock). * diff --git a/include/nuttx/timers/pwm.h b/include/nuttx/timers/pwm.h index 9e57ab32e68..1c2a93e53f3 100644 --- a/include/nuttx/timers/pwm.h +++ b/include/nuttx/timers/pwm.h @@ -120,7 +120,7 @@ struct pwm_chan_s { ub16_t duty; - uint8_t channel; + int8_t channel; }; #endif diff --git a/include/nuttx/tree.h b/include/nuttx/tree.h index 5941092809b..44bb2e0a166 100644 --- a/include/nuttx/tree.h +++ b/include/nuttx/tree.h @@ -81,7 +81,7 @@ #define SPLAY_ENTRY(type) \ struct \ { \ - struct type *spe_left; /* left element */ \ + struct type *spe_left; /* left element */ \ struct type *spe_right; /* right element */ \ } @@ -516,7 +516,7 @@ while (0) #define RB_PROTOTYPE(name, type, field, cmp) \ RB_PROTOTYPE_INTERNAL(name, type, field, cmp,) #define RB_PROTOTYPE_STATIC(name, type, field, cmp) \ - RB_PROTOTYPE_INTERNAL(name, type, field, cmp, __attribute__((__unused__)) static) + RB_PROTOTYPE_INTERNAL(name, type, field, cmp, unused_code static) #define RB_PROTOTYPE_INTERNAL(name, type, field, cmp, attr) \ attr void name##_RB_INSERT_COLOR(struct name *, struct type *); \ attr void name##_RB_REMOVE_COLOR(struct name *, struct type *, struct type *); \ @@ -536,7 +536,7 @@ while (0) RB_GENERATE_INTERNAL(name, type, field, cmp,) #define RB_GENERATE_STATIC(name, type, field, cmp) \ - RB_GENERATE_INTERNAL(name, type, field, cmp, __attribute__((__unused__)) static) + RB_GENERATE_INTERNAL(name, type, field, cmp, unused_code static) #define RB_GENERATE_INTERNAL(name, type, field, cmp, attr) \ attr void name##_RB_INSERT_COLOR(struct name *head, struct type *elm) \ diff --git a/include/nuttx/usb/rndis.h b/include/nuttx/usb/rndis.h index aa637faae8a..9e92b8dfda4 100644 --- a/include/nuttx/usb/rndis.h +++ b/include/nuttx/usb/rndis.h @@ -1,36 +1,20 @@ /**************************************************************************** * include/nuttx/usb/rndis.h * - * Copyright (C) 2011-2018 Gregory Nutt. All rights reserved. - * Authors: Sakari Kapanen , - * Petteri Aimonen + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/video/imgdata.h b/include/nuttx/video/imgdata.h new file mode 100644 index 00000000000..1847754fc1b --- /dev/null +++ b/include/nuttx/video/imgdata.h @@ -0,0 +1,108 @@ +/**************************************************************************** + * include/nuttx/video/imgdata.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_VIDEO_IMGDATA_H +#define __INCLUDE_NUTTX_VIDEO_IMGDATA_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Format definition for start_capture() and validate_frame_setting */ + +#define IMGDATA_FMT_MAX (2) +#define IMGDATA_FMT_MAIN (0) +#define IMGDATA_FMT_SUB (1) +#define IMGDATA_PIX_FMT_UYVY (0) +#define IMGDATA_PIX_FMT_RGB565 (1) +#define IMGDATA_PIX_FMT_JPEG (2) +#define IMGDATA_PIX_FMT_JPEG_WITH_SUBIMG (3) +#define IMGDATA_PIX_FMT_SUBIMG_UYVY (4) +#define IMGDATA_PIX_FMT_SUBIMG_RGB565 (5) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* structure for validate_frame_setting() and start_capture() */ + +typedef struct imgdata_format_s +{ + uint16_t width; + uint16_t height; + uint32_t pixelformat; +} imgdata_format_t; + +typedef struct imgdata_interval_s +{ + uint32_t numerator; + uint32_t denominator; +} imgdata_interval_t; + +typedef int (*imgdata_capture_t)(uint8_t result, uint32_t size); + +/* Structure for Data Control I/F */ + +struct imgdata_ops_s +{ + CODE int (*init)(void); + CODE int (*uninit)(void); + + CODE int (*validate_buf)(uint8_t *addr, uint32_t size); + CODE int (*set_buf)(uint8_t *addr, uint32_t size); + + CODE int (*validate_frame_setting)(uint8_t nr_datafmts, + FAR imgdata_format_t *datafmts, + FAR imgdata_interval_t *interval); + CODE int (*start_capture)(uint8_t nr_datafmts, + FAR imgdata_format_t *datafmts, + FAR imgdata_interval_t *interval, + FAR imgdata_capture_t callback); + CODE int (*stop_capture)(void); +}; + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/* Register image data operations. */ + +void imgdata_register(const FAR struct imgdata_ops_s *ops); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_VIDEO_IMGDATA_H */ diff --git a/include/nuttx/video/imgsensor.h b/include/nuttx/video/imgsensor.h new file mode 100644 index 00000000000..2545772c6cd --- /dev/null +++ b/include/nuttx/video/imgsensor.h @@ -0,0 +1,350 @@ +/**************************************************************************** + * include/nuttx/video/imgsensor.h + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_VIDEO_IMGSENSOR_H +#define __INCLUDE_NUTTX_VIDEO_IMGSENSOR_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Camera parameter IDs */ + +#define IMGSENSOR_ID_BRIGHTNESS (0x00000000) +#define IMGSENSOR_ID_CONTRAST (0x00000001) +#define IMGSENSOR_ID_SATURATION (0x00000002) +#define IMGSENSOR_ID_HUE (0x00000003) +#define IMGSENSOR_ID_AUTO_WHITE_BALANCE (0x00000004) +#define IMGSENSOR_ID_RED_BALANCE (0x00000005) +#define IMGSENSOR_ID_BLUE_BALANCE (0x00000006) +#define IMGSENSOR_ID_GAMMA (0x00000007) +#define IMGSENSOR_ID_GAMMA_CURVE (0x00000008) +#define IMGSENSOR_ID_EXPOSURE (0x00000009) +#define IMGSENSOR_ID_HFLIP_VIDEO (0x0000000a) +#define IMGSENSOR_ID_VFLIP_VIDEO (0x0000000b) +#define IMGSENSOR_ID_HFLIP_STILL (0x0000000c) +#define IMGSENSOR_ID_VFLIP_STILL (0x0000000d) +#define IMGSENSOR_ID_SHARPNESS (0x0000000e) +#define IMGSENSOR_ID_COLOR_KILLER (0x0000000f) +#define IMGSENSOR_ID_COLORFX (0x00000010) +#define IMGSENSOR_ID_AUTOBRIGHTNESS (0x00000011) +#define IMGSENSOR_ID_ROTATE (0x00000012) +#define IMGSENSOR_ID_EXPOSURE_AUTO (0x00010000) +#define IMGSENSOR_ID_EXPOSURE_ABSOLUTE (0x00010001) +#define IMGSENSOR_ID_FOCUS_ABSOLUTE (0x00010002) +#define IMGSENSOR_ID_FOCUS_RELATIVE (0x00010003) +#define IMGSENSOR_ID_FOCUS_AUTO (0x00010004) +#define IMGSENSOR_ID_ZOOM_ABSOLUTE (0x00010005) +#define IMGSENSOR_ID_ZOOM_RELATIVE (0x00010006) +#define IMGSENSOR_ID_ZOOM_CONTINUOUS (0x00010007) +#define IMGSENSOR_ID_IRIS_ABSOLUTE (0x00010008) +#define IMGSENSOR_ID_IRIS_RELATIVE (0x00010009) +#define IMGSENSOR_ID_AUTO_N_PRESET_WB (0x0001000a) +#define IMGSENSOR_ID_WIDE_DYNAMIC_RANGE (0x0001000b) +#define IMGSENSOR_ID_IMG_STABILIZATION (0x0001000c) +#define IMGSENSOR_ID_ISO_SENSITIVITY (0x0001000d) +#define IMGSENSOR_ID_ISO_SENSITIVITY_AUTO (0x0001000e) +#define IMGSENSOR_ID_EXPOSURE_METERING (0x0001000f) +#define IMGSENSOR_ID_3A_LOCK (0x00010011) +#define IMGSENSOR_ID_AUTO_FOCUS_START (0x00010012) +#define IMGSENSOR_ID_AUTO_FOCUS_STOP (0x00010013) +#define IMGSENSOR_ID_3A_PARAMETER (0x00010014) +#define IMGSENSOR_ID_3A_STATUS (0x00010015) +#define IMGSENSOR_ID_FLASH_LED_MODE (0x00020000) +#define IMGSENSOR_ID_JPEG_QUALITY (0x00030000) + +/* bit definition for IMGSENSOR_ID_3A_LOCK */ + +#define IMGSENSOR_LOCK_EXPOSURE (1 << 0) +#define IMGSENSOR_LOCK_WHITE_BALANCE (1 << 1) +#define IMGSENSOR_LOCK_FOCUS (1 << 2) + +/* Status bit definition for IMGSENSOR_ID_3A_STATUS */ + +#define IMGSENSOR_3A_STATUS_STABLE (0) +#define IMGSENSOR_3A_STATUS_AE_OPERATING (1 << 0) +#define IMGSENSOR_3A_STATUS_AWB_OPERATING (1 << 1) +#define IMGSENSOR_3A_STATUS_AF_OPERATING (1 << 2) + +/* Format definition for start_capture() and validate_frame_setting */ + +#define IMGSENSOR_FMT_MAX (2) +#define IMGSENSOR_FMT_MAIN (0) +#define IMGSENSOR_FMT_SUB (1) +#define IMGSENSOR_PIX_FMT_UYVY (0) +#define IMGSENSOR_PIX_FMT_RGB565 (1) +#define IMGSENSOR_PIX_FMT_JPEG (2) +#define IMGSENSOR_PIX_FMT_JPEG_WITH_SUBIMG (3) +#define IMGSENSOR_PIX_FMT_SUBIMG_UYVY (4) +#define IMGSENSOR_PIX_FMT_SUBIMG_RGB565 (5) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* enumeration for VIDEO_ID_COLORFX */ + +typedef enum imgsensor_colorfx_e +{ + IMGSENSOR_COLORFX_NONE = 0, + IMGSENSOR_COLORFX_BW = 1, + IMGSENSOR_COLORFX_SEPIA = 2, + IMGSENSOR_COLORFX_NEGATIVE = 3, + IMGSENSOR_COLORFX_EMBOSS = 4, + IMGSENSOR_COLORFX_SKETCH = 5, + IMGSENSOR_COLORFX_SKY_BLUE = 6, + IMGSENSOR_COLORFX_GRASS_GREEN = 7, + IMGSENSOR_COLORFX_SKIN_WHITEN = 8, + IMGSENSOR_COLORFX_VIVID = 9, + IMGSENSOR_COLORFX_AQUA = 10, + IMGSENSOR_COLORFX_ART_FREEZE = 11, + IMGSENSOR_COLORFX_SILHOUETTE = 12, + IMGSENSOR_COLORFX_SOLARIZATION = 13, + IMGSENSOR_COLORFX_ANTIQUE = 14, + IMGSENSOR_COLORFX_SET_CBCR = 15, + IMGSENSOR_COLORFX_PASTEL = 16, +} imgsensor_colorfx_t; + +/* enumeration for IMGSENSOR_ID_EXPOSURE_AUTO */ + +typedef enum imgsensor_exposure_auto_type_e +{ + /* exposure time:auto, iris aperture:auto */ + + IMGSENSOR_EXPOSURE_AUTO = 0, + + /* exposure time:manual, iris aperture:manual */ + + IMGSENSOR_EXPOSURE_MANUAL = 1, + + /* exposure time:manual, iris aperture:auto */ + + IMGSENSOR_EXPOSURE_SHUTTER_PRIORITY = 2, + + /* exposure time:auto, iris aperture:manual */ + + IMGSENSOR_EXPOSURE_APERTURE_PRIORITY = 3 +} imgsensor_exposure_auto_type_t; + +/* enumeration for IMGSENSOR_ID_AUTO_N_PRESET_WHITE_BALANCE */ + +typedef enum imgsensor_white_balance_e +{ + IMGSENSOR_WHITE_BALANCE_MANUAL = 0, + IMGSENSOR_WHITE_BALANCE_AUTO = 1, + IMGSENSOR_WHITE_BALANCE_INCANDESCENT = 2, + IMGSENSOR_WHITE_BALANCE_FLUORESCENT = 3, + IMGSENSOR_WHITE_BALANCE_FLUORESCENT_H = 4, + IMGSENSOR_WHITE_BALANCE_HORIZON = 5, + IMGSENSOR_WHITE_BALANCE_DAYLIGHT = 6, + IMGSENSOR_WHITE_BALANCE_FLASH = 7, + IMGSENSOR_WHITE_BALANCE_CLOUDY = 8, + IMGSENSOR_WHITE_BALANCE_SHADE = 9, +} imgsensor_white_balance_t; + +/* enumeration for IMGSENSOR_ID_ISO_SENSITIVITY_AUTO */ + +typedef enum imgsensor_iso_sensitivity_auto_type_e +{ + IMGSENSOR_ISO_SENSITIVITY_MANUAL = 0, + IMGSENSOR_ISO_SENSITIVITY_AUTO = 1, +} imgsensor_iso_sensitivity_auto_type_t; + +/* enumeration for IMGSENSOR_ID_EXPOSURE_METERING */ + +typedef enum imgsensor_exposure_metering_e +{ + IMGSENSOR_EXPOSURE_METERING_AVERAGE = 0, + IMGSENSOR_EXPOSURE_METERING_CENTER_WEIGHTED = 1, + IMGSENSOR_EXPOSURE_METERING_SPOT = 2, + IMGSENSOR_EXPOSURE_METERING_MATRIX = 3, +} imgsensor_exposure_metering_t; + +/* enumeration for IMGSENSOR_ID_FLASH_LED_MODE */ + +typedef enum imgsensor_flash_led_mode_e +{ + IMGSENSOR_FLASH_LED_MODE_NONE = 0, + IMGSENSOR_FLASH_LED_MODE_FLASH = 1, + IMGSENSOR_FLASH_LED_MODE_TORCH = 2, +} imgsensor_flash_led_mode_t; + +/* enumeration for get_supported_value() */ + +typedef enum imgsensor_ctrl_type_e +{ + IMGSENSOR_CTRL_TYPE_INTEGER = 1, + IMGSENSOR_CTRL_TYPE_BOOLEAN = 2, + IMGSENSOR_CTRL_TYPE_INTEGER64 = 5, + IMGSENSOR_CTRL_TYPE_BITMASK = 8, + IMGSENSOR_CTRL_TYPE_INTEGER_MENU = 9, + IMGSENSOR_CTRL_TYPE_U8FIXEDPOINT_Q7 = 10, + IMGSENSOR_CTRL_TYPE_U16FIXEDPOINT_Q8 = 11, + IMGSENSOR_CTRL_TYPE_INTEGER_TIMES_3 = 12, + IMGSENSOR_CTRL_TYPE_U8 = 0x0100, + IMGSENSOR_CTRL_TYPE_U16 = 0x0101, + IMGSENSOR_CTRL_TYPE_U32 = 0x0102, +} imgsensor_ctrl_type_t; + +/* enumeration for stream */ + +typedef enum imgsensor_stream_type_e +{ + IMGSENSOR_STREAM_TYPE_VIDEO = 0, + IMGSENSOR_STREAM_TYPE_STILL = 1, +} imgsensor_stream_type_t; + +/* structure for validate_frame_setting() and start_capture() */ + +typedef struct imgsensor_format_s +{ + uint16_t width; + uint16_t height; + uint32_t pixelformat; +} imgsensor_format_t; + +typedef struct imgsensor_interval_s +{ + uint32_t numerator; + uint32_t denominator; +} imgsensor_interval_t; + +/* structure for get_supported_value() */ + +typedef struct imgsensor_capability_range_s +{ + int64_t minimum; + int64_t maximum; + uint64_t step; + int64_t default_value; +} imgsensor_capability_range_t; + +typedef struct imgsensor_capability_discrete_s +{ + int8_t nr_values; + int32_t *values; + int32_t default_value; +} imgsensor_capability_discrete_t; + +typedef struct imgsensor_capability_elems_s +{ + uint32_t nr_elems; + int64_t minimum; + int64_t maximum; + uint64_t step; +} imgsensor_capability_elems_t; + +typedef struct imgsensor_supported_value_s +{ + imgsensor_ctrl_type_t type; /* control type */ + union + { + /* Use 'range' member in the following types cases. + * IMGSENSOR_CTRL_TYPE_INTEGER + * IMGSENSOR_CTRL_TYPE_BOOLEAN + * IMGSENSOR_CTRL_TYPE_INTEGER64 + * IMGSENSOR_CTRL_TYPE_BITMASK + * IMGSENSOR_CTRL_TYPE_U8FIXEDPOINT_Q7 + * IMGSENSOR_CTRL_TYPE_U16FIXEDPOINT_Q8 + * IMGSENSOR_CTRL_TYPE_INTEGER_TIMES_3 + */ + + imgsensor_capability_range_t range; + + /* Use 'discrete' member in the following type case. + * IMGSENSOR_CTRL_TYPE_INTEGER_MENU + */ + + imgsensor_capability_discrete_t discrete; + + /* Use 'elems' member in the following types cases. + * IMGSENSOR_CTRL_TYPE_U8 + * IMGSENSOR_CTRL_TYPE_U16 + * IMGSENSOR_CTRL_TYPE_U32 + */ + + imgsensor_capability_elems_t elems; + } u; +} imgsensor_supported_value_t; + +typedef union imgsensor_value_u +{ + int32_t value32; + int64_t value64; + uint8_t *p_u8; + uint16_t *p_u16; + uint32_t *p_u32; +} imgsensor_value_t; + +/* Structure for Image Sensor I/F */ + +struct imgsensor_ops_s +{ + CODE int (*init)(void); + CODE int (*uninit)(void); + + CODE int (*validate_frame_setting)(imgsensor_stream_type_t type, + uint8_t nr_datafmts, + FAR imgsensor_format_t *datafmts, + FAR imgsensor_interval_t *interval); + CODE int (*start_capture)(imgsensor_stream_type_t type, + uint8_t nr_datafmts, + FAR imgsensor_format_t *datafmts, + FAR imgsensor_interval_t *interval); + CODE int (*stop_capture)(imgsensor_stream_type_t type); + + CODE int (*get_supported_value)(uint32_t id, + FAR imgsensor_supported_value_t *value); + CODE int (*get_value)(uint32_t id, + uint32_t size, + FAR imgsensor_value_t *value); + CODE int (*set_value)(uint32_t id, + uint32_t size, + imgsensor_value_t value); +}; + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +/* Register image sensor operations. */ + +void imgsensor_register(const FAR struct imgsensor_ops_s *ops); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __INCLUDE_NUTTX_VIDEO_HALIF_H */ diff --git a/include/nuttx/video/isx012.h b/include/nuttx/video/isx012.h index 61a61a772aa..7130a4035bc 100644 --- a/include/nuttx/video/isx012.h +++ b/include/nuttx/video/isx012.h @@ -49,7 +49,7 @@ extern "C" * Public Function Prototypes ****************************************************************************/ -FAR struct video_devops_s *isx012_initialize(void); +int isx012_initialize(FAR struct i2c_master_s *i2c); int isx012_uninitialize(void); #undef EXTERN diff --git a/include/nuttx/video/max7456.h b/include/nuttx/video/max7456.h index 4842a7c3c40..5ec0dcad531 100644 --- a/include/nuttx/video/max7456.h +++ b/include/nuttx/video/max7456.h @@ -1,38 +1,20 @@ /**************************************************************************** * include/nuttx/video/max7456.h * - * Support for the Maxim MAX7456 Single-Channel Monochrome On-Screen - * Display with Integrated EEPROM (datasheet 19-0576; Rev 1; 8/08). + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Copyright (C) 2019 Bill Gatliff. All rights reserved. - * Author: Bill Gatliff + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/video/video.h b/include/nuttx/video/video.h index 4dbe4b1e7b2..63e83fbd968 100644 --- a/include/nuttx/video/video.h +++ b/include/nuttx/video/video.h @@ -25,10 +25,8 @@ * Included Files ****************************************************************************/ -#include -#include #include - +#include #include "video_controls.h" #ifdef __cplusplus @@ -150,6 +148,30 @@ extern "C" #define VIDIOC_CANCEL_DQBUF _VIDIOC(0x0016) +/* Query control for scene parameter + * Address pointing to struct v4s_query_ext_ctrl_scene + */ + +#define V4SIOC_QUERY_EXT_CTRL_SCENE _VIDIOC(0x0017) + +/* Query menu for scene parameter + * Address pointing to struct v4s_querymenu_scene + */ + +#define V4SIOC_QUERYMENU_SCENE _VIDIOC(0x0018) + +/* Get current control value + * Address pointing to struct v4s_ext_controls_scene + */ + +#define V4SIOC_G_EXT_CTRLS_SCENE _VIDIOC(0x0019) + +/* Set control value + * Address pointing to struct v4s_ext_controls_scene + */ + +#define V4SIOC_S_EXT_CTRLS_SCENE _VIDIOC(0x001a) + #define VIDEO_HSIZE_QVGA (320) /* QVGA horizontal size */ #define VIDEO_VSIZE_QVGA (240) /* QVGA vertical size */ #define VIDEO_HSIZE_VGA (640) /* VGA horizontal size */ @@ -188,6 +210,14 @@ extern "C" #define V4L2_PIX_FMT_JPEG_WITH_SUBIMG v4l2_fourcc('J', 'S', 'U', 'B') +/* YUV 4:2:2 for sub image */ + +#define V4L2_PIX_FMT_SUBIMG_UYVY v4l2_fourcc('S', 'Y', 'U', 'V') + +/* RGB565 for sub image */ + +#define V4L2_PIX_FMT_SUBIMG_RGB565 v4l2_fourcc('S', 'R', 'G', 'B') + /* MAX length of v4l2_fmtdesc description string */ #define V4L2_FMT_DSC_MAX (32) @@ -343,14 +373,13 @@ struct v4l2_fmtdesc uint32_t flags; char description[V4L2_FMT_DSC_MAX]; /* Description string */ uint32_t pixelformat; /* Format fourcc */ - uint32_t subimg_pixelformat; /* Format fourcc */ }; enum v4l2_frmsizetypes { - V4L2_FRMSIZE_TYPE_DISCRETE = 1, /* Discrete value */ + V4L2_FRMSIZE_TYPE_DISCRETE = 1, /* Discrete value */ V4L2_FRMSIZE_TYPE_CONTINUOUS = 2, /* Continuous value */ - V4L2_FRMSIZE_TYPE_STEPWISE = 3, /* Step value */ + V4L2_FRMSIZE_TYPE_STEPWISE = 3, /* Step value */ }; struct v4l2_frmsize_discrete @@ -375,33 +404,16 @@ struct v4l2_frmsizeenum uint32_t buf_type; /* enum #v4l2_buf_type */ uint32_t pixel_format; /* Pixel format */ uint32_t type; /* Frame size type the device supports. */ - union - { /* Frame size */ - struct v4l2_frmsize_discrete discrete; /* Use in type = - * V4L2_FRMSIZE_TYPE_DISCRETE - * case - */ - struct v4l2_frmsize_stepwise stepwise; /* Use in type = - * V4L2_FRMSIZE_TYPE_CONTINUOUS - * or V4L2_FRMSIZE_TYPE_STEPWISE - * case - */ - }; - uint32_t subimg_pixel_format; /* Pixel format of sub image */ - uint32_t subimg_type; /* Frame size type of subimage. */ + + /* In type == V4L2_FRMSIZE_TYPE_DISCRETE case, use discrete. + * Otherwise, use stepwise. + */ union - { /* Frame size of subimage */ - struct v4l2_frmsize_discrete discrete; /* Use in subimg_type = - * V4L2_FRMSIZE_TYPE_DISCRETE - * case - */ - struct v4l2_frmsize_stepwise stepwise; /* Use in subimg_type = - * V4L2_FRMSIZE_TYPE_CONTINUOUS - * or V4L2_FRMSIZE_TYPE_STEPWISE - * case - */ - } subimg; + { + struct v4l2_frmsize_discrete discrete; + struct v4l2_frmsize_stepwise stepwise; + }; }; /* type of frame interval enumeration */ @@ -437,9 +449,6 @@ struct v4l2_frmivalenum uint32_t pixel_format; /* Pixel format */ uint16_t width; /* Frame width */ uint16_t height; /* Frame height */ - uint32_t subimg_pixel_format; /* Pixel format for sub image */ - uint16_t subimg_width; /* Frame width for sub image */ - uint16_t subimg_height; /* Frame height for sub image */ uint32_t type; /* Frame interval type */ union { /* Frame interval */ @@ -455,9 +464,6 @@ struct v4l2_pix_format uint16_t width; /* Image width in pixels */ uint16_t height; /* Image height in pixels */ uint32_t pixelformat; /* The pixel format or type of compression. */ - uint16_t subimg_width; /* sub image width in pixels in case of pixelformat = V4L2_PIX_FMT_JPEG_WITH_SUBIMG */ - uint16_t subimg_height; /* sub image height in pixels in case of pixelformat = V4L2_PIX_FMT_JPEG_WITH_SUBIMG */ - uint32_t subimg_pixelformat; /* The pixel format of sub image in case of pixelformat = V4L2_PIX_FMT_JPEG_WITH_SUBIMG */ uint32_t field; /* enum #v4l2_field */ uint32_t bytesperline; /* for padding, zero if unused */ uint32_t sizeimage; /* Size in bytes of the buffer to hold a complete image */ @@ -556,7 +562,7 @@ struct v4l2_query_ext_ctrl uint32_t dims[V4L2_CTRL_MAX_DIMS]; /* Dimensions */ }; -begin_packed_struct struct v4l2_querymenu +struct v4l2_querymenu { uint16_t ctrl_class; /* camera control class */ uint16_t id; /* camera control id */ @@ -566,7 +572,7 @@ begin_packed_struct struct v4l2_querymenu char name[32]; /* name of menu */ int64_t value; /* value of menu */ }; -} end_packed_struct; +}; struct v4l2_control { @@ -578,7 +584,7 @@ struct v4l2_control * ioctl(VIDIOC_G_EXT_CTRLS / VIDIOC_S_EXT_CTRLS) */ -begin_packed_struct struct v4l2_ext_control +struct v4l2_ext_control { uint16_t id; /* camera control id */ uint16_t size; /* size of value(not use) */ @@ -592,7 +598,7 @@ begin_packed_struct struct v4l2_ext_control uint32_t *p_u32; /* QUERY_EXT_CTRL type = U32 */ void *ptr; }; -} end_packed_struct; +}; struct v4l2_ext_controls { @@ -606,9 +612,29 @@ struct v4l2_ext_controls struct v4l2_ext_control *controls; /* each control information */ }; -/**************************************************************************** - * Public Data - ****************************************************************************/ +/* Structure for V4SIOC_S_EXT_CTRLS and V4SIOC_G_EXT_CTRLS */ + +struct v4s_ext_controls_scene +{ + enum v4l2_scene_mode mode; /* scene mode to be controled */ + struct v4l2_ext_controls control; /* same as VIDIOC_S_EXT_CTRLS */ +}; + +/* Structure for V4SIOC_QUERY_EXT_CTRL */ + +struct v4s_query_ext_ctrl_scene +{ + enum v4l2_scene_mode mode; /* scene mode to be queried */ + struct v4l2_query_ext_ctrl control; /* same as VIDIOC_QUERY_EXT_CTRL */ +}; + +/* Structure for V4SIOC_QUERYMENU */ + +struct v4s_querymenu_scene +{ + enum v4l2_scene_mode mode; /* scene mode to be queried */ + struct v4l2_querymenu menu; /* same as VIDIOC_QUERYMENU */ +}; /**************************************************************************** * Public Function Prototypes @@ -622,8 +648,7 @@ struct v4l2_ext_controls * negative value is returned. */ -int video_initialize(FAR const char *devpath, - FAR const struct video_devops_s *devops); +int video_initialize(FAR const char *devpath); /* Uninitialize video driver. * diff --git a/include/nuttx/video/video_halif.h b/include/nuttx/video/video_halif.h deleted file mode 100644 index c6791aecb78..00000000000 --- a/include/nuttx/video/video_halif.h +++ /dev/null @@ -1,84 +0,0 @@ -/**************************************************************************** - * include/nuttx/video/video_halif.h - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -#ifndef __INCLUDE_NUTTX_VIDEO_HALIF_H -#define __INCLUDE_NUTTX_VIDEO_HALIF_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ -#include - -/**************************************************************************** - * Public Types - ****************************************************************************/ - -struct video_devops_s -{ - CODE int (*open)(FAR void *video_priv); - CODE int (*close)(void); - - CODE int (*do_halfpush)(bool enable); - CODE int (*set_buftype)(enum v4l2_buf_type type); - CODE int (*set_buf)(uint32_t bufaddr, uint32_t bufsize); - CODE int (*cancel_dma)(void); - CODE int (*get_range_of_fmt)(FAR struct v4l2_fmtdesc *format); - CODE int (*get_range_of_framesize)(FAR struct v4l2_frmsizeenum *frmsize); - CODE int (*try_format)(FAR struct v4l2_format *format); - CODE int (*set_format)(FAR struct v4l2_format *format); - CODE int (*get_range_of_frameinterval) - (FAR struct v4l2_frmivalenum *frmival); - CODE int (*set_frameinterval)(FAR struct v4l2_streamparm *parm); - CODE int (*get_range_of_ctrlvalue)(FAR struct v4l2_query_ext_ctrl *range); - CODE int (*get_menu_of_ctrlvalue)(FAR struct v4l2_querymenu *menu); - CODE int (*get_ctrlvalue)(uint16_t ctrl_class, - FAR struct v4l2_ext_control *control); - CODE int (*set_ctrlvalue)(uint16_t ctrl_class, - FAR struct v4l2_ext_control *control); - CODE int (*refresh)(void); -}; - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -#ifdef __cplusplus -#define EXTERN extern "C" -extern "C" -{ -#else -#define EXTERN extern -#endif - -/**************************************************************************** - * Public Functions Definitions - ****************************************************************************/ - -int video_common_notify_dma_done(uint8_t err_code, - uint32_t buf_type, - uint32_t datasize, - FAR void *priv); - -#undef EXTERN -#ifdef __cplusplus -} -#endif - -#endif /* __INCLUDE_NUTTX_VIDEO_HALIF_H */ diff --git a/include/nuttx/wireless/ieee802154/ieee802154_mac.h b/include/nuttx/wireless/ieee802154/ieee802154_mac.h index 782325f200b..9e2294c37f0 100644 --- a/include/nuttx/wireless/ieee802154/ieee802154_mac.h +++ b/include/nuttx/wireless/ieee802154/ieee802154_mac.h @@ -1,41 +1,20 @@ /***************************************************************************** * include/nuttx/wireless/ieee802154/ieee802154_mac.h * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * The naming and comments for various fields are taken directly - * from the IEEE 802.15.4 2011 standard. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * *****************************************************************************/ diff --git a/include/nuttx/wireless/ieee802154/ieee802154_radio.h b/include/nuttx/wireless/ieee802154/ieee802154_radio.h index a9cbe3b5007..a70cc545b60 100644 --- a/include/nuttx/wireless/ieee802154/ieee802154_radio.h +++ b/include/nuttx/wireless/ieee802154/ieee802154_radio.h @@ -1,37 +1,20 @@ /**************************************************************************** * include/nuttx/wireless/ieee802154/ieee802154_radio.h * - * Copyright (C) 2014-2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/wireless/ieee802154/xbee.h b/include/nuttx/wireless/ieee802154/xbee.h index 27ae7155561..c5da192131b 100644 --- a/include/nuttx/wireless/ieee802154/xbee.h +++ b/include/nuttx/wireless/ieee802154/xbee.h @@ -1,35 +1,20 @@ /**************************************************************************** * include/nuttx/wireless/ieee802154/xbee.h * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/include/nuttx/wqueue.h b/include/nuttx/wqueue.h index fc04ff9262e..659f1b8596a 100644 --- a/include/nuttx/wqueue.h +++ b/include/nuttx/wqueue.h @@ -338,14 +338,14 @@ int work_usrstart(void); * the caller. Otherwise, the work structure is completely managed by the * work queue logic. The caller should never modify the contents of the * work queue structure directly. If work_queue() is called before the - * previous work as been performed and removed from the queue, then any + * previous work has been performed and removed from the queue, then any * pending work will be canceled and lost. * * Input Parameters: * qid - The work queue ID * work - The work structure to queue - * worker - The worker callback to be invoked. The callback will invoked - * on the worker thread of execution. + * worker - The worker callback to be invoked. The callback will be + * invoked on the worker thread of execution. * arg - The argument that will be passed to the worker callback when * it is invoked. * delay - Delay (in clock ticks) from the time queue until the worker @@ -364,12 +364,12 @@ int work_queue(int qid, FAR struct work_s *work, worker_t worker, * * Description: * Cancel previously queued work. This removes work from the work queue. - * After work has been cancelled, it may be re-queue by calling + * After work has been cancelled, it may be requeued by calling * work_queue() again. * * Input Parameters: * qid - The work queue ID - * work - The previously queue work structure to cancel + * work - The previously queued work structure to cancel * * Returned Value: * Zero on success, a negated errno on failure diff --git a/include/strings.h b/include/strings.h index a9142bbacf8..f0c216db325 100644 --- a/include/strings.h +++ b/include/strings.h @@ -40,15 +40,16 @@ * Removed from Open Group Base Specifications Issue 7/ * IEEE Std 1003.1-2008 */ -#ifndef bcmp + +#ifndef bcmp /* See mm/README.txt */ #define bcmp(b1,b2,len) memcmp(b1,b2,(size_t)len) #endif -#ifndef bcopy +#ifndef bcopy /* See mm/README.txt */ #define bcopy(b1,b2,len) (void)memmove(b2,b1,len) #endif -#ifndef bzero +#ifndef bzero /* See mm/README.txt */ #define bzero(s,n) (void)memset(s,0,n) #endif diff --git a/include/sys/boardctl.h b/include/sys/boardctl.h index 43320a01e33..a1059ec5790 100644 --- a/include/sys/boardctl.h +++ b/include/sys/boardctl.h @@ -202,6 +202,7 @@ #define BOARDIOC_TESTSET _BOARDIOC(0x0011) #define BOARDIOC_UNIQUEKEY _BOARDIOC(0x0012) #define BOARDIOC_SWITCH_BOOT _BOARDIOC(0x0013) +#define BOARDIOC_BOOT_IMAGE _BOARDIOC(0x0014) /* If CONFIG_BOARDCTL_IOCTL=y, then board-specific commands will be support. * In this case, all commands not recognized by boardctl() will be forwarded @@ -210,7 +211,7 @@ * User defined board commands may begin with this value: */ -#define BOARDIOC_USER _BOARDIOC(0x0014) +#define BOARDIOC_USER _BOARDIOC(0x0015) /**************************************************************************** * Public Type Definitions @@ -392,6 +393,17 @@ struct boardioc_nxterm_ioctl_s }; #endif /* CONFIG_NXTERM */ +#ifdef CONFIG_BOARDCTL_BOOT_IMAGE + +/* Structure containing the arguments to the BOARDIOC_BOOT_IMAGE command */ + +struct boardioc_boot_info_s +{ + FAR const char *path; /* Path to application firmware image */ + uint32_t header_size; /* Size of the image header in bytes */ +}; +#endif + /**************************************************************************** * Public Data ****************************************************************************/ diff --git a/include/sys/poll.h b/include/sys/poll.h index 10c274c4625..015874fb1c2 100644 --- a/include/sys/poll.h +++ b/include/sys/poll.h @@ -74,7 +74,7 @@ #define POLLERR (0x08) #define POLLHUP (0x10) -#define POLLRDHUP (0x10) +#define POLLRDHUP (0x10) /* NuttX does not support shutdown(fd, SHUT_RD) */ #define POLLNVAL (0x20) #define POLLFD (0x00) diff --git a/include/sys/statfs.h b/include/sys/statfs.h index b3dffe1165c..c465e9e1eea 100644 --- a/include/sys/statfs.h +++ b/include/sys/statfs.h @@ -106,14 +106,14 @@ struct statfs { - uint32_t f_type; /* Type of filesystem (see definitions above) */ - size_t f_namelen; /* Maximum length of filenames */ - size_t f_bsize; /* Optimal block size for transfers */ - off_t f_blocks; /* Total data blocks in the file system of this size */ - off_t f_bfree; /* Free blocks in the file system */ - off_t f_bavail; /* Free blocks avail to non-superuser */ - off_t f_files; /* Total file nodes in the file system */ - off_t f_ffree; /* Free file nodes in the file system */ + uint32_t f_type; /* Type of filesystem (see definitions above) */ + size_t f_namelen; /* Maximum length of filenames */ + size_t f_bsize; /* Optimal block size for transfers */ + fsblkcnt_t f_blocks; /* Total data blocks in the file system of this size */ + fsblkcnt_t f_bfree; /* Free blocks in the file system */ + fsblkcnt_t f_bavail; /* Free blocks avail to non-superuser */ + fsfilcnt_t f_files; /* Total file nodes in the file system */ + fsfilcnt_t f_ffree; /* Free file nodes in the file system */ }; /**************************************************************************** diff --git a/include/threads.h b/include/threads.h index 76c03bef161..a52b17561b5 100644 --- a/include/threads.h +++ b/include/threads.h @@ -76,7 +76,7 @@ /* thrd_start_t: function pointer type passed to thrd_create */ -typedef CODE int (*thrd_start_t)(FAR void *arg) +typedef CODE int (*thrd_start_t)(FAR void *arg); /* mtx_t : mutex identifier */ @@ -106,14 +106,14 @@ typedef CODE void (*tss_dtor_t)(FAR void *); */ #define thrd_create(thr,func,arg) \ - pthread_create(thr,NULL,(pthread_startroutine_t)func,arg) + pthread_create(thr,NULL,(pthread_startroutine_t)(func),arg) /* thrd_equal: checks if two identifiers refer to the same thread * * int thrd_equal(thrd_t lhs, thrd_t rhs); */ -#define thrd_equal(lhs,rhs) (lhs == rhs) +#define thrd_equal(lhs,rhs) ((lhs) == (rhs)) /* thrd_current: obtains the current thread identifier * @@ -143,7 +143,7 @@ typedef CODE void (*tss_dtor_t)(FAR void *); * _Noreturn void thrd_exit(int res); */ -#define thrd_exit(res) pthread_exit((pthread_addr_t)res) +#define thrd_exit(res) pthread_exit((pthread_addr_t)(res)) /* thrd_detach: detaches a thread * @@ -159,7 +159,7 @@ typedef CODE void (*tss_dtor_t)(FAR void *); static inline int thrd_join(thrd_t thr, int *res) { - pthread_addr_t *value; + pthread_addr_t value; int ret = pthread_join(thr, &value); if (res) { @@ -183,7 +183,7 @@ static inline int mtx_init(FAR mtx_t *mutex, int type) if (type & mtx_recursive) { - pthread_attr_init(&attr); + pthread_mutexattr_init(&attr); pthread_mutexattr_settype(&attr, PTHREAD_MUTEX_RECURSIVE); pattr = &attr; } diff --git a/libs/libc/locale/lib_gettext.c b/libs/libc/locale/lib_gettext.c index 0ffe233e231..52b8f0fff09 100644 --- a/libs/libc/locale/lib_gettext.c +++ b/libs/libc/locale/lib_gettext.c @@ -312,7 +312,7 @@ FAR char *dcngettext(FAR const char *domainname, return notrans; } - strncpy(mofile->path, path, PATH_MAX); + strlcpy(mofile->path, path, PATH_MAX); mofile->map = momap(path, &mofile->size); if (mofile->map == MAP_FAILED) { diff --git a/libs/libc/machine/arm/armv8-m/arch_ceil.c b/libs/libc/machine/arm/armv8-m/arch_ceil.c index 42102451098..c7dde0ae248 100644 --- a/libs/libc/machine/arm/armv8-m/arch_ceil.c +++ b/libs/libc/machine/arm/armv8-m/arch_ceil.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_ceil.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_ceilf.c b/libs/libc/machine/arm/armv8-m/arch_ceilf.c index ed27ec7194b..0c140365cb7 100644 --- a/libs/libc/machine/arm/armv8-m/arch_ceilf.c +++ b/libs/libc/machine/arm/armv8-m/arch_ceilf.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_ceilf.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_floor.c b/libs/libc/machine/arm/armv8-m/arch_floor.c index f9a0b9ccb49..971d70e1ce4 100644 --- a/libs/libc/machine/arm/armv8-m/arch_floor.c +++ b/libs/libc/machine/arm/armv8-m/arch_floor.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_floor.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_floorf.c b/libs/libc/machine/arm/armv8-m/arch_floorf.c index 5d481ece301..b2fcdeaf779 100644 --- a/libs/libc/machine/arm/armv8-m/arch_floorf.c +++ b/libs/libc/machine/arm/armv8-m/arch_floorf.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_floorf.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_nearbyint.c b/libs/libc/machine/arm/armv8-m/arch_nearbyint.c index 701e787a29e..f2a9aa741bb 100644 --- a/libs/libc/machine/arm/armv8-m/arch_nearbyint.c +++ b/libs/libc/machine/arm/armv8-m/arch_nearbyint.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_nearbyint.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_nearbyintf.c b/libs/libc/machine/arm/armv8-m/arch_nearbyintf.c index 67690660da7..dee6fd4f7cc 100644 --- a/libs/libc/machine/arm/armv8-m/arch_nearbyintf.c +++ b/libs/libc/machine/arm/armv8-m/arch_nearbyintf.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_nearbyintf.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_rint.c b/libs/libc/machine/arm/armv8-m/arch_rint.c index b3b9d31e96f..d9cdd321713 100644 --- a/libs/libc/machine/arm/armv8-m/arch_rint.c +++ b/libs/libc/machine/arm/armv8-m/arch_rint.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_rint.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_rintf.c b/libs/libc/machine/arm/armv8-m/arch_rintf.c index 7c57f922c9b..ff80a768348 100644 --- a/libs/libc/machine/arm/armv8-m/arch_rintf.c +++ b/libs/libc/machine/arm/armv8-m/arch_rintf.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_rintf.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_round.c b/libs/libc/machine/arm/armv8-m/arch_round.c index 969a8596129..b9cac084d34 100644 --- a/libs/libc/machine/arm/armv8-m/arch_round.c +++ b/libs/libc/machine/arm/armv8-m/arch_round.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_round.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_roundf.c b/libs/libc/machine/arm/armv8-m/arch_roundf.c index 6e9a85c6744..062386679c5 100644 --- a/libs/libc/machine/arm/armv8-m/arch_roundf.c +++ b/libs/libc/machine/arm/armv8-m/arch_roundf.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_roundf.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_trunc.c b/libs/libc/machine/arm/armv8-m/arch_trunc.c index 2929b6d61c2..39300cba81e 100644 --- a/libs/libc/machine/arm/armv8-m/arch_trunc.c +++ b/libs/libc/machine/arm/armv8-m/arch_trunc.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_trunc.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/machine/arm/armv8-m/arch_truncf.c b/libs/libc/machine/arm/armv8-m/arch_truncf.c index 5d513440b5b..fd3c5d8be39 100644 --- a/libs/libc/machine/arm/armv8-m/arch_truncf.c +++ b/libs/libc/machine/arm/armv8-m/arch_truncf.c @@ -1,10 +1,6 @@ /**************************************************************************** * libs/libc/machine/arm/armv8-m/arch_truncf.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * - * Adapted for NuttX from BSD licensed code provided by ARM: - * * Copyright (c) 2011, 2012 ARM Ltd. All rights reserved. * * Redistribution and use in source and binary forms, with or without diff --git a/libs/libc/math/__cos.c b/libs/libc/math/__cos.c index 1dd82b943d9..312123817b5 100644 --- a/libs/libc/math/__cos.c +++ b/libs/libc/math/__cos.c @@ -1,8 +1,6 @@ /**************************************************************************** * libs/libc/math/__cos.c * - * Ported to NuttX from FreeBSD by Alan Carvalho de Assis: - * * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. * * Developed at SunSoft, a Sun Microsystems, Inc. business. diff --git a/libs/libc/math/__sin.c b/libs/libc/math/__sin.c index 5dc4c80c61f..7c5cf69218f 100644 --- a/libs/libc/math/__sin.c +++ b/libs/libc/math/__sin.c @@ -1,8 +1,6 @@ /**************************************************************************** * libs/libc/math/__sin.c * - * Ported to NuttX from FreeBSD by Alan Carvalho de Assis: - * * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. * * Developed at SunSoft, a Sun Microsystems, Inc. business. diff --git a/libs/libc/math/lib_acosh.c b/libs/libc/math/lib_acosh.c index 071f4fd744e..0468d6af062 100644 --- a/libs/libc/math/lib_acosh.c +++ b/libs/libc/math/lib_acosh.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_acosh.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_acoshf.c b/libs/libc/math/lib_acoshf.c index ec7bb1d5b40..1151640aa78 100644 --- a/libs/libc/math/lib_acoshf.c +++ b/libs/libc/math/lib_acoshf.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_acoshf.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_acoshl.c b/libs/libc/math/lib_acoshl.c index c828aa245ff..a7a5defe616 100644 --- a/libs/libc/math/lib_acoshl.c +++ b/libs/libc/math/lib_acoshl.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_acoshl.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_asinh.c b/libs/libc/math/lib_asinh.c index 68af325793c..9244403cdb4 100644 --- a/libs/libc/math/lib_asinh.c +++ b/libs/libc/math/lib_asinh.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_asinh.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_asinhf.c b/libs/libc/math/lib_asinhf.c index 18cbc7c1ae9..f34406defce 100644 --- a/libs/libc/math/lib_asinhf.c +++ b/libs/libc/math/lib_asinhf.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_asinhf.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_asinhl.c b/libs/libc/math/lib_asinhl.c index 74fa182f41c..61f3fa11463 100644 --- a/libs/libc/math/lib_asinhl.c +++ b/libs/libc/math/lib_asinhl.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_asinhl.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_atanh.c b/libs/libc/math/lib_atanh.c index 0d4c2847a44..749bdc17a6c 100644 --- a/libs/libc/math/lib_atanh.c +++ b/libs/libc/math/lib_atanh.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_atanh.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_atanhf.c b/libs/libc/math/lib_atanhf.c index 60ffe660d29..63aa8e0dbfd 100644 --- a/libs/libc/math/lib_atanhf.c +++ b/libs/libc/math/lib_atanhf.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_atanhf.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_atanhl.c b/libs/libc/math/lib_atanhl.c index 9b9244d9534..039c1c02614 100644 --- a/libs/libc/math/lib_atanhl.c +++ b/libs/libc/math/lib_atanhl.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_atanhl.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_copysignf.c b/libs/libc/math/lib_copysignf.c index 137dfbfa3f0..d5d5dd05c1b 100644 --- a/libs/libc/math/lib_copysignf.c +++ b/libs/libc/math/lib_copysignf.c @@ -1,13 +1,6 @@ /**************************************************************************** * libs/libc/math/lib_copysignf.c * - * Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Dave Marples - * - * Replaced on 2016-07-30 by David Alession with a faster version of - * copysignf() from NetBSD with the following Copyright: - * * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. * * Developed at SunPro, a Sun Microsystems, Inc. business. diff --git a/libs/libc/math/lib_erfl.c b/libs/libc/math/lib_erfl.c index 02c511514b2..94066dfa211 100644 --- a/libs/libc/math/lib_erfl.c +++ b/libs/libc/math/lib_erfl.c @@ -1,35 +1,20 @@ /**************************************************************************** * libs/libc/math/lib_erfl.c * - * Copyright (C) 2015 Brennan Ashton. All rights reserved. - * Author: Brennan Ashton + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/libs/libc/math/lib_lgamma.c b/libs/libc/math/lib_lgamma.c index fa0020ee5d7..efd32a9d79a 100644 --- a/libs/libc/math/lib_lgamma.c +++ b/libs/libc/math/lib_lgamma.c @@ -1,8 +1,6 @@ /**************************************************************************** * libs/libc/math/lib_lgamma.c * - * Ported to NuttX from FreeBSD by Alan Carvalho de Assis: - * * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved. * * Developed at SunSoft, a Sun Microsystems, Inc. business. diff --git a/libs/libc/misc/lib_glob.c b/libs/libc/misc/lib_glob.c index d6a48dde885..32ff4f1e6f7 100644 --- a/libs/libc/misc/lib_glob.c +++ b/libs/libc/misc/lib_glob.c @@ -41,23 +41,24 @@ ****************************************************************************/ struct match_s - { - struct match_s *next; - char name[]; - }; +{ + FAR struct match_s *next; + char name[]; +}; /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static int append(struct match_s **tail, const char *name, +static int append(FAR struct match_s **tail, FAR const char *name, size_t len, int mark); -static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, - int (*errfunc)(const char *path, int err), - struct match_s **tail); -static int ignore_err(const char *path, int err); -static void freelist(struct match_s *head); -static int sort(const void *a, const void *b); +static int do_glob(FAR char *buf, size_t pos, int type, FAR char *pat, + int flags, + CODE int (*errfunc)(FAR const char *path, int err), + FAR struct match_s **tail); +static int ignore_err(FAR const char *path, int err); +static void freelist(FAR struct match_s *head); +static int sort(FAR const void *a, FAR const void *b); /**************************************************************************** * Private Functions @@ -67,10 +68,10 @@ static int sort(const void *a, const void *b); * Name: append ****************************************************************************/ -static int append(struct match_s **tail, const char *name, +static int append(FAR struct match_s **tail, FAR const char *name, size_t len, int mark) { - struct match_s *new = lib_malloc(sizeof(struct match_s) + len + 2); + FAR struct match_s *new = lib_malloc(sizeof(struct match_s) + len + 2); if (!new) { return -1; @@ -93,10 +94,22 @@ static int append(struct match_s **tail, const char *name, * Name: do_glob ****************************************************************************/ -static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, - int (*errfunc)(const char *path, int err), - struct match_s **tail) +static int do_glob(FAR char *buf, size_t pos, int type, FAR char *pat, + int flags, + CODE int (*errfunc)(FAR const char *path, int err), + FAR struct match_s **tail) { + ptrdiff_t i = 0; + ptrdiff_t j = 0; + int in_bracket = 0; + int overflow = 0; + FAR char *p2; + char saved_sep = '/'; + FAR DIR *dir; + int old_errno; + FAR struct dirent *de; + int readerr; + /* If GLOB_MARK is unused, we don't care about type. */ if (!type && !(flags & GLOB_MARK)) @@ -122,9 +135,6 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, * and un-escaping it to the running buffer as we go. */ - ptrdiff_t i = 0; - ptrdiff_t j = 0; - int in_bracket = 0, overflow = 0; for (; pat[i] != '*' && pat[i] != '?' && (!in_bracket || pat[i] != ']'); i++) { @@ -253,7 +263,7 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, return 0; } - char *p2 = strchr(pat, '/'), saved_sep = '/'; + p2 = strchr(pat, '/'); /* Check if the '/' was escaped and, if so, remove the escape char * so that it will not be unpaired when passed to fnmatch. @@ -261,7 +271,7 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, if (p2 && !(flags & GLOB_NOESCAPE)) { - char *p; + FAR char *p; const int prev_index = -1; for (p = p2; p > pat && p[prev_index] == '\\'; p--) { @@ -274,7 +284,7 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, } } - DIR *dir = opendir(pos ? buf : "."); + dir = opendir(pos ? buf : "."); if (!dir) { if (errfunc(buf, errno) || (flags & GLOB_ERR)) @@ -285,10 +295,13 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, return 0; } - int old_errno = errno; - struct dirent *de; + old_errno = errno; while (errno = 0, de = readdir(dir)) { + size_t l; + int fnm_flags; + int r; + /* Quickly skip non-directories when there's pattern left. */ if (p2 && de->d_type && de->d_type != DT_DIR && de->d_type != DT_LNK) @@ -296,7 +309,7 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, continue; } - size_t l = strlen(de->d_name); + l = strlen(de->d_name); if (l >= PATH_MAX - pos) { continue; @@ -307,8 +320,8 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, *p2 = 0; } - int fnm_flags = ((flags & GLOB_NOESCAPE) ? FNM_NOESCAPE : 0) - | FNM_PERIOD; + fnm_flags = ((flags & GLOB_NOESCAPE) ? FNM_NOESCAPE : 0) + | FNM_PERIOD; if (fnmatch(pat, de->d_name, fnm_flags)) { @@ -322,7 +335,7 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, *p2 = saved_sep; } - int r = do_glob(buf, pos + l, de->d_type, p2 ? p2 : "", + r = do_glob(buf, pos + l, de->d_type, p2 ? p2 : "", flags, errfunc, tail); if (r) { @@ -331,7 +344,7 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, } } - int readerr = errno; + readerr = errno; if (p2) { *p2 = saved_sep; @@ -351,7 +364,7 @@ static int do_glob(char *buf, size_t pos, int type, char *pat, int flags, * Name: ignore_err ****************************************************************************/ -static int ignore_err(const char *path, int err) +static int ignore_err(FAR const char *path, int err) { return 0; } @@ -360,10 +373,10 @@ static int ignore_err(const char *path, int err) * Name: freelist ****************************************************************************/ -static void freelist(struct match_s *head) +static void freelist(FAR struct match_s *head) { - struct match_s *match; - struct match_s *next; + FAR struct match_s *match; + FAR struct match_s *next; for (match = head->next; match; match = next) { next = match->next; @@ -375,9 +388,9 @@ static void freelist(struct match_s *head) * Name: sort ****************************************************************************/ -static int sort(const void *a, const void *b) +static int sort(FAR const void *a, FAR const void *b) { - return strcmp(*(const char**)a, *(const char**)b); + return strcmp(*(FAR const char**)a, *(FAR const char**)b); } /**************************************************************************** @@ -388,16 +401,16 @@ static int sort(const void *a, const void *b) * Name: glob ****************************************************************************/ -int glob(const char *pat, int flags, - int (*errfunc)(const char *path, int err), - glob_t *g) +int glob(FAR const char *pat, int flags, + CODE int (*errfunc)(FAR const char *path, int err), + FAR glob_t *g) { struct match_s head = { .next = NULL }; - struct match_s *tail = &head; + FAR struct match_s *tail = &head; size_t cnt; size_t i; size_t offs = (flags & GLOB_DOOFFS) ? g->gl_offs : 0; @@ -418,15 +431,17 @@ int glob(const char *pat, int flags, if (*pat) { - char *p = strdup(pat); + FAR char *p = strdup(pat); + size_t pos = 0; + FAR char *s; + if (!p) { return GLOB_NOSPACE; } buf[0] = 0; - size_t pos = 0; - char *s = p; + s = p; error = do_glob(buf, pos, 0, s, flags, errfunc, &tail); @@ -463,8 +478,8 @@ int glob(const char *pat, int flags, if (flags & GLOB_APPEND) { - char **pathv = lib_realloc(g->gl_pathv, - (offs + g->gl_pathc + cnt + 1) * sizeof(char *)); + FAR char **pathv = lib_realloc(g->gl_pathv, + (offs + g->gl_pathc + cnt + 1) * sizeof(FAR char *)); if (!pathv) { freelist(&head); @@ -476,7 +491,7 @@ int glob(const char *pat, int flags, } else { - g->gl_pathv = lib_malloc((offs + cnt + 1) * sizeof(char *)); + g->gl_pathv = lib_malloc((offs + cnt + 1) * sizeof(FAR char *)); if (!g->gl_pathv) { freelist(&head); @@ -499,7 +514,7 @@ int glob(const char *pat, int flags, if (!(flags & GLOB_NOSORT)) { - qsort(g->gl_pathv + offs, cnt, sizeof(char *), sort); + qsort(g->gl_pathv + offs, cnt, sizeof(FAR char *), sort); } return error; @@ -509,7 +524,7 @@ int glob(const char *pat, int flags, * Name: globfree ****************************************************************************/ -void globfree(glob_t *g) +void globfree(FAR glob_t *g) { size_t i; for (i = 0; i < g->gl_pathc; i++) diff --git a/libs/libc/pthread/pthread_barrierattr_destroy.c b/libs/libc/pthread/pthread_barrierattr_destroy.c index 9b25f5fe25e..95e0d57af99 100644 --- a/libs/libc/pthread/pthread_barrierattr_destroy.c +++ b/libs/libc/pthread/pthread_barrierattr_destroy.c @@ -59,10 +59,6 @@ int pthread_barrierattr_destroy(FAR pthread_barrierattr_t *attr) { ret = EINVAL; } - else - { - attr->pshared = PTHREAD_PROCESS_PRIVATE; - } return ret; } diff --git a/libs/libc/sched/sched_backtrace.c b/libs/libc/sched/sched_backtrace.c index bc318cd02d3..5c35bdac1b0 100644 --- a/libs/libc/sched/sched_backtrace.c +++ b/libs/libc/sched/sched_backtrace.c @@ -25,6 +25,7 @@ #include #include +#include #include #include diff --git a/libs/libc/stdio/lib_fgetpos.c b/libs/libc/stdio/lib_fgetpos.c index 465f89ce5a4..d5a76711b90 100644 --- a/libs/libc/stdio/lib_fgetpos.c +++ b/libs/libc/stdio/lib_fgetpos.c @@ -45,7 +45,7 @@ * reposition a stream. * * Returned Value: - * Zero on succes; -1 on failure with errno set appropriately. + * Zero on success; -1 on failure with errno set appropriately. * ****************************************************************************/ diff --git a/libs/libc/stdio/lib_fseek.c b/libs/libc/stdio/lib_fseek.c index 3ed6f8c8eea..b10ca41c21c 100644 --- a/libs/libc/stdio/lib_fseek.c +++ b/libs/libc/stdio/lib_fseek.c @@ -50,7 +50,7 @@ * ungetc(3) function on the same stream. * * Returned Value: - * Zero on succes; -1 on failure with errno set appropriately. + * Zero on success; -1 on failure with errno set appropriately. * ****************************************************************************/ diff --git a/libs/libc/stdio/lib_fsetpos.c b/libs/libc/stdio/lib_fsetpos.c index 15d46051451..5c8111b7b7b 100644 --- a/libs/libc/stdio/lib_fsetpos.c +++ b/libs/libc/stdio/lib_fsetpos.c @@ -47,7 +47,7 @@ * only way to portably reposition a stream. * * Returned Value: - * Zero on succes; -1 on failure with errno set appropriately. + * Zero on success; -1 on failure with errno set appropriately. * ****************************************************************************/ diff --git a/libs/libc/stdio/lib_libfread.c b/libs/libc/stdio/lib_libfread.c index 09f572b122c..e4b218ff018 100644 --- a/libs/libc/stdio/lib_libfread.c +++ b/libs/libc/stdio/lib_libfread.c @@ -207,8 +207,8 @@ ssize_t lib_fread(FAR void *ptr, size_t count, FAR FILE *stream) } else { - /* An error occurred on the read. The error code - * is in the 'errno' variable. + /* An error occurred on the read. The error + * code is in the 'errno' variable. */ _NX_SETERRNO(bytes_read); diff --git a/libs/libc/stdlib/lib_aligned_alloc.c b/libs/libc/stdlib/lib_aligned_alloc.c index ee025063b99..53bcebc99a0 100644 --- a/libs/libc/stdlib/lib_aligned_alloc.c +++ b/libs/libc/stdlib/lib_aligned_alloc.c @@ -30,6 +30,7 @@ * Public Functions ****************************************************************************/ +#undef aligned_alloc /* See mm/README.txt */ FAR void *aligned_alloc(size_t align, size_t size) { return lib_memalign(align, size); diff --git a/libs/libc/stdlib/lib_atoi.c b/libs/libc/stdlib/lib_atoi.c index 1a9496db2f5..4181464e50f 100644 --- a/libs/libc/stdlib/lib_atoi.c +++ b/libs/libc/stdlib/lib_atoi.c @@ -28,7 +28,7 @@ * Public Functions ****************************************************************************/ -#undef atoi +#undef atoi /* See mm/README.txt */ int atoi(FAR const char *nptr) { return strtol(nptr, NULL, 10); diff --git a/libs/libc/stdlib/lib_atol.c b/libs/libc/stdlib/lib_atol.c index 8d8b2ac04fc..d1d6ba84ed6 100644 --- a/libs/libc/stdlib/lib_atol.c +++ b/libs/libc/stdlib/lib_atol.c @@ -28,7 +28,7 @@ * Public Functions ****************************************************************************/ -#undef atol +#undef atol /* See mm/README.txt */ long atol(FAR const char *nptr) { return strtol(nptr, NULL, 10); diff --git a/libs/libc/stdlib/lib_posix_memalign.c b/libs/libc/stdlib/lib_posix_memalign.c index f7fea9952bf..f4f8e5ef9d4 100644 --- a/libs/libc/stdlib/lib_posix_memalign.c +++ b/libs/libc/stdlib/lib_posix_memalign.c @@ -31,6 +31,7 @@ * Public Functions ****************************************************************************/ +#undef posix_memalign /* See mm/README.txt */ int posix_memalign(FAR void **mem, size_t align, size_t size) { *mem = lib_memalign(align, size); diff --git a/libs/libc/stdlib/lib_valloc.c b/libs/libc/stdlib/lib_valloc.c index fa16ccc4df8..1c72cf7e921 100644 --- a/libs/libc/stdlib/lib_valloc.c +++ b/libs/libc/stdlib/lib_valloc.c @@ -49,6 +49,7 @@ * ****************************************************************************/ +#undef valloc /* See mm/README.txt */ FAR void *valloc(size_t size) { return lib_memalign(sysconf(_SC_PAGESIZE), size); diff --git a/libs/libc/string/Make.defs b/libs/libc/string/Make.defs index 1836eeff643..04b588adc66 100644 --- a/libs/libc/string/Make.defs +++ b/libs/libc/string/Make.defs @@ -21,24 +21,26 @@ # Add the string C files to the build CSRCS += lib_ffs.c lib_ffsl.c lib_ffsll.c lib_fls.c lib_flsl.c -CSRCS += lib_flsll.c lib_isbasedigit.c -CSRCS += lib_memccpy.c lib_memcmp.c lib_memrchr.c +CSRCS += lib_flsll.c lib_isbasedigit.c lib_memccpy.c lib_memrchr.c CSRCS += lib_popcount.c lib_popcountl.c lib_popcountll.c CSRCS += lib_skipspace.c lib_stpcpy.c lib_stpncpy.c lib_strcasecmp.c -CSRCS += lib_strcat.c lib_strchr.c lib_strchrnul.c lib_strcspn.c -CSRCS += lib_strdup.c lib_strerror.c lib_strnlen.c -CSRCS += lib_strncasecmp.c lib_strncat.c lib_strncmp.c lib_strncpy.c +CSRCS += lib_strcat.c lib_strcspn.c lib_strchrnul.c lib_strdup.c +CSRCS += lib_strerror.c lib_strncasecmp.c lib_strncat.c lib_strncmp.c CSRCS += lib_strndup.c lib_strcasestr.c lib_strpbrk.c lib_strrchr.c CSRCS += lib_strspn.c lib_strstr.c lib_strtok.c lib_strtokr.c CSRCS += lib_strsep.c lib_strerrorr.c lib_explicit_bzero.c lib_strsignal.c CSRCS += lib_anbstr2cstr.c lib_ancstr2bstr.c lib_bmem2cmem.c CSRCS += lib_bstrnlen.c lib_cmem2bmem.c lib_nbstr2cstr.c lib_ncstr2bstr.c -CSRCS += lib_index.c lib_rindex.c lib_strlcpy.c +CSRCS += lib_index.c lib_rindex.c ifneq ($(CONFIG_LIBC_ARCH_MEMCHR),y) CSRCS += lib_memchr.c endif +ifneq ($(CONFIG_LIBC_ARCH_MEMCMP),y) +CSRCS += lib_memcmp.c +endif + ifneq ($(CONFIG_LIBC_ARCH_MEMCPY),y) ifeq ($(CONFIG_MEMCPY_VIK),y) CSRCS += lib_vikmemcpy.c @@ -47,26 +49,42 @@ CSRCS += lib_memcpy.c endif endif -ifneq ($(CONFIG_LIBC_ARCH_MEMSET),y) -CSRCS += lib_memset.c -endif - ifneq ($(CONFIG_LIBC_ARCH_MEMMOVE),y) CSRCS += lib_memmove.c endif -ifneq ($(CONFIG_LIBC_ARCH_STRCPY),y) -CSRCS += lib_strcpy.c +ifneq ($(CONFIG_LIBC_ARCH_MEMSET),y) +CSRCS += lib_memset.c +endif + +ifneq ($(CONFIG_LIBC_ARCH_STRCHR),y) +CSRCS += lib_strchr.c endif ifneq ($(CONFIG_LIBC_ARCH_STRCMP),y) CSRCS += lib_strcmp.c endif +ifneq ($(CONFIG_LIBC_ARCH_STRCPY),y) +CSRCS += lib_strcpy.c +endif + +ifneq ($(CONFIG_LIBC_ARCH_STRLCPY),y) +CSRCS += lib_strlcpy.c +endif + ifneq ($(CONFIG_LIBC_ARCH_STRLEN),y) CSRCS += lib_strlen.c endif +ifneq ($(CONFIG_LIBC_ARCH_STRNCPY),y) +CSRCS += lib_strncpy.c +endif + +ifneq ($(CONFIG_LIBC_ARCH_STRNLEN),y) +CSRCS += lib_strnlen.c +endif + ifeq ($(CONFIG_LIBC_LOCALE),y) CSRCS += lib_strcoll.c lib_strxfrm.c endif diff --git a/libs/libc/string/lib_index.c b/libs/libc/string/lib_index.c index 3a9f9601c0f..e62745ccf91 100644 --- a/libs/libc/string/lib_index.c +++ b/libs/libc/string/lib_index.c @@ -32,7 +32,7 @@ * Name: index ****************************************************************************/ -#undef index +#undef index /* See mm/README.txt */ FAR char *index(FAR const char *s, int c) { return strchr(s, c); diff --git a/libs/libc/string/lib_memccpy.c b/libs/libc/string/lib_memccpy.c index b4283f5fca5..e9f1773ebbf 100644 --- a/libs/libc/string/lib_memccpy.c +++ b/libs/libc/string/lib_memccpy.c @@ -46,7 +46,7 @@ * ****************************************************************************/ -#undef memccpy +#undef memccpy /* See mm/README.txt */ FAR void *memccpy(FAR void *s1, FAR const void *s2, int c, size_t n) { FAR unsigned char *pout = (FAR unsigned char *)s1; diff --git a/libs/libc/string/lib_memchr.c b/libs/libc/string/lib_memchr.c index 4143fc00a8d..ec96b1cbc3f 100644 --- a/libs/libc/string/lib_memchr.c +++ b/libs/libc/string/lib_memchr.c @@ -44,7 +44,7 @@ * ****************************************************************************/ -#undef memchr +#undef memchr /* See mm/README.txt */ FAR void *memchr(FAR const void *s, int c, size_t n) { FAR const unsigned char *p = (FAR const unsigned char *)s; diff --git a/libs/libc/string/lib_memcmp.c b/libs/libc/string/lib_memcmp.c index bdf04907e7a..1f788f451ef 100644 --- a/libs/libc/string/lib_memcmp.c +++ b/libs/libc/string/lib_memcmp.c @@ -31,7 +31,7 @@ ****************************************************************************/ #ifndef CONFIG_LIBC_ARCH_MEMCMP -#undef memcmp +#undef memcmp /* See mm/README.txt */ int memcmp(FAR const void *s1, FAR const void *s2, size_t n) { unsigned char *p1 = (unsigned char *)s1; diff --git a/libs/libc/string/lib_memcpy.c b/libs/libc/string/lib_memcpy.c index 505c5d31b09..de4f8eed23b 100644 --- a/libs/libc/string/lib_memcpy.c +++ b/libs/libc/string/lib_memcpy.c @@ -35,7 +35,7 @@ ****************************************************************************/ #ifndef CONFIG_LIBC_ARCH_MEMCPY -#undef memcpy +#undef memcpy /* See mm/README.txt */ FAR void *memcpy(FAR void *dest, FAR const void *src, size_t n) { FAR unsigned char *pout = (FAR unsigned char *)dest; diff --git a/libs/libc/string/lib_memmove.c b/libs/libc/string/lib_memmove.c index 0035063f654..bc72a85daf5 100644 --- a/libs/libc/string/lib_memmove.c +++ b/libs/libc/string/lib_memmove.c @@ -31,7 +31,7 @@ ****************************************************************************/ #ifndef CONFIG_LIBC_ARCH_MEMMOVE -#undef memmove +#undef memmove /* See mm/README.txt */ FAR void *memmove(FAR void *dest, FAR const void *src, size_t count) { FAR char *tmp; diff --git a/libs/libc/string/lib_memset.c b/libs/libc/string/lib_memset.c index 80f47e8275f..e22a6cd205f 100644 --- a/libs/libc/string/lib_memset.c +++ b/libs/libc/string/lib_memset.c @@ -47,7 +47,7 @@ ****************************************************************************/ #ifndef CONFIG_LIBC_ARCH_MEMSET -#undef memset +#undef memset /* See mm/README.txt */ FAR void *memset(FAR void *s, int c, size_t n) { #ifdef CONFIG_MEMSET_OPTSPEED diff --git a/libs/libc/string/lib_rindex.c b/libs/libc/string/lib_rindex.c index 30d13868975..2375ee0177c 100644 --- a/libs/libc/string/lib_rindex.c +++ b/libs/libc/string/lib_rindex.c @@ -32,7 +32,7 @@ * Name: rindex ****************************************************************************/ -#undef rindex +#undef rindex /* See mm/README.txt */ FAR char *rindex(FAR const char *s, int c) { return strrchr(s, c); diff --git a/libs/libc/string/lib_strcasecmp.c b/libs/libc/string/lib_strcasecmp.c index 1331c517277..e02fddd717a 100644 --- a/libs/libc/string/lib_strcasecmp.c +++ b/libs/libc/string/lib_strcasecmp.c @@ -32,7 +32,7 @@ ****************************************************************************/ #ifndef CONFIG_ARCH_STRCASECMP -#undef strcasecmp +#undef strcasecmp /* See mm/README.txt */ int strcasecmp(FAR const char *cs, FAR const char *ct) { int result; diff --git a/libs/libc/string/lib_strcat.c b/libs/libc/string/lib_strcat.c index b1d8779a442..beb23e2652b 100644 --- a/libs/libc/string/lib_strcat.c +++ b/libs/libc/string/lib_strcat.c @@ -31,7 +31,7 @@ ****************************************************************************/ #ifndef CONFIG_ARCH_STRCAT -#undef strcat +#undef strcat /* See mm/README.txt */ char *strcat(char *dest, const char *src) { char *ret = dest; diff --git a/libs/libc/string/lib_strchr.c b/libs/libc/string/lib_strchr.c index 7765967a02f..7da3bf99052 100644 --- a/libs/libc/string/lib_strchr.c +++ b/libs/libc/string/lib_strchr.c @@ -45,7 +45,7 @@ ****************************************************************************/ #ifndef CONFIG_LIBC_ARCH_STRCHR -#undef strchr +#undef strchr /* See mm/README.txt */ FAR char *strchr(FAR const char *s, int c) { if (s) diff --git a/libs/libc/string/lib_strcmp.c b/libs/libc/string/lib_strcmp.c index d42a649dda8..2ac4f62619a 100644 --- a/libs/libc/string/lib_strcmp.c +++ b/libs/libc/string/lib_strcmp.c @@ -31,7 +31,7 @@ ****************************************************************************/ #ifndef CONFIG_LIBC_ARCH_STRCMP -#undef strcmp +#undef strcmp /* See mm/README.txt */ int strcmp(FAR const char *cs, FAR const char *ct) { register signed char result; diff --git a/libs/libc/string/lib_strcpy.c b/libs/libc/string/lib_strcpy.c index f315d7601bc..d66dc7e5a49 100644 --- a/libs/libc/string/lib_strcpy.c +++ b/libs/libc/string/lib_strcpy.c @@ -43,7 +43,7 @@ ****************************************************************************/ #ifndef CONFIG_LIBC_ARCH_STRCPY -#undef strcpy +#undef strcpy /* See mm/README.txt */ FAR char *strcpy(FAR char *dest, FAR const char *src) { char *tmp = dest; diff --git a/libs/libc/string/lib_strcspn.c b/libs/libc/string/lib_strcspn.c index 150bd260f70..7a8211ef0a4 100644 --- a/libs/libc/string/lib_strcspn.c +++ b/libs/libc/string/lib_strcspn.c @@ -39,7 +39,7 @@ * ****************************************************************************/ -#undef strcspn +#undef strcspn /* See mm/README.txt */ size_t strcspn(const char *s, const char *reject) { size_t i; diff --git a/libs/libc/string/lib_strdup.c b/libs/libc/string/lib_strdup.c index ae90f6fd1fc..9e548bc4199 100644 --- a/libs/libc/string/lib_strdup.c +++ b/libs/libc/string/lib_strdup.c @@ -32,7 +32,7 @@ * Public Functions ****************************************************************************/ -#undef strdup +#undef strdup /* See mm/README.txt */ FAR char *strdup(FAR const char *s) { FAR char *news = NULL; diff --git a/libs/libc/string/lib_strlen.c b/libs/libc/string/lib_strlen.c index 85daad534b0..647c6d06433 100644 --- a/libs/libc/string/lib_strlen.c +++ b/libs/libc/string/lib_strlen.c @@ -31,7 +31,7 @@ ****************************************************************************/ #ifndef CONFIG_LIBC_ARCH_STRLEN -#undef strlen +#undef strlen /* See mm/README.txt */ size_t strlen(const char *s) { const char *sc; diff --git a/libs/libc/string/lib_strncasecmp.c b/libs/libc/string/lib_strncasecmp.c index 05e34cf8271..2b3ac6bfe3a 100644 --- a/libs/libc/string/lib_strncasecmp.c +++ b/libs/libc/string/lib_strncasecmp.c @@ -33,7 +33,7 @@ ****************************************************************************/ #ifndef CONFIG_ARCH_STRNCASECMP -#undef strncasecmp +#undef strncasecmp /* See mm/README.txt */ int strncasecmp(const char *cs, const char *ct, size_t nb) { int result = 0; diff --git a/libs/libc/string/lib_strncat.c b/libs/libc/string/lib_strncat.c index 1410f287a00..cc68ea156a5 100644 --- a/libs/libc/string/lib_strncat.c +++ b/libs/libc/string/lib_strncat.c @@ -31,7 +31,7 @@ ****************************************************************************/ #ifndef CONFIG_ARCH_STRNCAT -#undef strncat +#undef strncat /* See mm/README.txt */ char *strncat(char *dest, const char *src, size_t n) { char *ret = dest; diff --git a/libs/libc/string/lib_strncmp.c b/libs/libc/string/lib_strncmp.c index b00699ad866..117f1fddf88 100644 --- a/libs/libc/string/lib_strncmp.c +++ b/libs/libc/string/lib_strncmp.c @@ -31,7 +31,7 @@ ****************************************************************************/ #ifndef CONFIG_ARCH_STRNCMP -#undef strncmp +#undef strncmp /* See mm/README.txt */ int strncmp(const char *cs, const char *ct, size_t nb) { int result = 0; diff --git a/libs/libc/string/lib_strncpy.c b/libs/libc/string/lib_strncpy.c index af146fe193c..1a7cf58bb23 100644 --- a/libs/libc/string/lib_strncpy.c +++ b/libs/libc/string/lib_strncpy.c @@ -52,7 +52,7 @@ ****************************************************************************/ #ifndef CONFIG_LIBC_ARCH_STRNCPY -#undef strncpy +#undef strncpy /* See mm/README.txt */ FAR char *strncpy(FAR char *dest, FAR const char *src, size_t n) { FAR char *ret = dest; /* Value to be returned */ diff --git a/libs/libc/string/lib_strndup.c b/libs/libc/string/lib_strndup.c index 31ff0508731..d6b0313695c 100644 --- a/libs/libc/string/lib_strndup.c +++ b/libs/libc/string/lib_strndup.c @@ -49,7 +49,7 @@ * ****************************************************************************/ -#undef strndup +#undef strndup /* See mm/README.txt */ FAR char *strndup(FAR const char *s, size_t size) { FAR char *news = NULL; diff --git a/libs/libc/string/lib_strpbrk.c b/libs/libc/string/lib_strpbrk.c index 0c9fc590eda..90e56a86c1e 100644 --- a/libs/libc/string/lib_strpbrk.c +++ b/libs/libc/string/lib_strpbrk.c @@ -30,7 +30,7 @@ * Public Functions ****************************************************************************/ -#undef strpbrk +#undef strpbrk /* See mm/README.txt */ FAR char *strpbrk(FAR const char *str, FAR const char *charset) { /* Sanity checking */ diff --git a/libs/libc/string/lib_strrchr.c b/libs/libc/string/lib_strrchr.c index a725e3c526e..9e5e4c80b0a 100644 --- a/libs/libc/string/lib_strrchr.c +++ b/libs/libc/string/lib_strrchr.c @@ -34,7 +34,7 @@ * occurrence of the character c in the string s. */ -#undef strrchr +#undef strrchr /* See mm/README.txt */ FAR char *strrchr(FAR const char *s, int c) { if (s) diff --git a/libs/libc/string/lib_strspn.c b/libs/libc/string/lib_strspn.c index 62bd91082af..65443e04859 100644 --- a/libs/libc/string/lib_strspn.c +++ b/libs/libc/string/lib_strspn.c @@ -39,7 +39,7 @@ * ****************************************************************************/ -#undef strspn +#undef strspn /* See mm/README.txt */ size_t strspn(const char *s, const char *accept) { size_t i; diff --git a/libs/libc/string/lib_strtok.c b/libs/libc/string/lib_strtok.c index 77bce408f51..782294358b9 100644 --- a/libs/libc/string/lib_strtok.c +++ b/libs/libc/string/lib_strtok.c @@ -66,7 +66,7 @@ static char *g_saveptr = NULL; * ****************************************************************************/ -#undef strtok +#undef strtok /* See mm/README.txt */ char *strtok(char *str, const char *delim) { return strtok_r(str, delim, &g_saveptr); diff --git a/libs/libc/time/lib_localtime.c b/libs/libc/time/lib_localtime.c index fa01389a5d2..66e90c7ab93 100644 --- a/libs/libc/time/lib_localtime.c +++ b/libs/libc/time/lib_localtime.c @@ -2537,12 +2537,6 @@ void tzset(void) { FAR const char *name; - name = getenv("TZ"); - if (g_lcl_isset > 0 && name && strcmp(g_lcl_tzname, name) == 0) - { - return; - } - #ifndef __KERNEL__ if (up_interrupt_context()) { @@ -2551,6 +2545,7 @@ void tzset(void) #endif tz_semtake(&g_lcl_sem); + name = getenv("TZ"); if (name == NULL) { tzsetwall(); diff --git a/libs/libc/unistd/Kconfig b/libs/libc/unistd/Kconfig index bc76ef8e206..4fddc8dccae 100644 --- a/libs/libc/unistd/Kconfig +++ b/libs/libc/unistd/Kconfig @@ -12,14 +12,14 @@ config LIBC_EXECFUNCS ---help--- Enable support for the exec[l|v] family of functions that can be used to start other programs, terminating the current program and - the posix_spawn() familty of functions that can be used start other + the posix_spawn() family of functions that can be used to start other programs without terminating the current program. The typical usage of the exec[l|v] functions is (1) first call vfork() to create a new thread, then (2) call exec[l|v] to replace the new thread with a program from the file system. NOTE 1: This two step process start is completely unnecessary in - NuttX and is provided only for compatibily with Unix systems. These + NuttX and is provided only for compatibility with Unix systems. These functions are essentially just wrapper functions that (1) call the non-standard binfmt function 'exec', and then (2) exit(0). Since the new thread will be terminated by the exec[l|v] call, it really diff --git a/libs/libc/unistd/lib_daemon.c b/libs/libc/unistd/lib_daemon.c index 6a86ebb0cb6..28f9a3fcce1 100644 --- a/libs/libc/unistd/lib_daemon.c +++ b/libs/libc/unistd/lib_daemon.c @@ -44,9 +44,9 @@ * the controlling terminal and run in the background as system daemons. * * NOTE: daemon() is a non-standard GNU C library interface (based on a - * BSD interface of the same way which behaves slightly differently). + * BSD interface of the same name which behaves slightly differently). * The interfaces defined at OpenGroup.org are the interfaces that govern - * NuttX. deamon() is only described in the Linux man pages like: + * NuttX. daemon() is only described in the Linux man pages like: * http://man7.org/linux/man-pages/man3/daemon.3.html * * Limitations: @@ -59,7 +59,7 @@ * be translated to NuttX. The above mentioned web page states: * * (This function forks, and if the fork(2) succeeds, the parent calls - * _exit(2), so that further errors are seen by the child only.) On + * _exit(2), so that further errors are seen by the child only.) * * So the basic operation of the NuttX daemon() is different. The GNU C * library daemon() begins will logic like: diff --git a/libs/libc/unistd/lib_getopt_common.c b/libs/libc/unistd/lib_getopt_common.c index cd9e481260d..c84d9a65504 100644 --- a/libs/libc/unistd/lib_getopt_common.c +++ b/libs/libc/unistd/lib_getopt_common.c @@ -24,6 +24,7 @@ #include +#include #include #include @@ -514,7 +515,7 @@ int getopt_common(int argc, FAR char * const argv[], * not think that the first interpretation is standard. */ - else if (*(go->go_optptr + 1) != '\0') + else if (go->go_optptr == NULL || go->go_optptr[1] != '\0') { /* Skip over the unrecognized long option. */ @@ -542,6 +543,8 @@ int getopt_common(int argc, FAR char * const argv[], * (which could be another single character command). */ + DEBUGASSERT(go->go_optptr != NULL); + go->go_optopt = *go->go_optptr; go->go_optptr = NULL; go->go_optind++; @@ -570,6 +573,8 @@ int getopt_common(int argc, FAR char * const argv[], /* Check if the option appears in 'optstring' */ + DEBUGASSERT(go->go_optptr != NULL); + optchar = strchr(optstring, *go->go_optptr); if (!optchar) { diff --git a/libs/libc/unistd/lib_sysconf.c b/libs/libc/unistd/lib_sysconf.c index 15a45b4de02..0ace24d78f9 100644 --- a/libs/libc/unistd/lib_sysconf.c +++ b/libs/libc/unistd/lib_sysconf.c @@ -228,9 +228,11 @@ long sysconf(int name) return 1; #endif -#ifdef CONFIG_CLOCK_MONOTONIC case _SC_MONOTONIC_CLOCK: +#ifdef CONFIG_CLOCK_MONOTONIC return 1; +#else + return 0; #endif case _SC_PAGESIZE: diff --git a/libs/libc/wqueue/work_cancel.c b/libs/libc/wqueue/work_cancel.c index 78813bc17a1..5ba5ac7fe6e 100644 --- a/libs/libc/wqueue/work_cancel.c +++ b/libs/libc/wqueue/work_cancel.c @@ -44,7 +44,7 @@ * * Description: * Cancel previously queued work. This removes work from the work queue. - * After work has been cancelled, it may be re-queue by calling + * After work has been cancelled, it may be requeued by calling * work_queue() again. * * Input Parameters: @@ -136,12 +136,12 @@ static int work_qcancel(FAR struct usr_wqueue_s *wqueue, * * Description: * Cancel previously queued user-mode work. This removes work from the - * user mode work queue. After work has been cancelled, it may be re-queue - * by calling work_queue() again. + * user mode work queue. After work has been cancelled, it may be + * requeued by calling work_queue() again. * * Input Parameters: * qid - The work queue ID (must be USRWORK) - * work - The previously queue work structure to cancel + * work - The previously queued work structure to cancel * * Returned Value: * Zero (OK) on success, a negated errno on failure. This error may be diff --git a/libs/libc/wqueue/work_queue.c b/libs/libc/wqueue/work_queue.c index 80950fe5aa7..492df4c8ebe 100644 --- a/libs/libc/wqueue/work_queue.c +++ b/libs/libc/wqueue/work_queue.c @@ -59,9 +59,9 @@ * Input Parameters: * wqueue - The work queue * work - The work structure to queue - * worker - The worker callback to be invoked. The callback will invoked - * on the worker thread of execution. - * arg - The argument that will be passed to the workder callback when + * worker - The worker callback to be invoked. The callback will be + * invoked on the worker thread of execution. + * arg - The argument that will be passed to the worker callback when * int is invoked. * delay - Delay (in clock ticks) from the time queue until the worker * is invoked. Zero means to perform the work immediately. @@ -161,15 +161,15 @@ static int work_qqueue(FAR struct usr_wqueue_s *wqueue, * the caller. Otherwise, the work structure is completely managed by the * work queue logic. The caller should never modify the contents of the * work queue structure directly. If work_queue() is called before the - * previous work as been performed and removed from the queue, then any + * previous work has been performed and removed from the queue, then any * pending work will be canceled and lost. * * Input Parameters: * qid - The work queue ID (index) * work - The work structure to queue - * worker - The worker callback to be invoked. The callback will invoked - * on the worker thread of execution. - * arg - The argument that will be passed to the workder callback when + * worker - The worker callback to be invoked. The callback will be + * invoked on the worker thread of execution. + * arg - The argument that will be passed to the worker callback when * int is invoked. * delay - Delay (in clock ticks) from the time queue until the worker * is invoked. Zero means to perform the work immediately. diff --git a/libs/libc/wqueue/work_usrthread.c b/libs/libc/wqueue/work_usrthread.c index 874cbcfd968..3e56ea460d9 100644 --- a/libs/libc/wqueue/work_usrthread.c +++ b/libs/libc/wqueue/work_usrthread.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include diff --git a/libs/libdsp/lib_foc.c b/libs/libdsp/lib_foc.c index 74f66a3c12e..9f08b753d0e 100644 --- a/libs/libdsp/lib_foc.c +++ b/libs/libdsp/lib_foc.c @@ -32,10 +32,10 @@ ****************************************************************************/ /**************************************************************************** - * Name: foc_current_controler + * Name: foc_current_controller * * Description: - * This function implements FOC current controler algorithm. + * This function implements FOC current controller algorithm. * * Input Parameters: * foc - (in/out) pointer to the FOC data @@ -46,7 +46,7 @@ * ****************************************************************************/ -static void foc_current_controler(FAR struct foc_data_f32_s *foc, +static void foc_current_controller(FAR struct foc_data_f32_s *foc, FAR dq_frame_f32_t *v_dq_req) { FAR pid_controller_f32_t *id_pid = &foc->id_pid; @@ -404,9 +404,9 @@ void foc_current_control(FAR struct foc_data_f32_s *foc, foc_idq_ref_set(foc, idq_ref); - /* Run FOC current controler (current dq -> voltage dq) */ + /* Run FOC current controller (current dq -> voltage dq) */ - foc_current_controler(foc, vdq_ref); + foc_current_controller(foc, vdq_ref); /* DQ voltage compensation */ @@ -418,7 +418,7 @@ void foc_current_control(FAR struct foc_data_f32_s *foc, * Name: foc_vabmod_get * * Description: - * Get result from the FOC controler (foc_current_control or + * Get result from the FOC controller (foc_current_control or * foc_voltage_control) * * Input Parameters: diff --git a/libs/libdsp/lib_foc_b16.c b/libs/libdsp/lib_foc_b16.c index 1a21a9f63fa..898fac65954 100644 --- a/libs/libdsp/lib_foc_b16.c +++ b/libs/libdsp/lib_foc_b16.c @@ -32,10 +32,10 @@ ****************************************************************************/ /**************************************************************************** - * Name: foc_current_controler_b16 + * Name: foc_current_controller_b16 * * Description: - * This function implements FOC current controler algorithm. + * This function implements FOC current controller algorithm. * * Input Parameters: * foc - (in/out) pointer to the FOC data @@ -46,7 +46,7 @@ * ****************************************************************************/ -static void foc_current_controler_b16(FAR struct foc_data_b16_s *foc, +static void foc_current_controller_b16(FAR struct foc_data_b16_s *foc, FAR dq_frame_b16_t *v_dq_req) { FAR pid_controller_b16_t *id_pid = &foc->id_pid; @@ -405,9 +405,9 @@ void foc_current_control_b16(FAR struct foc_data_b16_s *foc, foc_idq_ref_set_b16(foc, idq_ref); - /* Run FOC current controler (current dq -> voltage dq) */ + /* Run FOC current controller (current dq -> voltage dq) */ - foc_current_controler_b16(foc, vdq_ref); + foc_current_controller_b16(foc, vdq_ref); /* DQ voltage compensation */ @@ -419,7 +419,7 @@ void foc_current_control_b16(FAR struct foc_data_b16_s *foc, * Name: foc_vabmod_get_b16 * * Description: - * Get result from the FOC controler (foc_current_control or + * Get result from the FOC controller (foc_current_control or * foc_voltage_control) * * Input Parameters: diff --git a/libs/libdsp/lib_motor.c b/libs/libdsp/lib_motor.c index 47c3cb9e7b3..c65f23890a2 100644 --- a/libs/libdsp/lib_motor.c +++ b/libs/libdsp/lib_motor.c @@ -159,7 +159,7 @@ float motor_openloop_angle_get(FAR struct openloop_data_f32_s *op) * Initialize motor angle structure * * Input Parameters: - * angle - (in/out) pointer to the motor angle strucutre + * angle - (in/out) pointer to the motor angle structure * p - (in) number of the motor pole pairs * * Returned Value: diff --git a/libs/libdsp/lib_svm.c b/libs/libdsp/lib_svm.c index 7ae957448b5..8fdad982cdc 100644 --- a/libs/libdsp/lib_svm.c +++ b/libs/libdsp/lib_svm.c @@ -280,7 +280,7 @@ static void svm3_duty_calc(FAR struct svm3_state_f32_s *s, * Voltage vector definitions in 3-phase SVM: * * |---------|-----------|--------------------|-----------------| - * | Voltage | swithcing | Line to neutral | Line to line | + * | Voltage | switching | Line to neutral | Line to line | * | vector | vectors | voltage | voltage | * | |-----------|--------------------|-----------------| * | | a | b | c | Van | Vbn | Vcn | Vab | Vbe | Vca | diff --git a/libs/libdsp/lib_svm_b16.c b/libs/libdsp/lib_svm_b16.c index 56fdafdc161..fc660c9b387 100644 --- a/libs/libdsp/lib_svm_b16.c +++ b/libs/libdsp/lib_svm_b16.c @@ -280,7 +280,7 @@ static void svm3_duty_calc_b16(FAR struct svm3_state_b16_s *s, * Voltage vector definitions in 3-phase SVM: * * |---------|-----------|--------------------|-----------------| - * | Voltage | swithcing | Line to neutral | Line to line | + * | Voltage | switching | Line to neutral | Line to line | * | vector | vectors | voltage | voltage | * | |-----------|--------------------|-----------------| * | | a | b | c | Van | Vbn | Vcn | Vab | Vbe | Vca | diff --git a/libs/libxx/0001-uClibcxx-basic_definitions-fix-GCC-specific-definiti.patch b/libs/libxx/0001-uClibcxx-basic_definitions-fix-GCC-specific-definiti.patch new file mode 100644 index 00000000000..5ca8181e811 --- /dev/null +++ b/libs/libxx/0001-uClibcxx-basic_definitions-fix-GCC-specific-definiti.patch @@ -0,0 +1,49 @@ +From 44aa27328deb99a1cf3253ce3af07bccdfd012f2 Mon Sep 17 00:00:00 2001 +From: zhuyanlin +Date: Mon, 30 Aug 2021 14:11:53 +0800 +Subject: [PATCH 1/2] uClibcxx:basic_definitions: fix GCC-specific definitions + +gcc use __GNUC__ instead off __GCC__ + +Change-Id: I63aeb2118f45a981653553c8a3721a9d9c7ccaaa +--- + include/basic_definitions | 4 ++-- + include/cstddef | 2 +- + 2 files changed, 3 insertions(+), 3 deletions(-) + +diff --git a/uClibc++/include/basic_definitions uClibc++/include/basic_definitions +index 9936563..1a8dc31 100644 +--- a/uClibc++/include/basic_definitions ++++ uClibc++/include/basic_definitions +@@ -33,13 +33,13 @@ + + #endif + +-#ifdef __GCC__ ++#ifdef __GNUC__ + #define __UCLIBCXX_NORETURN __attribute__ ((__noreturn__)) + #else + #define __UCLIBCXX_NORETURN + #endif + +-#ifdef __GCC__ ++#ifdef __GNUC__ + # ifndef _UCXX_NOTHROW + # ifndef __cplusplus + # define _UCXX_NOTHROW __attribute__((__nothrow__)) +diff --git a/uClibc++/include/cstddef uClibc++/include/cstddef +index d44834b..b229673 100644 +--- a/uClibc++/include/cstddef ++++ uClibc++/include/cstddef +@@ -43,7 +43,7 @@ + #ifndef _CPP_CSTDDEF + #define _CPP_CSTDDEF 1 + +-#ifdef __GCC__ ++#ifdef __GNUC__ + #pragma GCC system_header + #endif + +-- +2.25.1 + diff --git a/libs/libxx/libcxxabi.defs b/libs/libxx/libcxxabi.defs index cd1b5fd340e..5d761794a23 100644 --- a/libs/libxx/libcxxabi.defs +++ b/libs/libxx/libcxxabi.defs @@ -55,6 +55,9 @@ else CPPSRCS += cxa_noexception.cpp endif +# RTTI is required for building the libcxxabi library +CXXFLAGS += -frtti + DEPPATH += --dep-path libcxxabi/src VPATH += libcxxabi/src diff --git a/libs/libxx/libcxxmini.defs b/libs/libxx/libcxxmini.defs index 4b9fa9e95ae..2624a4534c4 100644 --- a/libs/libxx/libcxxmini.defs +++ b/libs/libxx/libcxxmini.defs @@ -22,7 +22,7 @@ CXXSRCS += libxx_cxa_guard.cxx libxx_cxapurevirtual.cxx CXXSRCS += libxx_delete.cxx libxx_delete_sized.cxx libxx_deletea.cxx CXXSRCS += libxx_deletea_sized.cxx libxx_new.cxx libxx_newa.cxx -# Note: Our implmenetations of operator new are not conforming to +# Note: Our implementations of operator new are not conforming to # the standard. (no bad_alloc implementation) # # libxx_new.cxx:64:11: error: 'operator new' is missing exception specification diff --git a/libs/libxx/uClibc++.defs b/libs/libxx/uClibc++.defs index bfb84eae5ba..5f073c92846 100644 --- a/libs/libxx/uClibc++.defs +++ b/libs/libxx/uClibc++.defs @@ -27,6 +27,7 @@ $(TOPDIR)/include/uClibc++: # $(Q) mv uClibc++-$(UCLIBCXX_VERSION) uClibc++ $(Q) $(DIRLINK) $(CURDIR)/uClibc++/include $(TOPDIR)/include/uClibc++ $(Q) $(COPYFILE) $(CURDIR)/system_configuration.h $(TOPDIR)/include/uClibc++ + $(Q) patch -p0 < 0001-uClibcxx-basic_definitions-fix-GCC-specific-definiti.patch context:: $(TOPDIR)/include/uClibc++ diff --git a/mm/Kconfig b/mm/Kconfig index 48abe027a41..c16f24ab8a3 100644 --- a/mm/Kconfig +++ b/mm/Kconfig @@ -20,7 +20,7 @@ config MM_TLSF_MANAGER config MM_CUSTOMIZE_MANAGER bool "Customized heap manager" ---help--- - Customized memory manger policy. The build will fail + Customized memory manager policy. The build will fail if the MM heap module not defined by customer. endchoice diff --git a/mm/README.txt b/mm/README.txt index 8c2856a16b0..9f70f9747fe 100644 --- a/mm/README.txt +++ b/mm/README.txt @@ -74,6 +74,41 @@ This directory contains the NuttX memory management logic. This include: mm/umm_heap - Holds the user-mode memory allocation interfaces mm/kmm_heap - Holds the kernel-mode memory allocation interfaces + Debugging: + + Please follow these steps to hook all memory related routines: + + 1.Add a new header file(e.g. xxx_malloc.h): + + ... + #include + #include + #include + #include + + #ifndef __ASSEMBLY__ + FAR void *xxx_malloc(FAR const char *file, int line, size_t size); + void xxx_free(FAR const char *file, int line, FAR const void *ptr); + FAR void *xxx_memcpy(FAR const char *file, int line, + FAR void *dst, FAR const void *src, size_t len); + ... + #define malloc(s) xxx_malloc(__FILE__, __LINE__, s) + #define free(p) xxx_free(__FILE__, __LINE__, p) + #define memcpy(d, s, l) xxx_memcpy(__FILE__, __LINE__, d, s, l) + ... + #endif + ... + + 2.Implement xxx_malloc, xxx_free, xxx_memcpy... in source code, you can: + a.Modify some arguments(e.g. extend the allocation size for redzone) + d.Check the critical arguments(e.g. pointer and length) in the range + b.Forward to the original implementation(call malloc/free/memcpy) + c.Attach the context info(e.g. file and line) before return + + 3.Enable the hook by either: + a.Include xxx_malloc.h in your source code to hook one file + b.Add -include xxx_malloc.h to CFLAGS to hook all source code + 2) Granule Allocator. A non-standard granule allocator is also available in this directory The @@ -109,7 +144,7 @@ This directory contains the NuttX memory management logic. This include: heap in memory (logic in the linker script would assign the section .dmaheap to the DMA memory. - FAR uint32_t g_dmaheap[DMAHEAP_SIZE] __attribute__((section(.dmaheap))); + FAR uint32_t g_dmaheap[DMAHEAP_SIZE] locate_data(.dmaheap); The heap is created by calling gran_initialize. Here the granule size is set to 64 bytes and the alignment to 16 bytes: diff --git a/mm/iob/iob_alloc.c b/mm/iob/iob_alloc.c index 27e12003e8f..c26269f3c0f 100644 --- a/mm/iob/iob_alloc.c +++ b/mm/iob/iob_alloc.c @@ -237,7 +237,8 @@ FAR struct iob_s *iob_tryalloc(bool throttled, enum iob_user_e consumerid) #if CONFIG_IOB_THROTTLE > 0 /* If there are free I/O buffers for this allocation */ - if (sem->semcount > 0) + if (sem->semcount > 0 || + (throttled && g_iob_sem.semcount - CONFIG_IOB_THROTTLE > 0)) #endif { /* Take the I/O buffer from the head of the free list */ @@ -265,10 +266,12 @@ FAR struct iob_s *iob_tryalloc(bool throttled, enum iob_user_e consumerid) #if CONFIG_IOB_THROTTLE > 0 /* The throttle semaphore is a little more complicated because * it can be negative! Decrementing is still safe, however. + * + * Note: usually g_throttle_sem.semcount >= -CONFIG_IOB_THROTTLE. + * But it can be smaller than that if there are blocking threads. */ g_throttle_sem.semcount--; - DEBUGASSERT(g_throttle_sem.semcount >= -CONFIG_IOB_THROTTLE); #endif #if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_FS_PROCFS) && \ diff --git a/mm/mm_gran/mm_graninit.c b/mm/mm_gran/mm_graninit.c index a3acb93ccde..1dd50ae318d 100644 --- a/mm/mm_gran/mm_graninit.c +++ b/mm/mm_gran/mm_graninit.c @@ -55,7 +55,7 @@ * attribute to position a DMA heap in memory (logic in the linker script * would assign the section .dmaheap to the DMA memory. * - * FAR uint32_t g_dmaheap[DMAHEAP_SIZE] __attribute__((section(.dmaheap))); + * FAR uint32_t g_dmaheap[DMAHEAP_SIZE] locate_data(.dmaheap); * * The heap is created by calling gran_initialize(). Here the granule size * is set to 64 bytes (2**6) and the alignment to 16 bytes (2**4): diff --git a/mm/mm_heap/mm.h b/mm/mm_heap/mm.h index 15651160b4d..141920f6d10 100644 --- a/mm/mm_heap/mm.h +++ b/mm/mm_heap/mm.h @@ -42,12 +42,12 @@ /* Chunk Header Definitions *************************************************/ -/* These definitions define the characteristics of allocator +/* These definitions define the characteristics of the allocator: * * MM_MIN_SHIFT is used to define MM_MIN_CHUNK. - * MM_MIN_CHUNK - is the smallest physical chunk that can be allocated. It - * must be at least a large as sizeof(struct mm_freenode_s). Larger values - * may improve performance slightly, but will waste memory due to + * MM_MIN_CHUNK - is the smallest physical chunk that can be allocated. + * It must be at least as large as sizeof(struct mm_freenode_s). Larger + * values may improve performance slightly, but will waste memory due to * quantization losses. * * MM_MAX_SHIFT is used to define MM_MAX_CHUNK @@ -198,7 +198,9 @@ struct mm_heap_s struct mm_freenode_s mm_nodelist[MM_NNODES]; - /* Free delay list, for some situation can't do free immdiately */ + /* Free delay list, for some situations where we can't do free + * immdiately. + */ #ifdef CONFIG_SMP FAR struct mm_delaynode_s *mm_delaylist[CONFIG_SMP_NCPUS]; diff --git a/mm/mm_heap/mm_addfreechunk.c b/mm/mm_heap/mm_addfreechunk.c index 854f05bcad8..22df38631ab 100644 --- a/mm/mm_heap/mm_addfreechunk.c +++ b/mm/mm_heap/mm_addfreechunk.c @@ -38,8 +38,8 @@ * Name: mm_addfreechunk * * Description: - * Add a free chunk to the node next. It is assumed that the caller holds - * the mm semaphore + * Add a free chunk to the nodes list. It is assumed that the caller holds + * the mm semaphore. * ****************************************************************************/ diff --git a/mm/mm_heap/mm_initialize.c b/mm/mm_heap/mm_initialize.c index cf6f2070d0a..91561116544 100644 --- a/mm/mm_heap/mm_initialize.c +++ b/mm/mm_heap/mm_initialize.c @@ -88,7 +88,7 @@ void mm_addregion(FAR struct mm_heap_s *heap, FAR void *heapstart, DEBUGVERIFY(mm_takesemaphore(heap)); - /* Adjust the provide heap start and size so that they are both aligned + /* Adjust the provided heap start and size so that they are both aligned * with the MM_MIN_CHUNK size. */ diff --git a/mm/mm_heap/mm_malloc.c b/mm/mm_heap/mm_malloc.c index 3695d0b57a7..598f5536371 100644 --- a/mm/mm_heap/mm_malloc.c +++ b/mm/mm_heap/mm_malloc.c @@ -160,7 +160,7 @@ FAR void *mm_malloc(FAR struct mm_heap_s *heap, size_t size) } /* If we found a node with non-zero size, then this is one to use. Since - * the list is ordered, we know that is must be best fitting chunk + * the list is ordered, we know that it must be the best fitting chunk * available. */ diff --git a/mm/umm_heap/umm_calloc.c b/mm/umm_heap/umm_calloc.c index d10142bd77e..69eadb746df 100644 --- a/mm/umm_heap/umm_calloc.c +++ b/mm/umm_heap/umm_calloc.c @@ -42,6 +42,7 @@ * ****************************************************************************/ +#undef calloc /* See mm/README.txt */ FAR void *calloc(size_t n, size_t elem_size) { #if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_BUILD_KERNEL) diff --git a/mm/umm_heap/umm_free.c b/mm/umm_heap/umm_free.c index fca7060013c..ebdf95274d9 100644 --- a/mm/umm_heap/umm_free.c +++ b/mm/umm_heap/umm_free.c @@ -43,6 +43,7 @@ * ****************************************************************************/ +#undef free /* See mm/README.txt */ void free(FAR void *mem) { mm_free(USR_HEAP, mem); diff --git a/mm/umm_heap/umm_malloc.c b/mm/umm_heap/umm_malloc.c index 1906eb1bd6d..261f0d8460c 100644 --- a/mm/umm_heap/umm_malloc.c +++ b/mm/umm_heap/umm_malloc.c @@ -49,6 +49,7 @@ * ****************************************************************************/ +#undef malloc /* See mm/README.txt */ FAR void *malloc(size_t size) { #if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_BUILD_KERNEL) diff --git a/mm/umm_heap/umm_malloc_size.c b/mm/umm_heap/umm_malloc_size.c index 74c0e76e967..c095e6bfd04 100644 --- a/mm/umm_heap/umm_malloc_size.c +++ b/mm/umm_heap/umm_malloc_size.c @@ -32,6 +32,7 @@ * Public Functions ****************************************************************************/ +#undef malloc_size /* See mm/README.txt */ size_t malloc_size(FAR void *mem) { return mm_malloc_size(mem); diff --git a/mm/umm_heap/umm_memalign.c b/mm/umm_heap/umm_memalign.c index 1a0f4d069d1..9181b349d52 100644 --- a/mm/umm_heap/umm_memalign.c +++ b/mm/umm_heap/umm_memalign.c @@ -48,6 +48,7 @@ * ****************************************************************************/ +#undef memalign /* See mm/README.txt */ FAR void *memalign(size_t alignment, size_t size) { #if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_BUILD_KERNEL) diff --git a/mm/umm_heap/umm_realloc.c b/mm/umm_heap/umm_realloc.c index 6466a03bf7c..a320a33303c 100644 --- a/mm/umm_heap/umm_realloc.c +++ b/mm/umm_heap/umm_realloc.c @@ -50,6 +50,7 @@ * ****************************************************************************/ +#undef realloc /* See mm/README.txt */ FAR void *realloc(FAR void *oldmem, size_t size) { #if defined(CONFIG_ARCH_ADDRENV) && defined(CONFIG_BUILD_KERNEL) diff --git a/mm/umm_heap/umm_zalloc.c b/mm/umm_heap/umm_zalloc.c index 4c367f1f96e..11a7ba0a0c5 100644 --- a/mm/umm_heap/umm_zalloc.c +++ b/mm/umm_heap/umm_zalloc.c @@ -49,6 +49,7 @@ * ****************************************************************************/ +#undef zalloc /* See mm/README.txt */ FAR void *zalloc(size_t size) { #ifdef CONFIG_ARCH_ADDRENV diff --git a/net/devif/ipv6_input.c b/net/devif/ipv6_input.c index 2c42602b37d..6618c56ef4a 100644 --- a/net/devif/ipv6_input.c +++ b/net/devif/ipv6_input.c @@ -2,74 +2,20 @@ * net/devif/ipv6_input.c * Device driver IPv6 packet receipt interface * - * Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Adapted for NuttX from logic in uIP which also has a BSD-like license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * uIP is an implementation of the TCP/IP protocol stack intended for - * small 8-bit and 16-bit microcontrollers. - * - * uIP provides the necessary protocols for Internet communication, - * with a very small code footprint and RAM requirements - the uIP - * code size is on the order of a few kilobytes and RAM usage is on - * the order of a few hundred bytes. - * - * Original author Adam Dunkels - * Copyright () 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * uIP is a small implementation of the IP, UDP and TCP protocols (as - * well as some basic ICMP stuff). The implementation couples the IP, - * UDP, TCP and the application layers very tightly. To keep the size - * of the compiled code down, this code frequently uses the goto - * statement. While it would be possible to break the ipv6_input() - * function into many smaller functions, this would increase the code - * size because of the overhead of parameter passing and the fact that - * the optimizer would not be as efficient. - * - * The principle is that we have a small buffer, called the d_buf, - * in which the device driver puts an incoming packet. The TCP/IP - * stack parses the headers in the packet, and calls the - * application. If the remote host has sent data to the application, - * this data is present in the d_buf and the application read the - * data from there. It is up to the application to put this data into - * a byte stream if needed. The application will not be fed with data - * that is out of sequence. - * - * If the application wishes to send data to the peer, it should put - * its data into the d_buf. The d_appdata pointer points to the - * first available byte. The TCP/IP stack will calculate the - * checksums, and fill in the necessary header fields and finally send - * the packet back to the peer. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/icmpv6/icmpv6_advertise.c b/net/icmpv6/icmpv6_advertise.c index a18c832b6aa..c133980181d 100644 --- a/net/icmpv6/icmpv6_advertise.c +++ b/net/icmpv6/icmpv6_advertise.c @@ -2,39 +2,20 @@ * net/icmpv6/icmpv6_advertise.c * Send an ICMPv6 Neighbor Advertisement * - * Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Adapted for NuttX from logic in uIP which also has a BSD-like license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Original author Adam Dunkels - * Copyright () 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/icmpv6/icmpv6_input.c b/net/icmpv6/icmpv6_input.c index 0cbc391e2fd..c2dd5de0de2 100644 --- a/net/icmpv6/icmpv6_input.c +++ b/net/icmpv6/icmpv6_input.c @@ -2,39 +2,20 @@ * net/icmpv6/icmpv6_input.c * Handling incoming ICMPv6 input * - * Copyright (C) 2015, 2017-2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Adapted for NuttX from logic in uIP which also has a BSD-like license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Original author Adam Dunkels - * Copyright () 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/icmpv6/icmpv6_radvertise.c b/net/icmpv6/icmpv6_radvertise.c index bc42ff0b089..7a4975f7460 100644 --- a/net/icmpv6/icmpv6_radvertise.c +++ b/net/icmpv6/icmpv6_radvertise.c @@ -2,39 +2,20 @@ * net/icmpv6/icmpv6_radvertise.c * Send an ICMPv6 Router Advertisement * - * Copyright (C) 2015, 2017, 2020 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Adapted for NuttX from logic in uIP which also has a BSD-like license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Original author Adam Dunkels - * Copyright () 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/local/local_conn.c b/net/local/local_conn.c index abd787eb8ad..c968cca9e08 100644 --- a/net/local/local_conn.c +++ b/net/local/local_conn.c @@ -36,7 +36,7 @@ #include "local/local.h" /**************************************************************************** - * Public Data + * Private Data ****************************************************************************/ /* A list of all allocated packet socket connections */ diff --git a/net/local/local_recvmsg.c b/net/local/local_recvmsg.c index a49c7a03621..9ef2287879f 100644 --- a/net/local/local_recvmsg.c +++ b/net/local/local_recvmsg.c @@ -123,7 +123,7 @@ static int psock_fifo_read(FAR struct socket *psock, FAR void *buf, static void local_recvctl(FAR struct local_conn_s *conn, FAR struct msghdr *msg) { - FAR struct local_conn_s *peer = conn->lc_peer; + FAR struct local_conn_s *peer; struct cmsghdr *cmsg; int count; int *fds; @@ -131,7 +131,16 @@ static void local_recvctl(FAR struct local_conn_s *conn, net_lock(); - if (peer == NULL) + cmsg = CMSG_FIRSTHDR(msg); + count = (cmsg->cmsg_len - sizeof(struct cmsghdr)) / sizeof(int); + cmsg->cmsg_len = 0; + + if (count == 0) + { + goto out; + } + + if (conn->lc_peer == NULL) { peer = local_peerconn(conn); if (peer == NULL) @@ -139,16 +148,12 @@ static void local_recvctl(FAR struct local_conn_s *conn, goto out; } } - - if (peer->lc_cfpcount == 0) + else { - goto out; + peer = conn; } - cmsg = CMSG_FIRSTHDR(msg); - - count = (cmsg->cmsg_len - sizeof(struct cmsghdr)) / sizeof(int); - if (count == 0) + if (peer->lc_cfpcount == 0) { goto out; } @@ -332,6 +337,7 @@ psock_dgram_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len, nerr("ERROR: Failed to open FIFO for %s: %d\n", conn->lc_path, ret); goto errout_with_halfduplex; + return ret; } /* Sync to the start of the next packet in the stream and get the size of @@ -377,7 +383,7 @@ psock_dgram_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len, { /* Read 32 bytes into the bit bucket */ - readlen = MIN(remaining, 32); + tmplen = MIN(remaining, 32); ret = psock_fifo_read(psock, bitbucket, &tmplen, false); if (ret < 0) { @@ -390,6 +396,7 @@ psock_dgram_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len, DEBUGASSERT(tmplen <= remaining); remaining -= tmplen; + readlen += tmplen; } while (remaining > 0); } diff --git a/net/local/local_sendmsg.c b/net/local/local_sendmsg.c index 9765284fe52..31c211415c1 100644 --- a/net/local/local_sendmsg.c +++ b/net/local/local_sendmsg.c @@ -61,6 +61,7 @@ static int local_sendctl(FAR struct local_conn_s *conn, FAR struct msghdr *msg) { + FAR struct local_conn_s *peer; FAR struct file *filep2; FAR struct file *filep; struct cmsghdr *cmsg; @@ -71,6 +72,12 @@ static int local_sendctl(FAR struct local_conn_s *conn, net_lock(); + peer = conn->lc_peer; + if (peer == NULL) + { + peer = conn; + } + for_each_cmsghdr(cmsg, msg) { if (!CMSG_OK(msg, cmsg) || @@ -84,7 +91,7 @@ static int local_sendctl(FAR struct local_conn_s *conn, fds = (int *)CMSG_DATA(cmsg); count = (cmsg->cmsg_len - sizeof(struct cmsghdr)) / sizeof(int); - if (count + conn->lc_cfpcount > LOCAL_NCONTROLFDS) + if (count + peer->lc_cfpcount > LOCAL_NCONTROLFDS) { ret = -EMFILE; goto fail; @@ -112,7 +119,7 @@ static int local_sendctl(FAR struct local_conn_s *conn, goto fail; } - conn->lc_cfps[conn->lc_cfpcount++] = filep2; + peer->lc_cfps[peer->lc_cfpcount++] = filep2; } } @@ -123,9 +130,9 @@ static int local_sendctl(FAR struct local_conn_s *conn, fail: while (i-- > 0) { - file_close(conn->lc_cfps[--conn->lc_cfpcount]); - kmm_free(conn->lc_cfps[conn->lc_cfpcount]); - conn->lc_cfps[conn->lc_cfpcount] = NULL; + file_close(peer->lc_cfps[--peer->lc_cfpcount]); + kmm_free(peer->lc_cfps[peer->lc_cfpcount]); + peer->lc_cfps[peer->lc_cfpcount] = NULL; } net_unlock(); diff --git a/net/local/local_sendpacket.c b/net/local/local_sendpacket.c index f7ba29a42e0..a2840ece262 100644 --- a/net/local/local_sendpacket.c +++ b/net/local/local_sendpacket.c @@ -70,8 +70,8 @@ static const uint8_t g_preamble[LOCAL_PREAMBLE_SIZE] = * len Length of data to send * * Returned Value: - * On success, the number of bytes written are returned (zero indicates - * nothing was written). On any failure, a negated errno value is returned + * On success, the number of bytes written are returned (zero indicates + * nothing was written). On any failure, a negated errno value is returned * ****************************************************************************/ @@ -79,7 +79,7 @@ static int local_fifo_write(FAR struct file *filep, FAR const uint8_t *buf, size_t len) { ssize_t nwritten = 0; - ssize_t ret; + ssize_t ret = 0; while (len != nwritten) { diff --git a/net/local/local_sockif.c b/net/local/local_sockif.c index fb82e4db84a..5d59e306f91 100644 --- a/net/local/local_sockif.c +++ b/net/local/local_sockif.c @@ -131,7 +131,9 @@ static int local_sockif_alloc(FAR struct socket *psock) /* Save the pre-allocated connection in the socket structure */ psock->s_conn = conn; +#if defined(CONFIG_NET_LOCAL_STREAM) conn->lc_psock = psock; +#endif return OK; } #endif diff --git a/net/neighbor/neighbor.h b/net/neighbor/neighbor.h index b522f26038a..4d97f8ae56b 100644 --- a/net/neighbor/neighbor.h +++ b/net/neighbor/neighbor.h @@ -1,40 +1,21 @@ /**************************************************************************** * net/neighbor/neighbor.h - * Header file for database of link-local neighbors, used by IPv6 code and - * to be used by future ARP code. + * Header file for database of link-local neighbors, used by IPv6 code. * - * Copyright (C) 2007-2009, 2015, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * A leverage of logic from uIP which also has a BSD style license + * http://www.apache.org/licenses/LICENSE-2.0 * - * Author: Adam Dunkels - * Copyright (c) 2006, Swedish Institute of Computer Science. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/neighbor/neighbor_add.c b/net/neighbor/neighbor_add.c index 08e87f889b9..c66185c0b83 100644 --- a/net/neighbor/neighbor_add.c +++ b/net/neighbor/neighbor_add.c @@ -1,39 +1,20 @@ /**************************************************************************** * net/neighbor/neighbor_add.c * - * Copyright (C) 2007-2009, 2015, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * A leverage of logic from uIP which also has a BSD style license + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2006, Swedish Institute of Computer Science. All rights - * reserved. - * Author: Adam Dunkels - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/neighbor/neighbor_findentry.c b/net/neighbor/neighbor_findentry.c index 57d9ca0a322..b3f1009a908 100644 --- a/net/neighbor/neighbor_findentry.c +++ b/net/neighbor/neighbor_findentry.c @@ -1,39 +1,20 @@ /**************************************************************************** * net/neighbor/neighbor_findentry.c * - * Copyright (C) 2007-2009, 2015, 2017 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * A leverage of logic from uIP which also has a BSD style license + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2006, Swedish Institute of Computer Science. All rights - * reserved. - * Author: Adam Dunkels - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/neighbor/neighbor_globals.c b/net/neighbor/neighbor_globals.c index 8f3e36716c7..2ed2ea5f38d 100644 --- a/net/neighbor/neighbor_globals.c +++ b/net/neighbor/neighbor_globals.c @@ -1,40 +1,20 @@ /**************************************************************************** * net/neighbor/neighbor_globals.c * - * Copyright (C) 2007-2009, 2015, 2018, 2020 Gregory Nutt. All rights - * reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * A leverage of logic from uIP which also has a BSD style license + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2006, Swedish Institute of Computer Science. All rights - * reserved. - * Author: Adam Dunkels - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/neighbor/neighbor_lookup.c b/net/neighbor/neighbor_lookup.c index 277d0872e24..f6f3ce9fc01 100644 --- a/net/neighbor/neighbor_lookup.c +++ b/net/neighbor/neighbor_lookup.c @@ -1,39 +1,20 @@ /**************************************************************************** * net/neighbor/neighbor_lookup.c * - * Copyright (C) 2007-2009, 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * A leverage of logic from uIP which also has a BSD style license + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2006, Swedish Institute of Computer Science. All rights - * reserved. - * Author: Adam Dunkels - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/neighbor/neighbor_update.c b/net/neighbor/neighbor_update.c index 929944166a6..388a73884b5 100644 --- a/net/neighbor/neighbor_update.c +++ b/net/neighbor/neighbor_update.c @@ -1,39 +1,20 @@ /**************************************************************************** * net/neighbor/neighbor_update.c * - * Copyright (C) 2007-2009, 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * A leverage of logic from uIP which also has a BSD style license + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2006, Swedish Institute of Computer Science. All rights - * reserved. - * Author: Adam Dunkels - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the Institute nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/pkt/pkt_conn.c b/net/pkt/pkt_conn.c index 68ef4899440..af532049b08 100644 --- a/net/pkt/pkt_conn.c +++ b/net/pkt/pkt_conn.c @@ -1,38 +1,20 @@ /**************************************************************************** * net/pkt/pkt_conn.c * - * Copyright (C) 2014, 2016-2017, 2020 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Large parts of this file were leveraged from uIP logic: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Copyright (c) 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/pkt/pkt_input.c b/net/pkt/pkt_input.c index a427d1c750b..21638cead13 100644 --- a/net/pkt/pkt_input.c +++ b/net/pkt/pkt_input.c @@ -2,39 +2,20 @@ * net/pkt/pkt_input.c * Handling incoming packet input * - * Copyright (C) 2014, 2020 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Adapted for NuttX from logic in uIP which also has a BSD-like license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Original author Adam Dunkels - * Copyright () 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/pkt/pkt_poll.c b/net/pkt/pkt_poll.c index 6e99eac0844..4daadd4b5c8 100644 --- a/net/pkt/pkt_poll.c +++ b/net/pkt/pkt_poll.c @@ -2,39 +2,20 @@ * net/pkt/pkt_poll.c * Poll for the availability of packet TX data * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Adapted for NuttX from logic in uIP which also has a BSD-like license: + * http://www.apache.org/licenses/LICENSE-2.0 * - * Original author Adam Dunkels - * Copyright () 2001-2003, Adam Dunkels. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE - * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/rpmsg/rpmsg_sockif.c b/net/rpmsg/rpmsg_sockif.c index 884dde071c2..1c1be942f19 100644 --- a/net/rpmsg/rpmsg_sockif.c +++ b/net/rpmsg/rpmsg_sockif.c @@ -887,7 +887,7 @@ errout: } static uint32_t rpmsg_socket_get_iovlen(FAR const struct iovec *buf, - size_t iovcnt) + size_t iovcnt) { uint32_t len = 0; while (iovcnt--) @@ -1045,7 +1045,7 @@ static ssize_t rpmsg_socket_send_single(FAR struct socket *psock, if (total > ipcsize) { total = ipcsize; - len = ipcsize - sizeof(*msg) - sizeof(uint32_t); + len = ipcsize - sizeof(*msg) - sizeof(uint32_t); } /* SOCK_DGRAM need write len to buffer */ diff --git a/net/socket/net_sendfile.c b/net/socket/net_sendfile.c index c3f7bd4d04a..51387820194 100644 --- a/net/socket/net_sendfile.c +++ b/net/socket/net_sendfile.c @@ -1,37 +1,20 @@ /**************************************************************************** * net/socket/net_sendfile.c * - * Copyright (C) 2013 UVC Ingenieure. All rights reserved. - * Copyright (C) 2007-2016 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Max Holtzberg + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/socket/sendto.c b/net/socket/sendto.c index f148b3d2d9a..db995236183 100644 --- a/net/socket/sendto.c +++ b/net/socket/sendto.c @@ -110,6 +110,11 @@ ssize_t psock_sendto(FAR struct socket *psock, FAR const void *buf, struct iovec iov; struct msghdr msg; + if (tolen != 0 && to == NULL) + { + return -EINVAL; + } + iov.iov_base = (FAR void *)buf; iov.iov_len = len; msg.msg_name = (FAR struct sockaddr *)to; diff --git a/net/tcp/tcp.h b/net/tcp/tcp.h index 00e8563e16b..7e55d368642 100644 --- a/net/tcp/tcp.h +++ b/net/tcp/tcp.h @@ -69,10 +69,10 @@ # define TCP_WBIOB(wrb) ((wrb)->wb_iob) # define TCP_WBCOPYOUT(wrb,dest,n) (iob_copyout(dest,(wrb)->wb_iob,(n),0)) # define TCP_WBCOPYIN(wrb,src,n,off) \ - (iob_copyin((wrb)->wb_iob,src,(n),(off),false,\ + (iob_copyin((wrb)->wb_iob,src,(n),(off),true,\ IOBUSER_NET_TCP_WRITEBUFFER)) # define TCP_WBTRYCOPYIN(wrb,src,n,off) \ - (iob_trycopyin((wrb)->wb_iob,src,(n),(off),false,\ + (iob_trycopyin((wrb)->wb_iob,src,(n),(off),true,\ IOBUSER_NET_TCP_WRITEBUFFER)) # define TCP_WBTRIM(wrb,n) \ diff --git a/net/tcp/tcp_appsend.c b/net/tcp/tcp_appsend.c index d2a05bd175d..c31a9427417 100644 --- a/net/tcp/tcp_appsend.c +++ b/net/tcp/tcp_appsend.c @@ -319,11 +319,18 @@ void tcp_rexmit(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn, if (dev->d_sndlen > 0 && conn->tx_unacked > 0) #endif { + uint32_t seq; + /* We always set the ACK flag in response packets adding the length of * the IP and TCP headers. */ tcp_send(dev, conn, TCP_ACK | TCP_PSH, dev->d_sndlen + hdrlen); + + /* Advance sndseq */ + + seq = tcp_getsequence(conn->sndseq); + tcp_setsequence(conn->sndseq, seq + dev->d_sndlen); } /* If there is no data to send, just send out a pure ACK if one is diff --git a/net/tcp/tcp_input.c b/net/tcp/tcp_input.c index 3410a35b313..2975c0d2e6c 100644 --- a/net/tcp/tcp_input.c +++ b/net/tcp/tcp_input.c @@ -564,21 +564,21 @@ found: #ifdef CONFIG_NET_IPv6 # ifdef CONFIG_NET_IPv4 - if (domain == PF_INET6) + if (domain == PF_INET6) # endif - { - net_ipv6addr_copy(&uaddr.ipv6.laddr, IPv6BUF->destipaddr); - } + { + net_ipv6addr_copy(&uaddr.ipv6.laddr, IPv6BUF->destipaddr); + } #endif #ifdef CONFIG_NET_IPv4 # ifdef CONFIG_NET_IPv6 - if (domain == PF_INET) + if (domain == PF_INET) # endif - { - net_ipv4addr_copy(uaddr.ipv4.laddr, - net_ip4addr_conv32(IPv4BUF->destipaddr)); - } + { + net_ipv4addr_copy(uaddr.ipv4.laddr, + net_ip4addr_conv32(IPv4BUF->destipaddr)); + } #endif #if defined(CONFIG_NET_IPv4) && defined(CONFIG_NET_IPv6) @@ -684,6 +684,7 @@ found: { uint32_t unackseq; uint32_t ackseq; + uint32_t sndseq; /* The next sequence number is equal to the current sequence * number (sndseq) plus the size of the outstanding, unacknowledged @@ -741,11 +742,15 @@ found: * be beyond ackseq. */ - ninfo("sndseq: %08" PRIx32 "->%08" PRIx32 - " unackseq: %08" PRIx32 " new tx_unacked: %" PRId32 "\n", - tcp_getsequence(conn->sndseq), ackseq, unackseq, - (uint32_t)conn->tx_unacked); - tcp_setsequence(conn->sndseq, ackseq); + sndseq = tcp_getsequence(conn->sndseq); + if (TCP_SEQ_LT(sndseq, ackseq)) + { + ninfo("sndseq: %08" PRIx32 "->%08" PRIx32 + " unackseq: %08" PRIx32 " new tx_unacked: %" PRId32 "\n", + tcp_getsequence(conn->sndseq), ackseq, unackseq, + (uint32_t)conn->tx_unacked); + tcp_setsequence(conn->sndseq, ackseq); + } /* Do RTT estimation, unless we have done retransmissions. */ diff --git a/net/tcp/tcp_listen.c b/net/tcp/tcp_listen.c index cd5581f47a0..4eb4c9c3f58 100644 --- a/net/tcp/tcp_listen.c +++ b/net/tcp/tcp_listen.c @@ -52,6 +52,7 @@ #include #include "devif/devif.h" +#include "inet/inet.h" #include "tcp/tcp.h" /**************************************************************************** @@ -117,9 +118,10 @@ FAR struct tcp_conn_s *tcp_findlistener(FAR union ip_binding_u *uaddr, } } #endif + #ifdef CONFIG_NET_IPv4 # ifdef CONFIG_NET_IPv6 - if (domain == PF_INET4) + if (domain == PF_INET) # endif { if (net_ipv4addr_cmp(conn->u.ipv4.laddr, uaddr->ipv4.laddr) || diff --git a/net/tcp/tcp_send_buffered.c b/net/tcp/tcp_send_buffered.c index f307470e0ab..b4102ba2f23 100644 --- a/net/tcp/tcp_send_buffered.c +++ b/net/tcp/tcp_send_buffered.c @@ -506,7 +506,7 @@ static uint16_t psock_send_eventhandler(FAR struct net_driver_s *dev, ninfo("ACK: wrb=%p trim %u bytes\n", wrb, trimlen); TCP_WBTRIM(wrb, trimlen); - TCP_WBSEQNO(wrb) = ackno; + TCP_WBSEQNO(wrb) += trimlen; TCP_WBSENT(wrb) -= trimlen; /* Set the new sequence number for what remains */ @@ -571,7 +571,7 @@ static uint16_t psock_send_eventhandler(FAR struct net_driver_s *dev, /* Trim the ACKed bytes from the beginning of the write buffer. */ TCP_WBTRIM(wrb, nacked); - TCP_WBSEQNO(wrb) = ackno; + TCP_WBSEQNO(wrb) += nacked; TCP_WBSENT(wrb) -= nacked; ninfo("ACK: wrb=%p seqno=%" PRIu32 " pktlen=%u sent=%u\n", @@ -1142,69 +1142,73 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf, } #endif /* CONFIG_NET_SEND_BUFSIZE */ - /* Allocate a write buffer. Careful, the network will be momentarily - * unlocked here. - */ - - /* Try to coalesce into the last wrb. - * - * But only when it might yield larger segments. - * (REVISIT: It might make sense to lift this condition. - * IOB boundaries and segment boundaries usually do not match. - * It makes sense to save the number of IOBs.) - * - * Also, for simplicity, do it only when we haven't sent anything - * from the the wrb yet. - */ - - max_wrb_size = tcp_max_wrb_size(conn); - wrb = (FAR struct tcp_wrbuffer_s *)sq_tail(&conn->write_q); - if (wrb != NULL && TCP_WBSENT(wrb) == 0 && TCP_WBNRTX(wrb) == 0 && - TCP_WBPKTLEN(wrb) < max_wrb_size && - (TCP_WBPKTLEN(wrb) % conn->mss) != 0) + while (true) { - wrb = (FAR struct tcp_wrbuffer_s *)sq_remlast(&conn->write_q); - ninfo("coalesce %zu bytes to wrb %p (%" PRIu16 ")\n", len, wrb, - TCP_WBPKTLEN(wrb)); - DEBUGASSERT(TCP_WBPKTLEN(wrb) > 0); - } - else if (nonblock) - { - wrb = tcp_wrbuffer_tryalloc(); - ninfo("new wrb %p (non blocking)\n", wrb); - } - else - { - wrb = tcp_wrbuffer_alloc(); - ninfo("new wrb %p\n", wrb); - } + struct iob_s *iob; - if (wrb == NULL) - { - /* A buffer allocation error occurred */ + /* Allocate a write buffer. Careful, the network will be + * momentarily unlocked here. + */ - nerr("ERROR: Failed to allocate write buffer\n"); - ret = nonblock ? -EAGAIN : -ENOMEM; - goto errout_with_lock; - } + /* Try to coalesce into the last wrb. + * + * But only when it might yield larger segments. + * (REVISIT: It might make sense to lift this condition. + * IOB boundaries and segment boundaries usually do not match. + * It makes sense to save the number of IOBs.) + * + * Also, for simplicity, do it only when we haven't sent anything + * from the the wrb yet. + */ - /* Initialize the write buffer */ + max_wrb_size = tcp_max_wrb_size(conn); + wrb = (FAR struct tcp_wrbuffer_s *)sq_tail(&conn->write_q); + if (wrb != NULL && TCP_WBSENT(wrb) == 0 && TCP_WBNRTX(wrb) == 0 && + TCP_WBPKTLEN(wrb) < max_wrb_size && + (TCP_WBPKTLEN(wrb) % conn->mss) != 0) + { + wrb = (FAR struct tcp_wrbuffer_s *)sq_remlast(&conn->write_q); + ninfo("coalesce %zu bytes to wrb %p (%" PRIu16 ")\n", len, wrb, + TCP_WBPKTLEN(wrb)); + DEBUGASSERT(TCP_WBPKTLEN(wrb) > 0); + } + else if (nonblock) + { + wrb = tcp_wrbuffer_tryalloc(); + ninfo("new wrb %p (non blocking)\n", wrb); + DEBUGASSERT(wrb == NULL || TCP_WBPKTLEN(wrb) == 0); + } + else + { + wrb = tcp_wrbuffer_alloc(); + ninfo("new wrb %p\n", wrb); + DEBUGASSERT(TCP_WBPKTLEN(wrb) == 0); + } - TCP_WBSEQNO(wrb) = (unsigned)-1; - TCP_WBNRTX(wrb) = 0; + if (wrb == NULL) + { + /* A buffer allocation error occurred */ - off = TCP_WBPKTLEN(wrb); - if (off + chunk_len > max_wrb_size) - { - chunk_len = max_wrb_size - off; - } + nerr("ERROR: Failed to allocate write buffer\n"); + ret = nonblock ? -EAGAIN : -ENOMEM; + goto errout_with_lock; + } - /* Copy the user data into the write buffer. We cannot wait for - * buffer space if the socket was opened non-blocking. - */ + /* Initialize the write buffer */ + + TCP_WBSEQNO(wrb) = (unsigned)-1; + TCP_WBNRTX(wrb) = 0; + + off = TCP_WBPKTLEN(wrb); + if (off + chunk_len > max_wrb_size) + { + chunk_len = max_wrb_size - off; + } + + /* Copy the user data into the write buffer. We cannot wait for + * buffer space. + */ - if (nonblock) - { /* The return value from TCP_WBTRYCOPYIN is either OK or * -ENOMEM if less than the entire data chunk could be allocated. * If -ENOMEM is returned, check if at least a part of the data @@ -1233,34 +1237,48 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf, } else { - nerr("ERROR: Failed to add data to the I/O chain\n"); - ret = -EWOULDBLOCK; - goto errout_with_wrb; + chunk_result = 0; } } else { DEBUGASSERT(chunk_result == chunk_len); } - } - else - { - unsigned int count; - int blresult; - /* iob_copyin might wait for buffers to be freed, but if network is - * locked this might never happen, since network driver is also - * locked, therefore we need to break the lock + if (chunk_result > 0) + { + break; + } + + /* release wrb */ + + if (TCP_WBPKTLEN(wrb) > 0) + { + DEBUGASSERT(TCP_WBSENT(wrb) == 0); + DEBUGASSERT(TCP_WBPKTLEN(wrb) > 0); + sq_addlast(&wrb->wb_node, &conn->write_q); + } + else + { + tcp_wrbuffer_release(wrb); + } + + if (nonblock) + { + nerr("ERROR: Failed to add data to the I/O chain\n"); + ret = -EAGAIN; + goto errout_with_lock; + } + + /* Wait for at least one IOB getting available. + * + * Note: net_ioballoc releases the network lock when blocking. + * It allows our write_q being drained in the meantime. Otherwise, + * we risk a deadlock with other threads competing on IOBs. */ - blresult = net_breaklock(&count); - ninfo("starting copyin to wrb %p\n", wrb); - chunk_result = TCP_WBCOPYIN(wrb, cp, chunk_len, off); - ninfo("finished copyin to wrb %p\n", wrb); - if (blresult >= 0) - { - net_restorelock(count); - } + iob = net_ioballoc(true, IOBUSER_NET_TCP_WRITEBUFFER); + iob_free_chain(iob, IOBUSER_NET_TCP_WRITEBUFFER); } /* Dump I/O buffer chain */ @@ -1324,9 +1342,6 @@ ssize_t psock_tcp_send(FAR struct socket *psock, FAR const void *buf, return result; -errout_with_wrb: - tcp_wrbuffer_release(wrb); - errout_with_lock: net_unlock(); @@ -1391,7 +1406,7 @@ int psock_tcp_cansend(FAR struct socket *psock) * but we don't know how many more. */ - if (tcp_wrbuffer_test() < 0 || iob_navail(false) <= 0) + if (tcp_wrbuffer_test() < 0 || iob_navail(true) <= 0) { return -EWOULDBLOCK; } diff --git a/net/tcp/tcp_sendfile.c b/net/tcp/tcp_sendfile.c index 6337e1abd02..87d902f5b2c 100644 --- a/net/tcp/tcp_sendfile.c +++ b/net/tcp/tcp_sendfile.c @@ -1,37 +1,20 @@ /**************************************************************************** * net/tcp/tcp_sendfile.c * - * Copyright (C) 2013 UVC Ingenieure. All rights reserved. - * Copyright (C) 2007-2017 Gregory Nutt. All rights reserved. - * Authors: Gregory Nutt - * Max Holtzberg + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/net/tcp/tcp_wrbuffer.c b/net/tcp/tcp_wrbuffer.c index c93f7495e9f..27d912144c0 100644 --- a/net/tcp/tcp_wrbuffer.c +++ b/net/tcp/tcp_wrbuffer.c @@ -145,7 +145,7 @@ FAR struct tcp_wrbuffer_s *tcp_wrbuffer_alloc(void) /* Now get the first I/O buffer for the write buffer structure */ - wrb->wb_iob = net_ioballoc(false, IOBUSER_NET_TCP_WRITEBUFFER); + wrb->wb_iob = net_ioballoc(true, IOBUSER_NET_TCP_WRITEBUFFER); /* Did we get an IOB? We should always get one except under some really * weird error conditions. diff --git a/net/usrsock/Kconfig b/net/usrsock/Kconfig index d56bdd2cb42..d5c2504c056 100644 --- a/net/usrsock/Kconfig +++ b/net/usrsock/Kconfig @@ -41,12 +41,10 @@ config NET_USRSOCK_NPOLLWAITERS config NET_USRSOCK_NO_INET bool "Disable PF_INET for usrsock" default n - ---help--- config NET_USRSOCK_NO_INET6 bool "Disable PF_INET6 for usrsock" default n - ---help--- config NET_USRSOCK_UDP bool "User-space daemon provides UDP sockets" @@ -58,12 +56,10 @@ config NET_USRSOCK_TCP bool "User-space daemon provides TCP sockets" default n select NET_TCP - ---help--- config NET_USRSOCK_OTHER bool "Enable other protocol families in addition of INET & INET6" default n - ---help--- endif # NET_USRSOCK endmenu # User-space networking stack API diff --git a/net/utils/net_lock.c b/net/utils/net_lock.c index d99c1f6b89d..94b33851bf7 100644 --- a/net/utils/net_lock.c +++ b/net/utils/net_lock.c @@ -179,9 +179,6 @@ void net_lockinitialize(void) int net_lock(void) { -#ifdef CONFIG_SMP - irqstate_t flags = enter_critical_section(); -#endif pid_t me = getpid(); int ret = OK; @@ -207,9 +204,6 @@ int net_lock(void) } } -#ifdef CONFIG_SMP - leave_critical_section(flags); -#endif return ret; } @@ -232,9 +226,6 @@ int net_lock(void) int net_trylock(void) { -#ifdef CONFIG_SMP - irqstate_t flags = enter_critical_section(); -#endif pid_t me = getpid(); int ret = OK; @@ -258,9 +249,6 @@ int net_trylock(void) } } -#ifdef CONFIG_SMP - leave_critical_section(flags); -#endif return ret; } @@ -280,9 +268,6 @@ int net_trylock(void) void net_unlock(void) { -#ifdef CONFIG_SMP - irqstate_t flags = enter_critical_section(); -#endif DEBUGASSERT(g_holder == getpid() && g_count > 0); /* If the count would go to zero, then release the semaphore */ @@ -301,10 +286,6 @@ void net_unlock(void) g_count--; } - -#ifdef CONFIG_SMP - leave_critical_section(flags); -#endif } /**************************************************************************** @@ -499,7 +480,6 @@ FAR struct iob_s *net_ioballoc(bool throttled, enum iob_user_e consumerid) iob = iob_tryalloc(throttled, consumerid); if (iob == NULL) { - irqstate_t flags; unsigned int count; int blresult; @@ -507,15 +487,12 @@ FAR struct iob_s *net_ioballoc(bool throttled, enum iob_user_e consumerid) * become available. But let's not do that with the network locked. */ - flags = enter_critical_section(); blresult = net_breaklock(&count); iob = iob_alloc(throttled, consumerid); if (blresult >= 0) { net_restorelock(count); } - - leave_critical_section(flags); } return iob; diff --git a/sched/Kconfig b/sched/Kconfig index 02e9612b009..9abf2f61b72 100644 --- a/sched/Kconfig +++ b/sched/Kconfig @@ -292,8 +292,7 @@ if SMP config SMP_NCPUS int "Number of CPUs" default 4 - range 1 32 if DEBUG_FEATURES - range 2 32 if !DEBUG_FEATURES + range 1 32 ---help--- This value identifies the number of CPUs supported by the processor that will be used for SMP. @@ -1131,7 +1130,7 @@ config PATH_MAX endmenu # Files and I/O menuconfig PRIORITY_INHERITANCE - bool "Enable priority inheritance " + bool "Enable priority inheritance" default n ---help--- Set to enable support for priority inheritance on mutexes and semaphores. diff --git a/sched/irq/irq_csection.c b/sched/irq/irq_csection.c index 798a222d3ab..f922fd16817 100644 --- a/sched/irq/irq_csection.c +++ b/sched/irq/irq_csection.c @@ -66,7 +66,7 @@ volatile uint8_t g_cpu_nestcount[CONFIG_SMP_NCPUS]; * Name: irq_waitlock * * Description: - * Spin to get g_irq_waitlock, handling a known deadlock condition: + * Spin to get g_cpu_irqlock, handling a known deadlock condition: * * A deadlock may occur if enter_critical_section is called from an * interrupt handler. Suppose: @@ -92,7 +92,7 @@ volatile uint8_t g_cpu_nestcount[CONFIG_SMP_NCPUS]; * section. Since it is spinning with interrupts disabled, CPUm cannot * process the pending pause interrupt, causing the deadlock. * - * This function detects this deadlock condition while spinning with \ + * This function detects this deadlock condition while spinning with * interrupts disabled. * * Input Parameters: @@ -106,7 +106,7 @@ volatile uint8_t g_cpu_nestcount[CONFIG_SMP_NCPUS]; ****************************************************************************/ #ifdef CONFIG_SMP -bool irq_waitlock(int cpu) +static bool irq_waitlock(int cpu) { #ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS FAR struct tcb_s *tcb = current_task(cpu); @@ -131,7 +131,7 @@ bool irq_waitlock(int cpu) */ #ifdef CONFIG_SCHED_INSTRUMENTATION_SPINLOCKS - /* Notify that we are waiting for a spinlock */ + /* Notify that we have aborted the wait for the spinlock */ sched_note_spinabort(tcb, &g_cpu_irqlock); #endif @@ -161,7 +161,7 @@ bool irq_waitlock(int cpu) * * Description: * Take the CPU IRQ lock and disable interrupts on all CPUs. A thread- - * specific counter is increment to indicate that the thread has IRQs + * specific counter is incremented to indicate that the thread has IRQs * disabled and to support nested calls to enter_critical_section(). * ****************************************************************************/ @@ -253,7 +253,7 @@ try_again: else { - /* Make sure that the g_cpu_irqlock() was not already set + /* Make sure that the g_cpu_irqset was not already set * by previous logic on this CPU that was executed by the * interrupt handler. We know that the bit in g_cpu_irqset * for this CPU was zero on entry into the interrupt handler, @@ -270,8 +270,8 @@ try_again_in_irq: if (!irq_waitlock(cpu)) { /* We are in a deadlock condition due to a pending - * pause request interrupt request. Break the - * deadlock by handling the pause interrupt now. + * pause request interrupt. Break the deadlock by + * handling the pause request now. */ DEBUGVERIFY(up_cpu_paused(cpu)); @@ -360,7 +360,7 @@ try_again_in_irq: goto try_again; } - /* The set the lock count to 1. + /* Then set the lock count to 1. * * Interrupts disables must follow a stacked order. We * cannot other context switches to re-order the enabling diff --git a/sched/irq/irq_spinlock.c b/sched/irq/irq_spinlock.c index 0e41983b3e6..41638c8ea2d 100644 --- a/sched/irq/irq_spinlock.c +++ b/sched/irq/irq_spinlock.c @@ -57,12 +57,12 @@ static volatile uint8_t g_irq_spin_count[CONFIG_SMP_NCPUS]; * If the argument lock is not specified (i.e. NULL), * disable local interrupts and take the global spinlock (g_irq_spin) * if the call counter (g_irq_spin_count[cpu]) equals to 0. Then the - * counter on the CPU is increment to allow nested call and return + * counter on the CPU is incremented to allow nested call and return * the interrupt state. * * If the argument lock is specified, - * disable local interrupts and take the lock spinlock and return - * the interrupt state. + * disable local interrupts and take the given lock and return the + * interrupt state. * * NOTE: This API is very simple to protect data (e.g. H/W register * or internal data structure) in SMP mode. But do not use this API @@ -117,8 +117,8 @@ irqstate_t spin_lock_irqsave(spinlock_t *lock) * restore the interrupt state as it was prior to the previous call to * spin_lock_irqsave(NULL). * - * If the argument lock is specified, release the the lock and - * restore the interrupt state as it was prior to the previous call to + * If the argument lock is specified, release the lock and restore + * the interrupt state as it was prior to the previous call to * spin_lock_irqsave(lock). * * If SMP is not enabled: diff --git a/sched/mqueue/mq_msgqalloc.c b/sched/mqueue/mq_msgqalloc.c index 38bbc2ebf70..7209f433a9f 100644 --- a/sched/mqueue/mq_msgqalloc.c +++ b/sched/mqueue/mq_msgqalloc.c @@ -49,58 +49,50 @@ * attr - The mq_maxmsg attribute is used at the time that the message * queue is created to determine the maximum number of * messages that may be placed in the message queue. - * msgq - This parameter is a address of a pointer * * Returned Value: - * IF the function runs successfully，will return Zero(OK),else will - * return a error code. - * - * EINVAL attr is a null pointer and attr->mq_mqssize or attr->mq_maxmsg - * is an invalid value. - * ENOMEM No memery to alloc. + * The allocated and initialized message queue structure or NULL in the + * event of a failure. * ****************************************************************************/ -int nxmq_alloc_msgq(FAR struct mq_attr *attr, - FAR struct mqueue_inode_s **msgq) +FAR struct mqueue_inode_s *nxmq_alloc_msgq(FAR struct mq_attr *attr) { + FAR struct mqueue_inode_s *msgq; + /* Check if the caller is attempting to allocate a message for messages * larger than the configured maximum message size. */ - DEBUGASSERT((!attr || attr->mq_msgsize <= MQ_MAX_BYTES) && msgq); - if ((attr && attr->mq_msgsize > MQ_MAX_BYTES) || !msgq) + DEBUGASSERT(!attr || attr->mq_msgsize <= MQ_MAX_BYTES); + if (attr && attr->mq_msgsize > MQ_MAX_BYTES) { - return -EINVAL; + return NULL; } /* Allocate memory for the new message queue. */ - *msgq = (FAR struct mqueue_inode_s *) + msgq = (FAR struct mqueue_inode_s *) kmm_zalloc(sizeof(struct mqueue_inode_s)); - if (*msgq) + if (msgq) { /* Initialize the new named message queue */ - sq_init(&(*msgq)->msglist); + sq_init(&msgq->msglist); if (attr) { - (*msgq)->maxmsgs = (int16_t)attr->mq_maxmsg; - (*msgq)->maxmsgsize = (int16_t)attr->mq_msgsize; + msgq->maxmsgs = (int16_t)attr->mq_maxmsg; + msgq->maxmsgsize = (int16_t)attr->mq_msgsize; } else { - (*msgq)->maxmsgs = MQ_MAX_MSGS; - (*msgq)->maxmsgsize = MQ_MAX_BYTES; + msgq->maxmsgs = MQ_MAX_MSGS; + msgq->maxmsgsize = MQ_MAX_BYTES; } - (*msgq)->ntpid = INVALID_PROCESS_ID; - } - else - { - return -ENOMEM; + msgq->ntpid = INVALID_PROCESS_ID; } - return OK; + return msgq; } diff --git a/sched/sched/sched_gettcb.c b/sched/sched/sched_gettcb.c index daf48c259a1..373e21828fa 100644 --- a/sched/sched/sched_gettcb.c +++ b/sched/sched/sched_gettcb.c @@ -56,9 +56,11 @@ FAR struct tcb_s *nxsched_get_tcb(pid_t pid) irqstate_t flags; int hash_ndx; - /* Verify that the PID is within range */ + /* Verify whether g_pidhash hash table has already been allocated and + * whether the PID is within range. + */ - if (pid >= 0) + if (g_pidhash != NULL && pid >= 0) { /* The test and the return setup should be atomic. This still does * not provide proper protection if the recipient of the TCB does not diff --git a/sched/sched/sched_processtimer.c b/sched/sched/sched_processtimer.c index 82a544a1402..3108a5c8ca7 100644 --- a/sched/sched/sched_processtimer.c +++ b/sched/sched/sched_processtimer.c @@ -114,7 +114,7 @@ static inline void nxsched_process_scheduler(void) int i; /* If we are running on a single CPU architecture, then we know interrupts - * a disabled an there is no need to explicitly call + * are disabled and there is no need to explicitly call * enter_critical_section(). However, in the SMP case, * enter_critical_section() does much more than just disable interrupts on * the local CPU; it also manages spinlocks to assure the stability of the @@ -161,7 +161,7 @@ static inline void nxsched_process_wdtimer(void) { irqstate_t flags; - /* We are in an interrupt handler as, as a consequence, interrupts are + /* We are in an interrupt handler and, as a consequence, interrupts are * disabled. But in the SMP case, interrupts MAY be disabled only on * the local CPU since most architectures do not permit disabling * interrupts on other CPUS. diff --git a/sched/sched/sched_timerexpiration.c b/sched/sched/sched_timerexpiration.c index c4a2a50769a..a8999ed4604 100644 --- a/sched/sched/sched_timerexpiration.c +++ b/sched/sched/sched_timerexpiration.c @@ -280,7 +280,7 @@ static uint32_t nxsched_process_scheduler(uint32_t ticks, bool noswitches) int i; /* If we are running on a single CPU architecture, then we know interrupts - * a disabled an there is no need to explicitly call + * are disabled and there is no need to explicitly call * enter_critical_section(). However, in the SMP case, * enter_critical_section() does much more than just disable interrupts on * the local CPU; it also manages spinlocks to assure the stability of the @@ -335,7 +335,7 @@ static inline unsigned int nxsched_process_wdtimer(uint32_t ticks, unsigned int ret; irqstate_t flags; - /* We are in an interrupt handler as, as a consequence, interrupts are + /* We are in an interrupt handler and, as a consequence, interrupts are * disabled. But in the SMP case, interrupts MAY be disabled only on * the local CPU since most architectures do not permit disabling * interrupts on other CPUS. diff --git a/sched/semaphore/spinlock.c b/sched/semaphore/spinlock.c index d6a8bb40dbb..5e87d8bddea 100644 --- a/sched/semaphore/spinlock.c +++ b/sched/semaphore/spinlock.c @@ -49,7 +49,7 @@ * * This implementation is non-reentrant and is prone to deadlocks in * the case that any logic on the same CPU attempts to take the lock - * more than one + * more than once. * * Input Parameters: * lock - A reference to the spinlock object to lock. diff --git a/sched/task/task_spawnparms.c b/sched/task/task_spawnparms.c index eb2e44f745d..b5ee997c487 100644 --- a/sched/task/task_spawnparms.c +++ b/sched/task/task_spawnparms.c @@ -128,6 +128,10 @@ static inline int nxspawn_open(FAR struct spawn_open_file_action_s *action) { serr("ERROR: dup2 failed: %d\n", ret); } + else + { + ret = OK; + } sinfo("Closing fd=%d\n", fd); nx_close(fd); diff --git a/sched/wdog/wd_start.c b/sched/wdog/wd_start.c index 48883583571..80d55e7ecdb 100644 --- a/sched/wdog/wd_start.c +++ b/sched/wdog/wd_start.c @@ -98,40 +98,35 @@ static inline void wd_expiration(void) FAR struct wdog_s *wdog; wdentry_t func; - /* Check if the watchdog at the head of the list is ready to run */ + /* Process the watchdog at the head of the list as well as any + * other watchdogs that became ready to run at this time + */ - if (((FAR struct wdog_s *)g_wdactivelist.head)->lag <= 0) + while (g_wdactivelist.head && + ((FAR struct wdog_s *)g_wdactivelist.head)->lag <= 0) { - /* Process the watchdog at the head of the list as well as any - * other watchdogs that became ready to run at this time + /* Remove the watchdog from the head of the list */ + + wdog = (FAR struct wdog_s *)sq_remfirst(&g_wdactivelist); + + /* If there is another watchdog behind this one, update its + * its lag (this shouldn't be necessary). */ - while (g_wdactivelist.head && - ((FAR struct wdog_s *)g_wdactivelist.head)->lag <= 0) + if (g_wdactivelist.head) { - /* Remove the watchdog from the head of the list */ - - wdog = (FAR struct wdog_s *)sq_remfirst(&g_wdactivelist); - - /* If there is another watchdog behind this one, update its - * its lag (this shouldn't be necessary). - */ - - if (g_wdactivelist.head) - { - ((FAR struct wdog_s *)g_wdactivelist.head)->lag += wdog->lag; - } - - /* Indicate that the watchdog is no longer active. */ - - func = wdog->func; - wdog->func = NULL; - - /* Execute the watchdog function */ - - up_setpicbase(wdog->picbase); - CALL_FUNC(func, wdog->arg); + ((FAR struct wdog_s *)g_wdactivelist.head)->lag += wdog->lag; } + + /* Indicate that the watchdog is no longer active. */ + + func = wdog->func; + wdog->func = NULL; + + /* Execute the watchdog function */ + + up_setpicbase(wdog->picbase); + CALL_FUNC(func, wdog->arg); } } diff --git a/sched/wqueue/kwork_cancel.c b/sched/wqueue/kwork_cancel.c index 156dde70938..b5936b54e3a 100644 --- a/sched/wqueue/kwork_cancel.c +++ b/sched/wqueue/kwork_cancel.c @@ -45,12 +45,12 @@ * * Description: * Cancel previously queued work. This removes work from the work queue. - * After work has been cancelled, it may be re-queue by calling + * After work has been cancelled, it may be requeued by calling * work_queue() again. * * Input Parameters: * qid - The work queue ID - * work - The previously queue work structure to cancel + * work - The previously queued work structure to cancel * * Returned Value: * Zero (OK) on success, a negated errno on failure. This error may be @@ -107,12 +107,12 @@ static int work_qcancel(FAR struct kwork_wqueue_s *wqueue, * * Description: * Cancel previously queued user-mode work. This removes work from the - * user mode work queue. After work has been cancelled, it may be re-queue - * by calling work_queue() again. + * user mode work queue. After work has been cancelled, it may be + * requeued by calling work_queue() again. * * Input Parameters: * qid - The work queue ID (must be HPWORK or LPWORK) - * work - The previously queue work structure to cancel + * work - The previously queued work structure to cancel * * Returned Value: * Zero (OK) on success, a negated errno on failure. This error may be diff --git a/sched/wqueue/kwork_queue.c b/sched/wqueue/kwork_queue.c index 9c9b0cb1f8f..1b868f1473c 100644 --- a/sched/wqueue/kwork_queue.c +++ b/sched/wqueue/kwork_queue.c @@ -86,15 +86,15 @@ static void lp_work_timer_expiry(wdparm_t arg) * the caller. Otherwise, the work structure is completely managed by the * work queue logic. The caller should never modify the contents of the * work queue structure directly. If work_queue() is called before the - * previous work as been performed and removed from the queue, then any + * previous work has been performed and removed from the queue, then any * pending work will be canceled and lost. * * Input Parameters: * qid - The work queue ID (index) * work - The work structure to queue - * worker - The worker callback to be invoked. The callback will invoked - * on the worker thread of execution. - * arg - The argument that will be passed to the workder callback when + * worker - The worker callback to be invoked. The callback will be + * invoked on the worker thread of execution. + * arg - The argument that will be passed to the worker callback when * int is invoked. * delay - Delay (in clock ticks) from the time queue until the worker * is invoked. Zero means to perform the work immediately. @@ -114,7 +114,7 @@ int work_queue(int qid, FAR struct work_s *work, worker_t worker, work_cancel(qid, work); /* Interrupts are disabled so that this logic can be called from with - * task logic or ifrom nterrupt handling logic. + * task logic or from interrupt handling logic. */ flags = enter_critical_section(); @@ -138,7 +138,8 @@ int work_queue(int qid, FAR struct work_s *work, worker_t worker, } else { - wd_start(&work->u.timer, delay, hp_work_timer_expiry, (wdparm_t)work); + wd_start(&work->u.timer, delay, hp_work_timer_expiry, + (wdparm_t)work); } } else @@ -155,7 +156,8 @@ int work_queue(int qid, FAR struct work_s *work, worker_t worker, } else { - wd_start(&work->u.timer, delay, lp_work_timer_expiry, (wdparm_t)work); + wd_start(&work->u.timer, delay, lp_work_timer_expiry, + (wdparm_t)work); } } #endif diff --git a/sched/wqueue/kwork_thread.c b/sched/wqueue/kwork_thread.c index affcf970f8d..2e4839922ce 100644 --- a/sched/wqueue/kwork_thread.c +++ b/sched/wqueue/kwork_thread.c @@ -29,8 +29,8 @@ #include #include #include -#include #include +#include #include #include @@ -90,18 +90,18 @@ struct lp_wqueue_s g_lpwork; * Name: work_thread * * Description: - * These are the worker threads that performs the actions placed on the + * These are the worker threads that perform the actions placed on the * high priority work queue. * * These, along with the lower priority worker thread(s) are the kernel - * mode work queues (also build in the flat build). + * mode work queues (also built in the flat build). * * All kernel mode worker threads are started by the OS during normal * bring up. This entry point is referenced by OS internally and should * not be accessed by application logic. * * Input Parameters: - * argc, argv (not used) + * argc, argv * * Returned Value: * Does not return @@ -143,7 +143,7 @@ static int work_thread(int argc, FAR char *argv[]) if (work && work->worker) { /* Extract the work description from the entry (in case the work - * instance by the re-used after it has been de-queued). + * instance will be re-used after it has been de-queued). */ worker = work->worker; diff --git a/tools/Directories.mk b/tools/Directories.mk index a8ce1abe5cf..00ce04e0b81 100644 --- a/tools/Directories.mk +++ b/tools/Directories.mk @@ -37,7 +37,7 @@ # CONFIG_BUILD_KERNEL is selected, then applications are not build at all. CLEANDIRS := -CCLEANDIRS := boards $(APPDIR) graphics $(ARCH_SRC) +CCLEANDIRS := boards $(APPDIR) graphics KERNDEPDIRS := USERDEPDIRS := diff --git a/tools/Makefile.unix b/tools/Makefile.unix index 2700cb4d7fb..4e2cae8cd71 100644 --- a/tools/Makefile.unix +++ b/tools/Makefile.unix @@ -452,6 +452,26 @@ endif download: $(BIN) $(call DOWNLOAD, $<) +# bootloader +# +# Some architectures require the provisioning of a bootloader or other +# functions required for properly executing the NuttX binary. +# Make.defs files for those architectures should define a bootloader target +# with the correct operations for that platform. It will generate an error +# if the bootloader target is not defined. + +bootloader: + $(Q) $(MAKE) -C $(ARCH_SRC) bootloader + +# clean_bootloader +# +# Removes all of the files and directories created by the bootloader target. +# It will generate an error if the clean_bootloader target is not defined on +# the architecture-specific Makefile. + +clean_bootloader: + $(Q) $(MAKE) -C $(ARCH_SRC) clean_bootloader + # pass1dep: Create pass1 build dependencies # pass2dep: Create pass2 build dependencies @@ -564,6 +584,9 @@ subdir_distclean: $(foreach SDIR, $(CLEANDIRS), $(SDIR)_distclean) distclean: clean subdir_distclean ifeq ($(CONFIG_BUILD_2PASS),y) $(Q) $(MAKE) -C $(CONFIG_PASS1_BUILDIR) distclean +endif +ifeq ($(CONFIG_ARCH_HAVE_BOOTLOADER),y) + $(Q) $(MAKE) clean_bootloader endif $(Q) $(MAKE) clean_context $(call DELFILE, Make.defs) diff --git a/tools/Makefile.win b/tools/Makefile.win index 396f5c5d420..549fecf5e4f 100644 --- a/tools/Makefile.win +++ b/tools/Makefile.win @@ -411,6 +411,26 @@ endif download: $(BIN) $(call DOWNLOAD, $<) +# bootloader +# +# Some architectures require the provisioning of a bootloader or other +# functions required for properly executing the NuttX binary. +# Make.defs files for those architectures should define a bootloader target +# with the correct operations for that platform. It will generate an error +# if the bootloader target is not defined. + +bootloader: + $(Q) $(MAKE) -C $(ARCH_SRC) bootloader + +# clean_bootloader +# +# Removes all of the files and directories created by the bootloader target. +# It will generate an error if the clean_bootloader target is not defined on +# the architecture-specific Makefile. + +clean_bootloader: + $(Q) $(MAKE) -C $(ARCH_SRC) clean_bootloader + # pass1dep: Create pass1 build dependencies # pass2dep: Create pass2 build dependencies @@ -513,6 +533,9 @@ subdir_distclean: $(foreach SDIR, $(CLEANDIRS), $(SDIR)_distclean) distclean: clean subdir_distclean ifeq ($(CONFIG_BUILD_2PASS),y) $(Q) $(MAKE) -C $(CONFIG_PASS1_BUILDIR) distclean +endif +ifeq ($(CONFIG_ARCH_HAVE_BOOTLOADER),y) + $(Q) $(MAKE) clean_bootloader endif $(Q) $(MAKE) clean_context $(call DELFILE, Make.defs) diff --git a/tools/bl602/partition_cfg_2M_nuttx.toml b/tools/bl602/partition_cfg_2M_nuttx.toml new file mode 100644 index 00000000000..790f2e42714 --- /dev/null +++ b/tools/bl602/partition_cfg_2M_nuttx.toml @@ -0,0 +1,50 @@ +[pt_table] +#partition table is 4K in size +address0 = 0xE000 +address1 = 0xF000 + +[[pt_entry]] +type = 0 +name = "FW" +device = 0 +address0 = 0x10000 +size0 = 0x111000 +address1 = 0x121000 +size1 = 0xA0000 +# compressed image must set len,normal image can left it to 0 +len = 0 + +[[pt_entry]] +type = 2 +name = "mfg" +device = 0 +address0 = 0x121000 +size0 = 0xA0000 +address1 = 0 +size1 = 0 +# compressed image must set len,normal image can left it to 0 +len = 0 + +[[pt_entry]] +type = 3 +name = "factory" +device = 0 +address0 = 0x1C1000 +size0 = 0x4000 +address1 = 0 +size1 = 0 +# compressed image must set len,normal image can left it to 0 +len = 0 + +# for user +[[pt_entry]] +type = 4 +name = "chipdef" +device = 0 +address0 = 0x1C5000 +size0 = 0x3B000 +address1 = 0 +size1 = 0 +# compressed image must set len,normal image can left it to 0 +len = 0 + diff --git a/tools/ci/cibuild.sh b/tools/ci/cibuild.sh index bb604ec5671..17f73f8a33b 100755 --- a/tools/ci/cibuild.sh +++ b/tools/ci/cibuild.sh @@ -26,19 +26,19 @@ set -e set -o xtrace -WD=$(cd $(dirname $0) && pwd) -WORKSPACE=$(cd $WD/../../../ && pwd -P) -nuttx=$WORKSPACE/nuttx -apps=$WORKSPACE/apps -tools=$WORKSPACE/tools -prebuilt=$WORKSPACE/prebuilt +WD=$(cd "$(dirname "$0")" && pwd) +WORKSPACE=$(cd "${WD}"/../../../ && pwd -P) +nuttx=${WORKSPACE}/nuttx +apps=${WORKSPACE}/apps +tools=${WORKSPACE}/tools +prebuilt=${WORKSPACE}/prebuilt os=$(uname -s) EXTRA_PATH= -case $os in +case ${os} in Darwin) install="python-tools u-boot-tools elf-toolchain gen-romfs kconfig-frontends arm-gcc-toolchain riscv-gcc-toolchain xtensa-esp32-gcc-toolchain avr-gcc-toolchain c-cache binutils" - mkdir -p ${prebuilt}/homebrew + mkdir -p "${prebuilt}"/homebrew export HOMEBREW_CACHE=${prebuilt}/homebrew # https://github.com/actions/virtual-environments/issues/2322#issuecomment-749211076 rm -rf /usr/local/bin/2to3 @@ -51,23 +51,28 @@ case $os in esac function add_path { - PATH=$1:$PATH - EXTRA_PATH=$1:$EXTRA_PATH + PATH=$1:${PATH} + EXTRA_PATH=$1:${EXTRA_PATH} } function python-tools { # Python User Env PIP_USER=yes export PIP_USER - PYTHONUSERBASE=$prebuilt/pylocal + PYTHONUSERBASE=${prebuilt}/pylocal export PYTHONUSERBASE - add_path $PYTHONUSERBASE/bin + add_path "${PYTHONUSERBASE}"/bin pip3 install pexpect + + # MCUboot's tool for image signing and key management + if ! command -v imgtool &> /dev/null; then + pip3 install imgtool + fi } function u-boot-tools { - if ! type mkimage > /dev/null; then - case $os in + if ! type mkimage &> /dev/null; then + case ${os} in Darwin) brew install u-boot-tools ;; @@ -76,8 +81,8 @@ function u-boot-tools { } function elf-toolchain { - if ! type x86_64-elf-gcc > /dev/null; then - case $os in + if ! type x86_64-elf-gcc &> /dev/null; then + case ${os} in Darwin) brew install x86_64-elf-gcc ;; @@ -87,70 +92,70 @@ function elf-toolchain { } function gen-romfs { - add_path $prebuilt/genromfs/usr/bin + add_path "${prebuilt}"/genromfs/usr/bin - if [ ! -f "$prebuilt/genromfs/usr/bin/genromfs" ]; then - if [ ! -d "$tools" ]; then - git clone https://bitbucket.org/nuttx/tools.git $tools + if [ ! -f "${prebuilt}/genromfs/usr/bin/genromfs" ]; then + if [ ! -d "${tools}" ]; then + git clone https://bitbucket.org/nuttx/tools.git "${tools}" fi - mkdir -p $prebuilt; cd $tools - tar zxf genromfs-0.5.2.tar.gz -C $prebuilt - cd $prebuilt/genromfs-0.5.2 - make install PREFIX=$prebuilt/genromfs - cd $prebuilt + mkdir -p "${prebuilt}"; cd "${tools}" + tar zxf genromfs-0.5.2.tar.gz -C "${prebuilt}" + cd "${prebuilt}"/genromfs-0.5.2 + make install PREFIX="${prebuilt}"/genromfs + cd "${prebuilt}" rm -rf genromfs-0.5.2 fi } function gperf { - add_path $prebuilt/gperf/bin + add_path "${prebuilt}"/gperf/bin - if [ ! -f "$prebuilt/gperf/bin/gperf" ]; then - cd $prebuilt + if [ ! -f "${prebuilt}/gperf/bin/gperf" ]; then + cd "${prebuilt}" wget --quiet http://ftp.gnu.org/pub/gnu/gperf/gperf-3.1.tar.gz tar zxf gperf-3.1.tar.gz - cd $prebuilt/gperf-3.1 - ./configure --prefix=$prebuilt/gperf; make; make install - cd $prebuilt + cd "${prebuilt}"/gperf-3.1 + ./configure --prefix="${prebuilt}"/gperf; make; make install + cd "${prebuilt}" rm -rf gperf-3.1; rm gperf-3.1.tar.gz fi } function kconfig-frontends { - add_path $prebuilt/kconfig-frontends/bin + add_path "${prebuilt}"/kconfig-frontends/bin - if [ ! -f "$prebuilt/kconfig-frontends/bin/kconfig-conf" ]; then - cd $tools/kconfig-frontends - ./configure --prefix=$prebuilt/kconfig-frontends \ + if [ ! -f "${prebuilt}/kconfig-frontends/bin/kconfig-conf" ]; then + cd "${tools}"/kconfig-frontends + ./configure --prefix="${prebuilt}"/kconfig-frontends \ --disable-kconfig --disable-nconf --disable-qconf \ --disable-gconf --disable-mconf --disable-static \ --disable-shared --disable-L10n # Avoid "aclocal/automake missing" errors touch aclocal.m4 Makefile.in make install - cd $tools; git clean -xfd + cd "${tools}"; git clean -xfd fi } function bloaty { - add_path $prebuilt/bloaty/bin - if [ ! -f "$prebuilt/bloaty/bin/bloaty" ]; then + add_path "${prebuilt}"/bloaty/bin + if [ ! -f "${prebuilt}/bloaty/bin/bloaty" ]; then git clone --depth 1 --branch v1.1 https://github.com/google/bloaty bloaty-src cd bloaty-src - mkdir -p $prebuilt/bloaty - cmake -DCMAKE_SYSTEM_PREFIX_PATH=$prebuilt/bloaty + mkdir -p "${prebuilt}"/bloaty + cmake -DCMAKE_SYSTEM_PREFIX_PATH="${prebuilt}"/bloaty make install -j 6 - cd $prebuilt + cd "${prebuilt}" rm -rf bloaty-src fi } function arm-gcc-toolchain { - add_path $prebuilt/gcc-arm-none-eabi/bin + add_path "${prebuilt}"/gcc-arm-none-eabi/bin - if [ ! -f "$prebuilt/gcc-arm-none-eabi/bin/arm-none-eabi-gcc" ]; then + if [ ! -f "${prebuilt}/gcc-arm-none-eabi/bin/arm-none-eabi-gcc" ]; then local flavor - case $os in + case ${os} in Darwin) flavor=mac ;; @@ -158,7 +163,7 @@ function arm-gcc-toolchain { flavor=x86_64-linux ;; esac - cd $prebuilt + cd "${prebuilt}" wget --quiet https://developer.arm.com/-/media/Files/downloads/gnu-rm/9-2019q4/RC2.1/gcc-arm-none-eabi-9-2019-q4-major-${flavor}.tar.bz2 tar jxf gcc-arm-none-eabi-9-2019-q4-major-${flavor}.tar.bz2 mv gcc-arm-none-eabi-9-2019-q4-major gcc-arm-none-eabi @@ -168,21 +173,21 @@ function arm-gcc-toolchain { } function mips-gcc-toolchain { - add_path $prebuilt/pinguino-compilers/linux64/p32/bin + add_path "${prebuilt}"/pinguino-compilers/linux64/p32/bin - if [ ! -f "$prebuilt/pinguino-compilers/linux64/p32/bin/p32-gcc" ]; then - cd $prebuilt + if [ ! -f "${prebuilt}/pinguino-compilers/linux64/p32/bin/p32-gcc" ]; then + cd "${prebuilt}" git clone https://github.com/PinguinoIDE/pinguino-compilers fi p32-gcc --version } function riscv-gcc-toolchain { - add_path $prebuilt/riscv64-unknown-elf-gcc/bin + add_path "${prebuilt}"/riscv64-unknown-elf-gcc/bin - if [ ! -f "$prebuilt/riscv64-unknown-elf-gcc/bin/riscv64-unknown-elf-gcc" ]; then + if [ ! -f "${prebuilt}/riscv64-unknown-elf-gcc/bin/riscv64-unknown-elf-gcc" ]; then local flavor - case $os in + case ${os} in Darwin) flavor=x86_64-apple-darwin ;; @@ -190,7 +195,7 @@ function riscv-gcc-toolchain { flavor=x86_64-linux-ubuntu14 ;; esac - cd $prebuilt + cd "${prebuilt}" wget --quiet https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-${flavor}.tar.gz tar zxf riscv64-unknown-elf-gcc-8.3.0-2019.08.0-${flavor}.tar.gz mv riscv64-unknown-elf-gcc-8.3.0-2019.08.0-${flavor} riscv64-unknown-elf-gcc @@ -200,21 +205,21 @@ function riscv-gcc-toolchain { } function xtensa-esp32-gcc-toolchain { - add_path $prebuilt/xtensa-esp32-elf/bin + add_path "${prebuilt}"/xtensa-esp32-elf/bin - if [ ! -f "$prebuilt/xtensa-esp32-elf/bin/xtensa-esp32-elf-gcc" ]; then - cd $prebuilt - case $os in + if [ ! -f "${prebuilt}/xtensa-esp32-elf/bin/xtensa-esp32-elf-gcc" ]; then + cd "${prebuilt}" + case ${os} in Darwin) - wget --quiet https://dl.espressif.com/dl/xtensa-esp32-elf-gcc8_2_0-esp-2019r2-macos.tar.gz - tar xzf xtensa-esp32-elf-gcc8_2_0-esp-2019r2-macos.tar.gz - rm xtensa-esp32-elf-gcc8_2_0-esp-2019r2-macos.tar.gz + wget --quiet https://dl.espressif.com/dl/xtensa-esp32-elf-gcc8_4_0-esp-2021r1-macos.tar.gz + tar xzf xtensa-esp32-elf-gcc8_4_0-esp-2021r1-macos.tar.gz + rm xtensa-esp32-elf-gcc8_4_0-esp-2021r1-macos.tar.gz ;; Linux) - wget --quiet https://dl.espressif.com/dl/xtensa-esp32-elf-gcc8_2_0-esp32-2019r1-rc2-linux-amd64.tar.xz - xz -d xtensa-esp32-elf-gcc8_2_0-esp32-2019r1-rc2-linux-amd64.tar.xz - tar xf xtensa-esp32-elf-gcc8_2_0-esp32-2019r1-rc2-linux-amd64.tar - rm xtensa-esp32-elf-gcc8_2_0-esp32-2019r1-rc2-linux-amd64.tar + wget --quiet https://dl.espressif.com/dl/xtensa-esp32-elf-gcc8_4_0-esp32-2021r1-linux-amd64.tar.xz + xz -d xtensa-esp32-elf-gcc8_4_0-esp32-2021r1-linux-amd64.tar.xz + tar xf xtensa-esp32-elf-gcc8_4_0-esp32-2021r1-linux-amd64.tar + rm xtensa-esp32-elf-gcc8_4_0-esp32-2021r1-linux-amd64.tar ;; esac fi @@ -223,8 +228,8 @@ function xtensa-esp32-gcc-toolchain { } function avr-gcc-toolchain { - if ! type avr-gcc > /dev/null; then - case $os in + if ! type avr-gcc &> /dev/null; then + case ${os} in Darwin) brew tap osx-cross/avr brew install avr-gcc @@ -234,14 +239,14 @@ function avr-gcc-toolchain { } function rx-gcc-toolchain { - add_path $prebuilt/renesas-toolchain/rx-elf-gcc/bin + add_path "${prebuilt}"/renesas-toolchain/rx-elf-gcc/bin - if [ ! -f "$prebuilt/renesas-toolchain/rx-elf-gcc/bin/rx-elf-gcc" ]; then - case $os in + if [ ! -f "${prebuilt}/renesas-toolchain/rx-elf-gcc/bin/rx-elf-gcc" ]; then + case ${os} in Linux) # Download toolchain source code # RX toolchain is built from source code. Once prebuilt RX toolchain is made available, the below code snippet can be removed. - mkdir -p $prebuilt/renesas-tools/rx/source; cd $prebuilt/renesas-tools/rx/source + mkdir -p "${prebuilt}"/renesas-tools/rx/source; cd "${prebuilt}"/renesas-tools/rx/source wget --quiet https://gcc-renesas.com/downloads/d.php?f=rx/binutils/4.8.4.201803-gnurx/rx_binutils2.24_2018Q3.tar.gz \ -O rx_binutils2.24_2018Q3.tar.gz tar zxf rx_binutils2.24_2018Q3.tar.gz @@ -253,30 +258,30 @@ function rx-gcc-toolchain { tar zxf rx_newlib2.2.0_2018Q3.tar.gz # Install binutils - cd $prebuilt/renesas-tools/rx/source/binutils; chmod +x ./configure ./mkinstalldirs - mkdir -p $prebuilt/renesas-tools/rx/build/binutils; cd $prebuilt/renesas-tools/rx/build/binutils - $prebuilt/renesas-tools/rx/source/binutils/configure --target=rx-elf --prefix=$prebuilt/renesas-toolchain/rx-elf-gcc \ + cd "${prebuilt}"/renesas-tools/rx/source/binutils; chmod +x ./configure ./mkinstalldirs + mkdir -p "${prebuilt}"/renesas-tools/rx/build/binutils; cd "${prebuilt}"/renesas-tools/rx/build/binutils + "${prebuilt}"/renesas-tools/rx/source/binutils/configure --target=rx-elf --prefix="${prebuilt}"/renesas-toolchain/rx-elf-gcc \ --disable-werror make; make install # Install gcc - cd $prebuilt/renesas-tools/rx/source/gcc + cd "${prebuilt}"/renesas-tools/rx/source/gcc chmod +x ./contrib/download_prerequisites ./configure ./move-if-change ./libgcc/mkheader.sh ./contrib/download_prerequisites sed -i '1s/^/@documentencoding ISO-8859-1\n/' ./gcc/doc/gcc.texi sed -i 's/@tex/\n&/g' ./gcc/doc/gcc.texi && sed -i 's/@end tex/\n&/g' ./gcc/doc/gcc.texi - mkdir -p $prebuilt/renesas-tools/rx/build/gcc; cd $prebuilt/renesas-tools/rx/build/gcc - $prebuilt/renesas-tools/rx/source/gcc/configure --target=rx-elf --prefix=$prebuilt/renesas-toolchain/rx-elf-gcc \ + mkdir -p "${prebuilt}"/renesas-tools/rx/build/gcc; cd "${prebuilt}"/renesas-tools/rx/build/gcc + "${prebuilt}"/renesas-tools/rx/source/gcc/configure --target=rx-elf --prefix="${prebuilt}"/renesas-toolchain/rx-elf-gcc \ --disable-shared --disable-multilib --disable-libssp --disable-libstdcxx-pch --disable-werror --enable-lto \ --enable-gold --with-pkgversion=GCC_Build_1.02 --with-newlib --enable-languages=c make; make install # Install newlib - cd $prebuilt/renesas-tools/rx/source/newlib; chmod +x ./configure - mkdir -p $prebuilt/renesas-tools/rx/build/newlib; cd $prebuilt/renesas-tools/rx/build/newlib - $prebuilt/renesas-tools/rx/source/newlib/configure --target=rx-elf --prefix=$prebuilt/renesas-toolchain/rx-elf-gcc + cd "${prebuilt}"/renesas-tools/rx/source/newlib; chmod +x ./configure + mkdir -p "${prebuilt}"/renesas-tools/rx/build/newlib; cd "${prebuilt}"/renesas-tools/rx/build/newlib + "${prebuilt}"/renesas-tools/rx/source/newlib/configure --target=rx-elf --prefix="${prebuilt}"/renesas-toolchain/rx-elf-gcc make; make install - rm -rf $prebuilt/renesas-tools/ + rm -rf "${prebuilt}"/renesas-tools/ ;; esac fi @@ -284,55 +289,55 @@ function rx-gcc-toolchain { } function c-cache { - add_path $prebuilt/ccache/bin + add_path "${prebuilt}"/ccache/bin - if ! type ccache > /dev/null; then - case $os in + if ! type ccache &> /dev/null; then + case ${os} in Darwin) brew install ccache ;; Linux) - cd $prebuilt; + cd "${prebuilt}"; wget https://github.com/ccache/ccache/releases/download/v3.7.7/ccache-3.7.7.tar.gz tar zxf ccache-3.7.7.tar.gz - cd ccache-3.7.7; ./configure --prefix=$prebuilt/ccache; make; make install - cd $prebuilt; rm -rf ccache-3.7.7; rm ccache-3.7.7.tar.gz + cd ccache-3.7.7; ./configure --prefix="${prebuilt}"/ccache; make; make install + cd "${prebuilt}"; rm -rf ccache-3.7.7; rm ccache-3.7.7.tar.gz ;; esac fi ccache --version - mkdir -p $prebuilt/ccache/bin/ - ln -sf `which ccache` $prebuilt/ccache/bin/x86_64-elf-gcc - ln -sf `which ccache` $prebuilt/ccache/bin/x86_64-elf-g++ - ln -sf `which ccache` $prebuilt/ccache/bin/cc - ln -sf `which ccache` $prebuilt/ccache/bin/c++ - ln -sf `which ccache` $prebuilt/ccache/bin/clang - ln -sf `which ccache` $prebuilt/ccache/bin/clang++ - ln -sf `which ccache` $prebuilt/ccache/bin/gcc - ln -sf `which ccache` $prebuilt/ccache/bin/g++ - ln -sf `which ccache` $prebuilt/ccache/bin/arm-none-eabi-gcc - ln -sf `which ccache` $prebuilt/ccache/bin/arm-none-eabi-g++ - ln -sf `which ccache` $prebuilt/ccache/bin/p32-gcc - ln -sf `which ccache` $prebuilt/ccache/bin/riscv64-unknown-elf-gcc - ln -sf `which ccache` $prebuilt/ccache/bin/riscv64-unknown-elf-g++ - ln -sf `which ccache` $prebuilt/ccache/bin/xtensa-esp32-elf-gcc - ln -sf `which ccache` $prebuilt/ccache/bin/avr-gcc - ln -sf `which ccache` $prebuilt/ccache/bin/avr-g++ + mkdir -p "${prebuilt}"/ccache/bin/ + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/x86_64-elf-gcc + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/x86_64-elf-g++ + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/cc + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/c++ + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/clang + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/clang++ + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/gcc + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/g++ + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/arm-none-eabi-gcc + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/arm-none-eabi-g++ + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/p32-gcc + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/riscv64-unknown-elf-gcc + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/riscv64-unknown-elf-g++ + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/xtensa-esp32-elf-gcc + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/avr-gcc + ln -sf "$(which ccache)" "${prebuilt}"/ccache/bin/avr-g++ } function binutils { - mkdir -p $prebuilt/bintools/bin - add_path $prebuilt/bintools/bin + mkdir -p "${prebuilt}"/bintools/bin + add_path "${prebuilt}"/bintools/bin - if ! type objcopy > /dev/null; then - case $os in + if ! type objcopy &> /dev/null; then + case ${os} in Darwin) brew install binutils # It is possible we cached prebuilt but did brew install so recreate # simlink if it exists - rm -f $prebuilt/bintools/bin/objcopy - ln -s /usr/local/opt/binutils/bin/objcopy $prebuilt/bintools/bin/objcopy + rm -f "${prebuilt}"/bintools/bin/objcopy + ln -s /usr/local/opt/binutils/bin/objcopy "${prebuilt}"/bintools/bin/objcopy ;; esac fi @@ -363,19 +368,19 @@ function enable_ccache { function setup_repos { pushd . - if [ -d "$nuttx" ]; then - cd $nuttx; git pull + if [ -d "${nuttx}" ]; then + cd "${nuttx}"; git pull else - git clone https://github.com/apache/incubator-nuttx.git $nuttx - cd $nuttx + git clone https://github.com/apache/incubator-nuttx.git "${nuttx}" + cd "${nuttx}" fi git log -1 - if [ -d "$apps" ]; then - cd $apps; git pull + if [ -d "${apps}" ]; then + cd "${apps}"; git pull else - git clone https://github.com/apache/incubator-nuttx-apps.git $apps - cd $apps + git clone https://github.com/apache/incubator-nuttx-apps.git "${apps}" + cd "${apps}" fi git log -1 popd @@ -383,30 +388,30 @@ function setup_repos { function install_tools { pushd . - for func in $install; do - $func + for func in ${install}; do + ${func} done popd - echo PATH=$EXTRA_PATH\$PATH > $prebuilt/env.sh + echo PATH="${EXTRA_PATH}"/"${PATH}" > "${prebuilt}"/env.sh } function run_builds { local ncpus - case $os in + case ${os} in Darwin) ncpus=$(sysctl -n hw.ncpu) ;; Linux) - ncpus=`grep -c ^processor /proc/cpuinfo` + ncpus=$(grep -c ^processor /proc/cpuinfo) ;; esac - options+="-j $ncpus" + options+="-j ${ncpus}" - for build in $builds; do - $nuttx/tools/testbuild.sh $options -e "-Wno-cpp -Werror" $build + for build in "${builds[@]}"; do + "${nuttx}"/tools/testbuild.sh ${options} -e "-Wno-cpp -Werror" "${build}" done } @@ -414,7 +419,7 @@ if [ -z "$1" ]; then usage fi -while [ ! -z "$1" ]; do +while [ -n "$1" ]; do case "$1" in -h ) usage @@ -432,7 +437,7 @@ while [ ! -z "$1" ]; do options+="$1 " ;; * ) - builds=$@ + builds=( "$@" ) break ;; esac diff --git a/tools/ci/docker/linux/Dockerfile b/tools/ci/docker/linux/Dockerfile index c534bfbf748..ebe48b47cf9 100644 --- a/tools/ci/docker/linux/Dockerfile +++ b/tools/ci/docker/linux/Dockerfile @@ -103,11 +103,11 @@ RUN mkdir riscv64-unknown-elf-gcc && \ FROM nuttx-toolchain-base AS nuttx-toolchain-esp32 # Download the latest ESP32 GCC toolchain prebuilt by Espressif RUN mkdir -p xtensa-esp32-elf-gcc && \ - curl -s -L "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32-elf-gcc8_4_0-esp-2020r3-linux-amd64.tar.gz" \ + curl -s -L "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32-elf-gcc8_4_0-esp-2021r1-linux-amd64.tar.gz" \ | tar -C xtensa-esp32-elf-gcc --strip-components 1 -xz RUN mkdir -p xtensa-esp32s2-elf-gcc && \ - curl -s -L "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32s2-elf-gcc8_4_0-esp-2020r3-linux-amd64.tar.gz" \ + curl -s -L "https://github.com/espressif/crosstool-NG/releases/download/esp-2021r1/xtensa-esp32s2-elf-gcc8_4_0-esp-2021r1-linux-amd64.tar.gz" \ | tar -C xtensa-esp32s2-elf-gcc --strip-components 1 -xz RUN echo "ESP Binaries: 2021/06/01" @@ -269,6 +269,9 @@ RUN pip3 install esptool COPY --from=nuttx-toolchain-renesas /tools/renesas-toolchain/rx-elf-gcc/ renesas-toolchain/rx-elf-gcc/ ENV PATH="/tools/renesas-toolchain/rx-elf-gcc/bin:$PATH" +# MCUboot's tool for image signing and key management +RUN pip3 install imgtool + # Configure ccache RUN mkdir -p /tools/ccache/bin && \ ln -sf `which ccache` /tools/ccache/bin/cc && \ diff --git a/tools/ci/testlist/sim-01.dat b/tools/ci/testlist/sim-01.dat index bb9292aa66d..21fc19b86ef 100644 --- a/tools/ci/testlist/sim-01.dat +++ b/tools/ci/testlist/sim-01.dat @@ -8,6 +8,7 @@ # Do not build Linux configs -Darwin,sim:linuxi2c +-Darwin,sim:linuxspi # macOS doesn't support 32bit(CONFIG_SIM_M32=y) anymore -Darwin,sim:elf diff --git a/tools/cxd56/clefia.c b/tools/cxd56/clefia.c index 6eeb64b12a1..2a2f81c2d6d 100644 --- a/tools/cxd56/clefia.c +++ b/tools/cxd56/clefia.c @@ -1,34 +1,21 @@ /**************************************************************************** * tools/cxd56/clefia.c * - * Copyright (C) 2007, 2008 Sony Corporation + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. ****************************************************************************/ /**************************************************************************** diff --git a/tools/cxd56/clefia.h b/tools/cxd56/clefia.h index 447b0ccc5a6..49163dc9aaf 100644 --- a/tools/cxd56/clefia.h +++ b/tools/cxd56/clefia.h @@ -1,34 +1,21 @@ /**************************************************************************** * tools/cxd56/clefia.h * - * Copyright (C) 2007, 2008 Sony Corporation + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. ****************************************************************************/ #ifndef _TOOLS_CXD56_CLEFIA_H_ diff --git a/tools/cxd56/mkspk.c b/tools/cxd56/mkspk.c index e00eedc03cb..8878a699a10 100644 --- a/tools/cxd56/mkspk.c +++ b/tools/cxd56/mkspk.c @@ -1,34 +1,21 @@ /**************************************************************************** * tools/cxd56/mkspk.c * - * Copyright (C) 2007, 2008 Sony Corporation + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. ****************************************************************************/ /**************************************************************************** diff --git a/tools/cxd56/mkspk.h b/tools/cxd56/mkspk.h index 2d8743c7204..142564c5c27 100644 --- a/tools/cxd56/mkspk.h +++ b/tools/cxd56/mkspk.h @@ -1,34 +1,21 @@ /**************************************************************************** * tools/cxd56/mkspk.h * - * Copyright (C) 2007, 2008 Sony Corporation + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. ****************************************************************************/ /**************************************************************************** diff --git a/tools/esp32/Config.mk b/tools/esp32/Config.mk index d814505ea34..760577835be 100644 --- a/tools/esp32/Config.mk +++ b/tools/esp32/Config.mk @@ -52,32 +52,108 @@ else ifeq ($(CONFIG_ESP32_FLASH_FREQ_20M),y) FLASH_FREQ := 20m endif -ESPTOOL_ELF2IMG_OPTS := -fs $(FLASH_SIZE) -fm $(FLASH_MODE) -ff $(FLASH_FREQ) - ifeq ($(CONFIG_ESP32_FLASH_DETECT),y) ESPTOOL_WRITEFLASH_OPTS := -fs detect -fm dio -ff $(FLASH_FREQ) else ESPTOOL_WRITEFLASH_OPTS := -fs $(FLASH_SIZE) -fm dio -ff $(FLASH_FREQ) endif +ESPTOOL_FLASH_OPTS := -fs $(FLASH_SIZE) -fm $(FLASH_MODE) -ff $(FLASH_FREQ) + +# Configure the variables according to build environment + ifdef ESPTOOL_BINDIR - BL_OFFSET=0x1000 - PT_OFFSET=0x8000 - BOOTLOADER=$(ESPTOOL_BINDIR)/bootloader-esp32.bin - PARTITION_TABLE=$(ESPTOOL_BINDIR)/partition-table-esp32.bin - FLASH_BL=$(BL_OFFSET) $(BOOTLOADER) - FLASH_PT=$(PT_OFFSET) $(PARTITION_TABLE) + ifeq ($(CONFIG_ESP32_APP_FORMAT_LEGACY),y) + BL_OFFSET := 0x1000 + PT_OFFSET := 0x8000 + APP_OFFSET := 0x10000 + BOOTLOADER := $(ESPTOOL_BINDIR)/bootloader-esp32.bin + PARTITION_TABLE := $(ESPTOOL_BINDIR)/partition-table-esp32.bin + APP_IMAGE := nuttx.bin + FLASH_BL := $(BL_OFFSET) $(BOOTLOADER) + FLASH_PT := $(PT_OFFSET) $(PARTITION_TABLE) + ESPTOOL_BINS := $(FLASH_BL) $(FLASH_PT) + else ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) + BL_OFFSET := 0x1000 + BOOTLOADER := $(ESPTOOL_BINDIR)/mcuboot-esp32.bin + FLASH_BL := $(BL_OFFSET) $(BOOTLOADER) + ESPTOOL_BINS := $(FLASH_BL) + endif endif +ifeq ($(CONFIG_ESP32_APP_FORMAT_LEGACY),y) + APP_OFFSET := 0x10000 + APP_IMAGE := nuttx.bin + FLASH_APP := $(APP_OFFSET) $(APP_IMAGE) +else ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) + ifeq ($(CONFIG_ESP32_ESPTOOL_TARGET_PRIMARY),y) + VERIFIED := --confirm + APP_OFFSET := $(CONFIG_ESP32_OTA_PRIMARY_SLOT_OFFSET) + else ifeq ($(CONFIG_ESP32_ESPTOOL_TARGET_SECONDARY),y) + VERIFIED := + APP_OFFSET := $(CONFIG_ESP32_OTA_SECONDARY_SLOT_OFFSET) + endif + + APP_IMAGE := nuttx.signed.bin + FLASH_APP := $(APP_OFFSET) $(APP_IMAGE) +endif + +ESPTOOL_BINS += $(FLASH_APP) + ifeq ($(CONFIG_ESP32_QEMU_IMAGE),y) MK_QEMU_IMG=$(TOPDIR)/tools/esp32/mk_qemu_img.sh -b $(BOOTLOADER) -p $(PARTITION_TABLE) else MK_QEMU_IMG= endif -# POSTBUILD -- Perform post build operations +# MERGEBIN -- Merge raw binary files into a single file -define POSTBUILD +ifeq ($(CONFIG_ESP32_MERGE_BINS),y) +define MERGEBIN + $(Q) if [ -z $(ESPTOOL_BINDIR) ]; then \ + echo "MERGEBIN error: Missing argument for binary files directory."; \ + echo "USAGE: make ESPTOOL_BINDIR="; \ + exit 1; \ + fi + $(Q) if [ -z $(FLASH_SIZE) ]; then \ + echo "Missing Flash memory size configuration for the ESP32 chip."; \ + exit 1; \ + fi + esptool.py -c esp32 merge_bin --output nuttx.merged.bin $(ESPTOOL_FLASH_OPTS) $(ESPTOOL_BINS) + $(Q) echo nuttx.merged.bin >> nuttx.manifest + $(Q) echo "Generated: nuttx.merged.bin" +endef +else +define MERGEBIN + +endef +endif + +# SIGNBIN -- Sign the binary image file + +ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) +define SIGNBIN + $(Q) echo "MKIMAGE: ESP32 binary" + $(Q) if ! imgtool version 1>/dev/null 2>&1; then \ + echo ""; \ + echo "imgtool not found. Please run: \"pip install imgtool\""; \ + echo ""; \ + echo "Run make again to create the nuttx.signed.bin image."; \ + exit 1; \ + fi + imgtool sign --pad --pad-sig $(VERIFIED) --align 4 -v 0 \ + -H $(CONFIG_ESP32_APP_MCUBOOT_HEADER_SIZE) --pad-header \ + -S $(CONFIG_ESP32_OTA_SLOT_SIZE) \ + nuttx.bin nuttx.signed.bin + $(Q) echo nuttx.signed.bin >> nuttx.manifest + $(Q) echo "Generated: nuttx.signed.bin (MCUboot compatible)" +endef +endif + +# ELF2IMAGE -- Convert an ELF file into a binary file in Espressif application image format + +ifeq ($(CONFIG_ESP32_APP_FORMAT_LEGACY),y) +define ELF2IMAGE $(Q) echo "MKIMAGE: ESP32 binary" $(Q) if ! esptool.py version 1>/dev/null 2>&1; then \ echo ""; \ @@ -90,10 +166,25 @@ define POSTBUILD echo "Missing Flash memory size configuration for the ESP32 chip."; \ exit 1; \ fi - esptool.py -c esp32 elf2image $(ESPTOOL_ELF2IMG_OPTS) -o nuttx.bin nuttx + esptool.py -c esp32 elf2image $(ESPTOOL_FLASH_OPTS) -o nuttx.bin nuttx $(Q) echo "Generated: nuttx.bin (ESP32 compatible)" +endef +endif + +# POSTBUILD -- Perform post build operations + +ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y) +define POSTBUILD + $(call SIGNBIN) + $(call MERGEBIN) +endef +else ifeq ($(CONFIG_ESP32_APP_FORMAT_LEGACY),y) +define POSTBUILD + $(call ELF2IMAGE) + $(call MERGEBIN) $(Q) $(MK_QEMU_IMG) endef +endif # ESPTOOL_BAUD -- Serial port baud rate used when flashing/reading via esptool.py @@ -102,9 +193,6 @@ ESPTOOL_BAUD ?= 921600 # DOWNLOAD -- Download binary image via esptool.py define DOWNLOAD - - $(eval ESPTOOL_BINS := $(FLASH_BL) $(FLASH_PT) 0x10000 $(1).bin) - $(Q) if [ -z $(ESPTOOL_PORT) ]; then \ echo "DOWNLOAD error: Missing serial port device argument."; \ echo "USAGE: make download ESPTOOL_PORT= [ ESPTOOL_BAUD= ] [ ESPTOOL_BINDIR= ]"; \ diff --git a/tools/esp32/backtrace.gdbscript b/tools/esp32/backtrace.gdbscript index 5f825eee75c..79993ce4922 100644 --- a/tools/esp32/backtrace.gdbscript +++ b/tools/esp32/backtrace.gdbscript @@ -103,3 +103,30 @@ define esp32_bt set $x_a1 = $next_a1 end end + +# Usage: +# +# (gdb) esp32_bt_pid + +define esp32_bt_pid + set $_pid = $arg0 + set $_tcb = g_pidhash[$_pid].tcb + if ($_tcb->pid == $_pid) + set $_regs = $_tcb->xcp.regs + printf "PID %d NAME %s\n", $_pid, $_tcb.name + esp32_bt $_regs[0] $_regs[2] $_regs[3] + end +end + +# Usage: +# +# (gdb) esp32_bt_all + +define esp32_bt_all + set $_max_pid = g_npidhash + set $_i = 0 + while ($_i < $_max_pid) + esp32_bt_pid $_i + set $_i = $_i + 1 + end +end diff --git a/tools/esp32c3/Config.mk b/tools/esp32c3/Config.mk index 9952f702a95..440becbd5d5 100644 --- a/tools/esp32c3/Config.mk +++ b/tools/esp32c3/Config.mk @@ -52,26 +52,29 @@ else ifeq ($(CONFIG_ESP32C3_FLASH_FREQ_20M),y) FLASH_FREQ := 20m endif -ESPTOOL_ELF2IMG_OPTS := -fs $(FLASH_SIZE) -fm $(FLASH_MODE) -ff $(FLASH_FREQ) - ifeq ($(CONFIG_ESP32C3_FLASH_DETECT),y) ESPTOOL_WRITEFLASH_OPTS := -fs detect -fm dio -ff $(FLASH_FREQ) else ESPTOOL_WRITEFLASH_OPTS := -fs $(FLASH_SIZE) -fm dio -ff $(FLASH_FREQ) endif +ESPTOOL_FLASH_OPTS := -fs $(FLASH_SIZE) -fm $(FLASH_MODE) -ff $(FLASH_FREQ) + ifdef ESPTOOL_BINDIR - BL_OFFSET := 0x0 - PT_OFFSET := 0x8000 - BOOTLOADER := $(ESPTOOL_BINDIR)/bootloader-esp32c3.bin + BL_OFFSET := 0x0 + PT_OFFSET := 0x8000 + BOOTLOADER := $(ESPTOOL_BINDIR)/bootloader-esp32c3.bin PARTITION_TABLE := $(ESPTOOL_BINDIR)/partition-table-esp32c3.bin - FLASH_BL := $(BL_OFFSET) $(BOOTLOADER) - FLASH_PT := $(PT_OFFSET) $(PARTITION_TABLE) + FLASH_BL := $(BL_OFFSET) $(BOOTLOADER) + FLASH_PT := $(PT_OFFSET) $(PARTITION_TABLE) + ESPTOOL_BINS := $(FLASH_BL) $(FLASH_PT) endif -# POSTBUILD -- Perform post build operations +ESPTOOL_BINS += 0x10000 nuttx.bin -define POSTBUILD +# ELF2IMAGE -- Convert an ELF file into a binary file in Espressif application image format + +define ELF2IMAGE $(Q) echo "MKIMAGE: ESP32-C3 binary" $(Q) if ! esptool.py version 1>/dev/null 2>&1; then \ echo ""; \ @@ -84,10 +87,40 @@ define POSTBUILD echo "Missing Flash memory size configuration for the ESP32-C3 chip."; \ exit 1; \ fi - esptool.py -c esp32c3 elf2image $(ESPTOOL_ELF2IMG_OPTS) -o nuttx.bin nuttx + esptool.py -c esp32c3 elf2image $(ESPTOOL_FLASH_OPTS) -o nuttx.bin nuttx $(Q) echo "Generated: nuttx.bin (ESP32-C3 compatible)" endef +# MERGEBIN -- Merge raw binary files into a single file + +ifeq ($(CONFIG_ESP32C3_MERGE_BINS),y) +define MERGEBIN + $(Q) if [ -z $(ESPTOOL_BINDIR) ]; then \ + echo "MERGEBIN error: Missing argument for binary files directory."; \ + echo "USAGE: make ESPTOOL_BINDIR="; \ + exit 1; \ + fi + $(Q) if [ -z $(FLASH_SIZE) ]; then \ + echo "Missing Flash memory size configuration for the ESP32-C3 chip."; \ + exit 1; \ + fi + esptool.py -c esp32c3 merge_bin --output nuttx.merged.bin $(ESPTOOL_FLASH_OPTS) $(ESPTOOL_BINS) + $(Q) echo nuttx.merged.bin >> nuttx.manifest + $(Q) echo "Generated: nuttx.merged.bin" +endef +else +define MERGEBIN + +endef +endif + +# POSTBUILD -- Perform post build operations + +define POSTBUILD + $(call ELF2IMAGE) + $(call MERGEBIN) +endef + # ESPTOOL_BAUD -- Serial port baud rate used when flashing/reading via esptool.py ESPTOOL_BAUD ?= 921600 @@ -95,9 +128,6 @@ ESPTOOL_BAUD ?= 921600 # DOWNLOAD -- Download binary image via esptool.py define DOWNLOAD - - $(eval ESPTOOL_BINS := $(FLASH_BL) $(FLASH_PT) 0x10000 $(1).bin) - $(Q) if [ -z $(ESPTOOL_PORT) ]; then \ echo "DOWNLOAD error: Missing serial port device argument."; \ echo "USAGE: make download ESPTOOL_PORT= [ ESPTOOL_BAUD= ]"; \ diff --git a/tools/esp32s2/Config.mk b/tools/esp32s2/Config.mk index 54f9d7670b2..51d38f256d9 100644 --- a/tools/esp32s2/Config.mk +++ b/tools/esp32s2/Config.mk @@ -52,27 +52,30 @@ else ifeq ($(CONFIG_ESP32S2_FLASH_FREQ_20M),y) FLASH_FREQ := 20m endif -ESPTOOL_ELF2IMG_OPTS := -fs $(FLASH_SIZE) -fm $(FLASH_MODE) -ff $(FLASH_FREQ) - ifeq ($(CONFIG_ESP32S2_FLASH_DETECT),y) ESPTOOL_WRITEFLASH_OPTS := -fs detect -fm dio -ff $(FLASH_FREQ) else ESPTOOL_WRITEFLASH_OPTS := -fs $(FLASH_SIZE) -fm dio -ff $(FLASH_FREQ) endif +ESPTOOL_FLASH_OPTS := -fs $(FLASH_SIZE) -fm $(FLASH_MODE) -ff $(FLASH_FREQ) + ifdef ESPTOOL_BINDIR - BL_OFFSET=0x1000 - PT_OFFSET=0x8000 - BOOTLOADER=$(ESPTOOL_BINDIR)/bootloader-esp32s2.bin - PARTITION_TABLE=$(ESPTOOL_BINDIR)/partition-table-esp32s2.bin - FLASH_BL=$(BL_OFFSET) $(BOOTLOADER) - FLASH_PT=$(PT_OFFSET) $(PARTITION_TABLE) + BL_OFFSET := 0x1000 + PT_OFFSET := 0x8000 + BOOTLOADER := $(ESPTOOL_BINDIR)/bootloader-esp32s2.bin + PARTITION_TABLE := $(ESPTOOL_BINDIR)/partition-table-esp32s2.bin + FLASH_BL := $(BL_OFFSET) $(BOOTLOADER) + FLASH_PT := $(PT_OFFSET) $(PARTITION_TABLE) + ESPTOOL_BINS := $(FLASH_BL) $(FLASH_PT) endif -# POSTBUILD -- Perform post build operations +ESPTOOL_BINS += 0x10000 nuttx.bin -define POSTBUILD - $(Q) echo "MKIMAGE: ESP32S2 binary" +# ELF2IMAGE -- Convert an ELF file into a binary file in Espressif application image format + +define ELF2IMAGE + $(Q) echo "MKIMAGE: ESP32-S2 binary" $(Q) if ! esptool.py version 1>/dev/null 2>&1; then \ echo ""; \ echo "esptool.py not found. Please run: \"pip install esptool\""; \ @@ -81,11 +84,41 @@ define POSTBUILD exit 1; \ fi $(Q) if [ -z $(FLASH_SIZE) ]; then \ - echo "Missing Flash memory size configuration for the ESP32S2 chip."; \ + echo "Missing Flash memory size configuration for the ESP32-S2 chip."; \ exit 1; \ fi - esptool.py -c esp32-s2 elf2image $(ESPTOOL_ELF2IMG_OPTS) -o nuttx.bin nuttx - $(Q) echo "Generated: nuttx.bin (ESP32S2 compatible)" + esptool.py -c esp32s2 elf2image $(ESPTOOL_FLASH_OPTS) -o nuttx.bin nuttx + $(Q) echo "Generated: nuttx.bin (ESP32-S2 compatible)" +endef + +# MERGEBIN -- Merge raw binary files into a single file + +ifeq ($(CONFIG_ESP32S2_MERGE_BINS),y) +define MERGEBIN + $(Q) if [ -z $(ESPTOOL_BINDIR) ]; then \ + echo "MERGEBIN error: Missing argument for binary files directory."; \ + echo "USAGE: make ESPTOOL_BINDIR="; \ + exit 1; \ + fi + $(Q) if [ -z $(FLASH_SIZE) ]; then \ + echo "Missing Flash memory size configuration for the ESP32-S2 chip."; \ + exit 1; \ + fi + esptool.py -c esp32s2 merge_bin --output nuttx.merged.bin $(ESPTOOL_FLASH_OPTS) $(ESPTOOL_BINS) + $(Q) echo nuttx.merged.bin >> nuttx.manifest + $(Q) echo "Generated: nuttx.merged.bin" +endef +else +define MERGEBIN + +endef +endif + +# POSTBUILD -- Perform post build operations + +define POSTBUILD + $(call ELF2IMAGE) + $(call MERGEBIN) endef # ESPTOOL_BAUD -- Serial port baud rate used when flashing/reading via esptool.py @@ -95,13 +128,10 @@ ESPTOOL_BAUD ?= 921600 # DOWNLOAD -- Download binary image via esptool.py define DOWNLOAD - - $(eval ESPTOOL_BINS := $(FLASH_BL) $(FLASH_PT) 0x10000 $(1).bin) - $(Q) if [ -z $(ESPTOOL_PORT) ]; then \ echo "DOWNLOAD error: Missing serial port device argument."; \ echo "USAGE: make download ESPTOOL_PORT= [ ESPTOOL_BAUD= ] [ ESPTOOL_BINDIR= ]"; \ exit 1; \ fi - esptool.py -c esp32-s2 -p $(ESPTOOL_PORT) -b $(ESPTOOL_BAUD) write_flash $(ESPTOOL_WRITEFLASH_OPTS) $(ESPTOOL_BINS) + esptool.py -c esp32s2 -p $(ESPTOOL_PORT) -b $(ESPTOOL_BAUD) write_flash $(ESPTOOL_WRITEFLASH_OPTS) $(ESPTOOL_BINS) endef diff --git a/tools/mkctags.sh b/tools/mkctags.sh index 55b0b1c5501..5c521bb96c4 100755 --- a/tools/mkctags.sh +++ b/tools/mkctags.sh @@ -1,35 +1,20 @@ #!/usr/bin/env bash # tools/mkctags.sh # -# Copyright (C) 2013 Ken pettit All rights reserved. -# Author: Ken pettit +# Licensed to the Apache Software Foundation (ASF) under one or more +# contributor license agreements. See the NOTICE file distributed with +# this work for additional information regarding copyright ownership. The +# ASF licenses this file to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance with the +# License. You may obtain a copy of the License at # -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: +# http:#www.apache.org/licenses/LICENSE-2.0 # -# 1. Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# 2. Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# 3. Neither the name NuttX nor the names of its contributors may be -# used to endorse or promote products derived from this software -# without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS -# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE -# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, -# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS -# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED -# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN -# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -# POSSIBILITY OF SUCH DAMAGE. +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the +# License for the specific language governing permissions and limitations +# under the License. # WD=`pwd` diff --git a/tools/mkromfsimg.sh b/tools/mkromfsimg.sh index 2092488368f..ccd8163979e 100755 --- a/tools/mkromfsimg.sh +++ b/tools/mkromfsimg.sh @@ -33,7 +33,8 @@ headerfile=nsh_romfsimg.h nofat=$1 usefat=true topdir=$2 -usage="USAGE: $0 [-nofat] " +rcs_fname=$3 +usage="USAGE: $0 [-nofat] []" # Verify if we have the optional "-nofat" @@ -42,6 +43,7 @@ if [ "$nofat" == "-nofat" ]; then usefat=false else topdir=$1 + rcs_fname=$2 fi if [ -z "$topdir" -o ! -d "$topdir" ]; then @@ -50,6 +52,13 @@ if [ -z "$topdir" -o ! -d "$topdir" ]; then exit 1 fi +# Verify if we have the optional "rcs_fname" + +if [ ! -z "$rcs_fname" ]; then + rcstemplate=$rcs_fname + echo "Target template is $rcstemplate" +fi + # Extract all values from the .config in the $topdir that contains all of the NuttX # configuration settings. The .config file was intended to be include-able by makefiles # and source-able by scripts. Unfortunately,there are too many syntactic difference diff --git a/tools/nuttx-gdbinit b/tools/nuttx-gdbinit index fb0b91df8ae..2875fa05dbe 100644 --- a/tools/nuttx-gdbinit +++ b/tools/nuttx-gdbinit @@ -35,10 +35,13 @@ define _examine_arch python if (_target_arch.name() == 'armv7e-m') : \ gdb.execute("set $_target_arch = \"armv7e-m\"") - # TODO: qemu (need to distinguish cortex-m and cortex-a) python if (_target_arch.name() == 'armv7') : \ gdb.execute("set $_target_arch = \"armv7e-m\"") + # TODO: need more smart way to detect armv7-a + python if (type(gdb.lookup_global_symbol("arm_gic_initialize")) is gdb.Symbol) : \ + gdb.execute("set $_target_arch = \"armv7-a\"") + python if (_target_arch.name() == 'i386:x86-64') : \ gdb.execute("set $_target_arch = \"i386:x86-64\"") @@ -61,11 +64,17 @@ define _examine_target end end + if ($_streq($_target_arch, "armv7-a") == 1) + if ($_xcp_nregs != 17) + set $_target_has_fpu = 1 + end + end + python gdb.execute("set $_target_has_smp = 0") python if (type(gdb.lookup_global_symbol("g_assignedtasks")) is gdb.Symbol) : \ gdb.execute("set $_target_has_smp = 1") - set $_target_max_tasks = sizeof(g_pidhash) / sizeof(struct pidhash_s) + set $_target_max_tasks = g_npidhash python if (type(gdb.lookup_global_symbol("up_check_tcbstack")) is gdb.Symbol) : \ gdb.execute("set $_target_has_stack_coloration = 1") @@ -108,6 +117,9 @@ define _save_tcb _examine_target set $tcb = $arg0 + if ($_streq($_target_arch, "armv7-a") == 1) + _save_tcb_armv7-a $tcb + end if ($_streq($_target_arch, "armv7e-m") == 1) if ($_target_has_fpu == 0) _save_tcb_armv7e-m $tcb @@ -149,6 +161,9 @@ define _switch_tcb gdb.newest_frame().select() set $tcb = $arg0 + if ($_streq($_target_arch, "armv7-a") == 1) + _switch_tcb_armv7-a $tcb + end if ($_streq($_target_arch, "armv7e-m") == 1) if ($_target_has_fpu == 0) _switch_tcb_armv7e-m $tcb @@ -167,6 +182,51 @@ define _switch_tcb set $_current_tcb = $tcb end +# see nuttx/arch/arm/include/armv7-a/irq.h +define _save_tcb_armv7-a + set $tcb = (struct tcb_s *)$arg0 + set $tcb.xcp.regs[0] = $r0 + set $tcb.xcp.regs[1] = $r1 + set $tcb.xcp.regs[2] = $r2 + set $tcb.xcp.regs[3] = $r3 + set $tcb.xcp.regs[4] = $r4 + set $tcb.xcp.regs[5] = $r5 + set $tcb.xcp.regs[6] = $r6 + set $tcb.xcp.regs[7] = $r7 + set $tcb.xcp.regs[8] = $r8 + set $tcb.xcp.regs[9] = $r9 + set $tcb.xcp.regs[10] = $r10 + set $tcb.xcp.regs[11] = $r11 + set $tcb.xcp.regs[12] = $r12 + set $tcb.xcp.regs[13] = $r13 + set $tcb.xcp.regs[14] = $r14 + set $tcb.xcp.regs[15] = $r15 + # TODO: xPSR + + set $_pc_reg_idx = 15 +end + +define _switch_tcb_armv7-a + set $tcb = (struct tcb_s *)$arg0 + set $r0 = $tcb.xcp.regs[0] + set $r1 = $tcb.xcp.regs[1] + set $r2 = $tcb.xcp.regs[2] + set $r3 = $tcb.xcp.regs[3] + set $r4 = $tcb.xcp.regs[4] + set $r5 = $tcb.xcp.regs[5] + set $r6 = $tcb.xcp.regs[6] + set $r7 = $tcb.xcp.regs[7] + set $r8 = $tcb.xcp.regs[8] + set $r9 = $tcb.xcp.regs[9] + set $r10 = $tcb.xcp.regs[10] + set $r11 = $tcb.xcp.regs[11] + set $r12 = $tcb.xcp.regs[12] + set $r13 = $tcb.xcp.regs[13] + set $r14 = $tcb.xcp.regs[14] + set $r15 = $tcb.xcp.regs[15] + # TODO: xPSR +end + # see nuttx/arch/arm/include/armv7-m/irq_cmnvector.h define _save_tcb_armv7e-m set $tcb = (struct tcb_s *)$arg0 diff --git a/tools/version.sh b/tools/version.sh index f0e5efbaaa1..4eb987aebab 100755 --- a/tools/version.sh +++ b/tools/version.sh @@ -71,12 +71,12 @@ done OUTFILE=$1 if [ -z ${VERSION} ] ; then - VERSION=`git -C ${WD} describe 2>/dev/null | tail -1 | cut -d'-' -f2` + VERSION=`git -C ${WD} describe --match "nuttx-*" 2>/dev/null | tail -1 | cut -d'-' -f2` # If the VERSION does not match X.Y.Z, retrieve version from the tag if [[ ! ${VERSION} =~ ([0-9]+)\.([0-9]+)\.([0-9]+) ]] ; then - VERSION=`git -C ${WD} tag --sort=v:refname | grep -E "nuttx-[0-9]+\.[0-9]+\.[0-9]+" | tail -1 | cut -d'-' -f2-` + VERSION=`git -C ${WD} -c 'versionsort.suffix=-' tag --sort=v:refname | grep -E "nuttx-[0-9]+\.[0-9]+\.[0-9]+" | tail -1 | cut -d'-' -f2-` fi fi diff --git a/wireless/bluetooth/Kconfig b/wireless/bluetooth/Kconfig index f5bcb7530f4..75087267e6c 100644 --- a/wireless/bluetooth/Kconfig +++ b/wireless/bluetooth/Kconfig @@ -42,6 +42,7 @@ menuconfig WIRELESS_BLUETOOTH bool "Bluetooth LE support" default n + depends on ALLOW_BSD_COMPONENTS select MM_IOB select SCHED_HPWORK select SCHED_LPWORK diff --git a/wireless/bluetooth/bt_att.c b/wireless/bluetooth/bt_att.c index 9e816c3700f..513680958e0 100644 --- a/wireless/bluetooth/bt_att.c +++ b/wireless/bluetooth/bt_att.c @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_att.c - * Attribute protocol handling. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_att.h b/wireless/bluetooth/bt_att.h index 6eb546b5ea3..254f7296e83 100644 --- a/wireless/bluetooth/bt_att.h +++ b/wireless/bluetooth/bt_att.h @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_att.h - * Attribute protocol handling. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_buf.c b/wireless/bluetooth/bt_buf.c index 296fe0dde7b..218742a8f8c 100644 --- a/wireless/bluetooth/bt_buf.c +++ b/wireless/bluetooth/bt_buf.c @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_buf.c - * Bluetooth buffer management - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_buf.h b/wireless/bluetooth/bt_buf.h index 6d2314ad8c6..8477bf717e1 100644 --- a/wireless/bluetooth/bt_buf.h +++ b/wireless/bluetooth/bt_buf.h @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_buf.h - * Bluetooth buffer management. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_conn.c b/wireless/bluetooth/bt_conn.c index 40cd2279076..9c524450336 100644 --- a/wireless/bluetooth/bt_conn.c +++ b/wireless/bluetooth/bt_conn.c @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_conn.c - * Bluetooth connection handling. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_conn.h b/wireless/bluetooth/bt_conn.h index fe30394917d..3a29997b115 100644 --- a/wireless/bluetooth/bt_conn.h +++ b/wireless/bluetooth/bt_conn.h @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_conn.h - * Bluetooth connection handling. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_gatt.c b/wireless/bluetooth/bt_gatt.c index e865d083fbb..5855ce79c56 100644 --- a/wireless/bluetooth/bt_gatt.c +++ b/wireless/bluetooth/bt_gatt.c @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_gatt.c - * Generic Attribute Profile handling. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_hcicore.c b/wireless/bluetooth/bt_hcicore.c index 0ee98e33a88..78e3b7866bb 100644 --- a/wireless/bluetooth/bt_hcicore.c +++ b/wireless/bluetooth/bt_hcicore.c @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_hcicore.c - * HCI core Bluetooth handling. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_hcicore.h b/wireless/bluetooth/bt_hcicore.h index 0b0fdf29259..8bc2047fb84 100644 --- a/wireless/bluetooth/bt_hcicore.h +++ b/wireless/bluetooth/bt_hcicore.h @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_hcicore.h - * HCI core Bluetooth handling. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_keys.c b/wireless/bluetooth/bt_keys.c index 25724bfe9a2..f95c11b0016 100644 --- a/wireless/bluetooth/bt_keys.c +++ b/wireless/bluetooth/bt_keys.c @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_keys.c - * Bluetooth key handling - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_keys.h b/wireless/bluetooth/bt_keys.h index da98c52e179..2eb8c9633b1 100644 --- a/wireless/bluetooth/bt_keys.h +++ b/wireless/bluetooth/bt_keys.h @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_keys.h - * Bluetooth key handling - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_l2cap.c b/wireless/bluetooth/bt_l2cap.c index 99e82419223..a7e4f011a13 100644 --- a/wireless/bluetooth/bt_l2cap.c +++ b/wireless/bluetooth/bt_l2cap.c @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_l2cap.c - * L2CAP handling - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_l2cap.h b/wireless/bluetooth/bt_l2cap.h index 2daeae75e99..35cd1d14bc8 100644 --- a/wireless/bluetooth/bt_l2cap.h +++ b/wireless/bluetooth/bt_l2cap.h @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_l2cap.h - * L2CAP handling - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_smp.c b/wireless/bluetooth/bt_smp.c index 98f1f35fd28..8bade5e1e6a 100644 --- a/wireless/bluetooth/bt_smp.c +++ b/wireless/bluetooth/bt_smp.c @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_smp.c - * Security Manager Protocol implementation. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_smp.h b/wireless/bluetooth/bt_smp.h index 5ec47672a47..151e7196b03 100644 --- a/wireless/bluetooth/bt_smp.h +++ b/wireless/bluetooth/bt_smp.h @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_smp.h - * Security Manager Protocol implementation. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/bluetooth/bt_uuid.c b/wireless/bluetooth/bt_uuid.c index 3821583169b..2ebfcd106be 100644 --- a/wireless/bluetooth/bt_uuid.c +++ b/wireless/bluetooth/bt_uuid.c @@ -1,12 +1,5 @@ /**************************************************************************** * wireless/bluetooth/bt_uuid.c - * Bluetooth UUID handling. - * - * Copyright (C) 2018 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * - * Ported from the Intel/Zephyr arduino101_firmware_source-v1.tar package - * where the code was released with a compatible 3-clause BSD license: * * Copyright (c) 2016, Intel Corporation * All rights reserved. diff --git a/wireless/ieee802154/mac802154.c b/wireless/ieee802154/mac802154.c index 680f346a318..7593ffbc766 100644 --- a/wireless/ieee802154/mac802154.c +++ b/wireless/ieee802154/mac802154.c @@ -1,40 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154.c * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154.h b/wireless/ieee802154/mac802154.h index 1ad71f37bcf..d2881aa7240 100644 --- a/wireless/ieee802154/mac802154.h +++ b/wireless/ieee802154/mac802154.h @@ -1,42 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154.h * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * The naming and comments for various fields are taken directly - * from the IEEE 802.15.4 2011 standard. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_assoc.c b/wireless/ieee802154/mac802154_assoc.c index 384d95d2caf..9520b72eee1 100644 --- a/wireless/ieee802154/mac802154_assoc.c +++ b/wireless/ieee802154/mac802154_assoc.c @@ -1,35 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_assoc.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_assoc.h b/wireless/ieee802154/mac802154_assoc.h index f608e08a79e..2d20e4534b6 100644 --- a/wireless/ieee802154/mac802154_assoc.h +++ b/wireless/ieee802154/mac802154_assoc.h @@ -1,41 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_assoc.h * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Anthony Merlino - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * The naming and comments for various fields are taken directly - * from the IEEE 802.15.4 2011 standard. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_bind.c b/wireless/ieee802154/mac802154_bind.c index 978ff8e41e9..435c9718146 100644 --- a/wireless/ieee802154/mac802154_bind.c +++ b/wireless/ieee802154/mac802154_bind.c @@ -1,38 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_bind.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_data.c b/wireless/ieee802154/mac802154_data.c index efb9b154618..9b7d8c13df3 100644 --- a/wireless/ieee802154/mac802154_data.c +++ b/wireless/ieee802154/mac802154_data.c @@ -1,38 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_data.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_data.h b/wireless/ieee802154/mac802154_data.h index e1d504d7be3..10e5af4b4a1 100644 --- a/wireless/ieee802154/mac802154_data.h +++ b/wireless/ieee802154/mac802154_data.h @@ -1,41 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_data.h * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Anthony Merlino - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * The naming and comments for various fields are taken directly - * from the IEEE 802.15.4 2011 standard. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_device.c b/wireless/ieee802154/mac802154_device.c index f718d3a1831..3b268fffa33 100644 --- a/wireless/ieee802154/mac802154_device.c +++ b/wireless/ieee802154/mac802154_device.c @@ -1,35 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_device.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_disassoc.c b/wireless/ieee802154/mac802154_disassoc.c index 9224deff4cc..38ca98d5fec 100644 --- a/wireless/ieee802154/mac802154_disassoc.c +++ b/wireless/ieee802154/mac802154_disassoc.c @@ -1,40 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_disassoc.c * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_get_mhrlen.c b/wireless/ieee802154/mac802154_get_mhrlen.c index 88b2187fea1..f03ac55244c 100644 --- a/wireless/ieee802154/mac802154_get_mhrlen.c +++ b/wireless/ieee802154/mac802154_get_mhrlen.c @@ -1,38 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_get_mhrlen.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_getset.c b/wireless/ieee802154/mac802154_getset.c index 572c4866099..f44e70cb12d 100644 --- a/wireless/ieee802154/mac802154_getset.c +++ b/wireless/ieee802154/mac802154_getset.c @@ -1,40 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_getset.c * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_gts.c b/wireless/ieee802154/mac802154_gts.c index d962ac6ffea..8949e584301 100644 --- a/wireless/ieee802154/mac802154_gts.c +++ b/wireless/ieee802154/mac802154_gts.c @@ -1,35 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_gts.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_internal.h b/wireless/ieee802154/mac802154_internal.h index 718723f08b6..c9ed38e820a 100644 --- a/wireless/ieee802154/mac802154_internal.h +++ b/wireless/ieee802154/mac802154_internal.h @@ -1,42 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_internal.h * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * The naming and comments for various fields are taken directly - * from the IEEE 802.15.4 2011 standard. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_ioctl.c b/wireless/ieee802154/mac802154_ioctl.c index 4e63908d319..511e2706bdb 100644 --- a/wireless/ieee802154/mac802154_ioctl.c +++ b/wireless/ieee802154/mac802154_ioctl.c @@ -1,38 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_ioctl.c * - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_orphan.c b/wireless/ieee802154/mac802154_orphan.c index 2ee2e25d486..2801ae389bf 100644 --- a/wireless/ieee802154/mac802154_orphan.c +++ b/wireless/ieee802154/mac802154_orphan.c @@ -1,35 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_orphan.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_poll.c b/wireless/ieee802154/mac802154_poll.c index 56e8c8931fd..9cabe622efd 100644 --- a/wireless/ieee802154/mac802154_poll.c +++ b/wireless/ieee802154/mac802154_poll.c @@ -1,40 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_poll.c * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_poll.h b/wireless/ieee802154/mac802154_poll.h index b82b6a87a5b..81e988977ce 100644 --- a/wireless/ieee802154/mac802154_poll.h +++ b/wireless/ieee802154/mac802154_poll.h @@ -1,41 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_poll.h * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Anthony Merlino - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * The naming and comments for various fields are taken directly - * from the IEEE 802.15.4 2011 standard. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_purge.c b/wireless/ieee802154/mac802154_purge.c index 998936b1539..ae4be89008a 100644 --- a/wireless/ieee802154/mac802154_purge.c +++ b/wireless/ieee802154/mac802154_purge.c @@ -1,40 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_purge.c * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_reset.c b/wireless/ieee802154/mac802154_reset.c index 8cadcf0e681..672453abfeb 100644 --- a/wireless/ieee802154/mac802154_reset.c +++ b/wireless/ieee802154/mac802154_reset.c @@ -1,40 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_reset.c * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_rxenable.c b/wireless/ieee802154/mac802154_rxenable.c index 209b92e3c23..2b2ad0e5580 100644 --- a/wireless/ieee802154/mac802154_rxenable.c +++ b/wireless/ieee802154/mac802154_rxenable.c @@ -1,40 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_rxenable.c * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_scan.c b/wireless/ieee802154/mac802154_scan.c index 290d0ad3d6c..3defd7d9de6 100644 --- a/wireless/ieee802154/mac802154_scan.c +++ b/wireless/ieee802154/mac802154_scan.c @@ -1,40 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_scan.c * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_scan.h b/wireless/ieee802154/mac802154_scan.h index 4a3cdc94dfd..9f49b1d3f23 100644 --- a/wireless/ieee802154/mac802154_scan.h +++ b/wireless/ieee802154/mac802154_scan.h @@ -1,41 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_scan.h * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Anthony Merlino - * Author: Gregory Nutt + * http://www.apache.org/licenses/LICENSE-2.0 * - * The naming and comments for various fields are taken directly - * from the IEEE 802.15.4 2011 standard. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_start.c b/wireless/ieee802154/mac802154_start.c index e7cf70b9a57..87e2887718a 100644 --- a/wireless/ieee802154/mac802154_start.c +++ b/wireless/ieee802154/mac802154_start.c @@ -1,35 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_start.c * - * Copyright (C) 2017 Verge Inc. All rights reserved. - * Author: Anthony Merlino + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: + * http://www.apache.org/licenses/LICENSE-2.0 * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/ diff --git a/wireless/ieee802154/mac802154_sync.c b/wireless/ieee802154/mac802154_sync.c index 6667b7c1614..f20e0491e67 100644 --- a/wireless/ieee802154/mac802154_sync.c +++ b/wireless/ieee802154/mac802154_sync.c @@ -1,40 +1,20 @@ /**************************************************************************** * wireless/ieee802154/mac802154_sync.c * - * Copyright (C) 2016 Sebastien Lorquet. All rights reserved. - * Copyright (C) 2017 Gregory Nutt. All rights reserved. - * Copyright (C) 2017 Verge Inc. All rights reserved. + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at * - * Author: Sebastien Lorquet - * Author: Gregory Nutt - * Author: Anthony Merlino + * http://www.apache.org/licenses/LICENSE-2.0 * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. * ****************************************************************************/