Fix Kconfig style

Remove spaces from Kconfig files
Remove TABs
Add comments
This commit is contained in:
simbit18
2024-04-08 16:21:13 +02:00
committed by Xiang Xiao
parent c0d7419d11
commit 9967989b02
7 changed files with 43 additions and 43 deletions
+1 -1
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@@ -2613,7 +2613,7 @@ config IMXRT_SRAM_HEAPOFFSET
Used to reserve memory at the beginning of SRAM for, as an example,
a framebuffer.
endmenu # i.MX RT Heap Configuration
endmenu # i.MX RT Heap Configuration
config IMXRT_FLEXRAM_PARTITION
bool "Set FlexRAM Paritioning"
+28 -28
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@@ -328,7 +328,7 @@ config ARCH_CHIP_RISCV_CUSTOM
---help---
Select this option if there is no directory for the chip under arch/risc-v/src/.
endchoice
endchoice # RISC-V chip selection
config ARCH_RV32
bool
@@ -389,35 +389,35 @@ config ARCH_RV_ISA_VENDOR_EXTENSIONS
config ARCH_RV_MMIO_BITS
int
# special cases
default 32 if ARCH_CHIP_K230
default 32 if ARCH_CHIP_K230
# general fallbacks
default 32 if ARCH_RV32
default 64 if ARCH_RV64
default 32 if ARCH_RV32
default 64 if ARCH_RV64
config ARCH_FAMILY
string
default "rv32" if ARCH_RV32
default "rv64" if ARCH_RV64
default "rv32" if ARCH_RV32
default "rv64" if ARCH_RV64
config ARCH_CHIP
string
default "fe310" if ARCH_CHIP_FE310
default "k210" if ARCH_CHIP_K210
default "litex" if ARCH_CHIP_LITEX
default "bl602" if ARCH_CHIP_BL602
default "esp32c3-legacy" if ARCH_CHIP_ESP32C3
default "esp32c3" if ARCH_CHIP_ESP32C3_GENERIC
default "esp32c6" if ARCH_CHIP_ESP32C6
default "esp32h2" if ARCH_CHIP_ESP32H2
default "c906" if ARCH_CHIP_C906
default "mpfs" if ARCH_CHIP_MPFS
default "rv32m1" if ARCH_CHIP_RV32M1
default "qemu-rv" if ARCH_CHIP_QEMU_RV
default "hpm6000" if ARCH_CHIP_HPM6000
default "hpm6750" if ARCH_CHIP_HPM6750
default "jh7110" if ARCH_CHIP_JH7110
default "bl808" if ARCH_CHIP_BL808
default "k230" if ARCH_CHIP_K230
default "fe310" if ARCH_CHIP_FE310
default "k210" if ARCH_CHIP_K210
default "litex" if ARCH_CHIP_LITEX
default "bl602" if ARCH_CHIP_BL602
default "esp32c3-legacy" if ARCH_CHIP_ESP32C3
default "esp32c3" if ARCH_CHIP_ESP32C3_GENERIC
default "esp32c6" if ARCH_CHIP_ESP32C6
default "esp32h2" if ARCH_CHIP_ESP32H2
default "c906" if ARCH_CHIP_C906
default "mpfs" if ARCH_CHIP_MPFS
default "rv32m1" if ARCH_CHIP_RV32M1
default "qemu-rv" if ARCH_CHIP_QEMU_RV
default "hpm6000" if ARCH_CHIP_HPM6000
default "hpm6750" if ARCH_CHIP_HPM6750
default "jh7110" if ARCH_CHIP_JH7110
default "bl808" if ARCH_CHIP_BL808
default "k230" if ARCH_CHIP_K230
config ARCH_RISCV_INTXCPT_EXTENSIONS
bool "RISC-V Integer Context Extensions"
@@ -498,7 +498,7 @@ config RISCV_TOOLCHAIN_GNU_RV32
This option should work for any modern GNU toolchain (GCC 5.2 or newer)
configured for riscv32-unknown-elf.
endchoice
endchoice # Toolchain Selection
config RISCV_SEMIHOSTING_HOSTFS
bool "Semihosting HostFS"
@@ -517,7 +517,7 @@ config RISCV_SEMIHOSTING_HOSTFS_CACHE_COHERENCE
---help---
Flush & Invalidte cache before & after bkpt instruction.
endif
endif # RISCV_SEMIHOSTING_HOSTFS
if ARCH_CHIP_LITEX
@@ -538,9 +538,9 @@ config LITEX_CORE_VEXRISCV_SMP
select ARCH_HAVE_S_MODE
select ARCH_HAVE_ELF_EXECUTABLE
endchoice
endchoice # LITEX Core Selection
endif
endif # ARCH_CHIP_LITEX
source "arch/risc-v/src/opensbi/Kconfig"
source "arch/risc-v/src/nuttsbi/Kconfig"
@@ -596,4 +596,4 @@ endif
if ARCH_CHIP_K230
source "arch/risc-v/src/k230/Kconfig"
endif
endif
endif # ARCH_RISCV
+2 -2
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@@ -107,8 +107,8 @@ config MULTBOOT2_FB_TERM
bool "Multiboot2 framebuffer terminal"
default n
depends on NXFONTS
---help---
Enable a framebuffer terminal for early debug printing
---help---
Enable a framebuffer terminal for early debug printing
endif # ARCH_MULTIBOOT2
+2 -2
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@@ -1884,10 +1884,10 @@ config ESP32S3_SPI_FLASH_SUPPORT_PSRAM_STACK
can do SPI Flash read/write/erase/map/unmap. Otherwise,
it may cause exception, the root cause is as following:
1. When operating SPI flash, cache is also disable,
then software can't access PSRAM by data cache.
then software can't access PSRAM by data cache.
2. SPI flash read/write/erase functions have instruction like
stack-pop and stack-push which may use stack buffer which is
PSRAM space or load/store temp variables which locate in PSRAM space too.
PSRAM space or load/store temp variables which locate in PSRAM space too.
3. Once operation in step 2 triggers, CPU will trigger exception.
So related SPI flash functions should be sent and run in tasks which use SRAM as task stack.
+2 -2
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@@ -3174,7 +3174,7 @@ config ARCH_BOARD
default "esp32s3-box" if ARCH_BOARD_ESP32S3_BOX
default "esp32c6-devkitc" if ARCH_BOARD_ESP32C6_DEVKITC
default "esp32c6-devkitm" if ARCH_BOARD_ESP32C6_DEVKITM
default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT
default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT
default "et-stm32-stamp" if ARCH_BOARD_ET_STM32_STAMP
default "tlsr8278adk80d" if ARCH_BOARD_TLSR8278ADK80D
default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG
@@ -3443,7 +3443,7 @@ config ARCH_BOARD
default "xx3803" if ARCH_BOARD_XX3803
default "xx3823" if ARCH_BOARD_XX3823
default "s698pm-dkit" if ARCH_BOARD_S698PM_DKIT
default "hpm6360evk" if ARCH_BOARD_HPM6360EVK
default "hpm6360evk" if ARCH_BOARD_HPM6360EVK
default "hpm6750evk2" if ARCH_BOARD_HPM6750EVK2
default "at32f437-mini" if ARCH_BOARD_AT32F437_MINI