diff --git a/arch/xtensa/src/common/espressif/Kconfig b/arch/xtensa/src/common/espressif/Kconfig
index 13e3bce8825..651e161e48b 100644
--- a/arch/xtensa/src/common/espressif/Kconfig
+++ b/arch/xtensa/src/common/espressif/Kconfig
@@ -21,6 +21,26 @@ config ESP_PCNT
 	default n
 	select CAPTURE
 
+config ESPRESSIF_ADC
+	bool "Analog-to-digital converter (ADC)"
+	default n
+	select ANALOG
+	select ADC
+	---help---
+		Enable support for analog-to-digital converter (ADC) peripheral.
+
+if ESPRESSIF_ADC
+
+config ESPRESSIF_ADC_1
+	default y
+	bool "Enable SAR ADC 1"
+
+config ESPRESSIF_ADC_2
+	default n
+	bool "Enable SAR ADC 2"
+
+endif # ESPRESSIF_ADC
+
 config ESPRESSIF_TEMP
 	bool "Internal Temperature Sensor"
 	default n
diff --git a/arch/xtensa/src/common/espressif/Make.defs b/arch/xtensa/src/common/espressif/Make.defs
index e59cee5e71e..128029cd545 100644
--- a/arch/xtensa/src/common/espressif/Make.defs
+++ b/arch/xtensa/src/common/espressif/Make.defs
@@ -88,6 +88,10 @@ EXTRA_LIBS += -lespnow
 endif
 endif
 
+ifeq ($(CONFIG_ESPRESSIF_ADC),y)
+CHIP_CSRCS += esp_adc.c
+endif
+
 ifeq ($(CONFIG_ESPRESSIF_WIRELESS),y)
 include common$(DELIM)espressif$(DELIM)Wireless.mk
 endif
diff --git a/arch/xtensa/src/common/espressif/esp_adc.c b/arch/xtensa/src/common/espressif/esp_adc.c
new file mode 100644
index 00000000000..552040f723c
--- /dev/null
+++ b/arch/xtensa/src/common/espressif/esp_adc.c
@@ -0,0 +1,844 @@
+/****************************************************************************
+ * arch/xtensa/src/common/espressif/esp_adc.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <inttypes.h>
+#include <stdint.h>
+#include <sys/param.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <nuttx/analog/adc.h>
+#include <nuttx/spinlock.h>
+
+#include "esp_adc.h"
+
+#include "adc_cali_interface.h"
+#include "esp_adc/adc_cali_scheme.h"
+#include "esp_private/adc_share_hw_ctrl.h"
+#include "esp_private/esp_sleep_internal.h"
+#include "esp_private/periph_ctrl.h"
+#include "esp_private/sar_periph_ctrl.h"
+#include "hal/adc_types.h"
+#include "hal/adc_oneshot_hal.h"
+#include "hal/adc_ll.h"
+#include "hal/sar_ctrl_ll.h"
+#include "soc/adc_periph.h"
+#include "soc/periph_defs.h"
+#include "esp_clk_tree.h"
+
+#ifdef CONFIG_ARCH_CHIP_ESP32
+#include "esp32_gpio.h"
+#elif defined(CONFIG_ARCH_CHIP_ESP32S2)
+#include "esp32s2_gpio.h"
+#elif defined(CONFIG_ARCH_CHIP_ESP32S3)
+#include "esp32s3_gpio.h"
+#endif
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifdef CONFIG_ESPRESSIF_ADC_1_MODE_CONTINUOUS
+#  error "Continuous mode not implemented"
+#endif
+
+#ifdef CONFIG_ARCH_CHIP_ESP32
+#  define esp_configgpio       esp32_configgpio
+#  define GPIO_ADC_FUNCTION    FUNCTION_3
+#endif
+#ifdef CONFIG_ARCH_CHIP_ESP32S2
+#  define esp_configgpio       esp32s2_configgpio
+#  define GPIO_ADC_FUNCTION    FUNCTION_2
+#endif
+#ifdef CONFIG_ARCH_CHIP_ESP32S3
+#  define esp_configgpio       esp32s3_configgpio
+#  define GPIO_ADC_FUNCTION    FUNCTION_2
+#endif
+
+#define ESP_ADC_BITWIDTH_DEFAULT ADC_BITWIDTH_DEFAULT
+
+/* Default internal reference voltage */
+
+#define ADC_ESP32_DEFAULT_VREF_INTERNAL 1100
+
+#define ADC_GET_IO_NUM(unit, channel) (adc_channel_io_map[unit][channel])
+#define COUNT_NON_ZERO(arr, len) ({  \
+    size_t _count = 0;               \
+    for (size_t _i = 0; _i < (len); _i++) \
+        if ((arr)[_i] != 0) _count++; \
+    _count;                           \
+})
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+enum esp_adc_mode_e
+{
+  ESP_ADC_MODE_ONE_SHOT = 0,
+  ESP_ADC_MODE_CONTINUOUS,
+};
+
+struct esp_adc_dev_common_s
+{
+  spinlock_t esp_adc_spinlock;
+  bool initialized;             /* ADC peripheral initialized */
+};
+
+struct esp_adc_oneshot_ch_s
+{
+  uint8_t channel;                 /* Channel number */
+  adc_cali_handle_t  cali_handle;  /* Handle for calibration */
+  bool calibrated;                 /* Channel has been calibrated */
+};
+
+/* One-shot ADC device struct */
+
+struct esp_adc_oneshot_s
+{
+  adc_oneshot_hal_ctx_t hal;   /* ADC unit low-level context */
+  struct esp_adc_oneshot_ch_s ch_list[SOC_ADC_MAX_CHANNEL_NUM];
+};
+
+/* Continuous ADC device struct */
+
+struct esp_adc_continuous_s
+{
+};
+
+/* Generic ADC unit struct to be used by one-shot or continuous mode */
+
+struct esp_adc_dev_s
+{
+  struct adc_dev_s            *upper_dev;  /* Upper-half ADC reference */
+  const struct adc_callback_s *cb;         /* Upper driver callback */
+
+  struct esp_adc_dev_common_s *common;     /* Common ADC driver data */
+
+  enum esp_adc_mode_e mode;  /* ADC mode */
+  adc_atten_t atten_mode;    /* Attenuation paramenter */
+  uint32_t atten_k;          /* Attenuation factor */
+  uint8_t channels;          /* Total channels for this ADC */
+  uint8_t unit;              /* ADC unit number */
+  bool    initialized;       /* ADC unit initialized */
+
+  union
+    {
+      struct esp_adc_oneshot_s os_dev;
+      struct esp_adc_continuous_s cnt_dev;
+    };
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static void esp_adc_reset(struct adc_dev_s *dev);
+static void esp_adc_shutdown(struct adc_dev_s *dev);
+static void esp_adc_rxint(struct adc_dev_s *dev, bool enable);
+static int esp_adc_setup(struct adc_dev_s *dev);
+static int esp_adc_ioctl(struct adc_dev_s *dev, int cmd,
+                         unsigned long arg);
+static int esp_adc_bind(struct adc_dev_s *dev,
+                        const struct adc_callback_s *callback);
+
+static int esp_adc_oneshot_read(struct adc_dev_s *dev);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct adc_ops_s g_adcops =
+{
+  .ao_bind        = esp_adc_bind,
+  .ao_reset       = esp_adc_reset,
+  .ao_setup       = esp_adc_setup,
+  .ao_shutdown    = esp_adc_shutdown,
+  .ao_rxint       = esp_adc_rxint,
+  .ao_ioctl       = esp_adc_ioctl,
+};
+
+static struct esp_adc_dev_common_s g_adc_common =
+{
+  .esp_adc_spinlock = SP_UNLOCKED,
+};
+
+#ifdef CONFIG_ESPRESSIF_ADC_1
+static struct esp_adc_dev_s g_adcpriv1 =
+{
+  .common = &g_adc_common,
+  .initialized = false,
+  .unit = ADC_UNIT_1,
+  .atten_mode = CONFIG_ESPRESSIF_ADC_1_ATTENUATION,
+#ifdef CONFIG_ESPRESSIF_ADC_1_MODE_ONE_SHOT
+  .mode = ESP_ADC_MODE_ONE_SHOT,
+#else
+  .mode = ESP_ADC_MODE_CONTINUOUS,
+#endif
+};
+
+static struct adc_dev_s g_adcdev1 =
+{
+  .ad_ops      = &g_adcops,
+  .ad_priv     = &g_adcpriv1,
+};
+#endif  /* CONFIG_ESPRESSIF_ADC_1 */
+
+#ifdef CONFIG_ESPRESSIF_ADC_2
+static struct esp_adc_dev_s g_adcpriv2 =
+{
+  .common = &g_adc_common,
+  .initialized = false,
+  .unit = ADC_UNIT_2,
+  .atten_mode = CONFIG_ESPRESSIF_ADC_2_ATTENUATION,
+#ifdef CONFIG_ESPRESSIF_ADC_2_MODE_ONE_SHOT
+  .mode = ESP_ADC_MODE_ONE_SHOT,
+#else
+  .mode = ESP_ADC_MODE_CONTINUOUS,
+#endif
+};
+
+static struct adc_dev_s g_adcdev2 =
+{
+  .ad_ops      = &g_adcops,
+  .ad_priv     = &g_adcpriv2,
+};
+#endif  /* CONFIG_ESPRESSIF_ADC_2 */
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp_adc_bind
+ *
+ * Description:
+ *   This function binds the upper-half driver callback to the ADC device.
+ *
+ * Input Parameters:
+ *   dev      - Pointer to the ADC device structure.
+ *   callback - Pointer to the upper-half driver callback structure.
+ *
+ * Returned Value:
+ *   Returns OK on successful binding.
+ *
+ ****************************************************************************/
+
+static int esp_adc_bind(struct adc_dev_s *dev,
+                        const struct adc_callback_s *callback)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *)dev->ad_priv;
+
+  DEBUGASSERT(priv);
+
+  priv->cb = callback;
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp_adc_reset
+ *
+ * Description:
+ *   This function resets the ADC device.
+ *
+ * Input Parameters:
+ *   dev - Pointer to the ADC device structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void esp_adc_reset(struct adc_dev_s *dev)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *)dev->ad_priv;
+
+  DEBUGASSERT(priv);
+}
+
+/****************************************************************************
+ * Name: esp_adc_setup
+ *
+ * Description:
+ *   This function sets up the ADC device.
+ *
+ * Input Parameters:
+ *   dev - Pointer to the ADC device structure.
+ *
+ * Returned Value:
+ *   Returns OK on successful setup; ERROR if the peripheral is already
+ *   initialized.
+ *
+ ****************************************************************************/
+
+static int esp_adc_setup(FAR struct adc_dev_s *dev)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *) dev->ad_priv;
+  int ret = OK;
+
+  DEBUGASSERT(priv);
+
+  if (priv->common->initialized)
+    {
+      awarn("peripheral already initialized\n");
+      return ERROR;
+    }
+
+  priv->common->initialized = true;
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: esp_adc_shutdown
+ *
+ * Description:
+ *   This function shuts down the ADC device.
+ *
+ * Input Parameters:
+ *   dev - Pointer to the ADC device structure.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void esp_adc_shutdown(FAR struct adc_dev_s *dev)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *) dev->ad_priv;
+
+  DEBUGASSERT(priv);
+
+  if (!priv->common->initialized)
+    {
+      return;
+    }
+
+  priv->common->initialized = false;
+}
+
+/****************************************************************************
+ * Name: esp_adc_rxint
+ *
+ * Description:
+ *   This function enables or disables ADC receive interrupts.
+ *
+ * Input Parameters:
+ *   dev    - Pointer to the ADC device structure.
+ *   enable - Boolean indicating whether to enable (true) or disable (false)
+ *            the receive interrupts.
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+static void esp_adc_rxint(FAR struct adc_dev_s *dev, bool enable)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *) dev->ad_priv;
+
+  DEBUGASSERT(priv);
+}
+
+/****************************************************************************
+ * Name: esp_adc_ioctl
+ *
+ * Description:
+ *   This function handles ADC ioctl commands.
+ *
+ * Input Parameters:
+ *   dev  - Pointer to the ADC device structure.
+ *   cmd  - The ioctl command.
+ *   arg  - The argument for the ioctl command.
+ *
+ * Returned Value:
+ *   Returns the number of channels on ANIOC_GET_NCHANNELS command; a negated
+ *   errno value is returned on any failure.
+ *
+ ****************************************************************************/
+
+static int esp_adc_ioctl(struct adc_dev_s *dev, int cmd,
+                         unsigned long arg)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *)dev->ad_priv;
+  int i;
+  int ret = OK;
+
+  DEBUGASSERT(priv);
+
+  switch (cmd)
+    {
+      case ANIOC_TRIGGER:
+        esp_adc_oneshot_read(dev);
+        break;
+
+      case ANIOC_GET_NCHANNELS:
+        ret = priv->channels;
+        break;
+
+      default:
+        aerr("ERROR: Unknown cmd: %d\n", cmd);
+        ret = -ENOTTY;
+        break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: esp_adc_oneshot_read
+ *
+ * Description:
+ *   This function reads data from the ADC device in one-shot mode.
+ *
+ * Input Parameters:
+ *   dev - Pointer to the ADC device structure.
+ *
+ * Returned Value:
+ *   Returns OK on successful read; ERROR if the ADC is not initialized.
+ *
+ ****************************************************************************/
+
+static int esp_adc_oneshot_read(struct adc_dev_s *dev)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *)dev->ad_priv;
+  adc_oneshot_hal_ctx_t *hal = &priv->os_dev.hal;
+  struct esp_adc_oneshot_ch_s *ch;
+  irqstate_t flags;
+  int raw_value;
+  int voltage;
+  int i;
+  int ret = OK;
+#ifndef CONFIG_ARCH_CHIP_ESP32
+    adc_atten_t atten;
+#endif
+
+  DEBUGASSERT(priv);
+  DEBUGASSERT(priv->mode == ESP_ADC_MODE_ONE_SHOT);
+
+  if (!priv->initialized)
+    {
+      aerr("ADC %d not initialized\n", priv->unit);
+      return ERROR;
+    }
+
+  /* Read all configured channels */
+
+  for (i = 0; i < priv->channels; i++)
+    {
+      ch = &priv->os_dev.ch_list[i];
+      flags = spin_lock_irqsave(&g_adc_common.esp_adc_spinlock);
+
+      /* Read the ADC value */
+
+      adc_oneshot_hal_setup(hal, ch->channel);
+#ifndef CONFIG_ARCH_CHIP_ESP32
+      if (ch->calibrated)
+        {
+          atten = adc_ll_get_atten(priv->unit, ch->channel);
+          adc_hal_calibration_init(priv->unit);
+          adc_set_hw_calibration_code(priv->unit, atten);
+        }
+#endif
+
+      ret = adc_oneshot_hal_convert(hal, &raw_value);
+      if (!ret)
+        {
+          aerr("invalid one-shot ADC read\n");
+        }
+
+      /* Apply calibration if possible */
+
+      if (ch->calibrated)
+        {
+          ret = adc_cali_raw_to_voltage(ch->cali_handle,
+                                        raw_value,
+                                        &voltage);
+          if (ret != OK)
+            {
+              voltage = 0;
+              aerr("apply calibration failed\n");
+            }
+        }
+      else
+        {
+          voltage = priv->atten_k * raw_value / 4095;
+        }
+
+      /* Inform upper layer that new data for a channel is available */
+
+      priv->cb->au_receive(dev, ch->channel, (int32_t)voltage);
+
+      spin_unlock_irqrestore(&g_adc_common.esp_adc_spinlock, flags);
+
+      ainfo("read adc %d ch %d (cali: %d): value %" PRId32 " (raw %d)\n",
+            priv->unit, ch->channel, ch->calibrated,
+            (int32_t)voltage, raw_value);
+      usleep(1000);
+    }
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp_adc_oneshot_new_unit
+ *
+ * Description:
+ *   This function initializes a new ADC unit in one-shot mode.
+ *
+ * Input Parameters:
+ *   dev - Pointer to the ADC device structure.
+ *
+ * Returned Value:
+ *   Returns OK on successful initialization; ERROR if the ADC is already
+ *   initialized.
+ *
+ ****************************************************************************/
+
+static int esp_adc_oneshot_new_unit(struct adc_dev_s *dev)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *)dev->ad_priv;
+  adc_oneshot_hal_ctx_t *hal = &priv->os_dev.hal;
+  adc_oneshot_hal_cfg_t config;
+  irqstate_t flags;
+  uint32_t clk_src_freq_hz = 0;
+
+  DEBUGASSERT(priv);
+  DEBUGASSERT(priv->mode == ESP_ADC_MODE_ONE_SHOT);
+
+  if (priv->initialized)
+    {
+      aerr("ADC %d already initialized\n", priv->unit);
+      return ERROR;
+    }
+
+  flags = spin_lock_irqsave(&g_adc_common.esp_adc_spinlock);
+
+  esp_clk_tree_src_get_freq_hz(ADC_DIGI_CLK_SRC_DEFAULT,
+                               ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED,
+                               &clk_src_freq_hz);
+
+  config.unit = priv->unit;
+  config.work_mode = ADC_HAL_SINGLE_READ_MODE;
+  config.clk_src = ADC_DIGI_CLK_SRC_DEFAULT;
+  config.clk_src_freq_hz = clk_src_freq_hz;
+
+  adc_oneshot_hal_init(hal, &config);
+
+  /* Enable peripheral and power ADC */
+
+  adc_apb_periph_claim();
+
+  sar_periph_ctrl_adc_oneshot_power_acquire();
+
+  /* Acquire oneshot mode power */
+
+#ifndef ARCH_CHIP_ESP32S2
+  sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_ON);
+#endif
+
+  priv->initialized = true;
+
+  spin_unlock_irqrestore(&g_adc_common.esp_adc_spinlock, flags);
+
+  ainfo("unit %d freq %u\n", priv->unit, clk_src_freq_hz);
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp_adc_oneshot_config_channel
+ *
+ * Description:
+ *   This function configures a specific channel for the ADC device in
+ *   one-shot mode.
+ *
+ * Input Parameters:
+ *   dev     - Pointer to the ADC device structure.
+ *   channel - The channel number to configure.
+ *
+ * Returned Value:
+ *   Returns OK on successful configuration; a negated errno value is
+ *   returned on any failure.
+ *
+ ****************************************************************************/
+
+static int esp_adc_oneshot_config_channel(struct adc_dev_s *dev,
+                                          uint8_t channel)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *)dev->ad_priv;
+  adc_oneshot_hal_ctx_t *hal = &priv->os_dev.hal;
+  adc_oneshot_hal_chan_cfg_t config;
+  irqstate_t flags;
+  int gpio;
+  int ret;
+
+  DEBUGASSERT(priv);
+  DEBUGASSERT(priv->mode == ESP_ADC_MODE_ONE_SHOT);
+
+  config.atten = priv->atten_mode;
+  config.bitwidth = ESP_ADC_BITWIDTH_DEFAULT;
+
+  /* Configure GPIO for ADC */
+
+  gpio = ADC_GET_IO_NUM(priv->unit, channel);
+  ret = esp_configgpio(gpio, GPIO_ADC_FUNCTION);
+  if (ret < 0)
+    {
+      aerr("ERROR: Failed to configure GPIO %d\n", gpio);
+      return ret;
+    }
+
+  /* Config ADC channel */
+
+  flags = spin_lock_irqsave(&g_adc_common.esp_adc_spinlock);
+  adc_oneshot_hal_channel_config(hal, &config, channel);
+  spin_unlock_irqrestore(&g_adc_common.esp_adc_spinlock, flags);
+
+  ainfo("init adc unit %u, ch %u (gpio %d), atten %d, bitwidth %d",
+        priv->unit, channel, gpio, config.atten, config.bitwidth);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: esp_adc_calibrate
+ *
+ * Description:
+ *   This function calibrates the ADC device.
+ *
+ * Input Parameters:
+ *   dev - Pointer to the ADC device structure.
+ *
+ * Returned Value:
+ *   Returns OK on successful calibration; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+static int esp_adc_calibrate(struct adc_dev_s *dev)
+{
+  struct esp_adc_dev_s *priv = (struct esp_adc_dev_s *)dev->ad_priv;
+  adc_cali_handle_t *handle;
+#ifdef ADC_CALI_SCHEME_CURVE_FITTING_SUPPORTED
+  adc_cali_curve_fitting_config_t cali_config;
+#else
+  adc_cali_line_fitting_config_t cali_config;
+#endif
+  int i;
+  int ret = OK;
+
+  DEBUGASSERT(priv);
+  DEBUGASSERT(priv->mode == ESP_ADC_MODE_ONE_SHOT);
+
+  /* Init calibration for this ADC unit */
+
+#ifndef CONFIG_ARCH_CHIP_ESP32
+  adc_hal_calibration_init(priv->unit);
+  adc_calc_hw_calibration_code(priv->unit, priv->atten_mode);
+#endif
+
+  cali_config.unit_id = priv->unit;
+  cali_config.atten = priv->atten_mode;
+  cali_config.bitwidth = ESP_ADC_BITWIDTH_DEFAULT;
+
+  for (i = 0; i < priv->channels; i++)
+    {
+      handle = &priv->os_dev.ch_list[i].cali_handle;
+#ifdef ADC_CALI_SCHEME_CURVE_FITTING_SUPPORTED
+      cali_config.chan = priv->os_dev.ch_list[i].channel;
+
+      ainfo("curve fitting unit %d, chan %u, atten %u, bitwidth %u\n",
+            cali_config.unit_id, cali_config.chan, cali_config.atten,
+            cali_config.bitwidth);
+
+      /* Make sure calibration handle is clear */
+
+      if (*handle != NULL)
+        {
+          adc_cali_delete_scheme_curve_fitting(*handle);
+        }
+
+      ret = adc_cali_create_scheme_curve_fitting(&cali_config, handle);
+#endif
+#ifdef ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
+#ifdef CONFIG_ARCH_CHIP_ESP32
+      cali_config.default_vref = ADC_ESP32_DEFAULT_VREF_INTERNAL;
+#endif
+      ainfo("line fitting unit %d, atten %u, bitwidth %u\n",
+            cali_config.unit_id, cali_config.atten, cali_config.bitwidth);
+
+      /* Make sure calibration handle is clear */
+
+      if (*handle != NULL)
+        {
+          adc_cali_delete_scheme_line_fitting(*handle);
+        }
+
+      ret = adc_cali_create_scheme_line_fitting(&cali_config, handle);
+#endif
+      if (ret == OK)
+        {
+          priv->os_dev.ch_list[i].calibrated = true;
+        }
+      else
+        {
+          aerr("calibration failed\n");
+        }
+    }
+
+  /* This attenuation constant is used when calibration fails,
+   * returning a voltage obtained from simple calibration based
+   * on: Vdata = Vref * raw_data / 4095
+   */
+
+  switch (priv->atten_mode)
+    {
+      case ADC_ATTEN_DB_12:
+        priv->atten_k = 4400;
+        break;
+
+      case ADC_ATTEN_DB_6:
+        priv->atten_k = 2200;
+        break;
+
+      case ADC_ATTEN_DB_2_5:
+        priv->atten_k = 1470;
+        break;
+
+      case ADC_ATTEN_DB_0:
+        priv->atten_k = 1100;
+        break;
+
+      default:
+        priv->atten_k = 0;
+        aerr("invalid attenuation mode\n");
+        break;
+    }
+
+  return ret;
+}
+
+/****************************************************************************
+ * Name: esp_adc_initialize
+ *
+ * Description:
+ *   This function initializes the specified ADC device with the provided
+ *   configuration.
+ *
+ * Input Parameters:
+ *   adc_num      - The ADC unit number.
+ *   channel_list - List of channels to be configured for the ADC unit.
+ *
+ * Returned Value:
+ *   Returns a valid pointer to the ADC device structure on success; NULL on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+struct adc_dev_s *esp_adc_initialize(int adc_num,
+                                     const uint8_t *channel_list)
+{
+  struct adc_dev_s *dev;
+  struct esp_adc_dev_s *priv;
+  uint8_t channel;
+  int gpio;
+  int i;
+  int ret;
+
+  ainfo("initialize SAR ADC %d\n", adc_num);
+
+  switch (adc_num)
+    {
+      case 1:
+        {
+#ifdef CONFIG_ESPRESSIF_ADC_1
+          dev = &g_adcdev1;
+          priv = &g_adcpriv1;
+          break;
+#endif
+        }
+
+      case 2:
+        {
+#ifdef CONFIG_ESPRESSIF_ADC_2
+          dev = &g_adcdev2;
+          priv = &g_adcpriv2;
+#endif
+          break;
+        }
+
+      default:
+        {
+          aerr("ERROR: Unsupported ADC number: %d\n", adc_num);
+          return NULL;
+        }
+    }
+
+  /* Get number of channels used. ESP32 is an exception since unit 1
+   * has 8 channels instead of 10.
+   */
+
+#ifdef CONFIG_ARCH_CHIP_ESP32
+  if (priv->unit == ADC_UNIT_1)
+    {
+      priv->channels = COUNT_NON_ZERO(channel_list,
+                                      SOC_ADC_MAX_CHANNEL_NUM - 2);
+    }
+  else
+    {
+      priv->channels = COUNT_NON_ZERO(channel_list, SOC_ADC_MAX_CHANNEL_NUM);
+    }
+#else
+  priv->channels = COUNT_NON_ZERO(channel_list, SOC_ADC_MAX_CHANNEL_NUM);
+#endif
+
+  if (priv->channels == 0)
+    {
+      aerr("ERROR: No channels configured\n");
+      return NULL;
+    }
+
+  /* Setup this ADC unit to one-shot mode */
+
+  esp_adc_oneshot_new_unit(dev);
+
+  /* Configure channels that will be used for this ADC unit. */
+
+  for (i = 0; i < priv->channels; i++)
+    {
+      /* Decrement channel number by 1 to get correct index */
+
+      channel = channel_list[i] - 1;
+      priv->os_dev.ch_list[i].channel = channel;
+
+      esp_adc_oneshot_config_channel(dev, channel);
+    }
+
+  esp_adc_calibrate(dev);
+
+  return dev;
+}
diff --git a/arch/xtensa/src/esp32s3/esp32s3_adc.h b/arch/xtensa/src/common/espressif/esp_adc.h
similarity index 73%
rename from arch/xtensa/src/esp32s3/esp32s3_adc.h
rename to arch/xtensa/src/common/espressif/esp_adc.h
index a64bc4a3e53..c3342638830 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_adc.h
+++ b/arch/xtensa/src/common/espressif/esp_adc.h
@@ -1,5 +1,5 @@
 /****************************************************************************
- * arch/xtensa/src/esp32s3/esp32s3_adc.h
+ * arch/xtensa/src/common/espressif/esp_adc.h
  *
  * Licensed to the Apache Software Foundation (ASF) under one or more
  * contributor license agreements.  See the NOTICE file distributed with
@@ -18,8 +18,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_ADC_H
-#define __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_ADC_H
+#ifndef __ARCH_XTENSA_SRC_COMMON_ESPRESSI_ESP_ADC_H
+#define __ARCH_XTENSA_SRC_COMMON_ESPRESSI_ESP_ADC_H
 
 /****************************************************************************
  * Included Files
@@ -35,26 +35,14 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+#define ESP_ADC_MAX_CHANNELS 10
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
 
 #ifndef __ASSEMBLY__
 
-#ifdef CONFIG_ESP32S3_ADC
-#  define ESP32S3_ADC1 1
-#  define ESP32S3_ADC1_CHANNEL0 0
-#  define ESP32S3_ADC1_CHANNEL1 1
-#  define ESP32S3_ADC1_CHANNEL2 2
-#  define ESP32S3_ADC1_CHANNEL3 3
-#  define ESP32S3_ADC1_CHANNEL4 4
-#  define ESP32S3_ADC1_CHANNEL5 5
-#  define ESP32S3_ADC1_CHANNEL6 6
-#  define ESP32S3_ADC1_CHANNEL7 7
-#  define ESP32S3_ADC1_CHANNEL8 8
-#  define ESP32S3_ADC1_CHANNEL9 9
-#endif
-
 /****************************************************************************
  * Public Data
  ****************************************************************************/
@@ -69,20 +57,24 @@ extern "C"
 #endif
 
 /****************************************************************************
- * Name: esp32s3_adc_init
+ * Name: esp_adc_initialize
  *
  * Description:
- *   Initialize the ADC.
+ *   This function initializes the specified ADC device with the provided
+ *   configuration.
  *
  * Input Parameters:
- *   channel - ADC channel number
+ *   adc_num      - The ADC unit number.
+ *   channel_list - List of channels to be configured for the ADC unit.
  *
  * Returned Value:
- *   ADC device structure reference on success; a NULL on failure
+ *   Returns a valid pointer to the ADC device structure on success; NULL on
+ *   any failure.
  *
  ****************************************************************************/
 
-void esp32s3_adc_init(int adc_index, struct adc_dev_s *dev);
+struct adc_dev_s *esp_adc_initialize(int adc_num,
+                                     const uint8_t *channel_list);
 
 #ifdef __cplusplus
 }
@@ -90,4 +82,4 @@ void esp32s3_adc_init(int adc_index, struct adc_dev_s *dev);
 #undef EXTERN
 
 #endif /* __ASSEMBLY__ */
-#endif /* __ARCH_XTENSA_SRC_ESP32S3_ESP32S3_ADC_H */
+#endif /* __ARCH_XTENSA_SRC_COMMON_ESPRESSI_ESP_ADC_H */
diff --git a/arch/xtensa/src/esp32/Kconfig b/arch/xtensa/src/esp32/Kconfig
index fb7932c2ac2..07c63d363e4 100644
--- a/arch/xtensa/src/esp32/Kconfig
+++ b/arch/xtensa/src/esp32/Kconfig
@@ -2548,6 +2548,193 @@ config ESP_MCPWM_TEST_LOOPBACK
 
 endmenu # MCPWM Configuration
 
+menu "ADC Configuration"
+	depends on ESPRESSIF_ADC
+
+if ESPRESSIF_ADC_1
+
+config ESPRESSIF_ADC_1_DEVNAME
+	string "ADC 1 Device Name"
+	default "/dev/adc0"
+
+choice ESPRESSIF_ADC_1_ATTENUATION
+	prompt "ADC 1 Input Attenuation"
+	default ESPRESSIF_ADC_1_ATTEN_12
+	---help---
+		Select input attenuation for the ADC unit.
+		Relates to maximum measurable input voltage.
+		See ESP32 Technical Reference Manual for details.
+
+config ESPRESSIF_ADC_1_ATTEN_0
+	bool "0 dB (1.1 V)"
+
+config ESPRESSIF_ADC_1_ATTEN_2_5
+	bool "2.5 dB (1.47 V)"
+
+config ESPRESSIF_ADC_1_ATTEN_6
+	bool "6 dB (2.2 V)"
+
+config ESPRESSIF_ADC_1_ATTEN_12
+	bool "12 dB (4.4 V)"
+
+endchoice  # ESPRESSIF_ADC_1_ATTENUATION
+
+config ESPRESSIF_ADC_1_ATTENUATION
+	int
+	default 0 if ESPRESSIF_ADC_1_ATTEN_0
+	default 1 if ESPRESSIF_ADC_1_ATTEN_2_5
+	default 2 if ESPRESSIF_ADC_1_ATTEN_6
+	default 3 if ESPRESSIF_ADC_1_ATTEN_12
+
+choice ESPRESSIF_ADC_1_MODE
+	prompt "ADC 1 Mode"
+	default ESPRESSIF_ADC_1_MODE_ONE_SHOT
+	---help---
+		Select operating mode for ADC 1.
+
+config ESPRESSIF_ADC_1_MODE_ONE_SHOT
+	bool "One-Shot Mode"
+
+config ESPRESSIF_ADC_1_MODE_CONTINUOUS
+	bool "Continuous Mode"
+
+endchoice  # ESPRESSIF_ADC_1_MODE
+
+menu "ADC 1 Channel Selection"
+
+config ESPRESSIF_ADC_1_CH0
+	bool "Channel 0"
+	default y
+
+config ESPRESSIF_ADC_1_CH1
+	bool "Channel 1"
+	default n
+
+config ESPRESSIF_ADC_1_CH2
+	bool "Channel 2"
+	default n
+
+config ESPRESSIF_ADC_1_CH3
+	bool "Channel 3"
+	default y
+
+config ESPRESSIF_ADC_1_CH4
+	bool "Channel 4"
+	default y
+
+config ESPRESSIF_ADC_1_CH5
+	bool "Channel 5"
+	default n
+
+config ESPRESSIF_ADC_1_CH6
+	bool "Channel 6"
+	default n
+
+config ESPRESSIF_ADC_1_CH7
+	bool "Channel 7"
+	default n
+
+endmenu # ADC 1 Channel Selection
+
+endif  # ESPRESSIF_ADC_1
+
+if ESPRESSIF_ADC_2
+
+config ESPRESSIF_ADC_2_DEVNAME
+	string "ADC 2 Device Name"
+	default "/dev/adc1"
+
+choice ESPRESSIF_ADC_2_ATTENUATION
+	prompt "ADC 2 Input Attenuation"
+	default ESPRESSIF_ADC_2_ATTEN_12
+	---help---
+		Select input attenuation for the ADC unit.
+		Relates to maximum measurable input voltage (Vmax) and the internal ADC reference voltage (approx. 1100 mV).
+		See ESP32 Technical Reference Manual for details.
+
+config ESPRESSIF_ADC_2_ATTEN_0
+	bool "0 dB (1.1 V)"
+
+config ESPRESSIF_ADC_2_ATTEN_2_5
+	bool "2.5 dB (1.47 V)"
+
+config ESPRESSIF_ADC_2_ATTEN_6
+	bool "6 dB (2.2 V)"
+
+config ESPRESSIF_ADC_2_ATTEN_12
+	bool "12 dB (4.4 V)"
+
+endchoice  # ESPRESSIF_ADC_2_ATTENUATION
+
+config ESPRESSIF_ADC_2_ATTENUATION
+	int
+	default 0 if ESPRESSIF_ADC_2_ATTEN_0
+	default 1 if ESPRESSIF_ADC_2_ATTEN_2_5
+	default 2 if ESPRESSIF_ADC_2_ATTEN_6
+	default 3 if ESPRESSIF_ADC_2_ATTEN_12
+
+choice ESPRESSIF_ADC_2_MODE
+	prompt "ADC 2 Mode"
+	default ESPRESSIF_ADC_2_MODE_ONE_SHOT
+	---help---
+		Select operating mode for ADC 2.
+
+config ESPRESSIF_ADC_2_MODE_ONE_SHOT
+	bool "One-Shot Mode"
+
+config ESPRESSIF_ADC_2_MODE_CONTINUOUS
+	bool "Continuous Mode"
+
+endchoice  # ESPRESSIF_ADC_2_MODE
+
+menu "ADC 2 Channel Selection"
+
+config ESPRESSIF_ADC_2_CH0
+	bool "Channel 0"
+	default y
+
+config ESPRESSIF_ADC_2_CH1
+	bool "Channel 1"
+	default n
+
+config ESPRESSIF_ADC_2_CH2
+	bool "Channel 2"
+	default y
+
+config ESPRESSIF_ADC_2_CH3
+	bool "Channel 3"
+	default y
+
+config ESPRESSIF_ADC_2_CH4
+	bool "Channel 4"
+	default n
+
+config ESPRESSIF_ADC_2_CH5
+	bool "Channel 5"
+	default n
+
+config ESPRESSIF_ADC_2_CH6
+	bool "Channel 6"
+	default n
+
+config ESPRESSIF_ADC_2_CH7
+	bool "Channel 7"
+	default n
+
+config ESPRESSIF_ADC_2_CH8
+	bool "Channel 8"
+	default n
+
+config ESPRESSIF_ADC_2_CH9
+	bool "Channel 9"
+	default n
+
+endmenu # ADC 2 Channel Selection
+
+endif  # ESPRESSIF_ADC_2
+
+endmenu  # ADC Configuration
+
 config ESP32_HAVE_OTA_PARTITION
 	bool
 	default n
diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs
index ba5e4dde38e..c0fd584a236 100644
--- a/arch/xtensa/src/esp32/Make.defs
+++ b/arch/xtensa/src/esp32/Make.defs
@@ -220,7 +220,7 @@ endif
 
 ESP_HAL_3RDPARTY_REPO   = esp-hal-3rdparty
 ifndef ESP_HAL_3RDPARTY_VERSION
-	ESP_HAL_3RDPARTY_VERSION = a461ca0750d1a3deca6b10a283064dbcd2b76fb1
+	ESP_HAL_3RDPARTY_VERSION = 3f02f2139e79ddc60f98ca35ed65c62c6914f079
 endif
 
 ifndef ESP_HAL_3RDPARTY_URL
diff --git a/arch/xtensa/src/esp32/hal.mk b/arch/xtensa/src/esp32/hal.mk
index 11cfbfe9439..6413887fdfe 100644
--- a/arch/xtensa/src/esp32/hal.mk
+++ b/arch/xtensa/src/esp32/hal.mk
@@ -27,6 +27,9 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)private_include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)include
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)interface
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_event$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
@@ -81,15 +84,19 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efus
 # Please note that the following source file depends on `CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD` and `CONFIG_SOC_EFUSE_CONSISTS_OF_ONE_KEY_BLOCK`
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)without_key_purposes$(DELIM)three_key_blocks$(DELIM)esp_efuse_api_key.c
 
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_cali_line_fitting.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_fields.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c
@@ -99,8 +106,11 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_init.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_wdt.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)brownout_hal.c
@@ -119,6 +129,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)i2c_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log_noos.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)gpio_periph.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ledc_periph.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)pcnt_periph.c
diff --git a/arch/xtensa/src/esp32s2/Kconfig b/arch/xtensa/src/esp32s2/Kconfig
index 58608a5c029..d1f83ed6602 100644
--- a/arch/xtensa/src/esp32s2/Kconfig
+++ b/arch/xtensa/src/esp32s2/Kconfig
@@ -1166,6 +1166,201 @@ config ESP32S2_LEDC_CHANNEL7_PIN
 
 endmenu # LEDC configuration
 
+menu "ADC Configuration"
+	depends on ESPRESSIF_ADC
+
+if ESPRESSIF_ADC_1
+
+config ESPRESSIF_ADC_1_DEVNAME
+	string "ADC 1 Device Name"
+	default "/dev/adc0"
+
+choice ESPRESSIF_ADC_1_ATTENUATION
+	prompt "ADC 1 Input Attenuation"
+	default ESPRESSIF_ADC_1_ATTEN_12
+	---help---
+		Select input attenuation for the ADC unit.
+		Relates to maximum measurable input voltage.
+		See ESP32 Technical Reference Manual for details.
+
+config ESPRESSIF_ADC_1_ATTEN_0
+	bool "0 dB (1.1 V)"
+
+config ESPRESSIF_ADC_1_ATTEN_2_5
+	bool "2.5 dB (1.47 V)"
+
+config ESPRESSIF_ADC_1_ATTEN_6
+	bool "6 dB (2.2 V)"
+
+config ESPRESSIF_ADC_1_ATTEN_12
+	bool "12 dB (4.4 V)"
+
+endchoice  # ESPRESSIF_ADC_1_ATTENUATION
+
+config ESPRESSIF_ADC_1_ATTENUATION
+	int
+	default 0 if ESPRESSIF_ADC_1_ATTEN_0
+	default 1 if ESPRESSIF_ADC_1_ATTEN_2_5
+	default 2 if ESPRESSIF_ADC_1_ATTEN_6
+	default 3 if ESPRESSIF_ADC_1_ATTEN_12
+
+choice ESPRESSIF_ADC_1_MODE
+	prompt "ADC 1 Mode"
+	default ESPRESSIF_ADC_1_MODE_ONE_SHOT
+	---help---
+		Select operating mode for ADC 1.
+
+config ESPRESSIF_ADC_1_MODE_ONE_SHOT
+	bool "One-Shot Mode"
+
+config ESPRESSIF_ADC_1_MODE_CONTINUOUS
+	bool "Continuous Mode"
+
+endchoice  # ESPRESSIF_ADC_1_MODE
+
+menu "ADC 1 Channel Selection"
+
+config ESPRESSIF_ADC_1_CH0
+	bool "Channel 0"
+	default y
+
+config ESPRESSIF_ADC_1_CH1
+	bool "Channel 1"
+	default y
+
+config ESPRESSIF_ADC_1_CH2
+	bool "Channel 2"
+	default y
+
+config ESPRESSIF_ADC_1_CH3
+	bool "Channel 3"
+	default y
+
+config ESPRESSIF_ADC_1_CH4
+	bool "Channel 4"
+	default n
+
+config ESPRESSIF_ADC_1_CH5
+	bool "Channel 5"
+	default n
+
+config ESPRESSIF_ADC_1_CH6
+	bool "Channel 6"
+	default n
+
+config ESPRESSIF_ADC_1_CH7
+	bool "Channel 7"
+	default n
+
+config ESPRESSIF_ADC_1_CH8
+	bool "Channel 8"
+	default n
+
+config ESPRESSIF_ADC_1_CH9
+	bool "Channel 9"
+	default n
+
+endmenu # ADC 1 Channel Selection
+
+endif  # ESPRESSIF_ADC_1
+
+if ESPRESSIF_ADC_2
+
+config ESPRESSIF_ADC_2_DEVNAME
+	string "ADC 2 Device Name"
+	default "/dev/adc1"
+
+choice ESPRESSIF_ADC_2_ATTENUATION
+	prompt "ADC 2 Input Attenuation"
+	default ESPRESSIF_ADC_2_ATTEN_12
+	---help---
+		Select input attenuation for the ADC unit.
+		Relates to maximum measurable input voltage (Vmax) and the internal ADC reference voltage (approx. 1100 mV).
+		See ESP32 Technical Reference Manual for details.
+
+config ESPRESSIF_ADC_2_ATTEN_0
+	bool "0 dB (1.1 V)"
+
+config ESPRESSIF_ADC_2_ATTEN_2_5
+	bool "2.5 dB (1.47 V)"
+
+config ESPRESSIF_ADC_2_ATTEN_6
+	bool "6 dB (2.2 V)"
+
+config ESPRESSIF_ADC_2_ATTEN_12
+	bool "12 dB (4.4 V)"
+
+endchoice  # ESPRESSIF_ADC_2_ATTENUATION
+
+config ESPRESSIF_ADC_2_ATTENUATION
+	int
+	default 0 if ESPRESSIF_ADC_2_ATTEN_0
+	default 1 if ESPRESSIF_ADC_2_ATTEN_2_5
+	default 2 if ESPRESSIF_ADC_2_ATTEN_6
+	default 3 if ESPRESSIF_ADC_2_ATTEN_12
+
+choice ESPRESSIF_ADC_2_MODE
+	prompt "ADC 2 Mode"
+	default ESPRESSIF_ADC_2_MODE_ONE_SHOT
+	---help---
+		Select operating mode for ADC 2.
+
+config ESPRESSIF_ADC_2_MODE_ONE_SHOT
+	bool "One-Shot Mode"
+
+config ESPRESSIF_ADC_2_MODE_CONTINUOUS
+	bool "Continuous Mode"
+
+endchoice  # ESPRESSIF_ADC_2_MODE
+
+menu "ADC 2 Channel Selection"
+
+config ESPRESSIF_ADC_2_CH0
+	bool "Channel 0"
+	default y
+
+config ESPRESSIF_ADC_2_CH1
+	bool "Channel 1"
+	default y
+
+config ESPRESSIF_ADC_2_CH2
+	bool "Channel 2"
+	default y
+
+config ESPRESSIF_ADC_2_CH3
+	bool "Channel 3"
+	default y
+
+config ESPRESSIF_ADC_2_CH4
+	bool "Channel 4"
+	default n
+
+config ESPRESSIF_ADC_2_CH5
+	bool "Channel 5"
+	default n
+
+config ESPRESSIF_ADC_2_CH6
+	bool "Channel 6"
+	default n
+
+config ESPRESSIF_ADC_2_CH7
+	bool "Channel 7"
+	default n
+
+config ESPRESSIF_ADC_2_CH8
+	bool "Channel 8"
+	default n
+
+config ESPRESSIF_ADC_2_CH9
+	bool "Channel 9"
+	default n
+
+endmenu # ADC 2 Channel Selection
+
+endif  # ESPRESSIF_ADC_2
+
+endmenu  # ADC Configuration
+
 menu "Bootloader and Image Configuration"
 
 config ESPRESSIF_SIMPLE_BOOT
diff --git a/arch/xtensa/src/esp32s2/Make.defs b/arch/xtensa/src/esp32s2/Make.defs
index 9654633f292..fc29a5a3652 100644
--- a/arch/xtensa/src/esp32s2/Make.defs
+++ b/arch/xtensa/src/esp32s2/Make.defs
@@ -143,7 +143,7 @@ endif
 
 ESP_HAL_3RDPARTY_REPO   = esp-hal-3rdparty
 ifndef ESP_HAL_3RDPARTY_VERSION
-	ESP_HAL_3RDPARTY_VERSION = a461ca0750d1a3deca6b10a283064dbcd2b76fb1
+	ESP_HAL_3RDPARTY_VERSION = 3f02f2139e79ddc60f98ca35ed65c62c6914f079
 endif
 
 ifndef ESP_HAL_3RDPARTY_URL
diff --git a/arch/xtensa/src/esp32s2/hal.mk b/arch/xtensa/src/esp32s2/hal.mk
index 4d0f4524e14..dfd0d341ae8 100644
--- a/arch/xtensa/src/esp32s2/hal.mk
+++ b/arch/xtensa/src/esp32s2/hal.mk
@@ -27,6 +27,9 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)private_include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)include
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)interface
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_event$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
@@ -73,14 +76,18 @@ ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)
 
 # Source files
 
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_cali_line_fitting.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_rtc_calib.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_rtc_table.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c
@@ -92,8 +99,11 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_phy$(DELIM)src$(DELIM)phy_common.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_regi2c_$(CHIP_SERIES).c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_wdt.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)wdt_hal_iram.c
@@ -114,6 +124,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)uart_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log_noos.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)gpio_periph.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ledc_periph.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)pcnt_periph.c
diff --git a/arch/xtensa/src/esp32s3/Kconfig b/arch/xtensa/src/esp32s3/Kconfig
index e5760b61318..0c555d90bd6 100644
--- a/arch/xtensa/src/esp32s3/Kconfig
+++ b/arch/xtensa/src/esp32s3/Kconfig
@@ -346,11 +346,68 @@ menu "ESP32-S3 Peripheral Selection"
 
 source "arch/xtensa/src/common/espressif/Kconfig"
 
+# Kept for backwards compatibility of the ADC driver
+
 config ESP32S3_ADC
-	bool "ADC"
-	default n
-	select ANALOG
-	select ADC
+	bool
+	select ESPRESSIF_ADC
+	select ESPRESSIF_ADC_1
+
+if ESP32S3_ADC
+
+config ESP32S3_ADC_VOL_950
+	bool
+
+config ESP32S3_ADC_VOL_1250
+	bool
+
+config ESP32S3_ADC_VOL_1750
+	bool
+
+config ESP32S3_ADC_VOL_3100
+	bool
+
+config ESP32S3_ADC1_CHANNEL0
+	bool
+	select ESPRESSIF_ADC_1_CH0
+
+config ESP32S3_ADC1_CHANNEL1
+	bool
+	select ESPRESSIF_ADC_1_CH1
+
+config ESP32S3_ADC1_CHANNEL2
+	bool
+	select ESPRESSIF_ADC_1_CH2
+
+config ESP32S3_ADC1_CHANNEL3
+	bool
+	select ESPRESSIF_ADC_1_CH3
+
+config ESP32S3_ADC1_CHANNEL4
+	bool
+	select ESPRESSIF_ADC_1_CH4
+
+config ESP32S3_ADC1_CHANNEL5
+	bool
+	select ESPRESSIF_ADC_1_CH5
+
+config ESP32S3_ADC1_CHANNEL6
+	bool
+	select ESPRESSIF_ADC_1_CH6
+
+config ESP32S3_ADC1_CHANNEL7
+	bool
+	select ESPRESSIF_ADC_1_CH7
+
+config ESP32S3_ADC1_CHANNEL8
+	bool
+	select ESPRESSIF_ADC_1_CH8
+
+config ESP32S3_ADC1_CHANNEL9
+	bool
+	select ESPRESSIF_ADC_1_CH9
+
+endif # ESP32S3_ADC
 
 config ESP32S3_UART
 	bool
@@ -1387,73 +1444,6 @@ endif # ESP32S3_UART2
 
 endmenu # UART Configuration
 
-menu "ADC Configuration"
-	depends on ESP32S3_ADC
-
-if ESP32S3_ADC
-
-choice ESP32S3_ADC_VOL_RANGES
-	prompt "ADC voltage ranges"
-	default ESP32S3_ADC_VOL_3100
-
-config ESP32S3_ADC_VOL_950
-	bool "0~950mV"
-
-config ESP32S3_ADC_VOL_1250
-	bool "0~1250mV"
-
-config ESP32S3_ADC_VOL_1750
-	bool "0~1750mV"
-
-config ESP32S3_ADC_VOL_3100
-	bool "0~3100mV"
-
-endchoice # ADC voltage ranges
-
-config ESP32S3_ADC1_CHANNEL0
-	bool "ADC1 channel 0"
-	default n
-
-config ESP32S3_ADC1_CHANNEL1
-	bool "ADC1 channel 1"
-	default n
-
-config ESP32S3_ADC1_CHANNEL2
-	bool "ADC1 channel 2"
-	default n
-
-config ESP32S3_ADC1_CHANNEL3
-	bool "ADC1 channel 3"
-	default n
-
-config ESP32S3_ADC1_CHANNEL4
-	bool "ADC1 channel 4"
-	default n
-
-config ESP32S3_ADC1_CHANNEL5
-	bool "ADC1 channel 5"
-	default n
-
-config ESP32S3_ADC1_CHANNEL6
-	bool "ADC1 channel 6"
-	default n
-
-config ESP32S3_ADC1_CHANNEL7
-	bool "ADC1 channel 7"
-	default n
-
-config ESP32S3_ADC1_CHANNEL8
-	bool "ADC1 channel 8"
-	default n
-
-config ESP32S3_ADC1_CHANNEL9
-	bool "ADC1 channel 9"
-	default n
-
-endif # ESP32S3_ADC
-
-endmenu # ADC Configuration
-
 menu "I2C Configuration"
 	depends on ESP32S3_I2C
 
@@ -2245,6 +2235,202 @@ config ESP_MCPWM_TEST_LOOPBACK
 
 endmenu # MCPWM Configuration
 
+menu "ADC Configuration"
+	depends on ESPRESSIF_ADC
+
+if ESPRESSIF_ADC_1
+
+config ESPRESSIF_ADC_1_DEVNAME
+	string "ADC 1 Device Name"
+	default "/dev/adc0"
+
+choice ESPRESSIF_ADC_1_ATTENUATION
+	prompt "ADC 1 Input Attenuation"
+	default ESPRESSIF_ADC_1_ATTEN_12
+	depends on !ESP32S3_ADC
+	---help---
+		Select input attenuation for the ADC unit.
+		Relates to maximum measurable input voltage.
+		See ESP32 Technical Reference Manual for details.
+
+config ESPRESSIF_ADC_1_ATTEN_0
+	bool "0 dB (1.1 V)"
+
+config ESPRESSIF_ADC_1_ATTEN_2_5
+	bool "2.5 dB (1.47 V)"
+
+config ESPRESSIF_ADC_1_ATTEN_6
+	bool "6 dB (2.2 V)"
+
+config ESPRESSIF_ADC_1_ATTEN_12
+	bool "12 dB (4.4 V)"
+
+endchoice  # ESPRESSIF_ADC_1_ATTENUATION
+
+config ESPRESSIF_ADC_1_ATTENUATION
+	int
+	default 0 if ESPRESSIF_ADC_1_ATTEN_0 || ESP32S3_ADC_VOL_950
+	default 1 if ESPRESSIF_ADC_1_ATTEN_2_5 || ESP32S3_ADC_VOL_1250
+	default 2 if ESPRESSIF_ADC_1_ATTEN_6 || ESP32S3_ADC_VOL_1750
+	default 3 if ESPRESSIF_ADC_1_ATTEN_12 || ESP32S3_ADC_VOL_3100
+
+choice ESPRESSIF_ADC_1_MODE
+	prompt "ADC 1 Mode"
+	default ESPRESSIF_ADC_1_MODE_ONE_SHOT
+	---help---
+		Select operating mode for ADC 1.
+
+config ESPRESSIF_ADC_1_MODE_ONE_SHOT
+	bool "One-Shot Mode"
+
+config ESPRESSIF_ADC_1_MODE_CONTINUOUS
+	bool "Continuous Mode"
+
+endchoice  # ESPRESSIF_ADC_1_MODE
+
+menu "ADC 1 Channel Selection"
+
+config ESPRESSIF_ADC_1_CH0
+	bool "Channel 0"
+	default y
+
+config ESPRESSIF_ADC_1_CH1
+	bool "Channel 1"
+	default y
+
+config ESPRESSIF_ADC_1_CH2
+	bool "Channel 2"
+	default y
+
+config ESPRESSIF_ADC_1_CH3
+	bool "Channel 3"
+	default y
+
+config ESPRESSIF_ADC_1_CH4
+	bool "Channel 4"
+	default n
+
+config ESPRESSIF_ADC_1_CH5
+	bool "Channel 5"
+	default n
+
+config ESPRESSIF_ADC_1_CH6
+	bool "Channel 6"
+	default n
+
+config ESPRESSIF_ADC_1_CH7
+	bool "Channel 7"
+	default n
+
+config ESPRESSIF_ADC_1_CH8
+	bool "Channel 8"
+	default n
+
+config ESPRESSIF_ADC_1_CH9
+	bool "Channel 9"
+	default n
+
+endmenu # ADC 1 Channel Selection
+
+endif  # ESPRESSIF_ADC_1
+
+if ESPRESSIF_ADC_2
+
+config ESPRESSIF_ADC_2_DEVNAME
+	string "ADC 2 Device Name"
+	default "/dev/adc1"
+
+choice ESPRESSIF_ADC_2_ATTENUATION
+	prompt "ADC 2 Input Attenuation"
+	default ESPRESSIF_ADC_2_ATTEN_12
+	---help---
+		Select input attenuation for the ADC unit.
+		Relates to maximum measurable input voltage (Vmax) and the internal ADC reference voltage (approx. 1100 mV).
+		See ESP32 Technical Reference Manual for details.
+
+config ESPRESSIF_ADC_2_ATTEN_0
+	bool "0 dB (1.1 V)"
+
+config ESPRESSIF_ADC_2_ATTEN_2_5
+	bool "2.5 dB (1.47 V)"
+
+config ESPRESSIF_ADC_2_ATTEN_6
+	bool "6 dB (2.2 V)"
+
+config ESPRESSIF_ADC_2_ATTEN_12
+	bool "12 dB (4.4 V)"
+
+endchoice  # ESPRESSIF_ADC_2_ATTENUATION
+
+config ESPRESSIF_ADC_2_ATTENUATION
+	int
+	default 0 if ESPRESSIF_ADC_2_ATTEN_0
+	default 1 if ESPRESSIF_ADC_2_ATTEN_2_5
+	default 2 if ESPRESSIF_ADC_2_ATTEN_6
+	default 3 if ESPRESSIF_ADC_2_ATTEN_12
+
+choice ESPRESSIF_ADC_2_MODE
+	prompt "ADC 2 Mode"
+	default ESPRESSIF_ADC_2_MODE_ONE_SHOT
+	---help---
+		Select operating mode for ADC 2.
+
+config ESPRESSIF_ADC_2_MODE_ONE_SHOT
+	bool "One-Shot Mode"
+
+config ESPRESSIF_ADC_2_MODE_CONTINUOUS
+	bool "Continuous Mode"
+
+endchoice  # ESPRESSIF_ADC_2_MODE
+
+menu "ADC 2 Channel Selection"
+
+config ESPRESSIF_ADC_2_CH0
+	bool "Channel 0"
+	default y
+
+config ESPRESSIF_ADC_2_CH1
+	bool "Channel 1"
+	default y
+
+config ESPRESSIF_ADC_2_CH2
+	bool "Channel 2"
+	default y
+
+config ESPRESSIF_ADC_2_CH3
+	bool "Channel 3"
+	default y
+
+config ESPRESSIF_ADC_2_CH4
+	bool "Channel 4"
+	default n
+
+config ESPRESSIF_ADC_2_CH5
+	bool "Channel 5"
+	default n
+
+config ESPRESSIF_ADC_2_CH6
+	bool "Channel 6"
+	default n
+
+config ESPRESSIF_ADC_2_CH7
+	bool "Channel 7"
+	default n
+
+config ESPRESSIF_ADC_2_CH8
+	bool "Channel 8"
+	default n
+
+config ESPRESSIF_ADC_2_CH9
+	bool "Channel 9"
+	default n
+
+endmenu # ADC 2 Channel Selection
+
+endif  # ESPRESSIF_ADC_2
+
+endmenu  # ADC Configuration
+
 menu "USB OTG Configuration"
 	depends on ESP32S3_OTG
 
diff --git a/arch/xtensa/src/esp32s3/Make.defs b/arch/xtensa/src/esp32s3/Make.defs
index c85279e25c7..b8dc85b316c 100644
--- a/arch/xtensa/src/esp32s3/Make.defs
+++ b/arch/xtensa/src/esp32s3/Make.defs
@@ -105,10 +105,6 @@ ifeq ($(CONFIG_ESP32S3_RT_TIMER),y)
 CHIP_CSRCS += esp32s3_rt_timer.c
 endif
 
-ifeq ($(CONFIG_ESP32S3_ADC),y)
-CHIP_CSRCS += esp32s3_adc.c
-endif
-
 ifeq ($(CONFIG_ESP32S3_I2C),y)
 ifeq ($(CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE),y)
 CHIP_CSRCS += esp32s3_i2c.c
diff --git a/arch/xtensa/src/esp32s3/esp32s3_adc.c b/arch/xtensa/src/esp32s3/esp32s3_adc.c
deleted file mode 100644
index ce87f13ff40..00000000000
--- a/arch/xtensa/src/esp32s3/esp32s3_adc.c
+++ /dev/null
@@ -1,944 +0,0 @@
-/****************************************************************************
- * arch/xtensa/src/esp32s3/esp32s3_adc.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <inttypes.h>
-#include <stdint.h>
-#include <sys/param.h>
-#include <assert.h>
-#include <debug.h>
-
-#include <nuttx/mutex.h>
-
-#include "esp32s3_gpio.h"
-#include "esp32s3_dma.h"
-#include "esp32s3_irq.h"
-#include "esp32s3_adc.h"
-
-#include "xtensa.h"
-#include "hardware/esp32s3_system.h"
-#include "hardware/esp32s3_efuse.h"
-#include "hardware/esp32s3_sens.h"
-#include "hardware/esp32s3_gpio_sigmap.h"
-#include "hardware/regi2c_ctrl.h"
-#include "hardware/regi2c_saradc.h"
-#include "hardware/esp32s3_rtc_io.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* ADC calibration max count */
-
-#define ADC_CAL_CNT_MAX         (32)
-
-/* ADC calibration max value */
-
-#define ADC_CAL_VAL_MAX         (4096 - 1)
-
-/* ADC calibration sampling channel */
-
-#define ADC_CAL_CHANNEL         (0xf)
-
-/* ADC max value mask */
-
-#define ADC_VAL_MASK            (0xfff)
-
-#define ADC_CAL_BASE_REG        EFUSE_RD_SYS_PART1_DATA0_REG
-
-#define ADC_CAL_VER_OFF         (128)
-#define ADC_CAL_VER_LEN         (2)
-
-#define ADC_CAL_DATA_COMP       (1550)
-
-#define ADC_CAL_VOL_LEN         (8)
-
-/* ADC input voltage attenuation, this affects measuring range */
-
-#define ADC_ATTEN_DB_0          (0)     /* Vmax = 950 mV  */
-#define ADC_ATTEN_DB_2_5        (1)     /* Vmax = 1250 mV */
-#define ADC_ATTEN_DB_6          (2)     /* Vmax = 1750 mV */
-#define ADC_ATTEN_DB_12         (3)     /* Vmax = 3100 mV */
-
-/* ADC attenuation */
-
-#if defined(CONFIG_ESP32S3_ADC_VOL_950)
-#  define ADC_ATTEN_DEF         ADC_ATTEN_DB_0
-#  define ADC_CAL_DATA_LEN        (8)
-
-#  define ADC_CAL_DATA_OFF      (149)
-#  define ADC_CAL_VOL_OFF       (201)
-
-#  define ADC_CAL_VOL_DEF       (488)
-#elif defined(CONFIG_ESP32S3_ADC_VOL_1250)
-#  define ADC_ATTEN_DEF         ADC_ATTEN_DB_2_5
-#  define ADC_CAL_DATA_LEN        (6)
-
-#  define ADC_CAL_DATA_OFF      (157)
-#  define ADC_CAL_VOL_OFF       (209)
-
-#  define ADC_CAL_VOL_DEF       (641)
-#elif defined(CONFIG_ESP32S3_ADC_VOL_1750)
-#  define ADC_ATTEN_DEF         ADC_ATTEN_DB_6
-#  define ADC_CAL_DATA_LEN        (6)
-
-#  define ADC_CAL_DATA_OFF      (163)
-#  define ADC_CAL_VOL_OFF       (217)
-
-#  define ADC_CAL_VOL_DEF       (892)
-#elif defined(CONFIG_ESP32S3_ADC_VOL_3100)
-#  define ADC_ATTEN_DEF         ADC_ATTEN_DB_12
-#  define ADC_CAL_DATA_LEN        (6)
-
-#  define ADC_CAL_DATA_OFF      (169)
-#  define ADC_CAL_VOL_OFF       (225)
-
-#  define ADC_CAL_VOL_DEF       (1592)
-#endif
-
-#define setbits(bs, a)     modifyreg32(a, 0, bs)
-#define resetbits(bs, a)   modifyreg32(a, bs, 0)
-
-/****************************************************************************
- * Private Types
- ****************************************************************************/
-
-/* ADC Private Data */
-
-struct adc_chan_s
-{
-  uint32_t ref;           /* Reference count */
-
-  const uint8_t channel;  /* Channel number */
-  const uint8_t pin;      /* GPIO pin number */
-
-  const struct adc_callback_s *cb;  /* Upper driver callback */
-};
-
-/****************************************************************************
- * Private Function Prototypes
- ****************************************************************************/
-
-static int  adc_bind(struct adc_dev_s *dev,
-                     const struct adc_callback_s *callback);
-static void adc_reset(struct adc_dev_s *dev);
-static int  adc_setup(struct adc_dev_s *dev);
-static void adc_shutdown(struct adc_dev_s *dev);
-static void adc_rxint(struct adc_dev_s *dev, bool enable);
-static int  adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg);
-
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-/* ADC interface operations */
-
-static const struct adc_ops_s g_adcops =
-{
-  .ao_bind        = adc_bind,
-  .ao_reset       = adc_reset,
-  .ao_setup       = adc_setup,
-  .ao_shutdown    = adc_shutdown,
-  .ao_rxint       = adc_rxint,
-  .ao_ioctl       = adc_ioctl,
-};
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL0
-static struct adc_chan_s g_adc1_chan0 =
-{
-  .channel = 0,
-  .pin = 1
-};
-#endif
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL1
-static struct adc_chan_s g_adc1_chan1 =
-{
-  .channel = 1,
-  .pin = 2
-};
-#endif
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL2
-static struct adc_chan_s g_adc1_chan2 =
-{
-  .channel = 2,
-  .pin = 3
-};
-#endif
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL3
-static struct adc_chan_s g_adc1_chan3 =
-{
-  .channel = 3,
-  .pin = 4
-};
-#endif
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL4
-static struct adc_chan_s g_adc1_chan4 =
-{
-  .channel = 4,
-  .pin = 5
-};
-#endif
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL5
-static struct adc_chan_s g_adc1_chan5 =
-{
-  .channel = 5,
-  .pin = 6
-};
-#endif
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL6
-static struct adc_chan_s g_adc1_chan6 =
-{
-  .channel = 6,
-  .pin = 7
-};
-#endif
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL7
-static struct adc_chan_s g_adc1_chan7 =
-{
-  .channel = 7,
-  .pin = 8
-};
-#endif
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL8
-static struct adc_chan_s g_adc1_chan8 =
-{
-  .channel = 8,
-  .pin = 9
-};
-#endif
-
-#ifdef CONFIG_ESP32S3_ADC1_CHANNEL9
-static struct adc_chan_s g_adc1_chan9 =
-{
-  .channel = 9,
-  .pin = 10
-};
-#endif
-
-/* ADC calibration mark */
-
-static bool g_adc_switch;
-
-/* ADC calibration mark */
-
-static bool g_calibrated;
-
-/* ADC calibration digital parameter */
-
-static uint16_t g_cal_digit;
-
-/* ADC clock reference */
-
-static uint32_t g_clk_ref;
-
-static mutex_t g_lock = NXMUTEX_INITIALIZER;
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: read_efuse
- *
- * Description:
- *   Read Efuse data.
- *
- * Input Parameters:
- *   addr   - register address
- *   b_off  - bit offset
- *   b_size - bit size
- *
- * Returned Value:
- *  Efuse data.
- *
- ****************************************************************************/
-
-static uint32_t read_efuse(uint32_t addr, uint32_t b_off, uint32_t b_size)
-{
-  uint32_t data;
-  uint32_t regval;
-  uint32_t shift = 32 - b_size;
-  uint32_t mask = UINT32_MAX >> shift;
-  uint32_t res = b_off % 32;
-  uint32_t regaddr = addr + (b_off / 32 * 4);
-
-  regval = getreg32(regaddr);
-  data = regval >> res;
-  if (res <= shift)
-    {
-      data &= mask;
-    }
-  else
-    {
-      shift = 32 - res;
-
-      regval = getreg32(regaddr + 4);
-      data |= (regval & (mask >> shift)) << shift;
-    }
-
-  return data;
-}
-
-/****************************************************************************
- * Name: adc_enable_clk
- *
- * Description:
- *   Enable ADC clock.
- *
- * Input Parameters:
- *   NOne
- *
- * Returned Value:
- *   None.
- *
- ****************************************************************************/
-
-static void adc_enable_clk(void)
-{
-  irqstate_t flags;
-
-  flags = enter_critical_section();
-
-  if (!g_clk_ref)
-    {
-      setbits(SENS_SARADC_CLK_EN, SENS_SAR_PERI_CLK_GATE_CONF_REG);
-    }
-
-  g_clk_ref++;
-
-  leave_critical_section(flags);
-}
-
-/****************************************************************************
- * Name: adc_disable_clk
- *
- * Description:
- *   Disable ADC clock.
- *
- * Input Parameters:
- *   NOne
- *
- * Returned Value:
- *   None.
- *
- ****************************************************************************/
-
-static void adc_disable_clk(void)
-{
-  irqstate_t flags;
-
-  flags = enter_critical_section();
-
-  g_clk_ref--;
-
-  if (!g_clk_ref)
-    {
-      resetbits(SENS_SARADC_CLK_EN, SENS_SAR_PERI_CLK_GATE_CONF_REG);
-    }
-
-  leave_critical_section(flags);
-}
-
-/****************************************************************************
- * Name: adc_set_calibration
- *
- * Description:
- *   Set calibration parameter to ADC hardware.
- *
- * Input Parameters:
- *   data - Calibration parameter
- *
- * Returned Value:
- *   None.
- *
- ****************************************************************************/
-
-static void adc_set_calibration(uint16_t data)
-{
-  uint8_t h_data = data >> 8;
-  uint8_t l_data = data & 0xff;
-
-  esp_rom_regi2c_write_mask(I2C_ADC, I2C_ADC_HOSTID,
-                        I2C_ADC1_INITVAL_H,
-                        I2C_ADC1_INITVAL_H_MSB,
-                        I2C_ADC1_INITVAL_H_LSB, h_data);
-
-  esp_rom_regi2c_write_mask(I2C_ADC, I2C_ADC_HOSTID,
-                        I2C_ADC1_INITVAL_L,
-                        I2C_ADC1_INITVAL_L_MSB,
-                        I2C_ADC1_INITVAL_L_LSB, l_data);
-}
-
-/****************************************************************************
- * Name: adc_samplecfg
- *
- * Description:
- *   Set ADC sampling with given channel.
- *
- * Input Parameters:
- *   channel - Sampling channel number
- *
- * Returned Value:
- *   None.
- *
- ****************************************************************************/
-
-static inline void adc_samplecfg(int channel)
-{
-  uint32_t regval;
-
-  /* set (Frequency division) (inversion adc) */
-
-  regval = getreg32(SENS_SAR_READER1_CTRL_REG);
-  regval &= ~(SENS_SAR1_CLK_DIV_M);
-  regval |= (1 << SENS_SAR1_CLK_DIV_S);
-  putreg32(regval, SENS_SAR_READER1_CTRL_REG);
-
-  /* Enable ADC1, its sampling attenuation */
-
-  regval = getreg32(SENS_SAR_ATTEN1_REG);
-  regval &= ~(ADC_ATTEN_DEF << (channel * 2));
-  regval |= ADC_ATTEN_DEF << (channel * 2);
-  putreg32(regval, SENS_SAR_ATTEN1_REG);
-
-  /* Enable ADC1, its sampling channel and attenuation */
-
-  regval  = getreg32(SENS_SAR_MEAS1_CTRL2_REG);
-  regval &= ~(SENS_SAR1_EN_PAD_M | SENS_SAR1_EN_PAD_FORCE_M |
-              SENS_MEAS1_START_FORCE_M);
-  regval |= ((1 << channel) << SENS_SAR1_EN_PAD_S) |
-              SENS_SAR1_EN_PAD_FORCE | SENS_MEAS1_START_FORCE;
-  putreg32(regval, SENS_SAR_MEAS1_CTRL2_REG);
-}
-
-/****************************************************************************
- * Name: adc_read
- *
- * Description:
- *   Start ADC sampling and read ADC value.
- *
- * Input Parameters:
- *   None
- *
- * Returned Value:
- *   Read ADC value.
- *
- ****************************************************************************/
-
-static uint16_t adc_read(void)
-{
-  uint16_t adc;
-  uint32_t regval;
-
-  /* Trigger ADC1 sampling */
-
-  setbits(SENS_MEAS1_START_SAR, SENS_SAR_MEAS1_CTRL2_REG);
-
-  /* Wait until ADC1 sampling is done */
-
-  do
-    {
-      regval = getreg32(SENS_SAR_MEAS1_CTRL2_REG);
-    }
-  while (!(regval & SENS_MEAS1_DONE_SAR_M));
-
-  regval = getreg32(SENS_SAR_MEAS1_CTRL2_REG) & ADC_VAL_MASK;
-  ainfo("SENS_MEAS1_DATA_SAR adc_read: %d\n", regval);
-
-  /* Disable ADC sampling */
-
-  resetbits(SENS_MEAS1_START_SAR, SENS_SAR_MEAS1_CTRL2_REG);
-
-  return regval;
-}
-
-/****************************************************************************
- * Name: adc_calibrate
- *
- * Description:
- *   ADC calibration.
- *
- * Input Parameters:
- *   None
- *
- * Returned Value:
- *   None.
- *
- ****************************************************************************/
-
-static void adc_calibrate(void)
-{
-  uint16_t cali_val;
-  uint16_t adc;
-  uint16_t adc_max = 0;
-  uint16_t adc_min = UINT16_MAX;
-  uint32_t adc_sum = 0;
-  uint32_t regval;
-
-  regval = read_efuse(ADC_CAL_BASE_REG, ADC_CAL_VER_OFF, ADC_CAL_VER_LEN);
-  if (regval == 1)
-    {
-      ainfo("Calibrate based on efuse data\n");
-
-      regval = read_efuse(ADC_CAL_BASE_REG, ADC_CAL_DATA_OFF,
-                          ADC_CAL_DATA_LEN);
-      cali_val = regval + ADC_CAL_DATA_COMP;
-    }
-  else
-    {
-      ainfo("Calibrate based on GND voltage\n");
-
-      /* Enable Vdef */
-
-      esp_rom_regi2c_write_mask(I2C_ADC, I2C_ADC_HOSTID,
-                            I2C_ADC1_DEF, I2C_ADC1_DEF_MSB,
-                            I2C_ADC1_DEF_LSB, 1);
-
-      /* Start sampling */
-
-      adc_samplecfg(ADC_CAL_CHANNEL);
-
-      /* Enable internal connect GND (for calibration). */
-
-      esp_rom_regi2c_write_mask(I2C_ADC, I2C_ADC_HOSTID,
-                            I2C_ADC1_ENCAL_GND, I2C_ADC1_ENCAL_GND_MSB,
-                            I2C_ADC1_ENCAL_GND_LSB, 1);
-
-      for (int i = 1; i < ADC_CAL_CNT_MAX ; i++)
-        {
-          adc_set_calibration(0);
-          adc = adc_read();
-
-          adc_sum += adc;
-          adc_max  = MAX(adc, adc_max);
-          adc_min  = MIN(adc, adc_min);
-        }
-
-      cali_val = (adc_sum - adc_max - adc_min) / (ADC_CAL_CNT_MAX - 2);
-
-      /* Disable internal connect GND (for calibration). */
-
-      esp_rom_regi2c_write_mask(I2C_ADC, I2C_ADC_HOSTID,
-                            I2C_ADC1_ENCAL_GND,
-                            I2C_ADC1_ENCAL_GND_MSB,
-                            I2C_ADC1_ENCAL_GND_LSB, 0);
-    }
-
-  ainfo("calibration value: %" PRIu16 "\n", cali_val);
-
-  /* Set final calibration parameters */
-
-  adc_set_calibration(cali_val);
-
-  /* Set calibration digital parameters */
-
-  regval = read_efuse(ADC_CAL_BASE_REG, ADC_CAL_VOL_OFF, ADC_CAL_VOL_LEN);
-  if (regval & BIT(ADC_CAL_VOL_LEN - 1))
-    {
-      g_cal_digit = 2000 - (regval & ~(BIT(ADC_CAL_VOL_LEN - 1)));
-    }
-  else
-    {
-      g_cal_digit = 2000 + regval;
-    }
-
-  ainfo("calibration read_efuse g_cal_digit: %" PRIu16 "\n", g_cal_digit);
-}
-
-/****************************************************************************
- * Name: adc_read_work
- *
- * Description:
- *   Read ADC value and pass it to up.
- *
- * Input Parameters:
- *   dev - ADC device pointer
- *
- * Returned Value:
- *   None.
- *
- ****************************************************************************/
-
-static void adc_read_work(struct adc_dev_s *dev)
-{
-  int ret;
-  uint32_t value;
-  int32_t adc;
-  struct adc_chan_s *priv = (struct adc_chan_s *)dev->ad_priv;
-
-  ret = nxmutex_lock(&g_lock);
-  if (ret < 0)
-    {
-      aerr("Failed to lock ret=%d\n", ret);
-      return;
-    }
-
-  adc_samplecfg(priv->channel);
-  value = adc_read();
-
-  adc = (int32_t)(value * (UINT16_MAX * ADC_CAL_VOL_DEF / g_cal_digit) /
-                  UINT16_MAX);
-
-  priv->cb->au_receive(dev, priv->channel, adc);
-
-  ainfo("channel: %" PRIu8 ", voltage: %" PRIu32 " mV\n", priv->channel,
-        adc);
-
-  nxmutex_unlock(&g_lock);
-}
-
-/****************************************************************************
- * Name: adc_bind
- *
- * Description:
- *   Bind the upper-half driver callbacks to the lower-half implementation.
- *   This must be called early in order to receive ADC event notifications.
- *
- ****************************************************************************/
-
-static int adc_bind(struct adc_dev_s *dev,
-                    const struct adc_callback_s *callback)
-{
-  struct adc_chan_s *priv = (struct adc_chan_s *)dev->ad_priv;
-
-  DEBUGASSERT(priv != NULL);
-
-  ainfo("channel: %" PRIu8 "\n", priv->channel);
-
-  priv->cb = callback;
-
-  return OK;
-}
-
-/****************************************************************************
- * Name: adc_reset
- *
- * Description:
- *   Reset the ADC device.  Called early to initialize the hardware.
- *   This is called, before adc_setup() and on error conditions.
- *
- * Input Parameters:
- *
- * Returned Value:
- *
- ****************************************************************************/
-
-static void adc_reset(struct adc_dev_s *dev)
-{
-  irqstate_t flags;
-  struct adc_chan_s *priv = (struct adc_chan_s *)dev->ad_priv;
-
-  ainfo("channel: %" PRIu8 "\n", priv->channel);
-
-  flags = enter_critical_section();
-
-  /* Do nothing if ADC instance is currently in use */
-
-  if (priv->ref > 0)
-    {
-      goto out;
-    }
-
-  /* Reset ADC hardware */
-
-  adc_enable_clk();
-
-  adc_disable_clk();
-
-out:
-  leave_critical_section(flags);
-}
-
-/****************************************************************************
- * Name: adc_setup
- *
- * Description:
- *   Configure the ADC. This method is called the first time that the ADC
- *   device is opened.  This will occur when the port is first opened.
- *   This setup includes configuring.
- *
- * Input Parameters:
- *
- * Returned Value:
- *
- ****************************************************************************/
-
-static int adc_setup(struct adc_dev_s *dev)
-{
-  int ret;
-  uint32_t regval;
-  struct adc_chan_s *priv = (struct adc_chan_s *)dev->ad_priv;
-
-  ainfo("channel: %" PRIu8 "\n", priv->channel);
-
-  /* Do nothing when the ADC device is already set up */
-
-  if (priv->ref > 0)
-    {
-      priv->ref++;
-      return OK;
-    }
-
-  /* Enable ADC clock */
-
-  adc_enable_clk();
-
-  /* Disable GPIO input and output */
-
-  ainfo("pin: %" PRIu8 "\n", priv->pin);
-
-  esp32s3_configgpio(priv->pin, INPUT | FUNCTION_1);
-
-  /* Start calibration only once  */
-
-  ret = nxmutex_lock(&g_lock);
-  if (ret < 0)
-    {
-      adc_disable_clk();
-      aerr("Failed to lock ret=%d\n", ret);
-      return ret;
-    }
-
-  if (!g_calibrated)
-    {
-      adc_calibrate();
-      g_calibrated = true;
-    }
-
-  nxmutex_unlock(&g_lock);
-
-  /* The ADC device is ready */
-
-  priv->ref++;
-
-  return OK;
-}
-
-/****************************************************************************
- * Name: adc_rxint
- *
- * Description:
- *   Call to enable or disable RX interrupts.
- *
- * Input Parameters:
- *
- * Returned Value:
- *
- ****************************************************************************/
-
-static void adc_rxint(struct adc_dev_s *dev, bool enable)
-{
-}
-
-/****************************************************************************
- * Name: adc_ioctl
- *
- * Description:
- *   All ioctl calls will be routed through this method.
- *
- * Input Parameters:
- *   dev - pointer to device structure used by the driver
- *   cmd - command
- *   arg - arguments passed with command
- *
- * Returned Value:
- *
- ****************************************************************************/
-
-static int adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
-{
-  int ret;
-  struct adc_chan_s *priv = (struct adc_chan_s *)dev->ad_priv;
-
-  ainfo("channel: %" PRIu8 " cmd=%d\n", priv->channel, cmd);
-
-  switch (cmd)
-    {
-      case ANIOC_TRIGGER:
-        {
-          /* Start sampling and read ADC value here */
-
-          adc_read_work(dev);
-          ret = OK;
-        }
-      break;
-
-      case ANIOC_GET_NCHANNELS:
-        {
-          /* Return the number of configured channels */
-
-          ret = priv->channel;
-        }
-        break;
-
-      default:
-        {
-          aerr("ERROR: Unknown cmd: %d\n", cmd);
-          ret = -ENOTTY;
-        }
-        break;
-    }
-
-  return ret;
-}
-
-/****************************************************************************
- * Name: adc_shutdown
- *
- * Description:
- *   Disable the ADC.  This method is called when the ADC device is closed.
- *   This method reverses the operation the setup method.
- *
- * Input Parameters:
- *
- * Returned Value:
- *
- ****************************************************************************/
-
-static void adc_shutdown(struct adc_dev_s *dev)
-{
-  struct adc_chan_s *priv = (struct adc_chan_s *)dev->ad_priv;
-
-  ainfo("channel: %" PRIu8 "\n", priv->channel);
-
-  /* Decrement count only when ADC device is in use */
-
-  if (priv->ref > 0)
-    {
-      priv->ref--;
-
-  /* Shutdown the ADC device only when not in use */
-
-      if (!priv->ref)
-        {
-          adc_rxint(dev, false);
-
-          /* Disable ADC clock */
-
-          adc_disable_clk();
-        }
-    }
-}
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name: esp32s3_adc_init
- *
- * Description:
- *   Initialize the ADC.
- *
- * Input Parameters:
- *   adc_index - ADC channel number
- *   dev       - pointer to device structure used by the driver
- *
- * Returned Value:
- *
- ****************************************************************************/
-
-void esp32s3_adc_init(int adc_index, struct adc_dev_s *dev)
-{
-  ainfo("ADC index: %" PRIu8 "\n",  adc_index);
-
-  dev->ad_ops = &g_adcops;
-
-  switch (adc_index)
-    {
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL0)
-      case 0:
-          dev->ad_priv = &g_adc1_chan0;
-        break;
-#endif
-
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL1)
-      case 1:
-          dev->ad_priv = &g_adc1_chan1;
-        break;
-#endif
-
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL2)
-      case 2:
-          dev->ad_priv = &g_adc1_chan2;
-        break;
-#endif
-
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL3)
-      case 3:
-          dev->ad_priv = &g_adc1_chan3;
-        break;
-#endif
-
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL4)
-      case 4:
-          dev->ad_priv = &g_adc1_chan4;
-        break;
-#endif
-
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL5)
-      case 5:
-          dev->ad_priv = &g_adc1_chan5;
-        break;
-#endif
-
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL6)
-      case 6:
-          dev->ad_priv = &g_adc1_chan6;
-        break;
-#endif
-
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL7)
-      case 7:
-          dev->ad_priv = &g_adc1_chan7;
-        break;
-#endif
-
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL8)
-      case 8:
-          dev->ad_priv = &g_adc1_chan8;
-        break;
-#endif
-
-#if defined(CONFIG_ESP32S3_ADC1_CHANNEL9)
-      case 9:
-          dev->ad_priv = &g_adc1_chan9;
-        break;
-#endif
-
-      default:
-        {
-          aerr("ERROR: No ADC interface defined\n");
-        }
-    }
-}
diff --git a/arch/xtensa/src/esp32s3/hal.mk b/arch/xtensa/src/esp32s3/hal.mk
index 9d7642a9893..4ad40f2b8e5 100644
--- a/arch/xtensa/src/esp32s3/hal.mk
+++ b/arch/xtensa/src/esp32s3/hal.mk
@@ -27,6 +27,9 @@ INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)private_include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)include
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)interface
+INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_coex$(DELIM)include
 INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_event$(DELIM)include
@@ -75,6 +78,9 @@ ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)
 
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali_curve_fitting.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)curve_fitting_coefficients.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_api.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_utility.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_fields.c
@@ -82,12 +88,14 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efus
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)src$(DELIM)esp_err_to_name.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c
@@ -104,8 +112,11 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_wdt.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_cache_esp32s2_esp32s3.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_efuse.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_hal_common.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)adc_oneshot_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)brownout_hal.c
@@ -128,6 +139,7 @@ CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log_noos.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)log.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)gdma_periph.c
+CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)gpio_periph.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ledc_periph.c
 CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)pcnt_periph.c