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Fix/update some STR7 configurations

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This commit is contained in:
Gregory Nutt
2015-07-01 19:18:51 -06:00
parent d96365b048
commit 9774ebc568
3 changed files with 242 additions and 161 deletions
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configs/olimex-strp711/nettest/defconfig
+227 -153
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File diff suppressed because it is too large Load Diff
configs/olimex-strp711/src/str71_enc28j60.c
+3 -4
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@@ -74,7 +74,6 @@
* interrupt conflict with TMR1. * interrupt conflict with TMR1.
*/ */
/**************************************************************************** /****************************************************************************
* Included Files * Included Files
****************************************************************************/ ****************************************************************************/
@@ -85,10 +84,10 @@
#include <stdio.h> #include <stdio.h>
#include <debug.h> #include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/spi/spi.h> #include <nuttx/spi/spi.h>
#include <nuttx/net/enc28j60.h> #include <nuttx/net/enc28j60.h>
#include <arch/irq.h>
#include <arch/board/board.h> #include <arch/board/board.h>
#include "chip.h" #include "chip.h"
@@ -164,7 +163,7 @@ static void up_disable(FAR const struct enc_lower_s *lower);
****************************************************************************/ ****************************************************************************/
/* The ENC28J60 normal provides interrupts to the MCU via a GPIO pin. The /* The ENC28J60 normal provides interrupts to the MCU via a GPIO pin. The
* following structure provides an MCU-independent mechanixm for controlling * following structure provides an MCU-independent mechanism for controlling
* the ENC28J60 GPIO interrupt. * the ENC28J60 GPIO interrupt.
*/ */
@@ -185,7 +184,7 @@ static const struct enc_lower_s g_enclower =
static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler) static int up_attach(FAR const struct enc_lower_s *lower, xcpt_t handler)
{ {
return irq_attach(ENC28J60_IRQ, handler) return irq_attach(ENC28J60_IRQ, handler);
} }
static void up_enable(FAR const struct enc_lower_s *lower) static void up_enable(FAR const struct enc_lower_s *lower)
configs/olimex-strp711/src/str71_spi.c
+12 -4
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@@ -191,6 +191,11 @@
# define BSPI0_GPIO0_ALL (BSPI0_GPIO0_ALT|ENC_GPIO0_ALL) # define BSPI0_GPIO0_ALL (BSPI0_GPIO0_ALT|ENC_GPIO0_ALL)
#else #else
# ifdef CONFIG_STR71X_BSPI0
# warning "CONFIG_STR71X_BSPI0 has no function in this configuration"
# undef CONFIG_STR71X_BSPI0
# endif
# define BSPI0_GPIO0_INTTL (0) # define BSPI0_GPIO0_INTTL (0)
# define BSPI0_GPIO0_INCMOS (0) # define BSPI0_GPIO0_INCMOS (0)
# define BSPI0_GPIO0_OUTPP (0) # define BSPI0_GPIO0_OUTPP (0)
@@ -429,16 +434,16 @@ static struct str71x_spidev_s g_spidev0 =
{ {
.spidev = { &g_spiops }, .spidev = { &g_spiops },
.spibase = STR71X_BSPI0_BASE, .spibase = STR71X_BSPI0_BASE,
.csbit = MMCSD_GPIO0_CS .csbit = ENC_GPIO0_CS
}; };
#endif #endif
#if defined(CONFIG_STR71X_BSPI1) && defined(CONFIG_ENC28J60) #ifdef CONFIG_STR71X_BSPI1
static struct str71x_spidev_s g_spidev1 = static struct str71x_spidev_s g_spidev1 =
{ {
.spidev = { &g_spiops }, .spidev = { &g_spiops },
.spibase = STR71X_BSPI1_BASE, .spibase = STR71X_BSPI1_BASE,
.csbit = ENC_GPIO0_CS .csbit = MMCSD_GPIO0_CS
}; };
#endif #endif
@@ -934,8 +939,10 @@ static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t bu
FAR struct spi_dev_s *up_spiinitialize(int port) FAR struct spi_dev_s *up_spiinitialize(int port)
{ {
FAR struct spi_dev_s *ret; FAR struct spi_dev_s *ret;
irqstate_t flags; #if defined(CONFIG_STR71X_BSPI0) || defined(CONFIG_STR71X_BSPI1)
uint16_t reg16; uint16_t reg16;
#endif
irqstate_t flags;
flags = irqsave(); flags = irqsave();
#ifdef CONFIG_STR71X_BSPI0 #ifdef CONFIG_STR71X_BSPI0
@@ -1114,6 +1121,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
{ {
ret = NULL; ret = NULL;
} }
irqrestore(flags); irqrestore(flags);
return ret; return ret;
} }