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arch/imx9/enet: Add MII clock calculation

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Add MII clock calculation from root clock
Remove MII clock divider define

Signed-off-by: Ari Kimari <ari.kimari@tii.ae>
This commit is contained in:
Ari Kimari
2026-02-17 13:22:35 +02:00
committed by Lup Yuen Lee
parent c036d23051
commit 966be68259
1 changed files with 35 additions and 13 deletions
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arch/arm64/src/imx9/imx9_enet.c
+35 -13
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@@ -61,6 +61,7 @@
#include "chip.h" #include "chip.h"
#include "hardware/imx9_enet.h" #include "hardware/imx9_enet.h"
#include "imx9_enet.h" #include "imx9_enet.h"
#include "imx9_clockconfig.h"
#include "imx9_ccm.h" #include "imx9_ccm.h"
#include "imx9_iomuxc.h" #include "imx9_iomuxc.h"
@@ -128,16 +129,6 @@
#define PHY_RESET_WAIT_COUNT (10) #define PHY_RESET_WAIT_COUNT (10)
/* Estimate the MII_SPEED in order to get an MDC close to 2.5MHz,
* based on the internal module (ENET) clock:
* MII clock frequency = 133 MHz / ((26 + 1) x 2) = 2.5 MHz
*
* TODO: This is hard-coded for now, could be properly calculated
*/
#define IMX9_MII_SPEED 26
/* Interrupt groups */ /* Interrupt groups */
#define RX_INTERRUPTS (ENET_INT_RXF | ENET_INT_RXB) #define RX_INTERRUPTS (ENET_INT_RXF | ENET_INT_RXB)
@@ -1928,12 +1919,43 @@ static int imx9_phyintenable(struct imx9_driver_s *priv)
static void imx9_initmii(struct imx9_driver_s *priv) static void imx9_initmii(struct imx9_driver_s *priv)
{ {
/* Speed is based on the peripheral (bus) clock; hold time is 2 module uint32_t divider;
* clock. This hold time value may need to be increased on some platforms uint32_t freq = 0;
/* Wakeup_axi_clk is root clock for MII */
imx9_get_rootclock(CCM_WAKEUP_AXI_CLK_ROOT, &freq);
if (!freq)
{
nerr("Root clock is zero\n");
return;
}
/* MII clock frequency must be <= 2,5 MHz
*
* Divider = (root clock / (2 * 2,5MHZ)) - 1
*
*/
divider = freq / 5000000;
/* round up */
if (freq % 5000000)
{
divider++;
}
divider--;
DEBUGASSERT(divider > 0 && divider < 64);
/* Hold time is 2 module clock. This hold time value may need
* to be increased on some platforms
*/ */
imx9_enet_putreg32(priv, ENET_MSCR_HOLDTIME_2CYCLES | imx9_enet_putreg32(priv, ENET_MSCR_HOLDTIME_2CYCLES |
IMX9_MII_SPEED << ENET_MSCR_MII_SPEED_SHIFT, divider << ENET_MSCR_MII_SPEED_SHIFT,
IMX9_ENET_MSCR_OFFSET); IMX9_ENET_MSCR_OFFSET);
} }