diff --git a/arch/arm/src/stm32l4/hardware/stm32l4x3xx_pinmap.h b/arch/arm/src/stm32l4/hardware/stm32l4x3xx_pinmap.h
index af6610c585d..2c1a5a0cd6c 100644
--- a/arch/arm/src/stm32l4/hardware/stm32l4x3xx_pinmap.h
+++ b/arch/arm/src/stm32l4/hardware/stm32l4x3xx_pinmap.h
@@ -587,7 +587,7 @@
 
 /* USB */
 
-#define GPIO_USB_DM_0(GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
-#define GPIO_USB_DP_0(GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
+#define GPIO_USB_DM_0          (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11)
+#define GPIO_USB_DP_0          (GPIO_ALT|GPIO_AF10|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12)
 
 #endif /* __ARCH_ARM_SRC_STM32L4_HARDWARE_STM32L4X3XX_PINMAP_H */
diff --git a/boards/arm/stm32l4/b-l475e-iot01a/configs/nsh/defconfig b/boards/arm/stm32l4/b-l475e-iot01a/configs/nsh/defconfig
index 26fa3e51a55..18276cde9d1 100644
--- a/boards/arm/stm32l4/b-l475e-iot01a/configs/nsh/defconfig
+++ b/boards/arm/stm32l4/b-l475e-iot01a/configs/nsh/defconfig
@@ -7,6 +7,7 @@
 #
 # CONFIG_NSH_ARGCAT is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="b-l475e-iot01a"
 CONFIG_ARCH_BOARD_B_L475E_IOT01A=y
diff --git a/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-6lowpan/defconfig b/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-6lowpan/defconfig
index 82197acd69b..24a57259236 100644
--- a/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-6lowpan/defconfig
+++ b/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-6lowpan/defconfig
@@ -9,6 +9,7 @@
 # CONFIG_NET_IPv4 is not set
 # CONFIG_NSH_ARGCAT is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ALLOW_BSD_COMPONENTS=y
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="b-l475e-iot01a"
diff --git a/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-starhub/defconfig b/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-starhub/defconfig
index 162aaa9a2ab..8d21aaaeab2 100644
--- a/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-starhub/defconfig
+++ b/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-starhub/defconfig
@@ -9,6 +9,7 @@
 # CONFIG_NET_IPv4 is not set
 # CONFIG_NSH_ARGCAT is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ALLOW_BSD_COMPONENTS=y
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="b-l475e-iot01a"
diff --git a/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-starpoint/defconfig b/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-starpoint/defconfig
index 8b073a5b81d..0064b039e7e 100644
--- a/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-starpoint/defconfig
+++ b/boards/arm/stm32l4/b-l475e-iot01a/configs/spirit-starpoint/defconfig
@@ -9,6 +9,7 @@
 # CONFIG_NET_IPv4 is not set
 # CONFIG_NSH_ARGCAT is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ALLOW_BSD_COMPONENTS=y
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="b-l475e-iot01a"
diff --git a/boards/arm/stm32l4/b-l475e-iot01a/include/board.h b/boards/arm/stm32l4/b-l475e-iot01a/include/board.h
index adaa380f31b..c9873219a21 100644
--- a/boards/arm/stm32l4/b-l475e-iot01a/include/board.h
+++ b/boards/arm/stm32l4/b-l475e-iot01a/include/board.h
@@ -130,8 +130,8 @@
 
 /* UART4: Connected to arduino compatible pins DO/D1 via PA0, PA1 */
 
-#define GPIO_UART4_RX GPIO_UART4_RX_1
-#define GPIO_UART4_TX GPIO_UART4_TX_1
+#define GPIO_UART4_RX  GPIO_UART4_RX_1
+#define GPIO_UART4_TX  GPIO_UART4_TX_1
 
 /* SPSGRF
  *
diff --git a/boards/arm/stm32l4/nucleo-l432kc/configs/nsh/defconfig b/boards/arm/stm32l4/nucleo-l432kc/configs/nsh/defconfig
index ead3562c0b8..a5aed63f265 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/configs/nsh/defconfig
+++ b/boards/arm/stm32l4/nucleo-l432kc/configs/nsh/defconfig
@@ -10,6 +10,7 @@
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="nucleo-l432kc"
 CONFIG_ARCH_BOARD_NUCLEO_L432KC=y
diff --git a/boards/arm/stm32l4/nucleo-l432kc/configs/spwm/defconfig b/boards/arm/stm32l4/nucleo-l432kc/configs/spwm/defconfig
index 91ef99032a1..4542c58f4da 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/configs/spwm/defconfig
+++ b/boards/arm/stm32l4/nucleo-l432kc/configs/spwm/defconfig
@@ -6,6 +6,7 @@
 # modifications.
 #
 # CONFIG_STM32L4_SYSCFG is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="nucleo-l432kc"
 CONFIG_ARCH_BOARD_NUCLEO_L432KC=y
diff --git a/boards/arm/stm32l4/nucleo-l432kc/configs/wgen/defconfig b/boards/arm/stm32l4/nucleo-l432kc/configs/wgen/defconfig
index 564109a85f2..69b5195e97d 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/configs/wgen/defconfig
+++ b/boards/arm/stm32l4/nucleo-l432kc/configs/wgen/defconfig
@@ -10,6 +10,7 @@
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ANALOG=y
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="nucleo-l432kc"
diff --git a/boards/arm/stm32l4/nucleo-l432kc/include/board.h b/boards/arm/stm32l4/nucleo-l432kc/include/board.h
index 8fafb62c302..cc2f750933f 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/include/board.h
+++ b/boards/arm/stm32l4/nucleo-l432kc/include/board.h
@@ -87,26 +87,26 @@
  */
 
 #if defined(CONFIG_ARCH_BOARD_USART1_RX_PA10)
-#  define GPIO_USART1_RX GPIO_USART1_RX_1    /* PA10 */
+#  define GPIO_USART1_RX GPIO_USART1_RX_1   /* PA10 */
 #elif defined(CONFIG_ARCH_BOARD_USART1_RX_PB7)
-#  define GPIO_USART1_RX GPIO_USART1_RX_2    /* PB7 */
+#  define GPIO_USART1_RX GPIO_USART1_RX_2   /* PB7 */
 #endif
 
 #if defined(CONFIG_ARCH_BOARD_USART1_TX_PA9)
-#  define GPIO_USART1_TX GPIO_USART1_TX_1    /* PA9  */
+#  define GPIO_USART1_TX GPIO_USART1_TX_1   /* PA9  */
 #elif defined(CONFIG_ARCH_BOARD_USART1_TX_PB6)
-#  define GPIO_USART1_TX GPIO_USART1_TX_2    /* PB6  */
+#  define GPIO_USART1_TX GPIO_USART1_TX_2   /* PB6  */
 #endif
 
 /* USART2: Connected to STLInk Debug via PA2(TX), PA15(RX) */
 
 #if defined(CONFIG_ARCH_BOARD_USART2_RX_PA3)
-#  define GPIO_USART2_RX   GPIO_USART2_RX_1  /* PA3 */
+#  define GPIO_USART2_RX GPIO_USART2_RX_1   /* PA3 */
 #elif defined(CONFIG_ARCH_BOARD_USART2_RX_PA15)
-#  define GPIO_USART2_RX   GPIO_USART2_RX_2  /* PA15 */
+#  define GPIO_USART2_RX GPIO_USART2_RX_2   /* PA15 */
 #endif
-#define GPIO_USART2_TX   GPIO_USART2_TX_1    /* PA2 */
-#define GPIO_USART2_RTS  GPIO_USART2_RTS_2
+#define GPIO_USART2_TX   GPIO_USART2_TX_1   /* PA2 */
+#define GPIO_USART2_RTS  GPIO_USART2_RTS_DE_2
 #define GPIO_USART2_CTS  GPIO_USART2_CTS_2
 
 /* LPUART1 */
@@ -231,14 +231,14 @@
  * Default is to use timer 5 (32-bit) and encoder on PA0/PA1
  */
 
-#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_1
-#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
+#define GPIO_TIM2_CH1IN  (GPIO_TIM2_CH1IN_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM2_CH2IN  (GPIO_TIM2_CH2IN_1|GPIO_SPEED_50MHz)
 
-#define GPIO_TIM3_CH1IN GPIO_TIM3_CH1IN_3
-#define GPIO_TIM3_CH2IN GPIO_TIM3_CH2IN_3
+#define GPIO_TIM3_CH1IN  (GPIO_TIM3_CH1IN_3|GPIO_SPEED_50MHz)
+#define GPIO_TIM3_CH2IN  (GPIO_TIM3_CH2IN_3|GPIO_SPEED_50MHz)
 
-#define GPIO_TIM5_CH1IN GPIO_TIM5_CH1IN_1
-#define GPIO_TIM5_CH2IN GPIO_TIM5_CH2IN_1
+#define GPIO_TIM5_CH1IN  (GPIO_TIM5_CH1IN_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM5_CH2IN  (GPIO_TIM5_CH2IN_1|GPIO_SPEED_50MHz)
 
 /* PWM output for full bridge, uses config 1, because port E is N/A on QFP64
  * CH1     | 1(A8) 2(E9)
@@ -250,13 +250,13 @@
  * CHN3    | 1(B1) 2(B15) 3(E12)
  */
 
-#define GPIO_TIM1_CH1OUT  GPIO_TIM1_CH1OUT_1
-#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1
-#define GPIO_TIM1_CH2OUT  GPIO_TIM1_CH2OUT_1
-#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1
-#define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1
-#define GPIO_TIM1_CH3NOUT GPIO_TIM1_CH3OUT_1
-#define GPIO_TIM1_CH4OUT GPIO_TIM1_CH4OUT_1
+#define GPIO_TIM1_CH1OUT   (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH1NOUT  (GPIO_TIM1_CH1N_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH2OUT   (GPIO_TIM1_CH2OUT_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH2NOUT  (GPIO_TIM1_CH2N_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH3OUT   (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH3NOUT  (GPIO_TIM1_CH3OUT_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH4OUT   (GPIO_TIM1_CH4OUT_1|GPIO_SPEED_50MHz)
 
 /* LPTIM2 PWM output
  * REVISIT : Add support for the other clock sources, LSE, LSI and HSI
@@ -269,9 +269,9 @@
 #endif
 
 #if 1
-#  define GPIO_LPTIM2_CH1OUT GPIO_LPTIM2_OUT_1
+#  define GPIO_LPTIM2_CH1OUT (GPIO_LPTIM2_OUT_1|GPIO_SPEED_50MHz)
 #else
-#  define GPIO_LPTIM2_CH1OUT GPIO_LPTIM2_OUT_2
+#  define GPIO_LPTIM2_CH1OUT (GPIO_LPTIM2_OUT_2|GPIO_SPEED_50MHz)
 #endif
 
 /****************************************************************************
diff --git a/boards/arm/stm32l4/nucleo-l432kc/src/stm32_adc.c b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_adc.c
index 4a9eb587d83..e7663aef961 100644
--- a/boards/arm/stm32l4/nucleo-l432kc/src/stm32_adc.c
+++ b/boards/arm/stm32l4/nucleo-l432kc/src/stm32_adc.c
@@ -69,7 +69,7 @@ static const uint8_t  g_adc1_chanlist[ADC1_NCHANNELS] =
 
 static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS]  =
 {
-  GPIO_ADC1_IN11, GPIO_ADC1_IN12
+  GPIO_ADC1_IN11_0, GPIO_ADC1_IN12_0
 };
 
 #else
@@ -84,7 +84,7 @@ static const uint8_t  g_adc1_chanlist[ADC1_NCHANNELS] =
 
 static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS]  =
 {
-  GPIO_ADC1_IN11
+  GPIO_ADC1_IN11_0
 };
 
 #endif /* CONFIG_STM32L4_ADC1_DMA */
diff --git a/boards/arm/stm32l4/nucleo-l452re/configs/nsh/defconfig b/boards/arm/stm32l4/nucleo-l452re/configs/nsh/defconfig
index 6f70c55ffef..7b21682bf7b 100644
--- a/boards/arm/stm32l4/nucleo-l452re/configs/nsh/defconfig
+++ b/boards/arm/stm32l4/nucleo-l452re/configs/nsh/defconfig
@@ -7,6 +7,7 @@
 #
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ADC=y
 CONFIG_ANALOG=y
 CONFIG_ARCH="arm"
diff --git a/boards/arm/stm32l4/nucleo-l452re/include/board.h b/boards/arm/stm32l4/nucleo-l452re/include/board.h
index a7ae716f91e..f4bf2ebf864 100644
--- a/boards/arm/stm32l4/nucleo-l452re/include/board.h
+++ b/boards/arm/stm32l4/nucleo-l452re/include/board.h
@@ -89,14 +89,14 @@
 
 #define GPIO_USART2_RX   GPIO_USART2_RX_1    /* PA3 */
 #define GPIO_USART2_TX   GPIO_USART2_TX_1    /* PA2 */
-#define GPIO_USART2_RTS  GPIO_USART2_RTS_2
+#define GPIO_USART2_RTS  GPIO_USART2_RTS_DE_2
 #define GPIO_USART2_CTS  GPIO_USART2_CTS_2
 
 #define GPIO_USART3_RX   GPIO_USART3_RX_3    /* PC11 */
 #define GPIO_USART3_TX   GPIO_USART3_TX_3    /* PC10 */
 
-#define GPIO_UART4_RX   GPIO_UART4_RX_1    /* PA1 */
-#define GPIO_UART4_TX   GPIO_UART4_TX_1    /* PA0 */
+#define GPIO_UART4_RX    GPIO_UART4_RX_1     /* PA1 */
+#define GPIO_UART4_TX    GPIO_UART4_TX_1     /* PA0 */
 
 /* I2C
  *
@@ -204,7 +204,7 @@
  */
 
 #define ADC1_MEASURE_CHANNEL     9
-#define GPIO_MEASURE_ADC         (GPIO_ADC1_IN9)
+#define GPIO_MEASURE_ADC         (GPIO_ADC1_IN9_0)
 
 /* DAC
  * Default is PA4 (same as ADC, do not use both at the same time)
@@ -216,14 +216,14 @@
  * Default is to use timer 5 (32-bit) and encoder on PA0/PA1
  */
 
-#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_1
-#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
+#define GPIO_TIM2_CH1IN  (GPIO_TIM2_CH1IN_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM2_CH2IN  (GPIO_TIM2_CH2IN_1|GPIO_SPEED_50MHz)
 
-#define GPIO_TIM3_CH1IN GPIO_TIM3_CH1IN_3
-#define GPIO_TIM3_CH2IN GPIO_TIM3_CH2IN_3
+#define GPIO_TIM3_CH1IN  (GPIO_TIM3_CH1IN_3|GPIO_SPEED_50MHz)
+#define GPIO_TIM3_CH2IN  (GPIO_TIM3_CH2IN_3|GPIO_SPEED_50MHz)
 
-#define GPIO_TIM5_CH1IN GPIO_TIM5_CH1IN_1
-#define GPIO_TIM5_CH2IN GPIO_TIM5_CH2IN_1
+#define GPIO_TIM5_CH1IN  (GPIO_TIM5_CH1IN_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM5_CH2IN  (GPIO_TIM5_CH2IN_1|GPIO_SPEED_50MHz)
 
 /* PWM output for full bridge, uses config 1, because port E is N/A on QFP64
  * CH1     | 1(A8) 2(E9)
@@ -232,10 +232,10 @@
  * CHN2    | 1(B0) 2(B14) 3(E10)
  */
 
-#define GPIO_TIM1_CH1OUT  GPIO_TIM1_CH1OUT_1
-#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1
-#define GPIO_TIM1_CH2OUT  GPIO_TIM1_CH2OUT_1
-#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1
+#define GPIO_TIM1_CH1OUT  (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH1NOUT (GPIO_TIM1_CH1N_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH2OUT  (GPIO_TIM1_CH2OUT_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH2NOUT (GPIO_TIM1_CH2N_1|GPIO_SPEED_50MHz)
 
 /****************************************************************************
  * Public Data
diff --git a/boards/arm/stm32l4/nucleo-l476rg/configs/nsh/defconfig b/boards/arm/stm32l4/nucleo-l476rg/configs/nsh/defconfig
index 33959cdd376..5cf47899559 100644
--- a/boards/arm/stm32l4/nucleo-l476rg/configs/nsh/defconfig
+++ b/boards/arm/stm32l4/nucleo-l476rg/configs/nsh/defconfig
@@ -10,6 +10,7 @@
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="nucleo-l476rg"
 CONFIG_ARCH_BOARD_NUCLEO_L476RG=y
diff --git a/boards/arm/stm32l4/nucleo-l476rg/configs/nxdemo/defconfig b/boards/arm/stm32l4/nucleo-l476rg/configs/nxdemo/defconfig
index 4ed3063db28..015d0da2e69 100644
--- a/boards/arm/stm32l4/nucleo-l476rg/configs/nxdemo/defconfig
+++ b/boards/arm/stm32l4/nucleo-l476rg/configs/nxdemo/defconfig
@@ -11,6 +11,7 @@
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NX_DISABLE_1BPP is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="nucleo-l476rg"
 CONFIG_ARCH_BOARD_NUCLEO_L476RG=y
diff --git a/boards/arm/stm32l4/nucleo-l476rg/include/board.h b/boards/arm/stm32l4/nucleo-l476rg/include/board.h
index e2c97ddfa05..b483107f1ae 100644
--- a/boards/arm/stm32l4/nucleo-l476rg/include/board.h
+++ b/boards/arm/stm32l4/nucleo-l476rg/include/board.h
@@ -78,8 +78,8 @@
  *        PD1
  */
 
-#define GPIO_CAN1_RX   GPIO_CAN1_RX_1        /* PA11 */
-#define GPIO_CAN1_TX   GPIO_CAN1_TX_1        /* PA12 */
+#define GPIO_CAN1_RX   GPIO_CAN1_RX_1   /* PA11 */
+#define GPIO_CAN1_TX   GPIO_CAN1_TX_1   /* PA12 */
 
 /* USART1:
  *   RXD: PA10  CN9 pin 3, CN10 pin 33
@@ -105,7 +105,7 @@
 
 #define GPIO_USART2_RX   GPIO_USART2_RX_1    /* PA3 */
 #define GPIO_USART2_TX   GPIO_USART2_TX_1    /* PA2 */
-#define GPIO_USART2_RTS  GPIO_USART2_RTS_2
+#define GPIO_USART2_RTS  GPIO_USART2_RTS_DE_2
 #define GPIO_USART2_CTS  GPIO_USART2_CTS_2
 
 /* USART3:
@@ -154,13 +154,13 @@
 
 /* SPI */
 
-#define GPIO_SPI1_MISO   GPIO_SPI1_MISO_2     /* PB4 */
-#define GPIO_SPI1_MOSI   GPIO_SPI1_MOSI_2     /* PB5 */
-#define GPIO_SPI1_SCK    GPIO_SPI1_SCK_2      /* PB3 */
+#define GPIO_SPI1_MISO   GPIO_SPI1_MISO_2    /* PB4 */
+#define GPIO_SPI1_MOSI   GPIO_SPI1_MOSI_2    /* PB5 */
+#define GPIO_SPI1_SCK    GPIO_SPI1_SCK_2     /* PB3 */
 
-#define GPIO_SPI2_MISO   GPIO_SPI2_MISO_1     /* PB14 */
-#define GPIO_SPI2_MOSI   GPIO_SPI2_MOSI_1     /* PB15 */
-#define GPIO_SPI2_SCK    GPIO_SPI2_SCK_2      /* PB13 */
+#define GPIO_SPI2_MISO   GPIO_SPI2_MISO_1    /* PB14 */
+#define GPIO_SPI2_MOSI   GPIO_SPI2_MOSI_1    /* PB15 */
+#define GPIO_SPI2_SCK    GPIO_SPI2_SCK_2     /* PB13 */
 
 /* LEDs
  *
@@ -228,14 +228,14 @@
  * Default is to use timer 5 (32-bit) and encoder on PA0/PA1
  */
 
-#define GPIO_TIM2_CH1IN GPIO_TIM2_CH1IN_1
-#define GPIO_TIM2_CH2IN GPIO_TIM2_CH2IN_1
+#define GPIO_TIM2_CH1IN  (GPIO_TIM2_CH1IN_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM2_CH2IN  (GPIO_TIM2_CH2IN_1|GPIO_SPEED_50MHz)
 
-#define GPIO_TIM3_CH1IN GPIO_TIM3_CH1IN_3
-#define GPIO_TIM3_CH2IN GPIO_TIM3_CH2IN_3
+#define GPIO_TIM3_CH1IN  (GPIO_TIM3_CH1IN_3|GPIO_SPEED_50MHz)
+#define GPIO_TIM3_CH2IN  (GPIO_TIM3_CH2IN_3|GPIO_SPEED_50MHz)
 
-#define GPIO_TIM5_CH1IN GPIO_TIM5_CH1IN_1
-#define GPIO_TIM5_CH2IN GPIO_TIM5_CH2IN_1
+#define GPIO_TIM5_CH1IN  (GPIO_TIM5_CH1IN_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM5_CH2IN  (GPIO_TIM5_CH2IN_1|GPIO_SPEED_50MHz)
 
 /* PWM output for full bridge, uses config 1, because port E is N/A on QFP64
  * CH1     | 1(A8) 2(E9)
@@ -244,13 +244,13 @@
  * CHN2    | 1(B0) 2(B14) 3(E10)
  */
 
-#define GPIO_TIM1_CH1OUT  GPIO_TIM1_CH1OUT_1
-#define GPIO_TIM1_CH1NOUT GPIO_TIM1_CH1N_1
-#define GPIO_TIM1_CH2OUT  GPIO_TIM1_CH2OUT_1
-#define GPIO_TIM1_CH2NOUT GPIO_TIM1_CH2N_1
+#define GPIO_TIM1_CH1OUT    (GPIO_TIM1_CH1OUT_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH1NOUT   (GPIO_TIM1_CH1N_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH2OUT    (GPIO_TIM1_CH2OUT_1|GPIO_SPEED_50MHz)
+#define GPIO_TIM1_CH2NOUT   (GPIO_TIM1_CH2N_1|GPIO_SPEED_50MHz)
 
-#define GPIO_LPTIM1_CH1OUT  GPIO_LPTIM1_OUT_1
-#define GPIO_LPTIM2_CH1OUT  GPIO_LPTIM2_OUT_2
+#define GPIO_LPTIM1_CH1OUT  (GPIO_LPTIM1_OUT_1|GPIO_SPEED_50MHz)
+#define GPIO_LPTIM2_CH1OUT  (GPIO_LPTIM2_OUT_2|GPIO_SPEED_50MHz)
 
 /****************************************************************************
  * Public Data
diff --git a/boards/arm/stm32l4/nucleo-l476rg/src/stm32_adc.c b/boards/arm/stm32l4/nucleo-l476rg/src/stm32_adc.c
index 8fe7a2079cf..4fc545de40e 100644
--- a/boards/arm/stm32l4/nucleo-l476rg/src/stm32_adc.c
+++ b/boards/arm/stm32l4/nucleo-l476rg/src/stm32_adc.c
@@ -71,8 +71,8 @@ static const uint8_t  g_adc1_chanlist[ADC1_NCHANNELS] =
 
 static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS]  =
 {
-  GPIO_ADC1_IN1,
-  GPIO_ADC1_IN2
+  GPIO_ADC1_IN1_0,
+  GPIO_ADC1_IN2_0
 };
 
 #else
@@ -89,7 +89,7 @@ static const uint8_t  g_adc1_chanlist[ADC1_NCHANNELS] =
 
 static const uint32_t g_adc1_pinlist[ADC1_NCHANNELS]  =
 {
-  GPIO_ADC1_IN1
+  GPIO_ADC1_IN1_0
 };
 
 #endif /* CONFIG_ADC_DMA */
diff --git a/boards/arm/stm32l4/nucleo-l496zg/configs/nsh/defconfig b/boards/arm/stm32l4/nucleo-l496zg/configs/nsh/defconfig
index fedc6c82136..87b41c82737 100644
--- a/boards/arm/stm32l4/nucleo-l496zg/configs/nsh/defconfig
+++ b/boards/arm/stm32l4/nucleo-l496zg/configs/nsh/defconfig
@@ -7,6 +7,7 @@
 #
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ADC=y
 CONFIG_ANALOG=y
 CONFIG_ARCH="arm"
diff --git a/boards/arm/stm32l4/nucleo-l496zg/include/board.h b/boards/arm/stm32l4/nucleo-l496zg/include/board.h
index 46418d0d1e6..7aa8a010e5a 100644
--- a/boards/arm/stm32l4/nucleo-l496zg/include/board.h
+++ b/boards/arm/stm32l4/nucleo-l496zg/include/board.h
@@ -445,13 +445,6 @@
 #  define STM32_SDMMC_SDXFR_CLKDIV      (2 << STM32_SDMMC_CLKCR_CLKDIV_SHIFT)
 #endif
 
-#if defined(CONFIG_STM32L4_SDMMC2)
-#  define GPIO_SDMMC2_D0 GPIO_SDMMC2_D0_1
-#  define GPIO_SDMMC2_D1 GPIO_SDMMC2_D1_1
-#  define GPIO_SDMMC2_D2 GPIO_SDMMC2_D2_1
-#  define GPIO_SDMMC2_D3 GPIO_SDMMC2_D3_1
-#endif
-
 /* DMA Channel/Stream Selections ********************************************/
 
 /* Stream selections are arbitrary for now but might become important in the
@@ -463,13 +456,9 @@
  *   DMAMAP_SDMMC_1 = Channel 4, Stream 7
  *   DMAMAP_SDMMC_2 = Channel 5, Stream 7
  *
- * SDMMC2 DMA
- *   DMAMAP_SDMMC2_1 = Channel 11, Stream 0
- *   DMAMAP_SDMMC3_2 = Channel 11, Stream 5
  */
 
 #define DMAMAP_SDMMC1  DMACHAN_SDMMC_1
-#define DMAMAP_SDMMC2  DMACHAN_SDMMC_2
 
 /* FLASH wait states
  *
@@ -582,8 +571,8 @@
 
 /* LPUART1 is connector to Virtual COM port PG6 and PG7. */
 
-#define GPIO_LPUART1_TX    GPIO_LPUART1_TX_3
-#define GPIO_LPUART1_RX    GPIO_LPUART1_RX_3
+#define GPIO_LPUART1_TX   GPIO_LPUART1_TX_3
+#define GPIO_LPUART1_RX   GPIO_LPUART1_RX_3
 
 /* DMA channels *************************************************************/
 
diff --git a/boards/arm/stm32l4/nucleo-l496zg/src/stm32_adc.c b/boards/arm/stm32l4/nucleo-l496zg/src/stm32_adc.c
index 46fd12b3300..83b338839af 100644
--- a/boards/arm/stm32l4/nucleo-l496zg/src/stm32_adc.c
+++ b/boards/arm/stm32l4/nucleo-l496zg/src/stm32_adc.c
@@ -94,7 +94,7 @@ static const uint8_t  g_chanlist_adc1[ADC1_NCHANNELS] =
 
 static const uint32_t g_pinlist_adc1[ADC1_NCHANNELS] =
 {
-  GPIO_ADC1_IN3
+  GPIO_ADC1_IN3_0
 };
 #endif
 
@@ -107,7 +107,7 @@ static const uint8_t  g_chanlist_adc2[ADC2_NCHANNELS] =
 }; /* IN4, DAC1 and DAC2 */
 static const uint32_t g_pinlist_adc2[ADC2_NCHANNELS] =
 {
-  GPIO_ADC1_IN4, 0, 0
+  GPIO_ADC1_IN4_0, 0, 0
 };
 #endif
 
diff --git a/boards/arm/stm32l4/steval-stlcs01v1/configs/lwl/defconfig b/boards/arm/stm32l4/steval-stlcs01v1/configs/lwl/defconfig
index e1de412966b..0a1c1381887 100644
--- a/boards/arm/stm32l4/steval-stlcs01v1/configs/lwl/defconfig
+++ b/boards/arm/stm32l4/steval-stlcs01v1/configs/lwl/defconfig
@@ -10,6 +10,7 @@
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="steval-stlcs01v1"
 CONFIG_ARCH_BOARD_STEVAL_STLCS01V1=y
diff --git a/boards/arm/stm32l4/steval-stlcs01v1/configs/usbnsh/defconfig b/boards/arm/stm32l4/steval-stlcs01v1/configs/usbnsh/defconfig
index 25dbedca651..25c885cf533 100644
--- a/boards/arm/stm32l4/steval-stlcs01v1/configs/usbnsh/defconfig
+++ b/boards/arm/stm32l4/steval-stlcs01v1/configs/usbnsh/defconfig
@@ -10,6 +10,7 @@
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
 # CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="steval-stlcs01v1"
 CONFIG_ARCH_BOARD_STEVAL_STLCS01V1=y
diff --git a/boards/arm/stm32l4/steval-stlcs01v1/include/board.h b/boards/arm/stm32l4/steval-stlcs01v1/include/board.h
index d8f12263e32..7c5ffc6ddfb 100644
--- a/boards/arm/stm32l4/steval-stlcs01v1/include/board.h
+++ b/boards/arm/stm32l4/steval-stlcs01v1/include/board.h
@@ -350,4 +350,11 @@
 #define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 /* PB15 */
 #define GPIO_SPI2_MISO 0                /* Not used in half-duplex */
 
+/* USB OTG FS */
+
+#define GPIO_OTGFS_DM  GPIO_OTGFS_DM_0  /* PA11 */
+#define GPIO_OTGFS_DP  GPIO_OTGFS_DP_0  /* PA12 */
+#define GPIO_OTGFS_ID  GPIO_OTGFS_ID_0  /* PA10 */
+#define GPIO_OTGFS_SOF GPIO_OTGFS_SOF_0 /* PA8  */
+
 #endif /* __BOARDS_ARM_STM32L4_STEVAL_STLCS01V1_INCLUDE_BOARD_H */
diff --git a/boards/arm/stm32l4/stm32l476-mdk/configs/nsh/defconfig b/boards/arm/stm32l4/stm32l476-mdk/configs/nsh/defconfig
index 94eb0e4af09..a38548d5ac8 100644
--- a/boards/arm/stm32l4/stm32l476-mdk/configs/nsh/defconfig
+++ b/boards/arm/stm32l4/stm32l476-mdk/configs/nsh/defconfig
@@ -8,6 +8,7 @@
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="stm32l476-mdk"
 CONFIG_ARCH_BOARD_STM32L476_MDK=y
diff --git a/boards/arm/stm32l4/stm32l476vg-disco/configs/knsh/defconfig b/boards/arm/stm32l4/stm32l476vg-disco/configs/knsh/defconfig
index 612d56f1cc9..210a19bb23b 100644
--- a/boards/arm/stm32l4/stm32l476vg-disco/configs/knsh/defconfig
+++ b/boards/arm/stm32l4/stm32l476vg-disco/configs/knsh/defconfig
@@ -8,6 +8,7 @@
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 # CONFIG_SYSTEM_DD is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="stm32l476vg-disco"
diff --git a/boards/arm/stm32l4/stm32l476vg-disco/configs/nsh/defconfig b/boards/arm/stm32l4/stm32l476vg-disco/configs/nsh/defconfig
index a94c7b3bcc6..aedc9d1eaa4 100644
--- a/boards/arm/stm32l4/stm32l476vg-disco/configs/nsh/defconfig
+++ b/boards/arm/stm32l4/stm32l476vg-disco/configs/nsh/defconfig
@@ -8,6 +8,7 @@
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="stm32l476vg-disco"
 CONFIG_ARCH_BOARD_STM32L476VG_DISCO=y
diff --git a/boards/arm/stm32l4/stm32l476vg-disco/include/board.h b/boards/arm/stm32l4/stm32l476vg-disco/include/board.h
index 408215a9ee0..1923d5b3055 100644
--- a/boards/arm/stm32l4/stm32l476vg-disco/include/board.h
+++ b/boards/arm/stm32l4/stm32l476vg-disco/include/board.h
@@ -76,8 +76,8 @@
  */
 
 #if 0
-#define GPIO_USART1_RX GPIO_USART1_RX_2    / * PB7  * /
-#define GPIO_USART1_TX GPIO_USART1_TX_2    / * PB6  * /
+#define GPIO_USART1_RX GPIO_USART1_RX_2    /* PB7 */
+#define GPIO_USART1_TX GPIO_USART1_TX_2    /* PB6 */
 #endif
 
 /* USART2: Connected to STLink Debug via PD5, PD6
diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/configs/knsh/defconfig b/boards/arm/stm32l4/stm32l4r9ai-disco/configs/knsh/defconfig
index bd6578f5192..f463b71b977 100644
--- a/boards/arm/stm32l4/stm32l4r9ai-disco/configs/knsh/defconfig
+++ b/boards/arm/stm32l4/stm32l4r9ai-disco/configs/knsh/defconfig
@@ -7,6 +7,7 @@
 #
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 # CONFIG_SYSTEM_DD is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="stm32l4r9ai-disco"
diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/configs/nsh/defconfig b/boards/arm/stm32l4/stm32l4r9ai-disco/configs/nsh/defconfig
index 7ef9d34b82a..8d7033e6ae3 100644
--- a/boards/arm/stm32l4/stm32l4r9ai-disco/configs/nsh/defconfig
+++ b/boards/arm/stm32l4/stm32l4r9ai-disco/configs/nsh/defconfig
@@ -7,6 +7,7 @@
 #
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
+# CONFIG_STM32L4_USE_LEGACY_PINMAP is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="stm32l4r9ai-disco"
 CONFIG_ARCH_BOARD_STM32L4R9AI_DISCO=y
diff --git a/boards/arm/stm32l4/stm32l4r9ai-disco/include/board.h b/boards/arm/stm32l4/stm32l4r9ai-disco/include/board.h
index 39cae84d1d2..cabf4cd5f47 100644
--- a/boards/arm/stm32l4/stm32l4r9ai-disco/include/board.h
+++ b/boards/arm/stm32l4/stm32l4r9ai-disco/include/board.h
@@ -73,7 +73,7 @@
  */
 
 #define ADC1_MEASURE_CHANNEL     12
-#define GPIO_MEASURE_ADC         (GPIO_ADC1_IN12)
+#define GPIO_MEASURE_ADC         (GPIO_ADC1_IN12_0)
 
 /* Alternate function pin selections ****************************************/
 
@@ -88,8 +88,8 @@
  */
 
 #if 0
-#define GPIO_USART1_RX GPIO_USART1_RX_2    / * PB7  * /
-#define GPIO_USART1_TX GPIO_USART1_TX_2    / * PB6  * /
+#define GPIO_USART1_RX GPIO_USART1_RX_2    /* PB7 */
+#define GPIO_USART1_TX GPIO_USART1_TX_2    /* PB6 */
 #endif
 
 /* USART2: Connected to STLink Debug via PD5, PD6
@@ -105,8 +105,8 @@
  *   TXD: PA0 -> CN17 A4
  */
 
-#define GPIO_UART4_RX   GPIO_UART4_RX_1    /* PA1 */
-#define GPIO_UART4_TX   GPIO_UART4_TX_1    /* PA0 */
+#define GPIO_UART4_RX    GPIO_UART4_RX_1    /* PA1 */
+#define GPIO_UART4_TX    GPIO_UART4_TX_1    /* PA0 */
 
 /* I2C
  *