diff --git a/arch/arm/src/stm32/hardware/stm32f20xxx_syscfg.h b/arch/arm/src/stm32/hardware/stm32f20xxx_syscfg.h index 72fdb3bbdc3..71010ea7314 100644 --- a/arch/arm/src/stm32/hardware/stm32f20xxx_syscfg.h +++ b/arch/arm/src/stm32/hardware/stm32f20xxx_syscfg.h @@ -43,8 +43,6 @@ #include #include "chip.h" -#ifdef CONFIG_STM32_STM32F20XX - /**************************************************************************************************** * Pre-processor Definitions ****************************************************************************************************/ @@ -147,5 +145,4 @@ #define SYSCFG_CMPCR_CMPPD (1 << 0) /* Bit 0: Compensation cell power-down */ #define SYSCFG_CMPCR_READY (1 << 8) /* Bit 8: Compensation cell ready flag */ -#endif /* CONFIG_STM32_STM32F20XX */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F20XXX_SYSCFG_H */ diff --git a/arch/arm/src/stm32/hardware/stm32f30xxx_syscfg.h b/arch/arm/src/stm32/hardware/stm32f30xxx_syscfg.h index e9a2308fa3a..97e0a97b28d 100644 --- a/arch/arm/src/stm32/hardware/stm32f30xxx_syscfg.h +++ b/arch/arm/src/stm32/hardware/stm32f30xxx_syscfg.h @@ -43,8 +43,6 @@ #include #include "chip.h" -#ifdef CONFIG_STM32_STM32F30XX - /**************************************************************************************************** * Pre-processor Definitions ****************************************************************************************************/ @@ -173,5 +171,4 @@ #define SYSCFG_CFGR2_BYPADDPAR (1 << 4) /* Bit 4: Bypass address bit 29 in parity calculation */ #define SYSCFG_CFGR2_SRAM_PEF (1 << 8) /* Bit 8: SRAM parity error */ -#endif /* CONFIG_STM32_STM32F30XX */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F30XXX_SYSCFG_H */ diff --git a/arch/arm/src/stm32/hardware/stm32f33xxx_syscfg.h b/arch/arm/src/stm32/hardware/stm32f33xxx_syscfg.h index 0ff658d7240..1490854d534 100644 --- a/arch/arm/src/stm32/hardware/stm32f33xxx_syscfg.h +++ b/arch/arm/src/stm32/hardware/stm32f33xxx_syscfg.h @@ -44,8 +44,6 @@ #include #include "chip.h" -#ifdef CONFIG_STM32_STM32F33XX - /**************************************************************************************************** * Pre-processor Definitions ****************************************************************************************************/ @@ -206,5 +204,4 @@ #define SYSCFG_CFGR3_DAC1_TRIG3_RMP (1 << 16) /* Bit 16: HRTIM1_DAC1_TRIG1 remap */ #define SYSCFG_CFGR3_DAC1_TRIG5_RMP (1 << 17) /* Bit 17: HRTIM1_DAC1_TRIG2 remap */ -#endif /* CONFIG_STM32_STM32F33XX */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F33XXX_SYSCFG_H */ diff --git a/arch/arm/src/stm32/hardware/stm32f37xxx_syscfg.h b/arch/arm/src/stm32/hardware/stm32f37xxx_syscfg.h index c63a67bf848..3c531729d15 100644 --- a/arch/arm/src/stm32/hardware/stm32f37xxx_syscfg.h +++ b/arch/arm/src/stm32/hardware/stm32f37xxx_syscfg.h @@ -44,8 +44,6 @@ #include #include "chip.h" -#ifdef CONFIG_STM32_STM32F37XX - /**************************************************************************************************** * Pre-processor Definitions ****************************************************************************************************/ @@ -162,5 +160,4 @@ #define SYSCFG_CFGR2_PVDLOCK (1 << 2) /* Bit 2: PVD lock enable */ #define SYSCFG_CFGR2_SRAM_PEF (1 << 8) /* Bit 8: SRAM parity error */ -#endif /* CONFIG_STM32_STM32F37XX */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F37XXX_SYSCFG_H */ diff --git a/arch/arm/src/stm32/hardware/stm32f40xxx_syscfg.h b/arch/arm/src/stm32/hardware/stm32f40xxx_syscfg.h index af71e16e4bb..0ce9f5da966 100644 --- a/arch/arm/src/stm32/hardware/stm32f40xxx_syscfg.h +++ b/arch/arm/src/stm32/hardware/stm32f40xxx_syscfg.h @@ -46,8 +46,6 @@ #include #include "chip.h" -#ifdef CONFIG_STM32_STM32F4XXX - /**************************************************************************************************** * Pre-processor Definitions ****************************************************************************************************/ @@ -198,5 +196,4 @@ # define SYSCFG_CFGR_FMPI2C1_SDA (1 << 1) /* Bit 8: Forces FM+ drive capability on SDA */ #endif -#endif /* CONFIG_STM32_STM32F4XXX */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32F40XXX_SYSCFG_H */ diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h b/arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h index 5257868f1f6..bbebb0cc603 100644 --- a/arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h +++ b/arch/arm/src/stm32/hardware/stm32g47xxx_syscfg.h @@ -28,8 +28,6 @@ #include #include "chip.h" -#ifdef CONFIG_STM32_STM32G47XX - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -167,5 +165,4 @@ #define SYSCFG_SKR_KEY_MASK (0xff << SYSCFG_SKR_KEY_SHIFT) # define SYSCFG_SKR_KEY(n) (((n) << SYSCFG_SKR_KEY_SHIFT) & SYSCFG_SKR_KEY_MASK) -#endif /* CONFIG_STM32_STM32G47XX */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_SYSCFG_H */ diff --git a/arch/arm/src/stm32/hardware/stm32g47xxx_vrefbuf.h b/arch/arm/src/stm32/hardware/stm32g47xxx_vrefbuf.h index fa0a030a731..b41da9125d8 100644 --- a/arch/arm/src/stm32/hardware/stm32g47xxx_vrefbuf.h +++ b/arch/arm/src/stm32/hardware/stm32g47xxx_vrefbuf.h @@ -28,8 +28,6 @@ #include #include "chip.h" -#ifdef CONFIG_STM32_STM32G47XX - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -64,5 +62,4 @@ #define VREFBUF_CCR_TRIM_SHIFT (0) #define VREFBUF_CCR_TRIM_MASK (0x3f) /* 6-bit unsigned trim code */ -#endif /* CONFIG_STM32_STM32G47XX */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32G47XXX_VREFBUF_H */ diff --git a/arch/arm/src/stm32/hardware/stm32gxxxxx_dac.h b/arch/arm/src/stm32/hardware/stm32gxxxxx_dac.h index 7ea0ac9ce1b..dfcca8f352e 100644 --- a/arch/arm/src/stm32/hardware/stm32gxxxxx_dac.h +++ b/arch/arm/src/stm32/hardware/stm32gxxxxx_dac.h @@ -28,8 +28,6 @@ #include #include "chip.h" -#ifdef CONFIG_STM32_STM32G47XX - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -488,5 +486,4 @@ #define DAC_STR_STINCDATA_SHIFT (16) /* DAC channel 1 Sawtooth increment value (12.4 bit format) */ #define DAC_STR_STINCDATA_MASK (0xffff << DAC_STR_STINCDATA_SHIFT) -#endif /* CONFIG_STM32_STM32G47XX */ #endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32GXXXXX_DAC_H */