mirror of
https://github.com/apache/nuttx.git
synced 2026-05-28 03:45:50 +08:00
Add Uros' RCC actitivity counter to STM32 idle loop
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3900 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
Executable → Regular
+3
@@ -51,3 +51,6 @@ CHIP_CSRCS = stm32_start.c stm32_rcc.c stm32_gpio.c stm32_flash.c \
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stm32_tim.c stm32_i2c.c stm32_pwr.c stm32_rtc.c \
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stm32_tim.c stm32_i2c.c stm32_pwr.c stm32_rtc.c \
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stm32_idle.c stm32_waste.c
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stm32_idle.c stm32_waste.c
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ifeq ($(CONFIG_STM32_RCCLOCK),y)
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CHIP_CSRCS += stm32_rcclock.c
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endif
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Executable → Regular
Executable → Regular
Executable → Regular
Executable → Regular
Executable → Regular
Executable → Regular
Executable → Regular
Executable → Regular
+15
@@ -42,6 +42,7 @@
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#include <nuttx/arch.h>
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#include <nuttx/arch.h>
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#include "up_internal.h"
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#include "up_internal.h"
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#include "stm32_rcc.h"
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/****************************************************************************
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/****************************************************************************
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* Pre-processor Definitions
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* Pre-processor Definitions
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@@ -94,6 +95,20 @@ void up_idle(void)
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sched_process_timer();
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sched_process_timer();
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#else
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#else
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#ifdef CONFIG_STM32_RCCLOCK
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/* Decide, which power saving level can be obtained */
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if (stm32_getrccactivity())
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{
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/* Sleep mode */
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}
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else
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{
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/* Stop mode */
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}
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#endif
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/* Sleep until an interrupt occurs to save power */
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/* Sleep until an interrupt occurs to save power */
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BEGIN_IDLE();
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BEGIN_IDLE();
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Executable → Regular
Executable → Regular
+2
-54
@@ -63,18 +63,6 @@
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* Private Data
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* Private Data
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****************************************************************************/
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****************************************************************************/
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/* Activity reference count, showing inactivity after start-up.
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* Device drivers increment this count using rcclock() and rccunlock()
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*
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* If this value goes beyond the range [0, MAX_RCCs] indicates
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* reference count leakage (asymetric number of locks vs. unlocks) and
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* system enters permanent active state.
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*/
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#ifdef CONFIG_STM32_RCCLOCK
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static int stm32_rcclock_count = 0;
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#endif
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/****************************************************************************
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/****************************************************************************
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* Private Functions
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* Private Functions
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****************************************************************************/
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****************************************************************************/
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@@ -491,7 +479,7 @@ void stm32_clockconfig(void)
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/* Make sure that we are starting in the reset state */
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/* Make sure that we are starting in the reset state */
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rcc_reset();
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rcc_reset();
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#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
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#if defined(CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG)
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/* Invoke Board Custom Clock Configuration */
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/* Invoke Board Custom Clock Configuration */
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@@ -507,7 +495,7 @@ void stm32_clockconfig(void)
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#endif
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#endif
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/* Enable peripheral clocking */
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/* Enable peripheral clocking */
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rcc_enableahb();
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rcc_enableahb();
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rcc_enableapb2();
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rcc_enableapb2();
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rcc_enableapb1();
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rcc_enableapb1();
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@@ -536,43 +524,3 @@ void stm32_rcc_enablelse(void)
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modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
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modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_RTCEN);
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}
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}
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#ifdef CONFIG_STM32_RCCLOCK
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uint32_t stm32_rcclock(uint8_t domain_id)
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{
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// THINK:
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// maybe just shift domain_id into 32-bit or 64-bit register
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// and if there value of this var != 0, we are active...
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// increment some variable, so it is possible to test leakage
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// multiple locks or multiple unlocks
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if (stm32_rcclock_count >= 0)
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{
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stm32_rcclock_count++;
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if (stm32_rcclock_count > 64)
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{
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stm32_rcclock_count = -1; /* capture error */
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}
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}
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return 0;
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}
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uint32_t stm32_rccunlock(uint8_t domain_id)
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{
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if (stm32_rcclock_count > -1)
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{
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stm32_rcclock_count--;
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}
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return 0;
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}
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uint32_t stm32_setrccoptions(uint8_t domain_id, uint32_t options)
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{
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}
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int stm32_getrccactivity(void)
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{
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return stm32_rcclock_count;
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}
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#endif
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Executable → Regular
@@ -0,0 +1,111 @@
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/****************************************************************************
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* arch/arm/src/stm32/stm32_rcc.c
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*
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* Copyright (C) 2011 Uros Platise. All rights reserved.
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* Author: Author: Uros Platise <uros.platise@isotel.eu>
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*
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* This file is part of NuttX:
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*
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* Activity reference count, showing inactivity after start-up.
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* Device drivers increment this count using rcclock() and rccunlock()
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*
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* If this value goes beyond the range [0, MAX_RCCs] indicates
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* reference count leakage (asymetric number of locks vs. unlocks) and
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* system enters permanent active state.
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*/
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static int stm32_rcclock_count = 0;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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uint32_t stm32_rcclock(uint8_t domain_id)
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{
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// THINK:
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// maybe just shift domain_id into 32-bit or 64-bit register
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// and if there value of this var != 0, we are active...
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// increment some variable, so it is possible to test leakage
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// multiple locks or multiple unlocks
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if (stm32_rcclock_count >= 0)
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{
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stm32_rcclock_count++;
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if (stm32_rcclock_count > 64)
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{
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stm32_rcclock_count = -1; /* capture error */
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}
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}
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return 0;
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}
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uint32_t stm32_rccunlock(uint8_t domain_id)
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{
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if (stm32_rcclock_count > -1)
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{
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stm32_rcclock_count--;
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}
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return 0;
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}
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uint32_t stm32_setrccoptions(uint8_t domain_id, uint32_t options)
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{
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return 0;
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}
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int stm32_getrccactivity(void)
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{
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return stm32_rcclock_count;
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}
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Executable → Regular
Executable → Regular
Executable → Regular
Executable → Regular
Executable → Regular
Executable → Regular
Reference in New Issue
Block a user